Boot log: asus-C436FA-Flip-hatch

    1 15:43:32.014471  lava-dispatcher, installed at version: 2022.06
    2 15:43:32.014663  start: 0 validate
    3 15:43:32.014794  Start time: 2022-09-17 15:43:32.014787+00:00 (UTC)
    4 15:43:32.014924  Using caching service: 'http://localhost/cache/?uri=%s'
    5 15:43:32.015052  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
    6 15:43:32.308272  Using caching service: 'http://localhost/cache/?uri=%s'
    7 15:43:32.309011  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 15:43:32.316029  Using caching service: 'http://localhost/cache/?uri=%s'
    9 15:43:32.316754  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 15:43:32.605946  Using caching service: 'http://localhost/cache/?uri=%s'
   11 15:43:32.606656  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 15:43:32.613309  validate duration: 0.60
   14 15:43:32.613613  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 15:43:32.613721  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 15:43:32.613817  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 15:43:32.613921  Not decompressing ramdisk as can be used compressed.
   18 15:43:32.614012  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/initrd.cpio.gz
   19 15:43:32.614083  saving as /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/ramdisk/initrd.cpio.gz
   20 15:43:32.614149  total size: 5411076 (5MB)
   21 15:43:32.617663  progress   0% (0MB)
   22 15:43:32.620335  progress   5% (0MB)
   23 15:43:32.622406  progress  10% (0MB)
   24 15:43:32.624722  progress  15% (0MB)
   25 15:43:32.627740  progress  20% (1MB)
   26 15:43:32.629975  progress  25% (1MB)
   27 15:43:32.632251  progress  30% (1MB)
   28 15:43:32.634483  progress  35% (1MB)
   29 15:43:32.637006  progress  40% (2MB)
   30 15:43:32.639656  progress  45% (2MB)
   31 15:43:32.642342  progress  50% (2MB)
   32 15:43:32.644923  progress  55% (2MB)
   33 15:43:32.647155  progress  60% (3MB)
   34 15:43:32.649994  progress  65% (3MB)
   35 15:43:32.651960  progress  70% (3MB)
   36 15:43:32.653845  progress  75% (3MB)
   37 15:43:32.656440  progress  80% (4MB)
   38 15:43:32.658655  progress  85% (4MB)
   39 15:43:32.661471  progress  90% (4MB)
   40 15:43:32.663046  progress  95% (4MB)
   41 15:43:32.665616  progress 100% (5MB)
   42 15:43:32.665822  5MB downloaded in 0.05s (99.88MB/s)
   43 15:43:32.665990  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 15:43:32.666276  end: 1.1 download-retry (duration 00:00:00) [common]
   46 15:43:32.666385  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 15:43:32.666475  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 15:43:32.666581  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 15:43:32.666651  saving as /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/kernel/bzImage
   50 15:43:32.666714  total size: 6815632 (6MB)
   51 15:43:32.666778  No compression specified
   52 15:43:32.668663  progress   0% (0MB)
   53 15:43:32.671871  progress   5% (0MB)
   54 15:43:32.674384  progress  10% (0MB)
   55 15:43:32.677481  progress  15% (1MB)
   56 15:43:32.680753  progress  20% (1MB)
   57 15:43:32.683076  progress  25% (1MB)
   58 15:43:32.686507  progress  30% (1MB)
   59 15:43:32.689295  progress  35% (2MB)
   60 15:43:32.692103  progress  40% (2MB)
   61 15:43:32.695124  progress  45% (2MB)
   62 15:43:32.697616  progress  50% (3MB)
   63 15:43:32.700686  progress  55% (3MB)
   64 15:43:32.703378  progress  60% (3MB)
   65 15:43:32.706466  progress  65% (4MB)
   66 15:43:32.709373  progress  70% (4MB)
   67 15:43:32.712030  progress  75% (4MB)
   68 15:43:32.715111  progress  80% (5MB)
   69 15:43:32.717982  progress  85% (5MB)
   70 15:43:32.721414  progress  90% (5MB)
   71 15:43:32.723847  progress  95% (6MB)
   72 15:43:32.726614  progress 100% (6MB)
   73 15:43:32.726914  6MB downloaded in 0.06s (107.98MB/s)
   74 15:43:32.727088  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 15:43:32.727326  end: 1.2 download-retry (duration 00:00:00) [common]
   77 15:43:32.727416  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 15:43:32.727502  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 15:43:32.727606  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/full.rootfs.tar.xz
   80 15:43:32.727673  saving as /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/nfsrootfs/full.rootfs.tar
   81 15:43:32.727735  total size: 207120848 (197MB)
   82 15:43:32.727797  Using unxz to decompress xz
   83 15:43:32.733447  progress   0% (0MB)
   84 15:43:33.302830  progress   5% (9MB)
   85 15:43:33.847279  progress  10% (19MB)
   86 15:43:34.450704  progress  15% (29MB)
   87 15:43:34.836882  progress  20% (39MB)
   88 15:43:35.212601  progress  25% (49MB)
   89 15:43:35.833307  progress  30% (59MB)
   90 15:43:36.391424  progress  35% (69MB)
   91 15:43:37.001229  progress  40% (79MB)
   92 15:43:37.558819  progress  45% (88MB)
   93 15:43:38.137904  progress  50% (98MB)
   94 15:43:38.766008  progress  55% (108MB)
   95 15:43:39.440253  progress  60% (118MB)
   96 15:43:39.585266  progress  65% (128MB)
   97 15:43:39.733256  progress  70% (138MB)
   98 15:43:39.836770  progress  75% (148MB)
   99 15:43:39.904445  progress  80% (158MB)
  100 15:43:39.974598  progress  85% (167MB)
  101 15:43:40.081022  progress  90% (177MB)
  102 15:43:40.347262  progress  95% (187MB)
  103 15:43:40.950711  progress 100% (197MB)
  104 15:43:40.957035  197MB downloaded in 8.23s (24.00MB/s)
  105 15:43:40.957297  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 15:43:40.957566  end: 1.3 download-retry (duration 00:00:08) [common]
  108 15:43:40.957660  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 15:43:40.957752  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 15:43:40.957865  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 15:43:40.957940  saving as /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/modules/modules.tar
  112 15:43:40.958003  total size: 51872 (0MB)
  113 15:43:40.958065  Using unxz to decompress xz
  114 15:43:40.982690  progress  63% (0MB)
  115 15:43:40.987136  progress 100% (0MB)
  116 15:43:40.988910  0MB downloaded in 0.03s (1.60MB/s)
  117 15:43:40.989189  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 15:43:40.989464  end: 1.4 download-retry (duration 00:00:00) [common]
  120 15:43:40.989569  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 15:43:40.989674  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 15:43:43.020507  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300445/extract-nfsrootfs-i31ago1p
  123 15:43:43.020711  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 15:43:43.020812  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 15:43:43.020946  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo
  126 15:43:43.021043  makedir: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin
  127 15:43:43.021125  makedir: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/tests
  128 15:43:43.021204  makedir: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/results
  129 15:43:43.021298  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-add-keys
  130 15:43:43.021424  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-add-sources
  131 15:43:43.021547  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-background-process-start
  132 15:43:43.021663  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-background-process-stop
  133 15:43:43.021774  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-common-functions
  134 15:43:43.021880  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-echo-ipv4
  135 15:43:43.021987  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-install-packages
  136 15:43:43.022092  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-installed-packages
  137 15:43:43.022197  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-os-build
  138 15:43:43.022301  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-probe-channel
  139 15:43:43.022405  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-probe-ip
  140 15:43:43.022508  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-target-ip
  141 15:43:43.022615  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-target-mac
  142 15:43:43.022720  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-target-storage
  143 15:43:43.022826  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-case
  144 15:43:43.022933  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-event
  145 15:43:43.023037  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-feedback
  146 15:43:43.023141  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-raise
  147 15:43:43.023246  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-reference
  148 15:43:43.023350  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-runner
  149 15:43:43.023455  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-set
  150 15:43:43.023559  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-test-shell
  151 15:43:43.023666  Updating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-add-keys (debian)
  152 15:43:43.023773  Updating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-add-sources (debian)
  153 15:43:43.024057  Updating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-install-packages (debian)
  154 15:43:43.024166  Updating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-installed-packages (debian)
  155 15:43:43.024272  Updating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/bin/lava-os-build (debian)
  156 15:43:43.024363  Creating /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/environment
  157 15:43:43.024444  LAVA metadata
  158 15:43:43.024508  - LAVA_JOB_ID=7300445
  159 15:43:43.024569  - LAVA_DISPATCHER_IP=192.168.201.1
  160 15:43:43.024663  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 15:43:43.024728  skipped lava-vland-overlay
  162 15:43:43.024802  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 15:43:43.024882  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 15:43:43.024942  skipped lava-multinode-overlay
  165 15:43:43.025014  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 15:43:43.025091  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 15:43:43.025159  Loading test definitions
  168 15:43:43.025246  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 15:43:43.025318  Using /lava-7300445 at stage 0
  170 15:43:43.025537  uuid=7300445_1.5.2.3.1 testdef=None
  171 15:43:43.025623  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 15:43:43.025707  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 15:43:43.026108  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 15:43:43.026332  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 15:43:43.026821  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 15:43:43.027055  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 15:43:43.027505  runner path: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/0/tests/0_timesync-off test_uuid 7300445_1.5.2.3.1
  180 15:43:43.027649  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 15:43:43.027914  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 15:43:43.027988  Using /lava-7300445 at stage 0
  184 15:43:43.028081  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 15:43:43.028160  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/0/tests/1_kselftest-futex'
  186 15:43:45.573779  Running '/usr/bin/git checkout kernelci.org
  187 15:43:45.705491  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
  188 15:43:45.706158  uuid=7300445_1.5.2.3.5 testdef=None
  189 15:43:45.706314  end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
  191 15:43:45.706609  start: 1.5.2.3.6 test-overlay (timeout 00:09:47) [common]
  192 15:43:45.707338  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 15:43:45.707578  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:47) [common]
  195 15:43:45.708500  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 15:43:45.708793  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
  198 15:43:45.709671  runner path: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/0/tests/1_kselftest-futex test_uuid 7300445_1.5.2.3.5
  199 15:43:45.709760  BOARD='asus-C436FA-Flip-hatch'
  200 15:43:45.709827  BRANCH='cip-gitlab'
  201 15:43:45.709889  SKIPFILE='skipfile-lkft.yaml'
  202 15:43:45.709949  TESTPROG_URL='None'
  203 15:43:45.710008  TST_CASENAME=''
  204 15:43:45.710065  TST_CMDFILES='futex'
  205 15:43:45.710195  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 15:43:45.710404  Creating lava-test-runner.conf files
  208 15:43:45.710469  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300445/lava-overlay-76qnrnwo/lava-7300445/0 for stage 0
  209 15:43:45.710565  - 0_timesync-off
  210 15:43:45.710654  - 1_kselftest-futex
  211 15:43:45.710759  end: 1.5.2.3 test-definition (duration 00:00:03) [common]
  212 15:43:45.710848  start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
  213 15:43:52.827282  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 15:43:52.827436  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
  215 15:43:52.827534  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 15:43:52.827639  end: 1.5.2 lava-overlay (duration 00:00:10) [common]
  217 15:43:52.827735  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
  218 15:43:52.929671  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 15:43:52.930007  start: 1.5.4 extract-modules (timeout 00:09:40) [common]
  220 15:43:52.930118  extracting modules file /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300445/extract-nfsrootfs-i31ago1p
  221 15:43:52.934254  extracting modules file /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300445/extract-overlay-ramdisk-g7c__3sv/ramdisk
  222 15:43:52.938073  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 15:43:52.938190  start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
  224 15:43:52.938280  [common] Applying overlay to NFS
  225 15:43:52.938353  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300445/compress-overlay-nrmr752j/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300445/extract-nfsrootfs-i31ago1p
  226 15:43:53.384067  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 15:43:53.384233  start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
  228 15:43:53.384331  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 15:43:53.384423  start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
  230 15:43:53.384507  Building ramdisk /var/lib/lava/dispatcher/tmp/7300445/extract-overlay-ramdisk-g7c__3sv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300445/extract-overlay-ramdisk-g7c__3sv/ramdisk
  231 15:43:53.417260  >> 24431 blocks

  232 15:43:53.892435  rename /var/lib/lava/dispatcher/tmp/7300445/extract-overlay-ramdisk-g7c__3sv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
  233 15:43:53.892837  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 15:43:53.892959  start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
  235 15:43:53.893064  start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
  236 15:43:53.893159  No mkimage arch provided, not using FIT.
  237 15:43:53.893248  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 15:43:53.893334  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 15:43:53.893436  end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
  240 15:43:53.893524  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
  241 15:43:53.893599  No LXC device requested
  242 15:43:53.893684  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 15:43:53.893772  start: 1.7 deploy-device-env (timeout 00:09:39) [common]
  244 15:43:53.893853  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 15:43:53.893920  Checking files for TFTP limit of 4294967296 bytes.
  246 15:43:53.894324  end: 1 tftp-deploy (duration 00:00:21) [common]
  247 15:43:53.894429  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 15:43:53.894524  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 15:43:53.894658  substitutions:
  250 15:43:53.894727  - {DTB}: None
  251 15:43:53.894792  - {INITRD}: 7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
  252 15:43:53.894855  - {KERNEL}: 7300445/tftp-deploy-sjozjhb6/kernel/bzImage
  253 15:43:53.894915  - {LAVA_MAC}: None
  254 15:43:53.894974  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300445/extract-nfsrootfs-i31ago1p
  255 15:43:53.895033  - {NFS_SERVER_IP}: 192.168.201.1
  256 15:43:53.895091  - {PRESEED_CONFIG}: None
  257 15:43:53.895150  - {PRESEED_LOCAL}: None
  258 15:43:53.895207  - {RAMDISK}: 7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
  259 15:43:53.895264  - {ROOT_PART}: None
  260 15:43:53.895320  - {ROOT}: None
  261 15:43:53.895375  - {SERVER_IP}: 192.168.201.1
  262 15:43:53.895431  - {TEE}: None
  263 15:43:53.895487  Parsed boot commands:
  264 15:43:53.895542  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 15:43:53.895692  Parsed boot commands: tftpboot 192.168.201.1 7300445/tftp-deploy-sjozjhb6/kernel/bzImage 7300445/tftp-deploy-sjozjhb6/kernel/cmdline 7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
  266 15:43:53.895785  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 15:43:53.895880  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 15:43:53.895981  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 15:43:53.896091  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 15:43:53.896165  Not connected, no need to disconnect.
  271 15:43:53.896244  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 15:43:53.896347  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 15:43:53.896437  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 15:43:53.899066  Setting prompt string to ['lava-test: # ']
  275 15:43:53.899349  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 15:43:53.899465  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 15:43:53.899563  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 15:43:53.899672  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 15:43:53.899897  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 15:43:53.918298  >> Command sent successfully.

  281 15:43:53.920125  Returned 0 in 0 seconds
  282 15:43:54.021144  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 15:43:54.022415  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 15:43:54.022953  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 15:43:54.023452  Setting prompt string to 'Starting depthcharge on Helios...'
  287 15:43:54.023787  Changing prompt to 'Starting depthcharge on Helios...'
  288 15:43:54.024164  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 15:43:54.025304  [Enter `^Ec?' for help]
  290 15:44:00.455273  
  291 15:44:00.455805  
  292 15:44:00.464864  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 15:44:00.468457  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 15:44:00.475232  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 15:44:00.478362  CPU: AES supported, TXT NOT supported, VT supported
  296 15:44:00.485115  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 15:44:00.487908  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 15:44:00.494779  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 15:44:00.498057  VBOOT: Loading verstage.
  300 15:44:00.501347  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 15:44:00.508220  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 15:44:00.514941  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 15:44:00.515422  CBFS @ c08000 size 3f8000
  304 15:44:00.521597  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 15:44:00.524554  CBFS: Locating 'fallback/verstage'
  306 15:44:00.527813  CBFS: Found @ offset 10fb80 size 1072c
  307 15:44:00.531912  
  308 15:44:00.532365  
  309 15:44:00.542256  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 15:44:00.556091  Probing TPM: . done!
  311 15:44:00.559433  TPM ready after 0 ms
  312 15:44:00.563147  Connected to device vid:did:rid of 1ae0:0028:00
  313 15:44:00.572994  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 15:44:00.576923  Initialized TPM device CR50 revision 0
  315 15:44:00.612185  tlcl_send_startup: Startup return code is 0
  316 15:44:00.612508  TPM: setup succeeded
  317 15:44:00.624995  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 15:44:00.628496  Chrome EC: UHEPI supported
  319 15:44:00.632149  Phase 1
  320 15:44:00.635120  FMAP: area GBB found @ c05000 (12288 bytes)
  321 15:44:00.642301  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 15:44:00.645325  Phase 2
  323 15:44:00.645788  Phase 3
  324 15:44:00.648544  FMAP: area GBB found @ c05000 (12288 bytes)
  325 15:44:00.655425  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 15:44:00.661964  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  327 15:44:00.665013  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  328 15:44:00.671708  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 15:44:00.687706  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  330 15:44:00.690450  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  331 15:44:00.697315  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 15:44:00.701704  Phase 4
  333 15:44:00.705157  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  334 15:44:00.711351  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 15:44:00.891346  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 15:44:00.897936  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 15:44:00.898380  Saving nvdata
  338 15:44:00.901120  Reboot requested (10020007)
  339 15:44:00.904354  board_reset() called!
  340 15:44:00.904790  full_reset() called!
  341 15:44:05.421983  
  342 15:44:05.422124  
  343 15:44:05.431533  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 15:44:05.435015  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 15:44:05.441526  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 15:44:05.445195  CPU: AES supported, TXT NOT supported, VT supported
  347 15:44:05.451488  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 15:44:05.455159  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 15:44:05.461514  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 15:44:05.464802  VBOOT: Loading verstage.
  351 15:44:05.468315  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 15:44:05.474877  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 15:44:05.481647  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 15:44:05.481733  CBFS @ c08000 size 3f8000
  355 15:44:05.488444  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 15:44:05.491641  CBFS: Locating 'fallback/verstage'
  357 15:44:05.494942  CBFS: Found @ offset 10fb80 size 1072c
  358 15:44:05.498639  
  359 15:44:05.498723  
  360 15:44:05.508920  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 15:44:05.522881  Probing TPM: . done!
  362 15:44:05.526864  TPM ready after 0 ms
  363 15:44:05.529575  Connected to device vid:did:rid of 1ae0:0028:00
  364 15:44:05.539995  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 15:44:05.543476  Initialized TPM device CR50 revision 0
  366 15:44:05.579269  tlcl_send_startup: Startup return code is 0
  367 15:44:05.579361  TPM: setup succeeded
  368 15:44:05.591494  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 15:44:05.595406  Chrome EC: UHEPI supported
  370 15:44:05.598731  Phase 1
  371 15:44:05.601895  FMAP: area GBB found @ c05000 (12288 bytes)
  372 15:44:05.608638  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 15:44:05.615318  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 15:44:05.618645  Recovery requested (1009000e)
  375 15:44:05.624228  Saving nvdata
  376 15:44:05.630288  tlcl_extend: response is 0
  377 15:44:05.639603  tlcl_extend: response is 0
  378 15:44:05.646030  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 15:44:05.649592  CBFS @ c08000 size 3f8000
  380 15:44:05.656157  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 15:44:05.659842  CBFS: Locating 'fallback/romstage'
  382 15:44:05.663049  CBFS: Found @ offset 80 size 145fc
  383 15:44:05.666008  Accumulated console time in verstage 98 ms
  384 15:44:05.666093  
  385 15:44:05.666161  
  386 15:44:05.679358  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 15:44:05.686274  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 15:44:05.688876  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 15:44:05.692399  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 15:44:05.699050  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 15:44:05.702291  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 15:44:05.705430  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  393 15:44:05.709324  TCO_STS:   0000 0000
  394 15:44:05.712338  GEN_PMCON: e0015238 00000200
  395 15:44:05.715716  GBLRST_CAUSE: 00000000 00000000
  396 15:44:05.715801  prev_sleep_state 5
  397 15:44:05.719029  Boot Count incremented to 38739
  398 15:44:05.726318  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 15:44:05.729593  CBFS @ c08000 size 3f8000
  400 15:44:05.735648  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 15:44:05.735726  CBFS: Locating 'fspm.bin'
  402 15:44:05.742150  CBFS: Found @ offset 5ffc0 size 71000
  403 15:44:05.745623  Chrome EC: UHEPI supported
  404 15:44:05.752331  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 15:44:05.755757  Probing TPM:  done!
  406 15:44:05.762516  Connected to device vid:did:rid of 1ae0:0028:00
  407 15:44:05.772329  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 15:44:05.778560  Initialized TPM device CR50 revision 0
  409 15:44:05.787397  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 15:44:05.793951  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 15:44:05.797313  MRC cache found, size 1948
  412 15:44:05.800573  bootmode is set to: 2
  413 15:44:05.803987  PRMRR disabled by config.
  414 15:44:05.804069  SPD INDEX = 1
  415 15:44:05.810688  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 15:44:05.814305  CBFS @ c08000 size 3f8000
  417 15:44:05.820251  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 15:44:05.820328  CBFS: Locating 'spd.bin'
  419 15:44:05.823566  CBFS: Found @ offset 5fb80 size 400
  420 15:44:05.827291  SPD: module type is LPDDR3
  421 15:44:05.830346  SPD: module part is 
  422 15:44:05.837547  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 15:44:05.840636  SPD: device width 4 bits, bus width 8 bits
  424 15:44:05.843762  SPD: module size is 4096 MB (per channel)
  425 15:44:05.847066  memory slot: 0 configuration done.
  426 15:44:05.850842  memory slot: 2 configuration done.
  427 15:44:05.901518  CBMEM:
  428 15:44:05.904419  IMD: root @ 99fff000 254 entries.
  429 15:44:05.908125  IMD: root @ 99ffec00 62 entries.
  430 15:44:05.911011  External stage cache:
  431 15:44:05.914476  IMD: root @ 9abff000 254 entries.
  432 15:44:05.917817  IMD: root @ 9abfec00 62 entries.
  433 15:44:05.924210  Chrome EC: clear events_b mask to 0x0000000020004000
  434 15:44:05.937577  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 15:44:05.950450  tlcl_write: response is 0
  436 15:44:05.959595  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 15:44:05.966343  MRC: TPM MRC hash updated successfully.
  438 15:44:05.966427  2 DIMMs found
  439 15:44:05.969610  SMM Memory Map
  440 15:44:05.972983  SMRAM       : 0x9a000000 0x1000000
  441 15:44:05.976126   Subregion 0: 0x9a000000 0xa00000
  442 15:44:05.979592   Subregion 1: 0x9aa00000 0x200000
  443 15:44:05.982588   Subregion 2: 0x9ac00000 0x400000
  444 15:44:05.986432  top_of_ram = 0x9a000000
  445 15:44:05.989750  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 15:44:05.996229  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 15:44:05.999387  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 15:44:06.005802  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 15:44:06.009200  CBFS @ c08000 size 3f8000
  450 15:44:06.012742  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 15:44:06.015838  CBFS: Locating 'fallback/postcar'
  452 15:44:06.022283  CBFS: Found @ offset 107000 size 4b44
  453 15:44:06.025504  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 15:44:06.038392  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 15:44:06.042108  Processing 180 relocs. Offset value of 0x97c0c000
  456 15:44:06.050832  Accumulated console time in romstage 286 ms
  457 15:44:06.050917  
  458 15:44:06.050988  
  459 15:44:06.060091  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 15:44:06.066871  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 15:44:06.070181  CBFS @ c08000 size 3f8000
  462 15:44:06.073757  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 15:44:06.080097  CBFS: Locating 'fallback/ramstage'
  464 15:44:06.083798  CBFS: Found @ offset 43380 size 1b9e8
  465 15:44:06.090150  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 15:44:06.121883  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 15:44:06.124947  Processing 3976 relocs. Offset value of 0x98db0000
  468 15:44:06.131996  Accumulated console time in postcar 52 ms
  469 15:44:06.132081  
  470 15:44:06.132148  
  471 15:44:06.141948  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 15:44:06.148907  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 15:44:06.151736  WARNING: RO_VPD is uninitialized or empty.
  474 15:44:06.154985  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 15:44:06.161894  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 15:44:06.161980  Normal boot.
  477 15:44:06.168492  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 15:44:06.171916  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 15:44:06.175037  CBFS @ c08000 size 3f8000
  480 15:44:06.181921  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 15:44:06.185145  CBFS: Locating 'cpu_microcode_blob.bin'
  482 15:44:06.188076  CBFS: Found @ offset 14700 size 2ec00
  483 15:44:06.191507  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 15:44:06.194900  Skip microcode update
  485 15:44:06.197967  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 15:44:06.201417  CBFS @ c08000 size 3f8000
  487 15:44:06.208169  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 15:44:06.211328  CBFS: Locating 'fsps.bin'
  489 15:44:06.214844  CBFS: Found @ offset d1fc0 size 35000
  490 15:44:06.239810  Detected 4 core, 8 thread CPU.
  491 15:44:06.243533  Setting up SMI for CPU
  492 15:44:06.246765  IED base = 0x9ac00000
  493 15:44:06.246850  IED size = 0x00400000
  494 15:44:06.250447  Will perform SMM setup.
  495 15:44:06.256602  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 15:44:06.263560  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 15:44:06.266459  Processing 16 relocs. Offset value of 0x00030000
  498 15:44:06.270276  Attempting to start 7 APs
  499 15:44:06.273388  Waiting for 10ms after sending INIT.
  500 15:44:06.289575  Waiting for 1st SIPI to complete...done.
  501 15:44:06.289659  AP: slot 7 apic_id 7.
  502 15:44:06.292987  AP: slot 6 apic_id 6.
  503 15:44:06.296351  Waiting for 2nd SIPI to complete...done.
  504 15:44:06.299679  AP: slot 3 apic_id 1.
  505 15:44:06.302836  AP: slot 1 apic_id 3.
  506 15:44:06.302921  AP: slot 4 apic_id 2.
  507 15:44:06.306349  AP: slot 2 apic_id 5.
  508 15:44:06.309664  AP: slot 5 apic_id 4.
  509 15:44:06.316383  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 15:44:06.319803  Processing 13 relocs. Offset value of 0x00038000
  511 15:44:06.326448  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 15:44:06.333024  Installing SMM handler to 0x9a000000
  513 15:44:06.339705  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 15:44:06.343024  Processing 658 relocs. Offset value of 0x9a010000
  515 15:44:06.353128  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 15:44:06.356360  Processing 13 relocs. Offset value of 0x9a008000
  517 15:44:06.362854  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 15:44:06.369593  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 15:44:06.373075  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 15:44:06.379563  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 15:44:06.386034  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 15:44:06.392521  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 15:44:06.395635  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 15:44:06.402484  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 15:44:06.405946  Clearing SMI status registers
  526 15:44:06.409272  SMI_STS: PM1 
  527 15:44:06.409357  PM1_STS: PWRBTN 
  528 15:44:06.412477  TCO_STS: SECOND_TO 
  529 15:44:06.415841  New SMBASE 0x9a000000
  530 15:44:06.419167  In relocation handler: CPU 0
  531 15:44:06.422455  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 15:44:06.425624  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 15:44:06.429507  Relocation complete.
  534 15:44:06.432526  New SMBASE 0x99fff400
  535 15:44:06.432611  In relocation handler: CPU 3
  536 15:44:06.438882  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  537 15:44:06.442528  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 15:44:06.445980  Relocation complete.
  539 15:44:06.446064  New SMBASE 0x99ffec00
  540 15:44:06.449291  In relocation handler: CPU 5
  541 15:44:06.456127  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  542 15:44:06.459503  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 15:44:06.462726  Relocation complete.
  544 15:44:06.462810  New SMBASE 0x99fff800
  545 15:44:06.465838  In relocation handler: CPU 2
  546 15:44:06.469216  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  547 15:44:06.476040  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 15:44:06.479311  Relocation complete.
  549 15:44:06.479394  New SMBASE 0x99ffe800
  550 15:44:06.482465  In relocation handler: CPU 6
  551 15:44:06.485845  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  552 15:44:06.492497  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 15:44:06.495708  Relocation complete.
  554 15:44:06.495792  New SMBASE 0x99ffe400
  555 15:44:06.498841  In relocation handler: CPU 7
  556 15:44:06.502426  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  557 15:44:06.509470  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 15:44:06.509554  Relocation complete.
  559 15:44:06.512450  New SMBASE 0x99fffc00
  560 15:44:06.515687  In relocation handler: CPU 1
  561 15:44:06.519390  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  562 15:44:06.525693  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 15:44:06.525778  Relocation complete.
  564 15:44:06.529312  New SMBASE 0x99fff000
  565 15:44:06.532253  In relocation handler: CPU 4
  566 15:44:06.535708  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  567 15:44:06.542113  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 15:44:06.542198  Relocation complete.
  569 15:44:06.545645  Initializing CPU #0
  570 15:44:06.548988  CPU: vendor Intel device 806ec
  571 15:44:06.552419  CPU: family 06, model 8e, stepping 0c
  572 15:44:06.555684  Clearing out pending MCEs
  573 15:44:06.558692  Setting up local APIC...
  574 15:44:06.558776   apic_id: 0x00 done.
  575 15:44:06.562437  Turbo is available but hidden
  576 15:44:06.565360  Turbo is available and visible
  577 15:44:06.568715  VMX status: enabled
  578 15:44:06.572203  IA32_FEATURE_CONTROL status: locked
  579 15:44:06.575650  Skip microcode update
  580 15:44:06.575734  CPU #0 initialized
  581 15:44:06.578660  Initializing CPU #3
  582 15:44:06.578745  Initializing CPU #7
  583 15:44:06.582092  Initializing CPU #6
  584 15:44:06.585521  CPU: vendor Intel device 806ec
  585 15:44:06.589107  CPU: family 06, model 8e, stepping 0c
  586 15:44:06.592253  CPU: vendor Intel device 806ec
  587 15:44:06.595976  CPU: family 06, model 8e, stepping 0c
  588 15:44:06.598841  Clearing out pending MCEs
  589 15:44:06.602617  Clearing out pending MCEs
  590 15:44:06.602704  Setting up local APIC...
  591 15:44:06.605707  Initializing CPU #4
  592 15:44:06.608581  CPU: vendor Intel device 806ec
  593 15:44:06.612119  CPU: family 06, model 8e, stepping 0c
  594 15:44:06.615308  Clearing out pending MCEs
  595 15:44:06.618920  Initializing CPU #5
  596 15:44:06.619005  Initializing CPU #2
  597 15:44:06.621877  CPU: vendor Intel device 806ec
  598 15:44:06.625705  CPU: family 06, model 8e, stepping 0c
  599 15:44:06.628818  CPU: vendor Intel device 806ec
  600 15:44:06.631996  CPU: family 06, model 8e, stepping 0c
  601 15:44:06.635265  Clearing out pending MCEs
  602 15:44:06.638809  Clearing out pending MCEs
  603 15:44:06.641980  Initializing CPU #1
  604 15:44:06.645059  CPU: vendor Intel device 806ec
  605 15:44:06.648679  CPU: family 06, model 8e, stepping 0c
  606 15:44:06.651947  CPU: vendor Intel device 806ec
  607 15:44:06.655005  CPU: family 06, model 8e, stepping 0c
  608 15:44:06.658789  Clearing out pending MCEs
  609 15:44:06.658874  Clearing out pending MCEs
  610 15:44:06.661895  Setting up local APIC...
  611 15:44:06.664964   apic_id: 0x06 done.
  612 15:44:06.668180  Setting up local APIC...
  613 15:44:06.668264  Setting up local APIC...
  614 15:44:06.671831  Setting up local APIC...
  615 15:44:06.675223   apic_id: 0x03 done.
  616 15:44:06.675307  Setting up local APIC...
  617 15:44:06.678721  VMX status: enabled
  618 15:44:06.681709   apic_id: 0x07 done.
  619 15:44:06.684977  IA32_FEATURE_CONTROL status: locked
  620 15:44:06.685061  VMX status: enabled
  621 15:44:06.688469  Skip microcode update
  622 15:44:06.691305  IA32_FEATURE_CONTROL status: locked
  623 15:44:06.694741  CPU #6 initialized
  624 15:44:06.694825  Skip microcode update
  625 15:44:06.698096   apic_id: 0x05 done.
  626 15:44:06.701696  Setting up local APIC...
  627 15:44:06.704733   apic_id: 0x01 done.
  628 15:44:06.704817  CPU #7 initialized
  629 15:44:06.708067  VMX status: enabled
  630 15:44:06.708175  VMX status: enabled
  631 15:44:06.711610   apic_id: 0x04 done.
  632 15:44:06.714771  IA32_FEATURE_CONTROL status: locked
  633 15:44:06.718297  VMX status: enabled
  634 15:44:06.718375  Skip microcode update
  635 15:44:06.721695  IA32_FEATURE_CONTROL status: locked
  636 15:44:06.724858  CPU #2 initialized
  637 15:44:06.728055  Skip microcode update
  638 15:44:06.728140   apic_id: 0x02 done.
  639 15:44:06.731475  VMX status: enabled
  640 15:44:06.734659  VMX status: enabled
  641 15:44:06.738184  IA32_FEATURE_CONTROL status: locked
  642 15:44:06.741428  IA32_FEATURE_CONTROL status: locked
  643 15:44:06.741512  Skip microcode update
  644 15:44:06.745025  Skip microcode update
  645 15:44:06.748439  CPU #1 initialized
  646 15:44:06.748523  CPU #4 initialized
  647 15:44:06.751609  IA32_FEATURE_CONTROL status: locked
  648 15:44:06.754893  CPU #5 initialized
  649 15:44:06.758066  Skip microcode update
  650 15:44:06.758149  CPU #3 initialized
  651 15:44:06.761356  bsp_do_flight_plan done after 463 msecs.
  652 15:44:06.765003  CPU: frequency set to 4200 MHz
  653 15:44:06.768194  Enabling SMIs.
  654 15:44:06.768278  Locking SMM.
  655 15:44:06.783700  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 15:44:06.787099  CBFS @ c08000 size 3f8000
  657 15:44:06.793494  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 15:44:06.793579  CBFS: Locating 'vbt.bin'
  659 15:44:06.797107  CBFS: Found @ offset 5f5c0 size 499
  660 15:44:06.803995  Found a VBT of 4608 bytes after decompression
  661 15:44:06.986382  Display FSP Version Info HOB
  662 15:44:06.989509  Reference Code - CPU = 9.0.1e.30
  663 15:44:06.993133  uCode Version = 0.0.0.ca
  664 15:44:06.996292  TXT ACM version = ff.ff.ff.ffff
  665 15:44:06.999589  Display FSP Version Info HOB
  666 15:44:07.002636  Reference Code - ME = 9.0.1e.30
  667 15:44:07.006072  MEBx version = 0.0.0.0
  668 15:44:07.009574  ME Firmware Version = Consumer SKU
  669 15:44:07.012606  Display FSP Version Info HOB
  670 15:44:07.016052  Reference Code - CML PCH = 9.0.1e.30
  671 15:44:07.016136  PCH-CRID Status = Disabled
  672 15:44:07.022553  PCH-CRID Original Value = ff.ff.ff.ffff
  673 15:44:07.025980  PCH-CRID New Value = ff.ff.ff.ffff
  674 15:44:07.029573  OPROM - RST - RAID = ff.ff.ff.ffff
  675 15:44:07.032488  ChipsetInit Base Version = ff.ff.ff.ffff
  676 15:44:07.036012  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 15:44:07.039646  Display FSP Version Info HOB
  678 15:44:07.045934  Reference Code - SA - System Agent = 9.0.1e.30
  679 15:44:07.049088  Reference Code - MRC = 0.7.1.6c
  680 15:44:07.049172  SA - PCIe Version = 9.0.1e.30
  681 15:44:07.052501  SA-CRID Status = Disabled
  682 15:44:07.055686  SA-CRID Original Value = 0.0.0.c
  683 15:44:07.059127  SA-CRID New Value = 0.0.0.c
  684 15:44:07.062303  OPROM - VBIOS = ff.ff.ff.ffff
  685 15:44:07.065893  RTC Init
  686 15:44:07.069053  Set power on after power failure.
  687 15:44:07.069138  Disabling Deep S3
  688 15:44:07.072331  Disabling Deep S3
  689 15:44:07.072420  Disabling Deep S4
  690 15:44:07.075786  Disabling Deep S4
  691 15:44:07.075909  Disabling Deep S5
  692 15:44:07.078998  Disabling Deep S5
  693 15:44:07.085488  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
  694 15:44:07.085573  Enumerating buses...
  695 15:44:07.092373  Show all devs... Before device enumeration.
  696 15:44:07.092457  Root Device: enabled 1
  697 15:44:07.095354  CPU_CLUSTER: 0: enabled 1
  698 15:44:07.098819  DOMAIN: 0000: enabled 1
  699 15:44:07.102204  APIC: 00: enabled 1
  700 15:44:07.102289  PCI: 00:00.0: enabled 1
  701 15:44:07.105812  PCI: 00:02.0: enabled 1
  702 15:44:07.108666  PCI: 00:04.0: enabled 0
  703 15:44:07.112339  PCI: 00:05.0: enabled 0
  704 15:44:07.112425  PCI: 00:12.0: enabled 1
  705 15:44:07.115599  PCI: 00:12.5: enabled 0
  706 15:44:07.118805  PCI: 00:12.6: enabled 0
  707 15:44:07.118890  PCI: 00:14.0: enabled 1
  708 15:44:07.122147  PCI: 00:14.1: enabled 0
  709 15:44:07.125319  PCI: 00:14.3: enabled 1
  710 15:44:07.129090  PCI: 00:14.5: enabled 0
  711 15:44:07.129174  PCI: 00:15.0: enabled 1
  712 15:44:07.132054  PCI: 00:15.1: enabled 1
  713 15:44:07.135411  PCI: 00:15.2: enabled 0
  714 15:44:07.138879  PCI: 00:15.3: enabled 0
  715 15:44:07.138963  PCI: 00:16.0: enabled 1
  716 15:44:07.142003  PCI: 00:16.1: enabled 0
  717 15:44:07.145645  PCI: 00:16.2: enabled 0
  718 15:44:07.148651  PCI: 00:16.3: enabled 0
  719 15:44:07.148735  PCI: 00:16.4: enabled 0
  720 15:44:07.151826  PCI: 00:16.5: enabled 0
  721 15:44:07.155559  PCI: 00:17.0: enabled 1
  722 15:44:07.155642  PCI: 00:19.0: enabled 1
  723 15:44:07.158632  PCI: 00:19.1: enabled 0
  724 15:44:07.161928  PCI: 00:19.2: enabled 0
  725 15:44:07.165329  PCI: 00:1a.0: enabled 0
  726 15:44:07.165413  PCI: 00:1c.0: enabled 0
  727 15:44:07.168359  PCI: 00:1c.1: enabled 0
  728 15:44:07.172261  PCI: 00:1c.2: enabled 0
  729 15:44:07.175194  PCI: 00:1c.3: enabled 0
  730 15:44:07.175279  PCI: 00:1c.4: enabled 0
  731 15:44:07.178344  PCI: 00:1c.5: enabled 0
  732 15:44:07.181645  PCI: 00:1c.6: enabled 0
  733 15:44:07.185239  PCI: 00:1c.7: enabled 0
  734 15:44:07.185322  PCI: 00:1d.0: enabled 1
  735 15:44:07.188671  PCI: 00:1d.1: enabled 0
  736 15:44:07.191808  PCI: 00:1d.2: enabled 0
  737 15:44:07.191931  PCI: 00:1d.3: enabled 0
  738 15:44:07.195121  PCI: 00:1d.4: enabled 0
  739 15:44:07.198461  PCI: 00:1d.5: enabled 1
  740 15:44:07.201669  PCI: 00:1e.0: enabled 1
  741 15:44:07.201753  PCI: 00:1e.1: enabled 0
  742 15:44:07.204912  PCI: 00:1e.2: enabled 1
  743 15:44:07.208263  PCI: 00:1e.3: enabled 1
  744 15:44:07.211541  PCI: 00:1f.0: enabled 1
  745 15:44:07.211625  PCI: 00:1f.1: enabled 1
  746 15:44:07.215012  PCI: 00:1f.2: enabled 1
  747 15:44:07.218184  PCI: 00:1f.3: enabled 1
  748 15:44:07.222038  PCI: 00:1f.4: enabled 1
  749 15:44:07.222122  PCI: 00:1f.5: enabled 1
  750 15:44:07.224888  PCI: 00:1f.6: enabled 0
  751 15:44:07.228274  USB0 port 0: enabled 1
  752 15:44:07.228358  I2C: 00:15: enabled 1
  753 15:44:07.231733  I2C: 00:5d: enabled 1
  754 15:44:07.234737  GENERIC: 0.0: enabled 1
  755 15:44:07.234821  I2C: 00:1a: enabled 1
  756 15:44:07.237986  I2C: 00:38: enabled 1
  757 15:44:07.241304  I2C: 00:39: enabled 1
  758 15:44:07.241389  I2C: 00:3a: enabled 1
  759 15:44:07.244933  I2C: 00:3b: enabled 1
  760 15:44:07.248184  PCI: 00:00.0: enabled 1
  761 15:44:07.248268  SPI: 00: enabled 1
  762 15:44:07.251277  SPI: 01: enabled 1
  763 15:44:07.254824  PNP: 0c09.0: enabled 1
  764 15:44:07.254909  USB2 port 0: enabled 1
  765 15:44:07.258086  USB2 port 1: enabled 1
  766 15:44:07.261572  USB2 port 2: enabled 0
  767 15:44:07.264554  USB2 port 3: enabled 0
  768 15:44:07.264638  USB2 port 5: enabled 0
  769 15:44:07.268053  USB2 port 6: enabled 1
  770 15:44:07.271221  USB2 port 9: enabled 1
  771 15:44:07.271304  USB3 port 0: enabled 1
  772 15:44:07.274862  USB3 port 1: enabled 1
  773 15:44:07.278045  USB3 port 2: enabled 1
  774 15:44:07.281356  USB3 port 3: enabled 1
  775 15:44:07.281439  USB3 port 4: enabled 0
  776 15:44:07.284599  APIC: 03: enabled 1
  777 15:44:07.284683  APIC: 05: enabled 1
  778 15:44:07.287935  APIC: 01: enabled 1
  779 15:44:07.291029  APIC: 02: enabled 1
  780 15:44:07.291113  APIC: 04: enabled 1
  781 15:44:07.294806  APIC: 06: enabled 1
  782 15:44:07.297859  APIC: 07: enabled 1
  783 15:44:07.297942  Compare with tree...
  784 15:44:07.301324  Root Device: enabled 1
  785 15:44:07.304614   CPU_CLUSTER: 0: enabled 1
  786 15:44:07.304699    APIC: 00: enabled 1
  787 15:44:07.307710    APIC: 03: enabled 1
  788 15:44:07.311283    APIC: 05: enabled 1
  789 15:44:07.311368    APIC: 01: enabled 1
  790 15:44:07.314184    APIC: 02: enabled 1
  791 15:44:07.317939    APIC: 04: enabled 1
  792 15:44:07.318023    APIC: 06: enabled 1
  793 15:44:07.320961    APIC: 07: enabled 1
  794 15:44:07.324128   DOMAIN: 0000: enabled 1
  795 15:44:07.327561    PCI: 00:00.0: enabled 1
  796 15:44:07.327645    PCI: 00:02.0: enabled 1
  797 15:44:07.330977    PCI: 00:04.0: enabled 0
  798 15:44:07.334175    PCI: 00:05.0: enabled 0
  799 15:44:07.337430    PCI: 00:12.0: enabled 1
  800 15:44:07.340833    PCI: 00:12.5: enabled 0
  801 15:44:07.340917    PCI: 00:12.6: enabled 0
  802 15:44:07.343920    PCI: 00:14.0: enabled 1
  803 15:44:07.347737     USB0 port 0: enabled 1
  804 15:44:07.350811      USB2 port 0: enabled 1
  805 15:44:07.354260      USB2 port 1: enabled 1
  806 15:44:07.354344      USB2 port 2: enabled 0
  807 15:44:07.357705      USB2 port 3: enabled 0
  808 15:44:07.361323      USB2 port 5: enabled 0
  809 15:44:07.364170      USB2 port 6: enabled 1
  810 15:44:07.367419      USB2 port 9: enabled 1
  811 15:44:07.370807      USB3 port 0: enabled 1
  812 15:44:07.370891      USB3 port 1: enabled 1
  813 15:44:07.374328      USB3 port 2: enabled 1
  814 15:44:07.377373      USB3 port 3: enabled 1
  815 15:44:07.380775      USB3 port 4: enabled 0
  816 15:44:07.383807    PCI: 00:14.1: enabled 0
  817 15:44:07.383928    PCI: 00:14.3: enabled 1
  818 15:44:07.387276    PCI: 00:14.5: enabled 0
  819 15:44:07.390956    PCI: 00:15.0: enabled 1
  820 15:44:07.394046     I2C: 00:15: enabled 1
  821 15:44:07.397215    PCI: 00:15.1: enabled 1
  822 15:44:07.397300     I2C: 00:5d: enabled 1
  823 15:44:07.400682     GENERIC: 0.0: enabled 1
  824 15:44:07.403686    PCI: 00:15.2: enabled 0
  825 15:44:07.407361    PCI: 00:15.3: enabled 0
  826 15:44:07.410952    PCI: 00:16.0: enabled 1
  827 15:44:07.411035    PCI: 00:16.1: enabled 0
  828 15:44:07.413887    PCI: 00:16.2: enabled 0
  829 15:44:07.417209    PCI: 00:16.3: enabled 0
  830 15:44:07.420255    PCI: 00:16.4: enabled 0
  831 15:44:07.420337    PCI: 00:16.5: enabled 0
  832 15:44:07.423735    PCI: 00:17.0: enabled 1
  833 15:44:07.427044    PCI: 00:19.0: enabled 1
  834 15:44:07.430735     I2C: 00:1a: enabled 1
  835 15:44:07.433858     I2C: 00:38: enabled 1
  836 15:44:07.433943     I2C: 00:39: enabled 1
  837 15:44:07.437093     I2C: 00:3a: enabled 1
  838 15:44:07.440212     I2C: 00:3b: enabled 1
  839 15:44:07.443401    PCI: 00:19.1: enabled 0
  840 15:44:07.443485    PCI: 00:19.2: enabled 0
  841 15:44:07.447058    PCI: 00:1a.0: enabled 0
  842 15:44:07.450246    PCI: 00:1c.0: enabled 0
  843 15:44:07.453418    PCI: 00:1c.1: enabled 0
  844 15:44:07.457321    PCI: 00:1c.2: enabled 0
  845 15:44:07.457405    PCI: 00:1c.3: enabled 0
  846 15:44:07.460537    PCI: 00:1c.4: enabled 0
  847 15:44:07.463363    PCI: 00:1c.5: enabled 0
  848 15:44:07.466673    PCI: 00:1c.6: enabled 0
  849 15:44:07.470346    PCI: 00:1c.7: enabled 0
  850 15:44:07.470430    PCI: 00:1d.0: enabled 1
  851 15:44:07.473474    PCI: 00:1d.1: enabled 0
  852 15:44:07.476676    PCI: 00:1d.2: enabled 0
  853 15:44:07.480256    PCI: 00:1d.3: enabled 0
  854 15:44:07.483338    PCI: 00:1d.4: enabled 0
  855 15:44:07.483423    PCI: 00:1d.5: enabled 1
  856 15:44:07.486523     PCI: 00:00.0: enabled 1
  857 15:44:07.489988    PCI: 00:1e.0: enabled 1
  858 15:44:07.493199    PCI: 00:1e.1: enabled 0
  859 15:44:07.496737    PCI: 00:1e.2: enabled 1
  860 15:44:07.496822     SPI: 00: enabled 1
  861 15:44:07.499772    PCI: 00:1e.3: enabled 1
  862 15:44:07.503185     SPI: 01: enabled 1
  863 15:44:07.506584    PCI: 00:1f.0: enabled 1
  864 15:44:07.506668     PNP: 0c09.0: enabled 1
  865 15:44:07.509806    PCI: 00:1f.1: enabled 1
  866 15:44:07.513294    PCI: 00:1f.2: enabled 1
  867 15:44:07.516480    PCI: 00:1f.3: enabled 1
  868 15:44:07.516564    PCI: 00:1f.4: enabled 1
  869 15:44:07.519788    PCI: 00:1f.5: enabled 1
  870 15:44:07.523230    PCI: 00:1f.6: enabled 0
  871 15:44:07.526560  Root Device scanning...
  872 15:44:07.529992  scan_static_bus for Root Device
  873 15:44:07.532961  CPU_CLUSTER: 0 enabled
  874 15:44:07.533053  DOMAIN: 0000 enabled
  875 15:44:07.536205  DOMAIN: 0000 scanning...
  876 15:44:07.540002  PCI: pci_scan_bus for bus 00
  877 15:44:07.543374  PCI: 00:00.0 [8086/0000] ops
  878 15:44:07.546194  PCI: 00:00.0 [8086/9b61] enabled
  879 15:44:07.549614  PCI: 00:02.0 [8086/0000] bus ops
  880 15:44:07.553008  PCI: 00:02.0 [8086/9b41] enabled
  881 15:44:07.556562  PCI: 00:04.0 [8086/1903] disabled
  882 15:44:07.559772  PCI: 00:08.0 [8086/1911] enabled
  883 15:44:07.562970  PCI: 00:12.0 [8086/02f9] enabled
  884 15:44:07.566502  PCI: 00:14.0 [8086/0000] bus ops
  885 15:44:07.570205  PCI: 00:14.0 [8086/02ed] enabled
  886 15:44:07.573141  PCI: 00:14.2 [8086/02ef] enabled
  887 15:44:07.576448  PCI: 00:14.3 [8086/02f0] enabled
  888 15:44:07.580140  PCI: 00:15.0 [8086/0000] bus ops
  889 15:44:07.583177  PCI: 00:15.0 [8086/02e8] enabled
  890 15:44:07.586569  PCI: 00:15.1 [8086/0000] bus ops
  891 15:44:07.590069  PCI: 00:15.1 [8086/02e9] enabled
  892 15:44:07.593122  PCI: 00:16.0 [8086/0000] ops
  893 15:44:07.596637  PCI: 00:16.0 [8086/02e0] enabled
  894 15:44:07.599722  PCI: 00:17.0 [8086/0000] ops
  895 15:44:07.603419  PCI: 00:17.0 [8086/02d3] enabled
  896 15:44:07.606648  PCI: 00:19.0 [8086/0000] bus ops
  897 15:44:07.609967  PCI: 00:19.0 [8086/02c5] enabled
  898 15:44:07.612647  PCI: 00:1d.0 [8086/0000] bus ops
  899 15:44:07.616150  PCI: 00:1d.0 [8086/02b0] enabled
  900 15:44:07.619286  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 15:44:07.623110  PCI: 00:1e.0 [8086/0000] ops
  902 15:44:07.626115  PCI: 00:1e.0 [8086/02a8] enabled
  903 15:44:07.629271  PCI: 00:1e.2 [8086/0000] bus ops
  904 15:44:07.632949  PCI: 00:1e.2 [8086/02aa] enabled
  905 15:44:07.636144  PCI: 00:1e.3 [8086/0000] bus ops
  906 15:44:07.639477  PCI: 00:1e.3 [8086/02ab] enabled
  907 15:44:07.642710  PCI: 00:1f.0 [8086/0000] bus ops
  908 15:44:07.646006  PCI: 00:1f.0 [8086/0284] enabled
  909 15:44:07.652655  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 15:44:07.659297  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 15:44:07.662549  PCI: 00:1f.3 [8086/0000] bus ops
  912 15:44:07.666066  PCI: 00:1f.3 [8086/02c8] enabled
  913 15:44:07.669148  PCI: 00:1f.4 [8086/0000] bus ops
  914 15:44:07.672551  PCI: 00:1f.4 [8086/02a3] enabled
  915 15:44:07.675920  PCI: 00:1f.5 [8086/0000] bus ops
  916 15:44:07.679832  PCI: 00:1f.5 [8086/02a4] enabled
  917 15:44:07.682613  PCI: Leftover static devices:
  918 15:44:07.682691  PCI: 00:05.0
  919 15:44:07.682753  PCI: 00:12.5
  920 15:44:07.685936  PCI: 00:12.6
  921 15:44:07.686009  PCI: 00:14.1
  922 15:44:07.689831  PCI: 00:14.5
  923 15:44:07.689901  PCI: 00:15.2
  924 15:44:07.689961  PCI: 00:15.3
  925 15:44:07.692547  PCI: 00:16.1
  926 15:44:07.692617  PCI: 00:16.2
  927 15:44:07.696167  PCI: 00:16.3
  928 15:44:07.696241  PCI: 00:16.4
  929 15:44:07.696305  PCI: 00:16.5
  930 15:44:07.698942  PCI: 00:19.1
  931 15:44:07.699019  PCI: 00:19.2
  932 15:44:07.702850  PCI: 00:1a.0
  933 15:44:07.702927  PCI: 00:1c.0
  934 15:44:07.705858  PCI: 00:1c.1
  935 15:44:07.705936  PCI: 00:1c.2
  936 15:44:07.706001  PCI: 00:1c.3
  937 15:44:07.709219  PCI: 00:1c.4
  938 15:44:07.709308  PCI: 00:1c.5
  939 15:44:07.712475  PCI: 00:1c.6
  940 15:44:07.712559  PCI: 00:1c.7
  941 15:44:07.712626  PCI: 00:1d.1
  942 15:44:07.715653  PCI: 00:1d.2
  943 15:44:07.715736  PCI: 00:1d.3
  944 15:44:07.718880  PCI: 00:1d.4
  945 15:44:07.718964  PCI: 00:1d.5
  946 15:44:07.719031  PCI: 00:1e.1
  947 15:44:07.722986  PCI: 00:1f.1
  948 15:44:07.723069  PCI: 00:1f.2
  949 15:44:07.726277  PCI: 00:1f.6
  950 15:44:07.728885  PCI: Check your devicetree.cb.
  951 15:44:07.728969  PCI: 00:02.0 scanning...
  952 15:44:07.735728  scan_generic_bus for PCI: 00:02.0
  953 15:44:07.739132  scan_generic_bus for PCI: 00:02.0 done
  954 15:44:07.742246  scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
  955 15:44:07.745438  PCI: 00:14.0 scanning...
  956 15:44:07.748801  scan_static_bus for PCI: 00:14.0
  957 15:44:07.752506  USB0 port 0 enabled
  958 15:44:07.755373  USB0 port 0 scanning...
  959 15:44:07.758691  scan_static_bus for USB0 port 0
  960 15:44:07.758777  USB2 port 0 enabled
  961 15:44:07.762353  USB2 port 1 enabled
  962 15:44:07.765266  USB2 port 2 disabled
  963 15:44:07.765351  USB2 port 3 disabled
  964 15:44:07.768895  USB2 port 5 disabled
  965 15:44:07.768980  USB2 port 6 enabled
  966 15:44:07.771876  USB2 port 9 enabled
  967 15:44:07.775149  USB3 port 0 enabled
  968 15:44:07.775223  USB3 port 1 enabled
  969 15:44:07.778893  USB3 port 2 enabled
  970 15:44:07.782017  USB3 port 3 enabled
  971 15:44:07.782090  USB3 port 4 disabled
  972 15:44:07.785192  USB2 port 0 scanning...
  973 15:44:07.788660  scan_static_bus for USB2 port 0
  974 15:44:07.792123  scan_static_bus for USB2 port 0 done
  975 15:44:07.798383  scan_bus: scanning of bus USB2 port 0 took 9694 usecs
  976 15:44:07.798465  USB2 port 1 scanning...
  977 15:44:07.801808  scan_static_bus for USB2 port 1
  978 15:44:07.808702  scan_static_bus for USB2 port 1 done
  979 15:44:07.812034  scan_bus: scanning of bus USB2 port 1 took 9702 usecs
  980 15:44:07.815479  USB2 port 6 scanning...
  981 15:44:07.818667  scan_static_bus for USB2 port 6
  982 15:44:07.821745  scan_static_bus for USB2 port 6 done
  983 15:44:07.828436  scan_bus: scanning of bus USB2 port 6 took 9704 usecs
  984 15:44:07.828516  USB2 port 9 scanning...
  985 15:44:07.832237  scan_static_bus for USB2 port 9
  986 15:44:07.838514  scan_static_bus for USB2 port 9 done
  987 15:44:07.842118  scan_bus: scanning of bus USB2 port 9 took 9702 usecs
  988 15:44:07.844961  USB3 port 0 scanning...
  989 15:44:07.848533  scan_static_bus for USB3 port 0
  990 15:44:07.851774  scan_static_bus for USB3 port 0 done
  991 15:44:07.858533  scan_bus: scanning of bus USB3 port 0 took 9706 usecs
  992 15:44:07.858620  USB3 port 1 scanning...
  993 15:44:07.861723  scan_static_bus for USB3 port 1
  994 15:44:07.868770  scan_static_bus for USB3 port 1 done
  995 15:44:07.871753  scan_bus: scanning of bus USB3 port 1 took 9694 usecs
  996 15:44:07.875226  USB3 port 2 scanning...
  997 15:44:07.878671  scan_static_bus for USB3 port 2
  998 15:44:07.881804  scan_static_bus for USB3 port 2 done
  999 15:44:07.888162  scan_bus: scanning of bus USB3 port 2 took 9702 usecs
 1000 15:44:07.888245  USB3 port 3 scanning...
 1001 15:44:07.891822  scan_static_bus for USB3 port 3
 1002 15:44:07.898408  scan_static_bus for USB3 port 3 done
 1003 15:44:07.901924  scan_bus: scanning of bus USB3 port 3 took 9693 usecs
 1004 15:44:07.905162  scan_static_bus for USB0 port 0 done
 1005 15:44:07.911760  scan_bus: scanning of bus USB0 port 0 took 155325 usecs
 1006 15:44:07.915444  scan_static_bus for PCI: 00:14.0 done
 1007 15:44:07.922115  scan_bus: scanning of bus PCI: 00:14.0 took 172939 usecs
 1008 15:44:07.925491  PCI: 00:15.0 scanning...
 1009 15:44:07.928747  scan_generic_bus for PCI: 00:15.0
 1010 15:44:07.931828  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 15:44:07.935354  scan_generic_bus for PCI: 00:15.0 done
 1012 15:44:07.941626  scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
 1013 15:44:07.945011  PCI: 00:15.1 scanning...
 1014 15:44:07.948151  scan_generic_bus for PCI: 00:15.1
 1015 15:44:07.951477  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 15:44:07.954753  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 15:44:07.958277  scan_generic_bus for PCI: 00:15.1 done
 1018 15:44:07.964807  scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
 1019 15:44:07.968143  PCI: 00:19.0 scanning...
 1020 15:44:07.971876  scan_generic_bus for PCI: 00:19.0
 1021 15:44:07.974787  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 15:44:07.977930  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 15:44:07.984791  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 15:44:07.988179  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 15:44:07.991453  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 15:44:07.994621  scan_generic_bus for PCI: 00:19.0 done
 1027 15:44:08.001345  scan_bus: scanning of bus PCI: 00:19.0 took 30709 usecs
 1028 15:44:08.004591  PCI: 00:1d.0 scanning...
 1029 15:44:08.007566  do_pci_scan_bridge for PCI: 00:1d.0
 1030 15:44:08.011215  PCI: pci_scan_bus for bus 01
 1031 15:44:08.014360  PCI: 01:00.0 [1c5c/1327] enabled
 1032 15:44:08.017601  Enabling Common Clock Configuration
 1033 15:44:08.021278  L1 Sub-State supported from root port 29
 1034 15:44:08.024676  L1 Sub-State Support = 0xf
 1035 15:44:08.028154  CommonModeRestoreTime = 0x28
 1036 15:44:08.031186  Power On Value = 0x16, Power On Scale = 0x0
 1037 15:44:08.034058  ASPM: Enabled L1
 1038 15:44:08.037775  scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
 1039 15:44:08.040952  PCI: 00:1e.2 scanning...
 1040 15:44:08.044161  scan_generic_bus for PCI: 00:1e.2
 1041 15:44:08.051123  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 15:44:08.054187  scan_generic_bus for PCI: 00:1e.2 done
 1043 15:44:08.057568  scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
 1044 15:44:08.060584  PCI: 00:1e.3 scanning...
 1045 15:44:08.063908  scan_generic_bus for PCI: 00:1e.3
 1046 15:44:08.067306  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 15:44:08.073930  scan_generic_bus for PCI: 00:1e.3 done
 1048 15:44:08.077467  scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
 1049 15:44:08.080587  PCI: 00:1f.0 scanning...
 1050 15:44:08.084071  scan_static_bus for PCI: 00:1f.0
 1051 15:44:08.087505  PNP: 0c09.0 enabled
 1052 15:44:08.090745  scan_static_bus for PCI: 00:1f.0 done
 1053 15:44:08.097364  scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
 1054 15:44:08.097449  PCI: 00:1f.3 scanning...
 1055 15:44:08.103736  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
 1056 15:44:08.107158  PCI: 00:1f.4 scanning...
 1057 15:44:08.111157  scan_generic_bus for PCI: 00:1f.4
 1058 15:44:08.113846  scan_generic_bus for PCI: 00:1f.4 done
 1059 15:44:08.120751  scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
 1060 15:44:08.120839  PCI: 00:1f.5 scanning...
 1061 15:44:08.127474  scan_generic_bus for PCI: 00:1f.5
 1062 15:44:08.130793  scan_generic_bus for PCI: 00:1f.5 done
 1063 15:44:08.134044  scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
 1064 15:44:08.140882  scan_bus: scanning of bus DOMAIN: 0000 took 604843 usecs
 1065 15:44:08.144052  scan_static_bus for Root Device done
 1066 15:44:08.151085  scan_bus: scanning of bus Root Device took 624708 usecs
 1067 15:44:08.151191  done
 1068 15:44:08.154249  Chrome EC: UHEPI supported
 1069 15:44:08.160896  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 15:44:08.167463  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 15:44:08.170560  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 15:44:08.178535  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 15:44:08.182069  SPI flash protection: WPSW=0 SRP0=0
 1074 15:44:08.188867  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 15:44:08.192503  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 15:44:08.195536  found VGA at PCI: 00:02.0
 1077 15:44:08.199034  Setting up VGA for PCI: 00:02.0
 1078 15:44:08.205788  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 15:44:08.208563  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 15:44:08.212253  Allocating resources...
 1081 15:44:08.215213  Reading resources...
 1082 15:44:08.218494  Root Device read_resources bus 0 link: 0
 1083 15:44:08.221944  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 15:44:08.228432  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 15:44:08.231642  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 15:44:08.238767  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 15:44:08.242248  USB0 port 0 read_resources bus 0 link: 0
 1088 15:44:08.250471  USB0 port 0 read_resources bus 0 link: 0 done
 1089 15:44:08.253755  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 15:44:08.261209  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 15:44:08.264490  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 15:44:08.270970  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 15:44:08.274190  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 15:44:08.282183  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 15:44:08.288300  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 15:44:08.291558  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 15:44:08.299006  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 15:44:08.301731  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 15:44:08.308259  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 15:44:08.311688  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 15:44:08.318479  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 15:44:08.321763  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 15:44:08.328221  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 15:44:08.334908  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 15:44:08.337942  Root Device read_resources bus 0 link: 0 done
 1106 15:44:08.341471  Done reading resources.
 1107 15:44:08.344700  Show resources in subtree (Root Device)...After reading.
 1108 15:44:08.351274   Root Device child on link 0 CPU_CLUSTER: 0
 1109 15:44:08.354536    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 15:44:08.354623     APIC: 00
 1111 15:44:08.357695     APIC: 03
 1112 15:44:08.357781     APIC: 05
 1113 15:44:08.361292     APIC: 01
 1114 15:44:08.361378     APIC: 02
 1115 15:44:08.361464     APIC: 04
 1116 15:44:08.364975     APIC: 06
 1117 15:44:08.365061     APIC: 07
 1118 15:44:08.368178    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 15:44:08.377739    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 15:44:08.387768    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 15:44:08.391232     PCI: 00:00.0
 1122 15:44:08.444464     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 15:44:08.444932     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 15:44:08.445220     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 15:44:08.446184     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 15:44:08.446452     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 15:44:08.494065     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 15:44:08.494239     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 15:44:08.494783     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 15:44:08.495285     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 15:44:08.495667     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 15:44:08.496395     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 15:44:08.540208     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 15:44:08.540714     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 15:44:08.541526     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 15:44:08.541994     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 15:44:08.544659     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 15:44:08.545204     PCI: 00:02.0
 1139 15:44:08.551043     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 15:44:08.563781     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 15:44:08.570635     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 15:44:08.573904     PCI: 00:04.0
 1143 15:44:08.574337     PCI: 00:08.0
 1144 15:44:08.583935     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 15:44:08.587525     PCI: 00:12.0
 1146 15:44:08.597079     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 15:44:08.600442     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 15:44:08.610374     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 15:44:08.613994      USB0 port 0 child on link 0 USB2 port 0
 1150 15:44:08.617187       USB2 port 0
 1151 15:44:08.617659       USB2 port 1
 1152 15:44:08.620573       USB2 port 2
 1153 15:44:08.621064       USB2 port 3
 1154 15:44:08.623641       USB2 port 5
 1155 15:44:08.624123       USB2 port 6
 1156 15:44:08.626782       USB2 port 9
 1157 15:44:08.627266       USB3 port 0
 1158 15:44:08.630465       USB3 port 1
 1159 15:44:08.630907       USB3 port 2
 1160 15:44:08.633569       USB3 port 3
 1161 15:44:08.637105       USB3 port 4
 1162 15:44:08.637582     PCI: 00:14.2
 1163 15:44:08.646795     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 15:44:08.656573     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 15:44:08.660076     PCI: 00:14.3
 1166 15:44:08.670210     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 15:44:08.673362     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 15:44:08.683539     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 15:44:08.684028      I2C: 01:15
 1170 15:44:08.690145     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 15:44:08.700142     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 15:44:08.700581      I2C: 02:5d
 1173 15:44:08.703548      GENERIC: 0.0
 1174 15:44:08.704004     PCI: 00:16.0
 1175 15:44:08.713271     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 15:44:08.716565     PCI: 00:17.0
 1177 15:44:08.723531     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 15:44:08.733134     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 15:44:08.743139     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 15:44:08.749644     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 15:44:08.759344     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 15:44:08.766098     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 15:44:08.772983     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 15:44:08.782789     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 15:44:08.783346      I2C: 03:1a
 1186 15:44:08.783727      I2C: 03:38
 1187 15:44:08.786097      I2C: 03:39
 1188 15:44:08.786577      I2C: 03:3a
 1189 15:44:08.789185      I2C: 03:3b
 1190 15:44:08.792852     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 15:44:08.802340     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 15:44:08.812511     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 15:44:08.822662     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 15:44:08.823148      PCI: 01:00.0
 1195 15:44:08.832804      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 15:44:08.835673     PCI: 00:1e.0
 1197 15:44:08.845603     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 15:44:08.855422     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 15:44:08.858735     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 15:44:08.868568     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 15:44:08.872109      SPI: 00
 1202 15:44:08.875170     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 15:44:08.885349     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 15:44:08.885790      SPI: 01
 1205 15:44:08.888604     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 15:44:08.898189     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 15:44:08.908071     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 15:44:08.908549      PNP: 0c09.0
 1209 15:44:08.918671      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 15:44:08.919109     PCI: 00:1f.3
 1211 15:44:08.928636     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 15:44:08.938462     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 15:44:08.941912     PCI: 00:1f.4
 1214 15:44:08.951630     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 15:44:08.961346     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 15:44:08.961807     PCI: 00:1f.5
 1217 15:44:08.971594     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 15:44:08.977972  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 15:44:08.984621  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 15:44:08.991199  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 15:44:08.994741  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 15:44:08.997980  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 15:44:09.001397  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 15:44:09.004762  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 15:44:09.011408  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 15:44:09.017776  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 15:44:09.027621  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 15:44:09.034664  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 15:44:09.040964  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 15:44:09.044614  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 15:44:09.054259  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 15:44:09.057407  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 15:44:09.064231  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 15:44:09.067385  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 15:44:09.073930  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 15:44:09.077780  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 15:44:09.080799  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 15:44:09.087513  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 15:44:09.090746  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 15:44:09.097800  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 15:44:09.100530  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 15:44:09.107226  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 15:44:09.110522  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 15:44:09.117518  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 15:44:09.120763  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 15:44:09.127275  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 15:44:09.130337  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 15:44:09.137403  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 15:44:09.140795  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 15:44:09.144256  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 15:44:09.150390  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 15:44:09.153682  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 15:44:09.160264  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 15:44:09.163640  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 15:44:09.173396  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 15:44:09.177202  avoid_fixed_resources: DOMAIN: 0000
 1257 15:44:09.183692  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 15:44:09.190170  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 15:44:09.196843  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 15:44:09.203729  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 15:44:09.213334  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 15:44:09.220047  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 15:44:09.226945  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 15:44:09.233163  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 15:44:09.243024  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 15:44:09.249883  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 15:44:09.256723  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 15:44:09.263206  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 15:44:09.266724  Setting resources...
 1270 15:44:09.273132  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 15:44:09.276524  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 15:44:09.279898  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 15:44:09.286333  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 15:44:09.289461  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 15:44:09.296321  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 15:44:09.302892  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 15:44:09.306331  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 15:44:09.315955  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 15:44:09.319382  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 15:44:09.326081  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 15:44:09.329309  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 15:44:09.336109  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 15:44:09.339312  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 15:44:09.346124  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 15:44:09.349449  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 15:44:09.355860  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 15:44:09.359564  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 15:44:09.365672  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 15:44:09.369074  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 15:44:09.372307  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 15:44:09.379109  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 15:44:09.382514  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 15:44:09.389272  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 15:44:09.392540  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 15:44:09.398964  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 15:44:09.402314  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 15:44:09.408709  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 15:44:09.412051  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 15:44:09.419105  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 15:44:09.421901  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 15:44:09.429022  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 15:44:09.435434  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 15:44:09.442101  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 15:44:09.448378  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 15:44:09.458594  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 15:44:09.462237  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 15:44:09.468438  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 15:44:09.475271  Root Device assign_resources, bus 0 link: 0
 1309 15:44:09.478411  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 15:44:09.488307  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 15:44:09.495189  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 15:44:09.501629  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 15:44:09.511966  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 15:44:09.518617  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 15:44:09.528240  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 15:44:09.532149  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 15:44:09.538538  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 15:44:09.545385  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 15:44:09.555504  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 15:44:09.561515  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 15:44:09.571605  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 15:44:09.574894  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 15:44:09.578515  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 15:44:09.588104  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 15:44:09.591296  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 15:44:09.598269  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 15:44:09.605426  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 15:44:09.614914  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 15:44:09.621540  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 15:44:09.628446  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 15:44:09.638104  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 15:44:09.645015  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 15:44:09.651186  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 15:44:09.661363  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 15:44:09.664363  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 15:44:09.667922  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 15:44:09.678521  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 15:44:09.688230  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 15:44:09.694840  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 15:44:09.701675  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 15:44:09.707734  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 15:44:09.714250  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 15:44:09.720990  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 15:44:09.730623  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 15:44:09.734415  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 15:44:09.737441  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 15:44:09.747602  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 15:44:09.751098  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 15:44:09.757641  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 15:44:09.760884  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 15:44:09.767458  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 15:44:09.770663  LPC: Trying to open IO window from 800 size 1ff
 1353 15:44:09.780456  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 15:44:09.787147  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 15:44:09.796988  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 15:44:09.803831  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 15:44:09.806845  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 15:44:09.813779  Root Device assign_resources, bus 0 link: 0
 1359 15:44:09.817088  Done setting resources.
 1360 15:44:09.823799  Show resources in subtree (Root Device)...After assigning values.
 1361 15:44:09.826874   Root Device child on link 0 CPU_CLUSTER: 0
 1362 15:44:09.830453    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 15:44:09.830897     APIC: 00
 1364 15:44:09.833559     APIC: 03
 1365 15:44:09.833977     APIC: 05
 1366 15:44:09.837012     APIC: 01
 1367 15:44:09.837431     APIC: 02
 1368 15:44:09.837791     APIC: 04
 1369 15:44:09.840416     APIC: 06
 1370 15:44:09.840855     APIC: 07
 1371 15:44:09.843668    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 15:44:09.853793    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 15:44:09.866706    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 15:44:09.867181     PCI: 00:00.0
 1375 15:44:09.876723     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 15:44:09.886502     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 15:44:09.896508     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 15:44:09.906517     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 15:44:09.913058     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 15:44:09.923039     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 15:44:09.932678     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 15:44:09.942667     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 15:44:09.953075     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 15:44:09.959385     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 15:44:09.969352     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 15:44:09.979228     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 15:44:09.989281     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 15:44:09.999017     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 15:44:10.008872     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 15:44:10.018863     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 15:44:10.019506     PCI: 00:02.0
 1392 15:44:10.028674     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 15:44:10.042391     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 15:44:10.048887     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 15:44:10.051809     PCI: 00:04.0
 1396 15:44:10.052312     PCI: 00:08.0
 1397 15:44:10.061666     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 15:44:10.065320     PCI: 00:12.0
 1399 15:44:10.074693     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 15:44:10.078451     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 15:44:10.091569     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 15:44:10.095081      USB0 port 0 child on link 0 USB2 port 0
 1403 15:44:10.095523       USB2 port 0
 1404 15:44:10.097906       USB2 port 1
 1405 15:44:10.101397       USB2 port 2
 1406 15:44:10.101834       USB2 port 3
 1407 15:44:10.104569       USB2 port 5
 1408 15:44:10.105003       USB2 port 6
 1409 15:44:10.108331       USB2 port 9
 1410 15:44:10.108767       USB3 port 0
 1411 15:44:10.111278       USB3 port 1
 1412 15:44:10.111719       USB3 port 2
 1413 15:44:10.114493       USB3 port 3
 1414 15:44:10.114933       USB3 port 4
 1415 15:44:10.117787     PCI: 00:14.2
 1416 15:44:10.127954     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 15:44:10.137691     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 15:44:10.141102     PCI: 00:14.3
 1419 15:44:10.151609     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 15:44:10.154306     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 15:44:10.164135     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 15:44:10.167731      I2C: 01:15
 1423 15:44:10.170622     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 15:44:10.180642     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 15:44:10.181130      I2C: 02:5d
 1426 15:44:10.184193      GENERIC: 0.0
 1427 15:44:10.184672     PCI: 00:16.0
 1428 15:44:10.197345     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 15:44:10.197786     PCI: 00:17.0
 1430 15:44:10.207413     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 15:44:10.217321     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 15:44:10.227370     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 15:44:10.237198     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 15:44:10.243583     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 15:44:10.256875     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 15:44:10.260126     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 15:44:10.269987     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 15:44:10.270458      I2C: 03:1a
 1439 15:44:10.273345      I2C: 03:38
 1440 15:44:10.273779      I2C: 03:39
 1441 15:44:10.276550      I2C: 03:3a
 1442 15:44:10.277026      I2C: 03:3b
 1443 15:44:10.283090     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 15:44:10.293016     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 15:44:10.302945     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 15:44:10.313246     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 15:44:10.313680      PCI: 01:00.0
 1448 15:44:10.322877      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 15:44:10.326061     PCI: 00:1e.0
 1450 15:44:10.335897     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 15:44:10.345711     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 15:44:10.352283     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 15:44:10.362309     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 15:44:10.362797      SPI: 00
 1455 15:44:10.365756     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 15:44:10.375219     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 15:44:10.378702      SPI: 01
 1458 15:44:10.382228     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 15:44:10.391927     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 15:44:10.398844     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 15:44:10.401930      PNP: 0c09.0
 1462 15:44:10.411884      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 15:44:10.412325     PCI: 00:1f.3
 1464 15:44:10.422171     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 15:44:10.431828     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 15:44:10.434826     PCI: 00:1f.4
 1467 15:44:10.444802     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 15:44:10.454720     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 15:44:10.455221     PCI: 00:1f.5
 1470 15:44:10.464623     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 15:44:10.467720  Done allocating resources.
 1472 15:44:10.474280  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 15:44:10.477727  Enabling resources...
 1474 15:44:10.481374  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 15:44:10.484406  PCI: 00:00.0 cmd <- 06
 1476 15:44:10.487724  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 15:44:10.491441  PCI: 00:02.0 cmd <- 03
 1478 15:44:10.491960  PCI: 00:08.0 cmd <- 06
 1479 15:44:10.498162  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 15:44:10.498742  PCI: 00:12.0 cmd <- 02
 1481 15:44:10.501438  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 15:44:10.504762  PCI: 00:14.0 cmd <- 02
 1483 15:44:10.508143  PCI: 00:14.2 cmd <- 02
 1484 15:44:10.511076  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 15:44:10.514417  PCI: 00:14.3 cmd <- 02
 1486 15:44:10.518123  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 15:44:10.521209  PCI: 00:15.0 cmd <- 02
 1488 15:44:10.524576  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 15:44:10.527758  PCI: 00:15.1 cmd <- 02
 1490 15:44:10.531187  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 15:44:10.534575  PCI: 00:16.0 cmd <- 02
 1492 15:44:10.537678  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 15:44:10.538213  PCI: 00:17.0 cmd <- 03
 1494 15:44:10.544540  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 15:44:10.545025  PCI: 00:19.0 cmd <- 02
 1496 15:44:10.547890  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 15:44:10.551333  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 15:44:10.554694  PCI: 00:1d.0 cmd <- 06
 1499 15:44:10.557746  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 15:44:10.560960  PCI: 00:1e.0 cmd <- 06
 1501 15:44:10.564315  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 15:44:10.567627  PCI: 00:1e.2 cmd <- 06
 1503 15:44:10.570875  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 15:44:10.574301  PCI: 00:1e.3 cmd <- 02
 1505 15:44:10.577530  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 15:44:10.580720  PCI: 00:1f.0 cmd <- 407
 1507 15:44:10.584136  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 15:44:10.587958  PCI: 00:1f.3 cmd <- 02
 1509 15:44:10.590953  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 15:44:10.594024  PCI: 00:1f.4 cmd <- 03
 1511 15:44:10.597709  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 15:44:10.598143  PCI: 00:1f.5 cmd <- 406
 1513 15:44:10.607979  PCI: 01:00.0 cmd <- 02
 1514 15:44:10.613525  done.
 1515 15:44:10.624626  ME: Version: 14.0.39.1367
 1516 15:44:10.631280  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
 1517 15:44:10.634172  Initializing devices...
 1518 15:44:10.634728  Root Device init ...
 1519 15:44:10.641440  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 15:44:10.644402  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 15:44:10.651913  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 15:44:10.657883  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 15:44:10.664082  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 15:44:10.667418  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 15:44:10.671358  Root Device init finished in 35182 usecs
 1526 15:44:10.674202  CPU_CLUSTER: 0 init ...
 1527 15:44:10.680951  CPU_CLUSTER: 0 init finished in 2448 usecs
 1528 15:44:10.685236  PCI: 00:00.0 init ...
 1529 15:44:10.688525  CPU TDP: 15 Watts
 1530 15:44:10.691774  CPU PL2 = 64 Watts
 1531 15:44:10.694976  PCI: 00:00.0 init finished in 7077 usecs
 1532 15:44:10.698470  PCI: 00:02.0 init ...
 1533 15:44:10.701839  PCI: 00:02.0 init finished in 2254 usecs
 1534 15:44:10.705063  PCI: 00:08.0 init ...
 1535 15:44:10.708479  PCI: 00:08.0 init finished in 2254 usecs
 1536 15:44:10.711558  PCI: 00:12.0 init ...
 1537 15:44:10.714755  PCI: 00:12.0 init finished in 2253 usecs
 1538 15:44:10.718205  PCI: 00:14.0 init ...
 1539 15:44:10.721869  PCI: 00:14.0 init finished in 2246 usecs
 1540 15:44:10.724998  PCI: 00:14.2 init ...
 1541 15:44:10.727954  PCI: 00:14.2 init finished in 2253 usecs
 1542 15:44:10.731435  PCI: 00:14.3 init ...
 1543 15:44:10.734741  PCI: 00:14.3 init finished in 2271 usecs
 1544 15:44:10.737998  PCI: 00:15.0 init ...
 1545 15:44:10.741311  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 15:44:10.744704  PCI: 00:15.0 init finished in 5979 usecs
 1547 15:44:10.748107  PCI: 00:15.1 init ...
 1548 15:44:10.751700  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 15:44:10.758382  PCI: 00:15.1 init finished in 5971 usecs
 1550 15:44:10.759016  PCI: 00:16.0 init ...
 1551 15:44:10.764359  PCI: 00:16.0 init finished in 2254 usecs
 1552 15:44:10.767945  PCI: 00:19.0 init ...
 1553 15:44:10.770942  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 15:44:10.774492  PCI: 00:19.0 init finished in 5980 usecs
 1555 15:44:10.778182  PCI: 00:1d.0 init ...
 1556 15:44:10.780885  Initializing PCH PCIe bridge.
 1557 15:44:10.784367  PCI: 00:1d.0 init finished in 5289 usecs
 1558 15:44:10.787752  PCI: 00:1f.0 init ...
 1559 15:44:10.791186  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 15:44:10.797537  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 15:44:10.798024  IOAPIC: ID = 0x02
 1562 15:44:10.800757  IOAPIC: Dumping registers
 1563 15:44:10.804282    reg 0x0000: 0x02000000
 1564 15:44:10.807446    reg 0x0001: 0x00770020
 1565 15:44:10.807921    reg 0x0002: 0x00000000
 1566 15:44:10.813934  PCI: 00:1f.0 init finished in 23561 usecs
 1567 15:44:10.817744  PCI: 00:1f.4 init ...
 1568 15:44:10.820566  PCI: 00:1f.4 init finished in 2263 usecs
 1569 15:44:10.831320  PCI: 01:00.0 init ...
 1570 15:44:10.834492  PCI: 01:00.0 init finished in 2253 usecs
 1571 15:44:10.839164  PNP: 0c09.0 init ...
 1572 15:44:10.842346  Google Chrome EC uptime: 11.096 seconds
 1573 15:44:10.849247  Google Chrome AP resets since EC boot: 0
 1574 15:44:10.852133  Google Chrome most recent AP reset causes:
 1575 15:44:10.858580  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 15:44:10.861858  PNP: 0c09.0 init finished in 20581 usecs
 1577 15:44:10.865269  Devices initialized
 1578 15:44:10.865756  Show all devs... After init.
 1579 15:44:10.868696  Root Device: enabled 1
 1580 15:44:10.871818  CPU_CLUSTER: 0: enabled 1
 1581 15:44:10.875971  DOMAIN: 0000: enabled 1
 1582 15:44:10.876458  APIC: 00: enabled 1
 1583 15:44:10.878449  PCI: 00:00.0: enabled 1
 1584 15:44:10.881890  PCI: 00:02.0: enabled 1
 1585 15:44:10.885016  PCI: 00:04.0: enabled 0
 1586 15:44:10.885473  PCI: 00:05.0: enabled 0
 1587 15:44:10.888418  PCI: 00:12.0: enabled 1
 1588 15:44:10.892311  PCI: 00:12.5: enabled 0
 1589 15:44:10.892770  PCI: 00:12.6: enabled 0
 1590 15:44:10.895081  PCI: 00:14.0: enabled 1
 1591 15:44:10.898627  PCI: 00:14.1: enabled 0
 1592 15:44:10.901408  PCI: 00:14.3: enabled 1
 1593 15:44:10.901864  PCI: 00:14.5: enabled 0
 1594 15:44:10.905252  PCI: 00:15.0: enabled 1
 1595 15:44:10.908134  PCI: 00:15.1: enabled 1
 1596 15:44:10.911403  PCI: 00:15.2: enabled 0
 1597 15:44:10.911967  PCI: 00:15.3: enabled 0
 1598 15:44:10.915117  PCI: 00:16.0: enabled 1
 1599 15:44:10.918459  PCI: 00:16.1: enabled 0
 1600 15:44:10.921516  PCI: 00:16.2: enabled 0
 1601 15:44:10.921975  PCI: 00:16.3: enabled 0
 1602 15:44:10.924820  PCI: 00:16.4: enabled 0
 1603 15:44:10.927964  PCI: 00:16.5: enabled 0
 1604 15:44:10.931902  PCI: 00:17.0: enabled 1
 1605 15:44:10.932466  PCI: 00:19.0: enabled 1
 1606 15:44:10.934863  PCI: 00:19.1: enabled 0
 1607 15:44:10.938189  PCI: 00:19.2: enabled 0
 1608 15:44:10.938626  PCI: 00:1a.0: enabled 0
 1609 15:44:10.941437  PCI: 00:1c.0: enabled 0
 1610 15:44:10.944504  PCI: 00:1c.1: enabled 0
 1611 15:44:10.948120  PCI: 00:1c.2: enabled 0
 1612 15:44:10.948684  PCI: 00:1c.3: enabled 0
 1613 15:44:10.951266  PCI: 00:1c.4: enabled 0
 1614 15:44:10.954793  PCI: 00:1c.5: enabled 0
 1615 15:44:10.958019  PCI: 00:1c.6: enabled 0
 1616 15:44:10.958481  PCI: 00:1c.7: enabled 0
 1617 15:44:10.961014  PCI: 00:1d.0: enabled 1
 1618 15:44:10.964401  PCI: 00:1d.1: enabled 0
 1619 15:44:10.968032  PCI: 00:1d.2: enabled 0
 1620 15:44:10.968511  PCI: 00:1d.3: enabled 0
 1621 15:44:10.971460  PCI: 00:1d.4: enabled 0
 1622 15:44:10.974325  PCI: 00:1d.5: enabled 0
 1623 15:44:10.977735  PCI: 00:1e.0: enabled 1
 1624 15:44:10.978175  PCI: 00:1e.1: enabled 0
 1625 15:44:10.980881  PCI: 00:1e.2: enabled 1
 1626 15:44:10.984356  PCI: 00:1e.3: enabled 1
 1627 15:44:10.984819  PCI: 00:1f.0: enabled 1
 1628 15:44:10.987726  PCI: 00:1f.1: enabled 0
 1629 15:44:10.991011  PCI: 00:1f.2: enabled 0
 1630 15:44:10.994636  PCI: 00:1f.3: enabled 1
 1631 15:44:10.995073  PCI: 00:1f.4: enabled 1
 1632 15:44:10.997291  PCI: 00:1f.5: enabled 1
 1633 15:44:11.001192  PCI: 00:1f.6: enabled 0
 1634 15:44:11.004063  USB0 port 0: enabled 1
 1635 15:44:11.004530  I2C: 01:15: enabled 1
 1636 15:44:11.007430  I2C: 02:5d: enabled 1
 1637 15:44:11.010869  GENERIC: 0.0: enabled 1
 1638 15:44:11.011307  I2C: 03:1a: enabled 1
 1639 15:44:11.014412  I2C: 03:38: enabled 1
 1640 15:44:11.017175  I2C: 03:39: enabled 1
 1641 15:44:11.017636  I2C: 03:3a: enabled 1
 1642 15:44:11.020686  I2C: 03:3b: enabled 1
 1643 15:44:11.024111  PCI: 00:00.0: enabled 1
 1644 15:44:11.024655  SPI: 00: enabled 1
 1645 15:44:11.027379  SPI: 01: enabled 1
 1646 15:44:11.030835  PNP: 0c09.0: enabled 1
 1647 15:44:11.031384  USB2 port 0: enabled 1
 1648 15:44:11.034137  USB2 port 1: enabled 1
 1649 15:44:11.037197  USB2 port 2: enabled 0
 1650 15:44:11.040791  USB2 port 3: enabled 0
 1651 15:44:11.041329  USB2 port 5: enabled 0
 1652 15:44:11.043783  USB2 port 6: enabled 1
 1653 15:44:11.046952  USB2 port 9: enabled 1
 1654 15:44:11.047411  USB3 port 0: enabled 1
 1655 15:44:11.050932  USB3 port 1: enabled 1
 1656 15:44:11.054109  USB3 port 2: enabled 1
 1657 15:44:11.054674  USB3 port 3: enabled 1
 1658 15:44:11.057189  USB3 port 4: enabled 0
 1659 15:44:11.060934  APIC: 03: enabled 1
 1660 15:44:11.061377  APIC: 05: enabled 1
 1661 15:44:11.063551  APIC: 01: enabled 1
 1662 15:44:11.067129  APIC: 02: enabled 1
 1663 15:44:11.067566  APIC: 04: enabled 1
 1664 15:44:11.070233  APIC: 06: enabled 1
 1665 15:44:11.070691  APIC: 07: enabled 1
 1666 15:44:11.073529  PCI: 00:08.0: enabled 1
 1667 15:44:11.076827  PCI: 00:14.2: enabled 1
 1668 15:44:11.080276  PCI: 01:00.0: enabled 1
 1669 15:44:11.083721  Disabling ACPI via APMC:
 1670 15:44:11.084213  done.
 1671 15:44:11.090529  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 15:44:11.093969  ELOG: NV offset 0xaf0000 size 0x4000
 1673 15:44:11.100767  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 15:44:11.106925  ELOG: Event(17) added with size 13 at 2022-09-17 15:43:53 UTC
 1675 15:44:11.113657  ELOG: Event(92) added with size 9 at 2022-09-17 15:43:53 UTC
 1676 15:44:11.120615  ELOG: Event(93) added with size 9 at 2022-09-17 15:43:53 UTC
 1677 15:44:11.127134  ELOG: Event(9A) added with size 9 at 2022-09-17 15:43:53 UTC
 1678 15:44:11.133796  ELOG: Event(9E) added with size 10 at 2022-09-17 15:43:53 UTC
 1679 15:44:11.140488  ELOG: Event(9F) added with size 14 at 2022-09-17 15:43:53 UTC
 1680 15:44:11.143531  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 15:44:11.151115  ELOG: Event(A1) added with size 10 at 2022-09-17 15:43:53 UTC
 1682 15:44:11.160691  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 15:44:11.167157  ELOG: Event(A0) added with size 9 at 2022-09-17 15:43:53 UTC
 1684 15:44:11.170894  elog_add_boot_reason: Logged dev mode boot
 1685 15:44:11.173985  Finalize devices...
 1686 15:44:11.174493  PCI: 00:17.0 final
 1687 15:44:11.177260  Devices finalized
 1688 15:44:11.180510  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 15:44:11.187684  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 15:44:11.191492  ME: HFSTS1                  : 0x90000245
 1691 15:44:11.193747  ME: HFSTS2                  : 0x3B850126
 1692 15:44:11.200693  ME: HFSTS3                  : 0x00000020
 1693 15:44:11.204101  ME: HFSTS4                  : 0x00004800
 1694 15:44:11.207208  ME: HFSTS5                  : 0x00000000
 1695 15:44:11.210574  ME: HFSTS6                  : 0x40400006
 1696 15:44:11.213733  ME: Manufacturing Mode      : NO
 1697 15:44:11.216908  ME: FW Partition Table      : OK
 1698 15:44:11.220290  ME: Bringup Loader Failure  : NO
 1699 15:44:11.223746  ME: Firmware Init Complete  : YES
 1700 15:44:11.226966  ME: Boot Options Present    : NO
 1701 15:44:11.230489  ME: Update In Progress      : NO
 1702 15:44:11.233970  ME: D0i3 Support            : YES
 1703 15:44:11.237020  ME: Low Power State Enabled : NO
 1704 15:44:11.240266  ME: CPU Replaced            : NO
 1705 15:44:11.243528  ME: CPU Replacement Valid   : YES
 1706 15:44:11.246973  ME: Current Working State   : 5
 1707 15:44:11.250307  ME: Current Operation State : 1
 1708 15:44:11.253474  ME: Current Operation Mode  : 0
 1709 15:44:11.256612  ME: Error Code              : 0
 1710 15:44:11.260300  ME: CPU Debug Disabled      : YES
 1711 15:44:11.263323  ME: TXT Support             : NO
 1712 15:44:11.269758  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 15:44:11.276690  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 15:44:11.277220  CBFS @ c08000 size 3f8000
 1715 15:44:11.283147  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 15:44:11.286676  CBFS: Locating 'fallback/dsdt.aml'
 1717 15:44:11.289660  CBFS: Found @ offset 10bb80 size 3fa5
 1718 15:44:11.296082  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 15:44:11.299551  CBFS @ c08000 size 3f8000
 1720 15:44:11.302869  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 15:44:11.306090  CBFS: Locating 'fallback/slic'
 1722 15:44:11.312043  CBFS: 'fallback/slic' not found.
 1723 15:44:11.318068  ACPI: Writing ACPI tables at 99b3e000.
 1724 15:44:11.318596  ACPI:    * FACS
 1725 15:44:11.321257  ACPI:    * DSDT
 1726 15:44:11.324630  Ramoops buffer: 0x100000@0x99a3d000.
 1727 15:44:11.328208  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 15:44:11.334663  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 15:44:11.338301  Google Chrome EC: version:
 1730 15:44:11.341095  	ro: helios_v2.0.2659-56403530b
 1731 15:44:11.344311  	rw: helios_v2.0.2849-c41de27e7d
 1732 15:44:11.344783    running image: 1
 1733 15:44:11.349171  ACPI:    * FADT
 1734 15:44:11.349747  SCI is IRQ9
 1735 15:44:11.355458  ACPI: added table 1/32, length now 40
 1736 15:44:11.356048  ACPI:     * SSDT
 1737 15:44:11.358880  Found 1 CPU(s) with 8 core(s) each.
 1738 15:44:11.362098  Error: Could not locate 'wifi_sar' in VPD.
 1739 15:44:11.368634  Checking CBFS for default SAR values
 1740 15:44:11.372148  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 15:44:11.375410  CBFS @ c08000 size 3f8000
 1742 15:44:11.382287  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 15:44:11.385227  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 15:44:11.388388  CBFS: Found @ offset 5fac0 size 77
 1745 15:44:11.392049  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 15:44:11.395358  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 15:44:11.401866  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 15:44:11.408641  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 15:44:11.411961  failed to find key in VPD: dsm_calib_r0_0
 1750 15:44:11.421675  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 15:44:11.424946  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 15:44:11.428158  failed to find key in VPD: dsm_calib_r0_1
 1753 15:44:11.438538  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 15:44:11.444903  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 15:44:11.448172  failed to find key in VPD: dsm_calib_r0_2
 1756 15:44:11.458191  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 15:44:11.461438  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 15:44:11.467939  failed to find key in VPD: dsm_calib_r0_3
 1759 15:44:11.474750  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 15:44:11.481211  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 15:44:11.484681  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 15:44:11.487910  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 15:44:11.491634  EC returned error result code 1
 1764 15:44:11.495387  EC returned error result code 1
 1765 15:44:11.499092  EC returned error result code 1
 1766 15:44:11.505855  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 15:44:11.509469  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 15:44:11.515895  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 15:44:11.522412  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 15:44:11.525808  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 15:44:11.532350  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 15:44:11.538460  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 15:44:11.542233  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 15:44:11.548527  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 15:44:11.551756  ACPI: added table 2/32, length now 44
 1776 15:44:11.555018  ACPI:    * MCFG
 1777 15:44:11.558371  ACPI: added table 3/32, length now 48
 1778 15:44:11.562249  ACPI:    * TPM2
 1779 15:44:11.562332  TPM2 log created at 99a2d000
 1780 15:44:11.568395  ACPI: added table 4/32, length now 52
 1781 15:44:11.568480  ACPI:    * MADT
 1782 15:44:11.571799  SCI is IRQ9
 1783 15:44:11.575020  ACPI: added table 5/32, length now 56
 1784 15:44:11.575106  current = 99b43ac0
 1785 15:44:11.578669  ACPI:    * DMAR
 1786 15:44:11.581746  ACPI: added table 6/32, length now 60
 1787 15:44:11.585298  ACPI:    * IGD OpRegion
 1788 15:44:11.585383  GMA: Found VBT in CBFS
 1789 15:44:11.588424  GMA: Found valid VBT in CBFS
 1790 15:44:11.591949  ACPI: added table 7/32, length now 64
 1791 15:44:11.594934  ACPI:    * HPET
 1792 15:44:11.598093  ACPI: added table 8/32, length now 68
 1793 15:44:11.598180  ACPI: done.
 1794 15:44:11.601518  ACPI tables: 31744 bytes.
 1795 15:44:11.605146  smbios_write_tables: 99a2c000
 1796 15:44:11.608437  EC returned error result code 3
 1797 15:44:11.612076  Couldn't obtain OEM name from CBI
 1798 15:44:11.615144  Create SMBIOS type 17
 1799 15:44:11.618616  PCI: 00:00.0 (Intel Cannonlake)
 1800 15:44:11.621707  PCI: 00:14.3 (Intel WiFi)
 1801 15:44:11.624911  SMBIOS tables: 939 bytes.
 1802 15:44:11.628685  Writing table forward entry at 0x00000500
 1803 15:44:11.635404  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 15:44:11.638093  Writing coreboot table at 0x99b62000
 1805 15:44:11.644890   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 15:44:11.647859   1. 0000000000001000-000000000009ffff: RAM
 1807 15:44:11.651326   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 15:44:11.658372   3. 0000000000100000-0000000099a2bfff: RAM
 1809 15:44:11.661556   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 15:44:11.667949   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 15:44:11.674519   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 15:44:11.677804   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 15:44:11.684508   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 15:44:11.688078   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 15:44:11.691021  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 15:44:11.697643  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 15:44:11.700890  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 15:44:11.707680  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 15:44:11.711443  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 15:44:11.717791  15. 0000000100000000-000000045e7fffff: RAM
 1821 15:44:11.720718  Graphics framebuffer located at 0xc0000000
 1822 15:44:11.723991  Passing 5 GPIOs to payload:
 1823 15:44:11.727575              NAME |       PORT | POLARITY |     VALUE
 1824 15:44:11.734221     write protect |  undefined |     high |       low
 1825 15:44:11.737590               lid |  undefined |     high |      high
 1826 15:44:11.744209             power |  undefined |     high |       low
 1827 15:44:11.750681             oprom |  undefined |     high |       low
 1828 15:44:11.753855          EC in RW | 0x000000cb |     high |       low
 1829 15:44:11.757202  Board ID: 4
 1830 15:44:11.760667  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 15:44:11.763943  CBFS @ c08000 size 3f8000
 1832 15:44:11.770391  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 15:44:11.777110  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
 1834 15:44:11.777187  coreboot table: 1492 bytes.
 1835 15:44:11.780242  IMD ROOT    0. 99fff000 00001000
 1836 15:44:11.783664  IMD SMALL   1. 99ffe000 00001000
 1837 15:44:11.786870  FSP MEMORY  2. 99c4e000 003b0000
 1838 15:44:11.790115  CONSOLE     3. 99c2e000 00020000
 1839 15:44:11.793629  FMAP        4. 99c2d000 0000054e
 1840 15:44:11.796894  TIME STAMP  5. 99c2c000 00000910
 1841 15:44:11.800481  VBOOT WORK  6. 99c18000 00014000
 1842 15:44:11.803997  MRC DATA    7. 99c16000 00001958
 1843 15:44:11.807161  ROMSTG STCK 8. 99c15000 00001000
 1844 15:44:11.810281  AFTER CAR   9. 99c0b000 0000a000
 1845 15:44:11.813833  RAMSTAGE   10. 99baf000 0005c000
 1846 15:44:11.817423  REFCODE    11. 99b7a000 00035000
 1847 15:44:11.820201  SMM BACKUP 12. 99b6a000 00010000
 1848 15:44:11.823627  COREBOOT   13. 99b62000 00008000
 1849 15:44:11.826767  ACPI       14. 99b3e000 00024000
 1850 15:44:11.830314  ACPI GNVS  15. 99b3d000 00001000
 1851 15:44:11.833652  RAMOOPS    16. 99a3d000 00100000
 1852 15:44:11.836815  TPM2 TCGLOG17. 99a2d000 00010000
 1853 15:44:11.840222  SMBIOS     18. 99a2c000 00000800
 1854 15:44:11.843823  IMD small region:
 1855 15:44:11.847078    IMD ROOT    0. 99ffec00 00000400
 1856 15:44:11.850486    FSP RUNTIME 1. 99ffebe0 00000004
 1857 15:44:11.853437    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 15:44:11.856836    POWER STATE 3. 99ffeb80 00000040
 1859 15:44:11.860304    ROMSTAGE    4. 99ffeb60 00000004
 1860 15:44:11.863720    MEM INFO    5. 99ffe9a0 000001b9
 1861 15:44:11.866734    VPD         6. 99ffe920 0000006c
 1862 15:44:11.870125  MTRR: Physical address space:
 1863 15:44:11.876495  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 15:44:11.883398  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 15:44:11.890061  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 15:44:11.896437  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 15:44:11.903484  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 15:44:11.909705  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 15:44:11.916274  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 15:44:11.919772  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 15:44:11.922929  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 15:44:11.926362  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 15:44:11.929660  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 15:44:11.936072  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 15:44:11.939421  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 15:44:11.943112  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 15:44:11.946269  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 15:44:11.952538  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 15:44:11.956003  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 15:44:11.959321  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 15:44:11.962728  call enable_fixed_mtrr()
 1882 15:44:11.966218  CPU physical address size: 39 bits
 1883 15:44:11.972524  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 15:44:11.975764  MTRR: WB selected as default type.
 1885 15:44:11.979649  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 15:44:11.985971  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 15:44:11.992300  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 15:44:11.998844  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 15:44:12.005931  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 15:44:12.012629  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 15:44:12.015680  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 15:44:12.022131  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 15:44:12.025745  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 15:44:12.029068  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 15:44:12.032466  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 15:44:12.038931  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 15:44:12.042190  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 15:44:12.045881  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 15:44:12.049262  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 15:44:12.052451  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 15:44:12.059142  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 15:44:12.059226  
 1903 15:44:12.059294  MTRR check
 1904 15:44:12.062084  call enable_fixed_mtrr()
 1905 15:44:12.065537  Fixed MTRRs   : Enabled
 1906 15:44:12.068834  Variable MTRRs: Enabled
 1907 15:44:12.068919  
 1908 15:44:12.071787  CPU physical address size: 39 bits
 1909 15:44:12.075508  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1910 15:44:12.082073  MTRR: Fixed MSR 0x250 0x0606060606060606
 1911 15:44:12.084958  MTRR: Fixed MSR 0x258 0x0606060606060606
 1912 15:44:12.088534  MTRR: Fixed MSR 0x259 0x0000000000000000
 1913 15:44:12.091751  MTRR: Fixed MSR 0x268 0x0606060606060606
 1914 15:44:12.098302  MTRR: Fixed MSR 0x269 0x0606060606060606
 1915 15:44:12.101584  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1916 15:44:12.105095  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1917 15:44:12.108423  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1918 15:44:12.111510  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1919 15:44:12.118030  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1920 15:44:12.121489  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1921 15:44:12.124953  MTRR: Fixed MSR 0x250 0x0606060606060606
 1922 15:44:12.127772  call enable_fixed_mtrr()
 1923 15:44:12.131525  MTRR: Fixed MSR 0x258 0x0606060606060606
 1924 15:44:12.138006  MTRR: Fixed MSR 0x259 0x0000000000000000
 1925 15:44:12.141205  MTRR: Fixed MSR 0x268 0x0606060606060606
 1926 15:44:12.144510  MTRR: Fixed MSR 0x269 0x0606060606060606
 1927 15:44:12.148063  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1928 15:44:12.154336  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1929 15:44:12.157819  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1930 15:44:12.161517  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1931 15:44:12.164467  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1932 15:44:12.167746  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1933 15:44:12.174122  CPU physical address size: 39 bits
 1934 15:44:12.177799  call enable_fixed_mtrr()
 1935 15:44:12.181000  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1936 15:44:12.184154  MTRR: Fixed MSR 0x250 0x0606060606060606
 1937 15:44:12.191077  MTRR: Fixed MSR 0x250 0x0606060606060606
 1938 15:44:12.194019  MTRR: Fixed MSR 0x258 0x0606060606060606
 1939 15:44:12.197251  MTRR: Fixed MSR 0x259 0x0000000000000000
 1940 15:44:12.200772  MTRR: Fixed MSR 0x268 0x0606060606060606
 1941 15:44:12.204014  MTRR: Fixed MSR 0x269 0x0606060606060606
 1942 15:44:12.210521  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1943 15:44:12.214192  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1944 15:44:12.217346  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1945 15:44:12.220569  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1946 15:44:12.227371  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1947 15:44:12.230148  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1948 15:44:12.233760  MTRR: Fixed MSR 0x258 0x0606060606060606
 1949 15:44:12.236955  MTRR: Fixed MSR 0x259 0x0000000000000000
 1950 15:44:12.243687  MTRR: Fixed MSR 0x268 0x0606060606060606
 1951 15:44:12.247192  MTRR: Fixed MSR 0x269 0x0606060606060606
 1952 15:44:12.250236  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1953 15:44:12.253682  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1954 15:44:12.260243  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1955 15:44:12.263586  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1956 15:44:12.266762  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1957 15:44:12.270150  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1958 15:44:12.273405  call enable_fixed_mtrr()
 1959 15:44:12.276515  call enable_fixed_mtrr()
 1960 15:44:12.279692  CPU physical address size: 39 bits
 1961 15:44:12.283172  CPU physical address size: 39 bits
 1962 15:44:12.286332  CBFS @ c08000 size 3f8000
 1963 15:44:12.292866  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1964 15:44:12.296359  CBFS: Locating 'fallback/payload'
 1965 15:44:12.299830  MTRR: Fixed MSR 0x250 0x0606060606060606
 1966 15:44:12.303064  MTRR: Fixed MSR 0x258 0x0606060606060606
 1967 15:44:12.309737  MTRR: Fixed MSR 0x259 0x0000000000000000
 1968 15:44:12.313391  MTRR: Fixed MSR 0x268 0x0606060606060606
 1969 15:44:12.316129  MTRR: Fixed MSR 0x269 0x0606060606060606
 1970 15:44:12.320025  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1971 15:44:12.322872  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1972 15:44:12.329953  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1973 15:44:12.332815  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1974 15:44:12.335930  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1975 15:44:12.339506  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1976 15:44:12.346337  MTRR: Fixed MSR 0x250 0x0606060606060606
 1977 15:44:12.349847  call enable_fixed_mtrr()
 1978 15:44:12.352757  MTRR: Fixed MSR 0x258 0x0606060606060606
 1979 15:44:12.355649  MTRR: Fixed MSR 0x259 0x0000000000000000
 1980 15:44:12.359307  MTRR: Fixed MSR 0x268 0x0606060606060606
 1981 15:44:12.365602  MTRR: Fixed MSR 0x269 0x0606060606060606
 1982 15:44:12.369301  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1983 15:44:12.372215  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1984 15:44:12.375748  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1985 15:44:12.378945  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1986 15:44:12.385507  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1987 15:44:12.388887  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1988 15:44:12.392064  CPU physical address size: 39 bits
 1989 15:44:12.395467  call enable_fixed_mtrr()
 1990 15:44:12.398659  CBFS: Found @ offset 1c96c0 size 3f798
 1991 15:44:12.402141  CPU physical address size: 39 bits
 1992 15:44:12.405821  CPU physical address size: 39 bits
 1993 15:44:12.412076  Checking segment from ROM address 0xffdd16f8
 1994 15:44:12.415674  Checking segment from ROM address 0xffdd1714
 1995 15:44:12.418483  Loading segment from ROM address 0xffdd16f8
 1996 15:44:12.422059    code (compression=0)
 1997 15:44:12.431771    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 15:44:12.438302  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 15:44:12.441910  it's not compressed!
 2000 15:44:12.533303  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 15:44:12.539742  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 15:44:12.543373  Loading segment from ROM address 0xffdd1714
 2003 15:44:12.546609    Entry Point 0x30000000
 2004 15:44:12.549642  Loaded segments
 2005 15:44:12.555679  Finalizing chipset.
 2006 15:44:12.558628  Finalizing SMM.
 2007 15:44:12.562263  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2008 15:44:12.565705  mp_park_aps done after 0 msecs.
 2009 15:44:12.571862  Jumping to boot code at 30000000(99b62000)
 2010 15:44:12.578648  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 15:44:12.578733  
 2012 15:44:12.581967  Starting depthcharge on Helios...
 2013 15:44:12.582336  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 15:44:12.582440  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 15:44:12.582523  Setting prompt string to ['hatch:']
 2016 15:44:12.582604  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 15:44:12.592106  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 15:44:12.598221  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 15:44:12.604887  board_setup: Info: eMMC controller not present; skipping
 2020 15:44:12.608302  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 15:44:12.615050  board_setup: Info: SDHCI controller not present; skipping
 2022 15:44:12.621559  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 15:44:12.621644  Wipe memory regions:
 2024 15:44:12.625067  	[0x00000000001000, 0x000000000a0000)
 2025 15:44:12.628213  	[0x00000000100000, 0x00000030000000)
 2026 15:44:12.697723  	[0x00000030657430, 0x00000099a2c000)
 2027 15:44:12.838615  	[0x00000100000000, 0x0000045e800000)
 2028 15:44:14.219986  R8152: Initializing
 2029 15:44:14.223124  Version 9 (ocp_data = 6010)
 2030 15:44:14.227251  R8152: Done initializing
 2031 15:44:14.230698  Adding net device
 2032 15:44:14.728349  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 15:44:14.728553  
 2034 15:44:14.728891  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2036 15:44:14.829728  hatch: tftpboot 192.168.201.1 7300445/tftp-deploy-sjozjhb6/kernel/bzImage 7300445/tftp-deploy-sjozjhb6/kernel/cmdline 7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
 2037 15:44:14.829928  Setting prompt string to 'Starting kernel'
 2038 15:44:14.830035  Setting prompt string to ['Starting kernel']
 2039 15:44:14.830144  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2040 15:44:14.830253  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:39)
 2041 15:44:14.834157  tftpboot 192.168.201.1 7300445/tftp-deploy-sjozjhb6/kernel/bzImay-sjozjhb6/kernel/cmdline 7300445/tftp-deploy-sjozjhb6/ramdisk/ramdisk.cpio.gz
 2042 15:44:14.834272  Waiting for link
 2043 15:44:15.034869  done.
 2044 15:44:15.035041  MAC: f4:f5:e8:50:dc:f7
 2045 15:44:15.038554  Sending DHCP discover... done.
 2046 15:44:15.041735  Waiting for reply... done.
 2047 15:44:15.044978  Sending DHCP request... done.
 2048 15:44:15.048091  Waiting for reply... done.
 2049 15:44:15.051674  My ip is 192.168.201.20
 2050 15:44:15.054812  The DHCP server ip is 192.168.201.1
 2051 15:44:15.061398  TFTP server IP predefined by user: 192.168.201.1
 2052 15:44:15.068263  Bootfile predefined by user: 7300445/tftp-deploy-sjozjhb6/kernel/bzImage
 2053 15:44:15.071362  Sending tftp read request... done.
 2054 15:44:15.074425  Waiting for the transfer... 
 2055 15:44:15.401916  00000000 ################################################################
 2056 15:44:15.648588  00080000 ################################################################
 2057 15:44:15.889425  00100000 ################################################################
 2058 15:44:16.118766  00180000 ################################################################
 2059 15:44:16.347231  00200000 ################################################################
 2060 15:44:16.583492  00280000 ################################################################
 2061 15:44:16.819632  00300000 ################################################################
 2062 15:44:17.044714  00380000 ################################################################
 2063 15:44:17.277241  00400000 ################################################################
 2064 15:44:17.504104  00480000 ################################################################
 2065 15:44:17.732697  00500000 ################################################################
 2066 15:44:17.960277  00580000 ################################################################
 2067 15:44:18.184664  00600000 ################################################################ done.
 2068 15:44:18.188125  The bootfile was 6815632 bytes long.
 2069 15:44:18.191090  Sending tftp read request... done.
 2070 15:44:18.194446  Waiting for the transfer... 
 2071 15:44:18.424100  00000000 ################################################################
 2072 15:44:18.650936  00080000 ################################################################
 2073 15:44:18.879014  00100000 ################################################################
 2074 15:44:19.105594  00180000 ################################################################
 2075 15:44:19.331172  00200000 ################################################################
 2076 15:44:19.568776  00280000 ################################################################
 2077 15:44:19.864081  00300000 ################################################################
 2078 15:44:20.159553  00380000 ################################################################
 2079 15:44:20.453872  00400000 ################################################################
 2080 15:44:20.750080  00480000 ################################################################
 2081 15:44:20.879703  00500000 ############################# done.
 2082 15:44:20.883111  Sending tftp read request... done.
 2083 15:44:20.886477  Waiting for the transfer... 
 2084 15:44:20.886584  00000000 # done.
 2085 15:44:20.896383  Command line loaded dynamically from TFTP file: 7300445/tftp-deploy-sjozjhb6/kernel/cmdline
 2086 15:44:20.919852  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300445/extract-nfsrootfs-i31ago1p,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2087 15:44:20.926237  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2088 15:44:20.930015  Shutting down all USB controllers.
 2089 15:44:20.932912  Removing current net device
 2090 15:44:20.936470  Finalizing coreboot
 2091 15:44:20.942855  Exiting depthcharge with code 4 at timestamp: 15623085
 2092 15:44:20.943418  
 2093 15:44:20.943807  Starting kernel ...
 2094 15:44:20.944720  end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
 2095 15:44:20.945249  start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
 2096 15:44:20.945672  Setting prompt string to ['Linux version [0-9]']
 2097 15:44:20.946070  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2098 15:44:20.946465  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
 2099 15:44:20.947425  
 2100 15:44:20.947871  
 2102 15:48:53.946169  end: 2.2.5 auto-login-action (duration 00:04:33) [common]
 2104 15:48:53.947339  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
 2106 15:48:53.948236  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2109 15:48:53.949726  end: 2 depthcharge-action (duration 00:05:00) [common]
 2111 15:48:53.950447  Cleaning after the job
 2112 15:48:53.950530  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/ramdisk
 2113 15:48:53.951004  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/kernel
 2114 15:48:53.951580  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/nfsrootfs
 2115 15:48:53.989807  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300445/tftp-deploy-sjozjhb6/modules
 2116 15:48:53.990107  start: 4.1 power-off (timeout 00:00:30) [common]
 2117 15:48:53.990273  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2118 15:48:54.008831  >> Command sent successfully.

 2119 15:48:54.010541  Returned 0 in 0 seconds
 2120 15:48:54.111969  end: 4.1 power-off (duration 00:00:00) [common]
 2122 15:48:54.113546  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2123 15:48:54.114727  Listened to connection for namespace 'common' for up to 1s
 2124 15:48:55.119104  Finalising connection for namespace 'common'
 2125 15:48:55.119888  Disconnecting from shell: Finalise
 2126 15:48:55.221386  end: 4.2 read-feedback (duration 00:00:01) [common]
 2127 15:48:55.222004  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300445
 2128 15:48:55.390487  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300445
 2129 15:48:55.390690  JobError: Your job cannot terminate cleanly.