Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 15:49:30.995540 lava-dispatcher, installed at version: 2022.06
2 15:49:30.995768 start: 0 validate
3 15:49:30.995921 Start time: 2022-09-17 15:49:30.995913+00:00 (UTC)
4 15:49:30.996066 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:49:30.996208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:49:31.289506 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:49:31.290261 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:49:31.579333 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:49:31.580055 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:49:31.873854 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:49:31.874565 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:49:32.175456 validate duration: 1.18
14 15:49:32.175760 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:49:32.175872 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:49:32.175970 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:49:32.176076 Not decompressing ramdisk as can be used compressed.
18 15:49:32.176167 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:49:32.176241 saving as /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/ramdisk/initrd.cpio.gz
20 15:49:32.176309 total size: 5411075 (5MB)
21 15:49:32.177557 progress 0% (0MB)
22 15:49:32.179224 progress 5% (0MB)
23 15:49:32.180716 progress 10% (0MB)
24 15:49:32.182321 progress 15% (0MB)
25 15:49:32.183905 progress 20% (1MB)
26 15:49:32.185363 progress 25% (1MB)
27 15:49:32.186779 progress 30% (1MB)
28 15:49:32.188185 progress 35% (1MB)
29 15:49:32.189808 progress 40% (2MB)
30 15:49:32.191215 progress 45% (2MB)
31 15:49:32.192615 progress 50% (2MB)
32 15:49:32.194060 progress 55% (2MB)
33 15:49:32.195628 progress 60% (3MB)
34 15:49:32.197029 progress 65% (3MB)
35 15:49:32.198442 progress 70% (3MB)
36 15:49:32.199845 progress 75% (3MB)
37 15:49:32.201452 progress 80% (4MB)
38 15:49:32.202858 progress 85% (4MB)
39 15:49:32.204338 progress 90% (4MB)
40 15:49:32.205840 progress 95% (4MB)
41 15:49:32.207427 progress 100% (5MB)
42 15:49:32.207612 5MB downloaded in 0.03s (164.89MB/s)
43 15:49:32.207771 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:49:32.208094 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:49:32.208192 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:49:32.208287 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:49:32.208399 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:49:32.208474 saving as /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/kernel/bzImage
50 15:49:32.208541 total size: 6815632 (6MB)
51 15:49:32.208636 No compression specified
52 15:49:32.209849 progress 0% (0MB)
53 15:49:32.211902 progress 5% (0MB)
54 15:49:32.213788 progress 10% (0MB)
55 15:49:32.215779 progress 15% (1MB)
56 15:49:32.217555 progress 20% (1MB)
57 15:49:32.219328 progress 25% (1MB)
58 15:49:32.221271 progress 30% (1MB)
59 15:49:32.223026 progress 35% (2MB)
60 15:49:32.224925 progress 40% (2MB)
61 15:49:32.226663 progress 45% (2MB)
62 15:49:32.228392 progress 50% (3MB)
63 15:49:32.230393 progress 55% (3MB)
64 15:49:32.232125 progress 60% (3MB)
65 15:49:32.234065 progress 65% (4MB)
66 15:49:32.235800 progress 70% (4MB)
67 15:49:32.237536 progress 75% (4MB)
68 15:49:32.239427 progress 80% (5MB)
69 15:49:32.241195 progress 85% (5MB)
70 15:49:32.243108 progress 90% (5MB)
71 15:49:32.244894 progress 95% (6MB)
72 15:49:32.246760 progress 100% (6MB)
73 15:49:32.247070 6MB downloaded in 0.04s (168.73MB/s)
74 15:49:32.247232 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:49:32.247495 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:49:32.247595 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:49:32.247691 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:49:32.247806 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:49:32.247886 saving as /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/nfsrootfs/full.rootfs.tar
81 15:49:32.247955 total size: 122682368 (116MB)
82 15:49:32.248022 Using unxz to decompress xz
83 15:49:32.251714 progress 0% (0MB)
84 15:49:32.736416 progress 5% (5MB)
85 15:49:33.237766 progress 10% (11MB)
86 15:49:33.744595 progress 15% (17MB)
87 15:49:34.253652 progress 20% (23MB)
88 15:49:34.602358 progress 25% (29MB)
89 15:49:34.974446 progress 30% (35MB)
90 15:49:35.233221 progress 35% (40MB)
91 15:49:35.464463 progress 40% (46MB)
92 15:49:35.845226 progress 45% (52MB)
93 15:49:36.236388 progress 50% (58MB)
94 15:49:36.610960 progress 55% (64MB)
95 15:49:36.992159 progress 60% (70MB)
96 15:49:37.352481 progress 65% (76MB)
97 15:49:37.767951 progress 70% (81MB)
98 15:49:38.214988 progress 75% (87MB)
99 15:49:38.665517 progress 80% (93MB)
100 15:49:38.790433 progress 85% (99MB)
101 15:49:38.970804 progress 90% (105MB)
102 15:49:39.330323 progress 95% (111MB)
103 15:49:39.732439 progress 100% (116MB)
104 15:49:39.739711 116MB downloaded in 7.49s (15.62MB/s)
105 15:49:39.740001 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:49:39.740313 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:49:39.740420 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:49:39.740521 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:49:39.740652 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:49:39.740734 saving as /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/modules/modules.tar
112 15:49:39.740804 total size: 51872 (0MB)
113 15:49:39.740875 Using unxz to decompress xz
114 15:49:39.744309 progress 63% (0MB)
115 15:49:39.744719 progress 100% (0MB)
116 15:49:39.748348 0MB downloaded in 0.01s (6.56MB/s)
117 15:49:39.748591 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:49:39.748882 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:49:39.748993 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 15:49:39.749113 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 15:49:41.632024 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300471/extract-nfsrootfs-nsvebl5e
123 15:49:41.632258 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:49:41.632405 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:49:41.632560 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76
126 15:49:41.632682 makedir: /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin
127 15:49:41.632784 makedir: /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/tests
128 15:49:41.632882 makedir: /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/results
129 15:49:41.632997 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-add-keys
130 15:49:41.633153 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-add-sources
131 15:49:41.633284 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-background-process-start
132 15:49:41.633410 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-background-process-stop
133 15:49:41.633533 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-common-functions
134 15:49:41.633654 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-echo-ipv4
135 15:49:41.633774 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-install-packages
136 15:49:41.633894 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-installed-packages
137 15:49:41.634012 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-os-build
138 15:49:41.634130 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-probe-channel
139 15:49:41.634249 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-probe-ip
140 15:49:41.634368 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-target-ip
141 15:49:41.634486 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-target-mac
142 15:49:41.634604 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-target-storage
143 15:49:41.634726 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-case
144 15:49:41.634848 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-event
145 15:49:41.634966 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-feedback
146 15:49:41.635085 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-raise
147 15:49:41.635203 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-reference
148 15:49:41.635322 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-runner
149 15:49:41.635442 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-set
150 15:49:41.635559 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-test-shell
151 15:49:41.635679 Updating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-install-packages (oe)
152 15:49:41.635802 Updating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/bin/lava-installed-packages (oe)
153 15:49:41.635908 Creating /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/environment
154 15:49:41.636002 LAVA metadata
155 15:49:41.636074 - LAVA_JOB_ID=7300471
156 15:49:41.636144 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:49:41.636252 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:49:41.636324 skipped lava-vland-overlay
159 15:49:41.636408 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:49:41.636497 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:49:41.636566 skipped lava-multinode-overlay
162 15:49:41.636671 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:49:41.636786 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:49:41.636899 Loading test definitions
165 15:49:41.637028 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:49:41.637241 Using /lava-7300471 at stage 0
167 15:49:41.637354 Fetching tests from https://github.com/kernelci/test-definitions
168 15:49:41.637453 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/0/tests/0_ltp-ipc'
169 15:49:46.927742 Running '/usr/bin/git checkout kernelci.org
170 15:49:47.075487 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 15:49:47.076273 uuid=7300471_1.5.2.3.1 testdef=None
172 15:49:47.076450 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 15:49:47.076740 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 15:49:47.077635 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:49:47.077900 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 15:49:47.079028 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:49:47.079313 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 15:49:47.080320 runner path: /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/0/tests/0_ltp-ipc test_uuid 7300471_1.5.2.3.1
182 15:49:47.080421 SKIPFILE='skipfile-lkft.yaml'
183 15:49:47.080494 SKIP_INSTALL='true'
184 15:49:47.080562 TST_CMDFILES='ipc'
185 15:49:47.080714 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:49:47.080960 Creating lava-test-runner.conf files
188 15:49:47.081034 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300471/lava-overlay-8go_mq76/lava-7300471/0 for stage 0
189 15:49:47.081166 - 0_ltp-ipc
190 15:49:47.081276 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 15:49:47.081376 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 15:49:55.032514 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 15:49:55.032690 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
194 15:49:55.032797 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:49:55.032908 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
196 15:49:55.033011 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
197 15:49:55.145316 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:49:55.145685 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
199 15:49:55.145806 extracting modules file /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300471/extract-nfsrootfs-nsvebl5e
200 15:49:55.150276 extracting modules file /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300471/extract-overlay-ramdisk-yg553v4i/ramdisk
201 15:49:55.154325 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:49:55.154443 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
203 15:49:55.154536 [common] Applying overlay to NFS
204 15:49:55.154613 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300471/compress-overlay-5peu4ss7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300471/extract-nfsrootfs-nsvebl5e
205 15:49:55.642804 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:49:55.642977 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 15:49:55.643085 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:49:55.643184 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 15:49:55.643277 Building ramdisk /var/lib/lava/dispatcher/tmp/7300471/extract-overlay-ramdisk-yg553v4i/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300471/extract-overlay-ramdisk-yg553v4i/ramdisk
210 15:49:55.680031 >> 24431 blocks
211 15:49:56.188280 rename /var/lib/lava/dispatcher/tmp/7300471/extract-overlay-ramdisk-yg553v4i/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
212 15:49:56.188713 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 15:49:56.188845 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
214 15:49:56.188957 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
215 15:49:56.189070 No mkimage arch provided, not using FIT.
216 15:49:56.189206 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:49:56.189299 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:49:56.189408 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 15:49:56.189512 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
220 15:49:56.189595 No LXC device requested
221 15:49:56.189687 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:49:56.189793 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
223 15:49:56.189886 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:49:56.189968 Checking files for TFTP limit of 4294967296 bytes.
225 15:49:56.190381 end: 1 tftp-deploy (duration 00:00:24) [common]
226 15:49:56.190497 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:49:56.190604 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:49:56.190745 substitutions:
229 15:49:56.190822 - {DTB}: None
230 15:49:56.190894 - {INITRD}: 7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
231 15:49:56.190960 - {KERNEL}: 7300471/tftp-deploy-skg0sxs1/kernel/bzImage
232 15:49:56.191025 - {LAVA_MAC}: None
233 15:49:56.191088 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300471/extract-nfsrootfs-nsvebl5e
234 15:49:56.191152 - {NFS_SERVER_IP}: 192.168.201.1
235 15:49:56.191213 - {PRESEED_CONFIG}: None
236 15:49:56.191274 - {PRESEED_LOCAL}: None
237 15:49:56.191334 - {RAMDISK}: 7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
238 15:49:56.191395 - {ROOT_PART}: None
239 15:49:56.191455 - {ROOT}: None
240 15:49:56.191515 - {SERVER_IP}: 192.168.201.1
241 15:49:56.191576 - {TEE}: None
242 15:49:56.191636 Parsed boot commands:
243 15:49:56.191696 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:49:56.191861 Parsed boot commands: tftpboot 192.168.201.1 7300471/tftp-deploy-skg0sxs1/kernel/bzImage 7300471/tftp-deploy-skg0sxs1/kernel/cmdline 7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
245 15:49:56.191962 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:49:56.192058 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:49:56.192157 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:49:56.192255 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:49:56.192332 Not connected, no need to disconnect.
250 15:49:56.192417 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:49:56.192507 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:49:56.192580 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 15:49:56.195693 Setting prompt string to ['lava-test: # ']
254 15:49:56.196005 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:49:56.196114 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:49:56.196221 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:49:56.196320 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:49:56.196518 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 15:49:56.218279 >> Command sent successfully.
260 15:49:56.220427 Returned 0 in 0 seconds
261 15:49:56.321588 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 15:49:56.322811 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 15:49:56.323227 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 15:49:56.323612 Setting prompt string to 'Starting depthcharge on Helios...'
266 15:49:56.323892 Changing prompt to 'Starting depthcharge on Helios...'
267 15:49:56.324180 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 15:49:56.325263 [Enter `^Ec?' for help]
269 15:50:03.442074
270 15:50:03.442669
271 15:50:03.451571 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 15:50:03.454852 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 15:50:03.461834 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 15:50:03.465171 CPU: AES supported, TXT NOT supported, VT supported
275 15:50:03.471699 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 15:50:03.475196 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 15:50:03.481510 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 15:50:03.484871 VBOOT: Loading verstage.
279 15:50:03.488240 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 15:50:03.494906 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 15:50:03.501194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 15:50:03.501883 CBFS @ c08000 size 3f8000
283 15:50:03.508317 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 15:50:03.511481 CBFS: Locating 'fallback/verstage'
285 15:50:03.515328 CBFS: Found @ offset 10fb80 size 1072c
286 15:50:03.518930
287 15:50:03.519414
288 15:50:03.528776 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 15:50:03.543011 Probing TPM: . done!
290 15:50:03.546366 TPM ready after 0 ms
291 15:50:03.549710 Connected to device vid:did:rid of 1ae0:0028:00
292 15:50:03.560068 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 15:50:03.563568 Initialized TPM device CR50 revision 0
294 15:50:03.609215 tlcl_send_startup: Startup return code is 0
295 15:50:03.609811 TPM: setup succeeded
296 15:50:03.623227 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 15:50:03.627112 Chrome EC: UHEPI supported
298 15:50:03.630250 Phase 1
299 15:50:03.633476 FMAP: area GBB found @ c05000 (12288 bytes)
300 15:50:03.640216 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 15:50:03.640770 Phase 2
302 15:50:03.643900 Phase 3
303 15:50:03.647024 FMAP: area GBB found @ c05000 (12288 bytes)
304 15:50:03.653600 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 15:50:03.660630 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 15:50:03.663465 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 15:50:03.670333 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 15:50:03.685821 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 15:50:03.689176 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 15:50:03.695761 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 15:50:03.700084 Phase 4
312 15:50:03.702947 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 15:50:03.710018 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 15:50:03.889235 VB2:vb2_rsa_verify_digest() Digest check failed!
315 15:50:03.896033 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 15:50:03.896481 Saving nvdata
317 15:50:03.899246 Reboot requested (10020007)
318 15:50:03.902476 board_reset() called!
319 15:50:03.903026 full_reset() called!
320 15:50:08.408606
321 15:50:08.408760
322 15:50:08.418812 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 15:50:08.421983 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 15:50:08.428541 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 15:50:08.432003 CPU: AES supported, TXT NOT supported, VT supported
326 15:50:08.438540 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 15:50:08.442015 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 15:50:08.448575 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 15:50:08.452077 VBOOT: Loading verstage.
330 15:50:08.455175 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 15:50:08.461968 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 15:50:08.465389 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 15:50:08.468338 CBFS @ c08000 size 3f8000
334 15:50:08.475246 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 15:50:08.478698 CBFS: Locating 'fallback/verstage'
336 15:50:08.481975 CBFS: Found @ offset 10fb80 size 1072c
337 15:50:08.485961
338 15:50:08.486057
339 15:50:08.495489 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 15:50:08.510045 Probing TPM: . done!
341 15:50:08.513293 TPM ready after 0 ms
342 15:50:08.516685 Connected to device vid:did:rid of 1ae0:0028:00
343 15:50:08.526785 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 15:50:08.529952 Initialized TPM device CR50 revision 0
345 15:50:08.576041 tlcl_send_startup: Startup return code is 0
346 15:50:08.576142 TPM: setup succeeded
347 15:50:08.588655 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 15:50:08.592420 Chrome EC: UHEPI supported
349 15:50:08.595806 Phase 1
350 15:50:08.599223 FMAP: area GBB found @ c05000 (12288 bytes)
351 15:50:08.606036 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 15:50:08.612398 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 15:50:08.615863 Recovery requested (1009000e)
354 15:50:08.621535 Saving nvdata
355 15:50:08.627711 tlcl_extend: response is 0
356 15:50:08.636418 tlcl_extend: response is 0
357 15:50:08.643748 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 15:50:08.646944 CBFS @ c08000 size 3f8000
359 15:50:08.653483 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 15:50:08.656789 CBFS: Locating 'fallback/romstage'
361 15:50:08.660401 CBFS: Found @ offset 80 size 145fc
362 15:50:08.663328 Accumulated console time in verstage 98 ms
363 15:50:08.663426
364 15:50:08.663502
365 15:50:08.676575 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 15:50:08.683404 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 15:50:08.686522 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 15:50:08.689980 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 15:50:08.696570 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 15:50:08.699568 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 15:50:08.703078 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 15:50:08.706120 TCO_STS: 0000 0000
373 15:50:08.709928 GEN_PMCON: e0015238 00000200
374 15:50:08.713241 GBLRST_CAUSE: 00000000 00000000
375 15:50:08.713350 prev_sleep_state 5
376 15:50:08.716416 Boot Count incremented to 28940
377 15:50:08.723313 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 15:50:08.726660 CBFS @ c08000 size 3f8000
379 15:50:08.733141 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 15:50:08.733238 CBFS: Locating 'fspm.bin'
381 15:50:08.739706 CBFS: Found @ offset 5ffc0 size 71000
382 15:50:08.743009 Chrome EC: UHEPI supported
383 15:50:08.749342 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 15:50:08.753210 Probing TPM: done!
385 15:50:08.760225 Connected to device vid:did:rid of 1ae0:0028:00
386 15:50:08.769620 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 15:50:08.776255 Initialized TPM device CR50 revision 0
388 15:50:08.785664 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 15:50:08.792475 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 15:50:08.795857 MRC cache found, size 1948
391 15:50:08.799156 bootmode is set to: 2
392 15:50:08.802829 PRMRR disabled by config.
393 15:50:08.805849 SPD INDEX = 1
394 15:50:08.808987 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 15:50:08.812169 CBFS @ c08000 size 3f8000
396 15:50:08.818699 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 15:50:08.818796 CBFS: Locating 'spd.bin'
398 15:50:08.822261 CBFS: Found @ offset 5fb80 size 400
399 15:50:08.825825 SPD: module type is LPDDR3
400 15:50:08.828786 SPD: module part is
401 15:50:08.835388 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 15:50:08.838666 SPD: device width 4 bits, bus width 8 bits
403 15:50:08.842404 SPD: module size is 4096 MB (per channel)
404 15:50:08.845618 memory slot: 0 configuration done.
405 15:50:08.848538 memory slot: 2 configuration done.
406 15:50:08.900223 CBMEM:
407 15:50:08.903505 IMD: root @ 99fff000 254 entries.
408 15:50:08.906705 IMD: root @ 99ffec00 62 entries.
409 15:50:08.909734 External stage cache:
410 15:50:08.912983 IMD: root @ 9abff000 254 entries.
411 15:50:08.916403 IMD: root @ 9abfec00 62 entries.
412 15:50:08.919821 Chrome EC: clear events_b mask to 0x0000000020004000
413 15:50:08.936889 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 15:50:08.951877 tlcl_write: response is 0
415 15:50:08.961578 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 15:50:08.968327 MRC: TPM MRC hash updated successfully.
417 15:50:08.968424 2 DIMMs found
418 15:50:08.971529 SMM Memory Map
419 15:50:08.975019 SMRAM : 0x9a000000 0x1000000
420 15:50:08.978059 Subregion 0: 0x9a000000 0xa00000
421 15:50:08.981469 Subregion 1: 0x9aa00000 0x200000
422 15:50:08.984941 Subregion 2: 0x9ac00000 0x400000
423 15:50:08.988142 top_of_ram = 0x9a000000
424 15:50:08.991589 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 15:50:08.998213 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 15:50:09.001582 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 15:50:09.008300 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 15:50:09.011352 CBFS @ c08000 size 3f8000
429 15:50:09.014914 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 15:50:09.018191 CBFS: Locating 'fallback/postcar'
431 15:50:09.024670 CBFS: Found @ offset 107000 size 4b44
432 15:50:09.027751 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 15:50:09.039923 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 15:50:09.043474 Processing 180 relocs. Offset value of 0x97c0c000
435 15:50:09.052072 Accumulated console time in romstage 286 ms
436 15:50:09.052161
437 15:50:09.052246
438 15:50:09.062118 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 15:50:09.068376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 15:50:09.071689 CBFS @ c08000 size 3f8000
441 15:50:09.075046 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 15:50:09.081676 CBFS: Locating 'fallback/ramstage'
443 15:50:09.084956 CBFS: Found @ offset 43380 size 1b9e8
444 15:50:09.091848 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 15:50:09.123659 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 15:50:09.127395 Processing 3976 relocs. Offset value of 0x98db0000
447 15:50:09.133742 Accumulated console time in postcar 52 ms
448 15:50:09.133833
449 15:50:09.133907
450 15:50:09.143563 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 15:50:09.150194 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 15:50:09.153501 WARNING: RO_VPD is uninitialized or empty.
453 15:50:09.156567 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 15:50:09.163441 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:50:09.163534 Normal boot.
456 15:50:09.170251 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 15:50:09.173522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 15:50:09.176940 CBFS @ c08000 size 3f8000
459 15:50:09.183327 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 15:50:09.186412 CBFS: Locating 'cpu_microcode_blob.bin'
461 15:50:09.189994 CBFS: Found @ offset 14700 size 2ec00
462 15:50:09.193309 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 15:50:09.196486 Skip microcode update
464 15:50:09.203291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 15:50:09.203378 CBFS @ c08000 size 3f8000
466 15:50:09.209700 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 15:50:09.213016 CBFS: Locating 'fsps.bin'
468 15:50:09.216572 CBFS: Found @ offset d1fc0 size 35000
469 15:50:09.241803 Detected 4 core, 8 thread CPU.
470 15:50:09.244932 Setting up SMI for CPU
471 15:50:09.248569 IED base = 0x9ac00000
472 15:50:09.248668 IED size = 0x00400000
473 15:50:09.251696 Will perform SMM setup.
474 15:50:09.258165 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 15:50:09.265234 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 15:50:09.268712 Processing 16 relocs. Offset value of 0x00030000
477 15:50:09.271756 Attempting to start 7 APs
478 15:50:09.275251 Waiting for 10ms after sending INIT.
479 15:50:09.291610 Waiting for 1st SIPI to complete...done.
480 15:50:09.291706 AP: slot 1 apic_id 1.
481 15:50:09.298184 Waiting for 2nd SIPI to complete...done.
482 15:50:09.298281 AP: slot 5 apic_id 5.
483 15:50:09.301415 AP: slot 4 apic_id 4.
484 15:50:09.304607 AP: slot 7 apic_id 6.
485 15:50:09.304703 AP: slot 6 apic_id 7.
486 15:50:09.307915 AP: slot 3 apic_id 3.
487 15:50:09.311290 AP: slot 2 apic_id 2.
488 15:50:09.318027 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 15:50:09.321394 Processing 13 relocs. Offset value of 0x00038000
490 15:50:09.327848 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 15:50:09.334759 Installing SMM handler to 0x9a000000
492 15:50:09.341162 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 15:50:09.344757 Processing 658 relocs. Offset value of 0x9a010000
494 15:50:09.354671 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 15:50:09.358013 Processing 13 relocs. Offset value of 0x9a008000
496 15:50:09.364158 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 15:50:09.371194 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 15:50:09.377600 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 15:50:09.381051 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 15:50:09.387821 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 15:50:09.393999 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 15:50:09.397382 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 15:50:09.404028 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 15:50:09.407782 Clearing SMI status registers
505 15:50:09.410685 SMI_STS: PM1
506 15:50:09.410781 PM1_STS: PWRBTN
507 15:50:09.414547 TCO_STS: SECOND_TO
508 15:50:09.417662 New SMBASE 0x9a000000
509 15:50:09.420904 In relocation handler: CPU 0
510 15:50:09.424117 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 15:50:09.427472 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 15:50:09.430597 Relocation complete.
513 15:50:09.433930 New SMBASE 0x99fffc00
514 15:50:09.434027 In relocation handler: CPU 1
515 15:50:09.440788 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
516 15:50:09.443885 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 15:50:09.447426 Relocation complete.
518 15:50:09.450755 New SMBASE 0x99ffe800
519 15:50:09.450854 In relocation handler: CPU 6
520 15:50:09.457229 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
521 15:50:09.460688 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 15:50:09.464128 Relocation complete.
523 15:50:09.464230 New SMBASE 0x99ffe400
524 15:50:09.467266 In relocation handler: CPU 7
525 15:50:09.473716 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
526 15:50:09.477341 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 15:50:09.480634 Relocation complete.
528 15:50:09.480729 New SMBASE 0x99fff000
529 15:50:09.484075 In relocation handler: CPU 4
530 15:50:09.490565 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
531 15:50:09.493967 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 15:50:09.497322 Relocation complete.
533 15:50:09.497418 New SMBASE 0x99ffec00
534 15:50:09.500706 In relocation handler: CPU 5
535 15:50:09.503930 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
536 15:50:09.510398 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 15:50:09.513722 Relocation complete.
538 15:50:09.513818 New SMBASE 0x99fff800
539 15:50:09.517102 In relocation handler: CPU 2
540 15:50:09.520368 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
541 15:50:09.526827 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 15:50:09.530277 Relocation complete.
543 15:50:09.530372 New SMBASE 0x99fff400
544 15:50:09.533696 In relocation handler: CPU 3
545 15:50:09.536839 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
546 15:50:09.543316 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 15:50:09.543414 Relocation complete.
548 15:50:09.546739 Initializing CPU #0
549 15:50:09.550168 CPU: vendor Intel device 806ec
550 15:50:09.553146 CPU: family 06, model 8e, stepping 0c
551 15:50:09.556530 Clearing out pending MCEs
552 15:50:09.559848 Setting up local APIC...
553 15:50:09.559943 apic_id: 0x00 done.
554 15:50:09.563169 Turbo is available but hidden
555 15:50:09.566798 Turbo is available and visible
556 15:50:09.569912 VMX status: enabled
557 15:50:09.573455 IA32_FEATURE_CONTROL status: locked
558 15:50:09.576845 Skip microcode update
559 15:50:09.576940 CPU #0 initialized
560 15:50:09.579833 Initializing CPU #1
561 15:50:09.583216 Initializing CPU #6
562 15:50:09.583311 Initializing CPU #4
563 15:50:09.586566 Initializing CPU #5
564 15:50:09.589863 CPU: vendor Intel device 806ec
565 15:50:09.593030 CPU: family 06, model 8e, stepping 0c
566 15:50:09.596414 Clearing out pending MCEs
567 15:50:09.596509 Initializing CPU #7
568 15:50:09.599529 CPU: vendor Intel device 806ec
569 15:50:09.602987 CPU: family 06, model 8e, stepping 0c
570 15:50:09.606758 CPU: vendor Intel device 806ec
571 15:50:09.609593 CPU: family 06, model 8e, stepping 0c
572 15:50:09.612815 Clearing out pending MCEs
573 15:50:09.616179 Clearing out pending MCEs
574 15:50:09.619589 Setting up local APIC...
575 15:50:09.622734 CPU: vendor Intel device 806ec
576 15:50:09.626399 CPU: family 06, model 8e, stepping 0c
577 15:50:09.629871 CPU: vendor Intel device 806ec
578 15:50:09.632718 CPU: family 06, model 8e, stepping 0c
579 15:50:09.636272 Clearing out pending MCEs
580 15:50:09.639388 Clearing out pending MCEs
581 15:50:09.639483 Setting up local APIC...
582 15:50:09.642642 apic_id: 0x07 done.
583 15:50:09.645801 Setting up local APIC...
584 15:50:09.645896 Initializing CPU #3
585 15:50:09.649467 Initializing CPU #2
586 15:50:09.652817 CPU: vendor Intel device 806ec
587 15:50:09.656043 CPU: family 06, model 8e, stepping 0c
588 15:50:09.659262 CPU: vendor Intel device 806ec
589 15:50:09.662602 CPU: family 06, model 8e, stepping 0c
590 15:50:09.665957 Clearing out pending MCEs
591 15:50:09.669411 Clearing out pending MCEs
592 15:50:09.672503 Setting up local APIC...
593 15:50:09.672597 VMX status: enabled
594 15:50:09.676000 apic_id: 0x06 done.
595 15:50:09.679233 IA32_FEATURE_CONTROL status: locked
596 15:50:09.682763 VMX status: enabled
597 15:50:09.682858 Skip microcode update
598 15:50:09.685606 IA32_FEATURE_CONTROL status: locked
599 15:50:09.689115 CPU #6 initialized
600 15:50:09.692447 Skip microcode update
601 15:50:09.692542 Setting up local APIC...
602 15:50:09.695413 CPU #7 initialized
603 15:50:09.698859 apic_id: 0x05 done.
604 15:50:09.698955 apic_id: 0x04 done.
605 15:50:09.702243 VMX status: enabled
606 15:50:09.702339 VMX status: enabled
607 15:50:09.708727 IA32_FEATURE_CONTROL status: locked
608 15:50:09.712158 IA32_FEATURE_CONTROL status: locked
609 15:50:09.712254 Skip microcode update
610 15:50:09.715717 Skip microcode update
611 15:50:09.718654 CPU #5 initialized
612 15:50:09.718751 CPU #4 initialized
613 15:50:09.722042 apic_id: 0x03 done.
614 15:50:09.725527 Setting up local APIC...
615 15:50:09.725624 Setting up local APIC...
616 15:50:09.728817 apic_id: 0x02 done.
617 15:50:09.732323 VMX status: enabled
618 15:50:09.732421 VMX status: enabled
619 15:50:09.735357 IA32_FEATURE_CONTROL status: locked
620 15:50:09.738682 IA32_FEATURE_CONTROL status: locked
621 15:50:09.742259 Skip microcode update
622 15:50:09.745681 Skip microcode update
623 15:50:09.745777 CPU #3 initialized
624 15:50:09.748611 CPU #2 initialized
625 15:50:09.748707 apic_id: 0x01 done.
626 15:50:09.752048 VMX status: enabled
627 15:50:09.755684 IA32_FEATURE_CONTROL status: locked
628 15:50:09.758580 Skip microcode update
629 15:50:09.761969 CPU #1 initialized
630 15:50:09.765352 bsp_do_flight_plan done after 465 msecs.
631 15:50:09.768976 CPU: frequency set to 4200 MHz
632 15:50:09.769078 Enabling SMIs.
633 15:50:09.771891 Locking SMM.
634 15:50:09.785200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 15:50:09.788677 CBFS @ c08000 size 3f8000
636 15:50:09.795296 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 15:50:09.795393 CBFS: Locating 'vbt.bin'
638 15:50:09.798882 CBFS: Found @ offset 5f5c0 size 499
639 15:50:09.805585 Found a VBT of 4608 bytes after decompression
640 15:50:09.989095 Display FSP Version Info HOB
641 15:50:09.992490 Reference Code - CPU = 9.0.1e.30
642 15:50:09.995883 uCode Version = 0.0.0.ca
643 15:50:09.998969 TXT ACM version = ff.ff.ff.ffff
644 15:50:10.002380 Display FSP Version Info HOB
645 15:50:10.006092 Reference Code - ME = 9.0.1e.30
646 15:50:10.009192 MEBx version = 0.0.0.0
647 15:50:10.012440 ME Firmware Version = Consumer SKU
648 15:50:10.015666 Display FSP Version Info HOB
649 15:50:10.018893 Reference Code - CML PCH = 9.0.1e.30
650 15:50:10.022696 PCH-CRID Status = Disabled
651 15:50:10.025404 PCH-CRID Original Value = ff.ff.ff.ffff
652 15:50:10.029036 PCH-CRID New Value = ff.ff.ff.ffff
653 15:50:10.032181 OPROM - RST - RAID = ff.ff.ff.ffff
654 15:50:10.035517 ChipsetInit Base Version = ff.ff.ff.ffff
655 15:50:10.038962 ChipsetInit Oem Version = ff.ff.ff.ffff
656 15:50:10.042031 Display FSP Version Info HOB
657 15:50:10.048984 Reference Code - SA - System Agent = 9.0.1e.30
658 15:50:10.052203 Reference Code - MRC = 0.7.1.6c
659 15:50:10.052301 SA - PCIe Version = 9.0.1e.30
660 15:50:10.055419 SA-CRID Status = Disabled
661 15:50:10.058805 SA-CRID Original Value = 0.0.0.c
662 15:50:10.061933 SA-CRID New Value = 0.0.0.c
663 15:50:10.065042 OPROM - VBIOS = ff.ff.ff.ffff
664 15:50:10.068839 RTC Init
665 15:50:10.071691 Set power on after power failure.
666 15:50:10.071786 Disabling Deep S3
667 15:50:10.075210 Disabling Deep S3
668 15:50:10.075307 Disabling Deep S4
669 15:50:10.078477 Disabling Deep S4
670 15:50:10.081701 Disabling Deep S5
671 15:50:10.081794 Disabling Deep S5
672 15:50:10.088535 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
673 15:50:10.088628 Enumerating buses...
674 15:50:10.094955 Show all devs... Before device enumeration.
675 15:50:10.098109 Root Device: enabled 1
676 15:50:10.098205 CPU_CLUSTER: 0: enabled 1
677 15:50:10.101655 DOMAIN: 0000: enabled 1
678 15:50:10.105076 APIC: 00: enabled 1
679 15:50:10.105172 PCI: 00:00.0: enabled 1
680 15:50:10.107967 PCI: 00:02.0: enabled 1
681 15:50:10.111676 PCI: 00:04.0: enabled 0
682 15:50:10.115163 PCI: 00:05.0: enabled 0
683 15:50:10.115251 PCI: 00:12.0: enabled 1
684 15:50:10.118277 PCI: 00:12.5: enabled 0
685 15:50:10.121381 PCI: 00:12.6: enabled 0
686 15:50:10.125035 PCI: 00:14.0: enabled 1
687 15:50:10.125131 PCI: 00:14.1: enabled 0
688 15:50:10.128417 PCI: 00:14.3: enabled 1
689 15:50:10.131703 PCI: 00:14.5: enabled 0
690 15:50:10.131795 PCI: 00:15.0: enabled 1
691 15:50:10.134936 PCI: 00:15.1: enabled 1
692 15:50:10.138312 PCI: 00:15.2: enabled 0
693 15:50:10.141487 PCI: 00:15.3: enabled 0
694 15:50:10.141577 PCI: 00:16.0: enabled 1
695 15:50:10.144665 PCI: 00:16.1: enabled 0
696 15:50:10.147953 PCI: 00:16.2: enabled 0
697 15:50:10.151510 PCI: 00:16.3: enabled 0
698 15:50:10.151603 PCI: 00:16.4: enabled 0
699 15:50:10.154634 PCI: 00:16.5: enabled 0
700 15:50:10.157926 PCI: 00:17.0: enabled 1
701 15:50:10.161329 PCI: 00:19.0: enabled 1
702 15:50:10.161426 PCI: 00:19.1: enabled 0
703 15:50:10.164681 PCI: 00:19.2: enabled 0
704 15:50:10.167712 PCI: 00:1a.0: enabled 0
705 15:50:10.167808 PCI: 00:1c.0: enabled 0
706 15:50:10.171184 PCI: 00:1c.1: enabled 0
707 15:50:10.174639 PCI: 00:1c.2: enabled 0
708 15:50:10.177680 PCI: 00:1c.3: enabled 0
709 15:50:10.177777 PCI: 00:1c.4: enabled 0
710 15:50:10.181385 PCI: 00:1c.5: enabled 0
711 15:50:10.184226 PCI: 00:1c.6: enabled 0
712 15:50:10.187536 PCI: 00:1c.7: enabled 0
713 15:50:10.187633 PCI: 00:1d.0: enabled 1
714 15:50:10.190969 PCI: 00:1d.1: enabled 0
715 15:50:10.194481 PCI: 00:1d.2: enabled 0
716 15:50:10.197902 PCI: 00:1d.3: enabled 0
717 15:50:10.197999 PCI: 00:1d.4: enabled 0
718 15:50:10.201069 PCI: 00:1d.5: enabled 1
719 15:50:10.204157 PCI: 00:1e.0: enabled 1
720 15:50:10.204253 PCI: 00:1e.1: enabled 0
721 15:50:10.207651 PCI: 00:1e.2: enabled 1
722 15:50:10.210933 PCI: 00:1e.3: enabled 1
723 15:50:10.214629 PCI: 00:1f.0: enabled 1
724 15:50:10.214726 PCI: 00:1f.1: enabled 1
725 15:50:10.217662 PCI: 00:1f.2: enabled 1
726 15:50:10.220936 PCI: 00:1f.3: enabled 1
727 15:50:10.224279 PCI: 00:1f.4: enabled 1
728 15:50:10.224377 PCI: 00:1f.5: enabled 1
729 15:50:10.227506 PCI: 00:1f.6: enabled 0
730 15:50:10.230782 USB0 port 0: enabled 1
731 15:50:10.230880 I2C: 00:15: enabled 1
732 15:50:10.234129 I2C: 00:5d: enabled 1
733 15:50:10.237313 GENERIC: 0.0: enabled 1
734 15:50:10.240813 I2C: 00:1a: enabled 1
735 15:50:10.240908 I2C: 00:38: enabled 1
736 15:50:10.244108 I2C: 00:39: enabled 1
737 15:50:10.247186 I2C: 00:3a: enabled 1
738 15:50:10.247282 I2C: 00:3b: enabled 1
739 15:50:10.250488 PCI: 00:00.0: enabled 1
740 15:50:10.254226 SPI: 00: enabled 1
741 15:50:10.254322 SPI: 01: enabled 1
742 15:50:10.257426 PNP: 0c09.0: enabled 1
743 15:50:10.260737 USB2 port 0: enabled 1
744 15:50:10.260833 USB2 port 1: enabled 1
745 15:50:10.264097 USB2 port 2: enabled 0
746 15:50:10.267046 USB2 port 3: enabled 0
747 15:50:10.267143 USB2 port 5: enabled 0
748 15:50:10.270511 USB2 port 6: enabled 1
749 15:50:10.273693 USB2 port 9: enabled 1
750 15:50:10.277305 USB3 port 0: enabled 1
751 15:50:10.277402 USB3 port 1: enabled 1
752 15:50:10.280584 USB3 port 2: enabled 1
753 15:50:10.283866 USB3 port 3: enabled 1
754 15:50:10.283962 USB3 port 4: enabled 0
755 15:50:10.287385 APIC: 01: enabled 1
756 15:50:10.290675 APIC: 02: enabled 1
757 15:50:10.290771 APIC: 03: enabled 1
758 15:50:10.293617 APIC: 04: enabled 1
759 15:50:10.293712 APIC: 05: enabled 1
760 15:50:10.297026 APIC: 07: enabled 1
761 15:50:10.300289 APIC: 06: enabled 1
762 15:50:10.300385 Compare with tree...
763 15:50:10.304038 Root Device: enabled 1
764 15:50:10.307298 CPU_CLUSTER: 0: enabled 1
765 15:50:10.307395 APIC: 00: enabled 1
766 15:50:10.310275 APIC: 01: enabled 1
767 15:50:10.313624 APIC: 02: enabled 1
768 15:50:10.316863 APIC: 03: enabled 1
769 15:50:10.316958 APIC: 04: enabled 1
770 15:50:10.320244 APIC: 05: enabled 1
771 15:50:10.323852 APIC: 07: enabled 1
772 15:50:10.323948 APIC: 06: enabled 1
773 15:50:10.326895 DOMAIN: 0000: enabled 1
774 15:50:10.330060 PCI: 00:00.0: enabled 1
775 15:50:10.333600 PCI: 00:02.0: enabled 1
776 15:50:10.333696 PCI: 00:04.0: enabled 0
777 15:50:10.336875 PCI: 00:05.0: enabled 0
778 15:50:10.340059 PCI: 00:12.0: enabled 1
779 15:50:10.343428 PCI: 00:12.5: enabled 0
780 15:50:10.346992 PCI: 00:12.6: enabled 0
781 15:50:10.347089 PCI: 00:14.0: enabled 1
782 15:50:10.350197 USB0 port 0: enabled 1
783 15:50:10.353454 USB2 port 0: enabled 1
784 15:50:10.356655 USB2 port 1: enabled 1
785 15:50:10.360228 USB2 port 2: enabled 0
786 15:50:10.360325 USB2 port 3: enabled 0
787 15:50:10.363263 USB2 port 5: enabled 0
788 15:50:10.366531 USB2 port 6: enabled 1
789 15:50:10.369766 USB2 port 9: enabled 1
790 15:50:10.373107 USB3 port 0: enabled 1
791 15:50:10.376406 USB3 port 1: enabled 1
792 15:50:10.376502 USB3 port 2: enabled 1
793 15:50:10.380297 USB3 port 3: enabled 1
794 15:50:10.383177 USB3 port 4: enabled 0
795 15:50:10.386430 PCI: 00:14.1: enabled 0
796 15:50:10.389769 PCI: 00:14.3: enabled 1
797 15:50:10.389865 PCI: 00:14.5: enabled 0
798 15:50:10.393298 PCI: 00:15.0: enabled 1
799 15:50:10.396596 I2C: 00:15: enabled 1
800 15:50:10.399945 PCI: 00:15.1: enabled 1
801 15:50:10.400042 I2C: 00:5d: enabled 1
802 15:50:10.402765 GENERIC: 0.0: enabled 1
803 15:50:10.406195 PCI: 00:15.2: enabled 0
804 15:50:10.409501 PCI: 00:15.3: enabled 0
805 15:50:10.412858 PCI: 00:16.0: enabled 1
806 15:50:10.412954 PCI: 00:16.1: enabled 0
807 15:50:10.416510 PCI: 00:16.2: enabled 0
808 15:50:10.419688 PCI: 00:16.3: enabled 0
809 15:50:10.422803 PCI: 00:16.4: enabled 0
810 15:50:10.426103 PCI: 00:16.5: enabled 0
811 15:50:10.426199 PCI: 00:17.0: enabled 1
812 15:50:10.429916 PCI: 00:19.0: enabled 1
813 15:50:10.432970 I2C: 00:1a: enabled 1
814 15:50:10.436358 I2C: 00:38: enabled 1
815 15:50:10.439698 I2C: 00:39: enabled 1
816 15:50:10.439795 I2C: 00:3a: enabled 1
817 15:50:10.442961 I2C: 00:3b: enabled 1
818 15:50:10.446152 PCI: 00:19.1: enabled 0
819 15:50:10.449494 PCI: 00:19.2: enabled 0
820 15:50:10.449591 PCI: 00:1a.0: enabled 0
821 15:50:10.452749 PCI: 00:1c.0: enabled 0
822 15:50:10.456401 PCI: 00:1c.1: enabled 0
823 15:50:10.459475 PCI: 00:1c.2: enabled 0
824 15:50:10.462729 PCI: 00:1c.3: enabled 0
825 15:50:10.462825 PCI: 00:1c.4: enabled 0
826 15:50:10.466038 PCI: 00:1c.5: enabled 0
827 15:50:10.469254 PCI: 00:1c.6: enabled 0
828 15:50:10.472676 PCI: 00:1c.7: enabled 0
829 15:50:10.475763 PCI: 00:1d.0: enabled 1
830 15:50:10.475858 PCI: 00:1d.1: enabled 0
831 15:50:10.479118 PCI: 00:1d.2: enabled 0
832 15:50:10.482682 PCI: 00:1d.3: enabled 0
833 15:50:10.486000 PCI: 00:1d.4: enabled 0
834 15:50:10.489002 PCI: 00:1d.5: enabled 1
835 15:50:10.489104 PCI: 00:00.0: enabled 1
836 15:50:10.492531 PCI: 00:1e.0: enabled 1
837 15:50:10.496042 PCI: 00:1e.1: enabled 0
838 15:50:10.499244 PCI: 00:1e.2: enabled 1
839 15:50:10.499340 SPI: 00: enabled 1
840 15:50:10.502510 PCI: 00:1e.3: enabled 1
841 15:50:10.505832 SPI: 01: enabled 1
842 15:50:10.508959 PCI: 00:1f.0: enabled 1
843 15:50:10.509055 PNP: 0c09.0: enabled 1
844 15:50:10.512368 PCI: 00:1f.1: enabled 1
845 15:50:10.515629 PCI: 00:1f.2: enabled 1
846 15:50:10.519050 PCI: 00:1f.3: enabled 1
847 15:50:10.522100 PCI: 00:1f.4: enabled 1
848 15:50:10.522195 PCI: 00:1f.5: enabled 1
849 15:50:10.525490 PCI: 00:1f.6: enabled 0
850 15:50:10.528841 Root Device scanning...
851 15:50:10.532478 scan_static_bus for Root Device
852 15:50:10.535880 CPU_CLUSTER: 0 enabled
853 15:50:10.535976 DOMAIN: 0000 enabled
854 15:50:10.539051 DOMAIN: 0000 scanning...
855 15:50:10.542171 PCI: pci_scan_bus for bus 00
856 15:50:10.545797 PCI: 00:00.0 [8086/0000] ops
857 15:50:10.548957 PCI: 00:00.0 [8086/9b61] enabled
858 15:50:10.552185 PCI: 00:02.0 [8086/0000] bus ops
859 15:50:10.555716 PCI: 00:02.0 [8086/9b41] enabled
860 15:50:10.558811 PCI: 00:04.0 [8086/1903] disabled
861 15:50:10.561999 PCI: 00:08.0 [8086/1911] enabled
862 15:50:10.565375 PCI: 00:12.0 [8086/02f9] enabled
863 15:50:10.568572 PCI: 00:14.0 [8086/0000] bus ops
864 15:50:10.572346 PCI: 00:14.0 [8086/02ed] enabled
865 15:50:10.575504 PCI: 00:14.2 [8086/02ef] enabled
866 15:50:10.578639 PCI: 00:14.3 [8086/02f0] enabled
867 15:50:10.581880 PCI: 00:15.0 [8086/0000] bus ops
868 15:50:10.585281 PCI: 00:15.0 [8086/02e8] enabled
869 15:50:10.588556 PCI: 00:15.1 [8086/0000] bus ops
870 15:50:10.592198 PCI: 00:15.1 [8086/02e9] enabled
871 15:50:10.595174 PCI: 00:16.0 [8086/0000] ops
872 15:50:10.598762 PCI: 00:16.0 [8086/02e0] enabled
873 15:50:10.601867 PCI: 00:17.0 [8086/0000] ops
874 15:50:10.605232 PCI: 00:17.0 [8086/02d3] enabled
875 15:50:10.608605 PCI: 00:19.0 [8086/0000] bus ops
876 15:50:10.611824 PCI: 00:19.0 [8086/02c5] enabled
877 15:50:10.615139 PCI: 00:1d.0 [8086/0000] bus ops
878 15:50:10.618478 PCI: 00:1d.0 [8086/02b0] enabled
879 15:50:10.624936 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 15:50:10.625035 PCI: 00:1e.0 [8086/0000] ops
881 15:50:10.628442 PCI: 00:1e.0 [8086/02a8] enabled
882 15:50:10.631833 PCI: 00:1e.2 [8086/0000] bus ops
883 15:50:10.634944 PCI: 00:1e.2 [8086/02aa] enabled
884 15:50:10.638449 PCI: 00:1e.3 [8086/0000] bus ops
885 15:50:10.641684 PCI: 00:1e.3 [8086/02ab] enabled
886 15:50:10.644951 PCI: 00:1f.0 [8086/0000] bus ops
887 15:50:10.648375 PCI: 00:1f.0 [8086/0284] enabled
888 15:50:10.655051 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 15:50:10.661804 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 15:50:10.665095 PCI: 00:1f.3 [8086/0000] bus ops
891 15:50:10.667967 PCI: 00:1f.3 [8086/02c8] enabled
892 15:50:10.671286 PCI: 00:1f.4 [8086/0000] bus ops
893 15:50:10.674905 PCI: 00:1f.4 [8086/02a3] enabled
894 15:50:10.677922 PCI: 00:1f.5 [8086/0000] bus ops
895 15:50:10.681387 PCI: 00:1f.5 [8086/02a4] enabled
896 15:50:10.684753 PCI: Leftover static devices:
897 15:50:10.684849 PCI: 00:05.0
898 15:50:10.688232 PCI: 00:12.5
899 15:50:10.688328 PCI: 00:12.6
900 15:50:10.688404 PCI: 00:14.1
901 15:50:10.691041 PCI: 00:14.5
902 15:50:10.691137 PCI: 00:15.2
903 15:50:10.694691 PCI: 00:15.3
904 15:50:10.694786 PCI: 00:16.1
905 15:50:10.698168 PCI: 00:16.2
906 15:50:10.698264 PCI: 00:16.3
907 15:50:10.698339 PCI: 00:16.4
908 15:50:10.701120 PCI: 00:16.5
909 15:50:10.701216 PCI: 00:19.1
910 15:50:10.704519 PCI: 00:19.2
911 15:50:10.704614 PCI: 00:1a.0
912 15:50:10.704689 PCI: 00:1c.0
913 15:50:10.707985 PCI: 00:1c.1
914 15:50:10.708080 PCI: 00:1c.2
915 15:50:10.711269 PCI: 00:1c.3
916 15:50:10.711365 PCI: 00:1c.4
917 15:50:10.711440 PCI: 00:1c.5
918 15:50:10.714382 PCI: 00:1c.6
919 15:50:10.714478 PCI: 00:1c.7
920 15:50:10.717696 PCI: 00:1d.1
921 15:50:10.717792 PCI: 00:1d.2
922 15:50:10.721046 PCI: 00:1d.3
923 15:50:10.721148 PCI: 00:1d.4
924 15:50:10.721223 PCI: 00:1d.5
925 15:50:10.724261 PCI: 00:1e.1
926 15:50:10.724357 PCI: 00:1f.1
927 15:50:10.727760 PCI: 00:1f.2
928 15:50:10.727856 PCI: 00:1f.6
929 15:50:10.731130 PCI: Check your devicetree.cb.
930 15:50:10.734606 PCI: 00:02.0 scanning...
931 15:50:10.738006 scan_generic_bus for PCI: 00:02.0
932 15:50:10.740804 scan_generic_bus for PCI: 00:02.0 done
933 15:50:10.747836 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
934 15:50:10.747933 PCI: 00:14.0 scanning...
935 15:50:10.750994 scan_static_bus for PCI: 00:14.0
936 15:50:10.754343 USB0 port 0 enabled
937 15:50:10.757662 USB0 port 0 scanning...
938 15:50:10.760805 scan_static_bus for USB0 port 0
939 15:50:10.764085 USB2 port 0 enabled
940 15:50:10.764181 USB2 port 1 enabled
941 15:50:10.767775 USB2 port 2 disabled
942 15:50:10.767871 USB2 port 3 disabled
943 15:50:10.770793 USB2 port 5 disabled
944 15:50:10.774324 USB2 port 6 enabled
945 15:50:10.774422 USB2 port 9 enabled
946 15:50:10.777351 USB3 port 0 enabled
947 15:50:10.780956 USB3 port 1 enabled
948 15:50:10.781051 USB3 port 2 enabled
949 15:50:10.784353 USB3 port 3 enabled
950 15:50:10.784448 USB3 port 4 disabled
951 15:50:10.787286 USB2 port 0 scanning...
952 15:50:10.790778 scan_static_bus for USB2 port 0
953 15:50:10.793933 scan_static_bus for USB2 port 0 done
954 15:50:10.800661 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
955 15:50:10.804296 USB2 port 1 scanning...
956 15:50:10.807367 scan_static_bus for USB2 port 1
957 15:50:10.810790 scan_static_bus for USB2 port 1 done
958 15:50:10.813918 scan_bus: scanning of bus USB2 port 1 took 9687 usecs
959 15:50:10.817383 USB2 port 6 scanning...
960 15:50:10.820548 scan_static_bus for USB2 port 6
961 15:50:10.823844 scan_static_bus for USB2 port 6 done
962 15:50:10.830777 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
963 15:50:10.834122 USB2 port 9 scanning...
964 15:50:10.837628 scan_static_bus for USB2 port 9
965 15:50:10.840387 scan_static_bus for USB2 port 9 done
966 15:50:10.847513 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
967 15:50:10.847693 USB3 port 0 scanning...
968 15:50:10.850733 scan_static_bus for USB3 port 0
969 15:50:10.853870 scan_static_bus for USB3 port 0 done
970 15:50:10.860733 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
971 15:50:10.863751 USB3 port 1 scanning...
972 15:50:10.867003 scan_static_bus for USB3 port 1
973 15:50:10.870407 scan_static_bus for USB3 port 1 done
974 15:50:10.876949 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
975 15:50:10.877415 USB3 port 2 scanning...
976 15:50:10.880669 scan_static_bus for USB3 port 2
977 15:50:10.887080 scan_static_bus for USB3 port 2 done
978 15:50:10.890469 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
979 15:50:10.893849 USB3 port 3 scanning...
980 15:50:10.897198 scan_static_bus for USB3 port 3
981 15:50:10.900584 scan_static_bus for USB3 port 3 done
982 15:50:10.906996 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
983 15:50:10.910395 scan_static_bus for USB0 port 0 done
984 15:50:10.913761 scan_bus: scanning of bus USB0 port 0 took 155327 usecs
985 15:50:10.920301 scan_static_bus for PCI: 00:14.0 done
986 15:50:10.923506 scan_bus: scanning of bus PCI: 00:14.0 took 172943 usecs
987 15:50:10.926983 PCI: 00:15.0 scanning...
988 15:50:10.930105 scan_generic_bus for PCI: 00:15.0
989 15:50:10.933924 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 15:50:10.940006 scan_generic_bus for PCI: 00:15.0 done
991 15:50:10.943629 scan_bus: scanning of bus PCI: 00:15.0 took 14286 usecs
992 15:50:10.946755 PCI: 00:15.1 scanning...
993 15:50:10.950210 scan_generic_bus for PCI: 00:15.1
994 15:50:10.953533 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 15:50:10.960059 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 15:50:10.963373 scan_generic_bus for PCI: 00:15.1 done
997 15:50:10.970207 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
998 15:50:10.970692 PCI: 00:19.0 scanning...
999 15:50:10.973445 scan_generic_bus for PCI: 00:19.0
1000 15:50:10.980462 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 15:50:10.983770 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 15:50:10.986516 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 15:50:10.989769 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 15:50:10.996799 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 15:50:11.000095 scan_generic_bus for PCI: 00:19.0 done
1006 15:50:11.003219 scan_bus: scanning of bus PCI: 00:19.0 took 30726 usecs
1007 15:50:11.006605 PCI: 00:1d.0 scanning...
1008 15:50:11.010247 do_pci_scan_bridge for PCI: 00:1d.0
1009 15:50:11.013435 PCI: pci_scan_bus for bus 01
1010 15:50:11.017002 PCI: 01:00.0 [1c5c/1327] enabled
1011 15:50:11.019666 Enabling Common Clock Configuration
1012 15:50:11.026601 L1 Sub-State supported from root port 29
1013 15:50:11.027043 L1 Sub-State Support = 0xf
1014 15:50:11.029822 CommonModeRestoreTime = 0x28
1015 15:50:11.037014 Power On Value = 0x16, Power On Scale = 0x0
1016 15:50:11.037601 ASPM: Enabled L1
1017 15:50:11.043174 scan_bus: scanning of bus PCI: 00:1d.0 took 32773 usecs
1018 15:50:11.046089 PCI: 00:1e.2 scanning...
1019 15:50:11.049593 scan_generic_bus for PCI: 00:1e.2
1020 15:50:11.052721 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 15:50:11.056312 scan_generic_bus for PCI: 00:1e.2 done
1022 15:50:11.063016 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1023 15:50:11.066209 PCI: 00:1e.3 scanning...
1024 15:50:11.069578 scan_generic_bus for PCI: 00:1e.3
1025 15:50:11.073185 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 15:50:11.076255 scan_generic_bus for PCI: 00:1e.3 done
1027 15:50:11.082820 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1028 15:50:11.083397 PCI: 00:1f.0 scanning...
1029 15:50:11.086175 scan_static_bus for PCI: 00:1f.0
1030 15:50:11.089277 PNP: 0c09.0 enabled
1031 15:50:11.093119 scan_static_bus for PCI: 00:1f.0 done
1032 15:50:11.099563 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1033 15:50:11.103399 PCI: 00:1f.3 scanning...
1034 15:50:11.105999 scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs
1035 15:50:11.109673 PCI: 00:1f.4 scanning...
1036 15:50:11.112874 scan_generic_bus for PCI: 00:1f.4
1037 15:50:11.115912 scan_generic_bus for PCI: 00:1f.4 done
1038 15:50:11.122568 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1039 15:50:11.126012 PCI: 00:1f.5 scanning...
1040 15:50:11.129562 scan_generic_bus for PCI: 00:1f.5
1041 15:50:11.132900 scan_generic_bus for PCI: 00:1f.5 done
1042 15:50:11.139272 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1043 15:50:11.145613 scan_bus: scanning of bus DOMAIN: 0000 took 604852 usecs
1044 15:50:11.149167 scan_static_bus for Root Device done
1045 15:50:11.152148 scan_bus: scanning of bus Root Device took 624725 usecs
1046 15:50:11.156282 done
1047 15:50:11.159170 Chrome EC: UHEPI supported
1048 15:50:11.162461 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 15:50:11.169052 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 15:50:11.175623 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 15:50:11.182639 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 15:50:11.185722 SPI flash protection: WPSW=0 SRP0=0
1053 15:50:11.192279 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 15:50:11.195779 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 15:50:11.199097 found VGA at PCI: 00:02.0
1056 15:50:11.202513 Setting up VGA for PCI: 00:02.0
1057 15:50:11.208698 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 15:50:11.212268 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 15:50:11.215724 Allocating resources...
1060 15:50:11.218971 Reading resources...
1061 15:50:11.222245 Root Device read_resources bus 0 link: 0
1062 15:50:11.225346 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 15:50:11.232518 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 15:50:11.235689 DOMAIN: 0000 read_resources bus 0 link: 0
1065 15:50:11.242001 PCI: 00:14.0 read_resources bus 0 link: 0
1066 15:50:11.245521 USB0 port 0 read_resources bus 0 link: 0
1067 15:50:11.253618 USB0 port 0 read_resources bus 0 link: 0 done
1068 15:50:11.257292 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 15:50:11.264270 PCI: 00:15.0 read_resources bus 1 link: 0
1070 15:50:11.267458 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 15:50:11.274455 PCI: 00:15.1 read_resources bus 2 link: 0
1072 15:50:11.277492 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 15:50:11.285099 PCI: 00:19.0 read_resources bus 3 link: 0
1074 15:50:11.291462 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 15:50:11.295008 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 15:50:11.301834 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 15:50:11.304775 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 15:50:11.311318 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 15:50:11.315015 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 15:50:11.321656 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 15:50:11.324598 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 15:50:11.331677 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 15:50:11.337664 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 15:50:11.341288 Root Device read_resources bus 0 link: 0 done
1085 15:50:11.344555 Done reading resources.
1086 15:50:11.351196 Show resources in subtree (Root Device)...After reading.
1087 15:50:11.354338 Root Device child on link 0 CPU_CLUSTER: 0
1088 15:50:11.357601 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 15:50:11.358095 APIC: 00
1090 15:50:11.361439 APIC: 01
1091 15:50:11.362048 APIC: 02
1092 15:50:11.364524 APIC: 03
1093 15:50:11.365052 APIC: 04
1094 15:50:11.365475 APIC: 05
1095 15:50:11.367974 APIC: 07
1096 15:50:11.368462 APIC: 06
1097 15:50:11.371355 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 15:50:11.427834 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 15:50:11.428446 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 15:50:11.428843 PCI: 00:00.0
1101 15:50:11.429690 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 15:50:11.430108 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 15:50:11.430473 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 15:50:11.477365 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 15:50:11.477990 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 15:50:11.478823 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 15:50:11.479230 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 15:50:11.479588 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 15:50:11.480355 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 15:50:11.503839 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 15:50:11.504861 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 15:50:11.507709 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 15:50:11.514239 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 15:50:11.524341 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 15:50:11.534334 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 15:50:11.544008 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 15:50:11.544608 PCI: 00:02.0
1118 15:50:11.553733 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 15:50:11.566940 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 15:50:11.573725 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 15:50:11.577236 PCI: 00:04.0
1122 15:50:11.577833 PCI: 00:08.0
1123 15:50:11.587121 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 15:50:11.590101 PCI: 00:12.0
1125 15:50:11.600102 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 15:50:11.603361 PCI: 00:14.0 child on link 0 USB0 port 0
1127 15:50:11.613355 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 15:50:11.616868 USB0 port 0 child on link 0 USB2 port 0
1129 15:50:11.620246 USB2 port 0
1130 15:50:11.620842 USB2 port 1
1131 15:50:11.623474 USB2 port 2
1132 15:50:11.624064 USB2 port 3
1133 15:50:11.626684 USB2 port 5
1134 15:50:11.627178 USB2 port 6
1135 15:50:11.629974 USB2 port 9
1136 15:50:11.630566 USB3 port 0
1137 15:50:11.633459 USB3 port 1
1138 15:50:11.636742 USB3 port 2
1139 15:50:11.637406 USB3 port 3
1140 15:50:11.640156 USB3 port 4
1141 15:50:11.640758 PCI: 00:14.2
1142 15:50:11.649708 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 15:50:11.659322 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 15:50:11.663078 PCI: 00:14.3
1145 15:50:11.673129 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 15:50:11.676229 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 15:50:11.686223 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 15:50:11.686822 I2C: 01:15
1149 15:50:11.692841 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 15:50:11.702448 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 15:50:11.703048 I2C: 02:5d
1152 15:50:11.705961 GENERIC: 0.0
1153 15:50:11.706453 PCI: 00:16.0
1154 15:50:11.716088 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 15:50:11.719663 PCI: 00:17.0
1156 15:50:11.725995 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 15:50:11.735611 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 15:50:11.745772 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 15:50:11.752318 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 15:50:11.762063 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 15:50:11.768588 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 15:50:11.775392 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 15:50:11.785259 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 15:50:11.785856 I2C: 03:1a
1165 15:50:11.788718 I2C: 03:38
1166 15:50:11.789332 I2C: 03:39
1167 15:50:11.791989 I2C: 03:3a
1168 15:50:11.792582 I2C: 03:3b
1169 15:50:11.795524 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 15:50:11.805460 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 15:50:11.815139 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 15:50:11.825618 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 15:50:11.826212 PCI: 01:00.0
1174 15:50:11.835237 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 15:50:11.838676 PCI: 00:1e.0
1176 15:50:11.848019 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 15:50:11.858178 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 15:50:11.861659 PCI: 00:1e.2 child on link 0 SPI: 00
1179 15:50:11.871431 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 15:50:11.874994 SPI: 00
1181 15:50:11.878260 PCI: 00:1e.3 child on link 0 SPI: 01
1182 15:50:11.887960 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 15:50:11.888533 SPI: 01
1184 15:50:11.895039 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 15:50:11.901450 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 15:50:11.910959 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 15:50:11.911533 PNP: 0c09.0
1188 15:50:11.921052 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 15:50:11.924438 PCI: 00:1f.3
1190 15:50:11.934646 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 15:50:11.944658 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 15:50:11.945300 PCI: 00:1f.4
1193 15:50:11.954166 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 15:50:11.964195 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 15:50:11.964779 PCI: 00:1f.5
1196 15:50:11.974248 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 15:50:11.980700 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 15:50:11.987262 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 15:50:11.994029 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 15:50:11.997236 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 15:50:12.000810 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 15:50:12.003909 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 15:50:12.007293 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 15:50:12.013840 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 15:50:12.020432 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 15:50:12.030493 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 15:50:12.037324 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 15:50:12.043559 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 15:50:12.047369 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 15:50:12.056771 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 15:50:12.060591 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 15:50:12.066622 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 15:50:12.069731 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 15:50:12.076536 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 15:50:12.079800 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 15:50:12.086265 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 15:50:12.089455 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 15:50:12.096315 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 15:50:12.099776 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 15:50:12.106312 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 15:50:12.109932 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 15:50:12.112777 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 15:50:12.119590 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 15:50:12.122697 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 15:50:12.129433 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 15:50:12.132902 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 15:50:12.139611 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 15:50:12.143169 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 15:50:12.149204 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 15:50:12.152613 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 15:50:12.159272 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 15:50:12.162304 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 15:50:12.169361 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 15:50:12.176233 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 15:50:12.179093 avoid_fixed_resources: DOMAIN: 0000
1236 15:50:12.185524 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 15:50:12.192174 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 15:50:12.198974 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 15:50:12.208738 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 15:50:12.215629 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 15:50:12.222001 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 15:50:12.229426 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 15:50:12.239071 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 15:50:12.245183 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 15:50:12.251759 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 15:50:12.261479 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 15:50:12.268489 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 15:50:12.269032 Setting resources...
1249 15:50:12.275220 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 15:50:12.281652 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 15:50:12.284920 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 15:50:12.288303 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 15:50:12.291591 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 15:50:12.298059 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 15:50:12.305175 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 15:50:12.311707 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 15:50:12.317683 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 15:50:12.324275 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 15:50:12.328186 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 15:50:12.334742 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 15:50:12.338070 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 15:50:12.344719 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 15:50:12.347784 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 15:50:12.353963 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 15:50:12.357386 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 15:50:12.360973 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 15:50:12.367165 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 15:50:12.370999 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 15:50:12.377278 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 15:50:12.380978 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 15:50:12.387433 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 15:50:12.390578 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 15:50:12.397311 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 15:50:12.400329 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 15:50:12.407352 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 15:50:12.410585 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 15:50:12.417031 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 15:50:12.420461 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 15:50:12.427287 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 15:50:12.430585 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 15:50:12.437158 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 15:50:12.447063 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 15:50:12.453590 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 15:50:12.460293 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 15:50:12.463785 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 15:50:12.473730 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 15:50:12.476898 Root Device assign_resources, bus 0 link: 0
1288 15:50:12.480207 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 15:50:12.490462 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 15:50:12.496931 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 15:50:12.506878 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 15:50:12.513524 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 15:50:12.523549 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 15:50:12.529885 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 15:50:12.536954 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 15:50:12.539895 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:50:12.549948 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 15:50:12.556121 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 15:50:12.566429 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 15:50:12.572817 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 15:50:12.576166 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 15:50:12.583155 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:50:12.589849 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 15:50:12.596605 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 15:50:12.599971 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:50:12.609663 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 15:50:12.616201 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 15:50:12.622527 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 15:50:12.632914 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 15:50:12.639505 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 15:50:12.646044 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 15:50:12.655339 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 15:50:12.662408 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 15:50:12.668972 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 15:50:12.672212 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:50:12.682370 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 15:50:12.688927 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 15:50:12.698909 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 15:50:12.702141 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 15:50:12.711853 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 15:50:12.714878 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 15:50:12.725126 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 15:50:12.731366 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 15:50:12.738510 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 15:50:12.741555 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:50:12.751468 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 15:50:12.754825 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 15:50:12.758114 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:50:12.765151 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 15:50:12.767905 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:50:12.774746 LPC: Trying to open IO window from 800 size 1ff
1332 15:50:12.780978 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 15:50:12.791198 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 15:50:12.797900 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 15:50:12.807767 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 15:50:12.810709 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 15:50:12.817468 Root Device assign_resources, bus 0 link: 0
1338 15:50:12.818029 Done setting resources.
1339 15:50:12.824448 Show resources in subtree (Root Device)...After assigning values.
1340 15:50:12.830747 Root Device child on link 0 CPU_CLUSTER: 0
1341 15:50:12.834029 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 15:50:12.834599 APIC: 00
1343 15:50:12.837517 APIC: 01
1344 15:50:12.838086 APIC: 02
1345 15:50:12.838457 APIC: 03
1346 15:50:12.840542 APIC: 04
1347 15:50:12.841158 APIC: 05
1348 15:50:12.844134 APIC: 07
1349 15:50:12.844699 APIC: 06
1350 15:50:12.847270 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 15:50:12.856989 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 15:50:12.870054 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 15:50:12.870728 PCI: 00:00.0
1354 15:50:12.880636 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 15:50:12.890079 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 15:50:12.899980 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 15:50:12.909771 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 15:50:12.916373 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 15:50:12.926598 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 15:50:12.936326 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 15:50:12.946274 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 15:50:12.956273 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 15:50:12.962385 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 15:50:12.972934 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 15:50:12.982710 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 15:50:12.992512 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 15:50:13.002099 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 15:50:13.012107 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 15:50:13.022057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 15:50:13.022546 PCI: 00:02.0
1371 15:50:13.031971 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 15:50:13.045631 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 15:50:13.051858 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 15:50:13.055177 PCI: 00:04.0
1375 15:50:13.055661 PCI: 00:08.0
1376 15:50:13.065123 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 15:50:13.067953 PCI: 00:12.0
1378 15:50:13.078449 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 15:50:13.081568 PCI: 00:14.0 child on link 0 USB0 port 0
1380 15:50:13.094760 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 15:50:13.097887 USB0 port 0 child on link 0 USB2 port 0
1382 15:50:13.098479 USB2 port 0
1383 15:50:13.101304 USB2 port 1
1384 15:50:13.101982 USB2 port 2
1385 15:50:13.104623 USB2 port 3
1386 15:50:13.105127 USB2 port 5
1387 15:50:13.108047 USB2 port 6
1388 15:50:13.111191 USB2 port 9
1389 15:50:13.111776 USB3 port 0
1390 15:50:13.114527 USB3 port 1
1391 15:50:13.115013 USB3 port 2
1392 15:50:13.117703 USB3 port 3
1393 15:50:13.118192 USB3 port 4
1394 15:50:13.121480 PCI: 00:14.2
1395 15:50:13.131461 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 15:50:13.141114 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 15:50:13.141784 PCI: 00:14.3
1398 15:50:13.154303 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 15:50:13.157307 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 15:50:13.167191 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 15:50:13.167780 I2C: 01:15
1402 15:50:13.174080 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 15:50:13.184083 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 15:50:13.184663 I2C: 02:5d
1405 15:50:13.187489 GENERIC: 0.0
1406 15:50:13.188102 PCI: 00:16.0
1407 15:50:13.197385 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 15:50:13.200407 PCI: 00:17.0
1409 15:50:13.210689 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 15:50:13.220279 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 15:50:13.230180 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 15:50:13.240135 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 15:50:13.246486 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 15:50:13.256423 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 15:50:13.263541 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 15:50:13.273422 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 15:50:13.274025 I2C: 03:1a
1418 15:50:13.276589 I2C: 03:38
1419 15:50:13.277228 I2C: 03:39
1420 15:50:13.279965 I2C: 03:3a
1421 15:50:13.280655 I2C: 03:3b
1422 15:50:13.286344 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 15:50:13.293238 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 15:50:13.303167 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 15:50:13.316131 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 15:50:13.316748 PCI: 01:00.0
1427 15:50:13.326217 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 15:50:13.329124 PCI: 00:1e.0
1429 15:50:13.339552 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 15:50:13.349560 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 15:50:13.352796 PCI: 00:1e.2 child on link 0 SPI: 00
1432 15:50:13.365947 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 15:50:13.366555 SPI: 00
1434 15:50:13.369184 PCI: 00:1e.3 child on link 0 SPI: 01
1435 15:50:13.379202 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 15:50:13.382658 SPI: 01
1437 15:50:13.385649 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 15:50:13.395341 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 15:50:13.402161 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 15:50:13.405556 PNP: 0c09.0
1441 15:50:13.411946 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 15:50:13.415346 PCI: 00:1f.3
1443 15:50:13.425293 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 15:50:13.435227 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 15:50:13.438066 PCI: 00:1f.4
1446 15:50:13.448485 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 15:50:13.458227 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 15:50:13.458738 PCI: 00:1f.5
1449 15:50:13.468125 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 15:50:13.471181 Done allocating resources.
1451 15:50:13.477985 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 15:50:13.481205 Enabling resources...
1453 15:50:13.484450 PCI: 00:00.0 subsystem <- 8086/9b61
1454 15:50:13.487509 PCI: 00:00.0 cmd <- 06
1455 15:50:13.491398 PCI: 00:02.0 subsystem <- 8086/9b41
1456 15:50:13.494019 PCI: 00:02.0 cmd <- 03
1457 15:50:13.494474 PCI: 00:08.0 cmd <- 06
1458 15:50:13.501044 PCI: 00:12.0 subsystem <- 8086/02f9
1459 15:50:13.501629 PCI: 00:12.0 cmd <- 02
1460 15:50:13.504105 PCI: 00:14.0 subsystem <- 8086/02ed
1461 15:50:13.507378 PCI: 00:14.0 cmd <- 02
1462 15:50:13.510864 PCI: 00:14.2 cmd <- 02
1463 15:50:13.513737 PCI: 00:14.3 subsystem <- 8086/02f0
1464 15:50:13.517407 PCI: 00:14.3 cmd <- 02
1465 15:50:13.520426 PCI: 00:15.0 subsystem <- 8086/02e8
1466 15:50:13.523827 PCI: 00:15.0 cmd <- 02
1467 15:50:13.527051 PCI: 00:15.1 subsystem <- 8086/02e9
1468 15:50:13.530324 PCI: 00:15.1 cmd <- 02
1469 15:50:13.533625 PCI: 00:16.0 subsystem <- 8086/02e0
1470 15:50:13.537181 PCI: 00:16.0 cmd <- 02
1471 15:50:13.540753 PCI: 00:17.0 subsystem <- 8086/02d3
1472 15:50:13.541375 PCI: 00:17.0 cmd <- 03
1473 15:50:13.547588 PCI: 00:19.0 subsystem <- 8086/02c5
1474 15:50:13.548181 PCI: 00:19.0 cmd <- 02
1475 15:50:13.550936 PCI: 00:1d.0 bridge ctrl <- 0013
1476 15:50:13.554101 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 15:50:13.557362 PCI: 00:1d.0 cmd <- 06
1478 15:50:13.560272 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 15:50:13.563852 PCI: 00:1e.0 cmd <- 06
1480 15:50:13.567318 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 15:50:13.570269 PCI: 00:1e.2 cmd <- 06
1482 15:50:13.573861 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 15:50:13.577565 PCI: 00:1e.3 cmd <- 02
1484 15:50:13.580790 PCI: 00:1f.0 subsystem <- 8086/0284
1485 15:50:13.583728 PCI: 00:1f.0 cmd <- 407
1486 15:50:13.586659 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 15:50:13.590229 PCI: 00:1f.3 cmd <- 02
1488 15:50:13.593510 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 15:50:13.597141 PCI: 00:1f.4 cmd <- 03
1490 15:50:13.600495 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 15:50:13.603669 PCI: 00:1f.5 cmd <- 406
1492 15:50:13.611057 PCI: 01:00.0 cmd <- 02
1493 15:50:13.616054 done.
1494 15:50:13.629467 ME: Version: 14.0.39.1367
1495 15:50:13.636096 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1496 15:50:13.639295 Initializing devices...
1497 15:50:13.639795 Root Device init ...
1498 15:50:13.646196 Chrome EC: Set SMI mask to 0x0000000000000000
1499 15:50:13.649429 Chrome EC: clear events_b mask to 0x0000000000000000
1500 15:50:13.655906 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 15:50:13.662953 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 15:50:13.669114 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 15:50:13.672534 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 15:50:13.676032 Root Device init finished in 35247 usecs
1505 15:50:13.679584 CPU_CLUSTER: 0 init ...
1506 15:50:13.686530 CPU_CLUSTER: 0 init finished in 2438 usecs
1507 15:50:13.690546 PCI: 00:00.0 init ...
1508 15:50:13.693780 CPU TDP: 15 Watts
1509 15:50:13.696972 CPU PL2 = 64 Watts
1510 15:50:13.700583 PCI: 00:00.0 init finished in 7082 usecs
1511 15:50:13.703594 PCI: 00:02.0 init ...
1512 15:50:13.707141 PCI: 00:02.0 init finished in 2253 usecs
1513 15:50:13.710110 PCI: 00:08.0 init ...
1514 15:50:13.713417 PCI: 00:08.0 init finished in 2253 usecs
1515 15:50:13.716855 PCI: 00:12.0 init ...
1516 15:50:13.719968 PCI: 00:12.0 init finished in 2253 usecs
1517 15:50:13.723072 PCI: 00:14.0 init ...
1518 15:50:13.726357 PCI: 00:14.0 init finished in 2252 usecs
1519 15:50:13.730101 PCI: 00:14.2 init ...
1520 15:50:13.733289 PCI: 00:14.2 init finished in 2253 usecs
1521 15:50:13.736709 PCI: 00:14.3 init ...
1522 15:50:13.740089 PCI: 00:14.3 init finished in 2271 usecs
1523 15:50:13.743311 PCI: 00:15.0 init ...
1524 15:50:13.746662 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 15:50:13.749689 PCI: 00:15.0 init finished in 5976 usecs
1526 15:50:13.753214 PCI: 00:15.1 init ...
1527 15:50:13.756540 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 15:50:13.762866 PCI: 00:15.1 init finished in 5975 usecs
1529 15:50:13.763363 PCI: 00:16.0 init ...
1530 15:50:13.769321 PCI: 00:16.0 init finished in 2251 usecs
1531 15:50:13.772706 PCI: 00:19.0 init ...
1532 15:50:13.776351 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 15:50:13.779639 PCI: 00:19.0 init finished in 5977 usecs
1534 15:50:13.783144 PCI: 00:1d.0 init ...
1535 15:50:13.786148 Initializing PCH PCIe bridge.
1536 15:50:13.789435 PCI: 00:1d.0 init finished in 5285 usecs
1537 15:50:13.793091 PCI: 00:1f.0 init ...
1538 15:50:13.796372 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 15:50:13.802763 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 15:50:13.803352 IOAPIC: ID = 0x02
1541 15:50:13.806086 IOAPIC: Dumping registers
1542 15:50:13.809344 reg 0x0000: 0x02000000
1543 15:50:13.812903 reg 0x0001: 0x00770020
1544 15:50:13.813536 reg 0x0002: 0x00000000
1545 15:50:13.819106 PCI: 00:1f.0 init finished in 23548 usecs
1546 15:50:13.822524 PCI: 00:1f.4 init ...
1547 15:50:13.825379 PCI: 00:1f.4 init finished in 2263 usecs
1548 15:50:13.836338 PCI: 01:00.0 init ...
1549 15:50:13.839774 PCI: 01:00.0 init finished in 2244 usecs
1550 15:50:13.844188 PNP: 0c09.0 init ...
1551 15:50:13.847107 Google Chrome EC uptime: 11.060 seconds
1552 15:50:13.853908 Google Chrome AP resets since EC boot: 0
1553 15:50:13.856944 Google Chrome most recent AP reset causes:
1554 15:50:13.864125 Google Chrome EC reset flags at last EC boot: reset-pin
1555 15:50:13.867071 PNP: 0c09.0 init finished in 20566 usecs
1556 15:50:13.870349 Devices initialized
1557 15:50:13.873789 Show all devs... After init.
1558 15:50:13.874339 Root Device: enabled 1
1559 15:50:13.877014 CPU_CLUSTER: 0: enabled 1
1560 15:50:13.880460 DOMAIN: 0000: enabled 1
1561 15:50:13.881052 APIC: 00: enabled 1
1562 15:50:13.883344 PCI: 00:00.0: enabled 1
1563 15:50:13.887336 PCI: 00:02.0: enabled 1
1564 15:50:13.890416 PCI: 00:04.0: enabled 0
1565 15:50:13.891005 PCI: 00:05.0: enabled 0
1566 15:50:13.893450 PCI: 00:12.0: enabled 1
1567 15:50:13.896496 PCI: 00:12.5: enabled 0
1568 15:50:13.899848 PCI: 00:12.6: enabled 0
1569 15:50:13.900291 PCI: 00:14.0: enabled 1
1570 15:50:13.903840 PCI: 00:14.1: enabled 0
1571 15:50:13.906529 PCI: 00:14.3: enabled 1
1572 15:50:13.906978 PCI: 00:14.5: enabled 0
1573 15:50:13.910334 PCI: 00:15.0: enabled 1
1574 15:50:13.913035 PCI: 00:15.1: enabled 1
1575 15:50:13.917032 PCI: 00:15.2: enabled 0
1576 15:50:13.917618 PCI: 00:15.3: enabled 0
1577 15:50:13.919740 PCI: 00:16.0: enabled 1
1578 15:50:13.923243 PCI: 00:16.1: enabled 0
1579 15:50:13.926554 PCI: 00:16.2: enabled 0
1580 15:50:13.927021 PCI: 00:16.3: enabled 0
1581 15:50:13.930029 PCI: 00:16.4: enabled 0
1582 15:50:13.933188 PCI: 00:16.5: enabled 0
1583 15:50:13.936490 PCI: 00:17.0: enabled 1
1584 15:50:13.937031 PCI: 00:19.0: enabled 1
1585 15:50:13.939546 PCI: 00:19.1: enabled 0
1586 15:50:13.943033 PCI: 00:19.2: enabled 0
1587 15:50:13.943480 PCI: 00:1a.0: enabled 0
1588 15:50:13.946604 PCI: 00:1c.0: enabled 0
1589 15:50:13.949996 PCI: 00:1c.1: enabled 0
1590 15:50:13.953252 PCI: 00:1c.2: enabled 0
1591 15:50:13.953814 PCI: 00:1c.3: enabled 0
1592 15:50:13.956587 PCI: 00:1c.4: enabled 0
1593 15:50:13.959480 PCI: 00:1c.5: enabled 0
1594 15:50:13.962782 PCI: 00:1c.6: enabled 0
1595 15:50:13.963232 PCI: 00:1c.7: enabled 0
1596 15:50:13.966151 PCI: 00:1d.0: enabled 1
1597 15:50:13.969600 PCI: 00:1d.1: enabled 0
1598 15:50:13.972867 PCI: 00:1d.2: enabled 0
1599 15:50:13.973481 PCI: 00:1d.3: enabled 0
1600 15:50:13.976337 PCI: 00:1d.4: enabled 0
1601 15:50:13.979831 PCI: 00:1d.5: enabled 0
1602 15:50:13.982733 PCI: 00:1e.0: enabled 1
1603 15:50:13.983269 PCI: 00:1e.1: enabled 0
1604 15:50:13.985788 PCI: 00:1e.2: enabled 1
1605 15:50:13.989329 PCI: 00:1e.3: enabled 1
1606 15:50:13.992534 PCI: 00:1f.0: enabled 1
1607 15:50:13.993114 PCI: 00:1f.1: enabled 0
1608 15:50:13.996051 PCI: 00:1f.2: enabled 0
1609 15:50:13.998964 PCI: 00:1f.3: enabled 1
1610 15:50:13.999507 PCI: 00:1f.4: enabled 1
1611 15:50:14.002350 PCI: 00:1f.5: enabled 1
1612 15:50:14.005663 PCI: 00:1f.6: enabled 0
1613 15:50:14.009326 USB0 port 0: enabled 1
1614 15:50:14.009866 I2C: 01:15: enabled 1
1615 15:50:14.012765 I2C: 02:5d: enabled 1
1616 15:50:14.015818 GENERIC: 0.0: enabled 1
1617 15:50:14.016360 I2C: 03:1a: enabled 1
1618 15:50:14.018759 I2C: 03:38: enabled 1
1619 15:50:14.022342 I2C: 03:39: enabled 1
1620 15:50:14.022884 I2C: 03:3a: enabled 1
1621 15:50:14.026234 I2C: 03:3b: enabled 1
1622 15:50:14.028608 PCI: 00:00.0: enabled 1
1623 15:50:14.029056 SPI: 00: enabled 1
1624 15:50:14.032456 SPI: 01: enabled 1
1625 15:50:14.035788 PNP: 0c09.0: enabled 1
1626 15:50:14.036336 USB2 port 0: enabled 1
1627 15:50:14.039100 USB2 port 1: enabled 1
1628 15:50:14.041981 USB2 port 2: enabled 0
1629 15:50:14.045596 USB2 port 3: enabled 0
1630 15:50:14.046134 USB2 port 5: enabled 0
1631 15:50:14.048787 USB2 port 6: enabled 1
1632 15:50:14.052151 USB2 port 9: enabled 1
1633 15:50:14.052683 USB3 port 0: enabled 1
1634 15:50:14.055232 USB3 port 1: enabled 1
1635 15:50:14.058909 USB3 port 2: enabled 1
1636 15:50:14.059379 USB3 port 3: enabled 1
1637 15:50:14.062029 USB3 port 4: enabled 0
1638 15:50:14.065023 APIC: 01: enabled 1
1639 15:50:14.065524 APIC: 02: enabled 1
1640 15:50:14.068344 APIC: 03: enabled 1
1641 15:50:14.071967 APIC: 04: enabled 1
1642 15:50:14.072424 APIC: 05: enabled 1
1643 15:50:14.075669 APIC: 07: enabled 1
1644 15:50:14.078774 APIC: 06: enabled 1
1645 15:50:14.079311 PCI: 00:08.0: enabled 1
1646 15:50:14.081727 PCI: 00:14.2: enabled 1
1647 15:50:14.085413 PCI: 01:00.0: enabled 1
1648 15:50:14.088564 Disabling ACPI via APMC:
1649 15:50:14.092249 done.
1650 15:50:14.095313 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 15:50:14.098338 ELOG: NV offset 0xaf0000 size 0x4000
1652 15:50:14.105735 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 15:50:14.112031 ELOG: Event(17) added with size 13 at 2022-09-17 15:50:04 UTC
1654 15:50:14.118752 ELOG: Event(92) added with size 9 at 2022-09-17 15:50:04 UTC
1655 15:50:14.125362 ELOG: Event(93) added with size 9 at 2022-09-17 15:50:04 UTC
1656 15:50:14.132296 ELOG: Event(9A) added with size 9 at 2022-09-17 15:50:04 UTC
1657 15:50:14.138570 ELOG: Event(9E) added with size 10 at 2022-09-17 15:50:04 UTC
1658 15:50:14.145243 ELOG: Event(9F) added with size 14 at 2022-09-17 15:50:04 UTC
1659 15:50:14.148295 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 15:50:14.156308 ELOG: Event(A1) added with size 10 at 2022-09-17 15:50:04 UTC
1661 15:50:14.165886 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 15:50:14.172550 ELOG: Event(A0) added with size 9 at 2022-09-17 15:50:04 UTC
1663 15:50:14.175719 elog_add_boot_reason: Logged dev mode boot
1664 15:50:14.178975 Finalize devices...
1665 15:50:14.179530 PCI: 00:17.0 final
1666 15:50:14.182487 Devices finalized
1667 15:50:14.186035 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 15:50:14.192116 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 15:50:14.195599 ME: HFSTS1 : 0x90000245
1670 15:50:14.198877 ME: HFSTS2 : 0x3B850126
1671 15:50:14.205507 ME: HFSTS3 : 0x00000020
1672 15:50:14.208866 ME: HFSTS4 : 0x00004800
1673 15:50:14.211957 ME: HFSTS5 : 0x00000000
1674 15:50:14.215426 ME: HFSTS6 : 0x40400006
1675 15:50:14.218648 ME: Manufacturing Mode : NO
1676 15:50:14.221627 ME: FW Partition Table : OK
1677 15:50:14.225003 ME: Bringup Loader Failure : NO
1678 15:50:14.228694 ME: Firmware Init Complete : YES
1679 15:50:14.231644 ME: Boot Options Present : NO
1680 15:50:14.234865 ME: Update In Progress : NO
1681 15:50:14.238849 ME: D0i3 Support : YES
1682 15:50:14.241790 ME: Low Power State Enabled : NO
1683 15:50:14.245322 ME: CPU Replaced : NO
1684 15:50:14.248420 ME: CPU Replacement Valid : YES
1685 15:50:14.251868 ME: Current Working State : 5
1686 15:50:14.254798 ME: Current Operation State : 1
1687 15:50:14.258298 ME: Current Operation Mode : 0
1688 15:50:14.261483 ME: Error Code : 0
1689 15:50:14.264699 ME: CPU Debug Disabled : YES
1690 15:50:14.268524 ME: TXT Support : NO
1691 15:50:14.274580 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 15:50:14.281889 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 15:50:14.282432 CBFS @ c08000 size 3f8000
1694 15:50:14.288298 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 15:50:14.291418 CBFS: Locating 'fallback/dsdt.aml'
1696 15:50:14.294781 CBFS: Found @ offset 10bb80 size 3fa5
1697 15:50:14.301435 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 15:50:14.304258 CBFS @ c08000 size 3f8000
1699 15:50:14.308000 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 15:50:14.311000 CBFS: Locating 'fallback/slic'
1701 15:50:14.316896 CBFS: 'fallback/slic' not found.
1702 15:50:14.323196 ACPI: Writing ACPI tables at 99b3e000.
1703 15:50:14.323792 ACPI: * FACS
1704 15:50:14.326767 ACPI: * DSDT
1705 15:50:14.329818 Ramoops buffer: 0x100000@0x99a3d000.
1706 15:50:14.333168 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 15:50:14.339756 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 15:50:14.343469 Google Chrome EC: version:
1709 15:50:14.346261 ro: helios_v2.0.2659-56403530b
1710 15:50:14.349652 rw: helios_v2.0.2849-c41de27e7d
1711 15:50:14.350240 running image: 1
1712 15:50:14.353770 ACPI: * FADT
1713 15:50:14.354258 SCI is IRQ9
1714 15:50:14.360378 ACPI: added table 1/32, length now 40
1715 15:50:14.360934 ACPI: * SSDT
1716 15:50:14.363834 Found 1 CPU(s) with 8 core(s) each.
1717 15:50:14.367177 Error: Could not locate 'wifi_sar' in VPD.
1718 15:50:14.373682 Checking CBFS for default SAR values
1719 15:50:14.376869 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 15:50:14.380706 CBFS @ c08000 size 3f8000
1721 15:50:14.387542 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 15:50:14.390634 CBFS: Locating 'wifi_sar_defaults.hex'
1723 15:50:14.393287 CBFS: Found @ offset 5fac0 size 77
1724 15:50:14.396734 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 15:50:14.403734 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 15:50:14.406494 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 15:50:14.413670 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 15:50:14.416783 failed to find key in VPD: dsm_calib_r0_0
1729 15:50:14.426550 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 15:50:14.429645 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 15:50:14.433297 failed to find key in VPD: dsm_calib_r0_1
1732 15:50:14.443228 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 15:50:14.449887 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 15:50:14.453055 failed to find key in VPD: dsm_calib_r0_2
1735 15:50:14.462734 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 15:50:14.466430 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 15:50:14.472828 failed to find key in VPD: dsm_calib_r0_3
1738 15:50:14.479503 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 15:50:14.486263 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 15:50:14.489782 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 15:50:14.492754 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 15:50:14.496695 EC returned error result code 1
1743 15:50:14.500487 EC returned error result code 1
1744 15:50:14.504742 EC returned error result code 1
1745 15:50:14.511497 PS2K: Bad resp from EC. Vivaldi disabled!
1746 15:50:14.514150 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 15:50:14.520786 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 15:50:14.527731 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 15:50:14.530266 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 15:50:14.537517 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 15:50:14.543792 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 15:50:14.550378 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 15:50:14.553494 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 15:50:14.560673 ACPI: added table 2/32, length now 44
1755 15:50:14.561307 ACPI: * MCFG
1756 15:50:14.563659 ACPI: added table 3/32, length now 48
1757 15:50:14.567523 ACPI: * TPM2
1758 15:50:14.570328 TPM2 log created at 99a2d000
1759 15:50:14.573753 ACPI: added table 4/32, length now 52
1760 15:50:14.574246 ACPI: * MADT
1761 15:50:14.577020 SCI is IRQ9
1762 15:50:14.580384 ACPI: added table 5/32, length now 56
1763 15:50:14.580967 current = 99b43ac0
1764 15:50:14.583810 ACPI: * DMAR
1765 15:50:14.587011 ACPI: added table 6/32, length now 60
1766 15:50:14.590741 ACPI: * IGD OpRegion
1767 15:50:14.591321 GMA: Found VBT in CBFS
1768 15:50:14.593364 GMA: Found valid VBT in CBFS
1769 15:50:14.596982 ACPI: added table 7/32, length now 64
1770 15:50:14.600097 ACPI: * HPET
1771 15:50:14.603423 ACPI: added table 8/32, length now 68
1772 15:50:14.606931 ACPI: done.
1773 15:50:14.607524 ACPI tables: 31744 bytes.
1774 15:50:14.610727 smbios_write_tables: 99a2c000
1775 15:50:14.613717 EC returned error result code 3
1776 15:50:14.616904 Couldn't obtain OEM name from CBI
1777 15:50:14.620196 Create SMBIOS type 17
1778 15:50:14.623671 PCI: 00:00.0 (Intel Cannonlake)
1779 15:50:14.626557 PCI: 00:14.3 (Intel WiFi)
1780 15:50:14.629940 SMBIOS tables: 939 bytes.
1781 15:50:14.633315 Writing table forward entry at 0x00000500
1782 15:50:14.640556 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 15:50:14.643611 Writing coreboot table at 0x99b62000
1784 15:50:14.650021 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 15:50:14.652870 1. 0000000000001000-000000000009ffff: RAM
1786 15:50:14.659800 2. 00000000000a0000-00000000000fffff: RESERVED
1787 15:50:14.662657 3. 0000000000100000-0000000099a2bfff: RAM
1788 15:50:14.669705 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 15:50:14.672758 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 15:50:14.679270 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 15:50:14.682574 7. 000000009a000000-000000009f7fffff: RESERVED
1792 15:50:14.689430 8. 00000000e0000000-00000000efffffff: RESERVED
1793 15:50:14.692701 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 15:50:14.699439 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 15:50:14.702351 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 15:50:14.709311 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 15:50:14.712357 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 15:50:14.715756 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 15:50:14.721875 15. 0000000100000000-000000045e7fffff: RAM
1800 15:50:14.725482 Graphics framebuffer located at 0xc0000000
1801 15:50:14.728953 Passing 5 GPIOs to payload:
1802 15:50:14.732460 NAME | PORT | POLARITY | VALUE
1803 15:50:14.738611 write protect | undefined | high | low
1804 15:50:14.745583 lid | undefined | high | high
1805 15:50:14.748791 power | undefined | high | low
1806 15:50:14.754958 oprom | undefined | high | low
1807 15:50:14.758530 EC in RW | 0x000000cb | high | low
1808 15:50:14.761620 Board ID: 4
1809 15:50:14.765144 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 15:50:14.768650 CBFS @ c08000 size 3f8000
1811 15:50:14.775267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 15:50:14.781794 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1813 15:50:14.785356 coreboot table: 1492 bytes.
1814 15:50:14.788422 IMD ROOT 0. 99fff000 00001000
1815 15:50:14.792034 IMD SMALL 1. 99ffe000 00001000
1816 15:50:14.795315 FSP MEMORY 2. 99c4e000 003b0000
1817 15:50:14.798070 CONSOLE 3. 99c2e000 00020000
1818 15:50:14.801719 FMAP 4. 99c2d000 0000054e
1819 15:50:14.804930 TIME STAMP 5. 99c2c000 00000910
1820 15:50:14.808327 VBOOT WORK 6. 99c18000 00014000
1821 15:50:14.811820 MRC DATA 7. 99c16000 00001958
1822 15:50:14.814591 ROMSTG STCK 8. 99c15000 00001000
1823 15:50:14.817854 AFTER CAR 9. 99c0b000 0000a000
1824 15:50:14.821754 RAMSTAGE 10. 99baf000 0005c000
1825 15:50:14.824757 REFCODE 11. 99b7a000 00035000
1826 15:50:14.828345 SMM BACKUP 12. 99b6a000 00010000
1827 15:50:14.831938 COREBOOT 13. 99b62000 00008000
1828 15:50:14.835218 ACPI 14. 99b3e000 00024000
1829 15:50:14.838108 ACPI GNVS 15. 99b3d000 00001000
1830 15:50:14.841687 RAMOOPS 16. 99a3d000 00100000
1831 15:50:14.844550 TPM2 TCGLOG17. 99a2d000 00010000
1832 15:50:14.847871 SMBIOS 18. 99a2c000 00000800
1833 15:50:14.848364 IMD small region:
1834 15:50:14.851773 IMD ROOT 0. 99ffec00 00000400
1835 15:50:14.854848 FSP RUNTIME 1. 99ffebe0 00000004
1836 15:50:14.857873 EC HOSTEVENT 2. 99ffebc0 00000008
1837 15:50:14.861141 POWER STATE 3. 99ffeb80 00000040
1838 15:50:14.867812 ROMSTAGE 4. 99ffeb60 00000004
1839 15:50:14.870998 MEM INFO 5. 99ffe9a0 000001b9
1840 15:50:14.874407 VPD 6. 99ffe920 0000006c
1841 15:50:14.877803 MTRR: Physical address space:
1842 15:50:14.881511 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 15:50:14.887826 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 15:50:14.894250 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 15:50:14.900961 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 15:50:14.907646 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 15:50:14.914451 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 15:50:14.920930 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 15:50:14.924194 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 15:50:14.927228 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 15:50:14.930632 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 15:50:14.937345 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 15:50:14.940545 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 15:50:14.944189 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 15:50:14.947290 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 15:50:14.954187 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 15:50:14.957046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 15:50:14.960582 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 15:50:14.963702 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 15:50:14.967869 call enable_fixed_mtrr()
1861 15:50:14.970659 CPU physical address size: 39 bits
1862 15:50:14.977220 MTRR: default type WB/UC MTRR counts: 6/8.
1863 15:50:14.980335 MTRR: WB selected as default type.
1864 15:50:14.987168 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 15:50:14.990423 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 15:50:14.997094 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 15:50:15.004021 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 15:50:15.010785 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 15:50:15.017288 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 15:50:15.023611 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 15:50:15.026956 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 15:50:15.030055 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 15:50:15.033663 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 15:50:15.037231 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 15:50:15.043103 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 15:50:15.046499 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 15:50:15.049906 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 15:50:15.053398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 15:50:15.059449 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 15:50:15.062897 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 15:50:15.063396
1882 15:50:15.063787 MTRR check
1883 15:50:15.066204 Fixed MTRRs : Enabled
1884 15:50:15.069339 Variable MTRRs: Enabled
1885 15:50:15.069831
1886 15:50:15.072847 call enable_fixed_mtrr()
1887 15:50:15.076509 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 15:50:15.079911 CPU physical address size: 39 bits
1889 15:50:15.085897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 15:50:15.089586 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 15:50:15.096567 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 15:50:15.099480 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 15:50:15.103107 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 15:50:15.106308 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 15:50:15.112771 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 15:50:15.115999 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 15:50:15.119371 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 15:50:15.122446 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 15:50:15.125909 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 15:50:15.132694 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 15:50:15.135961 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 15:50:15.139386 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 15:50:15.145745 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 15:50:15.149310 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 15:50:15.152348 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 15:50:15.155647 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 15:50:15.159060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 15:50:15.165613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 15:50:15.168934 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 15:50:15.172133 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 15:50:15.175937 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 15:50:15.178791 call enable_fixed_mtrr()
1913 15:50:15.181971 call enable_fixed_mtrr()
1914 15:50:15.185597 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 15:50:15.188848 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 15:50:15.195332 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 15:50:15.198586 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 15:50:15.202261 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 15:50:15.205649 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 15:50:15.212042 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 15:50:15.214985 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 15:50:15.218654 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 15:50:15.222021 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 15:50:15.228565 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 15:50:15.231802 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 15:50:15.235386 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 15:50:15.238642 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 15:50:15.245240 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 15:50:15.248230 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 15:50:15.251483 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 15:50:15.254770 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 15:50:15.261534 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 15:50:15.264866 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 15:50:15.268179 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 15:50:15.271006 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 15:50:15.274742 call enable_fixed_mtrr()
1937 15:50:15.278335 call enable_fixed_mtrr()
1938 15:50:15.281648 CPU physical address size: 39 bits
1939 15:50:15.285043 CPU physical address size: 39 bits
1940 15:50:15.288500 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 15:50:15.294986 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 15:50:15.297692 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 15:50:15.301660 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 15:50:15.304720 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 15:50:15.308408 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 15:50:15.314713 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 15:50:15.318182 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 15:50:15.321600 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 15:50:15.324635 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 15:50:15.331094 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 15:50:15.334505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 15:50:15.337845 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 15:50:15.341120 call enable_fixed_mtrr()
1954 15:50:15.344454 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 15:50:15.347550 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 15:50:15.354544 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 15:50:15.357612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 15:50:15.360875 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 15:50:15.364041 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 15:50:15.370666 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 15:50:15.373995 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 15:50:15.377253 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 15:50:15.380583 CPU physical address size: 39 bits
1964 15:50:15.384239 call enable_fixed_mtrr()
1965 15:50:15.387372 CPU physical address size: 39 bits
1966 15:50:15.390808 CPU physical address size: 39 bits
1967 15:50:15.394212 CBFS @ c08000 size 3f8000
1968 15:50:15.400460 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1969 15:50:15.403936 CBFS: Locating 'fallback/payload'
1970 15:50:15.407391 CPU physical address size: 39 bits
1971 15:50:15.410928 CBFS: Found @ offset 1c96c0 size 3f798
1972 15:50:15.413816 Checking segment from ROM address 0xffdd16f8
1973 15:50:15.420752 Checking segment from ROM address 0xffdd1714
1974 15:50:15.423796 Loading segment from ROM address 0xffdd16f8
1975 15:50:15.427210 code (compression=0)
1976 15:50:15.433750 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 15:50:15.444031 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 15:50:15.446883 it's not compressed!
1979 15:50:15.537789 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 15:50:15.544818 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 15:50:15.547740 Loading segment from ROM address 0xffdd1714
1982 15:50:15.551368 Entry Point 0x30000000
1983 15:50:15.554058 Loaded segments
1984 15:50:15.560276 Finalizing chipset.
1985 15:50:15.563514 Finalizing SMM.
1986 15:50:15.566426 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1987 15:50:15.569788 mp_park_aps done after 0 msecs.
1988 15:50:15.576037 Jumping to boot code at 30000000(99b62000)
1989 15:50:15.583188 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 15:50:15.583684
1991 15:50:15.586607 Starting depthcharge on Helios...
1992 15:50:15.587884 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1993 15:50:15.588473 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1994 15:50:15.588971 Setting prompt string to ['hatch:']
1995 15:50:15.589458 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1996 15:50:15.595908 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 15:50:15.602653 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 15:50:15.609614 board_setup: Info: eMMC controller not present; skipping
1999 15:50:15.612896 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 15:50:15.619401 board_setup: Info: SDHCI controller not present; skipping
2001 15:50:15.625657 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 15:50:15.626151 Wipe memory regions:
2003 15:50:15.629251 [0x00000000001000, 0x000000000a0000)
2004 15:50:15.635714 [0x00000000100000, 0x00000030000000)
2005 15:50:15.702120 [0x00000030657430, 0x00000099a2c000)
2006 15:50:15.852633 [0x00000100000000, 0x0000045e800000)
2007 15:50:17.308396 R8152: Initializing
2008 15:50:17.311543 Version 9 (ocp_data = 6010)
2009 15:50:17.315968 R8152: Done initializing
2010 15:50:17.318765 Adding net device
2011 15:50:17.693576 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 15:50:17.694176
2013 15:50:17.695006 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2015 15:50:17.796916 hatch: tftpboot 192.168.201.1 7300471/tftp-deploy-skg0sxs1/kernel/bzImage 7300471/tftp-deploy-skg0sxs1/kernel/cmdline 7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
2016 15:50:17.797671 Setting prompt string to 'Starting kernel'
2017 15:50:17.798125 Setting prompt string to ['Starting kernel']
2018 15:50:17.798504 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2019 15:50:17.798897 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:38)
2020 15:50:17.802511 tftpboot 192.168.201.1 7300471/tftp-deploy-skg0sxs1/kernel/bzImy-skg0sxs1/kernel/cmdline 7300471/tftp-deploy-skg0sxs1/ramdisk/ramdisk.cpio.gz
2021 15:50:17.802610 Waiting for link
2022 15:50:18.003668 done.
2023 15:50:18.004250 MAC: f4:f5:e8:50:e3:ec
2024 15:50:18.006650 Sending DHCP discover... done.
2025 15:50:18.010746 Waiting for reply... done.
2026 15:50:18.013407 Sending DHCP request... done.
2027 15:50:18.020878 Waiting for reply... done.
2028 15:50:18.021518 My ip is 192.168.201.14
2029 15:50:18.023749 The DHCP server ip is 192.168.201.1
2030 15:50:18.030301 TFTP server IP predefined by user: 192.168.201.1
2031 15:50:18.037215 Bootfile predefined by user: 7300471/tftp-deploy-skg0sxs1/kernel/bzImage
2032 15:50:18.040470 Sending tftp read request... done.
2033 15:50:18.047170 Waiting for the transfer...
2034 15:50:18.391819 00000000 ################################################################
2035 15:50:18.711361 00080000 ################################################################
2036 15:50:19.031335 00100000 ################################################################
2037 15:50:19.338696 00180000 ################################################################
2038 15:50:19.595259 00200000 ################################################################
2039 15:50:19.881147 00280000 ################################################################
2040 15:50:20.203681 00300000 ################################################################
2041 15:50:20.526510 00380000 ################################################################
2042 15:50:20.849165 00400000 ################################################################
2043 15:50:21.106754 00480000 ################################################################
2044 15:50:21.363054 00500000 ################################################################
2045 15:50:21.657681 00580000 ################################################################
2046 15:50:22.028537 00600000 ################################################################ done.
2047 15:50:22.031749 The bootfile was 6815632 bytes long.
2048 15:50:22.034940 Sending tftp read request... done.
2049 15:50:22.038538 Waiting for the transfer...
2050 15:50:22.404334 00000000 ################################################################
2051 15:50:22.758568 00080000 ################################################################
2052 15:50:23.134964 00100000 ################################################################
2053 15:50:23.517393 00180000 ################################################################
2054 15:50:23.874493 00200000 ################################################################
2055 15:50:24.122908 00280000 ################################################################
2056 15:50:24.371778 00300000 ################################################################
2057 15:50:24.644345 00380000 ################################################################
2058 15:50:24.900070 00400000 ################################################################
2059 15:50:25.159469 00480000 ################################################################
2060 15:50:25.274146 00500000 ############################# done.
2061 15:50:25.277691 Sending tftp read request... done.
2062 15:50:25.281045 Waiting for the transfer...
2063 15:50:25.281238 00000000 # done.
2064 15:50:25.290882 Command line loaded dynamically from TFTP file: 7300471/tftp-deploy-skg0sxs1/kernel/cmdline
2065 15:50:25.314523 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300471/extract-nfsrootfs-nsvebl5e,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2066 15:50:25.317320 ec_init(0): CrosEC protocol v3 supported (256, 256)
2067 15:50:25.324052 Shutting down all USB controllers.
2068 15:50:25.327980 Removing current net device
2069 15:50:25.331387 Finalizing coreboot
2070 15:50:25.337566 Exiting depthcharge with code 4 at timestamp: 17038331
2071 15:50:25.338060
2072 15:50:25.338447 Starting kernel ...
2073 15:50:25.338805
2074 15:50:25.339148
2075 15:50:25.340036 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2076 15:50:25.340569 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2077 15:50:25.340983 Setting prompt string to ['Linux version [0-9]']
2078 15:50:25.341438 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2079 15:50:25.341923 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2081 15:54:56.341473 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2083 15:54:56.342675 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2085 15:54:56.343555 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2088 15:54:56.345229 end: 2 depthcharge-action (duration 00:05:00) [common]
2090 15:54:56.345834 Cleaning after the job
2091 15:54:56.345923 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/ramdisk
2092 15:54:56.346431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/kernel
2093 15:54:56.346959 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/nfsrootfs
2094 15:54:56.398532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300471/tftp-deploy-skg0sxs1/modules
2095 15:54:56.398856 start: 4.1 power-off (timeout 00:00:30) [common]
2096 15:54:56.399038 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2097 15:54:56.419903 >> Command sent successfully.
2098 15:54:56.422115 Returned 0 in 0 seconds
2099 15:54:56.523362 end: 4.1 power-off (duration 00:00:00) [common]
2101 15:54:56.524804 start: 4.2 read-feedback (timeout 00:10:00) [common]
2102 15:54:56.526014 Listened to connection for namespace 'common' for up to 1s
2103 15:54:57.279885 Listened to connection for namespace 'common' for up to 1s
2104 15:54:57.283420 Listened to connection for namespace 'common' for up to 1s
2105 15:54:57.286548 Listened to connection for namespace 'common' for up to 1s
2106 15:54:57.289945 Listened to connection for namespace 'common' for up to 1s
2107 15:54:57.293264 Listened to connection for namespace 'common' for up to 1s
2108 15:54:57.296974 Listened to connection for namespace 'common' for up to 1s
2109 15:54:57.300453 Listened to connection for namespace 'common' for up to 1s
2110 15:54:57.303450 Listened to connection for namespace 'common' for up to 1s
2111 15:54:57.306751 Listened to connection for namespace 'common' for up to 1s
2112 15:54:57.309995 Listened to connection for namespace 'common' for up to 1s
2113 15:54:57.313177 Listened to connection for namespace 'common' for up to 1s
2114 15:54:57.316870 Listened to connection for namespace 'common' for up to 1s
2115 15:54:57.322186 Listened to connection for namespace 'common' for up to 1s
2116 15:54:57.325925 Listened to connection for namespace 'common' for up to 1s
2117 15:54:57.526785 Finalising connection for namespace 'common'
2118 15:54:57.527510 Disconnecting from shell: Finalise
2119 15:54:57.527972
2120 15:54:57.629662 end: 4.2 read-feedback (duration 00:00:01) [common]
2121 15:54:57.630296 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300471
2122 15:54:57.798104 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300471
2123 15:54:57.798309 JobError: Your job cannot terminate cleanly.