Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 15:43:30.681874 lava-dispatcher, installed at version: 2022.06
2 15:43:30.682078 start: 0 validate
3 15:43:30.682245 Start time: 2022-09-17 15:43:30.682225+00:00 (UTC)
4 15:43:30.682382 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:43:30.682512 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:43:30.970539 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:43:30.971281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:43:33.479317 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:43:33.479479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:43:33.480582 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:43:33.480697 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-229-gb433f12afe250%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:43:33.482872 validate duration: 2.80
14 15:43:33.483120 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:43:33.483221 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:43:33.483311 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:43:33.483406 Not decompressing ramdisk as can be used compressed.
18 15:43:33.483493 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:43:33.483558 saving as /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/ramdisk/initrd.cpio.gz
20 15:43:33.483618 total size: 5411075 (5MB)
21 15:43:33.484689 progress 0% (0MB)
22 15:43:33.486186 progress 5% (0MB)
23 15:43:33.487516 progress 10% (0MB)
24 15:43:33.488922 progress 15% (0MB)
25 15:43:33.490420 progress 20% (1MB)
26 15:43:33.491711 progress 25% (1MB)
27 15:43:33.493007 progress 30% (1MB)
28 15:43:33.494314 progress 35% (1MB)
29 15:43:33.495756 progress 40% (2MB)
30 15:43:33.497076 progress 45% (2MB)
31 15:43:33.498429 progress 50% (2MB)
32 15:43:33.499718 progress 55% (2MB)
33 15:43:33.501191 progress 60% (3MB)
34 15:43:33.502528 progress 65% (3MB)
35 15:43:33.503843 progress 70% (3MB)
36 15:43:33.505152 progress 75% (3MB)
37 15:43:33.506646 progress 80% (4MB)
38 15:43:33.507994 progress 85% (4MB)
39 15:43:33.509396 progress 90% (4MB)
40 15:43:33.510781 progress 95% (4MB)
41 15:43:33.512304 progress 100% (5MB)
42 15:43:33.512491 5MB downloaded in 0.03s (178.77MB/s)
43 15:43:33.512653 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:43:33.512904 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:43:33.513000 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:43:33.513090 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:43:33.513198 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:43:33.513267 saving as /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/kernel/bzImage
50 15:43:33.513330 total size: 6815632 (6MB)
51 15:43:33.513391 No compression specified
52 15:43:33.514563 progress 0% (0MB)
53 15:43:33.516316 progress 5% (0MB)
54 15:43:33.518045 progress 10% (0MB)
55 15:43:33.519830 progress 15% (1MB)
56 15:43:33.521457 progress 20% (1MB)
57 15:43:33.523119 progress 25% (1MB)
58 15:43:33.524900 progress 30% (1MB)
59 15:43:33.526567 progress 35% (2MB)
60 15:43:33.528317 progress 40% (2MB)
61 15:43:33.529951 progress 45% (2MB)
62 15:43:33.531550 progress 50% (3MB)
63 15:43:33.533297 progress 55% (3MB)
64 15:43:33.534932 progress 60% (3MB)
65 15:43:33.536677 progress 65% (4MB)
66 15:43:33.538323 progress 70% (4MB)
67 15:43:33.539913 progress 75% (4MB)
68 15:43:33.541672 progress 80% (5MB)
69 15:43:33.543306 progress 85% (5MB)
70 15:43:33.545047 progress 90% (5MB)
71 15:43:33.546641 progress 95% (6MB)
72 15:43:33.548260 progress 100% (6MB)
73 15:43:33.548547 6MB downloaded in 0.04s (184.59MB/s)
74 15:43:33.548699 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:43:33.548938 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:43:33.549028 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:43:33.549117 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:43:33.549229 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:43:33.549298 saving as /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/nfsrootfs/full.rootfs.tar
81 15:43:33.549360 total size: 122682368 (116MB)
82 15:43:33.549421 Using unxz to decompress xz
83 15:43:33.552741 progress 0% (0MB)
84 15:43:33.991810 progress 5% (5MB)
85 15:43:34.445095 progress 10% (11MB)
86 15:43:34.905771 progress 15% (17MB)
87 15:43:35.371874 progress 20% (23MB)
88 15:43:35.686283 progress 25% (29MB)
89 15:43:36.027068 progress 30% (35MB)
90 15:43:36.262624 progress 35% (40MB)
91 15:43:36.476160 progress 40% (46MB)
92 15:43:36.829992 progress 45% (52MB)
93 15:43:37.185521 progress 50% (58MB)
94 15:43:37.522925 progress 55% (64MB)
95 15:43:37.872878 progress 60% (70MB)
96 15:43:38.206293 progress 65% (76MB)
97 15:43:38.581158 progress 70% (81MB)
98 15:43:38.992432 progress 75% (87MB)
99 15:43:39.398820 progress 80% (93MB)
100 15:43:39.510108 progress 85% (99MB)
101 15:43:39.676916 progress 90% (105MB)
102 15:43:40.004195 progress 95% (111MB)
103 15:43:40.368756 progress 100% (116MB)
104 15:43:40.375318 116MB downloaded in 6.83s (17.14MB/s)
105 15:43:40.375586 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:43:40.375855 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:43:40.375948 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:43:40.376037 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:43:40.376150 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-229-gb433f12afe250/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:43:40.376221 saving as /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/modules/modules.tar
112 15:43:40.376283 total size: 51872 (0MB)
113 15:43:40.376346 Using unxz to decompress xz
114 15:43:40.379610 progress 63% (0MB)
115 15:43:40.379977 progress 100% (0MB)
116 15:43:40.383296 0MB downloaded in 0.01s (7.06MB/s)
117 15:43:40.383518 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:43:40.383783 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:43:40.383880 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:43:40.383979 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:43:42.115915 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7300448/extract-nfsrootfs-a068_nog
123 15:43:42.116124 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:43:42.116231 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:43:42.116365 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124
126 15:43:42.116464 makedir: /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin
127 15:43:42.116546 makedir: /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/tests
128 15:43:42.116629 makedir: /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/results
129 15:43:42.116726 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-add-keys
130 15:43:42.116853 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-add-sources
131 15:43:42.116966 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-background-process-start
132 15:43:42.117078 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-background-process-stop
133 15:43:42.117187 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-common-functions
134 15:43:42.117294 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-echo-ipv4
135 15:43:42.117404 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-install-packages
136 15:43:42.117510 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-installed-packages
137 15:43:42.117616 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-os-build
138 15:43:42.117721 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-probe-channel
139 15:43:42.118022 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-probe-ip
140 15:43:42.118131 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-target-ip
141 15:43:42.118237 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-target-mac
142 15:43:42.118344 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-target-storage
143 15:43:42.118452 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-case
144 15:43:42.118560 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-event
145 15:43:42.118666 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-feedback
146 15:43:42.118773 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-raise
147 15:43:42.118928 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-reference
148 15:43:42.119037 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-runner
149 15:43:42.119144 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-set
150 15:43:42.119249 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-test-shell
151 15:43:42.119358 Updating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-install-packages (oe)
152 15:43:42.119485 Updating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/bin/lava-installed-packages (oe)
153 15:43:42.119646 Creating /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/environment
154 15:43:42.119734 LAVA metadata
155 15:43:42.119799 - LAVA_JOB_ID=7300448
156 15:43:42.119862 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:43:42.119961 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:43:42.120026 skipped lava-vland-overlay
159 15:43:42.120099 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:43:42.120179 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:43:42.120241 skipped lava-multinode-overlay
162 15:43:42.120313 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:43:42.120392 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:43:42.120462 Loading test definitions
165 15:43:42.120549 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:43:42.120623 Using /lava-7300448 at stage 0
167 15:43:42.120718 Fetching tests from https://github.com/kernelci/test-definitions
168 15:43:42.120796 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/0/tests/0_ltp-ipc'
169 15:43:48.559450 Running '/usr/bin/git checkout kernelci.org
170 15:43:48.693639 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 15:43:48.694379 uuid=7300448_1.5.2.3.1 testdef=None
172 15:43:48.694542 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 15:43:48.694798 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 15:43:48.695570 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:43:48.695814 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 15:43:48.696767 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:43:48.697021 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 15:43:48.697957 runner path: /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/0/tests/0_ltp-ipc test_uuid 7300448_1.5.2.3.1
182 15:43:48.698051 SKIPFILE='skipfile-lkft.yaml'
183 15:43:48.698120 SKIP_INSTALL='true'
184 15:43:48.698184 TST_CMDFILES='ipc'
185 15:43:48.698321 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 15:43:48.698538 Creating lava-test-runner.conf files
188 15:43:48.698604 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7300448/lava-overlay-aqf3t124/lava-7300448/0 for stage 0
189 15:43:48.698688 - 0_ltp-ipc
190 15:43:48.698785 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
191 15:43:48.698874 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 15:43:55.820833 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 15:43:55.820989 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 15:43:55.821087 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 15:43:55.821191 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 15:43:55.821284 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 15:43:55.923234 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 15:43:55.923578 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 15:43:55.923692 extracting modules file /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300448/extract-nfsrootfs-a068_nog
200 15:43:55.927834 extracting modules file /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7300448/extract-overlay-ramdisk-cwd0l17t/ramdisk
201 15:43:55.931593 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 15:43:55.931702 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 15:43:55.931791 [common] Applying overlay to NFS
204 15:43:55.931863 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7300448/compress-overlay-h1dybxhu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7300448/extract-nfsrootfs-a068_nog
205 15:43:56.373318 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 15:43:56.373476 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 15:43:56.373575 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 15:43:56.373670 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 15:43:56.373760 Building ramdisk /var/lib/lava/dispatcher/tmp/7300448/extract-overlay-ramdisk-cwd0l17t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7300448/extract-overlay-ramdisk-cwd0l17t/ramdisk
210 15:43:56.406600 >> 24431 blocks
211 15:43:56.863516 rename /var/lib/lava/dispatcher/tmp/7300448/extract-overlay-ramdisk-cwd0l17t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
212 15:43:56.863911 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 15:43:56.864037 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 15:43:56.864143 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 15:43:56.864244 No mkimage arch provided, not using FIT.
216 15:43:56.864333 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 15:43:56.864420 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 15:43:56.864519 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 15:43:56.864614 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 15:43:56.864693 No LXC device requested
221 15:43:56.864775 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 15:43:56.864865 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 15:43:56.864948 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 15:43:56.865019 Checking files for TFTP limit of 4294967296 bytes.
225 15:43:56.865472 end: 1 tftp-deploy (duration 00:00:23) [common]
226 15:43:56.865577 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 15:43:56.865672 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 15:43:56.865842 substitutions:
229 15:43:56.865924 - {DTB}: None
230 15:43:56.865988 - {INITRD}: 7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
231 15:43:56.866048 - {KERNEL}: 7300448/tftp-deploy-vfwaaopc/kernel/bzImage
232 15:43:56.866107 - {LAVA_MAC}: None
233 15:43:56.866164 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7300448/extract-nfsrootfs-a068_nog
234 15:43:56.866223 - {NFS_SERVER_IP}: 192.168.201.1
235 15:43:56.866278 - {PRESEED_CONFIG}: None
236 15:43:56.866334 - {PRESEED_LOCAL}: None
237 15:43:56.866388 - {RAMDISK}: 7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
238 15:43:56.866443 - {ROOT_PART}: None
239 15:43:56.866498 - {ROOT}: None
240 15:43:56.866552 - {SERVER_IP}: 192.168.201.1
241 15:43:56.866607 - {TEE}: None
242 15:43:56.866663 Parsed boot commands:
243 15:43:56.866717 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 15:43:56.866866 Parsed boot commands: tftpboot 192.168.201.1 7300448/tftp-deploy-vfwaaopc/kernel/bzImage 7300448/tftp-deploy-vfwaaopc/kernel/cmdline 7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
245 15:43:56.866956 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 15:43:56.867041 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 15:43:56.867132 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 15:43:56.867219 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 15:43:56.867293 Not connected, no need to disconnect.
250 15:43:56.867370 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 15:43:56.867451 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 15:43:56.867520 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
253 15:43:56.870273 Setting prompt string to ['lava-test: # ']
254 15:43:56.870554 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 15:43:56.870661 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 15:43:56.870758 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 15:43:56.870851 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 15:43:56.871026 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
259 15:43:56.890419 >> Command sent successfully.
260 15:43:56.892213 Returned 0 in 0 seconds
261 15:43:56.993310 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 15:43:56.994589 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 15:43:56.995051 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 15:43:56.995459 Setting prompt string to 'Starting depthcharge on Voema...'
266 15:43:56.995773 Changing prompt to 'Starting depthcharge on Voema...'
267 15:43:56.996088 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 15:43:56.997193 [Enter `^Ec?' for help]
269 15:44:04.088175
270 15:44:04.088321
271 15:44:04.098035 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 15:44:04.101413 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 15:44:04.108263 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 15:44:04.111463 CPU: AES supported, TXT NOT supported, VT supported
275 15:44:04.117986 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 15:44:04.124767 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 15:44:04.128089 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 15:44:04.131240 VBOOT: Loading verstage.
279 15:44:04.134766 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
280 15:44:04.141238 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 15:44:04.144640 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 15:44:04.154988 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 15:44:04.161956 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 15:44:04.162045
285 15:44:04.162132
286 15:44:04.174861 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 15:44:04.188912 Probing TPM: . done!
288 15:44:04.192195 TPM ready after 0 ms
289 15:44:04.195890 Connected to device vid:did:rid of 1ae0:0028:00
290 15:44:04.206731 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 15:44:04.213434 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 15:44:04.216762 Initialized TPM device CR50 revision 0
293 15:44:04.266904 tlcl_send_startup: Startup return code is 0
294 15:44:04.267003 TPM: setup succeeded
295 15:44:04.282382 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 15:44:04.296593 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 15:44:04.309487 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 15:44:04.319398 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 15:44:04.322742 Chrome EC: UHEPI supported
300 15:44:04.326225 Phase 1
301 15:44:04.329615 FMAP: area GBB found @ 1805000 (458752 bytes)
302 15:44:04.339376 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 15:44:04.346068 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 15:44:04.352814 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 15:44:04.359634 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 15:44:04.362976 Recovery requested (1009000e)
307 15:44:04.365994 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 15:44:04.377604 tlcl_extend: response is 0
309 15:44:04.384521 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 15:44:04.393998 tlcl_extend: response is 0
311 15:44:04.400981 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 15:44:04.407651 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 15:44:04.413861 BS: verstage times (exec / console): total (unknown) / 142 ms
314 15:44:04.413944
315 15:44:04.414011
316 15:44:04.427489 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 15:44:04.433758 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 15:44:04.437077 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 15:44:04.440560 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 15:44:04.447417 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 15:44:04.450338 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 15:44:04.453757 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 15:44:04.456993 TCO_STS: 0000 0000
324 15:44:04.460433 GEN_PMCON: d0015038 00002200
325 15:44:04.463822 GBLRST_CAUSE: 00000000 00000000
326 15:44:04.463903 HPR_CAUSE0: 00000000
327 15:44:04.467294 prev_sleep_state 5
328 15:44:04.470655 Boot Count incremented to 11882
329 15:44:04.476908 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 15:44:04.483632 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 15:44:04.490170 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 15:44:04.497119 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 15:44:04.501710 Chrome EC: UHEPI supported
334 15:44:04.508293 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 15:44:04.520936 Probing TPM: done!
336 15:44:04.528048 Connected to device vid:did:rid of 1ae0:0028:00
337 15:44:04.539202 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 15:44:04.545768 Initialized TPM device CR50 revision 0
339 15:44:04.556075 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 15:44:04.562617 MRC: Hash idx 0x100b comparison successful.
341 15:44:04.565944 MRC cache found, size faa8
342 15:44:04.566017 bootmode is set to: 2
343 15:44:04.569529 SPD index = 0
344 15:44:04.575853 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 15:44:04.579316 SPD: module type is LPDDR4X
346 15:44:04.582646 SPD: module part number is MT53E512M64D4NW-046
347 15:44:04.589364 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 15:44:04.592579 SPD: device width 16 bits, bus width 16 bits
349 15:44:04.599436 SPD: module size is 1024 MB (per channel)
350 15:44:05.031977 CBMEM:
351 15:44:05.035376 IMD: root @ 0x76fff000 254 entries.
352 15:44:05.038703 IMD: root @ 0x76ffec00 62 entries.
353 15:44:05.041700 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 15:44:05.048320 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 15:44:05.051845 External stage cache:
356 15:44:05.055081 IMD: root @ 0x7b3ff000 254 entries.
357 15:44:05.058620 IMD: root @ 0x7b3fec00 62 entries.
358 15:44:05.073609 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 15:44:05.080593 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 15:44:05.086734 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 15:44:05.100838 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 15:44:05.104465 cse_lite: Skip switching to RW in the recovery path
363 15:44:05.108142 8 DIMMs found
364 15:44:05.108229 SMM Memory Map
365 15:44:05.111640 SMRAM : 0x7b000000 0x800000
366 15:44:05.115305 Subregion 0: 0x7b000000 0x200000
367 15:44:05.118529 Subregion 1: 0x7b200000 0x200000
368 15:44:05.121908 Subregion 2: 0x7b400000 0x400000
369 15:44:05.125266 top_of_ram = 0x77000000
370 15:44:05.131934 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 15:44:05.135357 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 15:44:05.141492 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 15:44:05.144909 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 15:44:05.154927 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 15:44:05.161657 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 15:44:05.171569 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 15:44:05.174849 Processing 211 relocs. Offset value of 0x74c0b000
378 15:44:05.183618 BS: romstage times (exec / console): total (unknown) / 277 ms
379 15:44:05.189724
380 15:44:05.189849
381 15:44:05.199509 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 15:44:05.202934 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 15:44:05.212824 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 15:44:05.219637 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 15:44:05.226039 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 15:44:05.232651 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 15:44:05.279548 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 15:44:05.286171 Processing 5008 relocs. Offset value of 0x75d98000
389 15:44:05.289557 BS: postcar times (exec / console): total (unknown) / 59 ms
390 15:44:05.293043
391 15:44:05.293129
392 15:44:05.303715 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 15:44:05.303805 Normal boot
394 15:44:05.307312 FW_CONFIG value is 0x804c02
395 15:44:05.310313 PCI: 00:07.0 disabled by fw_config
396 15:44:05.313705 PCI: 00:07.1 disabled by fw_config
397 15:44:05.320366 PCI: 00:0d.2 disabled by fw_config
398 15:44:05.323669 PCI: 00:1c.7 disabled by fw_config
399 15:44:05.327125 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 15:44:05.333714 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 15:44:05.336940 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 15:44:05.343775 GENERIC: 0.0 disabled by fw_config
403 15:44:05.346802 GENERIC: 1.0 disabled by fw_config
404 15:44:05.350101 fw_config match found: DB_USB=USB3_ACTIVE
405 15:44:05.353413 fw_config match found: DB_USB=USB3_ACTIVE
406 15:44:05.356921 fw_config match found: DB_USB=USB3_ACTIVE
407 15:44:05.363557 fw_config match found: DB_USB=USB3_ACTIVE
408 15:44:05.366816 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 15:44:05.373649 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 15:44:05.383913 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 15:44:05.390519 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 15:44:05.393493 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 15:44:05.400375 microcode: Update skipped, already up-to-date
414 15:44:05.406851 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 15:44:05.434921 Detected 4 core, 8 thread CPU.
416 15:44:05.438207 Setting up SMI for CPU
417 15:44:05.441660 IED base = 0x7b400000
418 15:44:05.442271 IED size = 0x00400000
419 15:44:05.445054 Will perform SMM setup.
420 15:44:05.451782 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 15:44:05.458429 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 15:44:05.464738 Processing 16 relocs. Offset value of 0x00030000
423 15:44:05.468036 Attempting to start 7 APs
424 15:44:05.471326 Waiting for 10ms after sending INIT.
425 15:44:05.487133 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
426 15:44:05.490492 AP: slot 4 apic_id 4.
427 15:44:05.493640 AP: slot 7 apic_id 5.
428 15:44:05.494257 AP: slot 6 apic_id 6.
429 15:44:05.496967 AP: slot 3 apic_id 7.
430 15:44:05.500315 AP: slot 5 apic_id 2.
431 15:44:05.500805 AP: slot 2 apic_id 3.
432 15:44:05.501190 done.
433 15:44:05.506570 Waiting for 2nd SIPI to complete...done.
434 15:44:05.513279 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 15:44:05.520573 Processing 13 relocs. Offset value of 0x00038000
436 15:44:05.523559 Unable to locate Global NVS
437 15:44:05.530333 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 15:44:05.533571 Installing permanent SMM handler to 0x7b000000
439 15:44:05.543289 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 15:44:05.546679 Processing 794 relocs. Offset value of 0x7b010000
441 15:44:05.556370 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 15:44:05.559781 Processing 13 relocs. Offset value of 0x7b008000
443 15:44:05.566387 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 15:44:05.573084 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 15:44:05.576550 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 15:44:05.583206 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 15:44:05.589730 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 15:44:05.596513 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 15:44:05.602905 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 15:44:05.603339 Unable to locate Global NVS
451 15:44:05.612985 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 15:44:05.616314 Clearing SMI status registers
453 15:44:05.616756 SMI_STS: PM1
454 15:44:05.619254 PM1_STS: PWRBTN
455 15:44:05.625923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 15:44:05.629294 In relocation handler: CPU 0
457 15:44:05.632798 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 15:44:05.639500 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 15:44:05.639945 Relocation complete.
460 15:44:05.649470 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 15:44:05.650061 In relocation handler: CPU 1
462 15:44:05.655886 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 15:44:05.656357 Relocation complete.
464 15:44:05.665895 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
465 15:44:05.666354 In relocation handler: CPU 5
466 15:44:05.672958 New SMBASE=0x7affec00 IEDBASE=0x7b400000
467 15:44:05.675927 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 15:44:05.679374 Relocation complete.
469 15:44:05.686123 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
470 15:44:05.689128 In relocation handler: CPU 2
471 15:44:05.692790 New SMBASE=0x7afff800 IEDBASE=0x7b400000
472 15:44:05.696232 Relocation complete.
473 15:44:05.702480 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
474 15:44:05.705921 In relocation handler: CPU 3
475 15:44:05.709369 New SMBASE=0x7afff400 IEDBASE=0x7b400000
476 15:44:05.712921 Relocation complete.
477 15:44:05.719578 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
478 15:44:05.722437 In relocation handler: CPU 6
479 15:44:05.725662 New SMBASE=0x7affe800 IEDBASE=0x7b400000
480 15:44:05.729082 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 15:44:05.732482 Relocation complete.
482 15:44:05.738901 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 15:44:05.742424 In relocation handler: CPU 7
484 15:44:05.745603 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 15:44:05.748872 Relocation complete.
486 15:44:05.755775 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 15:44:05.759173 In relocation handler: CPU 4
488 15:44:05.762044 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 15:44:05.769458 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 15:44:05.769556 Relocation complete.
491 15:44:05.772823 Initializing CPU #0
492 15:44:05.776857 CPU: vendor Intel device 806c1
493 15:44:05.779946 CPU: family 06, model 8c, stepping 01
494 15:44:05.783178 Clearing out pending MCEs
495 15:44:05.783262 Setting up local APIC...
496 15:44:05.786508 apic_id: 0x00 done.
497 15:44:05.789731 Turbo is available but hidden
498 15:44:05.793437 Turbo is available and visible
499 15:44:05.796721 microcode: Update skipped, already up-to-date
500 15:44:05.799987 CPU #0 initialized
501 15:44:05.803258 Initializing CPU #1
502 15:44:05.803342 Initializing CPU #5
503 15:44:05.806774 Initializing CPU #2
504 15:44:05.809981 CPU: vendor Intel device 806c1
505 15:44:05.813257 CPU: family 06, model 8c, stepping 01
506 15:44:05.816267 CPU: vendor Intel device 806c1
507 15:44:05.819978 CPU: family 06, model 8c, stepping 01
508 15:44:05.823251 Clearing out pending MCEs
509 15:44:05.826664 Clearing out pending MCEs
510 15:44:05.826750 Setting up local APIC...
511 15:44:05.829913 Initializing CPU #3
512 15:44:05.833357 Initializing CPU #6
513 15:44:05.836333 CPU: vendor Intel device 806c1
514 15:44:05.839666 CPU: family 06, model 8c, stepping 01
515 15:44:05.843253 CPU: vendor Intel device 806c1
516 15:44:05.846852 CPU: family 06, model 8c, stepping 01
517 15:44:05.850000 Clearing out pending MCEs
518 15:44:05.850079 Clearing out pending MCEs
519 15:44:05.853159 Setting up local APIC...
520 15:44:05.856786 Setting up local APIC...
521 15:44:05.860028 apic_id: 0x07 done.
522 15:44:05.860103 Setting up local APIC...
523 15:44:05.862986 Initializing CPU #4
524 15:44:05.866506 Initializing CPU #7
525 15:44:05.866587 CPU: vendor Intel device 806c1
526 15:44:05.873045 CPU: family 06, model 8c, stepping 01
527 15:44:05.873135 apic_id: 0x02 done.
528 15:44:05.876255 apic_id: 0x03 done.
529 15:44:05.879574 microcode: Update skipped, already up-to-date
530 15:44:05.886518 microcode: Update skipped, already up-to-date
531 15:44:05.886602 CPU #5 initialized
532 15:44:05.890007 CPU #2 initialized
533 15:44:05.892972 microcode: Update skipped, already up-to-date
534 15:44:05.896540 apic_id: 0x06 done.
535 15:44:05.896626 CPU #3 initialized
536 15:44:05.902815 microcode: Update skipped, already up-to-date
537 15:44:05.906186 CPU: vendor Intel device 806c1
538 15:44:05.909537 CPU: family 06, model 8c, stepping 01
539 15:44:05.912869 Clearing out pending MCEs
540 15:44:05.916070 Clearing out pending MCEs
541 15:44:05.916145 Setting up local APIC...
542 15:44:05.919308 CPU #6 initialized
543 15:44:05.922723 CPU: vendor Intel device 806c1
544 15:44:05.925997 CPU: family 06, model 8c, stepping 01
545 15:44:05.929377 Clearing out pending MCEs
546 15:44:05.929458 apic_id: 0x04 done.
547 15:44:05.932760 Setting up local APIC...
548 15:44:05.936313 Setting up local APIC...
549 15:44:05.939136 microcode: Update skipped, already up-to-date
550 15:44:05.942494 apic_id: 0x05 done.
551 15:44:05.945972 CPU #4 initialized
552 15:44:05.949241 microcode: Update skipped, already up-to-date
553 15:44:05.952736 apic_id: 0x01 done.
554 15:44:05.952821 CPU #7 initialized
555 15:44:05.959075 microcode: Update skipped, already up-to-date
556 15:44:05.959161 CPU #1 initialized
557 15:44:05.965733 bsp_do_flight_plan done after 455 msecs.
558 15:44:05.965829 CPU: frequency set to 4000 MHz
559 15:44:05.969087 Enabling SMIs.
560 15:44:05.975915 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
561 15:44:05.991335 SATAXPCIE1 indicates PCIe NVMe is present
562 15:44:05.994993 Probing TPM: done!
563 15:44:05.998205 Connected to device vid:did:rid of 1ae0:0028:00
564 15:44:06.009196 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
565 15:44:06.012018 Initialized TPM device CR50 revision 0
566 15:44:06.015339 Enabling S0i3.4
567 15:44:06.022130 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 15:44:06.025314 Found a VBT of 8704 bytes after decompression
569 15:44:06.032080 cse_lite: CSE RO boot. HybridStorageMode disabled
570 15:44:06.038786 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 15:44:06.114350 FSPS returned 0
572 15:44:06.117603 Executing Phase 1 of FspMultiPhaseSiInit
573 15:44:06.127588 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 15:44:06.130999 port C0 DISC req: usage 1 usb3 1 usb2 5
575 15:44:06.134332 Raw Buffer output 0 00000511
576 15:44:06.137448 Raw Buffer output 1 00000000
577 15:44:06.141146 pmc_send_ipc_cmd succeeded
578 15:44:06.147944 port C1 DISC req: usage 1 usb3 2 usb2 3
579 15:44:06.148029 Raw Buffer output 0 00000321
580 15:44:06.151306 Raw Buffer output 1 00000000
581 15:44:06.155416 pmc_send_ipc_cmd succeeded
582 15:44:06.160452 Detected 4 core, 8 thread CPU.
583 15:44:06.163789 Detected 4 core, 8 thread CPU.
584 15:44:06.398248 Display FSP Version Info HOB
585 15:44:06.401265 Reference Code - CPU = a.0.4c.31
586 15:44:06.404507 uCode Version = 0.0.0.86
587 15:44:06.407827 TXT ACM version = ff.ff.ff.ffff
588 15:44:06.411076 Reference Code - ME = a.0.4c.31
589 15:44:06.414525 MEBx version = 0.0.0.0
590 15:44:06.418040 ME Firmware Version = Consumer SKU
591 15:44:06.421406 Reference Code - PCH = a.0.4c.31
592 15:44:06.424820 PCH-CRID Status = Disabled
593 15:44:06.428023 PCH-CRID Original Value = ff.ff.ff.ffff
594 15:44:06.431417 PCH-CRID New Value = ff.ff.ff.ffff
595 15:44:06.434304 OPROM - RST - RAID = ff.ff.ff.ffff
596 15:44:06.437677 PCH Hsio Version = 4.0.0.0
597 15:44:06.441162 Reference Code - SA - System Agent = a.0.4c.31
598 15:44:06.444703 Reference Code - MRC = 2.0.0.1
599 15:44:06.448009 SA - PCIe Version = a.0.4c.31
600 15:44:06.450979 SA-CRID Status = Disabled
601 15:44:06.454634 SA-CRID Original Value = 0.0.0.1
602 15:44:06.457613 SA-CRID New Value = 0.0.0.1
603 15:44:06.461209 OPROM - VBIOS = ff.ff.ff.ffff
604 15:44:06.464572 IO Manageability Engine FW Version = 11.1.4.0
605 15:44:06.467567 PHY Build Version = 0.0.0.e0
606 15:44:06.470914 Thunderbolt(TM) FW Version = 0.0.0.0
607 15:44:06.477619 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 15:44:06.480875 ITSS IRQ Polarities Before:
609 15:44:06.480959 IPC0: 0xffffffff
610 15:44:06.484269 IPC1: 0xffffffff
611 15:44:06.484353 IPC2: 0xffffffff
612 15:44:06.487902 IPC3: 0xffffffff
613 15:44:06.491236 ITSS IRQ Polarities After:
614 15:44:06.491324 IPC0: 0xffffffff
615 15:44:06.494734 IPC1: 0xffffffff
616 15:44:06.494818 IPC2: 0xffffffff
617 15:44:06.497946 IPC3: 0xffffffff
618 15:44:06.500925 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 15:44:06.514465 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 15:44:06.524072 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 15:44:06.537370 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 15:44:06.544199 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
623 15:44:06.544285 Enumerating buses...
624 15:44:06.550992 Show all devs... Before device enumeration.
625 15:44:06.551074 Root Device: enabled 1
626 15:44:06.553943 DOMAIN: 0000: enabled 1
627 15:44:06.557467 CPU_CLUSTER: 0: enabled 1
628 15:44:06.560845 PCI: 00:00.0: enabled 1
629 15:44:06.560927 PCI: 00:02.0: enabled 1
630 15:44:06.564122 PCI: 00:04.0: enabled 1
631 15:44:06.567386 PCI: 00:05.0: enabled 1
632 15:44:06.570871 PCI: 00:06.0: enabled 0
633 15:44:06.570949 PCI: 00:07.0: enabled 0
634 15:44:06.574173 PCI: 00:07.1: enabled 0
635 15:44:06.577600 PCI: 00:07.2: enabled 0
636 15:44:06.580663 PCI: 00:07.3: enabled 0
637 15:44:06.580737 PCI: 00:08.0: enabled 1
638 15:44:06.584011 PCI: 00:09.0: enabled 0
639 15:44:06.587467 PCI: 00:0a.0: enabled 0
640 15:44:06.590699 PCI: 00:0d.0: enabled 1
641 15:44:06.590781 PCI: 00:0d.1: enabled 0
642 15:44:06.593937 PCI: 00:0d.2: enabled 0
643 15:44:06.597287 PCI: 00:0d.3: enabled 0
644 15:44:06.597361 PCI: 00:0e.0: enabled 0
645 15:44:06.600535 PCI: 00:10.2: enabled 1
646 15:44:06.604091 PCI: 00:10.6: enabled 0
647 15:44:06.607240 PCI: 00:10.7: enabled 0
648 15:44:06.607326 PCI: 00:12.0: enabled 0
649 15:44:06.610561 PCI: 00:12.6: enabled 0
650 15:44:06.614228 PCI: 00:13.0: enabled 0
651 15:44:06.617438 PCI: 00:14.0: enabled 1
652 15:44:06.617516 PCI: 00:14.1: enabled 0
653 15:44:06.620742 PCI: 00:14.2: enabled 1
654 15:44:06.624033 PCI: 00:14.3: enabled 1
655 15:44:06.627368 PCI: 00:15.0: enabled 1
656 15:44:06.627447 PCI: 00:15.1: enabled 1
657 15:44:06.630713 PCI: 00:15.2: enabled 1
658 15:44:06.633756 PCI: 00:15.3: enabled 1
659 15:44:06.637010 PCI: 00:16.0: enabled 1
660 15:44:06.637083 PCI: 00:16.1: enabled 0
661 15:44:06.640677 PCI: 00:16.2: enabled 0
662 15:44:06.643695 PCI: 00:16.3: enabled 0
663 15:44:06.643771 PCI: 00:16.4: enabled 0
664 15:44:06.646978 PCI: 00:16.5: enabled 0
665 15:44:06.650411 PCI: 00:17.0: enabled 1
666 15:44:06.653867 PCI: 00:19.0: enabled 0
667 15:44:06.653943 PCI: 00:19.1: enabled 1
668 15:44:06.657370 PCI: 00:19.2: enabled 0
669 15:44:06.660291 PCI: 00:1c.0: enabled 1
670 15:44:06.663998 PCI: 00:1c.1: enabled 0
671 15:44:06.664076 PCI: 00:1c.2: enabled 0
672 15:44:06.667151 PCI: 00:1c.3: enabled 0
673 15:44:06.670446 PCI: 00:1c.4: enabled 0
674 15:44:06.673630 PCI: 00:1c.5: enabled 0
675 15:44:06.673707 PCI: 00:1c.6: enabled 1
676 15:44:06.677019 PCI: 00:1c.7: enabled 0
677 15:44:06.680547 PCI: 00:1d.0: enabled 1
678 15:44:06.680625 PCI: 00:1d.1: enabled 0
679 15:44:06.683778 PCI: 00:1d.2: enabled 1
680 15:44:06.687138 PCI: 00:1d.3: enabled 0
681 15:44:06.690541 PCI: 00:1e.0: enabled 1
682 15:44:06.690620 PCI: 00:1e.1: enabled 0
683 15:44:06.693741 PCI: 00:1e.2: enabled 1
684 15:44:06.697030 PCI: 00:1e.3: enabled 1
685 15:44:06.700414 PCI: 00:1f.0: enabled 1
686 15:44:06.700490 PCI: 00:1f.1: enabled 0
687 15:44:06.703744 PCI: 00:1f.2: enabled 1
688 15:44:06.707114 PCI: 00:1f.3: enabled 1
689 15:44:06.710373 PCI: 00:1f.4: enabled 0
690 15:44:06.710450 PCI: 00:1f.5: enabled 1
691 15:44:06.713657 PCI: 00:1f.6: enabled 0
692 15:44:06.717577 PCI: 00:1f.7: enabled 0
693 15:44:06.717668 APIC: 00: enabled 1
694 15:44:06.720522 GENERIC: 0.0: enabled 1
695 15:44:06.723781 GENERIC: 0.0: enabled 1
696 15:44:06.727163 GENERIC: 1.0: enabled 1
697 15:44:06.727249 GENERIC: 0.0: enabled 1
698 15:44:06.730592 GENERIC: 1.0: enabled 1
699 15:44:06.733843 USB0 port 0: enabled 1
700 15:44:06.733930 GENERIC: 0.0: enabled 1
701 15:44:06.737059 USB0 port 0: enabled 1
702 15:44:06.740492 GENERIC: 0.0: enabled 1
703 15:44:06.743800 I2C: 00:1a: enabled 1
704 15:44:06.743885 I2C: 00:31: enabled 1
705 15:44:06.747219 I2C: 00:32: enabled 1
706 15:44:06.750125 I2C: 00:10: enabled 1
707 15:44:06.750212 I2C: 00:15: enabled 1
708 15:44:06.753609 GENERIC: 0.0: enabled 0
709 15:44:06.757104 GENERIC: 1.0: enabled 0
710 15:44:06.760554 GENERIC: 0.0: enabled 1
711 15:44:06.760640 SPI: 00: enabled 1
712 15:44:06.763797 SPI: 00: enabled 1
713 15:44:06.763883 PNP: 0c09.0: enabled 1
714 15:44:06.767015 GENERIC: 0.0: enabled 1
715 15:44:06.770283 USB3 port 0: enabled 1
716 15:44:06.773652 USB3 port 1: enabled 1
717 15:44:06.773752 USB3 port 2: enabled 0
718 15:44:06.776739 USB3 port 3: enabled 0
719 15:44:06.780150 USB2 port 0: enabled 0
720 15:44:06.780236 USB2 port 1: enabled 1
721 15:44:06.783548 USB2 port 2: enabled 1
722 15:44:06.787017 USB2 port 3: enabled 0
723 15:44:06.787103 USB2 port 4: enabled 1
724 15:44:06.790185 USB2 port 5: enabled 0
725 15:44:06.793483 USB2 port 6: enabled 0
726 15:44:06.796810 USB2 port 7: enabled 0
727 15:44:06.796896 USB2 port 8: enabled 0
728 15:44:06.800128 USB2 port 9: enabled 0
729 15:44:06.803367 USB3 port 0: enabled 0
730 15:44:06.803496 USB3 port 1: enabled 1
731 15:44:06.806773 USB3 port 2: enabled 0
732 15:44:06.810187 USB3 port 3: enabled 0
733 15:44:06.813194 GENERIC: 0.0: enabled 1
734 15:44:06.813277 GENERIC: 1.0: enabled 1
735 15:44:06.816987 APIC: 01: enabled 1
736 15:44:06.820287 APIC: 03: enabled 1
737 15:44:06.820373 APIC: 07: enabled 1
738 15:44:06.823338 APIC: 04: enabled 1
739 15:44:06.823436 APIC: 02: enabled 1
740 15:44:06.826647 APIC: 06: enabled 1
741 15:44:06.830002 APIC: 05: enabled 1
742 15:44:06.830087 Compare with tree...
743 15:44:06.833297 Root Device: enabled 1
744 15:44:06.836496 DOMAIN: 0000: enabled 1
745 15:44:06.839817 PCI: 00:00.0: enabled 1
746 15:44:06.839902 PCI: 00:02.0: enabled 1
747 15:44:06.843135 PCI: 00:04.0: enabled 1
748 15:44:06.846684 GENERIC: 0.0: enabled 1
749 15:44:06.850039 PCI: 00:05.0: enabled 1
750 15:44:06.853350 PCI: 00:06.0: enabled 0
751 15:44:06.853435 PCI: 00:07.0: enabled 0
752 15:44:06.856378 GENERIC: 0.0: enabled 1
753 15:44:06.859811 PCI: 00:07.1: enabled 0
754 15:44:06.863214 GENERIC: 1.0: enabled 1
755 15:44:06.866816 PCI: 00:07.2: enabled 0
756 15:44:06.866902 GENERIC: 0.0: enabled 1
757 15:44:06.869727 PCI: 00:07.3: enabled 0
758 15:44:06.873018 GENERIC: 1.0: enabled 1
759 15:44:06.876459 PCI: 00:08.0: enabled 1
760 15:44:06.879802 PCI: 00:09.0: enabled 0
761 15:44:06.879888 PCI: 00:0a.0: enabled 0
762 15:44:06.883189 PCI: 00:0d.0: enabled 1
763 15:44:06.886712 USB0 port 0: enabled 1
764 15:44:06.890015 USB3 port 0: enabled 1
765 15:44:06.893360 USB3 port 1: enabled 1
766 15:44:06.893452 USB3 port 2: enabled 0
767 15:44:06.896727 USB3 port 3: enabled 0
768 15:44:06.900035 PCI: 00:0d.1: enabled 0
769 15:44:06.902955 PCI: 00:0d.2: enabled 0
770 15:44:06.906684 GENERIC: 0.0: enabled 1
771 15:44:06.906771 PCI: 00:0d.3: enabled 0
772 15:44:06.909723 PCI: 00:0e.0: enabled 0
773 15:44:06.913041 PCI: 00:10.2: enabled 1
774 15:44:06.916221 PCI: 00:10.6: enabled 0
775 15:44:06.919653 PCI: 00:10.7: enabled 0
776 15:44:06.919731 PCI: 00:12.0: enabled 0
777 15:44:06.922940 PCI: 00:12.6: enabled 0
778 15:44:06.926284 PCI: 00:13.0: enabled 0
779 15:44:06.929649 PCI: 00:14.0: enabled 1
780 15:44:06.932934 USB0 port 0: enabled 1
781 15:44:06.933011 USB2 port 0: enabled 0
782 15:44:06.936377 USB2 port 1: enabled 1
783 15:44:06.939700 USB2 port 2: enabled 1
784 15:44:06.943039 USB2 port 3: enabled 0
785 15:44:06.946491 USB2 port 4: enabled 1
786 15:44:06.949681 USB2 port 5: enabled 0
787 15:44:06.949757 USB2 port 6: enabled 0
788 15:44:06.952772 USB2 port 7: enabled 0
789 15:44:06.956260 USB2 port 8: enabled 0
790 15:44:06.959663 USB2 port 9: enabled 0
791 15:44:06.963065 USB3 port 0: enabled 0
792 15:44:06.966392 USB3 port 1: enabled 1
793 15:44:06.966477 USB3 port 2: enabled 0
794 15:44:06.969420 USB3 port 3: enabled 0
795 15:44:06.972718 PCI: 00:14.1: enabled 0
796 15:44:06.976083 PCI: 00:14.2: enabled 1
797 15:44:06.979331 PCI: 00:14.3: enabled 1
798 15:44:06.979416 GENERIC: 0.0: enabled 1
799 15:44:06.983102 PCI: 00:15.0: enabled 1
800 15:44:06.986192 I2C: 00:1a: enabled 1
801 15:44:06.989490 I2C: 00:31: enabled 1
802 15:44:06.989566 I2C: 00:32: enabled 1
803 15:44:06.992873 PCI: 00:15.1: enabled 1
804 15:44:06.996128 I2C: 00:10: enabled 1
805 15:44:06.999465 PCI: 00:15.2: enabled 1
806 15:44:07.002795 PCI: 00:15.3: enabled 1
807 15:44:07.002876 PCI: 00:16.0: enabled 1
808 15:44:07.006181 PCI: 00:16.1: enabled 0
809 15:44:07.009812 PCI: 00:16.2: enabled 0
810 15:44:07.013641 PCI: 00:16.3: enabled 0
811 15:44:07.013720 PCI: 00:16.4: enabled 0
812 15:44:07.017695 PCI: 00:16.5: enabled 0
813 15:44:07.021149 PCI: 00:17.0: enabled 1
814 15:44:07.021235 PCI: 00:19.0: enabled 0
815 15:44:07.024055 PCI: 00:19.1: enabled 1
816 15:44:07.027470 I2C: 00:15: enabled 1
817 15:44:07.030844 PCI: 00:19.2: enabled 0
818 15:44:07.034101 PCI: 00:1d.0: enabled 1
819 15:44:07.034185 GENERIC: 0.0: enabled 1
820 15:44:07.037423 PCI: 00:1e.0: enabled 1
821 15:44:07.041077 PCI: 00:1e.1: enabled 0
822 15:44:07.044070 PCI: 00:1e.2: enabled 1
823 15:44:07.044154 SPI: 00: enabled 1
824 15:44:07.047742 PCI: 00:1e.3: enabled 1
825 15:44:07.051030 SPI: 00: enabled 1
826 15:44:07.054325 PCI: 00:1f.0: enabled 1
827 15:44:07.057647 PNP: 0c09.0: enabled 1
828 15:44:07.057731 PCI: 00:1f.1: enabled 0
829 15:44:07.109320 PCI: 00:1f.2: enabled 1
830 15:44:07.109413 GENERIC: 0.0: enabled 1
831 15:44:07.109672 GENERIC: 0.0: enabled 1
832 15:44:07.109743 GENERIC: 1.0: enabled 1
833 15:44:07.109849 PCI: 00:1f.3: enabled 1
834 15:44:07.109908 PCI: 00:1f.4: enabled 0
835 15:44:07.109965 PCI: 00:1f.5: enabled 1
836 15:44:07.110021 PCI: 00:1f.6: enabled 0
837 15:44:07.110076 PCI: 00:1f.7: enabled 0
838 15:44:07.110361 CPU_CLUSTER: 0: enabled 1
839 15:44:07.110441 APIC: 00: enabled 1
840 15:44:07.110505 APIC: 01: enabled 1
841 15:44:07.110574 APIC: 03: enabled 1
842 15:44:07.110632 APIC: 07: enabled 1
843 15:44:07.110688 APIC: 04: enabled 1
844 15:44:07.110751 APIC: 02: enabled 1
845 15:44:07.110806 APIC: 06: enabled 1
846 15:44:07.111048 APIC: 05: enabled 1
847 15:44:07.111111 Root Device scanning...
848 15:44:07.159792 scan_static_bus for Root Device
849 15:44:07.159892 DOMAIN: 0000 enabled
850 15:44:07.159969 CPU_CLUSTER: 0 enabled
851 15:44:07.160232 DOMAIN: 0000 scanning...
852 15:44:07.160302 PCI: pci_scan_bus for bus 00
853 15:44:07.160550 PCI: 00:00.0 [8086/0000] ops
854 15:44:07.160616 PCI: 00:00.0 [8086/9a12] enabled
855 15:44:07.160675 PCI: 00:02.0 [8086/0000] bus ops
856 15:44:07.160732 PCI: 00:02.0 [8086/9a40] enabled
857 15:44:07.160986 PCI: 00:04.0 [8086/0000] bus ops
858 15:44:07.161051 PCI: 00:04.0 [8086/9a03] enabled
859 15:44:07.161292 PCI: 00:05.0 [8086/9a19] enabled
860 15:44:07.161361 PCI: 00:07.0 [0000/0000] hidden
861 15:44:07.161602 PCI: 00:08.0 [8086/9a11] enabled
862 15:44:07.161664 PCI: 00:0a.0 [8086/9a0d] disabled
863 15:44:07.161720 PCI: 00:0d.0 [8086/0000] bus ops
864 15:44:07.161800 PCI: 00:0d.0 [8086/9a13] enabled
865 15:44:07.209910 PCI: 00:14.0 [8086/0000] bus ops
866 15:44:07.210047 PCI: 00:14.0 [8086/a0ed] enabled
867 15:44:07.210312 PCI: 00:14.2 [8086/a0ef] enabled
868 15:44:07.210379 PCI: 00:14.3 [8086/0000] bus ops
869 15:44:07.210440 PCI: 00:14.3 [8086/a0f0] enabled
870 15:44:07.210499 PCI: 00:15.0 [8086/0000] bus ops
871 15:44:07.210564 PCI: 00:15.0 [8086/a0e8] enabled
872 15:44:07.210805 PCI: 00:15.1 [8086/0000] bus ops
873 15:44:07.210867 PCI: 00:15.1 [8086/a0e9] enabled
874 15:44:07.211183 PCI: 00:15.2 [8086/0000] bus ops
875 15:44:07.211274 PCI: 00:15.2 [8086/a0ea] enabled
876 15:44:07.211534 PCI: 00:15.3 [8086/0000] bus ops
877 15:44:07.211602 PCI: 00:15.3 [8086/a0eb] enabled
878 15:44:07.211664 PCI: 00:16.0 [8086/0000] ops
879 15:44:07.211722 PCI: 00:16.0 [8086/a0e0] enabled
880 15:44:07.242275 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 15:44:07.242782 PCI: 00:19.0 [8086/0000] bus ops
882 15:44:07.242867 PCI: 00:19.0 [8086/a0c5] disabled
883 15:44:07.243268 PCI: 00:19.1 [8086/0000] bus ops
884 15:44:07.243339 PCI: 00:19.1 [8086/a0c6] enabled
885 15:44:07.243602 PCI: 00:1d.0 [8086/0000] bus ops
886 15:44:07.243669 PCI: 00:1d.0 [8086/a0b0] enabled
887 15:44:07.243914 PCI: 00:1e.0 [8086/0000] ops
888 15:44:07.243978 PCI: 00:1e.0 [8086/a0a8] enabled
889 15:44:07.246878 PCI: 00:1e.2 [8086/0000] bus ops
890 15:44:07.250139 PCI: 00:1e.2 [8086/a0aa] enabled
891 15:44:07.253476 PCI: 00:1e.3 [8086/0000] bus ops
892 15:44:07.256716 PCI: 00:1e.3 [8086/a0ab] enabled
893 15:44:07.260067 PCI: 00:1f.0 [8086/0000] bus ops
894 15:44:07.263549 PCI: 00:1f.0 [8086/a087] enabled
895 15:44:07.263633 RTC Init
896 15:44:07.266829 Set power on after power failure.
897 15:44:07.270148 Disabling Deep S3
898 15:44:07.270260 Disabling Deep S3
899 15:44:07.273117 Disabling Deep S4
900 15:44:07.273193 Disabling Deep S4
901 15:44:07.276570 Disabling Deep S5
902 15:44:07.279814 Disabling Deep S5
903 15:44:07.283286 PCI: 00:1f.2 [0000/0000] hidden
904 15:44:07.286666 PCI: 00:1f.3 [8086/0000] bus ops
905 15:44:07.290037 PCI: 00:1f.3 [8086/a0c8] enabled
906 15:44:07.293373 PCI: 00:1f.5 [8086/0000] bus ops
907 15:44:07.296820 PCI: 00:1f.5 [8086/a0a4] enabled
908 15:44:07.296896 PCI: Leftover static devices:
909 15:44:07.299795 PCI: 00:10.2
910 15:44:07.299872 PCI: 00:10.6
911 15:44:07.303539 PCI: 00:10.7
912 15:44:07.303614 PCI: 00:06.0
913 15:44:07.306881 PCI: 00:07.1
914 15:44:07.306957 PCI: 00:07.2
915 15:44:07.307029 PCI: 00:07.3
916 15:44:07.309901 PCI: 00:09.0
917 15:44:07.309975 PCI: 00:0d.1
918 15:44:07.313329 PCI: 00:0d.2
919 15:44:07.313406 PCI: 00:0d.3
920 15:44:07.313469 PCI: 00:0e.0
921 15:44:07.316572 PCI: 00:12.0
922 15:44:07.316651 PCI: 00:12.6
923 15:44:07.320024 PCI: 00:13.0
924 15:44:07.320101 PCI: 00:14.1
925 15:44:07.323295 PCI: 00:16.1
926 15:44:07.323362 PCI: 00:16.2
927 15:44:07.323423 PCI: 00:16.3
928 15:44:07.326437 PCI: 00:16.4
929 15:44:07.326522 PCI: 00:16.5
930 15:44:07.329747 PCI: 00:17.0
931 15:44:07.329840 PCI: 00:19.2
932 15:44:07.329909 PCI: 00:1e.1
933 15:44:07.333165 PCI: 00:1f.1
934 15:44:07.333237 PCI: 00:1f.4
935 15:44:07.336452 PCI: 00:1f.6
936 15:44:07.336525 PCI: 00:1f.7
937 15:44:07.339787 PCI: Check your devicetree.cb.
938 15:44:07.343340 PCI: 00:02.0 scanning...
939 15:44:07.346564 scan_generic_bus for PCI: 00:02.0
940 15:44:07.349964 scan_generic_bus for PCI: 00:02.0 done
941 15:44:07.353334 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 15:44:07.356211 PCI: 00:04.0 scanning...
943 15:44:07.359567 scan_generic_bus for PCI: 00:04.0
944 15:44:07.362982 GENERIC: 0.0 enabled
945 15:44:07.369475 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 15:44:07.372903 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 15:44:07.376263 PCI: 00:0d.0 scanning...
948 15:44:07.379649 scan_static_bus for PCI: 00:0d.0
949 15:44:07.382804 USB0 port 0 enabled
950 15:44:07.382890 USB0 port 0 scanning...
951 15:44:07.386186 scan_static_bus for USB0 port 0
952 15:44:07.389801 USB3 port 0 enabled
953 15:44:07.392882 USB3 port 1 enabled
954 15:44:07.392966 USB3 port 2 disabled
955 15:44:07.396290 USB3 port 3 disabled
956 15:44:07.399554 USB3 port 0 scanning...
957 15:44:07.402956 scan_static_bus for USB3 port 0
958 15:44:07.406339 scan_static_bus for USB3 port 0 done
959 15:44:07.409566 scan_bus: bus USB3 port 0 finished in 6 msecs
960 15:44:07.412911 USB3 port 1 scanning...
961 15:44:07.416191 scan_static_bus for USB3 port 1
962 15:44:07.419683 scan_static_bus for USB3 port 1 done
963 15:44:07.426204 scan_bus: bus USB3 port 1 finished in 6 msecs
964 15:44:07.429531 scan_static_bus for USB0 port 0 done
965 15:44:07.432843 scan_bus: bus USB0 port 0 finished in 43 msecs
966 15:44:07.436097 scan_static_bus for PCI: 00:0d.0 done
967 15:44:07.442966 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 15:44:07.443050 PCI: 00:14.0 scanning...
969 15:44:07.446193 scan_static_bus for PCI: 00:14.0
970 15:44:07.449553 USB0 port 0 enabled
971 15:44:07.452947 USB0 port 0 scanning...
972 15:44:07.455930 scan_static_bus for USB0 port 0
973 15:44:07.459658 USB2 port 0 disabled
974 15:44:07.459743 USB2 port 1 enabled
975 15:44:07.462651 USB2 port 2 enabled
976 15:44:07.462735 USB2 port 3 disabled
977 15:44:07.466031 USB2 port 4 enabled
978 15:44:07.469635 USB2 port 5 disabled
979 15:44:07.469720 USB2 port 6 disabled
980 15:44:07.472716 USB2 port 7 disabled
981 15:44:07.476123 USB2 port 8 disabled
982 15:44:07.476207 USB2 port 9 disabled
983 15:44:07.479074 USB3 port 0 disabled
984 15:44:07.482715 USB3 port 1 enabled
985 15:44:07.482799 USB3 port 2 disabled
986 15:44:07.486033 USB3 port 3 disabled
987 15:44:07.489361 USB2 port 1 scanning...
988 15:44:07.492685 scan_static_bus for USB2 port 1
989 15:44:07.495609 scan_static_bus for USB2 port 1 done
990 15:44:07.499076 scan_bus: bus USB2 port 1 finished in 6 msecs
991 15:44:07.502403 USB2 port 2 scanning...
992 15:44:07.505978 scan_static_bus for USB2 port 2
993 15:44:07.508866 scan_static_bus for USB2 port 2 done
994 15:44:07.512633 scan_bus: bus USB2 port 2 finished in 6 msecs
995 15:44:07.515878 USB2 port 4 scanning...
996 15:44:07.519204 scan_static_bus for USB2 port 4
997 15:44:07.522537 scan_static_bus for USB2 port 4 done
998 15:44:07.529143 scan_bus: bus USB2 port 4 finished in 6 msecs
999 15:44:07.529227 USB3 port 1 scanning...
1000 15:44:07.532514 scan_static_bus for USB3 port 1
1001 15:44:07.538864 scan_static_bus for USB3 port 1 done
1002 15:44:07.542203 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 15:44:07.545528 scan_static_bus for USB0 port 0 done
1004 15:44:07.549162 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 15:44:07.555826 scan_static_bus for PCI: 00:14.0 done
1006 15:44:07.558883 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1007 15:44:07.562218 PCI: 00:14.3 scanning...
1008 15:44:07.565693 scan_static_bus for PCI: 00:14.3
1009 15:44:07.568769 GENERIC: 0.0 enabled
1010 15:44:07.572139 scan_static_bus for PCI: 00:14.3 done
1011 15:44:07.575667 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 15:44:07.578949 PCI: 00:15.0 scanning...
1013 15:44:07.582065 scan_static_bus for PCI: 00:15.0
1014 15:44:07.585314 I2C: 00:1a enabled
1015 15:44:07.585402 I2C: 00:31 enabled
1016 15:44:07.589490 I2C: 00:32 enabled
1017 15:44:07.592891 scan_static_bus for PCI: 00:15.0 done
1018 15:44:07.596244 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 15:44:07.599608 PCI: 00:15.1 scanning...
1020 15:44:07.602950 scan_static_bus for PCI: 00:15.1
1021 15:44:07.603036 I2C: 00:10 enabled
1022 15:44:07.609642 scan_static_bus for PCI: 00:15.1 done
1023 15:44:07.612980 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 15:44:07.616297 PCI: 00:15.2 scanning...
1025 15:44:07.619689 scan_static_bus for PCI: 00:15.2
1026 15:44:07.622872 scan_static_bus for PCI: 00:15.2 done
1027 15:44:07.626231 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 15:44:07.629478 PCI: 00:15.3 scanning...
1029 15:44:07.632834 scan_static_bus for PCI: 00:15.3
1030 15:44:07.636337 scan_static_bus for PCI: 00:15.3 done
1031 15:44:07.642732 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 15:44:07.646178 PCI: 00:19.1 scanning...
1033 15:44:07.649502 scan_static_bus for PCI: 00:19.1
1034 15:44:07.649587 I2C: 00:15 enabled
1035 15:44:07.652808 scan_static_bus for PCI: 00:19.1 done
1036 15:44:07.659304 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 15:44:07.662610 PCI: 00:1d.0 scanning...
1038 15:44:07.665784 do_pci_scan_bridge for PCI: 00:1d.0
1039 15:44:07.669063 PCI: pci_scan_bus for bus 01
1040 15:44:07.672697 PCI: 01:00.0 [1c5c/174a] enabled
1041 15:44:07.672783 GENERIC: 0.0 enabled
1042 15:44:07.679541 Enabling Common Clock Configuration
1043 15:44:07.682710 L1 Sub-State supported from root port 29
1044 15:44:07.685922 L1 Sub-State Support = 0xf
1045 15:44:07.686008 CommonModeRestoreTime = 0x28
1046 15:44:07.692652 Power On Value = 0x16, Power On Scale = 0x0
1047 15:44:07.692737 ASPM: Enabled L1
1048 15:44:07.695979 PCIe: Max_Payload_Size adjusted to 128
1049 15:44:07.702689 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 15:44:07.705997 PCI: 00:1e.2 scanning...
1051 15:44:07.709462 scan_generic_bus for PCI: 00:1e.2
1052 15:44:07.709565 SPI: 00 enabled
1053 15:44:07.715990 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 15:44:07.722583 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 15:44:07.722714 PCI: 00:1e.3 scanning...
1056 15:44:07.725730 scan_generic_bus for PCI: 00:1e.3
1057 15:44:07.729530 SPI: 00 enabled
1058 15:44:07.735823 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 15:44:07.739233 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 15:44:07.742537 PCI: 00:1f.0 scanning...
1061 15:44:07.745870 scan_static_bus for PCI: 00:1f.0
1062 15:44:07.748873 PNP: 0c09.0 enabled
1063 15:44:07.748958 PNP: 0c09.0 scanning...
1064 15:44:07.752501 scan_static_bus for PNP: 0c09.0
1065 15:44:07.758812 scan_static_bus for PNP: 0c09.0 done
1066 15:44:07.762107 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 15:44:07.765475 scan_static_bus for PCI: 00:1f.0 done
1068 15:44:07.772383 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 15:44:07.772469 PCI: 00:1f.2 scanning...
1070 15:44:07.775647 scan_static_bus for PCI: 00:1f.2
1071 15:44:07.778621 GENERIC: 0.0 enabled
1072 15:44:07.781970 GENERIC: 0.0 scanning...
1073 15:44:07.785397 scan_static_bus for GENERIC: 0.0
1074 15:44:07.788654 GENERIC: 0.0 enabled
1075 15:44:07.788739 GENERIC: 1.0 enabled
1076 15:44:07.791949 scan_static_bus for GENERIC: 0.0 done
1077 15:44:07.798740 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 15:44:07.802067 scan_static_bus for PCI: 00:1f.2 done
1079 15:44:07.805586 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 15:44:07.808497 PCI: 00:1f.3 scanning...
1081 15:44:07.811920 scan_static_bus for PCI: 00:1f.3
1082 15:44:07.815244 scan_static_bus for PCI: 00:1f.3 done
1083 15:44:07.821882 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 15:44:07.825145 PCI: 00:1f.5 scanning...
1085 15:44:07.828409 scan_generic_bus for PCI: 00:1f.5
1086 15:44:07.831783 scan_generic_bus for PCI: 00:1f.5 done
1087 15:44:07.835107 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 15:44:07.841828 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 15:44:07.845191 scan_static_bus for Root Device done
1090 15:44:07.848575 scan_bus: bus Root Device finished in 737 msecs
1091 15:44:07.851528 done
1092 15:44:07.855234 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 15:44:07.858339 Chrome EC: UHEPI supported
1094 15:44:07.865062 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 15:44:07.871489 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 15:44:07.874782 SPI flash protection: WPSW=0 SRP0=0
1097 15:44:07.881672 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 15:44:07.885064 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 15:44:07.888010 found VGA at PCI: 00:02.0
1100 15:44:07.891522 Setting up VGA for PCI: 00:02.0
1101 15:44:07.898203 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 15:44:07.901557 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 15:44:07.904652 Allocating resources...
1104 15:44:07.908102 Reading resources...
1105 15:44:07.911394 Root Device read_resources bus 0 link: 0
1106 15:44:07.914908 DOMAIN: 0000 read_resources bus 0 link: 0
1107 15:44:07.921494 PCI: 00:04.0 read_resources bus 1 link: 0
1108 15:44:07.924814 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 15:44:07.931206 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 15:44:07.934594 USB0 port 0 read_resources bus 0 link: 0
1111 15:44:07.941207 USB0 port 0 read_resources bus 0 link: 0 done
1112 15:44:07.944548 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 15:44:07.951281 PCI: 00:14.0 read_resources bus 0 link: 0
1114 15:44:07.954446 USB0 port 0 read_resources bus 0 link: 0
1115 15:44:07.960937 USB0 port 0 read_resources bus 0 link: 0 done
1116 15:44:07.964268 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 15:44:07.967696 PCI: 00:14.3 read_resources bus 0 link: 0
1118 15:44:07.974394 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 15:44:07.977849 PCI: 00:15.0 read_resources bus 0 link: 0
1120 15:44:07.985072 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 15:44:07.988334 PCI: 00:15.1 read_resources bus 0 link: 0
1122 15:44:07.994958 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 15:44:07.998380 PCI: 00:19.1 read_resources bus 0 link: 0
1124 15:44:08.005349 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 15:44:08.008335 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 15:44:08.015159 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 15:44:08.018446 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 15:44:08.025029 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 15:44:08.028410 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 15:44:08.035098 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 15:44:08.038425 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 15:44:08.045229 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 15:44:08.048517 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 15:44:08.051814 GENERIC: 0.0 read_resources bus 0 link: 0
1135 15:44:08.059072 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 15:44:08.061758 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 15:44:08.069401 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 15:44:08.072573 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 15:44:08.079549 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 15:44:08.082319 Root Device read_resources bus 0 link: 0 done
1141 15:44:08.085737 Done reading resources.
1142 15:44:08.092623 Show resources in subtree (Root Device)...After reading.
1143 15:44:08.095761 Root Device child on link 0 DOMAIN: 0000
1144 15:44:08.099191 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 15:44:08.109281 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 15:44:08.118938 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 15:44:08.122539 PCI: 00:00.0
1148 15:44:08.132148 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 15:44:08.139098 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 15:44:08.149100 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 15:44:08.158877 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 15:44:08.169025 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 15:44:08.178774 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 15:44:08.188825 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 15:44:08.195219 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 15:44:08.205316 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 15:44:08.215157 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 15:44:08.225528 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 15:44:08.234973 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 15:44:08.241648 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 15:44:08.251834 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 15:44:08.261929 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 15:44:08.271917 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 15:44:08.281530 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 15:44:08.291430 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 15:44:08.298055 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 15:44:08.308076 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 15:44:08.311427 PCI: 00:02.0
1169 15:44:08.321593 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 15:44:08.331333 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 15:44:08.341225 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 15:44:08.344645 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 15:44:08.354618 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 15:44:08.358074 GENERIC: 0.0
1175 15:44:08.358160 PCI: 00:05.0
1176 15:44:08.367641 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 15:44:08.371180 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 15:44:08.374705 GENERIC: 0.0
1179 15:44:08.377757 PCI: 00:08.0
1180 15:44:08.387754 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:44:08.387840 PCI: 00:0a.0
1182 15:44:08.391048 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 15:44:08.400981 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 15:44:08.407931 USB0 port 0 child on link 0 USB3 port 0
1185 15:44:08.408017 USB3 port 0
1186 15:44:08.411173 USB3 port 1
1187 15:44:08.411258 USB3 port 2
1188 15:44:08.414567 USB3 port 3
1189 15:44:08.417948 PCI: 00:14.0 child on link 0 USB0 port 0
1190 15:44:08.427852 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 15:44:08.431060 USB0 port 0 child on link 0 USB2 port 0
1192 15:44:08.434454 USB2 port 0
1193 15:44:08.437738 USB2 port 1
1194 15:44:08.437833 USB2 port 2
1195 15:44:08.440889 USB2 port 3
1196 15:44:08.440960 USB2 port 4
1197 15:44:08.444428 USB2 port 5
1198 15:44:08.444508 USB2 port 6
1199 15:44:08.447710 USB2 port 7
1200 15:44:08.447795 USB2 port 8
1201 15:44:08.451125 USB2 port 9
1202 15:44:08.451199 USB3 port 0
1203 15:44:08.454451 USB3 port 1
1204 15:44:08.454522 USB3 port 2
1205 15:44:08.457683 USB3 port 3
1206 15:44:08.457751 PCI: 00:14.2
1207 15:44:08.467779 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 15:44:08.477831 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 15:44:08.484084 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 15:44:08.494103 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 15:44:08.494188 GENERIC: 0.0
1212 15:44:08.500821 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 15:44:08.510909 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 15:44:08.510994 I2C: 00:1a
1215 15:44:08.514277 I2C: 00:31
1216 15:44:08.514361 I2C: 00:32
1217 15:44:08.517598 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 15:44:08.527321 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 15:44:08.530906 I2C: 00:10
1220 15:44:08.530990 PCI: 00:15.2
1221 15:44:08.540778 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 15:44:08.544068 PCI: 00:15.3
1223 15:44:08.553988 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 15:44:08.554073 PCI: 00:16.0
1225 15:44:08.563943 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 15:44:08.567335 PCI: 00:19.0
1227 15:44:08.570699 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 15:44:08.580488 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 15:44:08.583958 I2C: 00:15
1230 15:44:08.587346 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 15:44:08.594095 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 15:44:08.603762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 15:44:08.614023 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 15:44:08.617425 GENERIC: 0.0
1235 15:44:08.617508 PCI: 01:00.0
1236 15:44:08.627041 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 15:44:08.637240 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 15:44:08.647039 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 15:44:08.647125 PCI: 00:1e.0
1240 15:44:08.660175 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 15:44:08.663563 PCI: 00:1e.2 child on link 0 SPI: 00
1242 15:44:08.673600 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 15:44:08.673688 SPI: 00
1244 15:44:08.680208 PCI: 00:1e.3 child on link 0 SPI: 00
1245 15:44:08.690086 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 15:44:08.690172 SPI: 00
1247 15:44:08.693580 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 15:44:08.703359 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 15:44:08.703444 PNP: 0c09.0
1250 15:44:08.713480 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 15:44:08.716840 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 15:44:08.726773 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 15:44:08.736673 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 15:44:08.740016 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 15:44:08.743365 GENERIC: 0.0
1256 15:44:08.743450 GENERIC: 1.0
1257 15:44:08.746781 PCI: 00:1f.3
1258 15:44:08.756778 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 15:44:08.766335 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 15:44:08.769754 PCI: 00:1f.5
1261 15:44:08.776323 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 15:44:08.783241 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 15:44:08.783326 APIC: 00
1264 15:44:08.783402 APIC: 01
1265 15:44:08.786676 APIC: 03
1266 15:44:08.786760 APIC: 07
1267 15:44:08.786832 APIC: 04
1268 15:44:08.789914 APIC: 02
1269 15:44:08.789992 APIC: 06
1270 15:44:08.793042 APIC: 05
1271 15:44:08.799903 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 15:44:08.806330 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 15:44:08.812929 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 15:44:08.816299 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 15:44:08.823053 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 15:44:08.826453 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 15:44:08.829755 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 15:44:08.836039 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 15:44:08.846349 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 15:44:08.852662 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 15:44:08.859334 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 15:44:08.866000 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 15:44:08.872754 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 15:44:08.879239 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 15:44:08.889293 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 15:44:08.892788 DOMAIN: 0000: Resource ranges:
1287 15:44:08.896160 * Base: 1000, Size: 800, Tag: 100
1288 15:44:08.899801 * Base: 1900, Size: e700, Tag: 100
1289 15:44:08.902617 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 15:44:08.909361 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 15:44:08.919508 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 15:44:08.926219 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 15:44:08.932546 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 15:44:08.939275 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 15:44:08.949380 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 15:44:08.956003 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 15:44:08.962791 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 15:44:08.972384 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 15:44:08.979139 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 15:44:08.985474 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 15:44:08.995592 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 15:44:09.002082 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 15:44:09.009082 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 15:44:09.018753 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 15:44:09.025563 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 15:44:09.031943 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 15:44:09.041921 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 15:44:09.048692 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 15:44:09.055008 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 15:44:09.065446 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 15:44:09.072068 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 15:44:09.078584 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 15:44:09.088530 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 15:44:09.091962 DOMAIN: 0000: Resource ranges:
1315 15:44:09.094887 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 15:44:09.098255 * Base: d0000000, Size: 28000000, Tag: 200
1317 15:44:09.105103 * Base: fa000000, Size: 1000000, Tag: 200
1318 15:44:09.108198 * Base: fb001000, Size: 2fff000, Tag: 200
1319 15:44:09.111589 * Base: fe010000, Size: 2e000, Tag: 200
1320 15:44:09.114840 * Base: fe03f000, Size: d41000, Tag: 200
1321 15:44:09.121615 * Base: fed88000, Size: 8000, Tag: 200
1322 15:44:09.125027 * Base: fed93000, Size: d000, Tag: 200
1323 15:44:09.128404 * Base: feda2000, Size: 1e000, Tag: 200
1324 15:44:09.131429 * Base: fede0000, Size: 1220000, Tag: 200
1325 15:44:09.138098 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 15:44:09.144809 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 15:44:09.151426 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 15:44:09.158133 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 15:44:09.164686 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 15:44:09.171470 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 15:44:09.178236 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 15:44:09.184729 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 15:44:09.191408 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 15:44:09.198236 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 15:44:09.204849 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 15:44:09.211371 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 15:44:09.218061 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 15:44:09.224842 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 15:44:09.231093 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 15:44:09.237817 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 15:44:09.244677 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 15:44:09.251156 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 15:44:09.257893 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 15:44:09.264653 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 15:44:09.271409 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 15:44:09.277681 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 15:44:09.284340 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 15:44:09.290899 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 15:44:09.297471 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 15:44:09.300926 PCI: 00:1d.0: Resource ranges:
1351 15:44:09.307798 * Base: 7fc00000, Size: 100000, Tag: 200
1352 15:44:09.314040 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 15:44:09.320652 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 15:44:09.327592 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 15:44:09.334308 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 15:44:09.341009 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 15:44:09.347632 Root Device assign_resources, bus 0 link: 0
1358 15:44:09.350848 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 15:44:09.360845 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 15:44:09.367235 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 15:44:09.377400 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 15:44:09.383950 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 15:44:09.387222 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 15:44:09.394129 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 15:44:09.400684 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 15:44:09.410948 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 15:44:09.417240 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 15:44:09.423943 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 15:44:09.427421 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 15:44:09.437625 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 15:44:09.440755 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 15:44:09.444110 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 15:44:09.454057 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 15:44:09.460628 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 15:44:09.470205 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 15:44:09.473653 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 15:44:09.480507 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 15:44:09.486816 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 15:44:09.490102 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 15:44:09.497079 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 15:44:09.503633 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 15:44:09.510073 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 15:44:09.513602 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 15:44:09.523300 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 15:44:09.530003 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 15:44:09.539963 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 15:44:09.546638 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 15:44:09.549644 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 15:44:09.556416 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 15:44:09.562839 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 15:44:09.572896 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 15:44:09.582920 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 15:44:09.585802 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 15:44:09.596127 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 15:44:09.602516 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 15:44:09.612707 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 15:44:09.615773 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 15:44:09.626044 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 15:44:09.629377 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 15:44:09.632778 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 15:44:09.642805 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 15:44:09.646047 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 15:44:09.652341 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 15:44:09.655959 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 15:44:09.662525 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 15:44:09.665766 LPC: Trying to open IO window from 800 size 1ff
1407 15:44:09.676032 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 15:44:09.682406 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 15:44:09.689051 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 15:44:09.695519 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 15:44:09.699227 Root Device assign_resources, bus 0 link: 0
1412 15:44:09.702318 Done setting resources.
1413 15:44:09.709100 Show resources in subtree (Root Device)...After assigning values.
1414 15:44:09.712346 Root Device child on link 0 DOMAIN: 0000
1415 15:44:09.718819 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 15:44:09.725591 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 15:44:09.735268 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 15:44:09.739193 PCI: 00:00.0
1419 15:44:09.748866 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 15:44:09.758588 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 15:44:09.765272 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 15:44:09.775400 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 15:44:09.785578 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 15:44:09.795510 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 15:44:09.805325 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 15:44:09.812190 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 15:44:09.821824 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 15:44:09.832095 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 15:44:09.841879 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 15:44:09.851868 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 15:44:09.861900 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 15:44:09.868479 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 15:44:09.878381 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 15:44:09.888224 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 15:44:09.898450 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 15:44:09.908366 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 15:44:09.918097 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 15:44:09.924809 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 15:44:09.928037 PCI: 00:02.0
1440 15:44:09.938058 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 15:44:09.947994 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 15:44:09.958198 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 15:44:09.964781 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 15:44:09.974832 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 15:44:09.975284 GENERIC: 0.0
1446 15:44:09.977705 PCI: 00:05.0
1447 15:44:09.988140 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 15:44:09.991154 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 15:44:09.994342 GENERIC: 0.0
1450 15:44:09.994780 PCI: 00:08.0
1451 15:44:10.004498 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 15:44:10.007712 PCI: 00:0a.0
1453 15:44:10.011057 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 15:44:10.021082 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 15:44:10.027776 USB0 port 0 child on link 0 USB3 port 0
1456 15:44:10.028300 USB3 port 0
1457 15:44:10.030902 USB3 port 1
1458 15:44:10.031337 USB3 port 2
1459 15:44:10.034318 USB3 port 3
1460 15:44:10.037562 PCI: 00:14.0 child on link 0 USB0 port 0
1461 15:44:10.047919 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 15:44:10.054599 USB0 port 0 child on link 0 USB2 port 0
1463 15:44:10.055040 USB2 port 0
1464 15:44:10.057924 USB2 port 1
1465 15:44:10.058364 USB2 port 2
1466 15:44:10.060899 USB2 port 3
1467 15:44:10.061370 USB2 port 4
1468 15:44:10.064357 USB2 port 5
1469 15:44:10.064828 USB2 port 6
1470 15:44:10.067821 USB2 port 7
1471 15:44:10.068292 USB2 port 8
1472 15:44:10.071121 USB2 port 9
1473 15:44:10.071590 USB3 port 0
1474 15:44:10.074459 USB3 port 1
1475 15:44:10.074968 USB3 port 2
1476 15:44:10.077922 USB3 port 3
1477 15:44:10.081193 PCI: 00:14.2
1478 15:44:10.090744 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 15:44:10.100649 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 15:44:10.104356 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 15:44:10.114393 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 15:44:10.117802 GENERIC: 0.0
1483 15:44:10.120663 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 15:44:10.130870 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 15:44:10.134296 I2C: 00:1a
1486 15:44:10.134725 I2C: 00:31
1487 15:44:10.137248 I2C: 00:32
1488 15:44:10.140645 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 15:44:10.150531 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 15:44:10.151007 I2C: 00:10
1491 15:44:10.153821 PCI: 00:15.2
1492 15:44:10.163895 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 15:44:10.167443 PCI: 00:15.3
1494 15:44:10.177358 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 15:44:10.177845 PCI: 00:16.0
1496 15:44:10.187105 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 15:44:10.190442 PCI: 00:19.0
1498 15:44:10.193859 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 15:44:10.203971 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 15:44:10.206950 I2C: 00:15
1501 15:44:10.210321 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 15:44:10.220270 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 15:44:10.230235 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 15:44:10.240485 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 15:44:10.243517 GENERIC: 0.0
1506 15:44:10.246786 PCI: 01:00.0
1507 15:44:10.256958 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 15:44:10.267173 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 15:44:10.276701 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 15:44:10.277172 PCI: 00:1e.0
1511 15:44:10.290260 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 15:44:10.293304 PCI: 00:1e.2 child on link 0 SPI: 00
1513 15:44:10.303220 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 15:44:10.306904 SPI: 00
1515 15:44:10.310307 PCI: 00:1e.3 child on link 0 SPI: 00
1516 15:44:10.319782 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 15:44:10.320243 SPI: 00
1518 15:44:10.326826 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 15:44:10.333038 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 15:44:10.336572 PNP: 0c09.0
1521 15:44:10.343364 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 15:44:10.349980 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 15:44:10.359797 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 15:44:10.366639 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 15:44:10.373226 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 15:44:10.373668 GENERIC: 0.0
1527 15:44:10.376558 GENERIC: 1.0
1528 15:44:10.377185 PCI: 00:1f.3
1529 15:44:10.386436 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 15:44:10.399593 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 15:44:10.400043 PCI: 00:1f.5
1532 15:44:10.409478 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 15:44:10.412919 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 15:44:10.416103 APIC: 00
1535 15:44:10.416533 APIC: 01
1536 15:44:10.419423 APIC: 03
1537 15:44:10.420012 APIC: 07
1538 15:44:10.420385 APIC: 04
1539 15:44:10.423058 APIC: 02
1540 15:44:10.423541 APIC: 06
1541 15:44:10.425997 APIC: 05
1542 15:44:10.426427 Done allocating resources.
1543 15:44:10.432841 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 15:44:10.439387 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 15:44:10.442794 Configure GPIOs for I2S audio on UP4.
1546 15:44:10.449830 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 15:44:10.453217 Enabling resources...
1548 15:44:10.456452 PCI: 00:00.0 subsystem <- 8086/9a12
1549 15:44:10.459888 PCI: 00:00.0 cmd <- 06
1550 15:44:10.462773 PCI: 00:02.0 subsystem <- 8086/9a40
1551 15:44:10.466622 PCI: 00:02.0 cmd <- 03
1552 15:44:10.469464 PCI: 00:04.0 subsystem <- 8086/9a03
1553 15:44:10.473140 PCI: 00:04.0 cmd <- 02
1554 15:44:10.476318 PCI: 00:05.0 subsystem <- 8086/9a19
1555 15:44:10.476751 PCI: 00:05.0 cmd <- 02
1556 15:44:10.483043 PCI: 00:08.0 subsystem <- 8086/9a11
1557 15:44:10.483521 PCI: 00:08.0 cmd <- 06
1558 15:44:10.486095 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 15:44:10.489409 PCI: 00:0d.0 cmd <- 02
1560 15:44:10.493261 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 15:44:10.496520 PCI: 00:14.0 cmd <- 02
1562 15:44:10.499750 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 15:44:10.503179 PCI: 00:14.2 cmd <- 02
1564 15:44:10.506522 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 15:44:10.509429 PCI: 00:14.3 cmd <- 02
1566 15:44:10.512965 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 15:44:10.515949 PCI: 00:15.0 cmd <- 02
1568 15:44:10.519669 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 15:44:10.520145 PCI: 00:15.1 cmd <- 02
1570 15:44:10.526675 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 15:44:10.527106 PCI: 00:15.2 cmd <- 02
1572 15:44:10.529610 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 15:44:10.533053 PCI: 00:15.3 cmd <- 02
1574 15:44:10.536377 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 15:44:10.539374 PCI: 00:16.0 cmd <- 02
1576 15:44:10.542781 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 15:44:10.546070 PCI: 00:19.1 cmd <- 02
1578 15:44:10.549387 PCI: 00:1d.0 bridge ctrl <- 0013
1579 15:44:10.552645 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 15:44:10.556044 PCI: 00:1d.0 cmd <- 06
1581 15:44:10.562593 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 15:44:10.563457 PCI: 00:1e.0 cmd <- 06
1583 15:44:10.565766 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 15:44:10.569051 PCI: 00:1e.2 cmd <- 06
1585 15:44:10.572452 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 15:44:10.572886 PCI: 00:1e.3 cmd <- 02
1587 15:44:10.579200 PCI: 00:1f.0 subsystem <- 8086/a087
1588 15:44:10.579637 PCI: 00:1f.0 cmd <- 407
1589 15:44:10.582573 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 15:44:10.586332 PCI: 00:1f.3 cmd <- 02
1591 15:44:10.589294 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 15:44:10.592585 PCI: 00:1f.5 cmd <- 406
1593 15:44:10.597556 PCI: 01:00.0 cmd <- 02
1594 15:44:10.601654 done.
1595 15:44:10.605019 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 15:44:10.608258 Initializing devices...
1597 15:44:10.611729 Root Device init
1598 15:44:10.615000 Chrome EC: Set SMI mask to 0x0000000000000000
1599 15:44:10.621624 Chrome EC: clear events_b mask to 0x0000000000000000
1600 15:44:10.628662 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 15:44:10.635064 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 15:44:10.641817 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 15:44:10.644845 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 15:44:10.653301 fw_config match found: DB_USB=USB3_ACTIVE
1605 15:44:10.656505 Configure Right Type-C port orientation for retimer
1606 15:44:10.659861 Root Device init finished in 46 msecs
1607 15:44:10.664170 PCI: 00:00.0 init
1608 15:44:10.667476 CPU TDP = 9 Watts
1609 15:44:10.667918 CPU PL1 = 9 Watts
1610 15:44:10.670379 CPU PL2 = 40 Watts
1611 15:44:10.673866 CPU PL4 = 83 Watts
1612 15:44:10.677126 PCI: 00:00.0 init finished in 8 msecs
1613 15:44:10.677712 PCI: 00:02.0 init
1614 15:44:10.680728 GMA: Found VBT in CBFS
1615 15:44:10.684008 GMA: Found valid VBT in CBFS
1616 15:44:10.690644 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 15:44:10.697205 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 15:44:10.700587 PCI: 00:02.0 init finished in 18 msecs
1619 15:44:10.703740 PCI: 00:05.0 init
1620 15:44:10.707318 PCI: 00:05.0 init finished in 0 msecs
1621 15:44:10.710596 PCI: 00:08.0 init
1622 15:44:10.713683 PCI: 00:08.0 init finished in 0 msecs
1623 15:44:10.717051 PCI: 00:14.0 init
1624 15:44:10.720387 PCI: 00:14.0 init finished in 0 msecs
1625 15:44:10.724054 PCI: 00:14.2 init
1626 15:44:10.727271 PCI: 00:14.2 init finished in 0 msecs
1627 15:44:10.730469 PCI: 00:15.0 init
1628 15:44:10.730905 I2C bus 0 version 0x3230302a
1629 15:44:10.737281 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 15:44:10.740566 PCI: 00:15.0 init finished in 6 msecs
1631 15:44:10.741000 PCI: 00:15.1 init
1632 15:44:10.744020 I2C bus 1 version 0x3230302a
1633 15:44:10.747070 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 15:44:10.750246 PCI: 00:15.1 init finished in 6 msecs
1635 15:44:10.754117 PCI: 00:15.2 init
1636 15:44:10.757235 I2C bus 2 version 0x3230302a
1637 15:44:10.760812 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 15:44:10.764119 PCI: 00:15.2 init finished in 6 msecs
1639 15:44:10.767466 PCI: 00:15.3 init
1640 15:44:10.770716 I2C bus 3 version 0x3230302a
1641 15:44:10.774057 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 15:44:10.777357 PCI: 00:15.3 init finished in 6 msecs
1643 15:44:10.780694 PCI: 00:16.0 init
1644 15:44:10.784087 PCI: 00:16.0 init finished in 0 msecs
1645 15:44:10.787346 PCI: 00:19.1 init
1646 15:44:10.787797 I2C bus 5 version 0x3230302a
1647 15:44:10.793899 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 15:44:10.797223 PCI: 00:19.1 init finished in 6 msecs
1649 15:44:10.797721 PCI: 00:1d.0 init
1650 15:44:10.800475 Initializing PCH PCIe bridge.
1651 15:44:10.803670 PCI: 00:1d.0 init finished in 3 msecs
1652 15:44:10.808395 PCI: 00:1f.0 init
1653 15:44:10.811777 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 15:44:10.818295 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 15:44:10.818732 IOAPIC: ID = 0x02
1656 15:44:10.821694 IOAPIC: Dumping registers
1657 15:44:10.824831 reg 0x0000: 0x02000000
1658 15:44:10.827927 reg 0x0001: 0x00770020
1659 15:44:10.828359 reg 0x0002: 0x00000000
1660 15:44:10.834708 PCI: 00:1f.0 init finished in 21 msecs
1661 15:44:10.835140 PCI: 00:1f.2 init
1662 15:44:10.837735 Disabling ACPI via APMC.
1663 15:44:10.841628 APMC done.
1664 15:44:10.844482 PCI: 00:1f.2 init finished in 5 msecs
1665 15:44:10.856569 PCI: 01:00.0 init
1666 15:44:10.859845 PCI: 01:00.0 init finished in 0 msecs
1667 15:44:10.863057 PNP: 0c09.0 init
1668 15:44:10.866536 Google Chrome EC uptime: 8.428 seconds
1669 15:44:10.873007 Google Chrome AP resets since EC boot: 1
1670 15:44:10.876372 Google Chrome most recent AP reset causes:
1671 15:44:10.879542 0.349: 32775 shutdown: entering G3
1672 15:44:10.886549 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 15:44:10.889737 PNP: 0c09.0 init finished in 22 msecs
1674 15:44:10.895574 Devices initialized
1675 15:44:10.898861 Show all devs... After init.
1676 15:44:10.902135 Root Device: enabled 1
1677 15:44:10.902561 DOMAIN: 0000: enabled 1
1678 15:44:10.905341 CPU_CLUSTER: 0: enabled 1
1679 15:44:10.908845 PCI: 00:00.0: enabled 1
1680 15:44:10.912079 PCI: 00:02.0: enabled 1
1681 15:44:10.912522 PCI: 00:04.0: enabled 1
1682 15:44:10.915440 PCI: 00:05.0: enabled 1
1683 15:44:10.918773 PCI: 00:06.0: enabled 0
1684 15:44:10.922044 PCI: 00:07.0: enabled 0
1685 15:44:10.922464 PCI: 00:07.1: enabled 0
1686 15:44:10.925301 PCI: 00:07.2: enabled 0
1687 15:44:10.928437 PCI: 00:07.3: enabled 0
1688 15:44:10.932130 PCI: 00:08.0: enabled 1
1689 15:44:10.932551 PCI: 00:09.0: enabled 0
1690 15:44:10.935290 PCI: 00:0a.0: enabled 0
1691 15:44:10.938748 PCI: 00:0d.0: enabled 1
1692 15:44:10.941742 PCI: 00:0d.1: enabled 0
1693 15:44:10.942215 PCI: 00:0d.2: enabled 0
1694 15:44:10.945115 PCI: 00:0d.3: enabled 0
1695 15:44:10.948370 PCI: 00:0e.0: enabled 0
1696 15:44:10.948796 PCI: 00:10.2: enabled 1
1697 15:44:10.951867 PCI: 00:10.6: enabled 0
1698 15:44:10.955219 PCI: 00:10.7: enabled 0
1699 15:44:10.958579 PCI: 00:12.0: enabled 0
1700 15:44:10.959004 PCI: 00:12.6: enabled 0
1701 15:44:10.961846 PCI: 00:13.0: enabled 0
1702 15:44:10.965413 PCI: 00:14.0: enabled 1
1703 15:44:10.968398 PCI: 00:14.1: enabled 0
1704 15:44:10.968827 PCI: 00:14.2: enabled 1
1705 15:44:10.971692 PCI: 00:14.3: enabled 1
1706 15:44:10.974855 PCI: 00:15.0: enabled 1
1707 15:44:10.978045 PCI: 00:15.1: enabled 1
1708 15:44:10.978129 PCI: 00:15.2: enabled 1
1709 15:44:10.981620 PCI: 00:15.3: enabled 1
1710 15:44:10.984954 PCI: 00:16.0: enabled 1
1711 15:44:10.985038 PCI: 00:16.1: enabled 0
1712 15:44:10.988022 PCI: 00:16.2: enabled 0
1713 15:44:10.991418 PCI: 00:16.3: enabled 0
1714 15:44:10.994726 PCI: 00:16.4: enabled 0
1715 15:44:10.994810 PCI: 00:16.5: enabled 0
1716 15:44:10.997974 PCI: 00:17.0: enabled 0
1717 15:44:11.001395 PCI: 00:19.0: enabled 0
1718 15:44:11.004765 PCI: 00:19.1: enabled 1
1719 15:44:11.004862 PCI: 00:19.2: enabled 0
1720 15:44:11.008054 PCI: 00:1c.0: enabled 1
1721 15:44:11.011290 PCI: 00:1c.1: enabled 0
1722 15:44:11.014452 PCI: 00:1c.2: enabled 0
1723 15:44:11.014566 PCI: 00:1c.3: enabled 0
1724 15:44:11.017727 PCI: 00:1c.4: enabled 0
1725 15:44:11.021109 PCI: 00:1c.5: enabled 0
1726 15:44:11.024582 PCI: 00:1c.6: enabled 1
1727 15:44:11.024721 PCI: 00:1c.7: enabled 0
1728 15:44:11.027868 PCI: 00:1d.0: enabled 1
1729 15:44:11.031148 PCI: 00:1d.1: enabled 0
1730 15:44:11.031326 PCI: 00:1d.2: enabled 1
1731 15:44:11.034821 PCI: 00:1d.3: enabled 0
1732 15:44:11.038116 PCI: 00:1e.0: enabled 1
1733 15:44:11.041067 PCI: 00:1e.1: enabled 0
1734 15:44:11.041318 PCI: 00:1e.2: enabled 1
1735 15:44:11.044552 PCI: 00:1e.3: enabled 1
1736 15:44:11.048046 PCI: 00:1f.0: enabled 1
1737 15:44:11.051588 PCI: 00:1f.1: enabled 0
1738 15:44:11.051990 PCI: 00:1f.2: enabled 1
1739 15:44:11.054520 PCI: 00:1f.3: enabled 1
1740 15:44:11.058007 PCI: 00:1f.4: enabled 0
1741 15:44:11.061665 PCI: 00:1f.5: enabled 1
1742 15:44:11.062142 PCI: 00:1f.6: enabled 0
1743 15:44:11.064494 PCI: 00:1f.7: enabled 0
1744 15:44:11.067919 APIC: 00: enabled 1
1745 15:44:11.068353 GENERIC: 0.0: enabled 1
1746 15:44:11.070976 GENERIC: 0.0: enabled 1
1747 15:44:11.074159 GENERIC: 1.0: enabled 1
1748 15:44:11.077640 GENERIC: 0.0: enabled 1
1749 15:44:11.077724 GENERIC: 1.0: enabled 1
1750 15:44:11.080958 USB0 port 0: enabled 1
1751 15:44:11.084447 GENERIC: 0.0: enabled 1
1752 15:44:11.084532 USB0 port 0: enabled 1
1753 15:44:11.087644 GENERIC: 0.0: enabled 1
1754 15:44:11.090996 I2C: 00:1a: enabled 1
1755 15:44:11.094186 I2C: 00:31: enabled 1
1756 15:44:11.094270 I2C: 00:32: enabled 1
1757 15:44:11.097458 I2C: 00:10: enabled 1
1758 15:44:11.100856 I2C: 00:15: enabled 1
1759 15:44:11.100940 GENERIC: 0.0: enabled 0
1760 15:44:11.104295 GENERIC: 1.0: enabled 0
1761 15:44:11.107478 GENERIC: 0.0: enabled 1
1762 15:44:11.107562 SPI: 00: enabled 1
1763 15:44:11.110754 SPI: 00: enabled 1
1764 15:44:11.114237 PNP: 0c09.0: enabled 1
1765 15:44:11.114321 GENERIC: 0.0: enabled 1
1766 15:44:11.117530 USB3 port 0: enabled 1
1767 15:44:11.120855 USB3 port 1: enabled 1
1768 15:44:11.120940 USB3 port 2: enabled 0
1769 15:44:11.124069 USB3 port 3: enabled 0
1770 15:44:11.127370 USB2 port 0: enabled 0
1771 15:44:11.130723 USB2 port 1: enabled 1
1772 15:44:11.130807 USB2 port 2: enabled 1
1773 15:44:11.134363 USB2 port 3: enabled 0
1774 15:44:11.137309 USB2 port 4: enabled 1
1775 15:44:11.137394 USB2 port 5: enabled 0
1776 15:44:11.140977 USB2 port 6: enabled 0
1777 15:44:11.143917 USB2 port 7: enabled 0
1778 15:44:11.147725 USB2 port 8: enabled 0
1779 15:44:11.147810 USB2 port 9: enabled 0
1780 15:44:11.150736 USB3 port 0: enabled 0
1781 15:44:11.154069 USB3 port 1: enabled 1
1782 15:44:11.154153 USB3 port 2: enabled 0
1783 15:44:11.157526 USB3 port 3: enabled 0
1784 15:44:11.160922 GENERIC: 0.0: enabled 1
1785 15:44:11.163909 GENERIC: 1.0: enabled 1
1786 15:44:11.163993 APIC: 01: enabled 1
1787 15:44:11.167382 APIC: 03: enabled 1
1788 15:44:11.167467 APIC: 07: enabled 1
1789 15:44:11.170897 APIC: 04: enabled 1
1790 15:44:11.173841 APIC: 02: enabled 1
1791 15:44:11.173925 APIC: 06: enabled 1
1792 15:44:11.177124 APIC: 05: enabled 1
1793 15:44:11.180793 PCI: 01:00.0: enabled 1
1794 15:44:11.183831 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1795 15:44:11.190778 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1796 15:44:11.193639 ELOG: NV offset 0xf30000 size 0x1000
1797 15:44:11.200557 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1798 15:44:11.207021 ELOG: Event(17) added with size 13 at 2022-09-17 15:33:50 UTC
1799 15:44:11.214042 ELOG: Event(92) added with size 9 at 2022-09-17 15:33:50 UTC
1800 15:44:11.220256 ELOG: Event(93) added with size 9 at 2022-09-17 15:33:50 UTC
1801 15:44:11.227121 ELOG: Event(9E) added with size 10 at 2022-09-17 15:33:51 UTC
1802 15:44:11.233365 ELOG: Event(9F) added with size 14 at 2022-09-17 15:33:51 UTC
1803 15:44:11.240250 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
1804 15:44:11.246894 ELOG: Event(A1) added with size 10 at 2022-09-17 15:33:51 UTC
1805 15:44:11.253663 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1806 15:44:11.259972 ELOG: Event(A0) added with size 9 at 2022-09-17 15:33:51 UTC
1807 15:44:11.263297 elog_add_boot_reason: Logged dev mode boot
1808 15:44:11.270275 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1809 15:44:11.273229 Finalize devices...
1810 15:44:11.273314 Devices finalized
1811 15:44:11.280218 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1812 15:44:11.283409 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1813 15:44:11.289716 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1814 15:44:11.296530 ME: HFSTS1 : 0x80030055
1815 15:44:11.299918 ME: HFSTS2 : 0x30280116
1816 15:44:11.303214 ME: HFSTS3 : 0x00000050
1817 15:44:11.309926 ME: HFSTS4 : 0x00004000
1818 15:44:11.313188 ME: HFSTS5 : 0x00000000
1819 15:44:11.316633 ME: HFSTS6 : 0x00400006
1820 15:44:11.319942 ME: Manufacturing Mode : YES
1821 15:44:11.326416 ME: SPI Protection Mode Enabled : NO
1822 15:44:11.329658 ME: FW Partition Table : OK
1823 15:44:11.333049 ME: Bringup Loader Failure : NO
1824 15:44:11.336675 ME: Firmware Init Complete : NO
1825 15:44:11.339632 ME: Boot Options Present : NO
1826 15:44:11.343243 ME: Update In Progress : NO
1827 15:44:11.346448 ME: D0i3 Support : YES
1828 15:44:11.349763 ME: Low Power State Enabled : NO
1829 15:44:11.356561 ME: CPU Replaced : YES
1830 15:44:11.359509 ME: CPU Replacement Valid : YES
1831 15:44:11.362968 ME: Current Working State : 5
1832 15:44:11.366288 ME: Current Operation State : 1
1833 15:44:11.369556 ME: Current Operation Mode : 3
1834 15:44:11.372957 ME: Error Code : 0
1835 15:44:11.376283 ME: Enhanced Debug Mode : NO
1836 15:44:11.379678 ME: CPU Debug Disabled : YES
1837 15:44:11.383246 ME: TXT Support : NO
1838 15:44:11.389360 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1839 15:44:11.399680 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1840 15:44:11.403026 CBFS: 'fallback/slic' not found.
1841 15:44:11.405893 ACPI: Writing ACPI tables at 76b01000.
1842 15:44:11.405976 ACPI: * FACS
1843 15:44:11.409661 ACPI: * DSDT
1844 15:44:11.412824 Ramoops buffer: 0x100000@0x76a00000.
1845 15:44:11.415877 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1846 15:44:11.422861 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1847 15:44:11.425816 Google Chrome EC: version:
1848 15:44:11.429234 ro: voema_v2.0.7540-147f8d37d1
1849 15:44:11.432493 rw: voema_v2.0.7540-147f8d37d1
1850 15:44:11.432575 running image: 2
1851 15:44:11.439236 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1852 15:44:11.444307 ACPI: * FADT
1853 15:44:11.444389 SCI is IRQ9
1854 15:44:11.451031 ACPI: added table 1/32, length now 40
1855 15:44:11.451114 ACPI: * SSDT
1856 15:44:11.454417 Found 1 CPU(s) with 8 core(s) each.
1857 15:44:11.461282 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1858 15:44:11.464543 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1859 15:44:11.467859 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1860 15:44:11.471233 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1861 15:44:11.477527 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1862 15:44:11.484293 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1863 15:44:11.487605 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1864 15:44:11.494384 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1865 15:44:11.501086 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1866 15:44:11.504383 \_SB.PCI0.RP09: Added StorageD3Enable property
1867 15:44:11.507712 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1868 15:44:11.514200 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1869 15:44:11.520994 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1870 15:44:11.524282 PS2K: Passing 80 keymaps to kernel
1871 15:44:11.531071 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1872 15:44:11.537695 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1873 15:44:11.544145 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1874 15:44:11.550820 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1875 15:44:11.557202 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1876 15:44:11.563886 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1877 15:44:11.570646 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1878 15:44:11.573896 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1879 15:44:11.580583 ACPI: added table 2/32, length now 44
1880 15:44:11.580668 ACPI: * MCFG
1881 15:44:11.583867 ACPI: added table 3/32, length now 48
1882 15:44:11.587199 ACPI: * TPM2
1883 15:44:11.590505 TPM2 log created at 0x769f0000
1884 15:44:11.594090 ACPI: added table 4/32, length now 52
1885 15:44:11.594174 ACPI: * MADT
1886 15:44:11.597223 SCI is IRQ9
1887 15:44:11.600490 ACPI: added table 5/32, length now 56
1888 15:44:11.600575 current = 76b09850
1889 15:44:11.603773 ACPI: * DMAR
1890 15:44:11.607011 ACPI: added table 6/32, length now 60
1891 15:44:11.610258 ACPI: added table 7/32, length now 64
1892 15:44:11.613656 ACPI: * HPET
1893 15:44:11.616950 ACPI: added table 8/32, length now 68
1894 15:44:11.617029 ACPI: done.
1895 15:44:11.620275 ACPI tables: 35216 bytes.
1896 15:44:11.623994 smbios_write_tables: 769ef000
1897 15:44:11.627480 EC returned error result code 3
1898 15:44:11.630568 Couldn't obtain OEM name from CBI
1899 15:44:11.634201 Create SMBIOS type 16
1900 15:44:11.637251 Create SMBIOS type 17
1901 15:44:11.637328 GENERIC: 0.0 (WIFI Device)
1902 15:44:11.640540 SMBIOS tables: 1750 bytes.
1903 15:44:11.647093 Writing table forward entry at 0x00000500
1904 15:44:11.650357 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1905 15:44:11.657108 Writing coreboot table at 0x76b25000
1906 15:44:11.660382 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1907 15:44:11.667007 1. 0000000000001000-000000000009ffff: RAM
1908 15:44:11.670421 2. 00000000000a0000-00000000000fffff: RESERVED
1909 15:44:11.673767 3. 0000000000100000-00000000769eefff: RAM
1910 15:44:11.680418 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1911 15:44:11.686854 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1912 15:44:11.690042 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1913 15:44:11.696958 7. 0000000077000000-000000007fbfffff: RESERVED
1914 15:44:11.700320 8. 00000000c0000000-00000000cfffffff: RESERVED
1915 15:44:11.706920 9. 00000000f8000000-00000000f9ffffff: RESERVED
1916 15:44:11.710126 10. 00000000fb000000-00000000fb000fff: RESERVED
1917 15:44:11.716517 11. 00000000fe000000-00000000fe00ffff: RESERVED
1918 15:44:11.719938 12. 00000000fed80000-00000000fed87fff: RESERVED
1919 15:44:11.723349 13. 00000000fed90000-00000000fed92fff: RESERVED
1920 15:44:11.729814 14. 00000000feda0000-00000000feda1fff: RESERVED
1921 15:44:11.733192 15. 00000000fedc0000-00000000feddffff: RESERVED
1922 15:44:11.739925 16. 0000000100000000-00000002803fffff: RAM
1923 15:44:11.740007 Passing 4 GPIOs to payload:
1924 15:44:11.746493 NAME | PORT | POLARITY | VALUE
1925 15:44:11.753350 lid | undefined | high | high
1926 15:44:11.756490 power | undefined | high | low
1927 15:44:11.763143 oprom | undefined | high | low
1928 15:44:11.766566 EC in RW | 0x000000e5 | high | high
1929 15:44:11.773396 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 305
1930 15:44:11.776391 coreboot table: 1576 bytes.
1931 15:44:11.779870 IMD ROOT 0. 0x76fff000 0x00001000
1932 15:44:11.783164 IMD SMALL 1. 0x76ffe000 0x00001000
1933 15:44:11.786864 FSP MEMORY 2. 0x76c4e000 0x003b0000
1934 15:44:11.793384 VPD 3. 0x76c4d000 0x00000367
1935 15:44:11.796600 RO MCACHE 4. 0x76c4c000 0x00000fdc
1936 15:44:11.800073 CONSOLE 5. 0x76c2c000 0x00020000
1937 15:44:11.803299 FMAP 6. 0x76c2b000 0x00000578
1938 15:44:11.806476 TIME STAMP 7. 0x76c2a000 0x00000910
1939 15:44:11.809728 VBOOT WORK 8. 0x76c16000 0x00014000
1940 15:44:11.813050 ROMSTG STCK 9. 0x76c15000 0x00001000
1941 15:44:11.816783 AFTER CAR 10. 0x76c0a000 0x0000b000
1942 15:44:11.823440 RAMSTAGE 11. 0x76b97000 0x00073000
1943 15:44:11.826703 REFCODE 12. 0x76b42000 0x00055000
1944 15:44:11.830040 SMM BACKUP 13. 0x76b32000 0x00010000
1945 15:44:11.833261 4f444749 14. 0x76b30000 0x00002000
1946 15:44:11.836571 EXT VBT15. 0x76b2d000 0x0000219f
1947 15:44:11.839899 COREBOOT 16. 0x76b25000 0x00008000
1948 15:44:11.843160 ACPI 17. 0x76b01000 0x00024000
1949 15:44:11.846545 ACPI GNVS 18. 0x76b00000 0x00001000
1950 15:44:11.850171 RAMOOPS 19. 0x76a00000 0x00100000
1951 15:44:11.856602 TPM2 TCGLOG20. 0x769f0000 0x00010000
1952 15:44:11.859996 SMBIOS 21. 0x769ef000 0x00000800
1953 15:44:11.860082 IMD small region:
1954 15:44:11.862946 IMD ROOT 0. 0x76ffec00 0x00000400
1955 15:44:11.869708 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1956 15:44:11.873067 POWER STATE 2. 0x76ffeb80 0x00000044
1957 15:44:11.876519 ROMSTAGE 3. 0x76ffeb60 0x00000004
1958 15:44:11.879844 MEM INFO 4. 0x76ffe980 0x000001e0
1959 15:44:11.886580 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1960 15:44:11.889557 MTRR: Physical address space:
1961 15:44:11.896663 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1962 15:44:11.903191 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1963 15:44:11.906441 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1964 15:44:11.913064 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1965 15:44:11.919781 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1966 15:44:11.926275 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1967 15:44:11.932793 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1968 15:44:11.935967 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 15:44:11.939266 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 15:44:11.946312 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 15:44:11.949513 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 15:44:11.952777 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 15:44:11.955991 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 15:44:11.962717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 15:44:11.965931 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 15:44:11.969310 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 15:44:11.972805 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 15:44:11.979055 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 15:44:11.982882 call enable_fixed_mtrr()
1980 15:44:11.985944 CPU physical address size: 39 bits
1981 15:44:11.989366 MTRR: default type WB/UC MTRR counts: 6/6.
1982 15:44:11.992841 MTRR: UC selected as default type.
1983 15:44:11.999417 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1984 15:44:12.005603 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 15:44:12.012690 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 15:44:12.019093 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 15:44:12.025851 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1988 15:44:12.028829 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1989 15:44:12.036692 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 15:44:12.040084 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 15:44:12.043364 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 15:44:12.046705 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 15:44:12.053518 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 15:44:12.056937 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 15:44:12.060283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 15:44:12.063329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 15:44:12.070132 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 15:44:12.073452 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 15:44:12.076885 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 15:44:12.076970
2001 15:44:12.079810 MTRR check
2002 15:44:12.083239 call enable_fixed_mtrr()
2003 15:44:12.083322 Fixed MTRRs : Enabled
2004 15:44:12.086539 Variable MTRRs: Enabled
2005 15:44:12.086622
2006 15:44:12.090016 CPU physical address size: 39 bits
2007 15:44:12.096680 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2008 15:44:12.100075 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 15:44:12.106770 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 15:44:12.110141 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 15:44:12.113441 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 15:44:12.116758 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 15:44:12.123387 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 15:44:12.126801 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 15:44:12.130175 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 15:44:12.133511 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 15:44:12.140263 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 15:44:12.143411 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 15:44:12.146851 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 15:44:12.153279 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 15:44:12.153364 call enable_fixed_mtrr()
2022 15:44:12.160064 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 15:44:12.163411 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 15:44:12.166753 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 15:44:12.170063 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 15:44:12.173531 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 15:44:12.179998 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 15:44:12.183201 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 15:44:12.186554 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 15:44:12.189736 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 15:44:12.194067 CPU physical address size: 39 bits
2032 15:44:12.200876 call enable_fixed_mtrr()
2033 15:44:12.204228 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 15:44:12.207604 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 15:44:12.210827 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 15:44:12.214156 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 15:44:12.220776 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 15:44:12.224127 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 15:44:12.227514 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 15:44:12.230699 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 15:44:12.237732 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 15:44:12.240631 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 15:44:12.243921 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 15:44:12.247342 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 15:44:12.254988 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 15:44:12.255072 call enable_fixed_mtrr()
2047 15:44:12.261454 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 15:44:12.265041 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 15:44:12.268506 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 15:44:12.271711 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 15:44:12.278036 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 15:44:12.281366 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 15:44:12.284805 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 15:44:12.288132 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 15:44:12.294823 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 15:44:12.298150 CPU physical address size: 39 bits
2057 15:44:12.301412 call enable_fixed_mtrr()
2058 15:44:12.304826 MTRR: Fixed MSR 0x250 0x0606060606060606
2059 15:44:12.308149 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 15:44:12.314745 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 15:44:12.318004 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 15:44:12.321373 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 15:44:12.324678 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 15:44:12.331326 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 15:44:12.334536 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 15:44:12.337986 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 15:44:12.341206 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 15:44:12.348055 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 15:44:12.351380 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 15:44:12.354362 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 15:44:12.357514 call enable_fixed_mtrr()
2072 15:44:12.360905 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 15:44:12.367774 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 15:44:12.371222 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 15:44:12.374444 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 15:44:12.377511 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 15:44:12.384212 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 15:44:12.387679 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 15:44:12.390887 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 15:44:12.394176 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 15:44:12.398134 CPU physical address size: 39 bits
2082 15:44:12.404744 call enable_fixed_mtrr()
2083 15:44:12.408010 CPU physical address size: 39 bits
2084 15:44:12.411066 CPU physical address size: 39 bits
2085 15:44:12.414457 Checking cr50 for pending updates
2086 15:44:12.417727 CPU physical address size: 39 bits
2087 15:44:12.421347 Reading cr50 TPM mode
2088 15:44:12.431261 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 6 ms
2089 15:44:12.441112 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2090 15:44:12.444490 Checking segment from ROM address 0xffc02b38
2091 15:44:12.447943 Checking segment from ROM address 0xffc02b54
2092 15:44:12.454630 Loading segment from ROM address 0xffc02b38
2093 15:44:12.454714 code (compression=0)
2094 15:44:12.464274 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2095 15:44:12.474208 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2096 15:44:12.474295 it's not compressed!
2097 15:44:12.614009 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2098 15:44:12.620772 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2099 15:44:12.627196 Loading segment from ROM address 0xffc02b54
2100 15:44:12.627282 Entry Point 0x30000000
2101 15:44:12.630494 Loaded segments
2102 15:44:12.637146 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2103 15:44:12.679962 Finalizing chipset.
2104 15:44:12.683257 Finalizing SMM.
2105 15:44:12.683345 APMC done.
2106 15:44:12.690004 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2107 15:44:12.693439 mp_park_aps done after 0 msecs.
2108 15:44:12.696739 Jumping to boot code at 0x30000000(0x76b25000)
2109 15:44:12.706850 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2110 15:44:12.706936
2111 15:44:12.710299 Starting depthcharge on Voema...
2112 15:44:12.710648 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2113 15:44:12.710753 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2114 15:44:12.710839 Setting prompt string to ['volteer:']
2115 15:44:12.710921 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2116 15:44:12.719857 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2117 15:44:12.726626 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2118 15:44:12.730074 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2119 15:44:12.734187 Failed to find eMMC card reader
2120 15:44:12.737489 Wipe memory regions:
2121 15:44:12.740903 [0x00000000001000, 0x000000000a0000)
2122 15:44:12.744145 [0x00000000100000, 0x00000030000000)
2123 15:44:12.774941 [0x00000032662db0, 0x000000769ef000)
2124 15:44:12.813794 [0x00000100000000, 0x00000280400000)
2125 15:44:13.019548 ec_init: CrosEC protocol v3 supported (256, 256)
2126 15:44:13.026038 update_port_state: port C0 state: usb enable 1 mux conn 0
2127 15:44:13.036063 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2128 15:44:13.042839 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2129 15:44:13.045750 send_conn_disc_msg: pmc_send_cmd succeeded
2130 15:44:13.477764 R8152: Initializing
2131 15:44:13.481091 Version 6 (ocp_data = 5c30)
2132 15:44:13.484426 R8152: Done initializing
2133 15:44:13.487614 Adding net device
2134 15:44:13.793668 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2135 15:44:13.793828
2136 15:44:13.797079 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2138 15:44:13.897793 volteer: tftpboot 192.168.201.1 7300448/tftp-deploy-vfwaaopc/kernel/bzImage 7300448/tftp-deploy-vfwaaopc/kernel/cmdline 7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
2139 15:44:13.897923 Setting prompt string to 'Starting kernel'
2140 15:44:13.898003 Setting prompt string to ['Starting kernel']
2141 15:44:13.898079 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2142 15:44:13.898154 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:43)
2143 15:44:13.902549 tftpboot 192.168.201.1 7300448/tftp-deploy-vfwaaopc/kernel/bzImoy-vfwaaopc/kernel/cmdline 7300448/tftp-deploy-vfwaaopc/ramdisk/ramdisk.cpio.gz
2144 15:44:13.902633 Waiting for link
2145 15:44:14.106613 done.
2146 15:44:14.106742 MAC: 00:24:32:30:78:74
2147 15:44:14.109709 Sending DHCP discover... done.
2148 15:44:14.113163 Waiting for reply... done.
2149 15:44:14.116434 Sending DHCP request... done.
2150 15:44:14.119474 Waiting for reply... done.
2151 15:44:14.122771 My ip is 192.168.201.13
2152 15:44:14.126205 The DHCP server ip is 192.168.201.1
2153 15:44:14.129569 TFTP server IP predefined by user: 192.168.201.1
2154 15:44:14.136000 Bootfile predefined by user: 7300448/tftp-deploy-vfwaaopc/kernel/bzImage
2155 15:44:14.139344 Sending tftp read request... done.
2156 15:44:14.146070 Waiting for the transfer...
2157 15:44:14.705100 00000000 ################################################################
2158 15:44:15.285904 00080000 ################################################################
2159 15:44:15.841454 00100000 ################################################################
2160 15:44:16.395314 00180000 ################################################################
2161 15:44:16.957241 00200000 ################################################################
2162 15:44:17.518820 00280000 ################################################################
2163 15:44:18.118341 00300000 ################################################################
2164 15:44:18.820786 00380000 ################################################################
2165 15:44:19.572845 00400000 ################################################################
2166 15:44:20.294739 00480000 ################################################################
2167 15:44:20.980616 00500000 ################################################################
2168 15:44:21.640634 00580000 ################################################################
2169 15:44:22.323489 00600000 ################################################################ done.
2170 15:44:22.326684 The bootfile was 6815632 bytes long.
2171 15:44:22.329465 Sending tftp read request... done.
2172 15:44:22.332726 Waiting for the transfer...
2173 15:44:23.033799 00000000 ################################################################
2174 15:44:23.702473 00080000 ################################################################
2175 15:44:24.389057 00100000 ################################################################
2176 15:44:25.082896 00180000 ################################################################
2177 15:44:25.775419 00200000 ################################################################
2178 15:44:26.481462 00280000 ################################################################
2179 15:44:27.172605 00300000 ################################################################
2180 15:44:27.877631 00380000 ################################################################
2181 15:44:28.582642 00400000 ################################################################
2182 15:44:29.293713 00480000 ################################################################
2183 15:44:29.562532 00500000 ############################# done.
2184 15:44:29.565899 Sending tftp read request... done.
2185 15:44:29.569012 Waiting for the transfer...
2186 15:44:29.569096 00000000 # done.
2187 15:44:29.579589 Command line loaded dynamically from TFTP file: 7300448/tftp-deploy-vfwaaopc/kernel/cmdline
2188 15:44:29.598992 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7300448/extract-nfsrootfs-a068_nog,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2189 15:44:29.602427 Shutting down all USB controllers.
2190 15:44:29.606127 Removing current net device
2191 15:44:29.609236 Finalizing coreboot
2192 15:44:29.612622 Exiting depthcharge with code 4 at timestamp: 25564781
2193 15:44:29.616052
2194 15:44:29.616624 Starting kernel ...
2195 15:44:29.616968
2196 15:44:29.617286
2197 15:44:29.618162 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2198 15:44:29.618695 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2199 15:44:29.619074 Setting prompt string to ['Linux version [0-9]']
2200 15:44:29.619423 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2201 15:44:29.619782 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2203 15:48:56.619851 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2205 15:48:56.620980 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2207 15:48:56.621873 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2210 15:48:56.623338 end: 2 depthcharge-action (duration 00:05:00) [common]
2212 15:48:56.624255 Cleaning after the job
2213 15:48:56.624337 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/ramdisk
2214 15:48:56.624810 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/kernel
2215 15:48:56.625307 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/nfsrootfs
2216 15:48:56.674230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7300448/tftp-deploy-vfwaaopc/modules
2217 15:48:56.674538 start: 4.1 power-off (timeout 00:00:30) [common]
2218 15:48:56.674705 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2219 15:48:56.693910 >> Command sent successfully.
2220 15:48:56.695779 Returned 0 in 0 seconds
2221 15:48:56.796992 end: 4.1 power-off (duration 00:00:00) [common]
2223 15:48:56.798576 start: 4.2 read-feedback (timeout 00:10:00) [common]
2224 15:48:56.799747 Listened to connection for namespace 'common' for up to 1s
2225 15:48:57.804618 Finalising connection for namespace 'common'
2226 15:48:57.805336 Disconnecting from shell: Finalise
2227 15:48:57.906520 end: 4.2 read-feedback (duration 00:00:01) [common]
2228 15:48:57.906690 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7300448
2229 15:48:58.059500 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7300448
2230 15:48:58.059689 JobError: Your job cannot terminate cleanly.