Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 14:49:24.657857 lava-dispatcher, installed at version: 2022.06
2 14:49:24.658042 start: 0 validate
3 14:49:24.658170 Start time: 2022-09-18 14:49:24.658162+00:00 (UTC)
4 14:49:24.658304 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:49:24.658430 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
6 14:49:24.958087 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:49:24.958814 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:49:25.247608 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:49:25.248376 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:49:25.549820 validate duration: 0.89
12 14:49:25.550110 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:49:25.550217 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:49:25.550306 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:49:25.550403 Not decompressing ramdisk as can be used compressed.
16 14:49:25.550487 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
17 14:49:25.550555 saving as /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/ramdisk/rootfs.cpio.gz
18 14:49:25.550615 total size: 8415960 (8MB)
19 14:49:25.553986 progress 0% (0MB)
20 14:49:25.557617 progress 5% (0MB)
21 14:49:25.561034 progress 10% (0MB)
22 14:49:25.564651 progress 15% (1MB)
23 14:49:25.568143 progress 20% (1MB)
24 14:49:25.571723 progress 25% (2MB)
25 14:49:25.575818 progress 30% (2MB)
26 14:49:25.578866 progress 35% (2MB)
27 14:49:25.582521 progress 40% (3MB)
28 14:49:25.586173 progress 45% (3MB)
29 14:49:25.589607 progress 50% (4MB)
30 14:49:25.593262 progress 55% (4MB)
31 14:49:25.596913 progress 60% (4MB)
32 14:49:25.600397 progress 65% (5MB)
33 14:49:25.604010 progress 70% (5MB)
34 14:49:25.607631 progress 75% (6MB)
35 14:49:25.611158 progress 80% (6MB)
36 14:49:25.614754 progress 85% (6MB)
37 14:49:25.618532 progress 90% (7MB)
38 14:49:25.621862 progress 95% (7MB)
39 14:49:25.625380 progress 100% (8MB)
40 14:49:25.625647 8MB downloaded in 0.08s (106.97MB/s)
41 14:49:25.625798 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:49:25.626044 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:49:25.626135 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:49:25.626223 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:49:25.626327 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:49:25.626397 saving as /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/kernel/bzImage
48 14:49:25.626460 total size: 6815632 (6MB)
49 14:49:25.626521 No compression specified
50 14:49:25.628360 progress 0% (0MB)
51 14:49:25.631573 progress 5% (0MB)
52 14:49:25.634444 progress 10% (0MB)
53 14:49:25.637172 progress 15% (1MB)
54 14:49:25.640050 progress 20% (1MB)
55 14:49:25.643120 progress 25% (1MB)
56 14:49:25.646180 progress 30% (1MB)
57 14:49:25.648521 progress 35% (2MB)
58 14:49:25.651570 progress 40% (2MB)
59 14:49:25.654417 progress 45% (2MB)
60 14:49:25.657325 progress 50% (3MB)
61 14:49:25.660413 progress 55% (3MB)
62 14:49:25.663259 progress 60% (3MB)
63 14:49:25.666152 progress 65% (4MB)
64 14:49:25.669140 progress 70% (4MB)
65 14:49:25.671670 progress 75% (4MB)
66 14:49:25.674758 progress 80% (5MB)
67 14:49:25.677659 progress 85% (5MB)
68 14:49:25.680718 progress 90% (5MB)
69 14:49:25.683481 progress 95% (6MB)
70 14:49:25.686539 progress 100% (6MB)
71 14:49:25.686829 6MB downloaded in 0.06s (107.68MB/s)
72 14:49:25.686979 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:49:25.687218 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:49:25.687309 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:49:25.687397 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:49:25.687504 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:49:25.687573 saving as /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/modules/modules.tar
79 14:49:25.687635 total size: 51904 (0MB)
80 14:49:25.687695 Using unxz to decompress xz
81 14:49:25.691803 progress 63% (0MB)
82 14:49:25.692206 progress 100% (0MB)
83 14:49:25.695429 0MB downloaded in 0.01s (6.36MB/s)
84 14:49:25.695649 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:49:25.695916 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:49:25.696014 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 14:49:25.696111 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 14:49:25.696201 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:49:25.696291 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 14:49:25.696452 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3
92 14:49:25.696563 makedir: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin
93 14:49:25.696649 makedir: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/tests
94 14:49:25.696730 makedir: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/results
95 14:49:25.696834 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-add-keys
96 14:49:25.696964 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-add-sources
97 14:49:25.697079 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-background-process-start
98 14:49:25.697195 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-background-process-stop
99 14:49:25.697308 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-common-functions
100 14:49:25.697421 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-echo-ipv4
101 14:49:25.697535 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-install-packages
102 14:49:25.697648 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-installed-packages
103 14:49:25.697759 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-os-build
104 14:49:25.697871 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-probe-channel
105 14:49:25.697984 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-probe-ip
106 14:49:25.698094 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-target-ip
107 14:49:25.698206 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-target-mac
108 14:49:25.698316 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-target-storage
109 14:49:25.698432 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-case
110 14:49:25.698543 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-event
111 14:49:25.698653 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-feedback
112 14:49:25.698763 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-raise
113 14:49:25.698878 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-reference
114 14:49:25.698988 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-runner
115 14:49:25.699098 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-set
116 14:49:25.699207 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-test-shell
117 14:49:25.699319 Updating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-install-packages (oe)
118 14:49:25.699432 Updating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/bin/lava-installed-packages (oe)
119 14:49:25.699534 Creating /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/environment
120 14:49:25.699622 LAVA metadata
121 14:49:25.699694 - LAVA_JOB_ID=7305248
122 14:49:25.699760 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:49:25.699868 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 14:49:25.699934 skipped lava-vland-overlay
125 14:49:25.700012 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:49:25.700099 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 14:49:25.700162 skipped lava-multinode-overlay
128 14:49:25.700239 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:49:25.700324 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 14:49:25.700401 Loading test definitions
131 14:49:25.700502 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 14:49:25.700581 Using /lava-7305248 at stage 0
133 14:49:25.700844 uuid=7305248_1.4.2.3.1 testdef=None
134 14:49:25.700936 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:49:25.701026 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 14:49:25.701516 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:49:25.701757 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 14:49:25.702335 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:49:25.702582 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 14:49:25.703132 runner path: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/0/tests/0_dmesg test_uuid 7305248_1.4.2.3.1
143 14:49:25.703287 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:49:25.703524 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 14:49:25.703599 Using /lava-7305248 at stage 1
147 14:49:25.703851 uuid=7305248_1.4.2.3.5 testdef=None
148 14:49:25.703944 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:49:25.704034 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 14:49:25.704480 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:49:25.704711 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 14:49:25.705305 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:49:25.705551 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 14:49:25.706102 runner path: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/1/tests/1_bootrr test_uuid 7305248_1.4.2.3.5
157 14:49:25.706247 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:49:25.706462 Creating lava-test-runner.conf files
160 14:49:25.706528 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/0 for stage 0
161 14:49:25.706611 - 0_dmesg
162 14:49:25.706687 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305248/lava-overlay-7h0099g3/lava-7305248/1 for stage 1
163 14:49:25.706771 - 1_bootrr
164 14:49:25.706865 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:49:25.706955 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 14:49:25.713085 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:49:25.713198 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 14:49:25.713291 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:49:25.713379 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:49:25.713468 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 14:49:25.895063 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:49:25.895407 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 14:49:25.895514 extracting modules file /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305248/extract-overlay-ramdisk-75ekilha/ramdisk
174 14:49:25.899595 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:49:25.899708 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 14:49:25.899795 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305248/compress-overlay-oi_0mmdv/overlay-1.4.2.4.tar.gz to ramdisk
177 14:49:25.899906 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305248/compress-overlay-oi_0mmdv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7305248/extract-overlay-ramdisk-75ekilha/ramdisk
178 14:49:25.903609 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:49:25.903715 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 14:49:25.903809 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:49:25.903934 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 14:49:25.904013 Building ramdisk /var/lib/lava/dispatcher/tmp/7305248/extract-overlay-ramdisk-75ekilha/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7305248/extract-overlay-ramdisk-75ekilha/ramdisk
183 14:49:25.966727 >> 48006 blocks
184 14:49:26.692795 rename /var/lib/lava/dispatcher/tmp/7305248/extract-overlay-ramdisk-75ekilha/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
185 14:49:26.693209 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:49:26.693333 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 14:49:26.693436 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 14:49:26.693531 No mkimage arch provided, not using FIT.
189 14:49:26.693622 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:49:26.693708 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:49:26.693806 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:49:26.693899 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 14:49:26.693976 No LXC device requested
194 14:49:26.694058 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:49:26.694147 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 14:49:26.694227 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:49:26.694298 Checking files for TFTP limit of 4294967296 bytes.
198 14:49:26.694681 end: 1 tftp-deploy (duration 00:00:01) [common]
199 14:49:26.694784 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:49:26.694880 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:49:26.695006 substitutions:
202 14:49:26.695075 - {DTB}: None
203 14:49:26.695140 - {INITRD}: 7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
204 14:49:26.695201 - {KERNEL}: 7305248/tftp-deploy-8hwn99cj/kernel/bzImage
205 14:49:26.695261 - {LAVA_MAC}: None
206 14:49:26.695320 - {PRESEED_CONFIG}: None
207 14:49:26.695378 - {PRESEED_LOCAL}: None
208 14:49:26.695434 - {RAMDISK}: 7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
209 14:49:26.695491 - {ROOT_PART}: None
210 14:49:26.695547 - {ROOT}: None
211 14:49:26.695603 - {SERVER_IP}: 192.168.201.1
212 14:49:26.695658 - {TEE}: None
213 14:49:26.695715 Parsed boot commands:
214 14:49:26.695769 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:49:26.695954 Parsed boot commands: tftpboot 192.168.201.1 7305248/tftp-deploy-8hwn99cj/kernel/bzImage 7305248/tftp-deploy-8hwn99cj/kernel/cmdline 7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
216 14:49:26.696048 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:49:26.696138 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:49:26.696234 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:49:26.696324 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:49:26.696396 Not connected, no need to disconnect.
221 14:49:26.696473 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:49:26.696556 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:49:26.696624 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
224 14:49:26.699236 Setting prompt string to ['lava-test: # ']
225 14:49:26.699517 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:49:26.699633 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:49:26.699745 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:49:26.699865 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:49:26.700058 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
230 14:49:26.718228 >> Command sent successfully.
231 14:49:26.720205 Returned 0 in 0 seconds
232 14:49:26.821433 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:49:26.824073 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:49:26.824645 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:49:26.825122 Setting prompt string to 'Starting depthcharge on Helios...'
237 14:49:26.825488 Changing prompt to 'Starting depthcharge on Helios...'
238 14:49:26.825870 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 14:49:26.826563 [Enter `^Ec?' for help]
240 14:49:33.324366
241 14:49:33.324972
242 14:49:33.334845 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 14:49:33.337483 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 14:49:33.344249 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 14:49:33.347489 CPU: AES supported, TXT NOT supported, VT supported
246 14:49:33.354284 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 14:49:33.356988 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 14:49:33.363945 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 14:49:33.367734 VBOOT: Loading verstage.
250 14:49:33.371205 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 14:49:33.377109 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 14:49:33.383811 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 14:49:33.384437 CBFS @ c08000 size 3f8000
254 14:49:33.390564 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 14:49:33.393954 CBFS: Locating 'fallback/verstage'
256 14:49:33.397430 CBFS: Found @ offset 10fb80 size 1072c
257 14:49:33.401328
258 14:49:33.401926
259 14:49:33.411316 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 14:49:33.425709 Probing TPM: . done!
261 14:49:33.428804 TPM ready after 0 ms
262 14:49:33.432234 Connected to device vid:did:rid of 1ae0:0028:00
263 14:49:33.442863 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 14:49:33.445827 Initialized TPM device CR50 revision 0
265 14:49:33.481286 tlcl_send_startup: Startup return code is 0
266 14:49:33.481870 TPM: setup succeeded
267 14:49:33.493972 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 14:49:33.498253 Chrome EC: UHEPI supported
269 14:49:33.501072 Phase 1
270 14:49:33.504019 FMAP: area GBB found @ c05000 (12288 bytes)
271 14:49:33.511145 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 14:49:33.511731 Phase 2
273 14:49:33.514488 Phase 3
274 14:49:33.517746 FMAP: area GBB found @ c05000 (12288 bytes)
275 14:49:33.524511 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 14:49:33.531407 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 14:49:33.534524 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 14:49:33.541088 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 14:49:33.556887 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 14:49:33.559542 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 14:49:33.566296 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 14:49:33.571147 Phase 4
283 14:49:33.573641 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 14:49:33.580359 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 14:49:33.760236 VB2:vb2_rsa_verify_digest() Digest check failed!
286 14:49:33.763300 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 14:49:33.766887 Saving nvdata
288 14:49:33.770209 Reboot requested (10020007)
289 14:49:33.773095 board_reset() called!
290 14:49:33.773739 full_reset() called!
291 14:49:38.291691
292 14:49:38.292363
293 14:49:38.301530 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 14:49:38.304721 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 14:49:38.311722 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 14:49:38.315079 CPU: AES supported, TXT NOT supported, VT supported
297 14:49:38.321509 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 14:49:38.325080 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 14:49:38.331139 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 14:49:38.334418 VBOOT: Loading verstage.
301 14:49:38.337915 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 14:49:38.344434 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 14:49:38.351125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 14:49:38.351699 CBFS @ c08000 size 3f8000
305 14:49:38.357682 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 14:49:38.360863 CBFS: Locating 'fallback/verstage'
307 14:49:38.364414 CBFS: Found @ offset 10fb80 size 1072c
308 14:49:38.368611
309 14:49:38.369180
310 14:49:38.378588 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 14:49:38.392889 Probing TPM: . done!
312 14:49:38.396384 TPM ready after 0 ms
313 14:49:38.399782 Connected to device vid:did:rid of 1ae0:0028:00
314 14:49:38.409319 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 14:49:38.414022 Initialized TPM device CR50 revision 0
316 14:49:38.447895 tlcl_send_startup: Startup return code is 0
317 14:49:38.448465 TPM: setup succeeded
318 14:49:38.459995 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 14:49:38.463667 Chrome EC: UHEPI supported
320 14:49:38.467009 Phase 1
321 14:49:38.470422 FMAP: area GBB found @ c05000 (12288 bytes)
322 14:49:38.477299 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 14:49:38.484096 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 14:49:38.486989 Recovery requested (1009000e)
325 14:49:38.492787 Saving nvdata
326 14:49:38.499106 tlcl_extend: response is 0
327 14:49:38.508165 tlcl_extend: response is 0
328 14:49:38.515056 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 14:49:38.517745 CBFS @ c08000 size 3f8000
330 14:49:38.524829 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 14:49:38.528292 CBFS: Locating 'fallback/romstage'
332 14:49:38.531304 CBFS: Found @ offset 80 size 145fc
333 14:49:38.534550 Accumulated console time in verstage 98 ms
334 14:49:38.535141
335 14:49:38.535533
336 14:49:38.548224 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 14:49:38.554656 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 14:49:38.558024 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 14:49:38.561108 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 14:49:38.568003 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 14:49:38.570921 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 14:49:38.574182 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
343 14:49:38.577618 TCO_STS: 0000 0000
344 14:49:38.580987 GEN_PMCON: e0015238 00000200
345 14:49:38.584489 GBLRST_CAUSE: 00000000 00000000
346 14:49:38.585133 prev_sleep_state 5
347 14:49:38.587226 Boot Count incremented to 38774
348 14:49:38.594391 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 14:49:38.598014 CBFS @ c08000 size 3f8000
350 14:49:38.604072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 14:49:38.604646 CBFS: Locating 'fspm.bin'
352 14:49:38.610860 CBFS: Found @ offset 5ffc0 size 71000
353 14:49:38.614236 Chrome EC: UHEPI supported
354 14:49:38.621250 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 14:49:38.624430 Probing TPM: done!
356 14:49:38.631110 Connected to device vid:did:rid of 1ae0:0028:00
357 14:49:38.641568 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 14:49:38.647471 Initialized TPM device CR50 revision 0
359 14:49:38.656859 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 14:49:38.662401 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 14:49:38.665557 MRC cache found, size 1948
362 14:49:38.669858 bootmode is set to: 2
363 14:49:38.672446 PRMRR disabled by config.
364 14:49:38.676003 SPD INDEX = 1
365 14:49:38.679581 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 14:49:38.682843 CBFS @ c08000 size 3f8000
367 14:49:38.688994 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 14:49:38.689488 CBFS: Locating 'spd.bin'
369 14:49:38.692178 CBFS: Found @ offset 5fb80 size 400
370 14:49:38.695273 SPD: module type is LPDDR3
371 14:49:38.699182 SPD: module part is
372 14:49:38.705515 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 14:49:38.708785 SPD: device width 4 bits, bus width 8 bits
374 14:49:38.712126 SPD: module size is 4096 MB (per channel)
375 14:49:38.715609 memory slot: 0 configuration done.
376 14:49:38.718724 memory slot: 2 configuration done.
377 14:49:38.771067 CBMEM:
378 14:49:38.774262 IMD: root @ 99fff000 254 entries.
379 14:49:38.777457 IMD: root @ 99ffec00 62 entries.
380 14:49:38.780688 External stage cache:
381 14:49:38.784502 IMD: root @ 9abff000 254 entries.
382 14:49:38.786943 IMD: root @ 9abfec00 62 entries.
383 14:49:38.790655 Chrome EC: clear events_b mask to 0x0000000020004000
384 14:49:38.806649 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 14:49:38.820146 tlcl_write: response is 0
386 14:49:38.829169 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 14:49:38.835706 MRC: TPM MRC hash updated successfully.
388 14:49:38.836331 2 DIMMs found
389 14:49:38.838957 SMM Memory Map
390 14:49:38.842811 SMRAM : 0x9a000000 0x1000000
391 14:49:38.845429 Subregion 0: 0x9a000000 0xa00000
392 14:49:38.849083 Subregion 1: 0x9aa00000 0x200000
393 14:49:38.851950 Subregion 2: 0x9ac00000 0x400000
394 14:49:38.855741 top_of_ram = 0x9a000000
395 14:49:38.858824 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 14:49:38.865441 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 14:49:38.869031 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 14:49:38.875227 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 14:49:38.878618 CBFS @ c08000 size 3f8000
400 14:49:38.882267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 14:49:38.884941 CBFS: Locating 'fallback/postcar'
402 14:49:38.892013 CBFS: Found @ offset 107000 size 4b44
403 14:49:38.895404 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 14:49:38.908357 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 14:49:38.911969 Processing 180 relocs. Offset value of 0x97c0c000
406 14:49:38.920354 Accumulated console time in romstage 286 ms
407 14:49:38.920976
408 14:49:38.921471
409 14:49:38.929591 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 14:49:38.936395 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 14:49:38.939485 CBFS @ c08000 size 3f8000
412 14:49:38.945817 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 14:49:38.949280 CBFS: Locating 'fallback/ramstage'
414 14:49:38.952293 CBFS: Found @ offset 43380 size 1b9e8
415 14:49:38.959644 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 14:49:38.991660 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 14:49:38.994989 Processing 3976 relocs. Offset value of 0x98db0000
418 14:49:39.001812 Accumulated console time in postcar 52 ms
419 14:49:39.002399
420 14:49:39.002788
421 14:49:39.012075 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 14:49:39.018510 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 14:49:39.021695 WARNING: RO_VPD is uninitialized or empty.
424 14:49:39.024839 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 14:49:39.031542 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 14:49:39.032183 Normal boot.
427 14:49:39.037811 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 14:49:39.042016 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 14:49:39.044912 CBFS @ c08000 size 3f8000
430 14:49:39.051449 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 14:49:39.054780 CBFS: Locating 'cpu_microcode_blob.bin'
432 14:49:39.058223 CBFS: Found @ offset 14700 size 2ec00
433 14:49:39.061783 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 14:49:39.064994 Skip microcode update
435 14:49:39.067972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 14:49:39.071225 CBFS @ c08000 size 3f8000
437 14:49:39.077652 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 14:49:39.081148 CBFS: Locating 'fsps.bin'
439 14:49:39.084385 CBFS: Found @ offset d1fc0 size 35000
440 14:49:39.109452 Detected 4 core, 8 thread CPU.
441 14:49:39.112823 Setting up SMI for CPU
442 14:49:39.116799 IED base = 0x9ac00000
443 14:49:39.117388 IED size = 0x00400000
444 14:49:39.120368 Will perform SMM setup.
445 14:49:39.126313 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 14:49:39.132684 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 14:49:39.137106 Processing 16 relocs. Offset value of 0x00030000
448 14:49:39.139583 Attempting to start 7 APs
449 14:49:39.143082 Waiting for 10ms after sending INIT.
450 14:49:39.159200 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
451 14:49:39.159779 done.
452 14:49:39.162501 AP: slot 4 apic_id 5.
453 14:49:39.165717 AP: slot 1 apic_id 4.
454 14:49:39.170206 Waiting for 2nd SIPI to complete...done.
455 14:49:39.172357 AP: slot 6 apic_id 6.
456 14:49:39.172848 AP: slot 7 apic_id 7.
457 14:49:39.176202 AP: slot 5 apic_id 2.
458 14:49:39.179260 AP: slot 3 apic_id 3.
459 14:49:39.185501 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 14:49:39.192058 Processing 13 relocs. Offset value of 0x00038000
461 14:49:39.195622 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 14:49:39.202264 Installing SMM handler to 0x9a000000
463 14:49:39.209162 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 14:49:39.212300 Processing 658 relocs. Offset value of 0x9a010000
465 14:49:39.221983 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 14:49:39.225806 Processing 13 relocs. Offset value of 0x9a008000
467 14:49:39.232586 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 14:49:39.238852 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 14:49:39.242397 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 14:49:39.249337 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 14:49:39.255911 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 14:49:39.262089 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 14:49:39.266152 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 14:49:39.272700 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 14:49:39.275413 Clearing SMI status registers
476 14:49:39.278930 SMI_STS: PM1
477 14:49:39.279418 PM1_STS: PWRBTN
478 14:49:39.281744 TCO_STS: SECOND_TO
479 14:49:39.285034 New SMBASE 0x9a000000
480 14:49:39.288518 In relocation handler: CPU 0
481 14:49:39.291769 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 14:49:39.295261 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 14:49:39.298443 Relocation complete.
484 14:49:39.301944 New SMBASE 0x99fff800
485 14:49:39.302538 In relocation handler: CPU 2
486 14:49:39.308827 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 14:49:39.312006 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 14:49:39.315267 Relocation complete.
489 14:49:39.318639 New SMBASE 0x99ffec00
490 14:49:39.319233 In relocation handler: CPU 5
491 14:49:39.325175 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
492 14:49:39.328686 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 14:49:39.332243 Relocation complete.
494 14:49:39.332837 New SMBASE 0x99fff400
495 14:49:39.336512 In relocation handler: CPU 3
496 14:49:39.342127 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
497 14:49:39.345190 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 14:49:39.348814 Relocation complete.
499 14:49:39.349396 New SMBASE 0x99fffc00
500 14:49:39.352770 In relocation handler: CPU 1
501 14:49:39.355402 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
502 14:49:39.362670 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 14:49:39.365211 Relocation complete.
504 14:49:39.365697 New SMBASE 0x99fff000
505 14:49:39.368704 In relocation handler: CPU 4
506 14:49:39.372022 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
507 14:49:39.378435 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 14:49:39.381813 Relocation complete.
509 14:49:39.382296 New SMBASE 0x99ffe400
510 14:49:39.385328 In relocation handler: CPU 7
511 14:49:39.388157 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
512 14:49:39.394760 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 14:49:39.395248 Relocation complete.
514 14:49:39.398471 New SMBASE 0x99ffe800
515 14:49:39.401745 In relocation handler: CPU 6
516 14:49:39.404672 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
517 14:49:39.411613 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 14:49:39.412257 Relocation complete.
519 14:49:39.415172 Initializing CPU #0
520 14:49:39.418189 CPU: vendor Intel device 806ec
521 14:49:39.421614 CPU: family 06, model 8e, stepping 0c
522 14:49:39.425066 Clearing out pending MCEs
523 14:49:39.428235 Setting up local APIC...
524 14:49:39.428814 apic_id: 0x00 done.
525 14:49:39.431694 Turbo is available but hidden
526 14:49:39.434899 Turbo is available and visible
527 14:49:39.438224 VMX status: enabled
528 14:49:39.441646 IA32_FEATURE_CONTROL status: locked
529 14:49:39.444894 Skip microcode update
530 14:49:39.445475 CPU #0 initialized
531 14:49:39.448409 Initializing CPU #2
532 14:49:39.448986 Initializing CPU #4
533 14:49:39.451672 Initializing CPU #1
534 14:49:39.454896 CPU: vendor Intel device 806ec
535 14:49:39.458432 CPU: family 06, model 8e, stepping 0c
536 14:49:39.461421 CPU: vendor Intel device 806ec
537 14:49:39.464845 CPU: family 06, model 8e, stepping 0c
538 14:49:39.468020 Clearing out pending MCEs
539 14:49:39.471819 Clearing out pending MCEs
540 14:49:39.474717 Setting up local APIC...
541 14:49:39.475360 Initializing CPU #3
542 14:49:39.477826 Initializing CPU #5
543 14:49:39.481070 CPU: vendor Intel device 806ec
544 14:49:39.484584 CPU: family 06, model 8e, stepping 0c
545 14:49:39.487760 CPU: vendor Intel device 806ec
546 14:49:39.490909 CPU: family 06, model 8e, stepping 0c
547 14:49:39.494365 Clearing out pending MCEs
548 14:49:39.498141 Clearing out pending MCEs
549 14:49:39.498751 Setting up local APIC...
550 14:49:39.501512 Initializing CPU #7
551 14:49:39.504492 Initializing CPU #6
552 14:49:39.507517 CPU: vendor Intel device 806ec
553 14:49:39.511089 CPU: family 06, model 8e, stepping 0c
554 14:49:39.514369 CPU: vendor Intel device 806ec
555 14:49:39.517364 CPU: family 06, model 8e, stepping 0c
556 14:49:39.521202 Clearing out pending MCEs
557 14:49:39.521793 Clearing out pending MCEs
558 14:49:39.524606 Setting up local APIC...
559 14:49:39.527955 CPU: vendor Intel device 806ec
560 14:49:39.531250 CPU: family 06, model 8e, stepping 0c
561 14:49:39.534373 apic_id: 0x06 done.
562 14:49:39.537375 Setting up local APIC...
563 14:49:39.537956 Setting up local APIC...
564 14:49:39.541077 apic_id: 0x07 done.
565 14:49:39.544050 VMX status: enabled
566 14:49:39.544632 VMX status: enabled
567 14:49:39.547288 IA32_FEATURE_CONTROL status: locked
568 14:49:39.550833 IA32_FEATURE_CONTROL status: locked
569 14:49:39.554620 Skip microcode update
570 14:49:39.557291 Skip microcode update
571 14:49:39.557868 CPU #6 initialized
572 14:49:39.560527 CPU #7 initialized
573 14:49:39.563755 Clearing out pending MCEs
574 14:49:39.564261 apic_id: 0x03 done.
575 14:49:39.567682 apic_id: 0x02 done.
576 14:49:39.570587 VMX status: enabled
577 14:49:39.571112 VMX status: enabled
578 14:49:39.573765 IA32_FEATURE_CONTROL status: locked
579 14:49:39.577216 IA32_FEATURE_CONTROL status: locked
580 14:49:39.580585 Skip microcode update
581 14:49:39.583886 Skip microcode update
582 14:49:39.584484 CPU #3 initialized
583 14:49:39.587024 CPU #5 initialized
584 14:49:39.590865 Setting up local APIC...
585 14:49:39.591561 apic_id: 0x05 done.
586 14:49:39.593697 Setting up local APIC...
587 14:49:39.597223 apic_id: 0x01 done.
588 14:49:39.597812 apic_id: 0x04 done.
589 14:49:39.600251 VMX status: enabled
590 14:49:39.604144 VMX status: enabled
591 14:49:39.607135 IA32_FEATURE_CONTROL status: locked
592 14:49:39.610911 IA32_FEATURE_CONTROL status: locked
593 14:49:39.613931 Skip microcode update
594 14:49:39.614510 Skip microcode update
595 14:49:39.617753 CPU #4 initialized
596 14:49:39.618337 CPU #1 initialized
597 14:49:39.620394 VMX status: enabled
598 14:49:39.623477 IA32_FEATURE_CONTROL status: locked
599 14:49:39.626885 Skip microcode update
600 14:49:39.627465 CPU #2 initialized
601 14:49:39.633690 bsp_do_flight_plan done after 461 msecs.
602 14:49:39.637104 CPU: frequency set to 4200 MHz
603 14:49:39.637687 Enabling SMIs.
604 14:49:39.640392 Locking SMM.
605 14:49:39.653668 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 14:49:39.656525 CBFS @ c08000 size 3f8000
607 14:49:39.663824 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 14:49:39.664433 CBFS: Locating 'vbt.bin'
609 14:49:39.667014 CBFS: Found @ offset 5f5c0 size 499
610 14:49:39.673244 Found a VBT of 4608 bytes after decompression
611 14:49:39.859104 Display FSP Version Info HOB
612 14:49:39.862191 Reference Code - CPU = 9.0.1e.30
613 14:49:39.865477 uCode Version = 0.0.0.ca
614 14:49:39.869741 TXT ACM version = ff.ff.ff.ffff
615 14:49:39.872303 Display FSP Version Info HOB
616 14:49:39.875633 Reference Code - ME = 9.0.1e.30
617 14:49:39.878772 MEBx version = 0.0.0.0
618 14:49:39.881916 ME Firmware Version = Consumer SKU
619 14:49:39.885452 Display FSP Version Info HOB
620 14:49:39.888822 Reference Code - CML PCH = 9.0.1e.30
621 14:49:39.892283 PCH-CRID Status = Disabled
622 14:49:39.895281 PCH-CRID Original Value = ff.ff.ff.ffff
623 14:49:39.898657 PCH-CRID New Value = ff.ff.ff.ffff
624 14:49:39.901972 OPROM - RST - RAID = ff.ff.ff.ffff
625 14:49:39.905563 ChipsetInit Base Version = ff.ff.ff.ffff
626 14:49:39.908437 ChipsetInit Oem Version = ff.ff.ff.ffff
627 14:49:39.912118 Display FSP Version Info HOB
628 14:49:39.918569 Reference Code - SA - System Agent = 9.0.1e.30
629 14:49:39.921986 Reference Code - MRC = 0.7.1.6c
630 14:49:39.922578 SA - PCIe Version = 9.0.1e.30
631 14:49:39.924905 SA-CRID Status = Disabled
632 14:49:39.928483 SA-CRID Original Value = 0.0.0.c
633 14:49:39.931924 SA-CRID New Value = 0.0.0.c
634 14:49:39.935564 OPROM - VBIOS = ff.ff.ff.ffff
635 14:49:39.938601 RTC Init
636 14:49:39.942169 Set power on after power failure.
637 14:49:39.942760 Disabling Deep S3
638 14:49:39.945013 Disabling Deep S3
639 14:49:39.945604 Disabling Deep S4
640 14:49:39.948780 Disabling Deep S4
641 14:49:39.949370 Disabling Deep S5
642 14:49:39.951817 Disabling Deep S5
643 14:49:39.958470 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
644 14:49:39.959065 Enumerating buses...
645 14:49:39.965086 Show all devs... Before device enumeration.
646 14:49:39.965678 Root Device: enabled 1
647 14:49:39.968380 CPU_CLUSTER: 0: enabled 1
648 14:49:39.971828 DOMAIN: 0000: enabled 1
649 14:49:39.975177 APIC: 00: enabled 1
650 14:49:39.975784 PCI: 00:00.0: enabled 1
651 14:49:39.978201 PCI: 00:02.0: enabled 1
652 14:49:39.982039 PCI: 00:04.0: enabled 0
653 14:49:39.982527 PCI: 00:05.0: enabled 0
654 14:49:39.984821 PCI: 00:12.0: enabled 1
655 14:49:39.988088 PCI: 00:12.5: enabled 0
656 14:49:39.991457 PCI: 00:12.6: enabled 0
657 14:49:39.992077 PCI: 00:14.0: enabled 1
658 14:49:39.994824 PCI: 00:14.1: enabled 0
659 14:49:39.998222 PCI: 00:14.3: enabled 1
660 14:49:40.001690 PCI: 00:14.5: enabled 0
661 14:49:40.002174 PCI: 00:15.0: enabled 1
662 14:49:40.004500 PCI: 00:15.1: enabled 1
663 14:49:40.008558 PCI: 00:15.2: enabled 0
664 14:49:40.011966 PCI: 00:15.3: enabled 0
665 14:49:40.012550 PCI: 00:16.0: enabled 1
666 14:49:40.014924 PCI: 00:16.1: enabled 0
667 14:49:40.018129 PCI: 00:16.2: enabled 0
668 14:49:40.018718 PCI: 00:16.3: enabled 0
669 14:49:40.021470 PCI: 00:16.4: enabled 0
670 14:49:40.024796 PCI: 00:16.5: enabled 0
671 14:49:40.028514 PCI: 00:17.0: enabled 1
672 14:49:40.029101 PCI: 00:19.0: enabled 1
673 14:49:40.031395 PCI: 00:19.1: enabled 0
674 14:49:40.035437 PCI: 00:19.2: enabled 0
675 14:49:40.038191 PCI: 00:1a.0: enabled 0
676 14:49:40.038777 PCI: 00:1c.0: enabled 0
677 14:49:40.041441 PCI: 00:1c.1: enabled 0
678 14:49:40.044765 PCI: 00:1c.2: enabled 0
679 14:49:40.047972 PCI: 00:1c.3: enabled 0
680 14:49:40.048562 PCI: 00:1c.4: enabled 0
681 14:49:40.051548 PCI: 00:1c.5: enabled 0
682 14:49:40.055437 PCI: 00:1c.6: enabled 0
683 14:49:40.056063 PCI: 00:1c.7: enabled 0
684 14:49:40.058048 PCI: 00:1d.0: enabled 1
685 14:49:40.061316 PCI: 00:1d.1: enabled 0
686 14:49:40.064613 PCI: 00:1d.2: enabled 0
687 14:49:40.065200 PCI: 00:1d.3: enabled 0
688 14:49:40.067686 PCI: 00:1d.4: enabled 0
689 14:49:40.071584 PCI: 00:1d.5: enabled 1
690 14:49:40.074697 PCI: 00:1e.0: enabled 1
691 14:49:40.075282 PCI: 00:1e.1: enabled 0
692 14:49:40.077825 PCI: 00:1e.2: enabled 1
693 14:49:40.081178 PCI: 00:1e.3: enabled 1
694 14:49:40.084190 PCI: 00:1f.0: enabled 1
695 14:49:40.084676 PCI: 00:1f.1: enabled 1
696 14:49:40.087717 PCI: 00:1f.2: enabled 1
697 14:49:40.090878 PCI: 00:1f.3: enabled 1
698 14:49:40.091365 PCI: 00:1f.4: enabled 1
699 14:49:40.094284 PCI: 00:1f.5: enabled 1
700 14:49:40.097611 PCI: 00:1f.6: enabled 0
701 14:49:40.100701 USB0 port 0: enabled 1
702 14:49:40.101214 I2C: 00:15: enabled 1
703 14:49:40.104208 I2C: 00:5d: enabled 1
704 14:49:40.107613 GENERIC: 0.0: enabled 1
705 14:49:40.108256 I2C: 00:1a: enabled 1
706 14:49:40.110812 I2C: 00:38: enabled 1
707 14:49:40.114704 I2C: 00:39: enabled 1
708 14:49:40.115291 I2C: 00:3a: enabled 1
709 14:49:40.117552 I2C: 00:3b: enabled 1
710 14:49:40.121111 PCI: 00:00.0: enabled 1
711 14:49:40.121700 SPI: 00: enabled 1
712 14:49:40.124281 SPI: 01: enabled 1
713 14:49:40.128344 PNP: 0c09.0: enabled 1
714 14:49:40.128932 USB2 port 0: enabled 1
715 14:49:40.131024 USB2 port 1: enabled 1
716 14:49:40.134134 USB2 port 2: enabled 0
717 14:49:40.137833 USB2 port 3: enabled 0
718 14:49:40.138423 USB2 port 5: enabled 0
719 14:49:40.140938 USB2 port 6: enabled 1
720 14:49:40.144019 USB2 port 9: enabled 1
721 14:49:40.144607 USB3 port 0: enabled 1
722 14:49:40.147685 USB3 port 1: enabled 1
723 14:49:40.150678 USB3 port 2: enabled 1
724 14:49:40.154118 USB3 port 3: enabled 1
725 14:49:40.154712 USB3 port 4: enabled 0
726 14:49:40.156915 APIC: 04: enabled 1
727 14:49:40.157408 APIC: 01: enabled 1
728 14:49:40.160991 APIC: 03: enabled 1
729 14:49:40.164099 APIC: 05: enabled 1
730 14:49:40.164688 APIC: 02: enabled 1
731 14:49:40.167544 APIC: 06: enabled 1
732 14:49:40.170825 APIC: 07: enabled 1
733 14:49:40.171412 Compare with tree...
734 14:49:40.174598 Root Device: enabled 1
735 14:49:40.177002 CPU_CLUSTER: 0: enabled 1
736 14:49:40.177491 APIC: 00: enabled 1
737 14:49:40.180615 APIC: 04: enabled 1
738 14:49:40.183889 APIC: 01: enabled 1
739 14:49:40.184478 APIC: 03: enabled 1
740 14:49:40.187103 APIC: 05: enabled 1
741 14:49:40.190330 APIC: 02: enabled 1
742 14:49:40.190836 APIC: 06: enabled 1
743 14:49:40.194104 APIC: 07: enabled 1
744 14:49:40.196733 DOMAIN: 0000: enabled 1
745 14:49:40.200144 PCI: 00:00.0: enabled 1
746 14:49:40.200634 PCI: 00:02.0: enabled 1
747 14:49:40.203525 PCI: 00:04.0: enabled 0
748 14:49:40.206772 PCI: 00:05.0: enabled 0
749 14:49:40.210078 PCI: 00:12.0: enabled 1
750 14:49:40.213844 PCI: 00:12.5: enabled 0
751 14:49:40.214336 PCI: 00:12.6: enabled 0
752 14:49:40.217445 PCI: 00:14.0: enabled 1
753 14:49:40.220474 USB0 port 0: enabled 1
754 14:49:40.223936 USB2 port 0: enabled 1
755 14:49:40.226825 USB2 port 1: enabled 1
756 14:49:40.227405 USB2 port 2: enabled 0
757 14:49:40.230523 USB2 port 3: enabled 0
758 14:49:40.233712 USB2 port 5: enabled 0
759 14:49:40.236552 USB2 port 6: enabled 1
760 14:49:40.240448 USB2 port 9: enabled 1
761 14:49:40.243692 USB3 port 0: enabled 1
762 14:49:40.244299 USB3 port 1: enabled 1
763 14:49:40.246898 USB3 port 2: enabled 1
764 14:49:40.250049 USB3 port 3: enabled 1
765 14:49:40.253416 USB3 port 4: enabled 0
766 14:49:40.256439 PCI: 00:14.1: enabled 0
767 14:49:40.256928 PCI: 00:14.3: enabled 1
768 14:49:40.260749 PCI: 00:14.5: enabled 0
769 14:49:40.264100 PCI: 00:15.0: enabled 1
770 14:49:40.267013 I2C: 00:15: enabled 1
771 14:49:40.269924 PCI: 00:15.1: enabled 1
772 14:49:40.270507 I2C: 00:5d: enabled 1
773 14:49:40.273471 GENERIC: 0.0: enabled 1
774 14:49:40.276608 PCI: 00:15.2: enabled 0
775 14:49:40.279885 PCI: 00:15.3: enabled 0
776 14:49:40.283233 PCI: 00:16.0: enabled 1
777 14:49:40.283815 PCI: 00:16.1: enabled 0
778 14:49:40.286480 PCI: 00:16.2: enabled 0
779 14:49:40.289468 PCI: 00:16.3: enabled 0
780 14:49:40.293049 PCI: 00:16.4: enabled 0
781 14:49:40.297062 PCI: 00:16.5: enabled 0
782 14:49:40.297577 PCI: 00:17.0: enabled 1
783 14:49:40.299657 PCI: 00:19.0: enabled 1
784 14:49:40.302923 I2C: 00:1a: enabled 1
785 14:49:40.306780 I2C: 00:38: enabled 1
786 14:49:40.307368 I2C: 00:39: enabled 1
787 14:49:40.309691 I2C: 00:3a: enabled 1
788 14:49:40.313154 I2C: 00:3b: enabled 1
789 14:49:40.316439 PCI: 00:19.1: enabled 0
790 14:49:40.316929 PCI: 00:19.2: enabled 0
791 14:49:40.320055 PCI: 00:1a.0: enabled 0
792 14:49:40.323431 PCI: 00:1c.0: enabled 0
793 14:49:40.326653 PCI: 00:1c.1: enabled 0
794 14:49:40.329722 PCI: 00:1c.2: enabled 0
795 14:49:40.330216 PCI: 00:1c.3: enabled 0
796 14:49:40.332798 PCI: 00:1c.4: enabled 0
797 14:49:40.336777 PCI: 00:1c.5: enabled 0
798 14:49:40.339959 PCI: 00:1c.6: enabled 0
799 14:49:40.343521 PCI: 00:1c.7: enabled 0
800 14:49:40.344151 PCI: 00:1d.0: enabled 1
801 14:49:40.346498 PCI: 00:1d.1: enabled 0
802 14:49:40.349742 PCI: 00:1d.2: enabled 0
803 14:49:40.352890 PCI: 00:1d.3: enabled 0
804 14:49:40.356435 PCI: 00:1d.4: enabled 0
805 14:49:40.357014 PCI: 00:1d.5: enabled 1
806 14:49:40.359539 PCI: 00:00.0: enabled 1
807 14:49:40.363200 PCI: 00:1e.0: enabled 1
808 14:49:40.366300 PCI: 00:1e.1: enabled 0
809 14:49:40.369965 PCI: 00:1e.2: enabled 1
810 14:49:40.370548 SPI: 00: enabled 1
811 14:49:40.373685 PCI: 00:1e.3: enabled 1
812 14:49:40.376460 SPI: 01: enabled 1
813 14:49:40.379477 PCI: 00:1f.0: enabled 1
814 14:49:40.380092 PNP: 0c09.0: enabled 1
815 14:49:40.382770 PCI: 00:1f.1: enabled 1
816 14:49:40.385921 PCI: 00:1f.2: enabled 1
817 14:49:40.388974 PCI: 00:1f.3: enabled 1
818 14:49:40.389466 PCI: 00:1f.4: enabled 1
819 14:49:40.392507 PCI: 00:1f.5: enabled 1
820 14:49:40.396183 PCI: 00:1f.6: enabled 0
821 14:49:40.399291 Root Device scanning...
822 14:49:40.402751 scan_static_bus for Root Device
823 14:49:40.405991 CPU_CLUSTER: 0 enabled
824 14:49:40.406487 DOMAIN: 0000 enabled
825 14:49:40.409202 DOMAIN: 0000 scanning...
826 14:49:40.412837 PCI: pci_scan_bus for bus 00
827 14:49:40.416232 PCI: 00:00.0 [8086/0000] ops
828 14:49:40.419135 PCI: 00:00.0 [8086/9b61] enabled
829 14:49:40.422992 PCI: 00:02.0 [8086/0000] bus ops
830 14:49:40.425903 PCI: 00:02.0 [8086/9b41] enabled
831 14:49:40.429321 PCI: 00:04.0 [8086/1903] disabled
832 14:49:40.432745 PCI: 00:08.0 [8086/1911] enabled
833 14:49:40.435978 PCI: 00:12.0 [8086/02f9] enabled
834 14:49:40.439317 PCI: 00:14.0 [8086/0000] bus ops
835 14:49:40.442819 PCI: 00:14.0 [8086/02ed] enabled
836 14:49:40.446146 PCI: 00:14.2 [8086/02ef] enabled
837 14:49:40.449235 PCI: 00:14.3 [8086/02f0] enabled
838 14:49:40.452642 PCI: 00:15.0 [8086/0000] bus ops
839 14:49:40.456077 PCI: 00:15.0 [8086/02e8] enabled
840 14:49:40.459031 PCI: 00:15.1 [8086/0000] bus ops
841 14:49:40.462524 PCI: 00:15.1 [8086/02e9] enabled
842 14:49:40.465909 PCI: 00:16.0 [8086/0000] ops
843 14:49:40.469041 PCI: 00:16.0 [8086/02e0] enabled
844 14:49:40.472759 PCI: 00:17.0 [8086/0000] ops
845 14:49:40.475729 PCI: 00:17.0 [8086/02d3] enabled
846 14:49:40.478986 PCI: 00:19.0 [8086/0000] bus ops
847 14:49:40.482354 PCI: 00:19.0 [8086/02c5] enabled
848 14:49:40.485471 PCI: 00:1d.0 [8086/0000] bus ops
849 14:49:40.488816 PCI: 00:1d.0 [8086/02b0] enabled
850 14:49:40.492526 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 14:49:40.495486 PCI: 00:1e.0 [8086/0000] ops
852 14:49:40.498695 PCI: 00:1e.0 [8086/02a8] enabled
853 14:49:40.502494 PCI: 00:1e.2 [8086/0000] bus ops
854 14:49:40.505966 PCI: 00:1e.2 [8086/02aa] enabled
855 14:49:40.508603 PCI: 00:1e.3 [8086/0000] bus ops
856 14:49:40.512393 PCI: 00:1e.3 [8086/02ab] enabled
857 14:49:40.515210 PCI: 00:1f.0 [8086/0000] bus ops
858 14:49:40.518762 PCI: 00:1f.0 [8086/0284] enabled
859 14:49:40.526014 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 14:49:40.532238 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 14:49:40.535304 PCI: 00:1f.3 [8086/0000] bus ops
862 14:49:40.538900 PCI: 00:1f.3 [8086/02c8] enabled
863 14:49:40.542073 PCI: 00:1f.4 [8086/0000] bus ops
864 14:49:40.545447 PCI: 00:1f.4 [8086/02a3] enabled
865 14:49:40.549132 PCI: 00:1f.5 [8086/0000] bus ops
866 14:49:40.552098 PCI: 00:1f.5 [8086/02a4] enabled
867 14:49:40.555730 PCI: Leftover static devices:
868 14:49:40.556350 PCI: 00:05.0
869 14:49:40.556740 PCI: 00:12.5
870 14:49:40.558744 PCI: 00:12.6
871 14:49:40.559342 PCI: 00:14.1
872 14:49:40.562200 PCI: 00:14.5
873 14:49:40.562780 PCI: 00:15.2
874 14:49:40.563171 PCI: 00:15.3
875 14:49:40.565745 PCI: 00:16.1
876 14:49:40.566324 PCI: 00:16.2
877 14:49:40.568457 PCI: 00:16.3
878 14:49:40.568943 PCI: 00:16.4
879 14:49:40.571783 PCI: 00:16.5
880 14:49:40.572399 PCI: 00:19.1
881 14:49:40.572788 PCI: 00:19.2
882 14:49:40.575103 PCI: 00:1a.0
883 14:49:40.575682 PCI: 00:1c.0
884 14:49:40.578579 PCI: 00:1c.1
885 14:49:40.579163 PCI: 00:1c.2
886 14:49:40.579547 PCI: 00:1c.3
887 14:49:40.581890 PCI: 00:1c.4
888 14:49:40.582471 PCI: 00:1c.5
889 14:49:40.585355 PCI: 00:1c.6
890 14:49:40.585938 PCI: 00:1c.7
891 14:49:40.586327 PCI: 00:1d.1
892 14:49:40.588543 PCI: 00:1d.2
893 14:49:40.589131 PCI: 00:1d.3
894 14:49:40.591998 PCI: 00:1d.4
895 14:49:40.592629 PCI: 00:1d.5
896 14:49:40.595309 PCI: 00:1e.1
897 14:49:40.595795 PCI: 00:1f.1
898 14:49:40.596237 PCI: 00:1f.2
899 14:49:40.598726 PCI: 00:1f.6
900 14:49:40.601476 PCI: Check your devicetree.cb.
901 14:49:40.601964 PCI: 00:02.0 scanning...
902 14:49:40.609577 scan_generic_bus for PCI: 00:02.0
903 14:49:40.611774 scan_generic_bus for PCI: 00:02.0 done
904 14:49:40.615235 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
905 14:49:40.618601 PCI: 00:14.0 scanning...
906 14:49:40.621836 scan_static_bus for PCI: 00:14.0
907 14:49:40.625526 USB0 port 0 enabled
908 14:49:40.628522 USB0 port 0 scanning...
909 14:49:40.631909 scan_static_bus for USB0 port 0
910 14:49:40.632498 USB2 port 0 enabled
911 14:49:40.635832 USB2 port 1 enabled
912 14:49:40.636445 USB2 port 2 disabled
913 14:49:40.638321 USB2 port 3 disabled
914 14:49:40.642077 USB2 port 5 disabled
915 14:49:40.642658 USB2 port 6 enabled
916 14:49:40.645256 USB2 port 9 enabled
917 14:49:40.648656 USB3 port 0 enabled
918 14:49:40.649299 USB3 port 1 enabled
919 14:49:40.652471 USB3 port 2 enabled
920 14:49:40.653057 USB3 port 3 enabled
921 14:49:40.655228 USB3 port 4 disabled
922 14:49:40.658866 USB2 port 0 scanning...
923 14:49:40.661384 scan_static_bus for USB2 port 0
924 14:49:40.664755 scan_static_bus for USB2 port 0 done
925 14:49:40.671833 scan_bus: scanning of bus USB2 port 0 took 9687 usecs
926 14:49:40.672447 USB2 port 1 scanning...
927 14:49:40.675208 scan_static_bus for USB2 port 1
928 14:49:40.681455 scan_static_bus for USB2 port 1 done
929 14:49:40.685172 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
930 14:49:40.688001 USB2 port 6 scanning...
931 14:49:40.691255 scan_static_bus for USB2 port 6
932 14:49:40.694381 scan_static_bus for USB2 port 6 done
933 14:49:40.701190 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
934 14:49:40.701680 USB2 port 9 scanning...
935 14:49:40.704677 scan_static_bus for USB2 port 9
936 14:49:40.711240 scan_static_bus for USB2 port 9 done
937 14:49:40.714752 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
938 14:49:40.718575 USB3 port 0 scanning...
939 14:49:40.721337 scan_static_bus for USB3 port 0
940 14:49:40.725239 scan_static_bus for USB3 port 0 done
941 14:49:40.731823 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
942 14:49:40.732446 USB3 port 1 scanning...
943 14:49:40.735052 scan_static_bus for USB3 port 1
944 14:49:40.741600 scan_static_bus for USB3 port 1 done
945 14:49:40.744917 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
946 14:49:40.748652 USB3 port 2 scanning...
947 14:49:40.751415 scan_static_bus for USB3 port 2
948 14:49:40.754683 scan_static_bus for USB3 port 2 done
949 14:49:40.761113 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
950 14:49:40.761706 USB3 port 3 scanning...
951 14:49:40.764804 scan_static_bus for USB3 port 3
952 14:49:40.771448 scan_static_bus for USB3 port 3 done
953 14:49:40.774792 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
954 14:49:40.778309 scan_static_bus for USB0 port 0 done
955 14:49:40.784614 scan_bus: scanning of bus USB0 port 0 took 155312 usecs
956 14:49:40.788313 scan_static_bus for PCI: 00:14.0 done
957 14:49:40.794396 scan_bus: scanning of bus PCI: 00:14.0 took 172939 usecs
958 14:49:40.797666 PCI: 00:15.0 scanning...
959 14:49:40.801502 scan_generic_bus for PCI: 00:15.0
960 14:49:40.804874 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 14:49:40.807901 scan_generic_bus for PCI: 00:15.0 done
962 14:49:40.814766 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
963 14:49:40.817677 PCI: 00:15.1 scanning...
964 14:49:40.821037 scan_generic_bus for PCI: 00:15.1
965 14:49:40.824538 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 14:49:40.827983 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 14:49:40.831315 scan_generic_bus for PCI: 00:15.1 done
968 14:49:40.838181 scan_bus: scanning of bus PCI: 00:15.1 took 18669 usecs
969 14:49:40.841169 PCI: 00:19.0 scanning...
970 14:49:40.844783 scan_generic_bus for PCI: 00:19.0
971 14:49:40.847994 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 14:49:40.851001 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 14:49:40.857589 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 14:49:40.860978 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 14:49:40.864338 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 14:49:40.868005 scan_generic_bus for PCI: 00:19.0 done
977 14:49:40.874424 scan_bus: scanning of bus PCI: 00:19.0 took 30711 usecs
978 14:49:40.877858 PCI: 00:1d.0 scanning...
979 14:49:40.881216 do_pci_scan_bridge for PCI: 00:1d.0
980 14:49:40.884702 PCI: pci_scan_bus for bus 01
981 14:49:40.887948 PCI: 01:00.0 [1c5c/1327] enabled
982 14:49:40.890539 Enabling Common Clock Configuration
983 14:49:40.894223 L1 Sub-State supported from root port 29
984 14:49:40.897754 L1 Sub-State Support = 0xf
985 14:49:40.900542 CommonModeRestoreTime = 0x28
986 14:49:40.904231 Power On Value = 0x16, Power On Scale = 0x0
987 14:49:40.907468 ASPM: Enabled L1
988 14:49:40.911130 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
989 14:49:40.914447 PCI: 00:1e.2 scanning...
990 14:49:40.917331 scan_generic_bus for PCI: 00:1e.2
991 14:49:40.920660 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 14:49:40.927798 scan_generic_bus for PCI: 00:1e.2 done
993 14:49:40.930900 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
994 14:49:40.934155 PCI: 00:1e.3 scanning...
995 14:49:40.937390 scan_generic_bus for PCI: 00:1e.3
996 14:49:40.940758 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 14:49:40.944188 scan_generic_bus for PCI: 00:1e.3 done
998 14:49:40.951199 scan_bus: scanning of bus PCI: 00:1e.3 took 13990 usecs
999 14:49:40.954213 PCI: 00:1f.0 scanning...
1000 14:49:40.957647 scan_static_bus for PCI: 00:1f.0
1001 14:49:40.960525 PNP: 0c09.0 enabled
1002 14:49:40.963886 scan_static_bus for PCI: 00:1f.0 done
1003 14:49:40.967390 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1004 14:49:40.970544 PCI: 00:1f.3 scanning...
1005 14:49:40.977164 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1006 14:49:40.980766 PCI: 00:1f.4 scanning...
1007 14:49:40.984412 scan_generic_bus for PCI: 00:1f.4
1008 14:49:40.986987 scan_generic_bus for PCI: 00:1f.4 done
1009 14:49:40.993935 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1010 14:49:40.994521 PCI: 00:1f.5 scanning...
1011 14:49:41.000107 scan_generic_bus for PCI: 00:1f.5
1012 14:49:41.003686 scan_generic_bus for PCI: 00:1f.5 done
1013 14:49:41.007473 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1014 14:49:41.013368 scan_bus: scanning of bus DOMAIN: 0000 took 604920 usecs
1015 14:49:41.016784 scan_static_bus for Root Device done
1016 14:49:41.023661 scan_bus: scanning of bus Root Device took 624792 usecs
1017 14:49:41.024299 done
1018 14:49:41.026790 Chrome EC: UHEPI supported
1019 14:49:41.033817 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 14:49:41.040429 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 14:49:41.046693 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 14:49:41.053345 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 14:49:41.056985 SPI flash protection: WPSW=0 SRP0=0
1024 14:49:41.060194 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 14:49:41.067226 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 14:49:41.070343 found VGA at PCI: 00:02.0
1027 14:49:41.073716 Setting up VGA for PCI: 00:02.0
1028 14:49:41.076283 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 14:49:41.083068 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 14:49:41.083650 Allocating resources...
1031 14:49:41.086455 Reading resources...
1032 14:49:41.089423 Root Device read_resources bus 0 link: 0
1033 14:49:41.096143 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 14:49:41.099649 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 14:49:41.106864 DOMAIN: 0000 read_resources bus 0 link: 0
1036 14:49:41.109634 PCI: 00:14.0 read_resources bus 0 link: 0
1037 14:49:41.116094 USB0 port 0 read_resources bus 0 link: 0
1038 14:49:41.123225 USB0 port 0 read_resources bus 0 link: 0 done
1039 14:49:41.126452 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 14:49:41.133999 PCI: 00:15.0 read_resources bus 1 link: 0
1041 14:49:41.137805 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 14:49:41.144422 PCI: 00:15.1 read_resources bus 2 link: 0
1043 14:49:41.147360 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 14:49:41.155138 PCI: 00:19.0 read_resources bus 3 link: 0
1045 14:49:41.161211 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 14:49:41.164468 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 14:49:41.171877 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 14:49:41.174664 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 14:49:41.181345 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 14:49:41.184616 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 14:49:41.191112 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 14:49:41.194524 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 14:49:41.201425 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 14:49:41.207565 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 14:49:41.211150 Root Device read_resources bus 0 link: 0 done
1056 14:49:41.214533 Done reading resources.
1057 14:49:41.217562 Show resources in subtree (Root Device)...After reading.
1058 14:49:41.224103 Root Device child on link 0 CPU_CLUSTER: 0
1059 14:49:41.227688 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 14:49:41.228297 APIC: 00
1061 14:49:41.230791 APIC: 04
1062 14:49:41.231271 APIC: 01
1063 14:49:41.234288 APIC: 03
1064 14:49:41.234772 APIC: 05
1065 14:49:41.235152 APIC: 02
1066 14:49:41.237936 APIC: 06
1067 14:49:41.238513 APIC: 07
1068 14:49:41.241119 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 14:49:41.250598 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 14:49:41.260666 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 14:49:41.310656 PCI: 00:00.0
1072 14:49:41.311282 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 14:49:41.312097 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 14:49:41.312498 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 14:49:41.312857 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 14:49:41.313556 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 14:49:41.360789 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 14:49:41.361381 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 14:49:41.362196 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 14:49:41.362602 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 14:49:41.363313 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 14:49:41.409800 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 14:49:41.410816 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 14:49:41.411245 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 14:49:41.412027 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 14:49:41.412418 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 14:49:41.460002 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 14:49:41.460599 PCI: 00:02.0
1089 14:49:41.461403 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 14:49:41.461802 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 14:49:41.462573 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 14:49:41.462973 PCI: 00:04.0
1093 14:49:41.463320 PCI: 00:08.0
1094 14:49:41.463653 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 14:49:41.464038 PCI: 00:12.0
1096 14:49:41.474675 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 14:49:41.475257 PCI: 00:14.0 child on link 0 USB0 port 0
1098 14:49:41.481024 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 14:49:41.487749 USB0 port 0 child on link 0 USB2 port 0
1100 14:49:41.488375 USB2 port 0
1101 14:49:41.491060 USB2 port 1
1102 14:49:41.491606 USB2 port 2
1103 14:49:41.494507 USB2 port 3
1104 14:49:41.495094 USB2 port 5
1105 14:49:41.497783 USB2 port 6
1106 14:49:41.498371 USB2 port 9
1107 14:49:41.501857 USB3 port 0
1108 14:49:41.504111 USB3 port 1
1109 14:49:41.504592 USB3 port 2
1110 14:49:41.507798 USB3 port 3
1111 14:49:41.508443 USB3 port 4
1112 14:49:41.511133 PCI: 00:14.2
1113 14:49:41.520658 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 14:49:41.531022 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 14:49:41.531616 PCI: 00:14.3
1116 14:49:41.541087 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 14:49:41.544185 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 14:49:41.554047 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 14:49:41.557309 I2C: 01:15
1120 14:49:41.560766 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 14:49:41.570519 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 14:49:41.573785 I2C: 02:5d
1123 14:49:41.574266 GENERIC: 0.0
1124 14:49:41.577744 PCI: 00:16.0
1125 14:49:41.587272 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 14:49:41.587895 PCI: 00:17.0
1127 14:49:41.597243 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 14:49:41.607775 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 14:49:41.614024 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 14:49:41.623422 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 14:49:41.630059 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 14:49:41.640111 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 14:49:41.643572 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 14:49:41.653371 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 14:49:41.656722 I2C: 03:1a
1136 14:49:41.657328 I2C: 03:38
1137 14:49:41.660283 I2C: 03:39
1138 14:49:41.660874 I2C: 03:3a
1139 14:49:41.661261 I2C: 03:3b
1140 14:49:41.666800 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 14:49:41.673710 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 14:49:41.683316 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 14:49:41.693315 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 14:49:41.696422 PCI: 01:00.0
1145 14:49:41.706389 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 14:49:41.706990 PCI: 00:1e.0
1147 14:49:41.719706 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 14:49:41.726522 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 14:49:41.732699 PCI: 00:1e.2 child on link 0 SPI: 00
1150 14:49:41.742821 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 14:49:41.743422 SPI: 00
1152 14:49:41.746673 PCI: 00:1e.3 child on link 0 SPI: 01
1153 14:49:41.756370 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:49:41.759925 SPI: 01
1155 14:49:41.762722 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 14:49:41.772704 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 14:49:41.779486 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 14:49:41.783005 PNP: 0c09.0
1159 14:49:41.789142 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 14:49:41.792277 PCI: 00:1f.3
1161 14:49:41.802429 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 14:49:41.811921 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 14:49:41.816116 PCI: 00:1f.4
1164 14:49:41.822546 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 14:49:41.832392 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 14:49:41.835169 PCI: 00:1f.5
1167 14:49:41.842025 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 14:49:41.849082 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 14:49:41.855587 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 14:49:41.862230 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 14:49:41.865283 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 14:49:41.869181 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 14:49:41.875887 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 14:49:41.878627 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 14:49:41.885780 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 14:49:41.891927 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 14:49:41.898982 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 14:49:41.908487 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 14:49:41.915539 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 14:49:41.918444 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 14:49:41.925362 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 14:49:41.931911 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 14:49:41.935074 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 14:49:41.941931 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 14:49:41.944880 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 14:49:41.948274 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 14:49:41.954997 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 14:49:41.958495 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 14:49:41.964872 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 14:49:41.968363 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 14:49:41.974884 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 14:49:41.978721 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 14:49:41.984561 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 14:49:41.988389 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 14:49:41.995154 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 14:49:41.997967 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 14:49:42.004483 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 14:49:42.008135 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 14:49:42.014698 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 14:49:42.018065 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 14:49:42.021429 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 14:49:42.027587 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 14:49:42.031013 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 14:49:42.037465 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 14:49:42.044173 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 14:49:42.050840 avoid_fixed_resources: DOMAIN: 0000
1207 14:49:42.054168 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 14:49:42.060677 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 14:49:42.067298 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 14:49:42.077568 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 14:49:42.083768 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 14:49:42.090580 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 14:49:42.100658 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 14:49:42.107294 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 14:49:42.113892 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 14:49:42.123658 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 14:49:42.130413 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 14:49:42.136717 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 14:49:42.140139 Setting resources...
1220 14:49:42.146912 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 14:49:42.150644 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 14:49:42.153398 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 14:49:42.156952 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 14:49:42.160023 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 14:49:42.166851 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 14:49:42.173992 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 14:49:42.179960 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 14:49:42.186564 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 14:49:42.193055 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 14:49:42.196797 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 14:49:42.203246 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 14:49:42.206426 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 14:49:42.214030 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 14:49:42.216764 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 14:49:42.223109 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 14:49:42.226546 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 14:49:42.232961 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 14:49:42.236253 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 14:49:42.243096 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 14:49:42.246522 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 14:49:42.252746 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 14:49:42.256235 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 14:49:42.262721 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 14:49:42.265828 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 14:49:42.269644 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 14:49:42.276009 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 14:49:42.279233 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 14:49:42.286128 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 14:49:42.289340 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 14:49:42.295526 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 14:49:42.298882 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 14:49:42.309010 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 14:49:42.315825 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 14:49:42.322441 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 14:49:42.329075 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 14:49:42.335483 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 14:49:42.342326 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 14:49:42.345697 Root Device assign_resources, bus 0 link: 0
1259 14:49:42.352030 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 14:49:42.358615 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 14:49:42.368538 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 14:49:42.375961 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 14:49:42.385299 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 14:49:42.391934 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 14:49:42.402184 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 14:49:42.404945 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 14:49:42.408265 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 14:49:42.418829 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 14:49:42.424894 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 14:49:42.434986 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 14:49:42.441664 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 14:49:42.448610 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 14:49:42.451960 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 14:49:42.462315 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 14:49:42.464558 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 14:49:42.467897 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 14:49:42.478210 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 14:49:42.484731 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 14:49:42.494517 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 14:49:42.501372 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 14:49:42.507649 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 14:49:42.518563 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 14:49:42.524527 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 14:49:42.531923 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 14:49:42.537618 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 14:49:42.540828 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 14:49:42.551323 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 14:49:42.560804 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 14:49:42.567336 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 14:49:42.570898 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 14:49:42.581043 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 14:49:42.584148 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 14:49:42.594038 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 14:49:42.600749 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 14:49:42.607482 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 14:49:42.610770 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 14:49:42.620513 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 14:49:42.624464 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 14:49:42.627131 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 14:49:42.634234 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 14:49:42.637462 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 14:49:42.644003 LPC: Trying to open IO window from 800 size 1ff
1303 14:49:42.650449 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 14:49:42.660782 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 14:49:42.666821 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 14:49:42.677287 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 14:49:42.680375 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 14:49:42.686822 Root Device assign_resources, bus 0 link: 0
1309 14:49:42.687393 Done setting resources.
1310 14:49:42.693202 Show resources in subtree (Root Device)...After assigning values.
1311 14:49:42.700017 Root Device child on link 0 CPU_CLUSTER: 0
1312 14:49:42.703357 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 14:49:42.703960 APIC: 00
1314 14:49:42.706506 APIC: 04
1315 14:49:42.707010 APIC: 01
1316 14:49:42.707428 APIC: 03
1317 14:49:42.709991 APIC: 05
1318 14:49:42.710462 APIC: 02
1319 14:49:42.713187 APIC: 06
1320 14:49:42.713786 APIC: 07
1321 14:49:42.716691 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 14:49:42.726827 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 14:49:42.739740 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 14:49:42.740357 PCI: 00:00.0
1325 14:49:42.749359 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 14:49:42.759832 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 14:49:42.769346 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 14:49:42.779168 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 14:49:42.786292 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 14:49:42.795396 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 14:49:42.805917 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 14:49:42.815544 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 14:49:42.825364 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 14:49:42.832091 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 14:49:42.842101 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 14:49:42.851726 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 14:49:42.861739 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 14:49:42.871232 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 14:49:42.881731 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 14:49:42.891445 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 14:49:42.892055 PCI: 00:02.0
1342 14:49:42.901328 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 14:49:42.914811 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 14:49:42.921455 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 14:49:42.924201 PCI: 00:04.0
1346 14:49:42.924684 PCI: 00:08.0
1347 14:49:42.934553 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 14:49:42.937746 PCI: 00:12.0
1349 14:49:42.948035 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 14:49:42.950885 PCI: 00:14.0 child on link 0 USB0 port 0
1351 14:49:42.964208 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 14:49:42.966986 USB0 port 0 child on link 0 USB2 port 0
1353 14:49:42.967474 USB2 port 0
1354 14:49:42.970491 USB2 port 1
1355 14:49:42.971075 USB2 port 2
1356 14:49:42.973958 USB2 port 3
1357 14:49:42.974532 USB2 port 5
1358 14:49:42.977210 USB2 port 6
1359 14:49:42.980716 USB2 port 9
1360 14:49:42.981300 USB3 port 0
1361 14:49:42.984146 USB3 port 1
1362 14:49:42.984720 USB3 port 2
1363 14:49:42.987238 USB3 port 3
1364 14:49:42.987812 USB3 port 4
1365 14:49:42.990844 PCI: 00:14.2
1366 14:49:43.000213 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 14:49:43.010192 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 14:49:43.010762 PCI: 00:14.3
1369 14:49:43.023443 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 14:49:43.027515 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 14:49:43.036769 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 14:49:43.037354 I2C: 01:15
1373 14:49:43.043585 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 14:49:43.053342 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 14:49:43.053927 I2C: 02:5d
1376 14:49:43.057058 GENERIC: 0.0
1377 14:49:43.057541 PCI: 00:16.0
1378 14:49:43.066650 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 14:49:43.069680 PCI: 00:17.0
1380 14:49:43.080277 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 14:49:43.089832 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 14:49:43.099529 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 14:49:43.109765 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 14:49:43.116421 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 14:49:43.126322 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 14:49:43.132542 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 14:49:43.142786 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 14:49:43.143371 I2C: 03:1a
1389 14:49:43.145939 I2C: 03:38
1390 14:49:43.146522 I2C: 03:39
1391 14:49:43.149224 I2C: 03:3a
1392 14:49:43.149806 I2C: 03:3b
1393 14:49:43.155797 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 14:49:43.162761 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 14:49:43.171984 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 14:49:43.186103 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 14:49:43.186694 PCI: 01:00.0
1398 14:49:43.195457 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 14:49:43.198547 PCI: 00:1e.0
1400 14:49:43.208639 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 14:49:43.218652 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 14:49:43.222047 PCI: 00:1e.2 child on link 0 SPI: 00
1403 14:49:43.235960 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 14:49:43.236546 SPI: 00
1405 14:49:43.238920 PCI: 00:1e.3 child on link 0 SPI: 01
1406 14:49:43.248707 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 14:49:43.251777 SPI: 01
1408 14:49:43.255328 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 14:49:43.264741 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 14:49:43.271565 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 14:49:43.275249 PNP: 0c09.0
1412 14:49:43.281416 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 14:49:43.284455 PCI: 00:1f.3
1414 14:49:43.294331 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 14:49:43.304719 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 14:49:43.307779 PCI: 00:1f.4
1417 14:49:43.317443 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 14:49:43.328010 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 14:49:43.328592 PCI: 00:1f.5
1420 14:49:43.337937 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 14:49:43.340779 Done allocating resources.
1422 14:49:43.347473 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 14:49:43.350825 Enabling resources...
1424 14:49:43.354181 PCI: 00:00.0 subsystem <- 8086/9b61
1425 14:49:43.357450 PCI: 00:00.0 cmd <- 06
1426 14:49:43.360755 PCI: 00:02.0 subsystem <- 8086/9b41
1427 14:49:43.363877 PCI: 00:02.0 cmd <- 03
1428 14:49:43.364462 PCI: 00:08.0 cmd <- 06
1429 14:49:43.370572 PCI: 00:12.0 subsystem <- 8086/02f9
1430 14:49:43.371164 PCI: 00:12.0 cmd <- 02
1431 14:49:43.373594 PCI: 00:14.0 subsystem <- 8086/02ed
1432 14:49:43.377068 PCI: 00:14.0 cmd <- 02
1433 14:49:43.380363 PCI: 00:14.2 cmd <- 02
1434 14:49:43.383454 PCI: 00:14.3 subsystem <- 8086/02f0
1435 14:49:43.386958 PCI: 00:14.3 cmd <- 02
1436 14:49:43.390159 PCI: 00:15.0 subsystem <- 8086/02e8
1437 14:49:43.393348 PCI: 00:15.0 cmd <- 02
1438 14:49:43.396562 PCI: 00:15.1 subsystem <- 8086/02e9
1439 14:49:43.400464 PCI: 00:15.1 cmd <- 02
1440 14:49:43.403109 PCI: 00:16.0 subsystem <- 8086/02e0
1441 14:49:43.406720 PCI: 00:16.0 cmd <- 02
1442 14:49:43.409704 PCI: 00:17.0 subsystem <- 8086/02d3
1443 14:49:43.410201 PCI: 00:17.0 cmd <- 03
1444 14:49:43.417021 PCI: 00:19.0 subsystem <- 8086/02c5
1445 14:49:43.417627 PCI: 00:19.0 cmd <- 02
1446 14:49:43.420175 PCI: 00:1d.0 bridge ctrl <- 0013
1447 14:49:43.423249 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 14:49:43.426829 PCI: 00:1d.0 cmd <- 06
1449 14:49:43.429903 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 14:49:43.433223 PCI: 00:1e.0 cmd <- 06
1451 14:49:43.436413 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 14:49:43.440039 PCI: 00:1e.2 cmd <- 06
1453 14:49:43.443222 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 14:49:43.446661 PCI: 00:1e.3 cmd <- 02
1455 14:49:43.450262 PCI: 00:1f.0 subsystem <- 8086/0284
1456 14:49:43.453003 PCI: 00:1f.0 cmd <- 407
1457 14:49:43.456768 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 14:49:43.459672 PCI: 00:1f.3 cmd <- 02
1459 14:49:43.462866 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 14:49:43.466232 PCI: 00:1f.4 cmd <- 03
1461 14:49:43.469814 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 14:49:43.470407 PCI: 00:1f.5 cmd <- 406
1463 14:49:43.480117 PCI: 01:00.0 cmd <- 02
1464 14:49:43.485054 done.
1465 14:49:43.498138 ME: Version: 14.0.39.1367
1466 14:49:43.504385 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1467 14:49:43.507791 Initializing devices...
1468 14:49:43.508393 Root Device init ...
1469 14:49:43.514618 Chrome EC: Set SMI mask to 0x0000000000000000
1470 14:49:43.517744 Chrome EC: clear events_b mask to 0x0000000000000000
1471 14:49:43.524801 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 14:49:43.530576 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 14:49:43.537679 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 14:49:43.540741 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 14:49:43.544242 Root Device init finished in 35192 usecs
1476 14:49:43.548171 CPU_CLUSTER: 0 init ...
1477 14:49:43.554282 CPU_CLUSTER: 0 init finished in 2448 usecs
1478 14:49:43.559201 PCI: 00:00.0 init ...
1479 14:49:43.562068 CPU TDP: 15 Watts
1480 14:49:43.565250 CPU PL2 = 64 Watts
1481 14:49:43.568570 PCI: 00:00.0 init finished in 7087 usecs
1482 14:49:43.571977 PCI: 00:02.0 init ...
1483 14:49:43.574975 PCI: 00:02.0 init finished in 2256 usecs
1484 14:49:43.578284 PCI: 00:08.0 init ...
1485 14:49:43.581659 PCI: 00:08.0 init finished in 2253 usecs
1486 14:49:43.585021 PCI: 00:12.0 init ...
1487 14:49:43.588238 PCI: 00:12.0 init finished in 2254 usecs
1488 14:49:43.591448 PCI: 00:14.0 init ...
1489 14:49:43.594927 PCI: 00:14.0 init finished in 2246 usecs
1490 14:49:43.598172 PCI: 00:14.2 init ...
1491 14:49:43.601930 PCI: 00:14.2 init finished in 2253 usecs
1492 14:49:43.605049 PCI: 00:14.3 init ...
1493 14:49:43.608064 PCI: 00:14.3 init finished in 2270 usecs
1494 14:49:43.611318 PCI: 00:15.0 init ...
1495 14:49:43.614740 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 14:49:43.618419 PCI: 00:15.0 init finished in 5981 usecs
1497 14:49:43.621248 PCI: 00:15.1 init ...
1498 14:49:43.624887 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 14:49:43.631247 PCI: 00:15.1 init finished in 5980 usecs
1500 14:49:43.631831 PCI: 00:16.0 init ...
1501 14:49:43.637885 PCI: 00:16.0 init finished in 2245 usecs
1502 14:49:43.641251 PCI: 00:19.0 init ...
1503 14:49:43.644419 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 14:49:43.647937 PCI: 00:19.0 init finished in 5981 usecs
1505 14:49:43.651439 PCI: 00:1d.0 init ...
1506 14:49:43.654479 Initializing PCH PCIe bridge.
1507 14:49:43.657738 PCI: 00:1d.0 init finished in 5286 usecs
1508 14:49:43.661148 PCI: 00:1f.0 init ...
1509 14:49:43.664757 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 14:49:43.670712 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 14:49:43.671285 IOAPIC: ID = 0x02
1512 14:49:43.674131 IOAPIC: Dumping registers
1513 14:49:43.677514 reg 0x0000: 0x02000000
1514 14:49:43.680555 reg 0x0001: 0x00770020
1515 14:49:43.681039 reg 0x0002: 0x00000000
1516 14:49:43.687599 PCI: 00:1f.0 init finished in 23536 usecs
1517 14:49:43.690696 PCI: 00:1f.4 init ...
1518 14:49:43.693874 PCI: 00:1f.4 init finished in 2264 usecs
1519 14:49:43.704693 PCI: 01:00.0 init ...
1520 14:49:43.707936 PCI: 01:00.0 init finished in 2244 usecs
1521 14:49:43.712279 PNP: 0c09.0 init ...
1522 14:49:43.715438 Google Chrome EC uptime: 11.078 seconds
1523 14:49:43.722503 Google Chrome AP resets since EC boot: 0
1524 14:49:43.725263 Google Chrome most recent AP reset causes:
1525 14:49:43.732040 Google Chrome EC reset flags at last EC boot: reset-pin
1526 14:49:43.735389 PNP: 0c09.0 init finished in 20580 usecs
1527 14:49:43.739068 Devices initialized
1528 14:49:43.739645 Show all devs... After init.
1529 14:49:43.742185 Root Device: enabled 1
1530 14:49:43.745587 CPU_CLUSTER: 0: enabled 1
1531 14:49:43.748856 DOMAIN: 0000: enabled 1
1532 14:49:43.749441 APIC: 00: enabled 1
1533 14:49:43.752466 PCI: 00:00.0: enabled 1
1534 14:49:43.755003 PCI: 00:02.0: enabled 1
1535 14:49:43.759066 PCI: 00:04.0: enabled 0
1536 14:49:43.759653 PCI: 00:05.0: enabled 0
1537 14:49:43.762151 PCI: 00:12.0: enabled 1
1538 14:49:43.765272 PCI: 00:12.5: enabled 0
1539 14:49:43.765854 PCI: 00:12.6: enabled 0
1540 14:49:43.768419 PCI: 00:14.0: enabled 1
1541 14:49:43.771468 PCI: 00:14.1: enabled 0
1542 14:49:43.774836 PCI: 00:14.3: enabled 1
1543 14:49:43.775411 PCI: 00:14.5: enabled 0
1544 14:49:43.778806 PCI: 00:15.0: enabled 1
1545 14:49:43.781886 PCI: 00:15.1: enabled 1
1546 14:49:43.785220 PCI: 00:15.2: enabled 0
1547 14:49:43.785801 PCI: 00:15.3: enabled 0
1548 14:49:43.788262 PCI: 00:16.0: enabled 1
1549 14:49:43.791603 PCI: 00:16.1: enabled 0
1550 14:49:43.794836 PCI: 00:16.2: enabled 0
1551 14:49:43.795397 PCI: 00:16.3: enabled 0
1552 14:49:43.798128 PCI: 00:16.4: enabled 0
1553 14:49:43.801400 PCI: 00:16.5: enabled 0
1554 14:49:43.804929 PCI: 00:17.0: enabled 1
1555 14:49:43.805418 PCI: 00:19.0: enabled 1
1556 14:49:43.808732 PCI: 00:19.1: enabled 0
1557 14:49:43.811522 PCI: 00:19.2: enabled 0
1558 14:49:43.812235 PCI: 00:1a.0: enabled 0
1559 14:49:43.814642 PCI: 00:1c.0: enabled 0
1560 14:49:43.818789 PCI: 00:1c.1: enabled 0
1561 14:49:43.821662 PCI: 00:1c.2: enabled 0
1562 14:49:43.822153 PCI: 00:1c.3: enabled 0
1563 14:49:43.824851 PCI: 00:1c.4: enabled 0
1564 14:49:43.828319 PCI: 00:1c.5: enabled 0
1565 14:49:43.831371 PCI: 00:1c.6: enabled 0
1566 14:49:43.832008 PCI: 00:1c.7: enabled 0
1567 14:49:43.835275 PCI: 00:1d.0: enabled 1
1568 14:49:43.838250 PCI: 00:1d.1: enabled 0
1569 14:49:43.841294 PCI: 00:1d.2: enabled 0
1570 14:49:43.841878 PCI: 00:1d.3: enabled 0
1571 14:49:43.844713 PCI: 00:1d.4: enabled 0
1572 14:49:43.847772 PCI: 00:1d.5: enabled 0
1573 14:49:43.851267 PCI: 00:1e.0: enabled 1
1574 14:49:43.851885 PCI: 00:1e.1: enabled 0
1575 14:49:43.854644 PCI: 00:1e.2: enabled 1
1576 14:49:43.858060 PCI: 00:1e.3: enabled 1
1577 14:49:43.858642 PCI: 00:1f.0: enabled 1
1578 14:49:43.861424 PCI: 00:1f.1: enabled 0
1579 14:49:43.864450 PCI: 00:1f.2: enabled 0
1580 14:49:43.867668 PCI: 00:1f.3: enabled 1
1581 14:49:43.868281 PCI: 00:1f.4: enabled 1
1582 14:49:43.871272 PCI: 00:1f.5: enabled 1
1583 14:49:43.874112 PCI: 00:1f.6: enabled 0
1584 14:49:43.877430 USB0 port 0: enabled 1
1585 14:49:43.877920 I2C: 01:15: enabled 1
1586 14:49:43.880676 I2C: 02:5d: enabled 1
1587 14:49:43.884360 GENERIC: 0.0: enabled 1
1588 14:49:43.884848 I2C: 03:1a: enabled 1
1589 14:49:43.887435 I2C: 03:38: enabled 1
1590 14:49:43.890892 I2C: 03:39: enabled 1
1591 14:49:43.891477 I2C: 03:3a: enabled 1
1592 14:49:43.894183 I2C: 03:3b: enabled 1
1593 14:49:43.897161 PCI: 00:00.0: enabled 1
1594 14:49:43.897685 SPI: 00: enabled 1
1595 14:49:43.900530 SPI: 01: enabled 1
1596 14:49:43.904047 PNP: 0c09.0: enabled 1
1597 14:49:43.904629 USB2 port 0: enabled 1
1598 14:49:43.907387 USB2 port 1: enabled 1
1599 14:49:43.910726 USB2 port 2: enabled 0
1600 14:49:43.911307 USB2 port 3: enabled 0
1601 14:49:43.914071 USB2 port 5: enabled 0
1602 14:49:43.917879 USB2 port 6: enabled 1
1603 14:49:43.920467 USB2 port 9: enabled 1
1604 14:49:43.920955 USB3 port 0: enabled 1
1605 14:49:43.924072 USB3 port 1: enabled 1
1606 14:49:43.927394 USB3 port 2: enabled 1
1607 14:49:43.928020 USB3 port 3: enabled 1
1608 14:49:43.930615 USB3 port 4: enabled 0
1609 14:49:43.934136 APIC: 04: enabled 1
1610 14:49:43.934718 APIC: 01: enabled 1
1611 14:49:43.937002 APIC: 03: enabled 1
1612 14:49:43.940204 APIC: 05: enabled 1
1613 14:49:43.940692 APIC: 02: enabled 1
1614 14:49:43.944245 APIC: 06: enabled 1
1615 14:49:43.944857 APIC: 07: enabled 1
1616 14:49:43.946991 PCI: 00:08.0: enabled 1
1617 14:49:43.950622 PCI: 00:14.2: enabled 1
1618 14:49:43.953576 PCI: 01:00.0: enabled 1
1619 14:49:43.957303 Disabling ACPI via APMC:
1620 14:49:43.960623 done.
1621 14:49:43.963985 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 14:49:43.967248 ELOG: NV offset 0xaf0000 size 0x4000
1623 14:49:43.974217 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 14:49:43.980374 ELOG: Event(17) added with size 13 at 2022-09-18 14:49:24 UTC
1625 14:49:43.987730 ELOG: Event(92) added with size 9 at 2022-09-18 14:49:24 UTC
1626 14:49:43.993868 ELOG: Event(93) added with size 9 at 2022-09-18 14:49:24 UTC
1627 14:49:44.000468 ELOG: Event(9A) added with size 9 at 2022-09-18 14:49:24 UTC
1628 14:49:44.007269 ELOG: Event(9E) added with size 10 at 2022-09-18 14:49:25 UTC
1629 14:49:44.013587 ELOG: Event(9F) added with size 14 at 2022-09-18 14:49:25 UTC
1630 14:49:44.016793 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1631 14:49:44.024226 ELOG: Event(A1) added with size 10 at 2022-09-18 14:49:25 UTC
1632 14:49:44.034082 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1633 14:49:44.041410 ELOG: Event(A0) added with size 9 at 2022-09-18 14:49:25 UTC
1634 14:49:44.043979 elog_add_boot_reason: Logged dev mode boot
1635 14:49:44.047998 Finalize devices...
1636 14:49:44.048580 PCI: 00:17.0 final
1637 14:49:44.050846 Devices finalized
1638 14:49:44.054042 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1639 14:49:44.060737 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1640 14:49:44.064372 ME: HFSTS1 : 0x90000245
1641 14:49:44.067270 ME: HFSTS2 : 0x3B850126
1642 14:49:44.073933 ME: HFSTS3 : 0x00000020
1643 14:49:44.077155 ME: HFSTS4 : 0x00004800
1644 14:49:44.080383 ME: HFSTS5 : 0x00000000
1645 14:49:44.084241 ME: HFSTS6 : 0x40400006
1646 14:49:44.087099 ME: Manufacturing Mode : NO
1647 14:49:44.090669 ME: FW Partition Table : OK
1648 14:49:44.093459 ME: Bringup Loader Failure : NO
1649 14:49:44.096694 ME: Firmware Init Complete : YES
1650 14:49:44.100490 ME: Boot Options Present : NO
1651 14:49:44.103646 ME: Update In Progress : NO
1652 14:49:44.106673 ME: D0i3 Support : YES
1653 14:49:44.110292 ME: Low Power State Enabled : NO
1654 14:49:44.113557 ME: CPU Replaced : NO
1655 14:49:44.116781 ME: CPU Replacement Valid : YES
1656 14:49:44.120291 ME: Current Working State : 5
1657 14:49:44.123504 ME: Current Operation State : 1
1658 14:49:44.126851 ME: Current Operation Mode : 0
1659 14:49:44.130007 ME: Error Code : 0
1660 14:49:44.133218 ME: CPU Debug Disabled : YES
1661 14:49:44.136543 ME: TXT Support : NO
1662 14:49:44.143232 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1663 14:49:44.149848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1664 14:49:44.150431 CBFS @ c08000 size 3f8000
1665 14:49:44.156770 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1666 14:49:44.159676 CBFS: Locating 'fallback/dsdt.aml'
1667 14:49:44.166505 CBFS: Found @ offset 10bb80 size 3fa5
1668 14:49:44.169671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 14:49:44.173353 CBFS @ c08000 size 3f8000
1670 14:49:44.179406 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1671 14:49:44.182710 CBFS: Locating 'fallback/slic'
1672 14:49:44.186086 CBFS: 'fallback/slic' not found.
1673 14:49:44.189225 ACPI: Writing ACPI tables at 99b3e000.
1674 14:49:44.192998 ACPI: * FACS
1675 14:49:44.193488 ACPI: * DSDT
1676 14:49:44.195675 Ramoops buffer: 0x100000@0x99a3d000.
1677 14:49:44.202975 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1678 14:49:44.206102 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1679 14:49:44.209323 Google Chrome EC: version:
1680 14:49:44.212722 ro: helios_v2.0.2659-56403530b
1681 14:49:44.216044 rw: helios_v2.0.2849-c41de27e7d
1682 14:49:44.219571 running image: 1
1683 14:49:44.222452 ACPI: * FADT
1684 14:49:44.222941 SCI is IRQ9
1685 14:49:44.225929 ACPI: added table 1/32, length now 40
1686 14:49:44.228890 ACPI: * SSDT
1687 14:49:44.232531 Found 1 CPU(s) with 8 core(s) each.
1688 14:49:44.236288 Error: Could not locate 'wifi_sar' in VPD.
1689 14:49:44.239348 Checking CBFS for default SAR values
1690 14:49:44.245785 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1691 14:49:44.249446 CBFS @ c08000 size 3f8000
1692 14:49:44.255865 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1693 14:49:44.259021 CBFS: Locating 'wifi_sar_defaults.hex'
1694 14:49:44.262265 CBFS: Found @ offset 5fac0 size 77
1695 14:49:44.265705 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1696 14:49:44.269655 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1697 14:49:44.275578 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1698 14:49:44.281957 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1699 14:49:44.285723 failed to find key in VPD: dsm_calib_r0_0
1700 14:49:44.295794 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1701 14:49:44.298247 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1702 14:49:44.302272 failed to find key in VPD: dsm_calib_r0_1
1703 14:49:44.312040 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1704 14:49:44.318360 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1705 14:49:44.322407 failed to find key in VPD: dsm_calib_r0_2
1706 14:49:44.331505 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1707 14:49:44.335455 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1708 14:49:44.341696 failed to find key in VPD: dsm_calib_r0_3
1709 14:49:44.348321 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1710 14:49:44.355006 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1711 14:49:44.358369 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1712 14:49:44.361228 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1713 14:49:44.365525 EC returned error result code 1
1714 14:49:44.369188 EC returned error result code 1
1715 14:49:44.373207 EC returned error result code 1
1716 14:49:44.379308 PS2K: Bad resp from EC. Vivaldi disabled!
1717 14:49:44.382389 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1718 14:49:44.389689 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1719 14:49:44.395921 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1720 14:49:44.399541 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1721 14:49:44.405680 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1722 14:49:44.412585 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1723 14:49:44.418993 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1724 14:49:44.422308 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1725 14:49:44.429180 ACPI: added table 2/32, length now 44
1726 14:49:44.429754 ACPI: * MCFG
1727 14:49:44.432371 ACPI: added table 3/32, length now 48
1728 14:49:44.436091 ACPI: * TPM2
1729 14:49:44.439063 TPM2 log created at 99a2d000
1730 14:49:44.442292 ACPI: added table 4/32, length now 52
1731 14:49:44.442872 ACPI: * MADT
1732 14:49:44.445533 SCI is IRQ9
1733 14:49:44.449318 ACPI: added table 5/32, length now 56
1734 14:49:44.449896 current = 99b43ac0
1735 14:49:44.452490 ACPI: * DMAR
1736 14:49:44.455582 ACPI: added table 6/32, length now 60
1737 14:49:44.458729 ACPI: * IGD OpRegion
1738 14:49:44.459306 GMA: Found VBT in CBFS
1739 14:49:44.462143 GMA: Found valid VBT in CBFS
1740 14:49:44.465593 ACPI: added table 7/32, length now 64
1741 14:49:44.468668 ACPI: * HPET
1742 14:49:44.472251 ACPI: added table 8/32, length now 68
1743 14:49:44.472835 ACPI: done.
1744 14:49:44.475827 ACPI tables: 31744 bytes.
1745 14:49:44.479437 smbios_write_tables: 99a2c000
1746 14:49:44.482685 EC returned error result code 3
1747 14:49:44.486693 Couldn't obtain OEM name from CBI
1748 14:49:44.488752 Create SMBIOS type 17
1749 14:49:44.492162 PCI: 00:00.0 (Intel Cannonlake)
1750 14:49:44.495459 PCI: 00:14.3 (Intel WiFi)
1751 14:49:44.498838 SMBIOS tables: 939 bytes.
1752 14:49:44.502319 Writing table forward entry at 0x00000500
1753 14:49:44.508670 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1754 14:49:44.512799 Writing coreboot table at 0x99b62000
1755 14:49:44.518720 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1756 14:49:44.522065 1. 0000000000001000-000000000009ffff: RAM
1757 14:49:44.525677 2. 00000000000a0000-00000000000fffff: RESERVED
1758 14:49:44.532293 3. 0000000000100000-0000000099a2bfff: RAM
1759 14:49:44.535304 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1760 14:49:44.541972 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1761 14:49:44.548742 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1762 14:49:44.552365 7. 000000009a000000-000000009f7fffff: RESERVED
1763 14:49:44.558530 8. 00000000e0000000-00000000efffffff: RESERVED
1764 14:49:44.561928 9. 00000000fc000000-00000000fc000fff: RESERVED
1765 14:49:44.565446 10. 00000000fe000000-00000000fe00ffff: RESERVED
1766 14:49:44.571688 11. 00000000fed10000-00000000fed17fff: RESERVED
1767 14:49:44.575662 12. 00000000fed80000-00000000fed83fff: RESERVED
1768 14:49:44.581705 13. 00000000fed90000-00000000fed91fff: RESERVED
1769 14:49:44.584660 14. 00000000feda0000-00000000feda1fff: RESERVED
1770 14:49:44.591786 15. 0000000100000000-000000045e7fffff: RAM
1771 14:49:44.594756 Graphics framebuffer located at 0xc0000000
1772 14:49:44.598220 Passing 5 GPIOs to payload:
1773 14:49:44.601355 NAME | PORT | POLARITY | VALUE
1774 14:49:44.608270 write protect | undefined | high | low
1775 14:49:44.611315 lid | undefined | high | high
1776 14:49:44.618032 power | undefined | high | low
1777 14:49:44.624474 oprom | undefined | high | low
1778 14:49:44.628624 EC in RW | 0x000000cb | high | low
1779 14:49:44.631482 Board ID: 4
1780 14:49:44.634735 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1781 14:49:44.638456 CBFS @ c08000 size 3f8000
1782 14:49:44.644759 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1783 14:49:44.648693 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1784 14:49:44.651623 coreboot table: 1492 bytes.
1785 14:49:44.654666 IMD ROOT 0. 99fff000 00001000
1786 14:49:44.657914 IMD SMALL 1. 99ffe000 00001000
1787 14:49:44.661361 FSP MEMORY 2. 99c4e000 003b0000
1788 14:49:44.664524 CONSOLE 3. 99c2e000 00020000
1789 14:49:44.668228 FMAP 4. 99c2d000 0000054e
1790 14:49:44.671237 TIME STAMP 5. 99c2c000 00000910
1791 14:49:44.674503 VBOOT WORK 6. 99c18000 00014000
1792 14:49:44.678020 MRC DATA 7. 99c16000 00001958
1793 14:49:44.680847 ROMSTG STCK 8. 99c15000 00001000
1794 14:49:44.684698 AFTER CAR 9. 99c0b000 0000a000
1795 14:49:44.687905 RAMSTAGE 10. 99baf000 0005c000
1796 14:49:44.691134 REFCODE 11. 99b7a000 00035000
1797 14:49:44.694328 SMM BACKUP 12. 99b6a000 00010000
1798 14:49:44.697598 COREBOOT 13. 99b62000 00008000
1799 14:49:44.700867 ACPI 14. 99b3e000 00024000
1800 14:49:44.704510 ACPI GNVS 15. 99b3d000 00001000
1801 14:49:44.708211 RAMOOPS 16. 99a3d000 00100000
1802 14:49:44.711191 TPM2 TCGLOG17. 99a2d000 00010000
1803 14:49:44.714170 SMBIOS 18. 99a2c000 00000800
1804 14:49:44.717857 IMD small region:
1805 14:49:44.721204 IMD ROOT 0. 99ffec00 00000400
1806 14:49:44.724202 FSP RUNTIME 1. 99ffebe0 00000004
1807 14:49:44.727804 EC HOSTEVENT 2. 99ffebc0 00000008
1808 14:49:44.731150 POWER STATE 3. 99ffeb80 00000040
1809 14:49:44.734862 ROMSTAGE 4. 99ffeb60 00000004
1810 14:49:44.738040 MEM INFO 5. 99ffe9a0 000001b9
1811 14:49:44.741160 VPD 6. 99ffe920 0000006c
1812 14:49:44.744056 MTRR: Physical address space:
1813 14:49:44.751208 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1814 14:49:44.757656 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1815 14:49:44.764174 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1816 14:49:44.771259 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1817 14:49:44.777292 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1818 14:49:44.783984 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1819 14:49:44.787253 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1820 14:49:44.793849 MTRR: Fixed MSR 0x250 0x0606060606060606
1821 14:49:44.796876 MTRR: Fixed MSR 0x258 0x0606060606060606
1822 14:49:44.800255 MTRR: Fixed MSR 0x259 0x0000000000000000
1823 14:49:44.803715 MTRR: Fixed MSR 0x268 0x0606060606060606
1824 14:49:44.810713 MTRR: Fixed MSR 0x269 0x0606060606060606
1825 14:49:44.813736 MTRR: Fixed MSR 0x26a 0x0606060606060606
1826 14:49:44.816946 MTRR: Fixed MSR 0x26b 0x0606060606060606
1827 14:49:44.819992 MTRR: Fixed MSR 0x26c 0x0606060606060606
1828 14:49:44.827059 MTRR: Fixed MSR 0x26d 0x0606060606060606
1829 14:49:44.830649 MTRR: Fixed MSR 0x26e 0x0606060606060606
1830 14:49:44.833311 MTRR: Fixed MSR 0x26f 0x0606060606060606
1831 14:49:44.837273 call enable_fixed_mtrr()
1832 14:49:44.840595 CPU physical address size: 39 bits
1833 14:49:44.843901 MTRR: default type WB/UC MTRR counts: 6/8.
1834 14:49:44.850024 MTRR: WB selected as default type.
1835 14:49:44.853893 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1836 14:49:44.860060 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1837 14:49:44.866712 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1838 14:49:44.873403 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1839 14:49:44.880000 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1840 14:49:44.886599 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1841 14:49:44.889569 MTRR: Fixed MSR 0x250 0x0606060606060606
1842 14:49:44.896451 MTRR: Fixed MSR 0x258 0x0606060606060606
1843 14:49:44.899364 MTRR: Fixed MSR 0x259 0x0000000000000000
1844 14:49:44.902990 MTRR: Fixed MSR 0x268 0x0606060606060606
1845 14:49:44.906165 MTRR: Fixed MSR 0x269 0x0606060606060606
1846 14:49:44.912942 MTRR: Fixed MSR 0x26a 0x0606060606060606
1847 14:49:44.916358 MTRR: Fixed MSR 0x26b 0x0606060606060606
1848 14:49:44.919767 MTRR: Fixed MSR 0x26c 0x0606060606060606
1849 14:49:44.923076 MTRR: Fixed MSR 0x26d 0x0606060606060606
1850 14:49:44.925959 MTRR: Fixed MSR 0x26e 0x0606060606060606
1851 14:49:44.932505 MTRR: Fixed MSR 0x26f 0x0606060606060606
1852 14:49:44.933114
1853 14:49:44.933509 MTRR check
1854 14:49:44.935919 Fixed MTRRs : Enabled
1855 14:49:44.939588 Variable MTRRs: Enabled
1856 14:49:44.940216
1857 14:49:44.942744 call enable_fixed_mtrr()
1858 14:49:44.946201 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1859 14:49:44.949391 CPU physical address size: 39 bits
1860 14:49:44.955817 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1861 14:49:44.959217 CBFS @ c08000 size 3f8000
1862 14:49:44.962251 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1863 14:49:44.965816 CBFS: Locating 'fallback/payload'
1864 14:49:44.972327 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 14:49:44.975643 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 14:49:44.978855 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 14:49:44.982092 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 14:49:44.988855 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 14:49:44.992384 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 14:49:44.995539 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 14:49:44.998817 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 14:49:45.005281 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 14:49:45.008775 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 14:49:45.012235 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 14:49:45.015453 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 14:49:45.021720 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 14:49:45.022215 call enable_fixed_mtrr()
1878 14:49:45.028558 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 14:49:45.032074 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 14:49:45.035253 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 14:49:45.038658 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 14:49:45.045225 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 14:49:45.049349 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 14:49:45.052382 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 14:49:45.055312 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 14:49:45.058620 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 14:49:45.064954 CPU physical address size: 39 bits
1888 14:49:45.068312 call enable_fixed_mtrr()
1889 14:49:45.071928 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 14:49:45.075322 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 14:49:45.078259 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 14:49:45.081304 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 14:49:45.088001 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 14:49:45.091447 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 14:49:45.094402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 14:49:45.097933 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 14:49:45.104395 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 14:49:45.108066 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 14:49:45.111306 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 14:49:45.114340 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 14:49:45.121121 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 14:49:45.124387 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 14:49:45.127962 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 14:49:45.131245 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 14:49:45.137792 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 14:49:45.140684 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 14:49:45.144390 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 14:49:45.147587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 14:49:45.154540 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 14:49:45.157844 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 14:49:45.161794 call enable_fixed_mtrr()
1912 14:49:45.162393 call enable_fixed_mtrr()
1913 14:49:45.167534 CPU physical address size: 39 bits
1914 14:49:45.170831 CPU physical address size: 39 bits
1915 14:49:45.173965 CBFS: Found @ offset 1c96c0 size 3f798
1916 14:49:45.177667 CPU physical address size: 39 bits
1917 14:49:45.180591 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 14:49:45.183494 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:49:45.191588 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 14:49:45.193797 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 14:49:45.196931 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 14:49:45.200638 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 14:49:45.207154 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 14:49:45.210227 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 14:49:45.213629 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 14:49:45.216955 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 14:49:45.223470 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 14:49:45.226782 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 14:49:45.230129 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 14:49:45.233127 call enable_fixed_mtrr()
1931 14:49:45.236720 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 14:49:45.240026 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 14:49:45.246661 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 14:49:45.250010 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 14:49:45.253151 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 14:49:45.256659 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 14:49:45.263007 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 14:49:45.266619 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 14:49:45.269949 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 14:49:45.273495 CPU physical address size: 39 bits
1941 14:49:45.276807 call enable_fixed_mtrr()
1942 14:49:45.280125 Checking segment from ROM address 0xffdd16f8
1943 14:49:45.283501 CPU physical address size: 39 bits
1944 14:49:45.289491 Checking segment from ROM address 0xffdd1714
1945 14:49:45.292981 Loading segment from ROM address 0xffdd16f8
1946 14:49:45.296595 code (compression=0)
1947 14:49:45.302666 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1948 14:49:45.312657 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1949 14:49:45.315997 it's not compressed!
1950 14:49:45.407271 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1951 14:49:45.413851 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1952 14:49:45.417613 Loading segment from ROM address 0xffdd1714
1953 14:49:45.419877 Entry Point 0x30000000
1954 14:49:45.423095 Loaded segments
1955 14:49:45.429200 Finalizing chipset.
1956 14:49:45.432660 Finalizing SMM.
1957 14:49:45.435545 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1958 14:49:45.439665 mp_park_aps done after 0 msecs.
1959 14:49:45.446049 Jumping to boot code at 30000000(99b62000)
1960 14:49:45.452319 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1961 14:49:45.452907
1962 14:49:45.455749 Starting depthcharge on Helios...
1963 14:49:45.457130 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1964 14:49:45.457718 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1965 14:49:45.458188 Setting prompt string to ['hatch:']
1966 14:49:45.458634 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1967 14:49:45.465605 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1968 14:49:45.472195 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1969 14:49:45.478946 board_setup: Info: eMMC controller not present; skipping
1970 14:49:45.482175 New NVMe Controller 0x30053ac0 @ 00:1d:00
1971 14:49:45.488768 board_setup: Info: SDHCI controller not present; skipping
1972 14:49:45.495107 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1973 14:49:45.495692 Wipe memory regions:
1974 14:49:45.498412 [0x00000000001000, 0x000000000a0000)
1975 14:49:45.505057 [0x00000000100000, 0x00000030000000)
1976 14:49:45.571425 [0x00000030657430, 0x00000099a2c000)
1977 14:49:45.711494 [0x00000100000000, 0x0000045e800000)
1978 14:49:47.093596 R8152: Initializing
1979 14:49:47.096947 Version 9 (ocp_data = 6010)
1980 14:49:47.101935 R8152: Done initializing
1981 14:49:47.105065 Adding net device
1982 14:49:47.601761 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1983 14:49:47.602335
1984 14:49:47.603105 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
1986 14:49:47.705087 hatch: tftpboot 192.168.201.1 7305248/tftp-deploy-8hwn99cj/kernel/bzImage 7305248/tftp-deploy-8hwn99cj/kernel/cmdline 7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
1987 14:49:47.705793 Setting prompt string to 'Starting kernel'
1988 14:49:47.706234 Setting prompt string to ['Starting kernel']
1989 14:49:47.706615 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
1990 14:49:47.707007 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:39)
1991 14:49:47.711384 tftpboot 192.168.201.1 7305248/tftp-deploy-8hwn99cj/kernel/bzImay-8hwn99cj/kernel/cmdline 7305248/tftp-deploy-8hwn99cj/ramdisk/ramdisk.cpio.gz
1992 14:49:47.712019 Waiting for link
1993 14:49:47.911960 done.
1994 14:49:47.912542 MAC: f4:f5:e8:50:dc:f7
1995 14:49:47.915464 Sending DHCP discover... done.
1996 14:49:47.919021 Waiting for reply... done.
1997 14:49:47.921725 Sending DHCP request... done.
1998 14:49:47.925465 Waiting for reply... done.
1999 14:49:47.928468 My ip is 192.168.201.20
2000 14:49:47.931680 The DHCP server ip is 192.168.201.1
2001 14:49:47.934870 TFTP server IP predefined by user: 192.168.201.1
2002 14:49:47.941945 Bootfile predefined by user: 7305248/tftp-deploy-8hwn99cj/kernel/bzImage
2003 14:49:47.945541 Sending tftp read request... done.
2004 14:49:47.952583 Waiting for the transfer...
2005 14:49:48.248800 00000000 ################################################################
2006 14:49:48.527280 00080000 ################################################################
2007 14:49:48.811486 00100000 ################################################################
2008 14:49:49.101048 00180000 ################################################################
2009 14:49:49.443824 00200000 ################################################################
2010 14:49:49.749332 00280000 ################################################################
2011 14:49:50.091364 00300000 ################################################################
2012 14:49:50.511715 00380000 ################################################################
2013 14:49:50.823171 00400000 ################################################################
2014 14:49:51.098383 00480000 ################################################################
2015 14:49:51.386334 00500000 ################################################################
2016 14:49:51.709008 00580000 ################################################################
2017 14:49:52.002355 00600000 ################################################################ done.
2018 14:49:52.005708 The bootfile was 6815632 bytes long.
2019 14:49:52.009015 Sending tftp read request... done.
2020 14:49:52.012455 Waiting for the transfer...
2021 14:49:52.304154 00000000 ################################################################
2022 14:49:52.595139 00080000 ################################################################
2023 14:49:52.884327 00100000 ################################################################
2024 14:49:53.179734 00180000 ################################################################
2025 14:49:53.471748 00200000 ################################################################
2026 14:49:53.730577 00280000 ################################################################
2027 14:49:54.001828 00300000 ################################################################
2028 14:49:54.291587 00380000 ################################################################
2029 14:49:54.588518 00400000 ################################################################
2030 14:49:54.880952 00480000 ################################################################
2031 14:49:55.160132 00500000 ################################################################
2032 14:49:55.458641 00580000 ################################################################
2033 14:49:55.745962 00600000 ################################################################
2034 14:49:56.034036 00680000 ################################################################
2035 14:49:56.331232 00700000 ################################################################
2036 14:49:56.627338 00780000 ################################################################
2037 14:49:56.719003 00800000 #################### done.
2038 14:49:56.722338 Sending tftp read request... done.
2039 14:49:56.726073 Waiting for the transfer...
2040 14:49:56.726248 00000000 # done.
2041 14:49:56.735531 Command line loaded dynamically from TFTP file: 7305248/tftp-deploy-8hwn99cj/kernel/cmdline
2042 14:49:56.752307 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2043 14:49:56.758827 ec_init(0): CrosEC protocol v3 supported (256, 256)
2044 14:49:56.766575 Shutting down all USB controllers.
2045 14:49:56.766901 Removing current net device
2046 14:49:56.769964 Finalizing coreboot
2047 14:49:56.777174 Exiting depthcharge with code 4 at timestamp: 18604369
2048 14:49:56.777655
2049 14:49:56.777966 Starting kernel ...
2050 14:49:56.778250
2051 14:49:56.778526
2052 14:49:56.779265 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2053 14:49:56.779691 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2054 14:49:56.780111 Setting prompt string to ['Linux version [0-9]']
2055 14:49:56.780467 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2056 14:49:56.780867 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2058 14:54:26.780793 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2060 14:54:26.782013 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2062 14:54:26.782880 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2065 14:54:26.784535 end: 2 depthcharge-action (duration 00:05:00) [common]
2067 14:54:26.785069 Cleaning after the job
2068 14:54:26.785152 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/ramdisk
2069 14:54:26.785813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/kernel
2070 14:54:26.786308 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305248/tftp-deploy-8hwn99cj/modules
2071 14:54:26.786496 start: 5.1 power-off (timeout 00:00:30) [common]
2072 14:54:26.786648 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2073 14:54:26.805447 >> Command sent successfully.
2074 14:54:26.807176 Returned 0 in 0 seconds
2075 14:54:26.908370 end: 5.1 power-off (duration 00:00:00) [common]
2077 14:54:26.909966 start: 5.2 read-feedback (timeout 00:10:00) [common]
2078 14:54:26.911138 Listened to connection for namespace 'common' for up to 1s
2079 14:54:27.301197 Listened to connection for namespace 'common' for up to 1s
2080 14:54:27.303824 Listened to connection for namespace 'common' for up to 1s
2081 14:54:27.307881 Listened to connection for namespace 'common' for up to 1s
2082 14:54:27.310675 Listened to connection for namespace 'common' for up to 1s
2083 14:54:27.314103 Listened to connection for namespace 'common' for up to 1s
2084 14:54:27.317754 Listened to connection for namespace 'common' for up to 1s
2085 14:54:27.320976 Listened to connection for namespace 'common' for up to 1s
2086 14:54:27.324479 Listened to connection for namespace 'common' for up to 1s
2087 14:54:27.328177 Listened to connection for namespace 'common' for up to 1s
2088 14:54:27.331096 Listened to connection for namespace 'common' for up to 1s
2089 14:54:27.335226 Listened to connection for namespace 'common' for up to 1s
2090 14:54:27.339680 Listened to connection for namespace 'common' for up to 1s
2091 14:54:27.912115 Finalising connection for namespace 'common'
2092 14:54:27.912842 Disconnecting from shell: Finalise
2093 14:54:27.913288
2094 14:54:28.014759 end: 5.2 read-feedback (duration 00:00:01) [common]
2095 14:54:28.015373 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7305248
2096 14:54:28.024142 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7305248
2097 14:54:28.024259 JobError: Your job cannot terminate cleanly.