Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 14:44:08.328991 lava-dispatcher, installed at version: 2022.06
2 14:44:08.329192 start: 0 validate
3 14:44:08.329327 Start time: 2022-09-18 14:44:08.329320+00:00 (UTC)
4 14:44:08.329463 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:44:08.329588 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
6 14:44:08.337821 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:44:08.338000 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:44:08.352314 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:44:08.352541 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:44:08.365890 validate duration: 0.04
12 14:44:08.366186 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:44:08.366295 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:44:08.366412 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:44:08.366514 Not decompressing ramdisk as can be used compressed.
16 14:44:08.366601 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
17 14:44:08.366682 saving as /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/ramdisk/rootfs.cpio.gz
18 14:44:08.366744 total size: 8415960 (8MB)
19 14:44:08.403489 progress 0% (0MB)
20 14:44:08.471493 progress 5% (0MB)
21 14:44:08.541480 progress 10% (0MB)
22 14:44:08.613651 progress 15% (1MB)
23 14:44:08.667132 progress 20% (1MB)
24 14:44:08.744912 progress 25% (2MB)
25 14:44:08.818236 progress 30% (2MB)
26 14:44:08.874522 progress 35% (2MB)
27 14:44:08.931599 progress 40% (3MB)
28 14:44:08.999946 progress 45% (3MB)
29 14:44:09.075654 progress 50% (4MB)
30 14:44:09.150224 progress 55% (4MB)
31 14:44:09.219667 progress 60% (4MB)
32 14:44:09.272315 progress 65% (5MB)
33 14:44:09.342986 progress 70% (5MB)
34 14:44:09.406507 progress 75% (6MB)
35 14:44:09.478843 progress 80% (6MB)
36 14:44:09.541674 progress 85% (6MB)
37 14:44:09.626308 progress 90% (7MB)
38 14:44:09.681152 progress 95% (7MB)
39 14:44:09.753316 progress 100% (8MB)
40 14:44:09.753656 8MB downloaded in 1.39s (5.79MB/s)
41 14:44:09.753830 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:44:09.754098 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:44:09.754189 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:44:09.754282 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:44:09.754393 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:44:09.754465 saving as /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/kernel/bzImage
48 14:44:09.754529 total size: 6815632 (6MB)
49 14:44:09.754599 No compression specified
50 14:44:09.772389 progress 0% (0MB)
51 14:44:09.800873 progress 5% (0MB)
52 14:44:09.826298 progress 10% (0MB)
53 14:44:09.855213 progress 15% (1MB)
54 14:44:09.874698 progress 20% (1MB)
55 14:44:09.894242 progress 25% (1MB)
56 14:44:09.919116 progress 30% (1MB)
57 14:44:09.943709 progress 35% (2MB)
58 14:44:09.970479 progress 40% (2MB)
59 14:44:09.992359 progress 45% (2MB)
60 14:44:10.013509 progress 50% (3MB)
61 14:44:10.040578 progress 55% (3MB)
62 14:44:10.064573 progress 60% (3MB)
63 14:44:10.087678 progress 65% (4MB)
64 14:44:10.111283 progress 70% (4MB)
65 14:44:10.133783 progress 75% (4MB)
66 14:44:10.156792 progress 80% (5MB)
67 14:44:10.179012 progress 85% (5MB)
68 14:44:10.204476 progress 90% (5MB)
69 14:44:10.226417 progress 95% (6MB)
70 14:44:10.248074 progress 100% (6MB)
71 14:44:10.248417 6MB downloaded in 0.49s (13.16MB/s)
72 14:44:10.248578 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:44:10.248836 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:44:10.248927 start: 1.3 download-retry (timeout 00:09:58) [common]
76 14:44:10.249016 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 14:44:10.249134 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:44:10.249205 saving as /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/modules/modules.tar
79 14:44:10.249267 total size: 51904 (0MB)
80 14:44:10.249341 Using unxz to decompress xz
81 14:44:10.268380 progress 63% (0MB)
82 14:44:10.268854 progress 100% (0MB)
83 14:44:10.272396 0MB downloaded in 0.02s (2.14MB/s)
84 14:44:10.272634 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:44:10.272911 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:44:10.273007 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 14:44:10.273124 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 14:44:10.273221 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:44:10.273315 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 14:44:10.273497 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06
92 14:44:10.273609 makedir: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin
93 14:44:10.273695 makedir: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/tests
94 14:44:10.273786 makedir: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/results
95 14:44:10.273896 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-add-keys
96 14:44:10.274029 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-add-sources
97 14:44:10.274156 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-background-process-start
98 14:44:10.274270 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-background-process-stop
99 14:44:10.274382 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-common-functions
100 14:44:10.274506 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-echo-ipv4
101 14:44:10.274621 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-install-packages
102 14:44:10.274734 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-installed-packages
103 14:44:10.274856 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-os-build
104 14:44:10.274965 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-probe-channel
105 14:44:10.275076 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-probe-ip
106 14:44:10.275200 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-target-ip
107 14:44:10.275340 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-target-mac
108 14:44:10.275487 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-target-storage
109 14:44:10.275631 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-case
110 14:44:10.275743 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-event
111 14:44:10.275858 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-feedback
112 14:44:10.275975 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-raise
113 14:44:10.276089 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-reference
114 14:44:10.276211 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-runner
115 14:44:10.276322 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-set
116 14:44:10.276430 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-test-shell
117 14:44:10.276563 Updating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-install-packages (oe)
118 14:44:10.276710 Updating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/bin/lava-installed-packages (oe)
119 14:44:10.276823 Creating /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/environment
120 14:44:10.276913 LAVA metadata
121 14:44:10.276993 - LAVA_JOB_ID=7305282
122 14:44:10.277063 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:44:10.277169 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 14:44:10.277260 skipped lava-vland-overlay
125 14:44:10.277343 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:44:10.277432 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 14:44:10.277508 skipped lava-multinode-overlay
128 14:44:10.277587 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:44:10.277673 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 14:44:10.277761 Loading test definitions
131 14:44:10.277865 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 14:44:10.277943 Using /lava-7305282 at stage 0
133 14:44:10.278232 uuid=7305282_1.4.2.3.1 testdef=None
134 14:44:10.278326 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:44:10.278414 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 14:44:10.278934 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:44:10.279183 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 14:44:10.279842 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:44:10.280093 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 14:44:10.280650 runner path: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/0/tests/0_dmesg test_uuid 7305282_1.4.2.3.1
143 14:44:10.280807 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:44:10.281135 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 14:44:10.281222 Using /lava-7305282 at stage 1
147 14:44:10.281466 uuid=7305282_1.4.2.3.5 testdef=None
148 14:44:10.281568 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:44:10.281658 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 14:44:10.282126 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:44:10.282357 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 14:44:10.282987 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:44:10.283228 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 14:44:10.283876 runner path: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/1/tests/1_bootrr test_uuid 7305282_1.4.2.3.5
157 14:44:10.284061 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:44:10.284283 Creating lava-test-runner.conf files
160 14:44:10.284349 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/0 for stage 0
161 14:44:10.284438 - 0_dmesg
162 14:44:10.284516 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305282/lava-overlay-_447od06/lava-7305282/1 for stage 1
163 14:44:10.284600 - 1_bootrr
164 14:44:10.284694 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:44:10.284789 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 14:44:10.291727 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:44:10.291841 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 14:44:10.291939 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:44:10.292035 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:44:10.292142 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 14:44:10.480543 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:44:10.480894 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 14:44:10.481010 extracting modules file /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305282/extract-overlay-ramdisk-x48t5kwr/ramdisk
174 14:44:10.485227 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:44:10.485341 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 14:44:10.485434 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305282/compress-overlay-u7tg0ypz/overlay-1.4.2.4.tar.gz to ramdisk
177 14:44:10.485513 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305282/compress-overlay-u7tg0ypz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7305282/extract-overlay-ramdisk-x48t5kwr/ramdisk
178 14:44:10.489356 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:44:10.489477 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 14:44:10.489576 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:44:10.489670 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 14:44:10.489753 Building ramdisk /var/lib/lava/dispatcher/tmp/7305282/extract-overlay-ramdisk-x48t5kwr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7305282/extract-overlay-ramdisk-x48t5kwr/ramdisk
183 14:44:10.556752 >> 48006 blocks
184 14:44:11.311777 rename /var/lib/lava/dispatcher/tmp/7305282/extract-overlay-ramdisk-x48t5kwr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
185 14:44:11.312203 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:44:11.312339 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 14:44:11.312447 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 14:44:11.312553 No mkimage arch provided, not using FIT.
189 14:44:11.312649 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:44:11.312745 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:44:11.312849 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:44:11.312948 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 14:44:11.313033 No LXC device requested
194 14:44:11.313124 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:44:11.313220 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 14:44:11.313310 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:44:11.313385 Checking files for TFTP limit of 4294967296 bytes.
198 14:44:11.313822 end: 1 tftp-deploy (duration 00:00:03) [common]
199 14:44:11.313927 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:44:11.314032 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:44:11.314166 substitutions:
202 14:44:11.314258 - {DTB}: None
203 14:44:11.314329 - {INITRD}: 7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
204 14:44:11.314406 - {KERNEL}: 7305282/tftp-deploy-1ckrx1w0/kernel/bzImage
205 14:44:11.314479 - {LAVA_MAC}: None
206 14:44:11.314541 - {PRESEED_CONFIG}: None
207 14:44:11.314614 - {PRESEED_LOCAL}: None
208 14:44:11.314682 - {RAMDISK}: 7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
209 14:44:11.314745 - {ROOT_PART}: None
210 14:44:11.314812 - {ROOT}: None
211 14:44:11.314878 - {SERVER_IP}: 192.168.201.1
212 14:44:11.314937 - {TEE}: None
213 14:44:11.315008 Parsed boot commands:
214 14:44:11.315075 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:44:11.315247 Parsed boot commands: tftpboot 192.168.201.1 7305282/tftp-deploy-1ckrx1w0/kernel/bzImage 7305282/tftp-deploy-1ckrx1w0/kernel/cmdline 7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
216 14:44:11.315348 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:44:11.315450 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:44:11.315610 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:44:11.315708 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:44:11.315797 Not connected, no need to disconnect.
221 14:44:11.315880 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:44:11.315974 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:44:11.316046 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
224 14:44:11.318741 Setting prompt string to ['lava-test: # ']
225 14:44:11.319048 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:44:11.319152 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:44:11.319263 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:44:11.319360 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:44:11.319583 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
230 14:44:11.339886 >> Command sent successfully.
231 14:44:11.341813 Returned 0 in 0 seconds
232 14:44:11.442585 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:44:11.443314 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:44:11.443453 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:44:11.443579 Setting prompt string to 'Starting depthcharge on Voema...'
237 14:44:11.443680 Changing prompt to 'Starting depthcharge on Voema...'
238 14:44:11.443784 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 14:44:11.444144 [Enter `^Ec?' for help]
240 14:44:18.931746
241 14:44:18.931925
242 14:44:18.941769 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 14:44:18.944682 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 14:44:18.951675 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 14:44:18.955209 CPU: AES supported, TXT NOT supported, VT supported
246 14:44:18.961647 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 14:44:18.968362 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 14:44:18.971633 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 14:44:18.974901 VBOOT: Loading verstage.
250 14:44:18.981149 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 14:44:18.984809 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 14:44:18.987826 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:44:18.998900 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 14:44:19.005375 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 14:44:19.005545
256 14:44:19.005655
257 14:44:19.018724 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 14:44:19.032440 Probing TPM: . done!
259 14:44:19.035559 TPM ready after 0 ms
260 14:44:19.038951 Connected to device vid:did:rid of 1ae0:0028:00
261 14:44:19.050318 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 14:44:19.056676 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 14:44:19.060588 Initialized TPM device CR50 revision 0
264 14:44:19.109735 tlcl_send_startup: Startup return code is 0
265 14:44:19.109949 TPM: setup succeeded
266 14:44:19.124949 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 14:44:19.138773 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 14:44:19.152057 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 14:44:19.161597 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 14:44:19.165259 Chrome EC: UHEPI supported
271 14:44:19.168624 Phase 1
272 14:44:19.171640 FMAP: area GBB found @ 1805000 (458752 bytes)
273 14:44:19.181696 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 14:44:19.188410 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 14:44:19.195003 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 14:44:19.201605 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 14:44:19.204740 Recovery requested (1009000e)
278 14:44:19.208539 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 14:44:19.220335 tlcl_extend: response is 0
280 14:44:19.226519 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 14:44:19.236450 tlcl_extend: response is 0
282 14:44:19.243080 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 14:44:19.249572 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 14:44:19.256553 BS: verstage times (exec / console): total (unknown) / 142 ms
285 14:44:19.256717
286 14:44:19.256838
287 14:44:19.269492 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 14:44:19.275915 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 14:44:19.279189 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 14:44:19.282478 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 14:44:19.289176 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 14:44:19.293112 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 14:44:19.296059 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 14:44:19.299222 TCO_STS: 0000 0000
295 14:44:19.302998 GEN_PMCON: d0015038 00002200
296 14:44:19.306110 GBLRST_CAUSE: 00000000 00000000
297 14:44:19.306252 HPR_CAUSE0: 00000000
298 14:44:19.309510 prev_sleep_state 5
299 14:44:19.312487 Boot Count incremented to 10134
300 14:44:19.319429 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 14:44:19.325848 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 14:44:19.332224 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 14:44:19.339017 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 14:44:19.343450 Chrome EC: UHEPI supported
305 14:44:19.350827 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 14:44:19.363919 Probing TPM: done!
307 14:44:19.371920 Connected to device vid:did:rid of 1ae0:0028:00
308 14:44:19.379418 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 14:44:19.388886 Initialized TPM device CR50 revision 0
310 14:44:19.398856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 14:44:19.405536 MRC: Hash idx 0x100b comparison successful.
312 14:44:19.409127 MRC cache found, size faa8
313 14:44:19.409271 bootmode is set to: 2
314 14:44:19.412069 SPD index = 0
315 14:44:19.419070 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 14:44:19.422138 SPD: module type is LPDDR4X
317 14:44:19.425799 SPD: module part number is MT53E512M64D4NW-046
318 14:44:19.432194 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 14:44:19.435615 SPD: device width 16 bits, bus width 16 bits
320 14:44:19.441867 SPD: module size is 1024 MB (per channel)
321 14:44:19.872667 CBMEM:
322 14:44:19.875700 IMD: root @ 0x76fff000 254 entries.
323 14:44:19.878887 IMD: root @ 0x76ffec00 62 entries.
324 14:44:19.882561 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 14:44:19.889460 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 14:44:19.892334 External stage cache:
327 14:44:19.896066 IMD: root @ 0x7b3ff000 254 entries.
328 14:44:19.899084 IMD: root @ 0x7b3fec00 62 entries.
329 14:44:19.914155 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 14:44:19.920952 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 14:44:19.927687 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 14:44:19.941366 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 14:44:19.948249 cse_lite: Skip switching to RW in the recovery path
334 14:44:19.948418 8 DIMMs found
335 14:44:19.948522 SMM Memory Map
336 14:44:19.951931 SMRAM : 0x7b000000 0x800000
337 14:44:19.955832 Subregion 0: 0x7b000000 0x200000
338 14:44:19.959164 Subregion 1: 0x7b200000 0x200000
339 14:44:19.962283 Subregion 2: 0x7b400000 0x400000
340 14:44:19.965985 top_of_ram = 0x77000000
341 14:44:19.972378 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 14:44:19.976058 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 14:44:19.982401 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 14:44:19.985866 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 14:44:19.995810 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 14:44:20.002673 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 14:44:20.012013 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 14:44:20.015740 Processing 211 relocs. Offset value of 0x74c0b000
349 14:44:20.024569 BS: romstage times (exec / console): total (unknown) / 277 ms
350 14:44:20.030191
351 14:44:20.030350
352 14:44:20.040427 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 14:44:20.043891 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 14:44:20.053786 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 14:44:20.060279 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 14:44:20.067060 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 14:44:20.073359 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 14:44:20.120650 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 14:44:20.127312 Processing 5008 relocs. Offset value of 0x75d98000
360 14:44:20.130477 BS: postcar times (exec / console): total (unknown) / 59 ms
361 14:44:20.133664
362 14:44:20.133802
363 14:44:20.143490 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 14:44:20.143678 Normal boot
365 14:44:20.147312 FW_CONFIG value is 0x804c02
366 14:44:20.150607 PCI: 00:07.0 disabled by fw_config
367 14:44:20.153899 PCI: 00:07.1 disabled by fw_config
368 14:44:20.157064 PCI: 00:0d.2 disabled by fw_config
369 14:44:20.160754 PCI: 00:1c.7 disabled by fw_config
370 14:44:20.166828 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 14:44:20.173656 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 14:44:20.176957 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 14:44:20.180620 GENERIC: 0.0 disabled by fw_config
374 14:44:20.183515 GENERIC: 1.0 disabled by fw_config
375 14:44:20.190246 fw_config match found: DB_USB=USB3_ACTIVE
376 14:44:20.193453 fw_config match found: DB_USB=USB3_ACTIVE
377 14:44:20.196838 fw_config match found: DB_USB=USB3_ACTIVE
378 14:44:20.203538 fw_config match found: DB_USB=USB3_ACTIVE
379 14:44:20.206880 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 14:44:20.213698 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 14:44:20.223241 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 14:44:20.230145 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 14:44:20.233315 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 14:44:20.239875 microcode: Update skipped, already up-to-date
385 14:44:20.246849 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 14:44:20.274025 Detected 4 core, 8 thread CPU.
387 14:44:20.277260 Setting up SMI for CPU
388 14:44:20.280556 IED base = 0x7b400000
389 14:44:20.280715 IED size = 0x00400000
390 14:44:20.283718 Will perform SMM setup.
391 14:44:20.290735 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 14:44:20.297209 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 14:44:20.303572 Processing 16 relocs. Offset value of 0x00030000
394 14:44:20.307188 Attempting to start 7 APs
395 14:44:20.310730 Waiting for 10ms after sending INIT.
396 14:44:20.326037 Waiting for 1st SIPI to complete...done.
397 14:44:20.326249 AP: slot 1 apic_id 1.
398 14:44:20.329268 AP: slot 7 apic_id 6.
399 14:44:20.332498 AP: slot 3 apic_id 7.
400 14:44:20.332641 AP: slot 5 apic_id 4.
401 14:44:20.336094 AP: slot 6 apic_id 3.
402 14:44:20.339426 AP: slot 2 apic_id 2.
403 14:44:20.342851 Waiting for 2nd SIPI to complete...done.
404 14:44:20.345975 AP: slot 4 apic_id 5.
405 14:44:20.352874 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 14:44:20.359270 Processing 13 relocs. Offset value of 0x00038000
407 14:44:20.362333 Unable to locate Global NVS
408 14:44:20.368865 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 14:44:20.372929 Installing permanent SMM handler to 0x7b000000
410 14:44:20.382078 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 14:44:20.385734 Processing 794 relocs. Offset value of 0x7b010000
412 14:44:20.395752 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 14:44:20.399095 Processing 13 relocs. Offset value of 0x7b008000
414 14:44:20.405426 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 14:44:20.412265 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 14:44:20.415610 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 14:44:20.422014 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 14:44:20.428823 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 14:44:20.435233 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 14:44:20.442278 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 14:44:20.442416 Unable to locate Global NVS
422 14:44:20.451851 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 14:44:20.455095 Clearing SMI status registers
424 14:44:20.455212 SMI_STS: PM1
425 14:44:20.459053 PM1_STS: PWRBTN
426 14:44:20.465284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 14:44:20.468371 In relocation handler: CPU 0
428 14:44:20.472085 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 14:44:20.478471 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 14:44:20.478683 Relocation complete.
431 14:44:20.488581 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 14:44:20.491799 In relocation handler: CPU 1
433 14:44:20.494975 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 14:44:20.495157 Relocation complete.
435 14:44:20.505076 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
436 14:44:20.505317 In relocation handler: CPU 4
437 14:44:20.511788 New SMBASE=0x7afff000 IEDBASE=0x7b400000
438 14:44:20.512002 Relocation complete.
439 14:44:20.521606 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 14:44:20.521828 In relocation handler: CPU 5
441 14:44:20.528633 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 14:44:20.531733 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 14:44:20.535058 Relocation complete.
444 14:44:20.541606 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 14:44:20.544907 In relocation handler: CPU 2
446 14:44:20.548132 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 14:44:20.554784 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 14:44:20.555018 Relocation complete.
449 14:44:20.561622 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
450 14:44:20.564746 In relocation handler: CPU 6
451 14:44:20.571646 New SMBASE=0x7affe800 IEDBASE=0x7b400000
452 14:44:20.571869 Relocation complete.
453 14:44:20.578071 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
454 14:44:20.581350 In relocation handler: CPU 7
455 14:44:20.587856 New SMBASE=0x7affe400 IEDBASE=0x7b400000
456 14:44:20.591528 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 14:44:20.594811 Relocation complete.
458 14:44:20.601255 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
459 14:44:20.604362 In relocation handler: CPU 3
460 14:44:20.607986 New SMBASE=0x7afff400 IEDBASE=0x7b400000
461 14:44:20.611267 Relocation complete.
462 14:44:20.611430 Initializing CPU #0
463 14:44:20.615250 CPU: vendor Intel device 806c1
464 14:44:20.618351 CPU: family 06, model 8c, stepping 01
465 14:44:20.622050 Clearing out pending MCEs
466 14:44:20.625281 Setting up local APIC...
467 14:44:20.625388 apic_id: 0x00 done.
468 14:44:20.628600 Turbo is available but hidden
469 14:44:20.631717 Turbo is available and visible
470 14:44:20.638556 microcode: Update skipped, already up-to-date
471 14:44:20.638678 CPU #0 initialized
472 14:44:20.641736 Initializing CPU #1
473 14:44:20.645006 Initializing CPU #7
474 14:44:20.645104 Initializing CPU #3
475 14:44:20.648305 CPU: vendor Intel device 806c1
476 14:44:20.651598 CPU: family 06, model 8c, stepping 01
477 14:44:20.654930 Initializing CPU #6
478 14:44:20.658246 Initializing CPU #2
479 14:44:20.661453 CPU: vendor Intel device 806c1
480 14:44:20.664708 CPU: family 06, model 8c, stepping 01
481 14:44:20.668362 CPU: vendor Intel device 806c1
482 14:44:20.671438 CPU: family 06, model 8c, stepping 01
483 14:44:20.674817 Clearing out pending MCEs
484 14:44:20.674939 Clearing out pending MCEs
485 14:44:20.678098 Setting up local APIC...
486 14:44:20.681824 Clearing out pending MCEs
487 14:44:20.684866 CPU: vendor Intel device 806c1
488 14:44:20.688116 CPU: family 06, model 8c, stepping 01
489 14:44:20.691449 Setting up local APIC...
490 14:44:20.694589 CPU: vendor Intel device 806c1
491 14:44:20.698355 CPU: family 06, model 8c, stepping 01
492 14:44:20.701515 Setting up local APIC...
493 14:44:20.701640 Initializing CPU #5
494 14:44:20.704980 Initializing CPU #4
495 14:44:20.708212 CPU: vendor Intel device 806c1
496 14:44:20.711426 CPU: family 06, model 8c, stepping 01
497 14:44:20.714911 CPU: vendor Intel device 806c1
498 14:44:20.718195 CPU: family 06, model 8c, stepping 01
499 14:44:20.721228 Clearing out pending MCEs
500 14:44:20.721351 apic_id: 0x06 done.
501 14:44:20.724900 apic_id: 0x07 done.
502 14:44:20.727988 microcode: Update skipped, already up-to-date
503 14:44:20.734833 microcode: Update skipped, already up-to-date
504 14:44:20.734987 CPU #7 initialized
505 14:44:20.737906 CPU #3 initialized
506 14:44:20.741048 Clearing out pending MCEs
507 14:44:20.744385 Clearing out pending MCEs
508 14:44:20.744489 Setting up local APIC...
509 14:44:20.747746 Setting up local APIC...
510 14:44:20.751503 Setting up local APIC...
511 14:44:20.754694 Clearing out pending MCEs
512 14:44:20.754823 apic_id: 0x03 done.
513 14:44:20.757901 Setting up local APIC...
514 14:44:20.761093 apic_id: 0x05 done.
515 14:44:20.761212 apic_id: 0x04 done.
516 14:44:20.764436 apic_id: 0x01 done.
517 14:44:20.767565 microcode: Update skipped, already up-to-date
518 14:44:20.774441 microcode: Update skipped, already up-to-date
519 14:44:20.774574 CPU #4 initialized
520 14:44:20.777510 CPU #5 initialized
521 14:44:20.781441 apic_id: 0x02 done.
522 14:44:20.784495 microcode: Update skipped, already up-to-date
523 14:44:20.787762 microcode: Update skipped, already up-to-date
524 14:44:20.791035 CPU #6 initialized
525 14:44:20.794184 CPU #2 initialized
526 14:44:20.797968 microcode: Update skipped, already up-to-date
527 14:44:20.801012 CPU #1 initialized
528 14:44:20.804383 bsp_do_flight_plan done after 457 msecs.
529 14:44:20.807447 CPU: frequency set to 4000 MHz
530 14:44:20.807535 Enabling SMIs.
531 14:44:20.814184 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 14:44:20.831013 SATAXPCIE1 indicates PCIe NVMe is present
533 14:44:20.834241 Probing TPM: done!
534 14:44:20.837735 Connected to device vid:did:rid of 1ae0:0028:00
535 14:44:20.848648 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 14:44:20.851978 Initialized TPM device CR50 revision 0
537 14:44:20.855283 Enabling S0i3.4
538 14:44:20.861827 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 14:44:20.865182 Found a VBT of 8704 bytes after decompression
540 14:44:20.871457 cse_lite: CSE RO boot. HybridStorageMode disabled
541 14:44:20.878371 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 14:44:20.953989 FSPS returned 0
543 14:44:20.957234 Executing Phase 1 of FspMultiPhaseSiInit
544 14:44:20.967122 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 14:44:20.970474 port C0 DISC req: usage 1 usb3 1 usb2 5
546 14:44:20.974228 Raw Buffer output 0 00000511
547 14:44:20.977274 Raw Buffer output 1 00000000
548 14:44:20.981044 pmc_send_ipc_cmd succeeded
549 14:44:20.987497 port C1 DISC req: usage 1 usb3 2 usb2 3
550 14:44:20.987609 Raw Buffer output 0 00000321
551 14:44:20.990901 Raw Buffer output 1 00000000
552 14:44:20.995206 pmc_send_ipc_cmd succeeded
553 14:44:21.000253 Detected 4 core, 8 thread CPU.
554 14:44:21.003930 Detected 4 core, 8 thread CPU.
555 14:44:21.237389 Display FSP Version Info HOB
556 14:44:21.240819 Reference Code - CPU = a.0.4c.31
557 14:44:21.244002 uCode Version = 0.0.0.86
558 14:44:21.247290 TXT ACM version = ff.ff.ff.ffff
559 14:44:21.250381 Reference Code - ME = a.0.4c.31
560 14:44:21.254394 MEBx version = 0.0.0.0
561 14:44:21.257575 ME Firmware Version = Consumer SKU
562 14:44:21.260360 Reference Code - PCH = a.0.4c.31
563 14:44:21.264180 PCH-CRID Status = Disabled
564 14:44:21.267427 PCH-CRID Original Value = ff.ff.ff.ffff
565 14:44:21.270256 PCH-CRID New Value = ff.ff.ff.ffff
566 14:44:21.273680 OPROM - RST - RAID = ff.ff.ff.ffff
567 14:44:21.277078 PCH Hsio Version = 4.0.0.0
568 14:44:21.280413 Reference Code - SA - System Agent = a.0.4c.31
569 14:44:21.284050 Reference Code - MRC = 2.0.0.1
570 14:44:21.287417 SA - PCIe Version = a.0.4c.31
571 14:44:21.290389 SA-CRID Status = Disabled
572 14:44:21.293577 SA-CRID Original Value = 0.0.0.1
573 14:44:21.296980 SA-CRID New Value = 0.0.0.1
574 14:44:21.300323 OPROM - VBIOS = ff.ff.ff.ffff
575 14:44:21.304195 IO Manageability Engine FW Version = 11.1.4.0
576 14:44:21.307304 PHY Build Version = 0.0.0.e0
577 14:44:21.310470 Thunderbolt(TM) FW Version = 0.0.0.0
578 14:44:21.317296 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 14:44:21.320692 ITSS IRQ Polarities Before:
580 14:44:21.320800 IPC0: 0xffffffff
581 14:44:21.323929 IPC1: 0xffffffff
582 14:44:21.324023 IPC2: 0xffffffff
583 14:44:21.327105 IPC3: 0xffffffff
584 14:44:21.330355 ITSS IRQ Polarities After:
585 14:44:21.330450 IPC0: 0xffffffff
586 14:44:21.333588 IPC1: 0xffffffff
587 14:44:21.333680 IPC2: 0xffffffff
588 14:44:21.337070 IPC3: 0xffffffff
589 14:44:21.340263 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 14:44:21.353758 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 14:44:21.363734 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 14:44:21.376574 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 14:44:21.383147 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
594 14:44:21.386490 Enumerating buses...
595 14:44:21.389818 Show all devs... Before device enumeration.
596 14:44:21.393434 Root Device: enabled 1
597 14:44:21.393527 DOMAIN: 0000: enabled 1
598 14:44:21.396493 CPU_CLUSTER: 0: enabled 1
599 14:44:21.399913 PCI: 00:00.0: enabled 1
600 14:44:21.403131 PCI: 00:02.0: enabled 1
601 14:44:21.403224 PCI: 00:04.0: enabled 1
602 14:44:21.406582 PCI: 00:05.0: enabled 1
603 14:44:21.409834 PCI: 00:06.0: enabled 0
604 14:44:21.413045 PCI: 00:07.0: enabled 0
605 14:44:21.413136 PCI: 00:07.1: enabled 0
606 14:44:21.416320 PCI: 00:07.2: enabled 0
607 14:44:21.419754 PCI: 00:07.3: enabled 0
608 14:44:21.422964 PCI: 00:08.0: enabled 1
609 14:44:21.423058 PCI: 00:09.0: enabled 0
610 14:44:21.426764 PCI: 00:0a.0: enabled 0
611 14:44:21.429907 PCI: 00:0d.0: enabled 1
612 14:44:21.430002 PCI: 00:0d.1: enabled 0
613 14:44:21.433158 PCI: 00:0d.2: enabled 0
614 14:44:21.436419 PCI: 00:0d.3: enabled 0
615 14:44:21.439708 PCI: 00:0e.0: enabled 0
616 14:44:21.439803 PCI: 00:10.2: enabled 1
617 14:44:21.443046 PCI: 00:10.6: enabled 0
618 14:44:21.446340 PCI: 00:10.7: enabled 0
619 14:44:21.449722 PCI: 00:12.0: enabled 0
620 14:44:21.449816 PCI: 00:12.6: enabled 0
621 14:44:21.452823 PCI: 00:13.0: enabled 0
622 14:44:21.456114 PCI: 00:14.0: enabled 1
623 14:44:21.459398 PCI: 00:14.1: enabled 0
624 14:44:21.459495 PCI: 00:14.2: enabled 1
625 14:44:21.462757 PCI: 00:14.3: enabled 1
626 14:44:21.466158 PCI: 00:15.0: enabled 1
627 14:44:21.466248 PCI: 00:15.1: enabled 1
628 14:44:21.469467 PCI: 00:15.2: enabled 1
629 14:44:21.472986 PCI: 00:15.3: enabled 1
630 14:44:21.476178 PCI: 00:16.0: enabled 1
631 14:44:21.476274 PCI: 00:16.1: enabled 0
632 14:44:21.479529 PCI: 00:16.2: enabled 0
633 14:44:21.482938 PCI: 00:16.3: enabled 0
634 14:44:21.486047 PCI: 00:16.4: enabled 0
635 14:44:21.486137 PCI: 00:16.5: enabled 0
636 14:44:21.489367 PCI: 00:17.0: enabled 1
637 14:44:21.492766 PCI: 00:19.0: enabled 0
638 14:44:21.496145 PCI: 00:19.1: enabled 1
639 14:44:21.496236 PCI: 00:19.2: enabled 0
640 14:44:21.499494 PCI: 00:1c.0: enabled 1
641 14:44:21.502910 PCI: 00:1c.1: enabled 0
642 14:44:21.506066 PCI: 00:1c.2: enabled 0
643 14:44:21.506173 PCI: 00:1c.3: enabled 0
644 14:44:21.509408 PCI: 00:1c.4: enabled 0
645 14:44:21.513037 PCI: 00:1c.5: enabled 0
646 14:44:21.513173 PCI: 00:1c.6: enabled 1
647 14:44:21.516303 PCI: 00:1c.7: enabled 0
648 14:44:21.519537 PCI: 00:1d.0: enabled 1
649 14:44:21.522856 PCI: 00:1d.1: enabled 0
650 14:44:21.522961 PCI: 00:1d.2: enabled 1
651 14:44:21.526105 PCI: 00:1d.3: enabled 0
652 14:44:21.529337 PCI: 00:1e.0: enabled 1
653 14:44:21.533035 PCI: 00:1e.1: enabled 0
654 14:44:21.533171 PCI: 00:1e.2: enabled 1
655 14:44:21.535882 PCI: 00:1e.3: enabled 1
656 14:44:21.539726 PCI: 00:1f.0: enabled 1
657 14:44:21.542487 PCI: 00:1f.1: enabled 0
658 14:44:21.542576 PCI: 00:1f.2: enabled 1
659 14:44:21.545670 PCI: 00:1f.3: enabled 1
660 14:44:21.549631 PCI: 00:1f.4: enabled 0
661 14:44:21.549720 PCI: 00:1f.5: enabled 1
662 14:44:21.553102 PCI: 00:1f.6: enabled 0
663 14:44:21.555893 PCI: 00:1f.7: enabled 0
664 14:44:21.559400 APIC: 00: enabled 1
665 14:44:21.559539 GENERIC: 0.0: enabled 1
666 14:44:21.562593 GENERIC: 0.0: enabled 1
667 14:44:21.565997 GENERIC: 1.0: enabled 1
668 14:44:21.569434 GENERIC: 0.0: enabled 1
669 14:44:21.569554 GENERIC: 1.0: enabled 1
670 14:44:21.572721 USB0 port 0: enabled 1
671 14:44:21.576065 GENERIC: 0.0: enabled 1
672 14:44:21.576183 USB0 port 0: enabled 1
673 14:44:21.579472 GENERIC: 0.0: enabled 1
674 14:44:21.582851 I2C: 00:1a: enabled 1
675 14:44:21.582968 I2C: 00:31: enabled 1
676 14:44:21.585879 I2C: 00:32: enabled 1
677 14:44:21.589146 I2C: 00:10: enabled 1
678 14:44:21.592465 I2C: 00:15: enabled 1
679 14:44:21.592601 GENERIC: 0.0: enabled 0
680 14:44:21.595930 GENERIC: 1.0: enabled 0
681 14:44:21.599078 GENERIC: 0.0: enabled 1
682 14:44:21.599199 SPI: 00: enabled 1
683 14:44:21.602476 SPI: 00: enabled 1
684 14:44:21.605682 PNP: 0c09.0: enabled 1
685 14:44:21.605817 GENERIC: 0.0: enabled 1
686 14:44:21.609132 USB3 port 0: enabled 1
687 14:44:21.612320 USB3 port 1: enabled 1
688 14:44:21.612453 USB3 port 2: enabled 0
689 14:44:21.615613 USB3 port 3: enabled 0
690 14:44:21.619379 USB2 port 0: enabled 0
691 14:44:21.622427 USB2 port 1: enabled 1
692 14:44:21.622548 USB2 port 2: enabled 1
693 14:44:21.625749 USB2 port 3: enabled 0
694 14:44:21.629097 USB2 port 4: enabled 1
695 14:44:21.629216 USB2 port 5: enabled 0
696 14:44:21.632276 USB2 port 6: enabled 0
697 14:44:21.635533 USB2 port 7: enabled 0
698 14:44:21.639273 USB2 port 8: enabled 0
699 14:44:21.639391 USB2 port 9: enabled 0
700 14:44:21.642531 USB3 port 0: enabled 0
701 14:44:21.645906 USB3 port 1: enabled 1
702 14:44:21.646038 USB3 port 2: enabled 0
703 14:44:21.649124 USB3 port 3: enabled 0
704 14:44:21.652282 GENERIC: 0.0: enabled 1
705 14:44:21.655467 GENERIC: 1.0: enabled 1
706 14:44:21.655595 APIC: 01: enabled 1
707 14:44:21.658920 APIC: 02: enabled 1
708 14:44:21.659052 APIC: 07: enabled 1
709 14:44:21.662506 APIC: 05: enabled 1
710 14:44:21.665925 APIC: 04: enabled 1
711 14:44:21.666047 APIC: 03: enabled 1
712 14:44:21.669182 APIC: 06: enabled 1
713 14:44:21.669304 Compare with tree...
714 14:44:21.672547 Root Device: enabled 1
715 14:44:21.675875 DOMAIN: 0000: enabled 1
716 14:44:21.678646 PCI: 00:00.0: enabled 1
717 14:44:21.681919 PCI: 00:02.0: enabled 1
718 14:44:21.682042 PCI: 00:04.0: enabled 1
719 14:44:21.685292 GENERIC: 0.0: enabled 1
720 14:44:21.689073 PCI: 00:05.0: enabled 1
721 14:44:21.692364 PCI: 00:06.0: enabled 0
722 14:44:21.695672 PCI: 00:07.0: enabled 0
723 14:44:21.695792 GENERIC: 0.0: enabled 1
724 14:44:21.698547 PCI: 00:07.1: enabled 0
725 14:44:21.702263 GENERIC: 1.0: enabled 1
726 14:44:21.705729 PCI: 00:07.2: enabled 0
727 14:44:21.708931 GENERIC: 0.0: enabled 1
728 14:44:21.709050 PCI: 00:07.3: enabled 0
729 14:44:21.712410 GENERIC: 1.0: enabled 1
730 14:44:21.715411 PCI: 00:08.0: enabled 1
731 14:44:21.718869 PCI: 00:09.0: enabled 0
732 14:44:21.721977 PCI: 00:0a.0: enabled 0
733 14:44:21.722096 PCI: 00:0d.0: enabled 1
734 14:44:21.725163 USB0 port 0: enabled 1
735 14:44:21.728964 USB3 port 0: enabled 1
736 14:44:21.732106 USB3 port 1: enabled 1
737 14:44:21.735328 USB3 port 2: enabled 0
738 14:44:21.735444 USB3 port 3: enabled 0
739 14:44:21.738500 PCI: 00:0d.1: enabled 0
740 14:44:21.741826 PCI: 00:0d.2: enabled 0
741 14:44:21.745144 GENERIC: 0.0: enabled 1
742 14:44:21.748394 PCI: 00:0d.3: enabled 0
743 14:44:21.748556 PCI: 00:0e.0: enabled 0
744 14:44:21.752136 PCI: 00:10.2: enabled 1
745 14:44:21.755325 PCI: 00:10.6: enabled 0
746 14:44:21.758910 PCI: 00:10.7: enabled 0
747 14:44:21.761868 PCI: 00:12.0: enabled 0
748 14:44:21.761987 PCI: 00:12.6: enabled 0
749 14:44:21.765044 PCI: 00:13.0: enabled 0
750 14:44:21.768363 PCI: 00:14.0: enabled 1
751 14:44:21.771801 USB0 port 0: enabled 1
752 14:44:21.775112 USB2 port 0: enabled 0
753 14:44:21.775227 USB2 port 1: enabled 1
754 14:44:21.778491 USB2 port 2: enabled 1
755 14:44:21.781806 USB2 port 3: enabled 0
756 14:44:21.785235 USB2 port 4: enabled 1
757 14:44:21.788553 USB2 port 5: enabled 0
758 14:44:21.791925 USB2 port 6: enabled 0
759 14:44:21.792037 USB2 port 7: enabled 0
760 14:44:21.795339 USB2 port 8: enabled 0
761 14:44:21.798563 USB2 port 9: enabled 0
762 14:44:21.801945 USB3 port 0: enabled 0
763 14:44:21.805112 USB3 port 1: enabled 1
764 14:44:21.808522 USB3 port 2: enabled 0
765 14:44:21.808634 USB3 port 3: enabled 0
766 14:44:21.811887 PCI: 00:14.1: enabled 0
767 14:44:21.815275 PCI: 00:14.2: enabled 1
768 14:44:21.818483 PCI: 00:14.3: enabled 1
769 14:44:21.821836 GENERIC: 0.0: enabled 1
770 14:44:21.821952 PCI: 00:15.0: enabled 1
771 14:44:21.825157 I2C: 00:1a: enabled 1
772 14:44:21.828350 I2C: 00:31: enabled 1
773 14:44:21.831712 I2C: 00:32: enabled 1
774 14:44:21.831834 PCI: 00:15.1: enabled 1
775 14:44:21.834766 I2C: 00:10: enabled 1
776 14:44:21.838189 PCI: 00:15.2: enabled 1
777 14:44:21.841401 PCI: 00:15.3: enabled 1
778 14:44:21.844737 PCI: 00:16.0: enabled 1
779 14:44:21.844855 PCI: 00:16.1: enabled 0
780 14:44:21.848451 PCI: 00:16.2: enabled 0
781 14:44:21.851305 PCI: 00:16.3: enabled 0
782 14:44:21.854665 PCI: 00:16.4: enabled 0
783 14:44:21.858569 PCI: 00:16.5: enabled 0
784 14:44:21.858741 PCI: 00:17.0: enabled 1
785 14:44:21.862019 PCI: 00:19.0: enabled 0
786 14:44:21.865770 PCI: 00:19.1: enabled 1
787 14:44:21.865923 I2C: 00:15: enabled 1
788 14:44:21.869349 PCI: 00:19.2: enabled 0
789 14:44:21.872849 PCI: 00:1d.0: enabled 1
790 14:44:21.875559 GENERIC: 0.0: enabled 1
791 14:44:21.878963 PCI: 00:1e.0: enabled 1
792 14:44:21.879114 PCI: 00:1e.1: enabled 0
793 14:44:21.882343 PCI: 00:1e.2: enabled 1
794 14:44:21.885681 SPI: 00: enabled 1
795 14:44:21.889073 PCI: 00:1e.3: enabled 1
796 14:44:21.889190 SPI: 00: enabled 1
797 14:44:21.892380 PCI: 00:1f.0: enabled 1
798 14:44:21.895480 PNP: 0c09.0: enabled 1
799 14:44:21.947337 PCI: 00:1f.1: enabled 0
800 14:44:21.947537 PCI: 00:1f.2: enabled 1
801 14:44:21.947659 GENERIC: 0.0: enabled 1
802 14:44:21.947986 GENERIC: 0.0: enabled 1
803 14:44:21.948100 GENERIC: 1.0: enabled 1
804 14:44:21.948203 PCI: 00:1f.3: enabled 1
805 14:44:21.948305 PCI: 00:1f.4: enabled 0
806 14:44:21.948406 PCI: 00:1f.5: enabled 1
807 14:44:21.948509 PCI: 00:1f.6: enabled 0
808 14:44:21.948813 PCI: 00:1f.7: enabled 0
809 14:44:21.948925 CPU_CLUSTER: 0: enabled 1
810 14:44:21.949029 APIC: 00: enabled 1
811 14:44:21.949131 APIC: 01: enabled 1
812 14:44:21.949231 APIC: 02: enabled 1
813 14:44:21.949329 APIC: 07: enabled 1
814 14:44:21.949427 APIC: 05: enabled 1
815 14:44:21.949526 APIC: 04: enabled 1
816 14:44:21.949623 APIC: 03: enabled 1
817 14:44:21.949723 APIC: 06: enabled 1
818 14:44:21.949816 Root Device scanning...
819 14:44:21.997736 scan_static_bus for Root Device
820 14:44:21.997941 DOMAIN: 0000 enabled
821 14:44:21.998052 CPU_CLUSTER: 0 enabled
822 14:44:21.998379 DOMAIN: 0000 scanning...
823 14:44:21.998491 PCI: pci_scan_bus for bus 00
824 14:44:21.998595 PCI: 00:00.0 [8086/0000] ops
825 14:44:21.998696 PCI: 00:00.0 [8086/9a12] enabled
826 14:44:21.998796 PCI: 00:02.0 [8086/0000] bus ops
827 14:44:21.998894 PCI: 00:02.0 [8086/9a40] enabled
828 14:44:21.998993 PCI: 00:04.0 [8086/0000] bus ops
829 14:44:21.999091 PCI: 00:04.0 [8086/9a03] enabled
830 14:44:21.999191 PCI: 00:05.0 [8086/9a19] enabled
831 14:44:21.999290 PCI: 00:07.0 [0000/0000] hidden
832 14:44:21.999389 PCI: 00:08.0 [8086/9a11] enabled
833 14:44:21.999485 PCI: 00:0a.0 [8086/9a0d] disabled
834 14:44:21.999582 PCI: 00:0d.0 [8086/0000] bus ops
835 14:44:22.022486 PCI: 00:0d.0 [8086/9a13] enabled
836 14:44:22.022791 PCI: 00:14.0 [8086/0000] bus ops
837 14:44:22.023133 PCI: 00:14.0 [8086/a0ed] enabled
838 14:44:22.023244 PCI: 00:14.2 [8086/a0ef] enabled
839 14:44:22.023346 PCI: 00:14.3 [8086/0000] bus ops
840 14:44:22.023444 PCI: 00:14.3 [8086/a0f0] enabled
841 14:44:22.026299 PCI: 00:15.0 [8086/0000] bus ops
842 14:44:22.026415 PCI: 00:15.0 [8086/a0e8] enabled
843 14:44:22.029455 PCI: 00:15.1 [8086/0000] bus ops
844 14:44:22.029570 PCI: 00:15.1 [8086/a0e9] enabled
845 14:44:22.032833 PCI: 00:15.2 [8086/0000] bus ops
846 14:44:22.036151 PCI: 00:15.2 [8086/a0ea] enabled
847 14:44:22.039429 PCI: 00:15.3 [8086/0000] bus ops
848 14:44:22.042680 PCI: 00:15.3 [8086/a0eb] enabled
849 14:44:22.046027 PCI: 00:16.0 [8086/0000] ops
850 14:44:22.049509 PCI: 00:16.0 [8086/a0e0] enabled
851 14:44:22.056030 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 14:44:22.059170 PCI: 00:19.0 [8086/0000] bus ops
853 14:44:22.062427 PCI: 00:19.0 [8086/a0c5] disabled
854 14:44:22.065656 PCI: 00:19.1 [8086/0000] bus ops
855 14:44:22.068919 PCI: 00:19.1 [8086/a0c6] enabled
856 14:44:22.072234 PCI: 00:1d.0 [8086/0000] bus ops
857 14:44:22.075438 PCI: 00:1d.0 [8086/a0b0] enabled
858 14:44:22.078911 PCI: 00:1e.0 [8086/0000] ops
859 14:44:22.082301 PCI: 00:1e.0 [8086/a0a8] enabled
860 14:44:22.085730 PCI: 00:1e.2 [8086/0000] bus ops
861 14:44:22.088972 PCI: 00:1e.2 [8086/a0aa] enabled
862 14:44:22.092347 PCI: 00:1e.3 [8086/0000] bus ops
863 14:44:22.095713 PCI: 00:1e.3 [8086/a0ab] enabled
864 14:44:22.098874 PCI: 00:1f.0 [8086/0000] bus ops
865 14:44:22.102196 PCI: 00:1f.0 [8086/a087] enabled
866 14:44:22.102288 RTC Init
867 14:44:22.105416 Set power on after power failure.
868 14:44:22.108666 Disabling Deep S3
869 14:44:22.111935 Disabling Deep S3
870 14:44:22.112030 Disabling Deep S4
871 14:44:22.115211 Disabling Deep S4
872 14:44:22.115334 Disabling Deep S5
873 14:44:22.118580 Disabling Deep S5
874 14:44:22.121889 PCI: 00:1f.2 [0000/0000] hidden
875 14:44:22.125217 PCI: 00:1f.3 [8086/0000] bus ops
876 14:44:22.128921 PCI: 00:1f.3 [8086/a0c8] enabled
877 14:44:22.132019 PCI: 00:1f.5 [8086/0000] bus ops
878 14:44:22.135385 PCI: 00:1f.5 [8086/a0a4] enabled
879 14:44:22.138767 PCI: Leftover static devices:
880 14:44:22.138918 PCI: 00:10.2
881 14:44:22.141863 PCI: 00:10.6
882 14:44:22.141992 PCI: 00:10.7
883 14:44:22.142112 PCI: 00:06.0
884 14:44:22.145440 PCI: 00:07.1
885 14:44:22.145546 PCI: 00:07.2
886 14:44:22.148859 PCI: 00:07.3
887 14:44:22.148959 PCI: 00:09.0
888 14:44:22.149032 PCI: 00:0d.1
889 14:44:22.152046 PCI: 00:0d.2
890 14:44:22.152132 PCI: 00:0d.3
891 14:44:22.155420 PCI: 00:0e.0
892 14:44:22.155529 PCI: 00:12.0
893 14:44:22.158776 PCI: 00:12.6
894 14:44:22.158866 PCI: 00:13.0
895 14:44:22.158939 PCI: 00:14.1
896 14:44:22.162038 PCI: 00:16.1
897 14:44:22.162131 PCI: 00:16.2
898 14:44:22.165283 PCI: 00:16.3
899 14:44:22.165374 PCI: 00:16.4
900 14:44:22.165444 PCI: 00:16.5
901 14:44:22.168731 PCI: 00:17.0
902 14:44:22.168828 PCI: 00:19.2
903 14:44:22.171976 PCI: 00:1e.1
904 14:44:22.172090 PCI: 00:1f.1
905 14:44:22.172183 PCI: 00:1f.4
906 14:44:22.175341 PCI: 00:1f.6
907 14:44:22.175443 PCI: 00:1f.7
908 14:44:22.178582 PCI: Check your devicetree.cb.
909 14:44:22.181916 PCI: 00:02.0 scanning...
910 14:44:22.185273 scan_generic_bus for PCI: 00:02.0
911 14:44:22.188557 scan_generic_bus for PCI: 00:02.0 done
912 14:44:22.195256 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 14:44:22.195395 PCI: 00:04.0 scanning...
914 14:44:22.202057 scan_generic_bus for PCI: 00:04.0
915 14:44:22.202193 GENERIC: 0.0 enabled
916 14:44:22.208717 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 14:44:22.211855 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 14:44:22.215144 PCI: 00:0d.0 scanning...
919 14:44:22.218653 scan_static_bus for PCI: 00:0d.0
920 14:44:22.221796 USB0 port 0 enabled
921 14:44:22.225202 USB0 port 0 scanning...
922 14:44:22.228392 scan_static_bus for USB0 port 0
923 14:44:22.228496 USB3 port 0 enabled
924 14:44:22.231569 USB3 port 1 enabled
925 14:44:22.234783 USB3 port 2 disabled
926 14:44:22.234883 USB3 port 3 disabled
927 14:44:22.237997 USB3 port 0 scanning...
928 14:44:22.241435 scan_static_bus for USB3 port 0
929 14:44:22.244822 scan_static_bus for USB3 port 0 done
930 14:44:22.251199 scan_bus: bus USB3 port 0 finished in 6 msecs
931 14:44:22.251308 USB3 port 1 scanning...
932 14:44:22.254475 scan_static_bus for USB3 port 1
933 14:44:22.258344 scan_static_bus for USB3 port 1 done
934 14:44:22.264844 scan_bus: bus USB3 port 1 finished in 6 msecs
935 14:44:22.267904 scan_static_bus for USB0 port 0 done
936 14:44:22.271250 scan_bus: bus USB0 port 0 finished in 43 msecs
937 14:44:22.278000 scan_static_bus for PCI: 00:0d.0 done
938 14:44:22.281148 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 14:44:22.284572 PCI: 00:14.0 scanning...
940 14:44:22.287965 scan_static_bus for PCI: 00:14.0
941 14:44:22.288046 USB0 port 0 enabled
942 14:44:22.291349 USB0 port 0 scanning...
943 14:44:22.294678 scan_static_bus for USB0 port 0
944 14:44:22.297972 USB2 port 0 disabled
945 14:44:22.300849 USB2 port 1 enabled
946 14:44:22.300930 USB2 port 2 enabled
947 14:44:22.304554 USB2 port 3 disabled
948 14:44:22.304637 USB2 port 4 enabled
949 14:44:22.307814 USB2 port 5 disabled
950 14:44:22.311200 USB2 port 6 disabled
951 14:44:22.311279 USB2 port 7 disabled
952 14:44:22.314555 USB2 port 8 disabled
953 14:44:22.317856 USB2 port 9 disabled
954 14:44:22.317948 USB3 port 0 disabled
955 14:44:22.321313 USB3 port 1 enabled
956 14:44:22.324462 USB3 port 2 disabled
957 14:44:22.324545 USB3 port 3 disabled
958 14:44:22.327819 USB2 port 1 scanning...
959 14:44:22.330877 scan_static_bus for USB2 port 1
960 14:44:22.334537 scan_static_bus for USB2 port 1 done
961 14:44:22.337792 scan_bus: bus USB2 port 1 finished in 6 msecs
962 14:44:22.341096 USB2 port 2 scanning...
963 14:44:22.344417 scan_static_bus for USB2 port 2
964 14:44:22.347523 scan_static_bus for USB2 port 2 done
965 14:44:22.354098 scan_bus: bus USB2 port 2 finished in 6 msecs
966 14:44:22.354196 USB2 port 4 scanning...
967 14:44:22.357949 scan_static_bus for USB2 port 4
968 14:44:22.364417 scan_static_bus for USB2 port 4 done
969 14:44:22.367801 scan_bus: bus USB2 port 4 finished in 6 msecs
970 14:44:22.371107 USB3 port 1 scanning...
971 14:44:22.374554 scan_static_bus for USB3 port 1
972 14:44:22.377750 scan_static_bus for USB3 port 1 done
973 14:44:22.380931 scan_bus: bus USB3 port 1 finished in 6 msecs
974 14:44:22.384220 scan_static_bus for USB0 port 0 done
975 14:44:22.390826 scan_bus: bus USB0 port 0 finished in 93 msecs
976 14:44:22.394235 scan_static_bus for PCI: 00:14.0 done
977 14:44:22.397556 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 14:44:22.400955 PCI: 00:14.3 scanning...
979 14:44:22.404217 scan_static_bus for PCI: 00:14.3
980 14:44:22.407360 GENERIC: 0.0 enabled
981 14:44:22.410691 scan_static_bus for PCI: 00:14.3 done
982 14:44:22.413977 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 14:44:22.417324 PCI: 00:15.0 scanning...
984 14:44:22.420555 scan_static_bus for PCI: 00:15.0
985 14:44:22.424115 I2C: 00:1a enabled
986 14:44:22.427300 I2C: 00:31 enabled
987 14:44:22.427388 I2C: 00:32 enabled
988 14:44:22.430609 scan_static_bus for PCI: 00:15.0 done
989 14:44:22.437470 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
990 14:44:22.437593 PCI: 00:15.1 scanning...
991 14:44:22.441317 scan_static_bus for PCI: 00:15.1
992 14:44:22.444694 I2C: 00:10 enabled
993 14:44:22.447952 scan_static_bus for PCI: 00:15.1 done
994 14:44:22.451654 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 14:44:22.454793 PCI: 00:15.2 scanning...
996 14:44:22.458060 scan_static_bus for PCI: 00:15.2
997 14:44:22.461365 scan_static_bus for PCI: 00:15.2 done
998 14:44:22.468008 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 14:44:22.471329 PCI: 00:15.3 scanning...
1000 14:44:22.474564 scan_static_bus for PCI: 00:15.3
1001 14:44:22.477937 scan_static_bus for PCI: 00:15.3 done
1002 14:44:22.481151 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 14:44:22.484500 PCI: 00:19.1 scanning...
1004 14:44:22.487403 scan_static_bus for PCI: 00:19.1
1005 14:44:22.490765 I2C: 00:15 enabled
1006 14:44:22.494014 scan_static_bus for PCI: 00:19.1 done
1007 14:44:22.497385 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 14:44:22.500841 PCI: 00:1d.0 scanning...
1009 14:44:22.504255 do_pci_scan_bridge for PCI: 00:1d.0
1010 14:44:22.507353 PCI: pci_scan_bus for bus 01
1011 14:44:22.510518 PCI: 01:00.0 [1c5c/174a] enabled
1012 14:44:22.513878 GENERIC: 0.0 enabled
1013 14:44:22.517325 Enabling Common Clock Configuration
1014 14:44:22.520388 L1 Sub-State supported from root port 29
1015 14:44:22.523764 L1 Sub-State Support = 0xf
1016 14:44:22.527164 CommonModeRestoreTime = 0x28
1017 14:44:22.530440 Power On Value = 0x16, Power On Scale = 0x0
1018 14:44:22.533733 ASPM: Enabled L1
1019 14:44:22.537089 PCIe: Max_Payload_Size adjusted to 128
1020 14:44:22.540318 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 14:44:22.544094 PCI: 00:1e.2 scanning...
1022 14:44:22.547002 scan_generic_bus for PCI: 00:1e.2
1023 14:44:22.550663 SPI: 00 enabled
1024 14:44:22.557045 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 14:44:22.560370 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 14:44:22.563638 PCI: 00:1e.3 scanning...
1027 14:44:22.567003 scan_generic_bus for PCI: 00:1e.3
1028 14:44:22.570278 SPI: 00 enabled
1029 14:44:22.573511 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 14:44:22.580107 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 14:44:22.583441 PCI: 00:1f.0 scanning...
1032 14:44:22.586693 scan_static_bus for PCI: 00:1f.0
1033 14:44:22.586782 PNP: 0c09.0 enabled
1034 14:44:22.590101 PNP: 0c09.0 scanning...
1035 14:44:22.593480 scan_static_bus for PNP: 0c09.0
1036 14:44:22.596873 scan_static_bus for PNP: 0c09.0 done
1037 14:44:22.603461 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 14:44:22.606914 scan_static_bus for PCI: 00:1f.0 done
1039 14:44:22.610153 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 14:44:22.613403 PCI: 00:1f.2 scanning...
1041 14:44:22.616838 scan_static_bus for PCI: 00:1f.2
1042 14:44:22.620038 GENERIC: 0.0 enabled
1043 14:44:22.620153 GENERIC: 0.0 scanning...
1044 14:44:22.623434 scan_static_bus for GENERIC: 0.0
1045 14:44:22.626698 GENERIC: 0.0 enabled
1046 14:44:22.629989 GENERIC: 1.0 enabled
1047 14:44:22.633361 scan_static_bus for GENERIC: 0.0 done
1048 14:44:22.636583 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 14:44:22.643136 scan_static_bus for PCI: 00:1f.2 done
1050 14:44:22.646375 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 14:44:22.649740 PCI: 00:1f.3 scanning...
1052 14:44:22.652983 scan_static_bus for PCI: 00:1f.3
1053 14:44:22.656216 scan_static_bus for PCI: 00:1f.3 done
1054 14:44:22.659458 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 14:44:22.662651 PCI: 00:1f.5 scanning...
1056 14:44:22.665992 scan_generic_bus for PCI: 00:1f.5
1057 14:44:22.669294 scan_generic_bus for PCI: 00:1f.5 done
1058 14:44:22.676649 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 14:44:22.679342 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1060 14:44:22.682601 scan_static_bus for Root Device done
1061 14:44:22.689807 scan_bus: bus Root Device finished in 737 msecs
1062 14:44:22.689896 done
1063 14:44:22.695930 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 14:44:22.699128 Chrome EC: UHEPI supported
1065 14:44:22.705817 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 14:44:22.712923 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 14:44:22.716197 SPI flash protection: WPSW=0 SRP0=0
1068 14:44:22.718966 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 14:44:22.725661 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 14:44:22.728991 found VGA at PCI: 00:02.0
1071 14:44:22.732264 Setting up VGA for PCI: 00:02.0
1072 14:44:22.736093 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 14:44:22.742390 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 14:44:22.745814 Allocating resources...
1075 14:44:22.745932 Reading resources...
1076 14:44:22.749151 Root Device read_resources bus 0 link: 0
1077 14:44:22.755519 DOMAIN: 0000 read_resources bus 0 link: 0
1078 14:44:22.758942 PCI: 00:04.0 read_resources bus 1 link: 0
1079 14:44:22.765434 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 14:44:22.768752 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 14:44:22.775347 USB0 port 0 read_resources bus 0 link: 0
1082 14:44:22.778656 USB0 port 0 read_resources bus 0 link: 0 done
1083 14:44:22.785785 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 14:44:22.788745 PCI: 00:14.0 read_resources bus 0 link: 0
1085 14:44:22.791938 USB0 port 0 read_resources bus 0 link: 0
1086 14:44:22.799781 USB0 port 0 read_resources bus 0 link: 0 done
1087 14:44:22.803080 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 14:44:22.809954 PCI: 00:14.3 read_resources bus 0 link: 0
1089 14:44:22.813127 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 14:44:22.819557 PCI: 00:15.0 read_resources bus 0 link: 0
1091 14:44:22.823153 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 14:44:22.829382 PCI: 00:15.1 read_resources bus 0 link: 0
1093 14:44:22.832741 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 14:44:22.840546 PCI: 00:19.1 read_resources bus 0 link: 0
1095 14:44:22.843609 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 14:44:22.849899 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 14:44:22.853385 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 14:44:22.860287 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 14:44:22.863479 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 14:44:22.870192 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 14:44:22.873580 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 14:44:22.880057 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 14:44:22.883451 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 14:44:22.889995 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 14:44:22.893295 GENERIC: 0.0 read_resources bus 0 link: 0
1106 14:44:22.899929 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 14:44:22.903316 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 14:44:22.909975 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 14:44:22.912785 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 14:44:22.919400 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 14:44:22.922679 Root Device read_resources bus 0 link: 0 done
1112 14:44:22.925947 Done reading resources.
1113 14:44:22.932656 Show resources in subtree (Root Device)...After reading.
1114 14:44:22.935980 Root Device child on link 0 DOMAIN: 0000
1115 14:44:22.939345 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 14:44:22.949581 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 14:44:22.959485 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 14:44:22.959618 PCI: 00:00.0
1119 14:44:22.969285 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 14:44:22.979115 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 14:44:22.989417 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 14:44:22.998953 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 14:44:23.008946 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 14:44:23.019102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 14:44:23.025708 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 14:44:23.035717 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 14:44:23.045521 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 14:44:23.055337 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 14:44:23.065759 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 14:44:23.072193 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 14:44:23.082143 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 14:44:23.092045 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 14:44:23.102106 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 14:44:23.111986 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 14:44:23.121687 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 14:44:23.131727 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 14:44:23.138409 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 14:44:23.148621 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 14:44:23.151867 PCI: 00:02.0
1140 14:44:23.161784 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 14:44:23.171501 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 14:44:23.181391 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 14:44:23.184731 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 14:44:23.195077 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 14:44:23.195224 GENERIC: 0.0
1146 14:44:23.198408 PCI: 00:05.0
1147 14:44:23.208016 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 14:44:23.211243 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 14:44:23.214616 GENERIC: 0.0
1150 14:44:23.214721 PCI: 00:08.0
1151 14:44:23.224456 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:44:23.227736 PCI: 00:0a.0
1153 14:44:23.231072 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 14:44:23.240962 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 14:44:23.247740 USB0 port 0 child on link 0 USB3 port 0
1156 14:44:23.247885 USB3 port 0
1157 14:44:23.251338 USB3 port 1
1158 14:44:23.251456 USB3 port 2
1159 14:44:23.254604 USB3 port 3
1160 14:44:23.258083 PCI: 00:14.0 child on link 0 USB0 port 0
1161 14:44:23.267812 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 14:44:23.271016 USB0 port 0 child on link 0 USB2 port 0
1163 14:44:23.274320 USB2 port 0
1164 14:44:23.274448 USB2 port 1
1165 14:44:23.278032 USB2 port 2
1166 14:44:23.281413 USB2 port 3
1167 14:44:23.281533 USB2 port 4
1168 14:44:23.284619 USB2 port 5
1169 14:44:23.284727 USB2 port 6
1170 14:44:23.287910 USB2 port 7
1171 14:44:23.288021 USB2 port 8
1172 14:44:23.291212 USB2 port 9
1173 14:44:23.291318 USB3 port 0
1174 14:44:23.294767 USB3 port 1
1175 14:44:23.294878 USB3 port 2
1176 14:44:23.297695 USB3 port 3
1177 14:44:23.297802 PCI: 00:14.2
1178 14:44:23.307608 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 14:44:23.317623 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 14:44:23.324141 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 14:44:23.334033 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 14:44:23.334173 GENERIC: 0.0
1183 14:44:23.340609 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 14:44:23.350670 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 14:44:23.350786 I2C: 00:1a
1186 14:44:23.350882 I2C: 00:31
1187 14:44:23.354062 I2C: 00:32
1188 14:44:23.357273 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 14:44:23.367182 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:44:23.371043 I2C: 00:10
1191 14:44:23.371159 PCI: 00:15.2
1192 14:44:23.380739 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 14:44:23.384068 PCI: 00:15.3
1194 14:44:23.393888 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:44:23.394020 PCI: 00:16.0
1196 14:44:23.403705 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 14:44:23.407057 PCI: 00:19.0
1198 14:44:23.410392 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 14:44:23.420464 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 14:44:23.423818 I2C: 00:15
1201 14:44:23.427061 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 14:44:23.433598 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 14:44:23.443650 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 14:44:23.453547 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 14:44:23.456617 GENERIC: 0.0
1206 14:44:23.456735 PCI: 01:00.0
1207 14:44:23.466977 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 14:44:23.476738 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 14:44:23.487079 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 14:44:23.487208 PCI: 00:1e.0
1211 14:44:23.500189 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 14:44:23.503659 PCI: 00:1e.2 child on link 0 SPI: 00
1213 14:44:23.513568 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 14:44:23.513678 SPI: 00
1215 14:44:23.519755 PCI: 00:1e.3 child on link 0 SPI: 00
1216 14:44:23.529962 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 14:44:23.530084 SPI: 00
1218 14:44:23.533360 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 14:44:23.543173 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 14:44:23.543282 PNP: 0c09.0
1221 14:44:23.553445 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 14:44:23.556491 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 14:44:23.566392 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 14:44:23.576569 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 14:44:23.579835 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 14:44:23.583094 GENERIC: 0.0
1227 14:44:23.583190 GENERIC: 1.0
1228 14:44:23.586455 PCI: 00:1f.3
1229 14:44:23.596356 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 14:44:23.606141 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 14:44:23.609369 PCI: 00:1f.5
1232 14:44:23.615979 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 14:44:23.622675 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 14:44:23.622770 APIC: 00
1235 14:44:23.622838 APIC: 01
1236 14:44:23.626137 APIC: 02
1237 14:44:23.626228 APIC: 07
1238 14:44:23.626296 APIC: 05
1239 14:44:23.629305 APIC: 04
1240 14:44:23.629390 APIC: 03
1241 14:44:23.632946 APIC: 06
1242 14:44:23.639123 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 14:44:23.646260 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 14:44:23.652391 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 14:44:23.655820 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 14:44:23.662774 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 14:44:23.665963 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 14:44:23.669292 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 14:44:23.675682 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 14:44:23.685638 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 14:44:23.692860 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 14:44:23.699485 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 14:44:23.705968 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 14:44:23.712557 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 14:44:23.719074 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 14:44:23.729346 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 14:44:23.732580 DOMAIN: 0000: Resource ranges:
1258 14:44:23.735748 * Base: 1000, Size: 800, Tag: 100
1259 14:44:23.739124 * Base: 1900, Size: e700, Tag: 100
1260 14:44:23.745789 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 14:44:23.751996 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 14:44:23.758488 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 14:44:23.765643 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 14:44:23.772305 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 14:44:23.782048 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 14:44:23.788798 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 14:44:23.795082 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 14:44:23.805067 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 14:44:23.812102 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 14:44:23.818186 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 14:44:23.825024 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 14:44:23.834970 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 14:44:23.841494 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 14:44:23.848279 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 14:44:23.858222 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 14:44:23.864578 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 14:44:23.871779 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 14:44:23.881420 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 14:44:23.887924 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 14:44:23.894664 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 14:44:23.904662 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 14:44:23.911192 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 14:44:23.917730 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 14:44:23.927746 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 14:44:23.931025 DOMAIN: 0000: Resource ranges:
1286 14:44:23.934314 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 14:44:23.937962 * Base: d0000000, Size: 28000000, Tag: 200
1288 14:44:23.944557 * Base: fa000000, Size: 1000000, Tag: 200
1289 14:44:23.947788 * Base: fb001000, Size: 2fff000, Tag: 200
1290 14:44:23.951138 * Base: fe010000, Size: 2e000, Tag: 200
1291 14:44:23.954425 * Base: fe03f000, Size: d41000, Tag: 200
1292 14:44:23.961181 * Base: fed88000, Size: 8000, Tag: 200
1293 14:44:23.964225 * Base: fed93000, Size: d000, Tag: 200
1294 14:44:23.967452 * Base: feda2000, Size: 1e000, Tag: 200
1295 14:44:23.970840 * Base: fede0000, Size: 1220000, Tag: 200
1296 14:44:23.977482 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 14:44:23.984369 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 14:44:23.990933 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 14:44:23.997589 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 14:44:24.004365 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 14:44:24.010863 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 14:44:24.017461 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 14:44:24.024161 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 14:44:24.030914 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 14:44:24.037488 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 14:44:24.043929 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 14:44:24.050454 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 14:44:24.057073 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 14:44:24.063690 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 14:44:24.070401 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 14:44:24.077167 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 14:44:24.083611 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 14:44:24.090142 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 14:44:24.096808 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 14:44:24.103394 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 14:44:24.110063 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 14:44:24.116651 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 14:44:24.123360 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 14:44:24.129971 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 14:44:24.139935 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 14:44:24.143201 PCI: 00:1d.0: Resource ranges:
1322 14:44:24.146548 * Base: 7fc00000, Size: 100000, Tag: 200
1323 14:44:24.153263 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 14:44:24.159833 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 14:44:24.166364 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 14:44:24.173251 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 14:44:24.183260 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 14:44:24.186520 Root Device assign_resources, bus 0 link: 0
1329 14:44:24.189980 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 14:44:24.199906 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 14:44:24.206360 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 14:44:24.216234 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 14:44:24.222870 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 14:44:24.229563 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 14:44:24.233013 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 14:44:24.242331 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 14:44:24.249301 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 14:44:24.259447 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 14:44:24.262157 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 14:44:24.266047 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 14:44:24.275895 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 14:44:24.279191 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 14:44:24.285831 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 14:44:24.292350 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 14:44:24.302059 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 14:44:24.308767 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 14:44:24.312114 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 14:44:24.318575 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 14:44:24.325175 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 14:44:24.331868 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 14:44:24.335084 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 14:44:24.344922 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 14:44:24.348208 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 14:44:24.351584 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 14:44:24.361429 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 14:44:24.368342 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 14:44:24.378330 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 14:44:24.385010 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 14:44:24.391479 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 14:44:24.394725 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 14:44:24.404616 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 14:44:24.414435 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 14:44:24.421090 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 14:44:24.427831 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 14:44:24.434419 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 14:44:24.444410 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 14:44:24.450888 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 14:44:24.454241 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 14:44:24.464013 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 14:44:24.467362 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 14:44:24.474356 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 14:44:24.480868 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 14:44:24.487394 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 14:44:24.490590 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 14:44:24.493813 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 14:44:24.500863 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 14:44:24.504149 LPC: Trying to open IO window from 800 size 1ff
1378 14:44:24.514325 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 14:44:24.520835 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 14:44:24.530786 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 14:44:24.534206 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 14:44:24.540935 Root Device assign_resources, bus 0 link: 0
1383 14:44:24.541065 Done setting resources.
1384 14:44:24.547521 Show resources in subtree (Root Device)...After assigning values.
1385 14:44:24.554076 Root Device child on link 0 DOMAIN: 0000
1386 14:44:24.557562 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 14:44:24.567291 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 14:44:24.577132 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 14:44:24.577283 PCI: 00:00.0
1390 14:44:24.587025 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 14:44:24.596849 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 14:44:24.607099 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 14:44:24.617171 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 14:44:24.623358 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 14:44:24.633383 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 14:44:24.643466 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 14:44:24.653240 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 14:44:24.663272 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 14:44:24.669933 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 14:44:24.679679 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 14:44:24.689882 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 14:44:24.699831 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 14:44:24.709503 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 14:44:24.716151 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 14:44:24.726587 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 14:44:24.736549 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 14:44:24.745973 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 14:44:24.756027 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 14:44:24.766284 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 14:44:24.766390 PCI: 00:02.0
1411 14:44:24.779427 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 14:44:24.789545 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 14:44:24.799108 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 14:44:24.802389 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 14:44:24.812729 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 14:44:24.816093 GENERIC: 0.0
1417 14:44:24.816181 PCI: 00:05.0
1418 14:44:24.826031 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 14:44:24.832615 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 14:44:24.832709 GENERIC: 0.0
1421 14:44:24.835937 PCI: 00:08.0
1422 14:44:24.845525 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 14:44:24.845612 PCI: 00:0a.0
1424 14:44:24.852197 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 14:44:24.862461 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 14:44:24.865776 USB0 port 0 child on link 0 USB3 port 0
1427 14:44:24.869047 USB3 port 0
1428 14:44:24.869134 USB3 port 1
1429 14:44:24.872488 USB3 port 2
1430 14:44:24.872578 USB3 port 3
1431 14:44:24.879080 PCI: 00:14.0 child on link 0 USB0 port 0
1432 14:44:24.888799 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 14:44:24.892523 USB0 port 0 child on link 0 USB2 port 0
1434 14:44:24.895440 USB2 port 0
1435 14:44:24.895527 USB2 port 1
1436 14:44:24.899101 USB2 port 2
1437 14:44:24.899198 USB2 port 3
1438 14:44:24.902211 USB2 port 4
1439 14:44:24.902297 USB2 port 5
1440 14:44:24.905550 USB2 port 6
1441 14:44:24.905636 USB2 port 7
1442 14:44:24.908875 USB2 port 8
1443 14:44:24.908962 USB2 port 9
1444 14:44:24.912043 USB3 port 0
1445 14:44:24.912129 USB3 port 1
1446 14:44:24.915365 USB3 port 2
1447 14:44:24.918678 USB3 port 3
1448 14:44:24.918763 PCI: 00:14.2
1449 14:44:24.928603 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 14:44:24.938534 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 14:44:24.945319 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 14:44:24.955273 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 14:44:24.955371 GENERIC: 0.0
1454 14:44:24.961684 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 14:44:24.971647 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 14:44:24.971751 I2C: 00:1a
1457 14:44:24.975031 I2C: 00:31
1458 14:44:24.975131 I2C: 00:32
1459 14:44:24.978352 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 14:44:24.991908 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 14:44:24.992006 I2C: 00:10
1462 14:44:24.995231 PCI: 00:15.2
1463 14:44:25.005055 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 14:44:25.005151 PCI: 00:15.3
1465 14:44:25.014992 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 14:44:25.018322 PCI: 00:16.0
1467 14:44:25.028050 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 14:44:25.028151 PCI: 00:19.0
1469 14:44:25.035038 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 14:44:25.044531 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 14:44:25.044636 I2C: 00:15
1472 14:44:25.051303 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 14:44:25.057980 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 14:44:25.071113 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 14:44:25.081018 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 14:44:25.084421 GENERIC: 0.0
1477 14:44:25.084532 PCI: 01:00.0
1478 14:44:25.094466 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 14:44:25.104234 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 14:44:25.117396 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 14:44:25.117532 PCI: 00:1e.0
1482 14:44:25.127304 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 14:44:25.134323 PCI: 00:1e.2 child on link 0 SPI: 00
1484 14:44:25.144333 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 14:44:25.144430 SPI: 00
1486 14:44:25.147220 PCI: 00:1e.3 child on link 0 SPI: 00
1487 14:44:25.160610 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 14:44:25.160712 SPI: 00
1489 14:44:25.164028 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 14:44:25.174378 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 14:44:25.174476 PNP: 0c09.0
1492 14:44:25.183859 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 14:44:25.187028 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 14:44:25.197250 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 14:44:25.207011 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 14:44:25.210752 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 14:44:25.213994 GENERIC: 0.0
1498 14:44:25.214089 GENERIC: 1.0
1499 14:44:25.217292 PCI: 00:1f.3
1500 14:44:25.227064 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 14:44:25.237082 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 14:44:25.240339 PCI: 00:1f.5
1503 14:44:25.250385 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 14:44:25.253769 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 14:44:25.256991 APIC: 00
1506 14:44:25.257114 APIC: 01
1507 14:44:25.257245 APIC: 02
1508 14:44:25.260204 APIC: 07
1509 14:44:25.260356 APIC: 05
1510 14:44:25.260447 APIC: 04
1511 14:44:25.263645 APIC: 03
1512 14:44:25.263735 APIC: 06
1513 14:44:25.266887 Done allocating resources.
1514 14:44:25.273847 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 14:44:25.280222 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 14:44:25.283501 Configure GPIOs for I2S audio on UP4.
1517 14:44:25.290017 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 14:44:25.293260 Enabling resources...
1519 14:44:25.296511 PCI: 00:00.0 subsystem <- 8086/9a12
1520 14:44:25.299820 PCI: 00:00.0 cmd <- 06
1521 14:44:25.303218 PCI: 00:02.0 subsystem <- 8086/9a40
1522 14:44:25.303309 PCI: 00:02.0 cmd <- 03
1523 14:44:25.310265 PCI: 00:04.0 subsystem <- 8086/9a03
1524 14:44:25.310362 PCI: 00:04.0 cmd <- 02
1525 14:44:25.313359 PCI: 00:05.0 subsystem <- 8086/9a19
1526 14:44:25.316576 PCI: 00:05.0 cmd <- 02
1527 14:44:25.319810 PCI: 00:08.0 subsystem <- 8086/9a11
1528 14:44:25.323203 PCI: 00:08.0 cmd <- 06
1529 14:44:25.326715 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 14:44:25.329910 PCI: 00:0d.0 cmd <- 02
1531 14:44:25.333281 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 14:44:25.336512 PCI: 00:14.0 cmd <- 02
1533 14:44:25.339860 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 14:44:25.343115 PCI: 00:14.2 cmd <- 02
1535 14:44:25.346523 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 14:44:25.349365 PCI: 00:14.3 cmd <- 02
1537 14:44:25.352739 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 14:44:25.352830 PCI: 00:15.0 cmd <- 02
1539 14:44:25.359971 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 14:44:25.360144 PCI: 00:15.1 cmd <- 02
1541 14:44:25.362909 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 14:44:25.366685 PCI: 00:15.2 cmd <- 02
1543 14:44:25.369409 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 14:44:25.373105 PCI: 00:15.3 cmd <- 02
1545 14:44:25.376179 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 14:44:25.379448 PCI: 00:16.0 cmd <- 02
1547 14:44:25.382749 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 14:44:25.386097 PCI: 00:19.1 cmd <- 02
1549 14:44:25.389473 PCI: 00:1d.0 bridge ctrl <- 0013
1550 14:44:25.392734 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 14:44:25.395935 PCI: 00:1d.0 cmd <- 06
1552 14:44:25.399222 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 14:44:25.402414 PCI: 00:1e.0 cmd <- 06
1554 14:44:25.405759 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 14:44:25.405873 PCI: 00:1e.2 cmd <- 06
1556 14:44:25.412710 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 14:44:25.412839 PCI: 00:1e.3 cmd <- 02
1558 14:44:25.415905 PCI: 00:1f.0 subsystem <- 8086/a087
1559 14:44:25.419126 PCI: 00:1f.0 cmd <- 407
1560 14:44:25.423059 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 14:44:25.425802 PCI: 00:1f.3 cmd <- 02
1562 14:44:25.429050 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 14:44:25.432490 PCI: 00:1f.5 cmd <- 406
1564 14:44:25.436774 PCI: 01:00.0 cmd <- 02
1565 14:44:25.441700 done.
1566 14:44:25.444852 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 14:44:25.448270 Initializing devices...
1568 14:44:25.451058 Root Device init
1569 14:44:25.454431 Chrome EC: Set SMI mask to 0x0000000000000000
1570 14:44:25.461121 Chrome EC: clear events_b mask to 0x0000000000000000
1571 14:44:25.467640 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 14:44:25.474310 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 14:44:25.481171 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 14:44:25.484191 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 14:44:25.492473 fw_config match found: DB_USB=USB3_ACTIVE
1576 14:44:25.495815 Configure Right Type-C port orientation for retimer
1577 14:44:25.499171 Root Device init finished in 46 msecs
1578 14:44:25.503420 PCI: 00:00.0 init
1579 14:44:25.506780 CPU TDP = 9 Watts
1580 14:44:25.506911 CPU PL1 = 9 Watts
1581 14:44:25.510135 CPU PL2 = 40 Watts
1582 14:44:25.513304 CPU PL4 = 83 Watts
1583 14:44:25.516670 PCI: 00:00.0 init finished in 8 msecs
1584 14:44:25.516757 PCI: 00:02.0 init
1585 14:44:25.519992 GMA: Found VBT in CBFS
1586 14:44:25.523436 GMA: Found valid VBT in CBFS
1587 14:44:25.530132 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 14:44:25.536771 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 14:44:25.539945 PCI: 00:02.0 init finished in 18 msecs
1590 14:44:25.543187 PCI: 00:05.0 init
1591 14:44:25.546493 PCI: 00:05.0 init finished in 0 msecs
1592 14:44:25.549913 PCI: 00:08.0 init
1593 14:44:25.553273 PCI: 00:08.0 init finished in 0 msecs
1594 14:44:25.556685 PCI: 00:14.0 init
1595 14:44:25.559419 PCI: 00:14.0 init finished in 0 msecs
1596 14:44:25.562855 PCI: 00:14.2 init
1597 14:44:25.566155 PCI: 00:14.2 init finished in 0 msecs
1598 14:44:25.569698 PCI: 00:15.0 init
1599 14:44:25.572902 I2C bus 0 version 0x3230302a
1600 14:44:25.576244 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 14:44:25.579412 PCI: 00:15.0 init finished in 6 msecs
1602 14:44:25.579507 PCI: 00:15.1 init
1603 14:44:25.582739 I2C bus 1 version 0x3230302a
1604 14:44:25.586360 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 14:44:25.592534 PCI: 00:15.1 init finished in 6 msecs
1606 14:44:25.592637 PCI: 00:15.2 init
1607 14:44:25.595789 I2C bus 2 version 0x3230302a
1608 14:44:25.599183 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 14:44:25.602875 PCI: 00:15.2 init finished in 6 msecs
1610 14:44:25.606294 PCI: 00:15.3 init
1611 14:44:25.609580 I2C bus 3 version 0x3230302a
1612 14:44:25.612814 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 14:44:25.616060 PCI: 00:15.3 init finished in 6 msecs
1614 14:44:25.619262 PCI: 00:16.0 init
1615 14:44:25.622697 PCI: 00:16.0 init finished in 0 msecs
1616 14:44:25.626063 PCI: 00:19.1 init
1617 14:44:25.629273 I2C bus 5 version 0x3230302a
1618 14:44:25.632532 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 14:44:25.635862 PCI: 00:19.1 init finished in 6 msecs
1620 14:44:25.639775 PCI: 00:1d.0 init
1621 14:44:25.639941 Initializing PCH PCIe bridge.
1622 14:44:25.645991 PCI: 00:1d.0 init finished in 3 msecs
1623 14:44:25.649380 PCI: 00:1f.0 init
1624 14:44:25.652715 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 14:44:25.656038 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 14:44:25.659472 IOAPIC: ID = 0x02
1627 14:44:25.662229 IOAPIC: Dumping registers
1628 14:44:25.662317 reg 0x0000: 0x02000000
1629 14:44:25.665537 reg 0x0001: 0x00770020
1630 14:44:25.668956 reg 0x0002: 0x00000000
1631 14:44:25.672286 PCI: 00:1f.0 init finished in 21 msecs
1632 14:44:25.675535 PCI: 00:1f.2 init
1633 14:44:25.679483 Disabling ACPI via APMC.
1634 14:44:25.679604 APMC done.
1635 14:44:25.682715 PCI: 00:1f.2 init finished in 5 msecs
1636 14:44:25.695788 PCI: 01:00.0 init
1637 14:44:25.699197 PCI: 01:00.0 init finished in 0 msecs
1638 14:44:25.702807 PNP: 0c09.0 init
1639 14:44:25.706099 Google Chrome EC uptime: 8.406 seconds
1640 14:44:25.712609 Google Chrome AP resets since EC boot: 1
1641 14:44:25.715929 Google Chrome most recent AP reset causes:
1642 14:44:25.719316 0.347: 32775 shutdown: entering G3
1643 14:44:25.725831 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 14:44:25.729097 PNP: 0c09.0 init finished in 22 msecs
1645 14:44:25.734681 Devices initialized
1646 14:44:25.737849 Show all devs... After init.
1647 14:44:25.741237 Root Device: enabled 1
1648 14:44:25.741362 DOMAIN: 0000: enabled 1
1649 14:44:25.745156 CPU_CLUSTER: 0: enabled 1
1650 14:44:25.748261 PCI: 00:00.0: enabled 1
1651 14:44:25.751660 PCI: 00:02.0: enabled 1
1652 14:44:25.751745 PCI: 00:04.0: enabled 1
1653 14:44:25.754950 PCI: 00:05.0: enabled 1
1654 14:44:25.758215 PCI: 00:06.0: enabled 0
1655 14:44:25.761179 PCI: 00:07.0: enabled 0
1656 14:44:25.761263 PCI: 00:07.1: enabled 0
1657 14:44:25.764562 PCI: 00:07.2: enabled 0
1658 14:44:25.767857 PCI: 00:07.3: enabled 0
1659 14:44:25.771123 PCI: 00:08.0: enabled 1
1660 14:44:25.771228 PCI: 00:09.0: enabled 0
1661 14:44:25.774473 PCI: 00:0a.0: enabled 0
1662 14:44:25.777832 PCI: 00:0d.0: enabled 1
1663 14:44:25.781560 PCI: 00:0d.1: enabled 0
1664 14:44:25.781656 PCI: 00:0d.2: enabled 0
1665 14:44:25.784920 PCI: 00:0d.3: enabled 0
1666 14:44:25.788020 PCI: 00:0e.0: enabled 0
1667 14:44:25.788112 PCI: 00:10.2: enabled 1
1668 14:44:25.790958 PCI: 00:10.6: enabled 0
1669 14:44:25.794762 PCI: 00:10.7: enabled 0
1670 14:44:25.798089 PCI: 00:12.0: enabled 0
1671 14:44:25.798181 PCI: 00:12.6: enabled 0
1672 14:44:25.801418 PCI: 00:13.0: enabled 0
1673 14:44:25.804831 PCI: 00:14.0: enabled 1
1674 14:44:25.808003 PCI: 00:14.1: enabled 0
1675 14:44:25.808088 PCI: 00:14.2: enabled 1
1676 14:44:25.811372 PCI: 00:14.3: enabled 1
1677 14:44:25.814668 PCI: 00:15.0: enabled 1
1678 14:44:25.817907 PCI: 00:15.1: enabled 1
1679 14:44:25.818007 PCI: 00:15.2: enabled 1
1680 14:44:25.821261 PCI: 00:15.3: enabled 1
1681 14:44:25.824670 PCI: 00:16.0: enabled 1
1682 14:44:25.824772 PCI: 00:16.1: enabled 0
1683 14:44:25.827954 PCI: 00:16.2: enabled 0
1684 14:44:25.831281 PCI: 00:16.3: enabled 0
1685 14:44:25.834524 PCI: 00:16.4: enabled 0
1686 14:44:25.834615 PCI: 00:16.5: enabled 0
1687 14:44:25.837786 PCI: 00:17.0: enabled 0
1688 14:44:25.841111 PCI: 00:19.0: enabled 0
1689 14:44:25.844306 PCI: 00:19.1: enabled 1
1690 14:44:25.844392 PCI: 00:19.2: enabled 0
1691 14:44:25.847662 PCI: 00:1c.0: enabled 1
1692 14:44:25.850960 PCI: 00:1c.1: enabled 0
1693 14:44:25.854361 PCI: 00:1c.2: enabled 0
1694 14:44:25.854443 PCI: 00:1c.3: enabled 0
1695 14:44:25.857679 PCI: 00:1c.4: enabled 0
1696 14:44:25.861099 PCI: 00:1c.5: enabled 0
1697 14:44:25.864574 PCI: 00:1c.6: enabled 1
1698 14:44:25.864661 PCI: 00:1c.7: enabled 0
1699 14:44:25.867817 PCI: 00:1d.0: enabled 1
1700 14:44:25.870971 PCI: 00:1d.1: enabled 0
1701 14:44:25.871072 PCI: 00:1d.2: enabled 1
1702 14:44:25.874490 PCI: 00:1d.3: enabled 0
1703 14:44:25.877408 PCI: 00:1e.0: enabled 1
1704 14:44:25.880649 PCI: 00:1e.1: enabled 0
1705 14:44:25.880738 PCI: 00:1e.2: enabled 1
1706 14:44:25.884125 PCI: 00:1e.3: enabled 1
1707 14:44:25.887537 PCI: 00:1f.0: enabled 1
1708 14:44:25.890891 PCI: 00:1f.1: enabled 0
1709 14:44:25.890975 PCI: 00:1f.2: enabled 1
1710 14:44:25.894138 PCI: 00:1f.3: enabled 1
1711 14:44:25.897343 PCI: 00:1f.4: enabled 0
1712 14:44:25.900890 PCI: 00:1f.5: enabled 1
1713 14:44:25.900967 PCI: 00:1f.6: enabled 0
1714 14:44:25.904082 PCI: 00:1f.7: enabled 0
1715 14:44:25.907239 APIC: 00: enabled 1
1716 14:44:25.907330 GENERIC: 0.0: enabled 1
1717 14:44:25.910497 GENERIC: 0.0: enabled 1
1718 14:44:25.914254 GENERIC: 1.0: enabled 1
1719 14:44:25.917214 GENERIC: 0.0: enabled 1
1720 14:44:25.917293 GENERIC: 1.0: enabled 1
1721 14:44:25.920881 USB0 port 0: enabled 1
1722 14:44:25.924142 GENERIC: 0.0: enabled 1
1723 14:44:25.924243 USB0 port 0: enabled 1
1724 14:44:25.927418 GENERIC: 0.0: enabled 1
1725 14:44:25.930573 I2C: 00:1a: enabled 1
1726 14:44:25.934031 I2C: 00:31: enabled 1
1727 14:44:25.934115 I2C: 00:32: enabled 1
1728 14:44:25.937160 I2C: 00:10: enabled 1
1729 14:44:25.940496 I2C: 00:15: enabled 1
1730 14:44:25.940581 GENERIC: 0.0: enabled 0
1731 14:44:25.943812 GENERIC: 1.0: enabled 0
1732 14:44:25.947470 GENERIC: 0.0: enabled 1
1733 14:44:25.947586 SPI: 00: enabled 1
1734 14:44:25.950899 SPI: 00: enabled 1
1735 14:44:25.953766 PNP: 0c09.0: enabled 1
1736 14:44:25.953853 GENERIC: 0.0: enabled 1
1737 14:44:25.957033 USB3 port 0: enabled 1
1738 14:44:25.960306 USB3 port 1: enabled 1
1739 14:44:25.963811 USB3 port 2: enabled 0
1740 14:44:25.963900 USB3 port 3: enabled 0
1741 14:44:25.967071 USB2 port 0: enabled 0
1742 14:44:25.970402 USB2 port 1: enabled 1
1743 14:44:25.970489 USB2 port 2: enabled 1
1744 14:44:25.973932 USB2 port 3: enabled 0
1745 14:44:25.977299 USB2 port 4: enabled 1
1746 14:44:25.977386 USB2 port 5: enabled 0
1747 14:44:25.980675 USB2 port 6: enabled 0
1748 14:44:25.983878 USB2 port 7: enabled 0
1749 14:44:25.987183 USB2 port 8: enabled 0
1750 14:44:25.987270 USB2 port 9: enabled 0
1751 14:44:25.990420 USB3 port 0: enabled 0
1752 14:44:25.993716 USB3 port 1: enabled 1
1753 14:44:25.993803 USB3 port 2: enabled 0
1754 14:44:25.997335 USB3 port 3: enabled 0
1755 14:44:26.000171 GENERIC: 0.0: enabled 1
1756 14:44:26.003590 GENERIC: 1.0: enabled 1
1757 14:44:26.003678 APIC: 01: enabled 1
1758 14:44:26.006907 APIC: 02: enabled 1
1759 14:44:26.006994 APIC: 07: enabled 1
1760 14:44:26.010653 APIC: 05: enabled 1
1761 14:44:26.013895 APIC: 04: enabled 1
1762 14:44:26.013982 APIC: 03: enabled 1
1763 14:44:26.017218 APIC: 06: enabled 1
1764 14:44:26.020473 PCI: 01:00.0: enabled 1
1765 14:44:26.023825 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1766 14:44:26.030296 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 14:44:26.033629 ELOG: NV offset 0xf30000 size 0x1000
1768 14:44:26.040329 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 14:44:26.046640 ELOG: Event(17) added with size 13 at 2022-09-18 13:33:55 UTC
1770 14:44:26.053632 ELOG: Event(92) added with size 9 at 2022-09-18 13:33:55 UTC
1771 14:44:26.060122 ELOG: Event(93) added with size 9 at 2022-09-18 13:33:55 UTC
1772 14:44:26.066799 ELOG: Event(9E) added with size 10 at 2022-09-18 13:33:55 UTC
1773 14:44:26.073474 ELOG: Event(9F) added with size 14 at 2022-09-18 13:33:55 UTC
1774 14:44:26.079740 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 14:44:26.082954 ELOG: Event(A1) added with size 10 at 2022-09-18 13:33:55 UTC
1776 14:44:26.089705 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1777 14:44:26.096580 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1778 14:44:26.099825 Finalize devices...
1779 14:44:26.099913 Devices finalized
1780 14:44:26.106387 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1781 14:44:26.112775 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1782 14:44:26.116561 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1783 14:44:26.122640 ME: HFSTS1 : 0x80030055
1784 14:44:26.126371 ME: HFSTS2 : 0x30280116
1785 14:44:26.129627 ME: HFSTS3 : 0x00000050
1786 14:44:26.136084 ME: HFSTS4 : 0x00004000
1787 14:44:26.139403 ME: HFSTS5 : 0x00000000
1788 14:44:26.142755 ME: HFSTS6 : 0x00400006
1789 14:44:26.149224 ME: Manufacturing Mode : YES
1790 14:44:26.152504 ME: SPI Protection Mode Enabled : NO
1791 14:44:26.155876 ME: FW Partition Table : OK
1792 14:44:26.159125 ME: Bringup Loader Failure : NO
1793 14:44:26.162503 ME: Firmware Init Complete : NO
1794 14:44:26.165737 ME: Boot Options Present : NO
1795 14:44:26.169047 ME: Update In Progress : NO
1796 14:44:26.172448 ME: D0i3 Support : YES
1797 14:44:26.179177 ME: Low Power State Enabled : NO
1798 14:44:26.182461 ME: CPU Replaced : YES
1799 14:44:26.185892 ME: CPU Replacement Valid : YES
1800 14:44:26.189180 ME: Current Working State : 5
1801 14:44:26.192400 ME: Current Operation State : 1
1802 14:44:26.195678 ME: Current Operation Mode : 3
1803 14:44:26.199386 ME: Error Code : 0
1804 14:44:26.202276 ME: Enhanced Debug Mode : NO
1805 14:44:26.206167 ME: CPU Debug Disabled : YES
1806 14:44:26.212213 ME: TXT Support : NO
1807 14:44:26.215901 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1808 14:44:26.225601 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 14:44:26.228738 CBFS: 'fallback/slic' not found.
1810 14:44:26.232080 ACPI: Writing ACPI tables at 76b01000.
1811 14:44:26.232168 ACPI: * FACS
1812 14:44:26.235356 ACPI: * DSDT
1813 14:44:26.238722 Ramoops buffer: 0x100000@0x76a00000.
1814 14:44:26.245372 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 14:44:26.248755 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 14:44:26.252123 Google Chrome EC: version:
1817 14:44:26.255360 ro: voema_v2.0.7540-147f8d37d1
1818 14:44:26.258724 rw: voema_v2.0.7540-147f8d37d1
1819 14:44:26.262068 running image: 2
1820 14:44:26.265489 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 14:44:26.270486 ACPI: * FADT
1822 14:44:26.270666 SCI is IRQ9
1823 14:44:26.277308 ACPI: added table 1/32, length now 40
1824 14:44:26.277420 ACPI: * SSDT
1825 14:44:26.280632 Found 1 CPU(s) with 8 core(s) each.
1826 14:44:26.287099 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 14:44:26.290495 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 14:44:26.293746 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 14:44:26.296949 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 14:44:26.304006 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 14:44:26.310554 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 14:44:26.313772 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 14:44:26.320341 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 14:44:26.326796 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 14:44:26.330680 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 14:44:26.333685 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 14:44:26.340260 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 14:44:26.346911 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 14:44:26.350276 PS2K: Passing 80 keymaps to kernel
1840 14:44:26.357071 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 14:44:26.363535 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 14:44:26.370188 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 14:44:26.376896 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 14:44:26.383525 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 14:44:26.390309 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 14:44:26.396987 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 14:44:26.399992 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 14:44:26.406416 ACPI: added table 2/32, length now 44
1849 14:44:26.406519 ACPI: * MCFG
1850 14:44:26.409843 ACPI: added table 3/32, length now 48
1851 14:44:26.413365 ACPI: * TPM2
1852 14:44:26.416355 TPM2 log created at 0x769f0000
1853 14:44:26.420101 ACPI: added table 4/32, length now 52
1854 14:44:26.420186 ACPI: * MADT
1855 14:44:26.423323 SCI is IRQ9
1856 14:44:26.426749 ACPI: added table 5/32, length now 56
1857 14:44:26.426837 current = 76b09850
1858 14:44:26.430041 ACPI: * DMAR
1859 14:44:26.433201 ACPI: added table 6/32, length now 60
1860 14:44:26.436351 ACPI: added table 7/32, length now 64
1861 14:44:26.440110 ACPI: * HPET
1862 14:44:26.442988 ACPI: added table 8/32, length now 68
1863 14:44:26.443074 ACPI: done.
1864 14:44:26.446351 ACPI tables: 35216 bytes.
1865 14:44:26.449681 smbios_write_tables: 769ef000
1866 14:44:26.453305 EC returned error result code 3
1867 14:44:26.456566 Couldn't obtain OEM name from CBI
1868 14:44:26.460016 Create SMBIOS type 16
1869 14:44:26.463315 Create SMBIOS type 17
1870 14:44:26.463406 GENERIC: 0.0 (WIFI Device)
1871 14:44:26.466930 SMBIOS tables: 1750 bytes.
1872 14:44:26.473085 Writing table forward entry at 0x00000500
1873 14:44:26.476210 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 14:44:26.482792 Writing coreboot table at 0x76b25000
1875 14:44:26.486240 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 14:44:26.492823 1. 0000000000001000-000000000009ffff: RAM
1877 14:44:26.496717 2. 00000000000a0000-00000000000fffff: RESERVED
1878 14:44:26.499895 3. 0000000000100000-00000000769eefff: RAM
1879 14:44:26.506446 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 14:44:26.512976 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 14:44:26.516193 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 14:44:26.522597 7. 0000000077000000-000000007fbfffff: RESERVED
1883 14:44:26.526332 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 14:44:26.532851 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 14:44:26.536069 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 14:44:26.542718 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 14:44:26.545980 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 14:44:26.549256 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 14:44:26.555845 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 14:44:26.559175 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 14:44:26.565677 16. 0000000100000000-00000002803fffff: RAM
1892 14:44:26.569037 Passing 4 GPIOs to payload:
1893 14:44:26.572634 NAME | PORT | POLARITY | VALUE
1894 14:44:26.579174 lid | undefined | high | high
1895 14:44:26.582510 power | undefined | high | low
1896 14:44:26.588861 oprom | undefined | high | low
1897 14:44:26.595482 EC in RW | 0x000000e5 | high | high
1898 14:44:26.598993 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1b40
1899 14:44:26.602543 coreboot table: 1576 bytes.
1900 14:44:26.605846 IMD ROOT 0. 0x76fff000 0x00001000
1901 14:44:26.612365 IMD SMALL 1. 0x76ffe000 0x00001000
1902 14:44:26.615651 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 14:44:26.618901 VPD 3. 0x76c4d000 0x00000367
1904 14:44:26.622178 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 14:44:26.625436 CONSOLE 5. 0x76c2c000 0x00020000
1906 14:44:26.628775 FMAP 6. 0x76c2b000 0x00000578
1907 14:44:26.632040 TIME STAMP 7. 0x76c2a000 0x00000910
1908 14:44:26.635431 VBOOT WORK 8. 0x76c16000 0x00014000
1909 14:44:26.641947 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 14:44:26.645350 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 14:44:26.648604 RAMSTAGE 11. 0x76b97000 0x00073000
1912 14:44:26.652141 REFCODE 12. 0x76b42000 0x00055000
1913 14:44:26.655306 SMM BACKUP 13. 0x76b32000 0x00010000
1914 14:44:26.658535 4f444749 14. 0x76b30000 0x00002000
1915 14:44:26.662271 EXT VBT15. 0x76b2d000 0x0000219f
1916 14:44:26.665860 COREBOOT 16. 0x76b25000 0x00008000
1917 14:44:26.668824 ACPI 17. 0x76b01000 0x00024000
1918 14:44:26.672099 ACPI GNVS 18. 0x76b00000 0x00001000
1919 14:44:26.678909 RAMOOPS 19. 0x76a00000 0x00100000
1920 14:44:26.682171 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 14:44:26.685672 SMBIOS 21. 0x769ef000 0x00000800
1922 14:44:26.685758 IMD small region:
1923 14:44:26.692302 IMD ROOT 0. 0x76ffec00 0x00000400
1924 14:44:26.695150 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 14:44:26.698466 POWER STATE 2. 0x76ffeb80 0x00000044
1926 14:44:26.701838 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 14:44:26.705367 MEM INFO 4. 0x76ffe980 0x000001e0
1928 14:44:26.711949 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1929 14:44:26.715149 MTRR: Physical address space:
1930 14:44:26.721780 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 14:44:26.728427 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 14:44:26.735041 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 14:44:26.738375 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 14:44:26.745444 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 14:44:26.751876 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 14:44:26.758492 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 14:44:26.761818 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 14:44:26.768446 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 14:44:26.771698 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 14:44:26.774974 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 14:44:26.778456 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 14:44:26.785293 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 14:44:26.788442 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 14:44:26.791823 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 14:44:26.794669 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 14:44:26.801425 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 14:44:26.804692 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 14:44:26.807981 call enable_fixed_mtrr()
1949 14:44:26.811160 CPU physical address size: 39 bits
1950 14:44:26.814556 MTRR: default type WB/UC MTRR counts: 6/6.
1951 14:44:26.818411 MTRR: UC selected as default type.
1952 14:44:26.824963 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 14:44:26.831397 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 14:44:26.837869 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 14:44:26.844506 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 14:44:26.851434 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 14:44:26.858077 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 14:44:26.858164
1959 14:44:26.858237 MTRR check
1960 14:44:26.861235 Fixed MTRRs : Enabled
1961 14:44:26.864517 Variable MTRRs: Enabled
1962 14:44:26.864603
1963 14:44:26.867722 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 14:44:26.870963 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 14:44:26.877660 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 14:44:26.880935 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 14:44:26.884398 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 14:44:26.887719 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 14:44:26.894507 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 14:44:26.897834 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 14:44:26.901060 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 14:44:26.904390 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 14:44:26.910788 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 14:44:26.917413 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1975 14:44:26.917501 call enable_fixed_mtrr()
1976 14:44:26.921220 Checking cr50 for pending updates
1977 14:44:26.924488 CPU physical address size: 39 bits
1978 14:44:26.931511 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 14:44:26.934823 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 14:44:26.938148 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 14:44:26.941443 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 14:44:26.947823 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 14:44:26.951061 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 14:44:26.954453 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 14:44:26.957685 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 14:44:26.964809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 14:44:26.967890 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 14:44:26.970840 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 14:44:26.974132 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 14:44:26.981336 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 14:44:26.981423 call enable_fixed_mtrr()
1992 14:44:26.987996 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 14:44:26.991373 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 14:44:26.994815 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 14:44:26.998190 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 14:44:27.004780 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 14:44:27.008239 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 14:44:27.011294 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 14:44:27.014489 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 14:44:27.021333 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 14:44:27.024773 CPU physical address size: 39 bits
2002 14:44:27.027957 call enable_fixed_mtrr()
2003 14:44:27.031210 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 14:44:27.034486 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 14:44:27.041119 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 14:44:27.044386 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 14:44:27.047472 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 14:44:27.051202 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 14:44:27.057724 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 14:44:27.061105 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 14:44:27.064403 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 14:44:27.067336 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 14:44:27.074264 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 14:44:27.077431 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 14:44:27.080931 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 14:44:27.087465 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 14:44:27.090959 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 14:44:27.094219 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 14:44:27.097641 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 14:44:27.104199 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 14:44:27.107696 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 14:44:27.111114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 14:44:27.114294 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 14:44:27.120862 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 14:44:27.123948 call enable_fixed_mtrr()
2026 14:44:27.124023 call enable_fixed_mtrr()
2027 14:44:27.127425 CPU physical address size: 39 bits
2028 14:44:27.134091 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 14:44:27.137496 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 14:44:27.140641 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 14:44:27.144004 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 14:44:27.150316 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 14:44:27.153669 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 14:44:27.156935 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 14:44:27.160029 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 14:44:27.167188 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 14:44:27.170620 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 14:44:27.173381 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 14:44:27.176836 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 14:44:27.183988 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 14:44:27.184086 call enable_fixed_mtrr()
2042 14:44:27.190454 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 14:44:27.193956 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 14:44:27.197275 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 14:44:27.200724 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 14:44:27.207395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 14:44:27.210611 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 14:44:27.214039 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 14:44:27.217351 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 14:44:27.223888 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 14:44:27.227037 CPU physical address size: 39 bits
2052 14:44:27.230362 call enable_fixed_mtrr()
2053 14:44:27.233675 CPU physical address size: 39 bits
2054 14:44:27.236844 CPU physical address size: 39 bits
2055 14:44:27.241120 Reading cr50 TPM mode
2056 14:44:27.244550 CPU physical address size: 39 bits
2057 14:44:27.251061 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2058 14:44:27.261230 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 14:44:27.264328 Checking segment from ROM address 0xffc02b38
2060 14:44:27.267653 Checking segment from ROM address 0xffc02b54
2061 14:44:27.274320 Loading segment from ROM address 0xffc02b38
2062 14:44:27.274411 code (compression=0)
2063 14:44:27.284350 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 14:44:27.291070 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 14:44:27.294545 it's not compressed!
2066 14:44:27.433833 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 14:44:27.440173 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 14:44:27.446779 Loading segment from ROM address 0xffc02b54
2069 14:44:27.446870 Entry Point 0x30000000
2070 14:44:27.450292 Loaded segments
2071 14:44:27.457030 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2072 14:44:27.499959 Finalizing chipset.
2073 14:44:27.503103 Finalizing SMM.
2074 14:44:27.503187 APMC done.
2075 14:44:27.509812 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 14:44:27.513127 mp_park_aps done after 0 msecs.
2077 14:44:27.516614 Jumping to boot code at 0x30000000(0x76b25000)
2078 14:44:27.526259 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 14:44:27.526344
2080 14:44:27.529606 Starting depthcharge on Voema...
2081 14:44:27.530029 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2082 14:44:27.530144 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2083 14:44:27.530234 Setting prompt string to ['volteer:']
2084 14:44:27.530322 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2085 14:44:27.539285 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 14:44:27.546074 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 14:44:27.552751 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2088 14:44:27.556145 Failed to find eMMC card reader
2089 14:44:27.556255 Wipe memory regions:
2090 14:44:27.563015 [0x00000000001000, 0x000000000a0000)
2091 14:44:27.565787 [0x00000000100000, 0x00000030000000)
2092 14:44:27.594128 [0x00000032662db0, 0x000000769ef000)
2093 14:44:27.633828 [0x00000100000000, 0x00000280400000)
2094 14:44:27.839108 ec_init: CrosEC protocol v3 supported (256, 256)
2095 14:44:27.845624 update_port_state: port C0 state: usb enable 1 mux conn 0
2096 14:44:27.855855 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2097 14:44:27.858905 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2098 14:44:27.865584 send_conn_disc_msg: pmc_send_cmd succeeded
2099 14:44:28.297229 R8152: Initializing
2100 14:44:28.300055 Version 6 (ocp_data = 5c30)
2101 14:44:28.303422 R8152: Done initializing
2102 14:44:28.306574 Adding net device
2103 14:44:28.612269 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 14:44:28.612428
2105 14:44:28.615340 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2107 14:44:28.716154 volteer: tftpboot 192.168.201.1 7305282/tftp-deploy-1ckrx1w0/kernel/bzImage 7305282/tftp-deploy-1ckrx1w0/kernel/cmdline 7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
2108 14:44:28.716414 Setting prompt string to 'Starting kernel'
2109 14:44:28.716519 Setting prompt string to ['Starting kernel']
2110 14:44:28.716601 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2111 14:44:28.716701 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:43)
2112 14:44:28.721072 tftpboot 192.168.201.1 7305282/tftp-deploy-1ckrx1w0/kernel/bzImoy-1ckrx1w0/kernel/cmdline 7305282/tftp-deploy-1ckrx1w0/ramdisk/ramdisk.cpio.gz
2113 14:44:28.721161 Waiting for link
2114 14:44:28.924815 done.
2115 14:44:28.925043 MAC: 00:24:32:30:7c:e4
2116 14:44:28.928704 Sending DHCP discover... done.
2117 14:44:28.931795 Waiting for reply... done.
2118 14:44:28.935099 Sending DHCP request... done.
2119 14:44:28.938379 Waiting for reply... done.
2120 14:44:28.941636 My ip is 192.168.201.23
2121 14:44:28.944856 The DHCP server ip is 192.168.201.1
2122 14:44:28.951391 TFTP server IP predefined by user: 192.168.201.1
2123 14:44:28.957912 Bootfile predefined by user: 7305282/tftp-deploy-1ckrx1w0/kernel/bzImage
2124 14:44:28.961544 Sending tftp read request... done.
2125 14:44:28.964670 Waiting for the transfer...
2126 14:44:29.509656 00000000 ################################################################
2127 14:44:30.048358 00080000 ################################################################
2128 14:44:30.585985 00100000 ################################################################
2129 14:44:31.124051 00180000 ################################################################
2130 14:44:31.672116 00200000 ################################################################
2131 14:44:32.230880 00280000 ################################################################
2132 14:44:32.797029 00300000 ################################################################
2133 14:44:33.332286 00380000 ################################################################
2134 14:44:33.896577 00400000 ################################################################
2135 14:44:34.439384 00480000 ################################################################
2136 14:44:34.995307 00500000 ################################################################
2137 14:44:35.538958 00580000 ################################################################
2138 14:44:36.072471 00600000 ################################################################ done.
2139 14:44:36.075704 The bootfile was 6815632 bytes long.
2140 14:44:36.079025 Sending tftp read request... done.
2141 14:44:36.082404 Waiting for the transfer...
2142 14:44:36.648664 00000000 ################################################################
2143 14:44:37.214853 00080000 ################################################################
2144 14:44:37.785511 00100000 ################################################################
2145 14:44:38.361361 00180000 ################################################################
2146 14:44:38.894775 00200000 ################################################################
2147 14:44:39.433073 00280000 ################################################################
2148 14:44:39.975263 00300000 ################################################################
2149 14:44:40.514827 00380000 ################################################################
2150 14:44:41.067749 00400000 ################################################################
2151 14:44:41.611744 00480000 ################################################################
2152 14:44:42.140134 00500000 ################################################################
2153 14:44:42.670738 00580000 ################################################################
2154 14:44:43.200519 00600000 ################################################################
2155 14:44:43.738295 00680000 ################################################################
2156 14:44:44.267043 00700000 ################################################################
2157 14:44:44.794643 00780000 ################################################################
2158 14:44:44.955295 00800000 #################### done.
2159 14:44:44.958756 Sending tftp read request... done.
2160 14:44:44.962138 Waiting for the transfer...
2161 14:44:44.962226 00000000 # done.
2162 14:44:44.971836 Command line loaded dynamically from TFTP file: 7305282/tftp-deploy-1ckrx1w0/kernel/cmdline
2163 14:44:44.985037 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2164 14:44:44.993131 Shutting down all USB controllers.
2165 14:44:44.993215 Removing current net device
2166 14:44:44.996565 Finalizing coreboot
2167 14:44:45.002606 Exiting depthcharge with code 4 at timestamp: 26109268
2168 14:44:45.002682
2169 14:44:45.002748 Starting kernel ...
2170 14:44:45.002812
2171 14:44:45.002875
2172 14:44:45.003175 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2173 14:44:45.003273 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2174 14:44:45.003349 Setting prompt string to ['Linux version [0-9]']
2175 14:44:45.003423 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
2176 14:44:45.003494 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
2178 14:49:11.004349 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2180 14:49:11.005377 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2182 14:49:11.006164 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 14:49:11.007600 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 14:49:11.008613 Cleaning after the job
2188 14:49:11.008939 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/ramdisk
2189 14:49:11.009573 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/kernel
2190 14:49:11.010089 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305282/tftp-deploy-1ckrx1w0/modules
2191 14:49:11.010282 start: 5.1 power-off (timeout 00:00:30) [common]
2192 14:49:11.010434 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2193 14:49:11.029134 >> Command sent successfully.
2194 14:49:11.030942 Returned 0 in 0 seconds
2195 14:49:11.132249 end: 5.1 power-off (duration 00:00:00) [common]
2197 14:49:11.133804 start: 5.2 read-feedback (timeout 00:10:00) [common]
2198 14:49:11.134889 Listened to connection for namespace 'common' for up to 1s
2199 14:49:12.138689 Finalising connection for namespace 'common'
2200 14:49:12.139442 Disconnecting from shell: Finalise
2201 14:49:12.241002 end: 5.2 read-feedback (duration 00:00:01) [common]
2202 14:49:12.241597 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7305282
2203 14:49:12.249842 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7305282
2204 14:49:12.249956 JobError: Your job cannot terminate cleanly.