Boot log: asus-cx9400-volteer

    1 14:44:07.156924  lava-dispatcher, installed at version: 2022.06
    2 14:44:07.157110  start: 0 validate
    3 14:44:07.157238  Start time: 2022-09-18 14:44:07.157230+00:00 (UTC)
    4 14:44:07.157360  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:44:07.157485  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:44:07.168652  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:44:07.168775  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:44:07.178280  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:44:07.178397  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:44:07.188550  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:44:07.188665  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-231-g7349cef09ddd2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:44:07.199619  validate duration: 0.04
   14 14:44:07.200001  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:44:07.200119  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:44:07.200223  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:44:07.200332  Not decompressing ramdisk as can be used compressed.
   18 14:44:07.200427  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/initrd.cpio.gz
   19 14:44:07.200503  saving as /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/ramdisk/initrd.cpio.gz
   20 14:44:07.200582  total size: 5411044 (5MB)
   21 14:44:07.220537  progress   0% (0MB)
   22 14:44:07.240331  progress   5% (0MB)
   23 14:44:07.259500  progress  10% (0MB)
   24 14:44:07.276905  progress  15% (0MB)
   25 14:44:07.296635  progress  20% (1MB)
   26 14:44:07.318053  progress  25% (1MB)
   27 14:44:07.333425  progress  30% (1MB)
   28 14:44:07.352996  progress  35% (1MB)
   29 14:44:07.377430  progress  40% (2MB)
   30 14:44:07.393480  progress  45% (2MB)
   31 14:44:07.418139  progress  50% (2MB)
   32 14:44:07.437715  progress  55% (2MB)
   33 14:44:07.457337  progress  60% (3MB)
   34 14:44:07.473120  progress  65% (3MB)
   35 14:44:07.495355  progress  70% (3MB)
   36 14:44:07.516728  progress  75% (3MB)
   37 14:44:07.532559  progress  80% (4MB)
   38 14:44:07.550749  progress  85% (4MB)
   39 14:44:07.568287  progress  90% (4MB)
   40 14:44:07.588312  progress  95% (4MB)
   41 14:44:07.606151  progress 100% (5MB)
   42 14:44:07.606346  5MB downloaded in 0.41s (12.72MB/s)
   43 14:44:07.606506  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 14:44:07.606753  end: 1.1 download-retry (duration 00:00:00) [common]
   46 14:44:07.606843  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 14:44:07.606931  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 14:44:07.607036  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 14:44:07.607105  saving as /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/kernel/bzImage
   50 14:44:07.607167  total size: 6815632 (6MB)
   51 14:44:07.607229  No compression specified
   52 14:44:07.624558  progress   0% (0MB)
   53 14:44:07.648990  progress   5% (0MB)
   54 14:44:07.671961  progress  10% (0MB)
   55 14:44:07.693922  progress  15% (1MB)
   56 14:44:07.723895  progress  20% (1MB)
   57 14:44:07.750712  progress  25% (1MB)
   58 14:44:07.784494  progress  30% (1MB)
   59 14:44:07.814922  progress  35% (2MB)
   60 14:44:07.844204  progress  40% (2MB)
   61 14:44:07.863068  progress  45% (2MB)
   62 14:44:07.889835  progress  50% (3MB)
   63 14:44:07.917537  progress  55% (3MB)
   64 14:44:07.946250  progress  60% (3MB)
   65 14:44:07.973934  progress  65% (4MB)
   66 14:44:07.997832  progress  70% (4MB)
   67 14:44:08.023095  progress  75% (4MB)
   68 14:44:08.054050  progress  80% (5MB)
   69 14:44:08.073724  progress  85% (5MB)
   70 14:44:08.104058  progress  90% (5MB)
   71 14:44:08.126420  progress  95% (6MB)
   72 14:44:08.147228  progress 100% (6MB)
   73 14:44:08.147525  6MB downloaded in 0.54s (12.03MB/s)
   74 14:44:08.147679  end: 1.2.1 http-download (duration 00:00:01) [common]
   76 14:44:08.147931  end: 1.2 download-retry (duration 00:00:01) [common]
   77 14:44:08.148020  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 14:44:08.148108  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 14:44:08.148215  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/full.rootfs.tar.xz
   80 14:44:08.148283  saving as /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/nfsrootfs/full.rootfs.tar
   81 14:44:08.148345  total size: 133217788 (127MB)
   82 14:44:08.148429  Using unxz to decompress xz
   83 14:44:08.494532  progress   0% (0MB)
   84 14:44:10.089224  progress   5% (6MB)
   85 14:44:11.700224  progress  10% (12MB)
   86 14:44:12.450480  progress  15% (19MB)
   87 14:44:13.811885  progress  20% (25MB)
   88 14:44:15.414823  progress  25% (31MB)
   89 14:44:16.329199  progress  30% (38MB)
   90 14:44:16.931111  progress  35% (44MB)
   91 14:44:17.499490  progress  40% (50MB)
   92 14:44:18.042697  progress  45% (57MB)
   93 14:44:18.523776  progress  50% (63MB)
   94 14:44:18.914231  progress  55% (69MB)
   95 14:44:19.274511  progress  60% (76MB)
   96 14:44:19.649315  progress  65% (82MB)
   97 14:44:20.023359  progress  70% (88MB)
   98 14:44:20.391517  progress  75% (95MB)
   99 14:44:20.829525  progress  80% (101MB)
  100 14:44:21.265767  progress  85% (108MB)
  101 14:44:21.531119  progress  90% (114MB)
  102 14:44:21.873848  progress  95% (120MB)
  103 14:44:22.272030  progress 100% (127MB)
  104 14:44:22.277525  127MB downloaded in 14.13s (8.99MB/s)
  105 14:44:22.277780  end: 1.3.1 http-download (duration 00:00:14) [common]
  107 14:44:22.278045  end: 1.3 download-retry (duration 00:00:14) [common]
  108 14:44:22.278140  start: 1.4 download-retry (timeout 00:09:45) [common]
  109 14:44:22.278231  start: 1.4.1 http-download (timeout 00:09:45) [common]
  110 14:44:22.278349  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-231-g7349cef09ddd2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 14:44:22.278424  saving as /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/modules/modules.tar
  112 14:44:22.278487  total size: 51904 (0MB)
  113 14:44:22.278552  Using unxz to decompress xz
  114 14:44:22.283326  progress  63% (0MB)
  115 14:44:22.283776  progress 100% (0MB)
  116 14:44:22.286919  0MB downloaded in 0.01s (5.87MB/s)
  117 14:44:22.287121  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 14:44:22.287376  end: 1.4 download-retry (duration 00:00:00) [common]
  120 14:44:22.287470  start: 1.5 prepare-tftp-overlay (timeout 00:09:45) [common]
  121 14:44:22.287568  start: 1.5.1 extract-nfsrootfs (timeout 00:09:45) [common]
  122 14:44:23.538437  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7305246/extract-nfsrootfs-7iaaok3y
  123 14:44:23.538624  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 14:44:23.538730  start: 1.5.2 lava-overlay (timeout 00:09:44) [common]
  125 14:44:23.538868  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby
  126 14:44:23.538971  makedir: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin
  127 14:44:23.539056  makedir: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/tests
  128 14:44:23.539140  makedir: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/results
  129 14:44:23.539236  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-add-keys
  130 14:44:23.539375  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-add-sources
  131 14:44:23.539503  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-background-process-start
  132 14:44:23.539621  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-background-process-stop
  133 14:44:23.539769  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-common-functions
  134 14:44:23.539895  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-echo-ipv4
  135 14:44:23.540005  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-install-packages
  136 14:44:23.540114  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-installed-packages
  137 14:44:23.540221  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-os-build
  138 14:44:23.540329  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-probe-channel
  139 14:44:23.540437  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-probe-ip
  140 14:44:23.540544  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-target-ip
  141 14:44:23.540652  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-target-mac
  142 14:44:23.540758  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-target-storage
  143 14:44:23.540867  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-case
  144 14:44:23.540976  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-event
  145 14:44:23.541082  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-feedback
  146 14:44:23.541189  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-raise
  147 14:44:23.541296  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-reference
  148 14:44:23.541403  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-runner
  149 14:44:23.541510  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-set
  150 14:44:23.541615  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-test-shell
  151 14:44:23.541723  Updating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-install-packages (oe)
  152 14:44:23.541834  Updating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/bin/lava-installed-packages (oe)
  153 14:44:23.541931  Creating /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/environment
  154 14:44:23.542020  LAVA metadata
  155 14:44:23.542086  - LAVA_JOB_ID=7305246
  156 14:44:23.542150  - LAVA_DISPATCHER_IP=192.168.201.1
  157 14:44:23.542247  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:44) [common]
  158 14:44:23.542313  skipped lava-vland-overlay
  159 14:44:23.542390  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 14:44:23.542471  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:44) [common]
  161 14:44:23.542533  skipped lava-multinode-overlay
  162 14:44:23.542607  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 14:44:23.542688  start: 1.5.2.3 test-definition (timeout 00:09:44) [common]
  164 14:44:23.542759  Loading test definitions
  165 14:44:23.542849  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:44) [common]
  166 14:44:23.542923  Using /lava-7305246 at stage 0
  167 14:44:23.543173  uuid=7305246_1.5.2.3.1 testdef=None
  168 14:44:23.543263  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 14:44:23.543350  start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
  170 14:44:23.543964  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 14:44:23.544194  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
  173 14:44:23.544758  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 14:44:23.544997  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
  176 14:44:23.545534  runner path: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/0/tests/0_dmesg test_uuid 7305246_1.5.2.3.1
  177 14:44:23.545682  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 14:44:23.545918  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:44) [common]
  180 14:44:23.545992  Using /lava-7305246 at stage 1
  181 14:44:23.546230  uuid=7305246_1.5.2.3.5 testdef=None
  182 14:44:23.546319  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 14:44:23.546406  start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
  184 14:44:23.546847  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 14:44:23.547072  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
  187 14:44:23.547644  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 14:44:23.547888  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
  190 14:44:23.548440  runner path: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/1/tests/1_bootrr test_uuid 7305246_1.5.2.3.5
  191 14:44:23.548582  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 14:44:23.548794  Creating lava-test-runner.conf files
  194 14:44:23.548859  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/0 for stage 0
  195 14:44:23.548941  - 0_dmesg
  196 14:44:23.549015  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7305246/lava-overlay-vfxgmnby/lava-7305246/1 for stage 1
  197 14:44:23.549098  - 1_bootrr
  198 14:44:23.549188  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 14:44:23.549273  start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
  200 14:44:23.554916  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 14:44:23.555021  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:44) [common]
  202 14:44:23.555110  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 14:44:23.555199  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 14:44:23.555286  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:44) [common]
  205 14:44:23.656842  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 14:44:23.657175  start: 1.5.4 extract-modules (timeout 00:09:44) [common]
  207 14:44:23.657288  extracting modules file /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305246/extract-nfsrootfs-7iaaok3y
  208 14:44:23.661365  extracting modules file /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7305246/extract-overlay-ramdisk-x1f09w9z/ramdisk
  209 14:44:23.665157  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 14:44:23.665273  start: 1.5.5 apply-overlay-tftp (timeout 00:09:44) [common]
  211 14:44:23.665360  [common] Applying overlay to NFS
  212 14:44:23.665433  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7305246/compress-overlay-8vd6vwr_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7305246/extract-nfsrootfs-7iaaok3y
  213 14:44:23.669269  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 14:44:23.669379  start: 1.5.6 configure-preseed-file (timeout 00:09:44) [common]
  215 14:44:23.669472  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 14:44:23.669566  start: 1.5.7 compress-ramdisk (timeout 00:09:44) [common]
  217 14:44:23.669644  Building ramdisk /var/lib/lava/dispatcher/tmp/7305246/extract-overlay-ramdisk-x1f09w9z/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7305246/extract-overlay-ramdisk-x1f09w9z/ramdisk
  218 14:44:23.702203  >> 24431 blocks

  219 14:44:24.177867  rename /var/lib/lava/dispatcher/tmp/7305246/extract-overlay-ramdisk-x1f09w9z/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
  220 14:44:24.178248  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 14:44:24.178368  start: 1.5.8 prepare-kernel (timeout 00:09:43) [common]
  222 14:44:24.178472  start: 1.5.8.1 prepare-fit (timeout 00:09:43) [common]
  223 14:44:24.178573  No mkimage arch provided, not using FIT.
  224 14:44:24.178663  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 14:44:24.178751  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 14:44:24.178852  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 14:44:24.178949  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
  228 14:44:24.179030  No LXC device requested
  229 14:44:24.179116  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 14:44:24.179210  start: 1.7 deploy-device-env (timeout 00:09:43) [common]
  231 14:44:24.179292  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 14:44:24.179361  Checking files for TFTP limit of 4294967296 bytes.
  233 14:44:24.179779  end: 1 tftp-deploy (duration 00:00:17) [common]
  234 14:44:24.179889  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 14:44:24.179984  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 14:44:24.180107  substitutions:
  237 14:44:24.180176  - {DTB}: None
  238 14:44:24.180242  - {INITRD}: 7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
  239 14:44:24.180306  - {KERNEL}: 7305246/tftp-deploy-r6pc8drf/kernel/bzImage
  240 14:44:24.180366  - {LAVA_MAC}: None
  241 14:44:24.180428  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7305246/extract-nfsrootfs-7iaaok3y
  242 14:44:24.180487  - {NFS_SERVER_IP}: 192.168.201.1
  243 14:44:24.180545  - {PRESEED_CONFIG}: None
  244 14:44:24.180602  - {PRESEED_LOCAL}: None
  245 14:44:24.180658  - {RAMDISK}: 7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
  246 14:44:24.180715  - {ROOT_PART}: None
  247 14:44:24.180772  - {ROOT}: None
  248 14:44:24.180828  - {SERVER_IP}: 192.168.201.1
  249 14:44:24.180884  - {TEE}: None
  250 14:44:24.180940  Parsed boot commands:
  251 14:44:24.180995  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 14:44:24.181147  Parsed boot commands: tftpboot 192.168.201.1 7305246/tftp-deploy-r6pc8drf/kernel/bzImage 7305246/tftp-deploy-r6pc8drf/kernel/cmdline 7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
  253 14:44:24.181248  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 14:44:24.181346  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 14:44:24.181440  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 14:44:24.181528  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 14:44:24.181601  Not connected, no need to disconnect.
  258 14:44:24.181680  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 14:44:24.181770  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 14:44:24.181840  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
  261 14:44:24.184455  Setting prompt string to ['lava-test: # ']
  262 14:44:24.184748  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 14:44:24.184855  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 14:44:24.184957  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 14:44:24.185055  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 14:44:24.185233  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
  267 14:44:24.204054  >> Command sent successfully.

  268 14:44:24.205830  Returned 0 in 0 seconds
  269 14:44:24.307118  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  271 14:44:24.308501  end: 2.2.2 reset-device (duration 00:00:00) [common]
  272 14:44:24.309077  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  273 14:44:24.309479  Setting prompt string to 'Starting depthcharge on Voema...'
  274 14:44:24.309795  Changing prompt to 'Starting depthcharge on Voema...'
  275 14:44:24.310131  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  276 14:44:24.311299  [Enter `^Ec?' for help]
  277 14:44:32.578844  
  278 14:44:32.579462  
  279 14:44:32.588773  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  280 14:44:32.592130  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
  281 14:44:32.599187  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  282 14:44:32.602295  CPU: AES supported, TXT NOT supported, VT supported
  283 14:44:32.609216  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  284 14:44:32.613099  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  285 14:44:32.619788  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  286 14:44:32.623552  VBOOT: Loading verstage.
  287 14:44:32.626374  FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
  288 14:44:32.632922  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  289 14:44:32.636615  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  290 14:44:32.646663  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  291 14:44:32.652948  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  292 14:44:32.653376  
  293 14:44:32.653729  
  294 14:44:32.663385  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  295 14:44:32.679624  Probing TPM: . done!
  296 14:44:32.683188  TPM ready after 0 ms
  297 14:44:32.686538  Connected to device vid:did:rid of 1ae0:0028:00
  298 14:44:32.697749  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  299 14:44:32.703972  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  300 14:44:32.707566  Initialized TPM device CR50 revision 0
  301 14:44:32.763923  tlcl_send_startup: Startup return code is 0
  302 14:44:32.764400  TPM: setup succeeded
  303 14:44:32.779099  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  304 14:44:32.793488  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  305 14:44:32.806496  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  306 14:44:32.815905  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  307 14:44:32.819526  Chrome EC: UHEPI supported
  308 14:44:32.823192  Phase 1
  309 14:44:32.826415  FMAP: area GBB found @ 1805000 (458752 bytes)
  310 14:44:32.836246  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  311 14:44:32.842778  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  312 14:44:32.849695  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  313 14:44:32.856063  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  314 14:44:32.859519  Recovery requested (1009000e)
  315 14:44:32.863041  TPM: Extending digest for VBOOT: boot mode into PCR 0
  316 14:44:32.874267  tlcl_extend: response is 0
  317 14:44:32.881484  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  318 14:44:32.890716  tlcl_extend: response is 0
  319 14:44:32.897775  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  320 14:44:32.904211  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  321 14:44:32.910724  BS: verstage times (exec / console): total (unknown) / 142 ms
  322 14:44:32.911128  
  323 14:44:32.911476  
  324 14:44:32.923815  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  325 14:44:32.930652  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  326 14:44:32.933678  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  327 14:44:32.936990  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  328 14:44:32.943874  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  329 14:44:32.947085  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  330 14:44:32.950195  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  331 14:44:32.953588  TCO_STS:   0000 0000
  332 14:44:32.956640  GEN_PMCON: d0015038 00002200
  333 14:44:32.960223  GBLRST_CAUSE: 00000000 00000000
  334 14:44:32.964045  HPR_CAUSE0: 00000000
  335 14:44:32.964505  prev_sleep_state 5
  336 14:44:32.967038  Boot Count incremented to 8001
  337 14:44:32.973318  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  338 14:44:32.980492  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  339 14:44:32.990427  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  340 14:44:32.996772  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  341 14:44:33.000214  Chrome EC: UHEPI supported
  342 14:44:33.006581  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  343 14:44:33.017599  Probing TPM:  done!
  344 14:44:33.024429  Connected to device vid:did:rid of 1ae0:0028:00
  345 14:44:33.034207  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  346 14:44:33.037635  Initialized TPM device CR50 revision 0
  347 14:44:33.052490  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  348 14:44:33.058749  MRC: Hash idx 0x100b comparison successful.
  349 14:44:33.062209  MRC cache found, size faa8
  350 14:44:33.062643  bootmode is set to: 2
  351 14:44:33.065420  SPD index = 2
  352 14:44:33.072352  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  353 14:44:33.075866  SPD: module type is LPDDR4X
  354 14:44:33.078898  SPD: module part number is MT53D1G64D4NW-046
  355 14:44:33.085498  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
  356 14:44:33.088762  SPD: device width 16 bits, bus width 16 bits
  357 14:44:33.095525  SPD: module size is 2048 MB (per channel)
  358 14:44:33.525335  CBMEM:
  359 14:44:33.528576  IMD: root @ 0x76fff000 254 entries.
  360 14:44:33.531792  IMD: root @ 0x76ffec00 62 entries.
  361 14:44:33.535354  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  362 14:44:33.541701  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  363 14:44:33.544886  External stage cache:
  364 14:44:33.548528  IMD: root @ 0x7b3ff000 254 entries.
  365 14:44:33.551886  IMD: root @ 0x7b3fec00 62 entries.
  366 14:44:33.566773  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  367 14:44:33.573281  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  368 14:44:33.579750  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  369 14:44:33.593834  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  370 14:44:33.600015  cse_lite: Skip switching to RW in the recovery path
  371 14:44:33.600430  8 DIMMs found
  372 14:44:33.600797  SMM Memory Map
  373 14:44:33.606733  SMRAM       : 0x7b000000 0x800000
  374 14:44:33.609920   Subregion 0: 0x7b000000 0x200000
  375 14:44:33.613269   Subregion 1: 0x7b200000 0x200000
  376 14:44:33.616460   Subregion 2: 0x7b400000 0x400000
  377 14:44:33.616848  top_of_ram = 0x77000000
  378 14:44:33.623429  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  379 14:44:33.629992  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  380 14:44:33.633247  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  381 14:44:33.639822  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  382 14:44:33.646689  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  383 14:44:33.652948  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  384 14:44:33.662944  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  385 14:44:33.669778  Processing 211 relocs. Offset value of 0x74c0b000
  386 14:44:33.676139  BS: romstage times (exec / console): total (unknown) / 276 ms
  387 14:44:33.682296  
  388 14:44:33.682700  
  389 14:44:33.693165  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  390 14:44:33.696761  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  391 14:44:33.703212  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  392 14:44:33.713202  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  393 14:44:33.719834  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  394 14:44:33.726267  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  395 14:44:33.769163  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  396 14:44:33.775425  Processing 5008 relocs. Offset value of 0x75d98000
  397 14:44:33.779072  BS: postcar times (exec / console): total (unknown) / 59 ms
  398 14:44:33.782061  
  399 14:44:33.782497  
  400 14:44:33.791726  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  401 14:44:33.792174  Normal boot
  402 14:44:33.795280  FW_CONFIG value is 0x804c02
  403 14:44:33.798889  PCI: 00:07.0 disabled by fw_config
  404 14:44:33.801717  PCI: 00:07.1 disabled by fw_config
  405 14:44:33.805276  PCI: 00:0d.2 disabled by fw_config
  406 14:44:33.811978  PCI: 00:1c.7 disabled by fw_config
  407 14:44:33.814955  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  408 14:44:33.822007  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  409 14:44:33.825106  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  410 14:44:33.831965  GENERIC: 0.0 disabled by fw_config
  411 14:44:33.834952  GENERIC: 1.0 disabled by fw_config
  412 14:44:33.838271  fw_config match found: DB_USB=USB3_ACTIVE
  413 14:44:33.841386  fw_config match found: DB_USB=USB3_ACTIVE
  414 14:44:33.844905  fw_config match found: DB_USB=USB3_ACTIVE
  415 14:44:33.851263  fw_config match found: DB_USB=USB3_ACTIVE
  416 14:44:33.855041  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  417 14:44:33.864828  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  418 14:44:33.871330  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  419 14:44:33.878105  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  420 14:44:33.881286  microcode: sig=0x806c1 pf=0x80 revision=0x86
  421 14:44:33.888179  microcode: Update skipped, already up-to-date
  422 14:44:33.894465  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  423 14:44:33.922515  Detected 4 core, 8 thread CPU.
  424 14:44:33.925752  Setting up SMI for CPU
  425 14:44:33.928797  IED base = 0x7b400000
  426 14:44:33.929205  IED size = 0x00400000
  427 14:44:33.932138  Will perform SMM setup.
  428 14:44:33.939252  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
  429 14:44:33.945803  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  430 14:44:33.952578  Processing 16 relocs. Offset value of 0x00030000
  431 14:44:33.955868  Attempting to start 7 APs
  432 14:44:33.959017  Waiting for 10ms after sending INIT.
  433 14:44:33.974298  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  434 14:44:33.974735  done.
  435 14:44:33.977430  AP: slot 2 apic_id 7.
  436 14:44:33.980974  AP: slot 3 apic_id 3.
  437 14:44:33.981410  AP: slot 6 apic_id 2.
  438 14:44:33.984423  AP: slot 5 apic_id 6.
  439 14:44:33.987144  AP: slot 7 apic_id 5.
  440 14:44:33.991701  AP: slot 4 apic_id 4.
  441 14:44:33.994316  Waiting for 2nd SIPI to complete...done.
  442 14:44:34.000744  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  443 14:44:34.007621  Processing 13 relocs. Offset value of 0x00038000
  444 14:44:34.010514  Unable to locate Global NVS
  445 14:44:34.017188  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  446 14:44:34.020622  Installing permanent SMM handler to 0x7b000000
  447 14:44:34.030238  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  448 14:44:34.033595  Processing 794 relocs. Offset value of 0x7b010000
  449 14:44:34.044108  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  450 14:44:34.046868  Processing 13 relocs. Offset value of 0x7b008000
  451 14:44:34.053299  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  452 14:44:34.060514  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  453 14:44:34.066901  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  454 14:44:34.070041  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  455 14:44:34.076875  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  456 14:44:34.083305  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  457 14:44:34.089736  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  458 14:44:34.093031  Unable to locate Global NVS
  459 14:44:34.100115  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  460 14:44:34.103548  Clearing SMI status registers
  461 14:44:34.103996  SMI_STS: PM1 
  462 14:44:34.106691  PM1_STS: PWRBTN 
  463 14:44:34.112971  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  464 14:44:34.116185  In relocation handler: CPU 0
  465 14:44:34.119987  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  466 14:44:34.126367  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  467 14:44:34.129654  Relocation complete.
  468 14:44:34.136018  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  469 14:44:34.139292  In relocation handler: CPU 1
  470 14:44:34.143028  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  471 14:44:34.146047  Relocation complete.
  472 14:44:34.152600  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  473 14:44:34.155878  In relocation handler: CPU 5
  474 14:44:34.159320  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  475 14:44:34.162905  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  476 14:44:34.165786  Relocation complete.
  477 14:44:34.172154  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  478 14:44:34.175644  In relocation handler: CPU 7
  479 14:44:34.178790  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  480 14:44:34.182402  Relocation complete.
  481 14:44:34.188939  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  482 14:44:34.192053  In relocation handler: CPU 4
  483 14:44:34.195738  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  484 14:44:34.202005  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  485 14:44:34.202451  Relocation complete.
  486 14:44:34.212630  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  487 14:44:34.215538  In relocation handler: CPU 3
  488 14:44:34.218814  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  489 14:44:34.219221  Relocation complete.
  490 14:44:34.228473  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  491 14:44:34.231829  In relocation handler: CPU 6
  492 14:44:34.235105  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  493 14:44:34.238642  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  494 14:44:34.241792  Relocation complete.
  495 14:44:34.248194  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  496 14:44:34.251714  In relocation handler: CPU 2
  497 14:44:34.255069  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  498 14:44:34.257890  Relocation complete.
  499 14:44:34.257974  Initializing CPU #0
  500 14:44:34.261734  CPU: vendor Intel device 806c1
  501 14:44:34.268379  CPU: family 06, model 8c, stepping 01
  502 14:44:34.268463  Clearing out pending MCEs
  503 14:44:34.271655  Setting up local APIC...
  504 14:44:34.274799   apic_id: 0x00 done.
  505 14:44:34.278334  Turbo is available but hidden
  506 14:44:34.281477  Turbo is available and visible
  507 14:44:34.285401  microcode: Update skipped, already up-to-date
  508 14:44:34.288304  CPU #0 initialized
  509 14:44:34.288388  Initializing CPU #1
  510 14:44:34.291639  Initializing CPU #7
  511 14:44:34.295208  Initializing CPU #4
  512 14:44:34.298362  CPU: vendor Intel device 806c1
  513 14:44:34.301519  CPU: family 06, model 8c, stepping 01
  514 14:44:34.304761  CPU: vendor Intel device 806c1
  515 14:44:34.308702  CPU: family 06, model 8c, stepping 01
  516 14:44:34.311738  Clearing out pending MCEs
  517 14:44:34.311823  Clearing out pending MCEs
  518 14:44:34.315380  Setting up local APIC...
  519 14:44:34.318183  CPU: vendor Intel device 806c1
  520 14:44:34.321402  CPU: family 06, model 8c, stepping 01
  521 14:44:34.324759  Initializing CPU #6
  522 14:44:34.324843  Initializing CPU #3
  523 14:44:34.328326  CPU: vendor Intel device 806c1
  524 14:44:34.334634  CPU: family 06, model 8c, stepping 01
  525 14:44:34.334718  CPU: vendor Intel device 806c1
  526 14:44:34.341476  CPU: family 06, model 8c, stepping 01
  527 14:44:34.341561  Clearing out pending MCEs
  528 14:44:34.344655  Clearing out pending MCEs
  529 14:44:34.348303  Setting up local APIC...
  530 14:44:34.351622  Setting up local APIC...
  531 14:44:34.351710   apic_id: 0x02 done.
  532 14:44:34.354958  Setting up local APIC...
  533 14:44:34.358813   apic_id: 0x04 done.
  534 14:44:34.358895   apic_id: 0x05 done.
  535 14:44:34.365295  microcode: Update skipped, already up-to-date
  536 14:44:34.368600  microcode: Update skipped, already up-to-date
  537 14:44:34.371898  CPU #4 initialized
  538 14:44:34.371980  Initializing CPU #5
  539 14:44:34.375133  Initializing CPU #2
  540 14:44:34.378648  CPU: vendor Intel device 806c1
  541 14:44:34.381872  CPU: family 06, model 8c, stepping 01
  542 14:44:34.385446  CPU: vendor Intel device 806c1
  543 14:44:34.388328  CPU: family 06, model 8c, stepping 01
  544 14:44:34.391988  Clearing out pending MCEs
  545 14:44:34.395180  Clearing out pending MCEs
  546 14:44:34.395262  Setting up local APIC...
  547 14:44:34.402035  microcode: Update skipped, already up-to-date
  548 14:44:34.402118   apic_id: 0x03 done.
  549 14:44:34.405093  CPU #6 initialized
  550 14:44:34.408362  microcode: Update skipped, already up-to-date
  551 14:44:34.412349   apic_id: 0x06 done.
  552 14:44:34.415233  Setting up local APIC...
  553 14:44:34.418439  Clearing out pending MCEs
  554 14:44:34.421636  microcode: Update skipped, already up-to-date
  555 14:44:34.425278   apic_id: 0x07 done.
  556 14:44:34.425363  Setting up local APIC...
  557 14:44:34.428199  CPU #7 initialized
  558 14:44:34.431736  CPU #3 initialized
  559 14:44:34.434905  microcode: Update skipped, already up-to-date
  560 14:44:34.434989  CPU #5 initialized
  561 14:44:34.438145  CPU #2 initialized
  562 14:44:34.441478   apic_id: 0x01 done.
  563 14:44:34.444969  microcode: Update skipped, already up-to-date
  564 14:44:34.448365  CPU #1 initialized
  565 14:44:34.451886  bsp_do_flight_plan done after 454 msecs.
  566 14:44:34.455021  CPU: frequency set to 4400 MHz
  567 14:44:34.455105  Enabling SMIs.
  568 14:44:34.461416  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  569 14:44:34.478923  SATAXPCIE1 indicates PCIe NVMe is present
  570 14:44:34.482042  Probing TPM:  done!
  571 14:44:34.485568  Connected to device vid:did:rid of 1ae0:0028:00
  572 14:44:34.496019  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  573 14:44:34.499857  Initialized TPM device CR50 revision 0
  574 14:44:34.502696  Enabling S0i3.4
  575 14:44:34.509761  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  576 14:44:34.512731  Found a VBT of 8704 bytes after decompression
  577 14:44:34.519699  cse_lite: CSE RO boot. HybridStorageMode disabled
  578 14:44:34.526177  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  579 14:44:34.601469  FSPS returned 0
  580 14:44:34.604866  Executing Phase 1 of FspMultiPhaseSiInit
  581 14:44:34.614946  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  582 14:44:34.618102  port C0 DISC req: usage 1 usb3 1 usb2 5
  583 14:44:34.621680  Raw Buffer output 0 00000511
  584 14:44:34.624689  Raw Buffer output 1 00000000
  585 14:44:34.628677  pmc_send_ipc_cmd succeeded
  586 14:44:34.635411  port C1 DISC req: usage 1 usb3 2 usb2 3
  587 14:44:34.635929  Raw Buffer output 0 00000321
  588 14:44:34.638540  Raw Buffer output 1 00000000
  589 14:44:34.643108  pmc_send_ipc_cmd succeeded
  590 14:44:34.647891  Detected 4 core, 8 thread CPU.
  591 14:44:34.651614  Detected 4 core, 8 thread CPU.
  592 14:44:34.851845  Display FSP Version Info HOB
  593 14:44:34.854964  Reference Code - CPU = a.0.4c.31
  594 14:44:34.858177  uCode Version = 0.0.0.86
  595 14:44:34.861486  TXT ACM version = ff.ff.ff.ffff
  596 14:44:34.864532  Reference Code - ME = a.0.4c.31
  597 14:44:34.867886  MEBx version = 0.0.0.0
  598 14:44:34.871186  ME Firmware Version = Consumer SKU
  599 14:44:34.875221  Reference Code - PCH = a.0.4c.31
  600 14:44:34.878243  PCH-CRID Status = Disabled
  601 14:44:34.881695  PCH-CRID Original Value = ff.ff.ff.ffff
  602 14:44:34.884505  PCH-CRID New Value = ff.ff.ff.ffff
  603 14:44:34.887962  OPROM - RST - RAID = ff.ff.ff.ffff
  604 14:44:34.891533  PCH Hsio Version = 4.0.0.0
  605 14:44:34.894812  Reference Code - SA - System Agent = a.0.4c.31
  606 14:44:34.898527  Reference Code - MRC = 2.0.0.1
  607 14:44:34.901437  SA - PCIe Version = a.0.4c.31
  608 14:44:34.904650  SA-CRID Status = Disabled
  609 14:44:34.908241  SA-CRID Original Value = 0.0.0.1
  610 14:44:34.911164  SA-CRID New Value = 0.0.0.1
  611 14:44:34.914774  OPROM - VBIOS = ff.ff.ff.ffff
  612 14:44:34.917506  IO Manageability Engine FW Version = 11.1.4.0
  613 14:44:34.921463  PHY Build Version = 0.0.0.e0
  614 14:44:34.924305  Thunderbolt(TM) FW Version = 0.0.0.0
  615 14:44:34.931337  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  616 14:44:34.934593  ITSS IRQ Polarities Before:
  617 14:44:34.935141  IPC0: 0xffffffff
  618 14:44:34.938478  IPC1: 0xffffffff
  619 14:44:34.938977  IPC2: 0xffffffff
  620 14:44:34.942124  IPC3: 0xffffffff
  621 14:44:34.942718  ITSS IRQ Polarities After:
  622 14:44:34.945527  IPC0: 0xffffffff
  623 14:44:34.948458  IPC1: 0xffffffff
  624 14:44:34.948948  IPC2: 0xffffffff
  625 14:44:34.951766  IPC3: 0xffffffff
  626 14:44:34.955547  Found PCIe Root Port #9 at PCI: 00:1d.0.
  627 14:44:34.965204  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  628 14:44:34.978923  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  629 14:44:34.992265  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  630 14:44:34.998071  BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
  631 14:44:34.998559  Enumerating buses...
  632 14:44:35.005163  Show all devs... Before device enumeration.
  633 14:44:35.005647  Root Device: enabled 1
  634 14:44:35.008334  DOMAIN: 0000: enabled 1
  635 14:44:35.011700  CPU_CLUSTER: 0: enabled 1
  636 14:44:35.015121  PCI: 00:00.0: enabled 1
  637 14:44:35.015747  PCI: 00:02.0: enabled 1
  638 14:44:35.018106  PCI: 00:04.0: enabled 1
  639 14:44:35.021804  PCI: 00:05.0: enabled 1
  640 14:44:35.024791  PCI: 00:06.0: enabled 0
  641 14:44:35.025372  PCI: 00:07.0: enabled 0
  642 14:44:35.028299  PCI: 00:07.1: enabled 0
  643 14:44:35.032078  PCI: 00:07.2: enabled 0
  644 14:44:35.032663  PCI: 00:07.3: enabled 0
  645 14:44:35.034725  PCI: 00:08.0: enabled 1
  646 14:44:35.038269  PCI: 00:09.0: enabled 0
  647 14:44:35.042048  PCI: 00:0a.0: enabled 0
  648 14:44:35.042635  PCI: 00:0d.0: enabled 1
  649 14:44:35.045090  PCI: 00:0d.1: enabled 0
  650 14:44:35.048047  PCI: 00:0d.2: enabled 0
  651 14:44:35.051395  PCI: 00:0d.3: enabled 0
  652 14:44:35.051997  PCI: 00:0e.0: enabled 0
  653 14:44:35.055307  PCI: 00:10.2: enabled 1
  654 14:44:35.058417  PCI: 00:10.6: enabled 0
  655 14:44:35.061218  PCI: 00:10.7: enabled 0
  656 14:44:35.061706  PCI: 00:12.0: enabled 0
  657 14:44:35.065236  PCI: 00:12.6: enabled 0
  658 14:44:35.068078  PCI: 00:13.0: enabled 0
  659 14:44:35.071373  PCI: 00:14.0: enabled 1
  660 14:44:35.071883  PCI: 00:14.1: enabled 0
  661 14:44:35.075113  PCI: 00:14.2: enabled 1
  662 14:44:35.077998  PCI: 00:14.3: enabled 1
  663 14:44:35.078580  PCI: 00:15.0: enabled 1
  664 14:44:35.081520  PCI: 00:15.1: enabled 1
  665 14:44:35.084721  PCI: 00:15.2: enabled 1
  666 14:44:35.087941  PCI: 00:15.3: enabled 1
  667 14:44:35.088423  PCI: 00:16.0: enabled 1
  668 14:44:35.091370  PCI: 00:16.1: enabled 0
  669 14:44:35.094376  PCI: 00:16.2: enabled 0
  670 14:44:35.098159  PCI: 00:16.3: enabled 0
  671 14:44:35.098738  PCI: 00:16.4: enabled 0
  672 14:44:35.101323  PCI: 00:16.5: enabled 0
  673 14:44:35.104797  PCI: 00:17.0: enabled 1
  674 14:44:35.107830  PCI: 00:19.0: enabled 0
  675 14:44:35.108316  PCI: 00:19.1: enabled 1
  676 14:44:35.111207  PCI: 00:19.2: enabled 0
  677 14:44:35.114899  PCI: 00:1c.0: enabled 1
  678 14:44:35.115480  PCI: 00:1c.1: enabled 0
  679 14:44:35.118008  PCI: 00:1c.2: enabled 0
  680 14:44:35.121199  PCI: 00:1c.3: enabled 0
  681 14:44:35.124267  PCI: 00:1c.4: enabled 0
  682 14:44:35.124754  PCI: 00:1c.5: enabled 0
  683 14:44:35.127659  PCI: 00:1c.6: enabled 1
  684 14:44:35.131838  PCI: 00:1c.7: enabled 0
  685 14:44:35.134260  PCI: 00:1d.0: enabled 1
  686 14:44:35.134746  PCI: 00:1d.1: enabled 0
  687 14:44:35.137678  PCI: 00:1d.2: enabled 1
  688 14:44:35.141131  PCI: 00:1d.3: enabled 0
  689 14:44:35.144221  PCI: 00:1e.0: enabled 1
  690 14:44:35.144792  PCI: 00:1e.1: enabled 0
  691 14:44:35.147746  PCI: 00:1e.2: enabled 1
  692 14:44:35.150788  PCI: 00:1e.3: enabled 1
  693 14:44:35.154652  PCI: 00:1f.0: enabled 1
  694 14:44:35.155235  PCI: 00:1f.1: enabled 0
  695 14:44:35.157990  PCI: 00:1f.2: enabled 1
  696 14:44:35.161145  PCI: 00:1f.3: enabled 1
  697 14:44:35.161727  PCI: 00:1f.4: enabled 0
  698 14:44:35.164137  PCI: 00:1f.5: enabled 1
  699 14:44:35.167452  PCI: 00:1f.6: enabled 0
  700 14:44:35.171523  PCI: 00:1f.7: enabled 0
  701 14:44:35.172154  APIC: 00: enabled 1
  702 14:44:35.174652  GENERIC: 0.0: enabled 1
  703 14:44:35.177503  GENERIC: 0.0: enabled 1
  704 14:44:35.178086  GENERIC: 1.0: enabled 1
  705 14:44:35.180625  GENERIC: 0.0: enabled 1
  706 14:44:35.184233  GENERIC: 1.0: enabled 1
  707 14:44:35.187805  USB0 port 0: enabled 1
  708 14:44:35.188381  GENERIC: 0.0: enabled 1
  709 14:44:35.191021  USB0 port 0: enabled 1
  710 14:44:35.194692  GENERIC: 0.0: enabled 1
  711 14:44:35.197254  I2C: 00:1a: enabled 1
  712 14:44:35.197734  I2C: 00:31: enabled 1
  713 14:44:35.200923  I2C: 00:32: enabled 1
  714 14:44:35.204188  I2C: 00:10: enabled 1
  715 14:44:35.204780  I2C: 00:15: enabled 1
  716 14:44:35.207741  GENERIC: 0.0: enabled 0
  717 14:44:35.210995  GENERIC: 1.0: enabled 0
  718 14:44:35.211576  GENERIC: 0.0: enabled 1
  719 14:44:35.214031  SPI: 00: enabled 1
  720 14:44:35.217696  SPI: 00: enabled 1
  721 14:44:35.218274  PNP: 0c09.0: enabled 1
  722 14:44:35.220908  GENERIC: 0.0: enabled 1
  723 14:44:35.224032  USB3 port 0: enabled 1
  724 14:44:35.224511  USB3 port 1: enabled 1
  725 14:44:35.227957  USB3 port 2: enabled 0
  726 14:44:35.230852  USB3 port 3: enabled 0
  727 14:44:35.234372  USB2 port 0: enabled 0
  728 14:44:35.234986  USB2 port 1: enabled 1
  729 14:44:35.237150  USB2 port 2: enabled 1
  730 14:44:35.240745  USB2 port 3: enabled 0
  731 14:44:35.241340  USB2 port 4: enabled 1
  732 14:44:35.244319  USB2 port 5: enabled 0
  733 14:44:35.247541  USB2 port 6: enabled 0
  734 14:44:35.250902  USB2 port 7: enabled 0
  735 14:44:35.251381  USB2 port 8: enabled 0
  736 14:44:35.254108  USB2 port 9: enabled 0
  737 14:44:35.257123  USB3 port 0: enabled 0
  738 14:44:35.257603  USB3 port 1: enabled 1
  739 14:44:35.260783  USB3 port 2: enabled 0
  740 14:44:35.263788  USB3 port 3: enabled 0
  741 14:44:35.264325  GENERIC: 0.0: enabled 1
  742 14:44:35.267071  GENERIC: 1.0: enabled 1
  743 14:44:35.270630  APIC: 01: enabled 1
  744 14:44:35.271094  APIC: 07: enabled 1
  745 14:44:35.273980  APIC: 03: enabled 1
  746 14:44:35.277028  APIC: 04: enabled 1
  747 14:44:35.277465  APIC: 06: enabled 1
  748 14:44:35.280214  APIC: 02: enabled 1
  749 14:44:35.283624  APIC: 05: enabled 1
  750 14:44:35.284187  Compare with tree...
  751 14:44:35.287559  Root Device: enabled 1
  752 14:44:35.290934   DOMAIN: 0000: enabled 1
  753 14:44:35.291478    PCI: 00:00.0: enabled 1
  754 14:44:35.293399    PCI: 00:02.0: enabled 1
  755 14:44:35.297003    PCI: 00:04.0: enabled 1
  756 14:44:35.299958     GENERIC: 0.0: enabled 1
  757 14:44:35.303464    PCI: 00:05.0: enabled 1
  758 14:44:35.304039    PCI: 00:06.0: enabled 0
  759 14:44:35.306680    PCI: 00:07.0: enabled 0
  760 14:44:35.310051     GENERIC: 0.0: enabled 1
  761 14:44:35.313627    PCI: 00:07.1: enabled 0
  762 14:44:35.316840     GENERIC: 1.0: enabled 1
  763 14:44:35.320221    PCI: 00:07.2: enabled 0
  764 14:44:35.320660     GENERIC: 0.0: enabled 1
  765 14:44:35.323750    PCI: 00:07.3: enabled 0
  766 14:44:35.327045     GENERIC: 1.0: enabled 1
  767 14:44:35.330177    PCI: 00:08.0: enabled 1
  768 14:44:35.333471    PCI: 00:09.0: enabled 0
  769 14:44:35.334023    PCI: 00:0a.0: enabled 0
  770 14:44:35.337015    PCI: 00:0d.0: enabled 1
  771 14:44:35.340075     USB0 port 0: enabled 1
  772 14:44:35.343076      USB3 port 0: enabled 1
  773 14:44:35.346851      USB3 port 1: enabled 1
  774 14:44:35.347399      USB3 port 2: enabled 0
  775 14:44:35.350253      USB3 port 3: enabled 0
  776 14:44:35.353323    PCI: 00:0d.1: enabled 0
  777 14:44:35.356624    PCI: 00:0d.2: enabled 0
  778 14:44:35.360034     GENERIC: 0.0: enabled 1
  779 14:44:35.360581    PCI: 00:0d.3: enabled 0
  780 14:44:35.363288    PCI: 00:0e.0: enabled 0
  781 14:44:35.366432    PCI: 00:10.2: enabled 1
  782 14:44:35.370302    PCI: 00:10.6: enabled 0
  783 14:44:35.373022    PCI: 00:10.7: enabled 0
  784 14:44:35.373468    PCI: 00:12.0: enabled 0
  785 14:44:35.376382    PCI: 00:12.6: enabled 0
  786 14:44:35.379926    PCI: 00:13.0: enabled 0
  787 14:44:35.383338    PCI: 00:14.0: enabled 1
  788 14:44:35.386600     USB0 port 0: enabled 1
  789 14:44:35.387130      USB2 port 0: enabled 0
  790 14:44:35.390043      USB2 port 1: enabled 1
  791 14:44:35.393632      USB2 port 2: enabled 1
  792 14:44:35.396088      USB2 port 3: enabled 0
  793 14:44:35.399416      USB2 port 4: enabled 1
  794 14:44:35.402980      USB2 port 5: enabled 0
  795 14:44:35.403515      USB2 port 6: enabled 0
  796 14:44:35.406471      USB2 port 7: enabled 0
  797 14:44:35.409369      USB2 port 8: enabled 0
  798 14:44:35.412652      USB2 port 9: enabled 0
  799 14:44:35.415945      USB3 port 0: enabled 0
  800 14:44:35.419728      USB3 port 1: enabled 1
  801 14:44:35.420251      USB3 port 2: enabled 0
  802 14:44:35.423113      USB3 port 3: enabled 0
  803 14:44:35.426120    PCI: 00:14.1: enabled 0
  804 14:44:35.429270    PCI: 00:14.2: enabled 1
  805 14:44:35.432953    PCI: 00:14.3: enabled 1
  806 14:44:35.433397     GENERIC: 0.0: enabled 1
  807 14:44:35.436311    PCI: 00:15.0: enabled 1
  808 14:44:35.439281     I2C: 00:1a: enabled 1
  809 14:44:35.442392     I2C: 00:31: enabled 1
  810 14:44:35.446162     I2C: 00:32: enabled 1
  811 14:44:35.446653    PCI: 00:15.1: enabled 1
  812 14:44:35.449392     I2C: 00:10: enabled 1
  813 14:44:35.452705    PCI: 00:15.2: enabled 1
  814 14:44:35.455608    PCI: 00:15.3: enabled 1
  815 14:44:35.456079    PCI: 00:16.0: enabled 1
  816 14:44:35.459115    PCI: 00:16.1: enabled 0
  817 14:44:35.462471    PCI: 00:16.2: enabled 0
  818 14:44:35.465565    PCI: 00:16.3: enabled 0
  819 14:44:35.469119    PCI: 00:16.4: enabled 0
  820 14:44:35.469577    PCI: 00:16.5: enabled 0
  821 14:44:35.472105    PCI: 00:17.0: enabled 1
  822 14:44:35.475631    PCI: 00:19.0: enabled 0
  823 14:44:35.479153    PCI: 00:19.1: enabled 1
  824 14:44:35.482239     I2C: 00:15: enabled 1
  825 14:44:35.482682    PCI: 00:19.2: enabled 0
  826 14:44:35.485421    PCI: 00:1d.0: enabled 1
  827 14:44:35.488890     GENERIC: 0.0: enabled 1
  828 14:44:35.492078    PCI: 00:1e.0: enabled 1
  829 14:44:35.495678    PCI: 00:1e.1: enabled 0
  830 14:44:35.496145    PCI: 00:1e.2: enabled 1
  831 14:44:35.498597     SPI: 00: enabled 1
  832 14:44:35.502337    PCI: 00:1e.3: enabled 1
  833 14:44:35.505321     SPI: 00: enabled 1
  834 14:44:35.505774    PCI: 00:1f.0: enabled 1
  835 14:44:35.508649     PNP: 0c09.0: enabled 1
  836 14:44:35.512064    PCI: 00:1f.1: enabled 0
  837 14:44:35.515742    PCI: 00:1f.2: enabled 1
  838 14:44:35.518756     GENERIC: 0.0: enabled 1
  839 14:44:35.519196      GENERIC: 0.0: enabled 1
  840 14:44:35.522042      GENERIC: 1.0: enabled 1
  841 14:44:35.525490    PCI: 00:1f.3: enabled 1
  842 14:44:35.528452    PCI: 00:1f.4: enabled 0
  843 14:44:35.531689    PCI: 00:1f.5: enabled 1
  844 14:44:35.532159    PCI: 00:1f.6: enabled 0
  845 14:44:35.535249    PCI: 00:1f.7: enabled 0
  846 14:44:35.583318   CPU_CLUSTER: 0: enabled 1
  847 14:44:35.583965    APIC: 00: enabled 1
  848 14:44:35.584405    APIC: 01: enabled 1
  849 14:44:35.584761    APIC: 07: enabled 1
  850 14:44:35.585175    APIC: 03: enabled 1
  851 14:44:35.585955    APIC: 04: enabled 1
  852 14:44:35.586334    APIC: 06: enabled 1
  853 14:44:35.586660    APIC: 02: enabled 1
  854 14:44:35.586971    APIC: 05: enabled 1
  855 14:44:35.587309  Root Device scanning...
  856 14:44:35.587672  scan_static_bus for Root Device
  857 14:44:35.588014  DOMAIN: 0000 enabled
  858 14:44:35.588314  CPU_CLUSTER: 0 enabled
  859 14:44:35.588610  DOMAIN: 0000 scanning...
  860 14:44:35.588900  PCI: pci_scan_bus for bus 00
  861 14:44:35.589187  PCI: 00:00.0 [8086/0000] ops
  862 14:44:35.589582  PCI: 00:00.0 [8086/9a12] enabled
  863 14:44:35.590227  PCI: 00:02.0 [8086/0000] bus ops
  864 14:44:35.590556  PCI: 00:02.0 [8086/9a40] enabled
  865 14:44:35.591293  PCI: 00:04.0 [8086/0000] bus ops
  866 14:44:35.594493  PCI: 00:04.0 [8086/9a03] enabled
  867 14:44:35.597954  PCI: 00:05.0 [8086/9a19] enabled
  868 14:44:35.601394  PCI: 00:07.0 [0000/0000] hidden
  869 14:44:35.604201  PCI: 00:08.0 [8086/9a11] enabled
  870 14:44:35.608549  PCI: 00:0a.0 [8086/9a0d] disabled
  871 14:44:35.611760  PCI: 00:0d.0 [8086/0000] bus ops
  872 14:44:35.615355  PCI: 00:0d.0 [8086/9a13] enabled
  873 14:44:35.618226  PCI: 00:14.0 [8086/0000] bus ops
  874 14:44:35.621397  PCI: 00:14.0 [8086/a0ed] enabled
  875 14:44:35.624844  PCI: 00:14.2 [8086/a0ef] enabled
  876 14:44:35.628167  PCI: 00:14.3 [8086/0000] bus ops
  877 14:44:35.631566  PCI: 00:14.3 [8086/a0f0] enabled
  878 14:44:35.634737  PCI: 00:15.0 [8086/0000] bus ops
  879 14:44:35.638304  PCI: 00:15.0 [8086/a0e8] enabled
  880 14:44:35.641631  PCI: 00:15.1 [8086/0000] bus ops
  881 14:44:35.644653  PCI: 00:15.1 [8086/a0e9] enabled
  882 14:44:35.648226  PCI: 00:15.2 [8086/0000] bus ops
  883 14:44:35.651840  PCI: 00:15.2 [8086/a0ea] enabled
  884 14:44:35.655148  PCI: 00:15.3 [8086/0000] bus ops
  885 14:44:35.658055  PCI: 00:15.3 [8086/a0eb] enabled
  886 14:44:35.661245  PCI: 00:16.0 [8086/0000] ops
  887 14:44:35.664765  PCI: 00:16.0 [8086/a0e0] enabled
  888 14:44:35.668000  PCI: Static device PCI: 00:17.0 not found, disabling it.
  889 14:44:35.671280  PCI: 00:19.0 [8086/0000] bus ops
  890 14:44:35.674911  PCI: 00:19.0 [8086/a0c5] disabled
  891 14:44:35.678329  PCI: 00:19.1 [8086/0000] bus ops
  892 14:44:35.681192  PCI: 00:19.1 [8086/a0c6] enabled
  893 14:44:35.684255  PCI: 00:1d.0 [8086/0000] bus ops
  894 14:44:35.687773  PCI: 00:1d.0 [8086/a0b0] enabled
  895 14:44:35.691466  PCI: 00:1e.0 [8086/0000] ops
  896 14:44:35.694586  PCI: 00:1e.0 [8086/a0a8] enabled
  897 14:44:35.697648  PCI: 00:1e.2 [8086/0000] bus ops
  898 14:44:35.701125  PCI: 00:1e.2 [8086/a0aa] enabled
  899 14:44:35.704542  PCI: 00:1e.3 [8086/0000] bus ops
  900 14:44:35.707827  PCI: 00:1e.3 [8086/a0ab] enabled
  901 14:44:35.712543  PCI: 00:1f.0 [8086/0000] bus ops
  902 14:44:35.714374  PCI: 00:1f.0 [8086/a087] enabled
  903 14:44:35.717795  RTC Init
  904 14:44:35.720948  Set power on after power failure.
  905 14:44:35.721391  Disabling Deep S3
  906 14:44:35.724731  Disabling Deep S3
  907 14:44:35.727584  Disabling Deep S4
  908 14:44:35.728050  Disabling Deep S4
  909 14:44:35.731138  Disabling Deep S5
  910 14:44:35.731572  Disabling Deep S5
  911 14:44:35.734376  PCI: 00:1f.2 [0000/0000] hidden
  912 14:44:35.737552  PCI: 00:1f.3 [8086/0000] bus ops
  913 14:44:35.740876  PCI: 00:1f.3 [8086/a0c8] enabled
  914 14:44:35.744398  PCI: 00:1f.5 [8086/0000] bus ops
  915 14:44:35.747454  PCI: 00:1f.5 [8086/a0a4] enabled
  916 14:44:35.750674  PCI: Leftover static devices:
  917 14:44:35.754251  PCI: 00:10.2
  918 14:44:35.754688  PCI: 00:10.6
  919 14:44:35.755034  PCI: 00:10.7
  920 14:44:35.757210  PCI: 00:06.0
  921 14:44:35.757648  PCI: 00:07.1
  922 14:44:35.760851  PCI: 00:07.2
  923 14:44:35.761379  PCI: 00:07.3
  924 14:44:35.761730  PCI: 00:09.0
  925 14:44:35.764090  PCI: 00:0d.1
  926 14:44:35.764530  PCI: 00:0d.2
  927 14:44:35.767354  PCI: 00:0d.3
  928 14:44:35.767823  PCI: 00:0e.0
  929 14:44:35.768176  PCI: 00:12.0
  930 14:44:35.770586  PCI: 00:12.6
  931 14:44:35.771021  PCI: 00:13.0
  932 14:44:35.773811  PCI: 00:14.1
  933 14:44:35.774247  PCI: 00:16.1
  934 14:44:35.777131  PCI: 00:16.2
  935 14:44:35.777567  PCI: 00:16.3
  936 14:44:35.777911  PCI: 00:16.4
  937 14:44:35.780502  PCI: 00:16.5
  938 14:44:35.780936  PCI: 00:17.0
  939 14:44:35.784226  PCI: 00:19.2
  940 14:44:35.784662  PCI: 00:1e.1
  941 14:44:35.785008  PCI: 00:1f.1
  942 14:44:35.787062  PCI: 00:1f.4
  943 14:44:35.787499  PCI: 00:1f.6
  944 14:44:35.790557  PCI: 00:1f.7
  945 14:44:35.793925  PCI: Check your devicetree.cb.
  946 14:44:35.794363  PCI: 00:02.0 scanning...
  947 14:44:35.797199  scan_generic_bus for PCI: 00:02.0
  948 14:44:35.804036  scan_generic_bus for PCI: 00:02.0 done
  949 14:44:35.807143  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  950 14:44:35.810560  PCI: 00:04.0 scanning...
  951 14:44:35.813946  scan_generic_bus for PCI: 00:04.0
  952 14:44:35.816941  GENERIC: 0.0 enabled
  953 14:44:35.820125  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  954 14:44:35.827038  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  955 14:44:35.830390  PCI: 00:0d.0 scanning...
  956 14:44:35.833492  scan_static_bus for PCI: 00:0d.0
  957 14:44:35.833932  USB0 port 0 enabled
  958 14:44:35.836925  USB0 port 0 scanning...
  959 14:44:35.840519  scan_static_bus for USB0 port 0
  960 14:44:35.843451  USB3 port 0 enabled
  961 14:44:35.843918  USB3 port 1 enabled
  962 14:44:35.846902  USB3 port 2 disabled
  963 14:44:35.850417  USB3 port 3 disabled
  964 14:44:35.850909  USB3 port 0 scanning...
  965 14:44:35.854076  scan_static_bus for USB3 port 0
  966 14:44:35.860377  scan_static_bus for USB3 port 0 done
  967 14:44:35.863597  scan_bus: bus USB3 port 0 finished in 6 msecs
  968 14:44:35.866633  USB3 port 1 scanning...
  969 14:44:35.869850  scan_static_bus for USB3 port 1
  970 14:44:35.873391  scan_static_bus for USB3 port 1 done
  971 14:44:35.876329  scan_bus: bus USB3 port 1 finished in 6 msecs
  972 14:44:35.880213  scan_static_bus for USB0 port 0 done
  973 14:44:35.886506  scan_bus: bus USB0 port 0 finished in 43 msecs
  974 14:44:35.889873  scan_static_bus for PCI: 00:0d.0 done
  975 14:44:35.893230  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  976 14:44:35.896495  PCI: 00:14.0 scanning...
  977 14:44:35.899905  scan_static_bus for PCI: 00:14.0
  978 14:44:35.903165  USB0 port 0 enabled
  979 14:44:35.906568  USB0 port 0 scanning...
  980 14:44:35.909885  scan_static_bus for USB0 port 0
  981 14:44:35.910439  USB2 port 0 disabled
  982 14:44:35.913154  USB2 port 1 enabled
  983 14:44:35.916594  USB2 port 2 enabled
  984 14:44:35.917155  USB2 port 3 disabled
  985 14:44:35.919635  USB2 port 4 enabled
  986 14:44:35.920098  USB2 port 5 disabled
  987 14:44:35.922716  USB2 port 6 disabled
  988 14:44:35.926205  USB2 port 7 disabled
  989 14:44:35.926644  USB2 port 8 disabled
  990 14:44:35.929789  USB2 port 9 disabled
  991 14:44:35.932944  USB3 port 0 disabled
  992 14:44:35.933472  USB3 port 1 enabled
  993 14:44:35.936314  USB3 port 2 disabled
  994 14:44:35.939479  USB3 port 3 disabled
  995 14:44:35.939953  USB2 port 1 scanning...
  996 14:44:35.942802  scan_static_bus for USB2 port 1
  997 14:44:35.946426  scan_static_bus for USB2 port 1 done
  998 14:44:35.952810  scan_bus: bus USB2 port 1 finished in 6 msecs
  999 14:44:35.955969  USB2 port 2 scanning...
 1000 14:44:35.959389  scan_static_bus for USB2 port 2
 1001 14:44:35.962872  scan_static_bus for USB2 port 2 done
 1002 14:44:35.965909  scan_bus: bus USB2 port 2 finished in 6 msecs
 1003 14:44:35.969421  USB2 port 4 scanning...
 1004 14:44:35.972396  scan_static_bus for USB2 port 4
 1005 14:44:35.976040  scan_static_bus for USB2 port 4 done
 1006 14:44:35.979363  scan_bus: bus USB2 port 4 finished in 6 msecs
 1007 14:44:35.982557  USB3 port 1 scanning...
 1008 14:44:35.985705  scan_static_bus for USB3 port 1
 1009 14:44:35.989005  scan_static_bus for USB3 port 1 done
 1010 14:44:35.995881  scan_bus: bus USB3 port 1 finished in 6 msecs
 1011 14:44:35.998798  scan_static_bus for USB0 port 0 done
 1012 14:44:36.002586  scan_bus: bus USB0 port 0 finished in 93 msecs
 1013 14:44:36.005470  scan_static_bus for PCI: 00:14.0 done
 1014 14:44:36.012262  scan_bus: bus PCI: 00:14.0 finished in 109 msecs
 1015 14:44:36.015837  PCI: 00:14.3 scanning...
 1016 14:44:36.019025  scan_static_bus for PCI: 00:14.3
 1017 14:44:36.019541  GENERIC: 0.0 enabled
 1018 14:44:36.025301  scan_static_bus for PCI: 00:14.3 done
 1019 14:44:36.028829  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
 1020 14:44:36.031965  PCI: 00:15.0 scanning...
 1021 14:44:36.035312  scan_static_bus for PCI: 00:15.0
 1022 14:44:36.035884  I2C: 00:1a enabled
 1023 14:44:36.038669  I2C: 00:31 enabled
 1024 14:44:36.042060  I2C: 00:32 enabled
 1025 14:44:36.045575  scan_static_bus for PCI: 00:15.0 done
 1026 14:44:36.048541  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
 1027 14:44:36.051927  PCI: 00:15.1 scanning...
 1028 14:44:36.055577  scan_static_bus for PCI: 00:15.1
 1029 14:44:36.058603  I2C: 00:10 enabled
 1030 14:44:36.061669  scan_static_bus for PCI: 00:15.1 done
 1031 14:44:36.065057  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
 1032 14:44:36.068217  PCI: 00:15.2 scanning...
 1033 14:44:36.071618  scan_static_bus for PCI: 00:15.2
 1034 14:44:36.075134  scan_static_bus for PCI: 00:15.2 done
 1035 14:44:36.082083  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
 1036 14:44:36.082529  PCI: 00:15.3 scanning...
 1037 14:44:36.084935  scan_static_bus for PCI: 00:15.3
 1038 14:44:36.091770  scan_static_bus for PCI: 00:15.3 done
 1039 14:44:36.094825  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1040 14:44:36.098605  PCI: 00:19.1 scanning...
 1041 14:44:36.101805  scan_static_bus for PCI: 00:19.1
 1042 14:44:36.102242  I2C: 00:15 enabled
 1043 14:44:36.108630  scan_static_bus for PCI: 00:19.1 done
 1044 14:44:36.111404  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1045 14:44:36.115100  PCI: 00:1d.0 scanning...
 1046 14:44:36.118303  do_pci_scan_bridge for PCI: 00:1d.0
 1047 14:44:36.121529  PCI: pci_scan_bus for bus 01
 1048 14:44:36.124891  PCI: 01:00.0 [15b7/5009] enabled
 1049 14:44:36.125331  GENERIC: 0.0 enabled
 1050 14:44:36.131322  Enabling Common Clock Configuration
 1051 14:44:36.134918  L1 Sub-State supported from root port 29
 1052 14:44:36.137872  L1 Sub-State Support = 0x5
 1053 14:44:36.141524  CommonModeRestoreTime = 0x28
 1054 14:44:36.144863  Power On Value = 0x16, Power On Scale = 0x0
 1055 14:44:36.145301  ASPM: Enabled L1
 1056 14:44:36.151366  PCIe: Max_Payload_Size adjusted to 128
 1057 14:44:36.154438  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1058 14:44:36.157813  PCI: 00:1e.2 scanning...
 1059 14:44:36.160978  scan_generic_bus for PCI: 00:1e.2
 1060 14:44:36.161418  SPI: 00 enabled
 1061 14:44:36.167496  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1062 14:44:36.174538  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1063 14:44:36.174983  PCI: 00:1e.3 scanning...
 1064 14:44:36.181494  scan_generic_bus for PCI: 00:1e.3
 1065 14:44:36.182015  SPI: 00 enabled
 1066 14:44:36.188488  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1067 14:44:36.191739  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1068 14:44:36.195513  PCI: 00:1f.0 scanning...
 1069 14:44:36.198728  scan_static_bus for PCI: 00:1f.0
 1070 14:44:36.201605  PNP: 0c09.0 enabled
 1071 14:44:36.202047  PNP: 0c09.0 scanning...
 1072 14:44:36.205303  scan_static_bus for PNP: 0c09.0
 1073 14:44:36.208192  scan_static_bus for PNP: 0c09.0 done
 1074 14:44:36.215157  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1075 14:44:36.218521  scan_static_bus for PCI: 00:1f.0 done
 1076 14:44:36.221571  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1077 14:44:36.225090  PCI: 00:1f.2 scanning...
 1078 14:44:36.228025  scan_static_bus for PCI: 00:1f.2
 1079 14:44:36.231481  GENERIC: 0.0 enabled
 1080 14:44:36.235027  GENERIC: 0.0 scanning...
 1081 14:44:36.238085  scan_static_bus for GENERIC: 0.0
 1082 14:44:36.238527  GENERIC: 0.0 enabled
 1083 14:44:36.241463  GENERIC: 1.0 enabled
 1084 14:44:36.244817  scan_static_bus for GENERIC: 0.0 done
 1085 14:44:36.252103  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1086 14:44:36.254494  scan_static_bus for PCI: 00:1f.2 done
 1087 14:44:36.258036  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1088 14:44:36.261217  PCI: 00:1f.3 scanning...
 1089 14:44:36.264618  scan_static_bus for PCI: 00:1f.3
 1090 14:44:36.268092  scan_static_bus for PCI: 00:1f.3 done
 1091 14:44:36.275084  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1092 14:44:36.275529  PCI: 00:1f.5 scanning...
 1093 14:44:36.281311  scan_generic_bus for PCI: 00:1f.5
 1094 14:44:36.284520  scan_generic_bus for PCI: 00:1f.5 done
 1095 14:44:36.288085  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1096 14:44:36.294404  scan_bus: bus DOMAIN: 0000 finished in 716 msecs
 1097 14:44:36.297636  scan_static_bus for Root Device done
 1098 14:44:36.301042  scan_bus: bus Root Device finished in 735 msecs
 1099 14:44:36.301609  done
 1100 14:44:36.307799  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
 1101 14:44:36.310519  Chrome EC: UHEPI supported
 1102 14:44:36.317262  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1103 14:44:36.324101  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1104 14:44:36.327760  SPI flash protection: WPSW=0 SRP0=1
 1105 14:44:36.334129  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1106 14:44:36.337499  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1107 14:44:36.340630  found VGA at PCI: 00:02.0
 1108 14:44:36.344067  Setting up VGA for PCI: 00:02.0
 1109 14:44:36.350436  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1110 14:44:36.354222  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1111 14:44:36.357684  Allocating resources...
 1112 14:44:36.360686  Reading resources...
 1113 14:44:36.363954  Root Device read_resources bus 0 link: 0
 1114 14:44:36.366989  DOMAIN: 0000 read_resources bus 0 link: 0
 1115 14:44:36.374185  PCI: 00:04.0 read_resources bus 1 link: 0
 1116 14:44:36.376849  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1117 14:44:36.383483  PCI: 00:0d.0 read_resources bus 0 link: 0
 1118 14:44:36.387052  USB0 port 0 read_resources bus 0 link: 0
 1119 14:44:36.393679  USB0 port 0 read_resources bus 0 link: 0 done
 1120 14:44:36.396851  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1121 14:44:36.399977  PCI: 00:14.0 read_resources bus 0 link: 0
 1122 14:44:36.407105  USB0 port 0 read_resources bus 0 link: 0
 1123 14:44:36.410703  USB0 port 0 read_resources bus 0 link: 0 done
 1124 14:44:36.417297  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1125 14:44:36.420394  PCI: 00:14.3 read_resources bus 0 link: 0
 1126 14:44:36.427209  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1127 14:44:36.430540  PCI: 00:15.0 read_resources bus 0 link: 0
 1128 14:44:36.437204  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1129 14:44:36.440439  PCI: 00:15.1 read_resources bus 0 link: 0
 1130 14:44:36.447118  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1131 14:44:36.450329  PCI: 00:19.1 read_resources bus 0 link: 0
 1132 14:44:36.457736  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1133 14:44:36.460890  PCI: 00:1d.0 read_resources bus 1 link: 0
 1134 14:44:36.467335  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1135 14:44:36.470817  PCI: 00:1e.2 read_resources bus 2 link: 0
 1136 14:44:36.477194  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1137 14:44:36.480679  PCI: 00:1e.3 read_resources bus 3 link: 0
 1138 14:44:36.486835  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1139 14:44:36.490470  PCI: 00:1f.0 read_resources bus 0 link: 0
 1140 14:44:36.497183  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1141 14:44:36.500614  PCI: 00:1f.2 read_resources bus 0 link: 0
 1142 14:44:36.503469  GENERIC: 0.0 read_resources bus 0 link: 0
 1143 14:44:36.510763  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1144 14:44:36.514082  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1145 14:44:36.521179  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1146 14:44:36.524255  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1147 14:44:36.531352  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1148 14:44:36.534845  Root Device read_resources bus 0 link: 0 done
 1149 14:44:36.537706  Done reading resources.
 1150 14:44:36.544186  Show resources in subtree (Root Device)...After reading.
 1151 14:44:36.547823   Root Device child on link 0 DOMAIN: 0000
 1152 14:44:36.550935    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1153 14:44:36.560590    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1154 14:44:36.570747    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1155 14:44:36.573713     PCI: 00:00.0
 1156 14:44:36.583813     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1157 14:44:36.590697     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1158 14:44:36.600379     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1159 14:44:36.610642     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1160 14:44:36.620071     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1161 14:44:36.629967     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1162 14:44:36.640176     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1163 14:44:36.650009     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1164 14:44:36.656422     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1165 14:44:36.666478     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1166 14:44:36.676452     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1167 14:44:36.686562     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1168 14:44:36.696217     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1169 14:44:36.702597     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1170 14:44:36.712597     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1171 14:44:36.722844     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1172 14:44:36.732535     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1173 14:44:36.742627     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1174 14:44:36.752457     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1175 14:44:36.762262     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1176 14:44:36.762513     PCI: 00:02.0
 1177 14:44:36.771638     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1178 14:44:36.781704     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1179 14:44:36.791533     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1180 14:44:36.795525     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1181 14:44:36.804966     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1182 14:44:36.808143      GENERIC: 0.0
 1183 14:44:36.808478     PCI: 00:05.0
 1184 14:44:36.821470     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1185 14:44:36.824861     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1186 14:44:36.825304      GENERIC: 0.0
 1187 14:44:36.828545     PCI: 00:08.0
 1188 14:44:36.838013     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1189 14:44:36.838467     PCI: 00:0a.0
 1190 14:44:36.844749     PCI: 00:0d.0 child on link 0 USB0 port 0
 1191 14:44:36.854463     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1192 14:44:36.858440      USB0 port 0 child on link 0 USB3 port 0
 1193 14:44:36.861118       USB3 port 0
 1194 14:44:36.861334       USB3 port 1
 1195 14:44:36.864573       USB3 port 2
 1196 14:44:36.865011       USB3 port 3
 1197 14:44:36.871454     PCI: 00:14.0 child on link 0 USB0 port 0
 1198 14:44:36.881008     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1199 14:44:36.884111      USB0 port 0 child on link 0 USB2 port 0
 1200 14:44:36.887766       USB2 port 0
 1201 14:44:36.888002       USB2 port 1
 1202 14:44:36.891155       USB2 port 2
 1203 14:44:36.891435       USB2 port 3
 1204 14:44:36.894216       USB2 port 4
 1205 14:44:36.894498       USB2 port 5
 1206 14:44:36.897640       USB2 port 6
 1207 14:44:36.897922       USB2 port 7
 1208 14:44:36.900901       USB2 port 8
 1209 14:44:36.901101       USB2 port 9
 1210 14:44:36.904067       USB3 port 0
 1211 14:44:36.904256       USB3 port 1
 1212 14:44:36.907426       USB3 port 2
 1213 14:44:36.907723       USB3 port 3
 1214 14:44:36.910921     PCI: 00:14.2
 1215 14:44:36.920690     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1216 14:44:36.930788     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1217 14:44:36.934313     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1218 14:44:36.944152     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1219 14:44:36.947090      GENERIC: 0.0
 1220 14:44:36.950805     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1221 14:44:36.960661     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1222 14:44:36.963945      I2C: 00:1a
 1223 14:44:36.964210      I2C: 00:31
 1224 14:44:36.967353      I2C: 00:32
 1225 14:44:36.970289     PCI: 00:15.1 child on link 0 I2C: 00:10
 1226 14:44:36.980371     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1227 14:44:36.980590      I2C: 00:10
 1228 14:44:36.983641     PCI: 00:15.2
 1229 14:44:36.993724     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1230 14:44:36.994000     PCI: 00:15.3
 1231 14:44:37.003645     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1232 14:44:37.007251     PCI: 00:16.0
 1233 14:44:37.016787     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1234 14:44:37.017059     PCI: 00:19.0
 1235 14:44:37.023371     PCI: 00:19.1 child on link 0 I2C: 00:15
 1236 14:44:37.033405     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1237 14:44:37.033664      I2C: 00:15
 1238 14:44:37.036724     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1239 14:44:37.046752     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1240 14:44:37.056506     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1241 14:44:37.066500     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1242 14:44:37.066749      GENERIC: 0.0
 1243 14:44:37.069951      PCI: 01:00.0
 1244 14:44:37.079982      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1245 14:44:37.090092      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
 1246 14:44:37.090369     PCI: 00:1e.0
 1247 14:44:37.103087     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1248 14:44:37.107001     PCI: 00:1e.2 child on link 0 SPI: 00
 1249 14:44:37.116573     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1250 14:44:37.117000      SPI: 00
 1251 14:44:37.123289     PCI: 00:1e.3 child on link 0 SPI: 00
 1252 14:44:37.133266     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1253 14:44:37.133557      SPI: 00
 1254 14:44:37.136073     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1255 14:44:37.146330     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1256 14:44:37.146586      PNP: 0c09.0
 1257 14:44:37.156389      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1258 14:44:37.159245     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1259 14:44:37.169531     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1260 14:44:37.179546     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1261 14:44:37.182352      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1262 14:44:37.185689       GENERIC: 0.0
 1263 14:44:37.189242       GENERIC: 1.0
 1264 14:44:37.189405     PCI: 00:1f.3
 1265 14:44:37.199218     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1266 14:44:37.209364     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1267 14:44:37.212811     PCI: 00:1f.5
 1268 14:44:37.219425     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1269 14:44:37.226097    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1270 14:44:37.226325     APIC: 00
 1271 14:44:37.226457     APIC: 01
 1272 14:44:37.228631     APIC: 07
 1273 14:44:37.228796     APIC: 03
 1274 14:44:37.232457     APIC: 04
 1275 14:44:37.232691     APIC: 06
 1276 14:44:37.232823     APIC: 02
 1277 14:44:37.235398     APIC: 05
 1278 14:44:37.242308  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1279 14:44:37.248736   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1280 14:44:37.255444   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1281 14:44:37.258918   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1282 14:44:37.265619    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1283 14:44:37.268865    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem
 1284 14:44:37.275431   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1285 14:44:37.281871   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1286 14:44:37.291770   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1287 14:44:37.298543  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1288 14:44:37.305017  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1289 14:44:37.311697   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1290 14:44:37.318393   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1291 14:44:37.328177   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1292 14:44:37.331604   DOMAIN: 0000: Resource ranges:
 1293 14:44:37.334867   * Base: 1000, Size: 800, Tag: 100
 1294 14:44:37.338680   * Base: 1900, Size: e700, Tag: 100
 1295 14:44:37.342053    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1296 14:44:37.348011  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1297 14:44:37.354818  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1298 14:44:37.365062   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1299 14:44:37.371052   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1300 14:44:37.377818   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1301 14:44:37.387692   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1302 14:44:37.395031   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1303 14:44:37.401054   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1304 14:44:37.411250   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1305 14:44:37.417797   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1306 14:44:37.424586   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1307 14:44:37.434590   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1308 14:44:37.441003   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1309 14:44:37.447540   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1310 14:44:37.458127   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1311 14:44:37.464101   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1312 14:44:37.470903   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1313 14:44:37.481133   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1314 14:44:37.487430   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
 1315 14:44:37.493937   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1316 14:44:37.504066   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1317 14:44:37.510959   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1318 14:44:37.517020   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1319 14:44:37.527555   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1320 14:44:37.530776   DOMAIN: 0000: Resource ranges:
 1321 14:44:37.533921   * Base: 7fc00000, Size: 40400000, Tag: 200
 1322 14:44:37.537646   * Base: d0000000, Size: 28000000, Tag: 200
 1323 14:44:37.540972   * Base: fa000000, Size: 1000000, Tag: 200
 1324 14:44:37.547168   * Base: fb001000, Size: 2fff000, Tag: 200
 1325 14:44:37.550740   * Base: fe010000, Size: 2e000, Tag: 200
 1326 14:44:37.553902   * Base: fe03f000, Size: d41000, Tag: 200
 1327 14:44:37.557227   * Base: fed88000, Size: 8000, Tag: 200
 1328 14:44:37.563780   * Base: fed93000, Size: d000, Tag: 200
 1329 14:44:37.567344   * Base: feda2000, Size: 1e000, Tag: 200
 1330 14:44:37.570601   * Base: fede0000, Size: 1220000, Tag: 200
 1331 14:44:37.577307   * Base: 480400000, Size: 7b7fc00000, Tag: 100200
 1332 14:44:37.583958    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1333 14:44:37.590959    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1334 14:44:37.597829    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1335 14:44:37.603836    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1336 14:44:37.610262    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1337 14:44:37.617010    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1338 14:44:37.623438    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1339 14:44:37.630448    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1340 14:44:37.637095    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1341 14:44:37.643411    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1342 14:44:37.650222    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1343 14:44:37.656422    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1344 14:44:37.662869    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1345 14:44:37.669887    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1346 14:44:37.676108    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1347 14:44:37.683197    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1348 14:44:37.690073    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1349 14:44:37.696187    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1350 14:44:37.703197    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1351 14:44:37.709604    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1352 14:44:37.716340    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1353 14:44:37.723345    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1354 14:44:37.729352  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1355 14:44:37.739388  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1356 14:44:37.742706   PCI: 00:1d.0: Resource ranges:
 1357 14:44:37.746016   * Base: 7fc00000, Size: 100000, Tag: 200
 1358 14:44:37.752562    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1359 14:44:37.759464    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
 1360 14:44:37.765577  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1361 14:44:37.772470  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1362 14:44:37.779030  Root Device assign_resources, bus 0 link: 0
 1363 14:44:37.782538  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1364 14:44:37.792241  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1365 14:44:37.798992  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1366 14:44:37.808916  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1367 14:44:37.815699  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1368 14:44:37.818778  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1369 14:44:37.825860  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1370 14:44:37.832617  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1371 14:44:37.842743  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1372 14:44:37.848697  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1373 14:44:37.855237  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1374 14:44:37.858242  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1375 14:44:37.868085  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1376 14:44:37.871240  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1377 14:44:37.874647  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1378 14:44:37.884567  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1379 14:44:37.891237  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1380 14:44:37.901098  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1381 14:44:37.904371  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1382 14:44:37.910896  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1383 14:44:37.917423  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1384 14:44:37.921012  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1385 14:44:37.927716  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1386 14:44:37.934499  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1387 14:44:37.940647  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1388 14:44:37.944084  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1389 14:44:37.954000  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1390 14:44:37.960574  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1391 14:44:37.970770  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1392 14:44:37.977271  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1393 14:44:37.980210  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1394 14:44:37.987258  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1395 14:44:37.993812  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1396 14:44:38.004174  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1397 14:44:38.014114  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1398 14:44:38.017905  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1399 14:44:38.027535  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1400 14:44:38.034496  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
 1401 14:44:38.040464  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1402 14:44:38.047115  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1403 14:44:38.054382  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1404 14:44:38.057404  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1405 14:44:38.067204  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1406 14:44:38.070445  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1407 14:44:38.073146  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1408 14:44:38.079434  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1409 14:44:38.083388  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1410 14:44:38.089805  LPC: Trying to open IO window from 800 size 1ff
 1411 14:44:38.095959  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1412 14:44:38.105826  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1413 14:44:38.112830  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1414 14:44:38.119637  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1415 14:44:38.123430  Root Device assign_resources, bus 0 link: 0
 1416 14:44:38.126245  Done setting resources.
 1417 14:44:38.132878  Show resources in subtree (Root Device)...After assigning values.
 1418 14:44:38.136128   Root Device child on link 0 DOMAIN: 0000
 1419 14:44:38.139459    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1420 14:44:38.149985    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1421 14:44:38.159878    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1422 14:44:38.163026     PCI: 00:00.0
 1423 14:44:38.169349     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1424 14:44:38.179473     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1425 14:44:38.189010     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1426 14:44:38.198931     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1427 14:44:38.208910     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1428 14:44:38.218921     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1429 14:44:38.225356     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1430 14:44:38.235674     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1431 14:44:38.246067     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1432 14:44:38.255902     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1433 14:44:38.265261     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1434 14:44:38.275217     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1435 14:44:38.282265     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1436 14:44:38.291633     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1437 14:44:38.301978     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1438 14:44:38.311765     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1439 14:44:38.322060     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1440 14:44:38.332033     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1441 14:44:38.338746     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1442 14:44:38.348069     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1443 14:44:38.351588     PCI: 00:02.0
 1444 14:44:38.361158     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1445 14:44:38.371305     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1446 14:44:38.381391     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1447 14:44:38.384733     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1448 14:44:38.398168     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1449 14:44:38.398708      GENERIC: 0.0
 1450 14:44:38.401467     PCI: 00:05.0
 1451 14:44:38.411409     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1452 14:44:38.414183     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1453 14:44:38.417851      GENERIC: 0.0
 1454 14:44:38.418289     PCI: 00:08.0
 1455 14:44:38.427229     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1456 14:44:38.431197     PCI: 00:0a.0
 1457 14:44:38.434424     PCI: 00:0d.0 child on link 0 USB0 port 0
 1458 14:44:38.444441     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1459 14:44:38.450794      USB0 port 0 child on link 0 USB3 port 0
 1460 14:44:38.451369       USB3 port 0
 1461 14:44:38.454665       USB3 port 1
 1462 14:44:38.455244       USB3 port 2
 1463 14:44:38.457175       USB3 port 3
 1464 14:44:38.461153     PCI: 00:14.0 child on link 0 USB0 port 0
 1465 14:44:38.471004     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1466 14:44:38.477216      USB0 port 0 child on link 0 USB2 port 0
 1467 14:44:38.477793       USB2 port 0
 1468 14:44:38.480414       USB2 port 1
 1469 14:44:38.480904       USB2 port 2
 1470 14:44:38.483881       USB2 port 3
 1471 14:44:38.484483       USB2 port 4
 1472 14:44:38.487298       USB2 port 5
 1473 14:44:38.487755       USB2 port 6
 1474 14:44:38.490745       USB2 port 7
 1475 14:44:38.491182       USB2 port 8
 1476 14:44:38.493755       USB2 port 9
 1477 14:44:38.494229       USB3 port 0
 1478 14:44:38.497154       USB3 port 1
 1479 14:44:38.501741       USB3 port 2
 1480 14:44:38.502278       USB3 port 3
 1481 14:44:38.503740     PCI: 00:14.2
 1482 14:44:38.514141     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1483 14:44:38.524170     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1484 14:44:38.527008     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1485 14:44:38.537053     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1486 14:44:38.540496      GENERIC: 0.0
 1487 14:44:38.544250     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1488 14:44:38.553842     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1489 14:44:38.556882      I2C: 00:1a
 1490 14:44:38.557371      I2C: 00:31
 1491 14:44:38.560590      I2C: 00:32
 1492 14:44:38.563991     PCI: 00:15.1 child on link 0 I2C: 00:10
 1493 14:44:38.573375     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1494 14:44:38.576831      I2C: 00:10
 1495 14:44:38.577383     PCI: 00:15.2
 1496 14:44:38.586351     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1497 14:44:38.589877     PCI: 00:15.3
 1498 14:44:38.599693     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1499 14:44:38.600168     PCI: 00:16.0
 1500 14:44:38.609915     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1501 14:44:38.613124     PCI: 00:19.0
 1502 14:44:38.616651     PCI: 00:19.1 child on link 0 I2C: 00:15
 1503 14:44:38.626610     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1504 14:44:38.629405      I2C: 00:15
 1505 14:44:38.633163     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1506 14:44:38.643004     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1507 14:44:38.652796     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1508 14:44:38.666315     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1509 14:44:38.666864      GENERIC: 0.0
 1510 14:44:38.669374      PCI: 01:00.0
 1511 14:44:38.679134      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1512 14:44:38.689104      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
 1513 14:44:38.689549     PCI: 00:1e.0
 1514 14:44:38.702803     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1515 14:44:38.705873     PCI: 00:1e.2 child on link 0 SPI: 00
 1516 14:44:38.716128     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1517 14:44:38.719478      SPI: 00
 1518 14:44:38.722520     PCI: 00:1e.3 child on link 0 SPI: 00
 1519 14:44:38.732020     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1520 14:44:38.732602      SPI: 00
 1521 14:44:38.739032     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1522 14:44:38.745833     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1523 14:44:38.748889      PNP: 0c09.0
 1524 14:44:38.755642      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1525 14:44:38.762032     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1526 14:44:38.772701     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1527 14:44:38.778541     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1528 14:44:38.784891      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1529 14:44:38.784984       GENERIC: 0.0
 1530 14:44:38.787895       GENERIC: 1.0
 1531 14:44:38.787989     PCI: 00:1f.3
 1532 14:44:38.801503     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1533 14:44:38.811889     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1534 14:44:38.812342     PCI: 00:1f.5
 1535 14:44:38.821697     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1536 14:44:38.828119    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1537 14:44:38.828556     APIC: 00
 1538 14:44:38.828896     APIC: 01
 1539 14:44:38.831382     APIC: 07
 1540 14:44:38.831850     APIC: 03
 1541 14:44:38.835165     APIC: 04
 1542 14:44:38.835739     APIC: 06
 1543 14:44:38.836105     APIC: 02
 1544 14:44:38.837898     APIC: 05
 1545 14:44:38.838331  Done allocating resources.
 1546 14:44:38.844950  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
 1547 14:44:38.851867  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1548 14:44:38.855107  Configure GPIOs for I2S audio on UP4.
 1549 14:44:38.862423  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1550 14:44:38.865523  Enabling resources...
 1551 14:44:38.869101  PCI: 00:00.0 subsystem <- 8086/9a12
 1552 14:44:38.872035  PCI: 00:00.0 cmd <- 06
 1553 14:44:38.875523  PCI: 00:02.0 subsystem <- 8086/9a40
 1554 14:44:38.878623  PCI: 00:02.0 cmd <- 03
 1555 14:44:38.881719  PCI: 00:04.0 subsystem <- 8086/9a03
 1556 14:44:38.884992  PCI: 00:04.0 cmd <- 02
 1557 14:44:38.888445  PCI: 00:05.0 subsystem <- 8086/9a19
 1558 14:44:38.888875  PCI: 00:05.0 cmd <- 02
 1559 14:44:38.895363  PCI: 00:08.0 subsystem <- 8086/9a11
 1560 14:44:38.895948  PCI: 00:08.0 cmd <- 06
 1561 14:44:38.898616  PCI: 00:0d.0 subsystem <- 8086/9a13
 1562 14:44:38.902055  PCI: 00:0d.0 cmd <- 02
 1563 14:44:38.904873  PCI: 00:14.0 subsystem <- 8086/a0ed
 1564 14:44:38.908383  PCI: 00:14.0 cmd <- 02
 1565 14:44:38.911366  PCI: 00:14.2 subsystem <- 8086/a0ef
 1566 14:44:38.914426  PCI: 00:14.2 cmd <- 02
 1567 14:44:38.917963  PCI: 00:14.3 subsystem <- 8086/a0f0
 1568 14:44:38.921388  PCI: 00:14.3 cmd <- 02
 1569 14:44:38.924639  PCI: 00:15.0 subsystem <- 8086/a0e8
 1570 14:44:38.928208  PCI: 00:15.0 cmd <- 02
 1571 14:44:38.931195  PCI: 00:15.1 subsystem <- 8086/a0e9
 1572 14:44:38.934678  PCI: 00:15.1 cmd <- 02
 1573 14:44:38.937608  PCI: 00:15.2 subsystem <- 8086/a0ea
 1574 14:44:38.938048  PCI: 00:15.2 cmd <- 02
 1575 14:44:38.944941  PCI: 00:15.3 subsystem <- 8086/a0eb
 1576 14:44:38.945468  PCI: 00:15.3 cmd <- 02
 1577 14:44:38.947803  PCI: 00:16.0 subsystem <- 8086/a0e0
 1578 14:44:38.951124  PCI: 00:16.0 cmd <- 02
 1579 14:44:38.954433  PCI: 00:19.1 subsystem <- 8086/a0c6
 1580 14:44:38.957720  PCI: 00:19.1 cmd <- 02
 1581 14:44:38.961262  PCI: 00:1d.0 bridge ctrl <- 0013
 1582 14:44:38.964354  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1583 14:44:38.967630  PCI: 00:1d.0 cmd <- 06
 1584 14:44:38.971206  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1585 14:44:38.974367  PCI: 00:1e.0 cmd <- 06
 1586 14:44:38.977359  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1587 14:44:38.980950  PCI: 00:1e.2 cmd <- 06
 1588 14:44:38.984190  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1589 14:44:38.987014  PCI: 00:1e.3 cmd <- 02
 1590 14:44:38.990911  PCI: 00:1f.0 subsystem <- 8086/a087
 1591 14:44:38.993959  PCI: 00:1f.0 cmd <- 407
 1592 14:44:38.997302  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1593 14:44:38.997735  PCI: 00:1f.3 cmd <- 02
 1594 14:44:39.004224  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1595 14:44:39.004763  PCI: 00:1f.5 cmd <- 406
 1596 14:44:39.009229  PCI: 01:00.0 cmd <- 02
 1597 14:44:39.013991  done.
 1598 14:44:39.016929  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1599 14:44:39.020689  Initializing devices...
 1600 14:44:39.023420  Root Device init
 1601 14:44:39.026775  Chrome EC: Set SMI mask to 0x0000000000000000
 1602 14:44:39.033014  Chrome EC: clear events_b mask to 0x0000000000000000
 1603 14:44:39.040220  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1604 14:44:39.046403  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1605 14:44:39.049665  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1606 14:44:39.056271  Chrome EC: Set WAKE mask to 0x0000000000000000
 1607 14:44:39.059945  fw_config match found: DB_USB=USB3_ACTIVE
 1608 14:44:39.066398  Configure Right Type-C port orientation for retimer
 1609 14:44:39.069833  Root Device init finished in 42 msecs
 1610 14:44:39.073238  PCI: 00:00.0 init
 1611 14:44:39.076606  CPU TDP = 9 Watts
 1612 14:44:39.077188  CPU PL1 = 9 Watts
 1613 14:44:39.079195  CPU PL2 = 40 Watts
 1614 14:44:39.079634  CPU PL4 = 83 Watts
 1615 14:44:39.085913  PCI: 00:00.0 init finished in 8 msecs
 1616 14:44:39.086454  PCI: 00:02.0 init
 1617 14:44:39.089483  GMA: Found VBT in CBFS
 1618 14:44:39.092256  GMA: Found valid VBT in CBFS
 1619 14:44:39.099574  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1620 14:44:39.106003                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1621 14:44:39.109392  PCI: 00:02.0 init finished in 18 msecs
 1622 14:44:39.112363  PCI: 00:05.0 init
 1623 14:44:39.115842  PCI: 00:05.0 init finished in 0 msecs
 1624 14:44:39.119202  PCI: 00:08.0 init
 1625 14:44:39.122502  PCI: 00:08.0 init finished in 0 msecs
 1626 14:44:39.125713  PCI: 00:14.0 init
 1627 14:44:39.129436  PCI: 00:14.0 init finished in 0 msecs
 1628 14:44:39.132084  PCI: 00:14.2 init
 1629 14:44:39.135443  PCI: 00:14.2 init finished in 0 msecs
 1630 14:44:39.135982  PCI: 00:15.0 init
 1631 14:44:39.138900  I2C bus 0 version 0x3230302a
 1632 14:44:39.142486  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1633 14:44:39.149145  PCI: 00:15.0 init finished in 6 msecs
 1634 14:44:39.149737  PCI: 00:15.1 init
 1635 14:44:39.152109  I2C bus 1 version 0x3230302a
 1636 14:44:39.155537  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1637 14:44:39.158653  PCI: 00:15.1 init finished in 6 msecs
 1638 14:44:39.162550  PCI: 00:15.2 init
 1639 14:44:39.165541  I2C bus 2 version 0x3230302a
 1640 14:44:39.168719  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1641 14:44:39.172265  PCI: 00:15.2 init finished in 6 msecs
 1642 14:44:39.175735  PCI: 00:15.3 init
 1643 14:44:39.179067  I2C bus 3 version 0x3230302a
 1644 14:44:39.181562  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1645 14:44:39.185276  PCI: 00:15.3 init finished in 6 msecs
 1646 14:44:39.188194  PCI: 00:16.0 init
 1647 14:44:39.191696  PCI: 00:16.0 init finished in 0 msecs
 1648 14:44:39.195200  PCI: 00:19.1 init
 1649 14:44:39.198344  I2C bus 5 version 0x3230302a
 1650 14:44:39.201264  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1651 14:44:39.204952  PCI: 00:19.1 init finished in 6 msecs
 1652 14:44:39.205538  PCI: 00:1d.0 init
 1653 14:44:39.208100  Initializing PCH PCIe bridge.
 1654 14:44:39.211552  PCI: 00:1d.0 init finished in 3 msecs
 1655 14:44:39.216006  PCI: 00:1f.0 init
 1656 14:44:39.219105  IOAPIC: Initializing IOAPIC at 0xfec00000
 1657 14:44:39.225710  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1658 14:44:39.226151  IOAPIC: ID = 0x02
 1659 14:44:39.229299  IOAPIC: Dumping registers
 1660 14:44:39.233257    reg 0x0000: 0x02000000
 1661 14:44:39.236247    reg 0x0001: 0x00770020
 1662 14:44:39.236710    reg 0x0002: 0x00000000
 1663 14:44:39.242475  PCI: 00:1f.0 init finished in 21 msecs
 1664 14:44:39.243141  PCI: 00:1f.2 init
 1665 14:44:39.245555  Disabling ACPI via APMC.
 1666 14:44:39.249740  APMC done.
 1667 14:44:39.252727  PCI: 00:1f.2 init finished in 5 msecs
 1668 14:44:39.264637  PCI: 01:00.0 init
 1669 14:44:39.267623  PCI: 01:00.0 init finished in 0 msecs
 1670 14:44:39.270800  PNP: 0c09.0 init
 1671 14:44:39.274370  Google Chrome EC uptime: 8.269 seconds
 1672 14:44:39.280561  Google Chrome AP resets since EC boot: 1
 1673 14:44:39.283843  Google Chrome most recent AP reset causes:
 1674 14:44:39.287345  	0.483: 32775 shutdown: entering G3
 1675 14:44:39.294336  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1676 14:44:39.297180  PNP: 0c09.0 init finished in 22 msecs
 1677 14:44:39.303026  Devices initialized
 1678 14:44:39.306606  Show all devs... After init.
 1679 14:44:39.309446  Root Device: enabled 1
 1680 14:44:39.310026  DOMAIN: 0000: enabled 1
 1681 14:44:39.312755  CPU_CLUSTER: 0: enabled 1
 1682 14:44:39.316361  PCI: 00:00.0: enabled 1
 1683 14:44:39.319579  PCI: 00:02.0: enabled 1
 1684 14:44:39.320131  PCI: 00:04.0: enabled 1
 1685 14:44:39.322824  PCI: 00:05.0: enabled 1
 1686 14:44:39.326099  PCI: 00:06.0: enabled 0
 1687 14:44:39.329325  PCI: 00:07.0: enabled 0
 1688 14:44:39.329761  PCI: 00:07.1: enabled 0
 1689 14:44:39.332787  PCI: 00:07.2: enabled 0
 1690 14:44:39.335966  PCI: 00:07.3: enabled 0
 1691 14:44:39.339486  PCI: 00:08.0: enabled 1
 1692 14:44:39.339953  PCI: 00:09.0: enabled 0
 1693 14:44:39.342953  PCI: 00:0a.0: enabled 0
 1694 14:44:39.345707  PCI: 00:0d.0: enabled 1
 1695 14:44:39.349101  PCI: 00:0d.1: enabled 0
 1696 14:44:39.349541  PCI: 00:0d.2: enabled 0
 1697 14:44:39.353941  PCI: 00:0d.3: enabled 0
 1698 14:44:39.356083  PCI: 00:0e.0: enabled 0
 1699 14:44:39.356527  PCI: 00:10.2: enabled 1
 1700 14:44:39.359186  PCI: 00:10.6: enabled 0
 1701 14:44:39.362975  PCI: 00:10.7: enabled 0
 1702 14:44:39.366305  PCI: 00:12.0: enabled 0
 1703 14:44:39.366840  PCI: 00:12.6: enabled 0
 1704 14:44:39.369881  PCI: 00:13.0: enabled 0
 1705 14:44:39.372623  PCI: 00:14.0: enabled 1
 1706 14:44:39.375657  PCI: 00:14.1: enabled 0
 1707 14:44:39.376128  PCI: 00:14.2: enabled 1
 1708 14:44:39.379550  PCI: 00:14.3: enabled 1
 1709 14:44:39.382528  PCI: 00:15.0: enabled 1
 1710 14:44:39.385657  PCI: 00:15.1: enabled 1
 1711 14:44:39.386097  PCI: 00:15.2: enabled 1
 1712 14:44:39.388913  PCI: 00:15.3: enabled 1
 1713 14:44:39.393261  PCI: 00:16.0: enabled 1
 1714 14:44:39.393803  PCI: 00:16.1: enabled 0
 1715 14:44:39.395685  PCI: 00:16.2: enabled 0
 1716 14:44:39.399313  PCI: 00:16.3: enabled 0
 1717 14:44:39.402744  PCI: 00:16.4: enabled 0
 1718 14:44:39.403289  PCI: 00:16.5: enabled 0
 1719 14:44:39.406000  PCI: 00:17.0: enabled 0
 1720 14:44:39.409401  PCI: 00:19.0: enabled 0
 1721 14:44:39.412379  PCI: 00:19.1: enabled 1
 1722 14:44:39.412865  PCI: 00:19.2: enabled 0
 1723 14:44:39.415865  PCI: 00:1c.0: enabled 1
 1724 14:44:39.418864  PCI: 00:1c.1: enabled 0
 1725 14:44:39.422711  PCI: 00:1c.2: enabled 0
 1726 14:44:39.423293  PCI: 00:1c.3: enabled 0
 1727 14:44:39.425603  PCI: 00:1c.4: enabled 0
 1728 14:44:39.428959  PCI: 00:1c.5: enabled 0
 1729 14:44:39.432161  PCI: 00:1c.6: enabled 1
 1730 14:44:39.432744  PCI: 00:1c.7: enabled 0
 1731 14:44:39.435295  PCI: 00:1d.0: enabled 1
 1732 14:44:39.439167  PCI: 00:1d.1: enabled 0
 1733 14:44:39.441968  PCI: 00:1d.2: enabled 1
 1734 14:44:39.442452  PCI: 00:1d.3: enabled 0
 1735 14:44:39.445766  PCI: 00:1e.0: enabled 1
 1736 14:44:39.448689  PCI: 00:1e.1: enabled 0
 1737 14:44:39.449226  PCI: 00:1e.2: enabled 1
 1738 14:44:39.452329  PCI: 00:1e.3: enabled 1
 1739 14:44:39.455418  PCI: 00:1f.0: enabled 1
 1740 14:44:39.458878  PCI: 00:1f.1: enabled 0
 1741 14:44:39.459502  PCI: 00:1f.2: enabled 1
 1742 14:44:39.461902  PCI: 00:1f.3: enabled 1
 1743 14:44:39.465660  PCI: 00:1f.4: enabled 0
 1744 14:44:39.468973  PCI: 00:1f.5: enabled 1
 1745 14:44:39.469514  PCI: 00:1f.6: enabled 0
 1746 14:44:39.472383  PCI: 00:1f.7: enabled 0
 1747 14:44:39.475142  APIC: 00: enabled 1
 1748 14:44:39.475577  GENERIC: 0.0: enabled 1
 1749 14:44:39.479013  GENERIC: 0.0: enabled 1
 1750 14:44:39.481764  GENERIC: 1.0: enabled 1
 1751 14:44:39.484912  GENERIC: 0.0: enabled 1
 1752 14:44:39.485349  GENERIC: 1.0: enabled 1
 1753 14:44:39.488499  USB0 port 0: enabled 1
 1754 14:44:39.491819  GENERIC: 0.0: enabled 1
 1755 14:44:39.495296  USB0 port 0: enabled 1
 1756 14:44:39.495880  GENERIC: 0.0: enabled 1
 1757 14:44:39.498708  I2C: 00:1a: enabled 1
 1758 14:44:39.502040  I2C: 00:31: enabled 1
 1759 14:44:39.502577  I2C: 00:32: enabled 1
 1760 14:44:39.505061  I2C: 00:10: enabled 1
 1761 14:44:39.508283  I2C: 00:15: enabled 1
 1762 14:44:39.508722  GENERIC: 0.0: enabled 0
 1763 14:44:39.511950  GENERIC: 1.0: enabled 0
 1764 14:44:39.514731  GENERIC: 0.0: enabled 1
 1765 14:44:39.515166  SPI: 00: enabled 1
 1766 14:44:39.518467  SPI: 00: enabled 1
 1767 14:44:39.521401  PNP: 0c09.0: enabled 1
 1768 14:44:39.524981  GENERIC: 0.0: enabled 1
 1769 14:44:39.525590  USB3 port 0: enabled 1
 1770 14:44:39.528292  USB3 port 1: enabled 1
 1771 14:44:39.531686  USB3 port 2: enabled 0
 1772 14:44:39.532306  USB3 port 3: enabled 0
 1773 14:44:39.534770  USB2 port 0: enabled 0
 1774 14:44:39.538345  USB2 port 1: enabled 1
 1775 14:44:39.538930  USB2 port 2: enabled 1
 1776 14:44:39.541809  USB2 port 3: enabled 0
 1777 14:44:39.544571  USB2 port 4: enabled 1
 1778 14:44:39.548518  USB2 port 5: enabled 0
 1779 14:44:39.549062  USB2 port 6: enabled 0
 1780 14:44:39.551363  USB2 port 7: enabled 0
 1781 14:44:39.554775  USB2 port 8: enabled 0
 1782 14:44:39.555355  USB2 port 9: enabled 0
 1783 14:44:39.558154  USB3 port 0: enabled 0
 1784 14:44:39.561126  USB3 port 1: enabled 1
 1785 14:44:39.564744  USB3 port 2: enabled 0
 1786 14:44:39.565181  USB3 port 3: enabled 0
 1787 14:44:39.567856  GENERIC: 0.0: enabled 1
 1788 14:44:39.571324  GENERIC: 1.0: enabled 1
 1789 14:44:39.571892  APIC: 01: enabled 1
 1790 14:44:39.575598  APIC: 07: enabled 1
 1791 14:44:39.578015  APIC: 03: enabled 1
 1792 14:44:39.578558  APIC: 04: enabled 1
 1793 14:44:39.581608  APIC: 06: enabled 1
 1794 14:44:39.582069  APIC: 02: enabled 1
 1795 14:44:39.584542  APIC: 05: enabled 1
 1796 14:44:39.587993  PCI: 01:00.0: enabled 1
 1797 14:44:39.591316  BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
 1798 14:44:39.598112  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1799 14:44:39.600931  ELOG: NV offset 0xf30000 size 0x1000
 1800 14:44:39.608233  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1801 14:44:39.614450  ELOG: Event(17) added with size 13 at 2022-09-18 14:42:56 UTC
 1802 14:44:39.621533  ELOG: Event(92) added with size 9 at 2022-09-18 14:42:56 UTC
 1803 14:44:39.627860  ELOG: Event(93) added with size 9 at 2022-09-18 14:42:56 UTC
 1804 14:44:39.634347  ELOG: Event(9E) added with size 10 at 2022-09-18 14:42:56 UTC
 1805 14:44:39.641138  ELOG: Event(9F) added with size 14 at 2022-09-18 14:42:56 UTC
 1806 14:44:39.647783  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1807 14:44:39.654339  ELOG: Event(A1) added with size 10 at 2022-09-18 14:42:56 UTC
 1808 14:44:39.661210  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1809 14:44:39.667261  ELOG: Event(A0) added with size 9 at 2022-09-18 14:42:56 UTC
 1810 14:44:39.671047  elog_add_boot_reason: Logged dev mode boot
 1811 14:44:39.677577  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
 1812 14:44:39.680691  Finalize devices...
 1813 14:44:39.681273  Devices finalized
 1814 14:44:39.686587  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1815 14:44:39.690245  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1816 14:44:39.697071  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1817 14:44:39.704304  ME: HFSTS1                      : 0x80030055
 1818 14:44:39.707069  ME: HFSTS2                      : 0x30280116
 1819 14:44:39.710278  ME: HFSTS3                      : 0x00000050
 1820 14:44:39.716656  ME: HFSTS4                      : 0x00004000
 1821 14:44:39.719952  ME: HFSTS5                      : 0x00000000
 1822 14:44:39.723458  ME: HFSTS6                      : 0x40400006
 1823 14:44:39.726449  ME: Manufacturing Mode          : YES
 1824 14:44:39.733099  ME: SPI Protection Mode Enabled : NO
 1825 14:44:39.736935  ME: FW Partition Table          : OK
 1826 14:44:39.740232  ME: Bringup Loader Failure      : NO
 1827 14:44:39.743455  ME: Firmware Init Complete      : NO
 1828 14:44:39.746476  ME: Boot Options Present        : NO
 1829 14:44:39.750146  ME: Update In Progress          : NO
 1830 14:44:39.753005  ME: D0i3 Support                : YES
 1831 14:44:39.756528  ME: Low Power State Enabled     : NO
 1832 14:44:39.762984  ME: CPU Replaced                : YES
 1833 14:44:39.766671  ME: CPU Replacement Valid       : YES
 1834 14:44:39.770163  ME: Current Working State       : 5
 1835 14:44:39.773280  ME: Current Operation State     : 1
 1836 14:44:39.776585  ME: Current Operation Mode      : 3
 1837 14:44:39.779837  ME: Error Code                  : 0
 1838 14:44:39.782968  ME: Enhanced Debug Mode         : NO
 1839 14:44:39.786121  ME: CPU Debug Disabled          : YES
 1840 14:44:39.789600  ME: TXT Support                 : NO
 1841 14:44:39.796154  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1842 14:44:39.806291  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1843 14:44:39.809334  CBFS: 'fallback/slic' not found.
 1844 14:44:39.812537  ACPI: Writing ACPI tables at 76b01000.
 1845 14:44:39.812983  ACPI:    * FACS
 1846 14:44:39.816236  ACPI:    * DSDT
 1847 14:44:39.819498  Ramoops buffer: 0x100000@0x76a00000.
 1848 14:44:39.822287  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1849 14:44:39.828800  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1850 14:44:39.832552  Google Chrome EC: version:
 1851 14:44:39.835845  	ro: voema_v2.0.10114-a447f03e46
 1852 14:44:39.839555  	rw: voema_v2.0.10114-a447f03e46
 1853 14:44:39.840174    running image: 2
 1854 14:44:39.845783  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
 1855 14:44:39.851104  ACPI:    * FADT
 1856 14:44:39.851684  SCI is IRQ9
 1857 14:44:39.857736  ACPI: added table 1/32, length now 40
 1858 14:44:39.858336  ACPI:     * SSDT
 1859 14:44:39.860499  Found 1 CPU(s) with 8 core(s) each.
 1860 14:44:39.866971  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1861 14:44:39.870476  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1862 14:44:39.874352  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1863 14:44:39.877434  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1864 14:44:39.883758  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1865 14:44:39.890481  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1866 14:44:39.894115  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1867 14:44:39.900437  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1868 14:44:39.907264  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1869 14:44:39.910188  \_SB.PCI0.RP09: Added StorageD3Enable property
 1870 14:44:39.916672  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1871 14:44:39.920262  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1872 14:44:39.927888  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1873 14:44:39.930787  PS2K: Passing 80 keymaps to kernel
 1874 14:44:39.937415  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1875 14:44:39.944001  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1876 14:44:39.950257  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1877 14:44:39.957149  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1878 14:44:39.963784  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1879 14:44:39.970655  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1880 14:44:39.977200  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1881 14:44:39.983689  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1882 14:44:39.986889  ACPI: added table 2/32, length now 44
 1883 14:44:39.990585  ACPI:    * MCFG
 1884 14:44:39.993954  ACPI: added table 3/32, length now 48
 1885 14:44:39.994548  ACPI:    * TPM2
 1886 14:44:39.997000  TPM2 log created at 0x769f0000
 1887 14:44:40.000465  ACPI: added table 4/32, length now 52
 1888 14:44:40.003737  ACPI:    * MADT
 1889 14:44:40.004333  SCI is IRQ9
 1890 14:44:40.007184  ACPI: added table 5/32, length now 56
 1891 14:44:40.010708  current = 76b09850
 1892 14:44:40.011303  ACPI:    * DMAR
 1893 14:44:40.016640  ACPI: added table 6/32, length now 60
 1894 14:44:40.020138  ACPI: added table 7/32, length now 64
 1895 14:44:40.020630  ACPI:    * HPET
 1896 14:44:40.023451  ACPI: added table 8/32, length now 68
 1897 14:44:40.027015  ACPI: done.
 1898 14:44:40.030127  ACPI tables: 35216 bytes.
 1899 14:44:40.030718  smbios_write_tables: 769ef000
 1900 14:44:40.033619  EC returned error result code 3
 1901 14:44:40.036830  Couldn't obtain OEM name from CBI
 1902 14:44:40.041956  Create SMBIOS type 16
 1903 14:44:40.045227  Create SMBIOS type 17
 1904 14:44:40.048075  GENERIC: 0.0 (WIFI Device)
 1905 14:44:40.051644  SMBIOS tables: 1734 bytes.
 1906 14:44:40.055187  Writing table forward entry at 0x00000500
 1907 14:44:40.061808  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1908 14:44:40.064769  Writing coreboot table at 0x76b25000
 1909 14:44:40.071428   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1910 14:44:40.075009   1. 0000000000001000-000000000009ffff: RAM
 1911 14:44:40.078135   2. 00000000000a0000-00000000000fffff: RESERVED
 1912 14:44:40.084571   3. 0000000000100000-00000000769eefff: RAM
 1913 14:44:40.088081   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1914 14:44:40.095024   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1915 14:44:40.101356   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1916 14:44:40.104748   7. 0000000077000000-000000007fbfffff: RESERVED
 1917 14:44:40.111631   8. 00000000c0000000-00000000cfffffff: RESERVED
 1918 14:44:40.114425   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1919 14:44:40.117894  10. 00000000fb000000-00000000fb000fff: RESERVED
 1920 14:44:40.124584  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1921 14:44:40.127746  12. 00000000fed80000-00000000fed87fff: RESERVED
 1922 14:44:40.134551  13. 00000000fed90000-00000000fed92fff: RESERVED
 1923 14:44:40.138062  14. 00000000feda0000-00000000feda1fff: RESERVED
 1924 14:44:40.144710  15. 00000000fedc0000-00000000feddffff: RESERVED
 1925 14:44:40.148041  16. 0000000100000000-00000004803fffff: RAM
 1926 14:44:40.150921  Passing 4 GPIOs to payload:
 1927 14:44:40.154790              NAME |       PORT | POLARITY |     VALUE
 1928 14:44:40.161015               lid |  undefined |     high |      high
 1929 14:44:40.168094             power |  undefined |     high |       low
 1930 14:44:40.170802             oprom |  undefined |     high |       low
 1931 14:44:40.177823          EC in RW | 0x000000e5 |     high |      high
 1932 14:44:40.184195  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
 1933 14:44:40.187274  coreboot table: 1576 bytes.
 1934 14:44:40.191640  IMD ROOT    0. 0x76fff000 0x00001000
 1935 14:44:40.193767  IMD SMALL   1. 0x76ffe000 0x00001000
 1936 14:44:40.197330  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1937 14:44:40.200608  VPD         3. 0x76c4d000 0x00000367
 1938 14:44:40.203597  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1939 14:44:40.206843  CONSOLE     5. 0x76c2c000 0x00020000
 1940 14:44:40.210514  FMAP        6. 0x76c2b000 0x00000578
 1941 14:44:40.217132  TIME STAMP  7. 0x76c2a000 0x00000910
 1942 14:44:40.220552  VBOOT WORK  8. 0x76c16000 0x00014000
 1943 14:44:40.223962  ROMSTG STCK 9. 0x76c15000 0x00001000
 1944 14:44:40.227330  AFTER CAR  10. 0x76c0a000 0x0000b000
 1945 14:44:40.230450  RAMSTAGE   11. 0x76b97000 0x00073000
 1946 14:44:40.234148  REFCODE    12. 0x76b42000 0x00055000
 1947 14:44:40.236621  SMM BACKUP 13. 0x76b32000 0x00010000
 1948 14:44:40.239942  4f444749   14. 0x76b30000 0x00002000
 1949 14:44:40.243633  EXT VBT15. 0x76b2d000 0x0000219f
 1950 14:44:40.250226  COREBOOT   16. 0x76b25000 0x00008000
 1951 14:44:40.253747  ACPI       17. 0x76b01000 0x00024000
 1952 14:44:40.256992  ACPI GNVS  18. 0x76b00000 0x00001000
 1953 14:44:40.260808  RAMOOPS    19. 0x76a00000 0x00100000
 1954 14:44:40.263657  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1955 14:44:40.266917  SMBIOS     21. 0x769ef000 0x00000800
 1956 14:44:40.270308  IMD small region:
 1957 14:44:40.273748    IMD ROOT    0. 0x76ffec00 0x00000400
 1958 14:44:40.277241    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1959 14:44:40.280029    POWER STATE 2. 0x76ffeb80 0x00000044
 1960 14:44:40.286333    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1961 14:44:40.290313    MEM INFO    4. 0x76ffe980 0x000001e0
 1962 14:44:40.293046  BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
 1963 14:44:40.296385  MTRR: Physical address space:
 1964 14:44:40.303408  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1965 14:44:40.309898  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1966 14:44:40.317210  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1967 14:44:40.323080  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1968 14:44:40.329887  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1969 14:44:40.336312  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1970 14:44:40.343187  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
 1971 14:44:40.346908  MTRR: Fixed MSR 0x250 0x0606060606060606
 1972 14:44:40.350242  MTRR: Fixed MSR 0x258 0x0606060606060606
 1973 14:44:40.352749  MTRR: Fixed MSR 0x259 0x0000000000000000
 1974 14:44:40.359902  MTRR: Fixed MSR 0x268 0x0606060606060606
 1975 14:44:40.362895  MTRR: Fixed MSR 0x269 0x0606060606060606
 1976 14:44:40.366316  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1977 14:44:40.369796  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1978 14:44:40.373108  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1979 14:44:40.379287  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1980 14:44:40.383033  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1981 14:44:40.385874  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1982 14:44:40.390560  call enable_fixed_mtrr()
 1983 14:44:40.393812  CPU physical address size: 39 bits
 1984 14:44:40.400334  MTRR: default type WB/UC MTRR counts: 6/7.
 1985 14:44:40.403608  MTRR: WB selected as default type.
 1986 14:44:40.410329  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1987 14:44:40.413696  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1988 14:44:40.420640  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1989 14:44:40.427038  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
 1990 14:44:40.433870  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1991 14:44:40.439991  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
 1992 14:44:40.444194  
 1993 14:44:40.444773  MTRR check
 1994 14:44:40.446852  Fixed MTRRs   : Enabled
 1995 14:44:40.447333  Variable MTRRs: Enabled
 1996 14:44:40.447788  
 1997 14:44:40.453896  MTRR: Fixed MSR 0x250 0x0606060606060606
 1998 14:44:40.457068  MTRR: Fixed MSR 0x258 0x0606060606060606
 1999 14:44:40.460588  MTRR: Fixed MSR 0x259 0x0000000000000000
 2000 14:44:40.463753  MTRR: Fixed MSR 0x268 0x0606060606060606
 2001 14:44:40.470209  MTRR: Fixed MSR 0x269 0x0606060606060606
 2002 14:44:40.473649  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2003 14:44:40.476882  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2004 14:44:40.480256  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2005 14:44:40.486654  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2006 14:44:40.490607  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2007 14:44:40.493675  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2008 14:44:40.500772  BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
 2009 14:44:40.504069  call enable_fixed_mtrr()
 2010 14:44:40.507909  Checking cr50 for pending updates
 2011 14:44:40.512322  CPU physical address size: 39 bits
 2012 14:44:40.515976  MTRR: Fixed MSR 0x250 0x0606060606060606
 2013 14:44:40.518927  MTRR: Fixed MSR 0x250 0x0606060606060606
 2014 14:44:40.522099  MTRR: Fixed MSR 0x258 0x0606060606060606
 2015 14:44:40.528886  MTRR: Fixed MSR 0x259 0x0000000000000000
 2016 14:44:40.531861  MTRR: Fixed MSR 0x268 0x0606060606060606
 2017 14:44:40.535861  MTRR: Fixed MSR 0x269 0x0606060606060606
 2018 14:44:40.539019  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2019 14:44:40.541715  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2020 14:44:40.548660  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2021 14:44:40.551899  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2022 14:44:40.555755  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2023 14:44:40.558544  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2024 14:44:40.566937  MTRR: Fixed MSR 0x258 0x0606060606060606
 2025 14:44:40.567393  call enable_fixed_mtrr()
 2026 14:44:40.573797  MTRR: Fixed MSR 0x259 0x0000000000000000
 2027 14:44:40.576636  MTRR: Fixed MSR 0x268 0x0606060606060606
 2028 14:44:40.580498  MTRR: Fixed MSR 0x269 0x0606060606060606
 2029 14:44:40.584462  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2030 14:44:40.590052  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2031 14:44:40.593583  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2032 14:44:40.596442  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2033 14:44:40.600560  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2034 14:44:40.606591  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2035 14:44:40.610007  CPU physical address size: 39 bits
 2036 14:44:40.614667  call enable_fixed_mtrr()
 2037 14:44:40.617649  MTRR: Fixed MSR 0x250 0x0606060606060606
 2038 14:44:40.624518  MTRR: Fixed MSR 0x250 0x0606060606060606
 2039 14:44:40.627695  MTRR: Fixed MSR 0x258 0x0606060606060606
 2040 14:44:40.631117  MTRR: Fixed MSR 0x259 0x0000000000000000
 2041 14:44:40.634403  MTRR: Fixed MSR 0x268 0x0606060606060606
 2042 14:44:40.640806  MTRR: Fixed MSR 0x269 0x0606060606060606
 2043 14:44:40.644393  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2044 14:44:40.647837  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2045 14:44:40.650391  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2046 14:44:40.657922  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2047 14:44:40.660514  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2048 14:44:40.663801  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2049 14:44:40.671269  MTRR: Fixed MSR 0x258 0x0606060606060606
 2050 14:44:40.674390  MTRR: Fixed MSR 0x259 0x0000000000000000
 2051 14:44:40.677975  MTRR: Fixed MSR 0x268 0x0606060606060606
 2052 14:44:40.681681  MTRR: Fixed MSR 0x269 0x0606060606060606
 2053 14:44:40.687102  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2054 14:44:40.690771  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2055 14:44:40.694172  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2056 14:44:40.698056  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2057 14:44:40.704314  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2058 14:44:40.707389  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2059 14:44:40.711004  call enable_fixed_mtrr()
 2060 14:44:40.714107  call enable_fixed_mtrr()
 2061 14:44:40.717410  MTRR: Fixed MSR 0x250 0x0606060606060606
 2062 14:44:40.720300  MTRR: Fixed MSR 0x250 0x0606060606060606
 2063 14:44:40.727663  MTRR: Fixed MSR 0x258 0x0606060606060606
 2064 14:44:40.730397  MTRR: Fixed MSR 0x259 0x0000000000000000
 2065 14:44:40.733486  MTRR: Fixed MSR 0x268 0x0606060606060606
 2066 14:44:40.737524  MTRR: Fixed MSR 0x269 0x0606060606060606
 2067 14:44:40.740382  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2068 14:44:40.747263  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2069 14:44:40.750397  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2070 14:44:40.753724  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2071 14:44:40.757097  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2072 14:44:40.763799  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2073 14:44:40.766827  MTRR: Fixed MSR 0x258 0x0606060606060606
 2074 14:44:40.773978  MTRR: Fixed MSR 0x259 0x0000000000000000
 2075 14:44:40.777006  MTRR: Fixed MSR 0x268 0x0606060606060606
 2076 14:44:40.780590  MTRR: Fixed MSR 0x269 0x0606060606060606
 2077 14:44:40.783855  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2078 14:44:40.790631  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2079 14:44:40.793354  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2080 14:44:40.797162  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2081 14:44:40.800246  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2082 14:44:40.806760  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2083 14:44:40.810099  call enable_fixed_mtrr()
 2084 14:44:40.813449  call enable_fixed_mtrr()
 2085 14:44:40.816613  CPU physical address size: 39 bits
 2086 14:44:40.819824  CPU physical address size: 39 bits
 2087 14:44:40.823222  CPU physical address size: 39 bits
 2088 14:44:40.826228  CPU physical address size: 39 bits
 2089 14:44:40.831476  CPU physical address size: 39 bits
 2090 14:44:40.834631  Reading cr50 TPM mode
 2091 14:44:40.845613  BS: BS_PAYLOAD_LOAD entry times (exec / console): 332 / 6 ms
 2092 14:44:40.855373  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2093 14:44:40.858688  Checking segment from ROM address 0xffc02b38
 2094 14:44:40.861786  Checking segment from ROM address 0xffc02b54
 2095 14:44:40.868798  Loading segment from ROM address 0xffc02b38
 2096 14:44:40.869376    code (compression=0)
 2097 14:44:40.878835    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2098 14:44:40.887948  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2099 14:44:40.888552  it's not compressed!
 2100 14:44:41.029690  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2101 14:44:41.036061  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2102 14:44:41.042894  Loading segment from ROM address 0xffc02b54
 2103 14:44:41.045934    Entry Point 0x30000000
 2104 14:44:41.046642  Loaded segments
 2105 14:44:41.052244  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
 2106 14:44:41.097576  Finalizing chipset.
 2107 14:44:41.100905  Finalizing SMM.
 2108 14:44:41.101487  APMC done.
 2109 14:44:41.107663  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
 2110 14:44:41.110965  mp_park_aps done after 0 msecs.
 2111 14:44:41.114487  Jumping to boot code at 0x30000000(0x76b25000)
 2112 14:44:41.124440  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2113 14:44:41.125028  
 2114 14:44:41.127267  Starting depthcharge on Voema...
 2115 14:44:41.128756  end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
 2116 14:44:41.129334  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 2117 14:44:41.129800  Setting prompt string to ['volteer:']
 2118 14:44:41.130235  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
 2119 14:44:41.137196  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2120 14:44:41.143950  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2121 14:44:41.150775  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2122 14:44:41.153556  Failed to find eMMC card reader
 2123 14:44:41.154043  Wipe memory regions:
 2124 14:44:41.160552  	[0x00000000001000, 0x000000000a0000)
 2125 14:44:41.163511  	[0x00000000100000, 0x00000030000000)
 2126 14:44:41.200995  	[0x00000032662db0, 0x000000769ef000)
 2127 14:44:41.251781  	[0x00000100000000, 0x00000480400000)
 2128 14:44:41.867671  ec_init: CrosEC protocol v3 supported (256, 256)
 2129 14:44:42.300160  R8152: Initializing
 2130 14:44:42.303428  Version 6 (ocp_data = 5c30)
 2131 14:44:42.306965  R8152: Done initializing
 2132 14:44:42.310159  Adding net device
 2133 14:44:42.614854  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2134 14:44:42.615440  
 2135 14:44:42.618804  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2137 14:44:42.720910  volteer: tftpboot 192.168.201.1 7305246/tftp-deploy-r6pc8drf/kernel/bzImage 7305246/tftp-deploy-r6pc8drf/kernel/cmdline 7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
 2138 14:44:42.721625  Setting prompt string to 'Starting kernel'
 2139 14:44:42.722060  Setting prompt string to ['Starting kernel']
 2140 14:44:42.722441  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2141 14:44:42.722840  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:04:41)
 2142 14:44:42.726109  tftpboot 192.168.201.1 7305246/tftp-deploy-r6pc8drf/kernel/bzImoy-r6pc8drf/kernel/cmdline 7305246/tftp-deploy-r6pc8drf/ramdisk/ramdisk.cpio.gz
 2143 14:44:42.726192  Waiting for link
 2144 14:44:42.930601  done.
 2145 14:44:42.931186  MAC: 00:24:32:30:78:e4
 2146 14:44:42.933648  Sending DHCP discover... done.
 2147 14:44:42.936790  Waiting for reply... done.
 2148 14:44:42.940094  Sending DHCP request... done.
 2149 14:44:42.947136  Waiting for reply... done.
 2150 14:44:42.947749  My ip is 192.168.201.15
 2151 14:44:42.953860  The DHCP server ip is 192.168.201.1
 2152 14:44:42.957358  TFTP server IP predefined by user: 192.168.201.1
 2153 14:44:42.964002  Bootfile predefined by user: 7305246/tftp-deploy-r6pc8drf/kernel/bzImage
 2154 14:44:42.966925  Sending tftp read request... done.
 2155 14:44:42.974445  Waiting for the transfer... 
 2156 14:44:43.694941  00000000 ################################################################
 2157 14:44:44.436747  00080000 ################################################################
 2158 14:44:45.154001  00100000 ################################################################
 2159 14:44:45.888715  00180000 ################################################################
 2160 14:44:46.640472  00200000 ################################################################
 2161 14:44:47.351399  00280000 ################################################################
 2162 14:44:48.076966  00300000 ################################################################
 2163 14:44:48.802704  00380000 ################################################################
 2164 14:44:49.551838  00400000 ################################################################
 2165 14:44:50.225328  00480000 ################################################################
 2166 14:44:50.940962  00500000 ################################################################
 2167 14:44:51.622263  00580000 ################################################################
 2168 14:44:52.363633  00600000 ################################################################ done.
 2169 14:44:52.366644  The bootfile was 6815632 bytes long.
 2170 14:44:52.370218  Sending tftp read request... done.
 2171 14:44:52.373355  Waiting for the transfer... 
 2172 14:44:53.054797  00000000 ################################################################
 2173 14:44:53.753492  00080000 ################################################################
 2174 14:44:54.456223  00100000 ################################################################
 2175 14:44:55.112316  00180000 ################################################################
 2176 14:44:55.809014  00200000 ################################################################
 2177 14:44:56.490451  00280000 ################################################################
 2178 14:44:57.192156  00300000 ################################################################
 2179 14:44:57.894113  00380000 ################################################################
 2180 14:44:58.589986  00400000 ################################################################
 2181 14:44:59.281464  00480000 ################################################################
 2182 14:44:59.598401  00500000 ############################# done.
 2183 14:44:59.601664  Sending tftp read request... done.
 2184 14:44:59.604960  Waiting for the transfer... 
 2185 14:44:59.605431  00000000 # done.
 2186 14:44:59.615101  Command line loaded dynamically from TFTP file: 7305246/tftp-deploy-r6pc8drf/kernel/cmdline
 2187 14:44:59.637869  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7305246/extract-nfsrootfs-7iaaok3y,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2188 14:44:59.646119  Shutting down all USB controllers.
 2189 14:44:59.646720  Removing current net device
 2190 14:44:59.649170  Finalizing coreboot
 2191 14:44:59.655491  Exiting depthcharge with code 4 at timestamp: 27102963
 2192 14:44:59.656143  
 2193 14:44:59.656655  Starting kernel ...
 2194 14:44:59.657125  
 2195 14:44:59.657596  
 2196 14:44:59.658608  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2197 14:44:59.659215  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2198 14:44:59.659682  Setting prompt string to ['Linux version [0-9]']
 2199 14:44:59.660207  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n']
 2200 14:44:59.660691  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n'] (timeout 00:05:00)
 2202 14:49:24.660358  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2204 14:49:24.662243  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2206 14:49:24.663671  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2209 14:49:24.664710  end: 2 depthcharge-action (duration 00:05:00) [common]
 2211 14:49:24.664946  Cleaning after the job
 2212 14:49:24.665032  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/ramdisk
 2213 14:49:24.665484  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/kernel
 2214 14:49:24.665978  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/nfsrootfs
 2215 14:49:24.697750  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7305246/tftp-deploy-r6pc8drf/modules
 2216 14:49:24.698059  start: 5.1 power-off (timeout 00:00:30) [common]
 2217 14:49:24.698218  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
 2218 14:49:24.716961  >> Command sent successfully.

 2219 14:49:24.718734  Returned 0 in 0 seconds
 2220 14:49:24.819971  end: 5.1 power-off (duration 00:00:00) [common]
 2222 14:49:24.821547  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2223 14:49:24.822730  Listened to connection for namespace 'common' for up to 1s
 2224 14:49:25.827456  Finalising connection for namespace 'common'
 2225 14:49:25.828206  Disconnecting from shell: Finalise
 2226 14:49:25.929846  end: 5.2 read-feedback (duration 00:00:01) [common]
 2227 14:49:25.930522  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7305246
 2228 14:49:26.026580  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7305246
 2229 14:49:26.026775  JobError: Your job cannot terminate cleanly.