Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 16:24:30.026730 lava-dispatcher, installed at version: 2022.06
2 16:24:30.026936 start: 0 validate
3 16:24:30.027070 Start time: 2022-08-03 16:24:30.027063+00:00 (UTC)
4 16:24:30.027209 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:24:30.027345 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
6 16:24:30.320201 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:24:30.320975 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 16:24:30.617310 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:24:30.618020 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 16:24:30.915254 validate duration: 0.89
12 16:24:30.916725 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 16:24:30.917426 start: 1.1 download-retry (timeout 00:10:00) [common]
14 16:24:30.918065 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 16:24:30.918669 Not decompressing ramdisk as can be used compressed.
16 16:24:30.919195 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
17 16:24:30.919582 saving as /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/ramdisk/rootfs.cpio.gz
18 16:24:30.920005 total size: 8416091 (8MB)
19 16:24:30.925901 progress 0% (0MB)
20 16:24:30.938047 progress 5% (0MB)
21 16:24:30.945414 progress 10% (0MB)
22 16:24:30.950917 progress 15% (1MB)
23 16:24:30.955267 progress 20% (1MB)
24 16:24:30.959034 progress 25% (2MB)
25 16:24:30.962486 progress 30% (2MB)
26 16:24:30.965333 progress 35% (2MB)
27 16:24:30.968238 progress 40% (3MB)
28 16:24:30.970975 progress 45% (3MB)
29 16:24:30.973488 progress 50% (4MB)
30 16:24:30.975891 progress 55% (4MB)
31 16:24:30.978172 progress 60% (4MB)
32 16:24:30.980200 progress 65% (5MB)
33 16:24:30.982361 progress 70% (5MB)
34 16:24:30.984410 progress 75% (6MB)
35 16:24:30.986523 progress 80% (6MB)
36 16:24:30.988597 progress 85% (6MB)
37 16:24:30.990681 progress 90% (7MB)
38 16:24:30.992570 progress 95% (7MB)
39 16:24:30.994724 progress 100% (8MB)
40 16:24:30.994995 8MB downloaded in 0.07s (107.02MB/s)
41 16:24:30.995151 end: 1.1.1 http-download (duration 00:00:00) [common]
43 16:24:30.995397 end: 1.1 download-retry (duration 00:00:00) [common]
44 16:24:30.995486 start: 1.2 download-retry (timeout 00:10:00) [common]
45 16:24:30.995573 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 16:24:30.995681 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 16:24:30.995753 saving as /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/kernel/bzImage
48 16:24:30.995814 total size: 6815632 (6MB)
49 16:24:30.995874 No compression specified
50 16:24:32.997860 progress 0% (0MB)
51 16:24:33.001254 progress 5% (0MB)
52 16:24:33.004651 progress 10% (0MB)
53 16:24:33.008401 progress 15% (1MB)
54 16:24:33.011780 progress 20% (1MB)
55 16:24:33.015053 progress 25% (1MB)
56 16:24:33.018661 progress 30% (1MB)
57 16:24:33.021958 progress 35% (2MB)
58 16:24:33.025489 progress 40% (2MB)
59 16:24:33.028415 progress 45% (2MB)
60 16:24:33.031186 progress 50% (3MB)
61 16:24:33.033887 progress 55% (3MB)
62 16:24:33.036302 progress 60% (3MB)
63 16:24:33.038668 progress 65% (4MB)
64 16:24:33.040829 progress 70% (4MB)
65 16:24:33.042826 progress 75% (4MB)
66 16:24:33.044880 progress 80% (5MB)
67 16:24:33.046781 progress 85% (5MB)
68 16:24:33.048648 progress 90% (5MB)
69 16:24:33.050387 progress 95% (6MB)
70 16:24:33.052104 progress 100% (6MB)
71 16:24:33.052393 6MB downloaded in 2.06s (3.16MB/s)
72 16:24:33.052541 end: 1.2.1 http-download (duration 00:00:02) [common]
74 16:24:33.052778 end: 1.2 download-retry (duration 00:00:02) [common]
75 16:24:33.052868 start: 1.3 download-retry (timeout 00:09:58) [common]
76 16:24:33.052958 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 16:24:33.053062 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 16:24:33.053130 saving as /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/modules/modules.tar
79 16:24:33.053192 total size: 51872 (0MB)
80 16:24:33.053252 Using unxz to decompress xz
81 16:24:33.056633 progress 63% (0MB)
82 16:24:33.056990 progress 100% (0MB)
83 16:24:33.060256 0MB downloaded in 0.01s (7.01MB/s)
84 16:24:33.060470 end: 1.3.1 http-download (duration 00:00:00) [common]
86 16:24:33.060723 end: 1.3 download-retry (duration 00:00:00) [common]
87 16:24:33.060820 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 16:24:33.060916 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 16:24:33.061006 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 16:24:33.061094 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 16:24:33.061250 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw
92 16:24:33.061358 makedir: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin
93 16:24:33.061442 makedir: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/tests
94 16:24:33.061527 makedir: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/results
95 16:24:33.061692 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-add-keys
96 16:24:33.061822 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-add-sources
97 16:24:33.061939 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-background-process-start
98 16:24:33.062050 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-background-process-stop
99 16:24:33.062163 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-common-functions
100 16:24:33.062274 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-echo-ipv4
101 16:24:33.062385 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-install-packages
102 16:24:33.062494 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-installed-packages
103 16:24:33.062600 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-os-build
104 16:24:33.062710 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-probe-channel
105 16:24:33.062820 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-probe-ip
106 16:24:33.062927 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-target-ip
107 16:24:33.063034 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-target-mac
108 16:24:33.063141 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-target-storage
109 16:24:33.063255 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-case
110 16:24:33.063365 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-event
111 16:24:33.063474 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-feedback
112 16:24:33.063582 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-raise
113 16:24:33.063693 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-reference
114 16:24:33.063804 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-runner
115 16:24:33.063911 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-set
116 16:24:33.064018 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-test-shell
117 16:24:33.064128 Updating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-install-packages (oe)
118 16:24:33.064240 Updating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/bin/lava-installed-packages (oe)
119 16:24:33.064342 Creating /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/environment
120 16:24:33.064432 LAVA metadata
121 16:24:33.064502 - LAVA_JOB_ID=6962877
122 16:24:33.064568 - LAVA_DISPATCHER_IP=192.168.201.1
123 16:24:33.064673 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 16:24:33.064738 skipped lava-vland-overlay
125 16:24:33.064814 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 16:24:33.064904 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 16:24:33.064967 skipped lava-multinode-overlay
128 16:24:33.065040 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 16:24:33.065124 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 16:24:33.065198 Loading test definitions
131 16:24:33.065297 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 16:24:33.065403 Using /lava-6962877 at stage 0
133 16:24:33.065709 uuid=6962877_1.4.2.3.1 testdef=None
134 16:24:33.065800 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 16:24:33.065890 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 16:24:33.066376 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 16:24:33.066611 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 16:24:33.067183 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 16:24:33.067424 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 16:24:33.067977 runner path: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/0/tests/0_dmesg test_uuid 6962877_1.4.2.3.1
143 16:24:33.068167 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 16:24:33.068435 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 16:24:33.068510 Using /lava-6962877 at stage 1
147 16:24:33.068749 uuid=6962877_1.4.2.3.5 testdef=None
148 16:24:33.068842 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 16:24:33.068931 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 16:24:33.069374 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 16:24:33.069649 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 16:24:33.070243 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 16:24:33.070487 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 16:24:33.071036 runner path: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/1/tests/1_bootrr test_uuid 6962877_1.4.2.3.5
157 16:24:33.071180 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 16:24:33.071391 Creating lava-test-runner.conf files
160 16:24:33.071455 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/0 for stage 0
161 16:24:33.071540 - 0_dmesg
162 16:24:33.071634 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6962877/lava-overlay-norw3vrw/lava-6962877/1 for stage 1
163 16:24:33.071746 - 1_bootrr
164 16:24:33.071850 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 16:24:33.071936 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 16:24:33.078075 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 16:24:33.078182 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 16:24:33.078276 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 16:24:33.078364 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 16:24:33.078453 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 16:24:33.260900 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 16:24:33.261232 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 16:24:33.261351 extracting modules file /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962877/extract-overlay-ramdisk-9ey02k6d/ramdisk
174 16:24:33.265519 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 16:24:33.265679 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 16:24:33.265773 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6962877/compress-overlay-k08lb8fa/overlay-1.4.2.4.tar.gz to ramdisk
177 16:24:33.265849 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6962877/compress-overlay-k08lb8fa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6962877/extract-overlay-ramdisk-9ey02k6d/ramdisk
178 16:24:33.269700 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 16:24:33.269812 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 16:24:33.269909 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 16:24:33.270001 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 16:24:33.270082 Building ramdisk /var/lib/lava/dispatcher/tmp/6962877/extract-overlay-ramdisk-9ey02k6d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6962877/extract-overlay-ramdisk-9ey02k6d/ramdisk
183 16:24:33.333878 >> 48006 blocks
184 16:24:34.082540 rename /var/lib/lava/dispatcher/tmp/6962877/extract-overlay-ramdisk-9ey02k6d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
185 16:24:34.082955 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 16:24:34.083084 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 16:24:34.083192 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 16:24:34.083289 No mkimage arch provided, not using FIT.
189 16:24:34.083382 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 16:24:34.083470 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 16:24:34.083572 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 16:24:34.083669 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 16:24:34.083748 No LXC device requested
194 16:24:34.083831 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 16:24:34.083927 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 16:24:34.084011 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 16:24:34.084086 Checking files for TFTP limit of 4294967296 bytes.
198 16:24:34.084472 end: 1 tftp-deploy (duration 00:00:03) [common]
199 16:24:34.084582 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 16:24:34.084684 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 16:24:34.084807 substitutions:
202 16:24:34.084875 - {DTB}: None
203 16:24:34.084943 - {INITRD}: 6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
204 16:24:34.085007 - {KERNEL}: 6962877/tftp-deploy-ne4askvk/kernel/bzImage
205 16:24:34.085068 - {LAVA_MAC}: None
206 16:24:34.085127 - {PRESEED_CONFIG}: None
207 16:24:34.085185 - {PRESEED_LOCAL}: None
208 16:24:34.085242 - {RAMDISK}: 6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
209 16:24:34.085300 - {ROOT_PART}: None
210 16:24:34.085356 - {ROOT}: None
211 16:24:34.085413 - {SERVER_IP}: 192.168.201.1
212 16:24:34.085469 - {TEE}: None
213 16:24:34.085525 Parsed boot commands:
214 16:24:34.085622 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 16:24:34.085774 Parsed boot commands: tftpboot 192.168.201.1 6962877/tftp-deploy-ne4askvk/kernel/bzImage 6962877/tftp-deploy-ne4askvk/kernel/cmdline 6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
216 16:24:34.085868 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 16:24:34.085963 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 16:24:34.086062 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 16:24:34.086156 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 16:24:34.086230 Not connected, no need to disconnect.
221 16:24:34.086308 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 16:24:34.086393 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 16:24:34.086462 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
224 16:24:34.089169 Setting prompt string to ['lava-test: # ']
225 16:24:34.089450 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 16:24:34.089555 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 16:24:34.089696 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 16:24:34.089793 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 16:24:34.089977 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
230 16:24:34.109389 >> Command sent successfully.
231 16:24:34.111466 Returned 0 in 0 seconds
232 16:24:34.212247 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 16:24:34.212822 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 16:24:34.212926 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 16:24:34.213015 Setting prompt string to 'Starting depthcharge on Voema...'
237 16:24:34.213085 Changing prompt to 'Starting depthcharge on Voema...'
238 16:24:34.213165 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 16:24:34.213438 [Enter `^Ec?' for help]
240 16:24:42.631300
241 16:24:42.631488
242 16:24:42.641392 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 16:24:42.644619 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 16:24:42.650890 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 16:24:42.654789 CPU: AES supported, TXT NOT supported, VT supported
246 16:24:42.661019 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 16:24:42.667780 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 16:24:42.671207 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 16:24:42.674346 VBOOT: Loading verstage.
250 16:24:42.677524 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 16:24:42.684309 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 16:24:42.687565 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 16:24:42.698456 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 16:24:42.705145 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 16:24:42.705315
256 16:24:42.705396
257 16:24:42.718101 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 16:24:42.732076 Probing TPM: . done!
259 16:24:42.735454 TPM ready after 0 ms
260 16:24:42.738551 Connected to device vid:did:rid of 1ae0:0028:00
261 16:24:42.750019 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 16:24:42.757038 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 16:24:42.759923 Initialized TPM device CR50 revision 0
264 16:24:42.809893 tlcl_send_startup: Startup return code is 0
265 16:24:42.810042 TPM: setup succeeded
266 16:24:42.825599 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 16:24:42.839944 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 16:24:42.852844 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 16:24:42.862757 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 16:24:42.866397 Chrome EC: UHEPI supported
271 16:24:42.869898 Phase 1
272 16:24:42.873732 FMAP: area GBB found @ 1805000 (458752 bytes)
273 16:24:42.880193 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 16:24:42.889707 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 16:24:42.896606 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 16:24:42.903629 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 16:24:42.906369 Recovery requested (1009000e)
278 16:24:42.910152 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 16:24:42.921246 tlcl_extend: response is 0
280 16:24:42.927870 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 16:24:42.937942 tlcl_extend: response is 0
282 16:24:42.944518 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 16:24:42.951302 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 16:24:42.957481 BS: verstage times (exec / console): total (unknown) / 142 ms
285 16:24:42.958059
286 16:24:42.958414
287 16:24:42.971263 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 16:24:42.978081 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 16:24:42.981143 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 16:24:42.984328 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 16:24:42.990774 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 16:24:42.994143 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 16:24:42.997632 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 16:24:43.000726 TCO_STS: 0000 0000
295 16:24:43.004036 GEN_PMCON: d0015038 00002200
296 16:24:43.007431 GBLRST_CAUSE: 00000000 00000000
297 16:24:43.007889 HPR_CAUSE0: 00000000
298 16:24:43.010258 prev_sleep_state 5
299 16:24:43.013765 Boot Count incremented to 10558
300 16:24:43.020752 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 16:24:43.026985 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 16:24:43.034120 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 16:24:43.040534 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 16:24:43.044960 Chrome EC: UHEPI supported
305 16:24:43.051645 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 16:24:43.064704 Probing TPM: done!
307 16:24:43.072547 Connected to device vid:did:rid of 1ae0:0028:00
308 16:24:43.079426 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 16:24:43.089229 Initialized TPM device CR50 revision 0
310 16:24:43.098991 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 16:24:43.105649 MRC: Hash idx 0x100b comparison successful.
312 16:24:43.108981 MRC cache found, size faa8
313 16:24:43.109100 bootmode is set to: 2
314 16:24:43.112253 SPD index = 0
315 16:24:43.119101 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 16:24:43.122159 SPD: module type is LPDDR4X
317 16:24:43.126040 SPD: module part number is MT53E512M64D4NW-046
318 16:24:43.132191 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 16:24:43.135560 SPD: device width 16 bits, bus width 16 bits
320 16:24:43.142117 SPD: module size is 1024 MB (per channel)
321 16:24:43.575198 CBMEM:
322 16:24:43.577867 IMD: root @ 0x76fff000 254 entries.
323 16:24:43.581480 IMD: root @ 0x76ffec00 62 entries.
324 16:24:43.584912 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 16:24:43.591433 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 16:24:43.594660 External stage cache:
327 16:24:43.598093 IMD: root @ 0x7b3ff000 254 entries.
328 16:24:43.601433 IMD: root @ 0x7b3fec00 62 entries.
329 16:24:43.616369 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 16:24:43.622984 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 16:24:43.629773 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 16:24:43.643506 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 16:24:43.647675 cse_lite: Skip switching to RW in the recovery path
334 16:24:43.651114 8 DIMMs found
335 16:24:43.651267 SMM Memory Map
336 16:24:43.654935 SMRAM : 0x7b000000 0x800000
337 16:24:43.658074 Subregion 0: 0x7b000000 0x200000
338 16:24:43.661418 Subregion 1: 0x7b200000 0x200000
339 16:24:43.664589 Subregion 2: 0x7b400000 0x400000
340 16:24:43.667772 top_of_ram = 0x77000000
341 16:24:43.675228 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 16:24:43.677955 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 16:24:43.684549 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 16:24:43.688240 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 16:24:43.697655 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 16:24:43.704913 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 16:24:43.714682 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 16:24:43.717642 Processing 211 relocs. Offset value of 0x74c0b000
349 16:24:43.726455 BS: romstage times (exec / console): total (unknown) / 277 ms
350 16:24:43.732888
351 16:24:43.732988
352 16:24:43.742502 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 16:24:43.745739 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 16:24:43.755930 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 16:24:43.762110 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 16:24:43.769076 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 16:24:43.775382 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 16:24:43.822586 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 16:24:43.829245 Processing 5008 relocs. Offset value of 0x75d98000
360 16:24:43.832438 BS: postcar times (exec / console): total (unknown) / 59 ms
361 16:24:43.832534
362 16:24:43.835784
363 16:24:43.846331 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 16:24:43.846429 Normal boot
365 16:24:43.849816 FW_CONFIG value is 0x804c02
366 16:24:43.852830 PCI: 00:07.0 disabled by fw_config
367 16:24:43.856346 PCI: 00:07.1 disabled by fw_config
368 16:24:43.859560 PCI: 00:0d.2 disabled by fw_config
369 16:24:43.862750 PCI: 00:1c.7 disabled by fw_config
370 16:24:43.869751 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 16:24:43.876032 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 16:24:43.879649 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 16:24:43.882951 GENERIC: 0.0 disabled by fw_config
374 16:24:43.886743 GENERIC: 1.0 disabled by fw_config
375 16:24:43.893072 fw_config match found: DB_USB=USB3_ACTIVE
376 16:24:43.896540 fw_config match found: DB_USB=USB3_ACTIVE
377 16:24:43.899598 fw_config match found: DB_USB=USB3_ACTIVE
378 16:24:43.902829 fw_config match found: DB_USB=USB3_ACTIVE
379 16:24:43.909242 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 16:24:43.915996 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 16:24:43.922558 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 16:24:43.932555 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 16:24:43.935663 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 16:24:43.942479 microcode: Update skipped, already up-to-date
385 16:24:43.949189 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 16:24:43.976010 Detected 4 core, 8 thread CPU.
387 16:24:43.979660 Setting up SMI for CPU
388 16:24:43.982996 IED base = 0x7b400000
389 16:24:43.983137 IED size = 0x00400000
390 16:24:43.986257 Will perform SMM setup.
391 16:24:43.993135 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 16:24:43.999703 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 16:24:44.006489 Processing 16 relocs. Offset value of 0x00030000
394 16:24:44.009436 Attempting to start 7 APs
395 16:24:44.012595 Waiting for 10ms after sending INIT.
396 16:24:44.028304 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 16:24:44.031536 AP: slot 3 apic_id 5.
398 16:24:44.034881 AP: slot 6 apic_id 4.
399 16:24:44.034966 done.
400 16:24:44.035033 AP: slot 2 apic_id 3.
401 16:24:44.041732 Waiting for 2nd SIPI to complete...done.
402 16:24:44.041818 AP: slot 7 apic_id 7.
403 16:24:44.044877 AP: slot 4 apic_id 6.
404 16:24:44.048634 AP: slot 5 apic_id 2.
405 16:24:44.054873 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 16:24:44.061519 Processing 13 relocs. Offset value of 0x00038000
407 16:24:44.061690 Unable to locate Global NVS
408 16:24:44.071556 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 16:24:44.074992 Installing permanent SMM handler to 0x7b000000
410 16:24:44.085491 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 16:24:44.088328 Processing 794 relocs. Offset value of 0x7b010000
412 16:24:44.098042 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 16:24:44.101517 Processing 13 relocs. Offset value of 0x7b008000
414 16:24:44.108521 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 16:24:44.114908 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 16:24:44.118191 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 16:24:44.125238 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 16:24:44.131621 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 16:24:44.138385 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 16:24:44.144623 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 16:24:44.145089 Unable to locate Global NVS
422 16:24:44.154874 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 16:24:44.158228 Clearing SMI status registers
424 16:24:44.158660 SMI_STS: PM1
425 16:24:44.161226 PM1_STS: PWRBTN
426 16:24:44.167869 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 16:24:44.171787 In relocation handler: CPU 0
428 16:24:44.174769 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 16:24:44.181315 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 16:24:44.181553 Relocation complete.
431 16:24:44.191083 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 16:24:44.191243 In relocation handler: CPU 1
433 16:24:44.197596 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 16:24:44.197733 Relocation complete.
435 16:24:44.207339 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
436 16:24:44.207445 In relocation handler: CPU 5
437 16:24:44.213821 New SMBASE=0x7affec00 IEDBASE=0x7b400000
438 16:24:44.217401 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 16:24:44.220957 Relocation complete.
440 16:24:44.227115 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
441 16:24:44.231260 In relocation handler: CPU 2
442 16:24:44.234429 New SMBASE=0x7afff800 IEDBASE=0x7b400000
443 16:24:44.237213 Relocation complete.
444 16:24:44.243934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
445 16:24:44.248012 In relocation handler: CPU 4
446 16:24:44.251134 New SMBASE=0x7afff000 IEDBASE=0x7b400000
447 16:24:44.257135 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 16:24:44.257237 Relocation complete.
449 16:24:44.264016 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 16:24:44.267412 In relocation handler: CPU 7
451 16:24:44.270623 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 16:24:44.274222 Relocation complete.
453 16:24:44.280577 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 16:24:44.283723 In relocation handler: CPU 3
455 16:24:44.287381 New SMBASE=0x7afff400 IEDBASE=0x7b400000
456 16:24:44.290760 Relocation complete.
457 16:24:44.297328 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
458 16:24:44.300589 In relocation handler: CPU 6
459 16:24:44.304205 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 16:24:44.310622 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 16:24:44.314932 Relocation complete.
462 16:24:44.315081 Initializing CPU #0
463 16:24:44.318294 CPU: vendor Intel device 806c1
464 16:24:44.321759 CPU: family 06, model 8c, stepping 01
465 16:24:44.325145 Clearing out pending MCEs
466 16:24:44.325229 Setting up local APIC...
467 16:24:44.328568 apic_id: 0x00 done.
468 16:24:44.332018 Turbo is available but hidden
469 16:24:44.335118 Turbo is available and visible
470 16:24:44.338591 microcode: Update skipped, already up-to-date
471 16:24:44.341621 CPU #0 initialized
472 16:24:44.345041 Initializing CPU #7
473 16:24:44.345219 Initializing CPU #4
474 16:24:44.348438 CPU: vendor Intel device 806c1
475 16:24:44.351641 CPU: family 06, model 8c, stepping 01
476 16:24:44.355107 CPU: vendor Intel device 806c1
477 16:24:44.358363 CPU: family 06, model 8c, stepping 01
478 16:24:44.362067 Clearing out pending MCEs
479 16:24:44.365333 Clearing out pending MCEs
480 16:24:44.368749 Setting up local APIC...
481 16:24:44.368845 Initializing CPU #6
482 16:24:44.371648 Initializing CPU #3
483 16:24:44.375284 CPU: vendor Intel device 806c1
484 16:24:44.378527 CPU: family 06, model 8c, stepping 01
485 16:24:44.381496 CPU: vendor Intel device 806c1
486 16:24:44.384858 CPU: family 06, model 8c, stepping 01
487 16:24:44.388106 Clearing out pending MCEs
488 16:24:44.391472 Clearing out pending MCEs
489 16:24:44.394794 Setting up local APIC...
490 16:24:44.394938 Initializing CPU #2
491 16:24:44.398239 Initializing CPU #5
492 16:24:44.401485 CPU: vendor Intel device 806c1
493 16:24:44.404917 CPU: family 06, model 8c, stepping 01
494 16:24:44.408079 Setting up local APIC...
495 16:24:44.408166 Setting up local APIC...
496 16:24:44.411312 apic_id: 0x07 done.
497 16:24:44.414635 apic_id: 0x06 done.
498 16:24:44.418200 microcode: Update skipped, already up-to-date
499 16:24:44.424858 microcode: Update skipped, already up-to-date
500 16:24:44.424944 CPU #7 initialized
501 16:24:44.428302 CPU #4 initialized
502 16:24:44.428387 Clearing out pending MCEs
503 16:24:44.431396 CPU: vendor Intel device 806c1
504 16:24:44.438106 CPU: family 06, model 8c, stepping 01
505 16:24:44.438192 Setting up local APIC...
506 16:24:44.441506 apic_id: 0x04 done.
507 16:24:44.444551 apic_id: 0x05 done.
508 16:24:44.447947 microcode: Update skipped, already up-to-date
509 16:24:44.450960 microcode: Update skipped, already up-to-date
510 16:24:44.454561 Initializing CPU #1
511 16:24:44.457868 CPU #6 initialized
512 16:24:44.457956 CPU #3 initialized
513 16:24:44.460934 apic_id: 0x03 done.
514 16:24:44.465013 Clearing out pending MCEs
515 16:24:44.467945 microcode: Update skipped, already up-to-date
516 16:24:44.471548 Setting up local APIC...
517 16:24:44.474412 CPU: vendor Intel device 806c1
518 16:24:44.477504 CPU: family 06, model 8c, stepping 01
519 16:24:44.481011 Clearing out pending MCEs
520 16:24:44.481100 apic_id: 0x02 done.
521 16:24:44.484131 CPU #2 initialized
522 16:24:44.487547 microcode: Update skipped, already up-to-date
523 16:24:44.491354 Setting up local APIC...
524 16:24:44.494227 CPU #5 initialized
525 16:24:44.494312 apic_id: 0x01 done.
526 16:24:44.501235 microcode: Update skipped, already up-to-date
527 16:24:44.501395 CPU #1 initialized
528 16:24:44.507847 bsp_do_flight_plan done after 461 msecs.
529 16:24:44.511056 CPU: frequency set to 4000 MHz
530 16:24:44.511220 Enabling SMIs.
531 16:24:44.517653 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 16:24:44.533176 SATAXPCIE1 indicates PCIe NVMe is present
533 16:24:44.536460 Probing TPM: done!
534 16:24:44.540755 Connected to device vid:did:rid of 1ae0:0028:00
535 16:24:44.550487 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 16:24:44.554262 Initialized TPM device CR50 revision 0
537 16:24:44.557192 Enabling S0i3.4
538 16:24:44.563856 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 16:24:44.567493 Found a VBT of 8704 bytes after decompression
540 16:24:44.573636 cse_lite: CSE RO boot. HybridStorageMode disabled
541 16:24:44.580419 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 16:24:44.656094 FSPS returned 0
543 16:24:44.659600 Executing Phase 1 of FspMultiPhaseSiInit
544 16:24:44.669658 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 16:24:44.672543 port C0 DISC req: usage 1 usb3 1 usb2 5
546 16:24:44.676239 Raw Buffer output 0 00000511
547 16:24:44.679517 Raw Buffer output 1 00000000
548 16:24:44.682947 pmc_send_ipc_cmd succeeded
549 16:24:44.689541 port C1 DISC req: usage 1 usb3 2 usb2 3
550 16:24:44.689667 Raw Buffer output 0 00000321
551 16:24:44.693040 Raw Buffer output 1 00000000
552 16:24:44.697285 pmc_send_ipc_cmd succeeded
553 16:24:44.702569 Detected 4 core, 8 thread CPU.
554 16:24:44.705584 Detected 4 core, 8 thread CPU.
555 16:24:44.939757 Display FSP Version Info HOB
556 16:24:44.943015 Reference Code - CPU = a.0.4c.31
557 16:24:44.946638 uCode Version = 0.0.0.86
558 16:24:44.950064 TXT ACM version = ff.ff.ff.ffff
559 16:24:44.953230 Reference Code - ME = a.0.4c.31
560 16:24:44.956792 MEBx version = 0.0.0.0
561 16:24:44.959755 ME Firmware Version = Consumer SKU
562 16:24:44.963284 Reference Code - PCH = a.0.4c.31
563 16:24:44.966739 PCH-CRID Status = Disabled
564 16:24:44.969883 PCH-CRID Original Value = ff.ff.ff.ffff
565 16:24:44.973256 PCH-CRID New Value = ff.ff.ff.ffff
566 16:24:44.976606 OPROM - RST - RAID = ff.ff.ff.ffff
567 16:24:44.979696 PCH Hsio Version = 4.0.0.0
568 16:24:44.983270 Reference Code - SA - System Agent = a.0.4c.31
569 16:24:44.986548 Reference Code - MRC = 2.0.0.1
570 16:24:44.989981 SA - PCIe Version = a.0.4c.31
571 16:24:44.993140 SA-CRID Status = Disabled
572 16:24:44.996481 SA-CRID Original Value = 0.0.0.1
573 16:24:44.999722 SA-CRID New Value = 0.0.0.1
574 16:24:45.002986 OPROM - VBIOS = ff.ff.ff.ffff
575 16:24:45.006394 IO Manageability Engine FW Version = 11.1.4.0
576 16:24:45.009423 PHY Build Version = 0.0.0.e0
577 16:24:45.012817 Thunderbolt(TM) FW Version = 0.0.0.0
578 16:24:45.019555 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 16:24:45.022927 ITSS IRQ Polarities Before:
580 16:24:45.023012 IPC0: 0xffffffff
581 16:24:45.026548 IPC1: 0xffffffff
582 16:24:45.026648 IPC2: 0xffffffff
583 16:24:45.029429 IPC3: 0xffffffff
584 16:24:45.033247 ITSS IRQ Polarities After:
585 16:24:45.033392 IPC0: 0xffffffff
586 16:24:45.036030 IPC1: 0xffffffff
587 16:24:45.036116 IPC2: 0xffffffff
588 16:24:45.039595 IPC3: 0xffffffff
589 16:24:45.043030 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 16:24:45.056281 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 16:24:45.066154 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 16:24:45.079210 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 16:24:45.085753 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
594 16:24:45.089382 Enumerating buses...
595 16:24:45.092382 Show all devs... Before device enumeration.
596 16:24:45.095743 Root Device: enabled 1
597 16:24:45.095826 DOMAIN: 0000: enabled 1
598 16:24:45.099379 CPU_CLUSTER: 0: enabled 1
599 16:24:45.102407 PCI: 00:00.0: enabled 1
600 16:24:45.105597 PCI: 00:02.0: enabled 1
601 16:24:45.105693 PCI: 00:04.0: enabled 1
602 16:24:45.109071 PCI: 00:05.0: enabled 1
603 16:24:45.112304 PCI: 00:06.0: enabled 0
604 16:24:45.112387 PCI: 00:07.0: enabled 0
605 16:24:45.115651 PCI: 00:07.1: enabled 0
606 16:24:45.118794 PCI: 00:07.2: enabled 0
607 16:24:45.122299 PCI: 00:07.3: enabled 0
608 16:24:45.122383 PCI: 00:08.0: enabled 1
609 16:24:45.126144 PCI: 00:09.0: enabled 0
610 16:24:45.129477 PCI: 00:0a.0: enabled 0
611 16:24:45.132123 PCI: 00:0d.0: enabled 1
612 16:24:45.132208 PCI: 00:0d.1: enabled 0
613 16:24:45.135623 PCI: 00:0d.2: enabled 0
614 16:24:45.138710 PCI: 00:0d.3: enabled 0
615 16:24:45.142263 PCI: 00:0e.0: enabled 0
616 16:24:45.142348 PCI: 00:10.2: enabled 1
617 16:24:45.145931 PCI: 00:10.6: enabled 0
618 16:24:45.148725 PCI: 00:10.7: enabled 0
619 16:24:45.152497 PCI: 00:12.0: enabled 0
620 16:24:45.152581 PCI: 00:12.6: enabled 0
621 16:24:45.155789 PCI: 00:13.0: enabled 0
622 16:24:45.158911 PCI: 00:14.0: enabled 1
623 16:24:45.158994 PCI: 00:14.1: enabled 0
624 16:24:45.162135 PCI: 00:14.2: enabled 1
625 16:24:45.165750 PCI: 00:14.3: enabled 1
626 16:24:45.169006 PCI: 00:15.0: enabled 1
627 16:24:45.169090 PCI: 00:15.1: enabled 1
628 16:24:45.172517 PCI: 00:15.2: enabled 1
629 16:24:45.175564 PCI: 00:15.3: enabled 1
630 16:24:45.178731 PCI: 00:16.0: enabled 1
631 16:24:45.178820 PCI: 00:16.1: enabled 0
632 16:24:45.182228 PCI: 00:16.2: enabled 0
633 16:24:45.185428 PCI: 00:16.3: enabled 0
634 16:24:45.188840 PCI: 00:16.4: enabled 0
635 16:24:45.188951 PCI: 00:16.5: enabled 0
636 16:24:45.192167 PCI: 00:17.0: enabled 1
637 16:24:45.195703 PCI: 00:19.0: enabled 0
638 16:24:45.195788 PCI: 00:19.1: enabled 1
639 16:24:45.198873 PCI: 00:19.2: enabled 0
640 16:24:45.202216 PCI: 00:1c.0: enabled 1
641 16:24:45.205351 PCI: 00:1c.1: enabled 0
642 16:24:45.205435 PCI: 00:1c.2: enabled 0
643 16:24:45.208573 PCI: 00:1c.3: enabled 0
644 16:24:45.212414 PCI: 00:1c.4: enabled 0
645 16:24:45.215575 PCI: 00:1c.5: enabled 0
646 16:24:45.215670 PCI: 00:1c.6: enabled 1
647 16:24:45.218992 PCI: 00:1c.7: enabled 0
648 16:24:45.222158 PCI: 00:1d.0: enabled 1
649 16:24:45.225474 PCI: 00:1d.1: enabled 0
650 16:24:45.225579 PCI: 00:1d.2: enabled 1
651 16:24:45.228446 PCI: 00:1d.3: enabled 0
652 16:24:45.231743 PCI: 00:1e.0: enabled 1
653 16:24:45.235393 PCI: 00:1e.1: enabled 0
654 16:24:45.235479 PCI: 00:1e.2: enabled 1
655 16:24:45.238630 PCI: 00:1e.3: enabled 1
656 16:24:45.241701 PCI: 00:1f.0: enabled 1
657 16:24:45.241788 PCI: 00:1f.1: enabled 0
658 16:24:45.245083 PCI: 00:1f.2: enabled 1
659 16:24:45.248364 PCI: 00:1f.3: enabled 1
660 16:24:45.251966 PCI: 00:1f.4: enabled 0
661 16:24:45.252052 PCI: 00:1f.5: enabled 1
662 16:24:45.255639 PCI: 00:1f.6: enabled 0
663 16:24:45.258350 PCI: 00:1f.7: enabled 0
664 16:24:45.258434 APIC: 00: enabled 1
665 16:24:45.261975 GENERIC: 0.0: enabled 1
666 16:24:45.265086 GENERIC: 0.0: enabled 1
667 16:24:45.268545 GENERIC: 1.0: enabled 1
668 16:24:45.268629 GENERIC: 0.0: enabled 1
669 16:24:45.271832 GENERIC: 1.0: enabled 1
670 16:24:45.274970 USB0 port 0: enabled 1
671 16:24:45.278508 GENERIC: 0.0: enabled 1
672 16:24:45.278592 USB0 port 0: enabled 1
673 16:24:45.281675 GENERIC: 0.0: enabled 1
674 16:24:45.284907 I2C: 00:1a: enabled 1
675 16:24:45.284992 I2C: 00:31: enabled 1
676 16:24:45.288279 I2C: 00:32: enabled 1
677 16:24:45.291946 I2C: 00:10: enabled 1
678 16:24:45.292030 I2C: 00:15: enabled 1
679 16:24:45.294906 GENERIC: 0.0: enabled 0
680 16:24:45.298608 GENERIC: 1.0: enabled 0
681 16:24:45.301978 GENERIC: 0.0: enabled 1
682 16:24:45.302062 SPI: 00: enabled 1
683 16:24:45.305138 SPI: 00: enabled 1
684 16:24:45.308620 PNP: 0c09.0: enabled 1
685 16:24:45.308724 GENERIC: 0.0: enabled 1
686 16:24:45.311477 USB3 port 0: enabled 1
687 16:24:45.315063 USB3 port 1: enabled 1
688 16:24:45.315175 USB3 port 2: enabled 0
689 16:24:45.318381 USB3 port 3: enabled 0
690 16:24:45.322073 USB2 port 0: enabled 0
691 16:24:45.322180 USB2 port 1: enabled 1
692 16:24:45.324904 USB2 port 2: enabled 1
693 16:24:45.328680 USB2 port 3: enabled 0
694 16:24:45.331826 USB2 port 4: enabled 1
695 16:24:45.331937 USB2 port 5: enabled 0
696 16:24:45.335153 USB2 port 6: enabled 0
697 16:24:45.338550 USB2 port 7: enabled 0
698 16:24:45.338658 USB2 port 8: enabled 0
699 16:24:45.341808 USB2 port 9: enabled 0
700 16:24:45.345218 USB3 port 0: enabled 0
701 16:24:45.348280 USB3 port 1: enabled 1
702 16:24:45.348391 USB3 port 2: enabled 0
703 16:24:45.351588 USB3 port 3: enabled 0
704 16:24:45.355154 GENERIC: 0.0: enabled 1
705 16:24:45.355264 GENERIC: 1.0: enabled 1
706 16:24:45.358377 APIC: 01: enabled 1
707 16:24:45.361677 APIC: 03: enabled 1
708 16:24:45.361784 APIC: 05: enabled 1
709 16:24:45.364641 APIC: 06: enabled 1
710 16:24:45.368216 APIC: 02: enabled 1
711 16:24:45.368326 APIC: 04: enabled 1
712 16:24:45.371358 APIC: 07: enabled 1
713 16:24:45.371469 Compare with tree...
714 16:24:45.374847 Root Device: enabled 1
715 16:24:45.378137 DOMAIN: 0000: enabled 1
716 16:24:45.381389 PCI: 00:00.0: enabled 1
717 16:24:45.381499 PCI: 00:02.0: enabled 1
718 16:24:45.384612 PCI: 00:04.0: enabled 1
719 16:24:45.388487 GENERIC: 0.0: enabled 1
720 16:24:45.391241 PCI: 00:05.0: enabled 1
721 16:24:45.394988 PCI: 00:06.0: enabled 0
722 16:24:45.395095 PCI: 00:07.0: enabled 0
723 16:24:45.398054 GENERIC: 0.0: enabled 1
724 16:24:45.401258 PCI: 00:07.1: enabled 0
725 16:24:45.404928 GENERIC: 1.0: enabled 1
726 16:24:45.407965 PCI: 00:07.2: enabled 0
727 16:24:45.411617 GENERIC: 0.0: enabled 1
728 16:24:45.411728 PCI: 00:07.3: enabled 0
729 16:24:45.414573 GENERIC: 1.0: enabled 1
730 16:24:45.417956 PCI: 00:08.0: enabled 1
731 16:24:45.421497 PCI: 00:09.0: enabled 0
732 16:24:45.424989 PCI: 00:0a.0: enabled 0
733 16:24:45.425095 PCI: 00:0d.0: enabled 1
734 16:24:45.428139 USB0 port 0: enabled 1
735 16:24:45.431509 USB3 port 0: enabled 1
736 16:24:45.435087 USB3 port 1: enabled 1
737 16:24:45.438017 USB3 port 2: enabled 0
738 16:24:45.438120 USB3 port 3: enabled 0
739 16:24:45.441167 PCI: 00:0d.1: enabled 0
740 16:24:45.444481 PCI: 00:0d.2: enabled 0
741 16:24:45.448212 GENERIC: 0.0: enabled 1
742 16:24:45.451405 PCI: 00:0d.3: enabled 0
743 16:24:45.451513 PCI: 00:0e.0: enabled 0
744 16:24:45.454489 PCI: 00:10.2: enabled 1
745 16:24:45.458018 PCI: 00:10.6: enabled 0
746 16:24:45.461279 PCI: 00:10.7: enabled 0
747 16:24:45.464860 PCI: 00:12.0: enabled 0
748 16:24:45.465025 PCI: 00:12.6: enabled 0
749 16:24:45.467935 PCI: 00:13.0: enabled 0
750 16:24:45.471119 PCI: 00:14.0: enabled 1
751 16:24:45.474397 USB0 port 0: enabled 1
752 16:24:45.477697 USB2 port 0: enabled 0
753 16:24:45.477802 USB2 port 1: enabled 1
754 16:24:45.481183 USB2 port 2: enabled 1
755 16:24:45.484383 USB2 port 3: enabled 0
756 16:24:45.487490 USB2 port 4: enabled 1
757 16:24:45.491141 USB2 port 5: enabled 0
758 16:24:45.494072 USB2 port 6: enabled 0
759 16:24:45.494173 USB2 port 7: enabled 0
760 16:24:45.497619 USB2 port 8: enabled 0
761 16:24:45.501021 USB2 port 9: enabled 0
762 16:24:45.504220 USB3 port 0: enabled 0
763 16:24:45.507838 USB3 port 1: enabled 1
764 16:24:45.507920 USB3 port 2: enabled 0
765 16:24:45.510986 USB3 port 3: enabled 0
766 16:24:45.514834 PCI: 00:14.1: enabled 0
767 16:24:45.517364 PCI: 00:14.2: enabled 1
768 16:24:45.521216 PCI: 00:14.3: enabled 1
769 16:24:45.524549 GENERIC: 0.0: enabled 1
770 16:24:45.524640 PCI: 00:15.0: enabled 1
771 16:24:45.527614 I2C: 00:1a: enabled 1
772 16:24:45.531417 I2C: 00:31: enabled 1
773 16:24:45.534100 I2C: 00:32: enabled 1
774 16:24:45.534185 PCI: 00:15.1: enabled 1
775 16:24:45.537411 I2C: 00:10: enabled 1
776 16:24:45.541122 PCI: 00:15.2: enabled 1
777 16:24:45.543935 PCI: 00:15.3: enabled 1
778 16:24:45.547390 PCI: 00:16.0: enabled 1
779 16:24:45.547476 PCI: 00:16.1: enabled 0
780 16:24:45.550756 PCI: 00:16.2: enabled 0
781 16:24:45.554658 PCI: 00:16.3: enabled 0
782 16:24:45.558067 PCI: 00:16.4: enabled 0
783 16:24:45.558176 PCI: 00:16.5: enabled 0
784 16:24:45.562456 PCI: 00:17.0: enabled 1
785 16:24:45.565079 PCI: 00:19.0: enabled 0
786 16:24:45.568661 PCI: 00:19.1: enabled 1
787 16:24:45.568746 I2C: 00:15: enabled 1
788 16:24:45.572135 PCI: 00:19.2: enabled 0
789 16:24:45.575432 PCI: 00:1d.0: enabled 1
790 16:24:45.578430 GENERIC: 0.0: enabled 1
791 16:24:45.578516 PCI: 00:1e.0: enabled 1
792 16:24:45.581954 PCI: 00:1e.1: enabled 0
793 16:24:45.585167 PCI: 00:1e.2: enabled 1
794 16:24:45.588577 SPI: 00: enabled 1
795 16:24:45.591969 PCI: 00:1e.3: enabled 1
796 16:24:45.592054 SPI: 00: enabled 1
797 16:24:45.595223 PCI: 00:1f.0: enabled 1
798 16:24:45.646592 PNP: 0c09.0: enabled 1
799 16:24:45.646765 PCI: 00:1f.1: enabled 0
800 16:24:45.647052 PCI: 00:1f.2: enabled 1
801 16:24:45.647182 GENERIC: 0.0: enabled 1
802 16:24:45.647312 GENERIC: 0.0: enabled 1
803 16:24:45.647608 GENERIC: 1.0: enabled 1
804 16:24:45.647674 PCI: 00:1f.3: enabled 1
805 16:24:45.647735 PCI: 00:1f.4: enabled 0
806 16:24:45.647793 PCI: 00:1f.5: enabled 1
807 16:24:45.648367 PCI: 00:1f.6: enabled 0
808 16:24:45.648467 PCI: 00:1f.7: enabled 0
809 16:24:45.648564 CPU_CLUSTER: 0: enabled 1
810 16:24:45.648844 APIC: 00: enabled 1
811 16:24:45.648928 APIC: 01: enabled 1
812 16:24:45.648990 APIC: 03: enabled 1
813 16:24:45.649065 APIC: 05: enabled 1
814 16:24:45.649123 APIC: 06: enabled 1
815 16:24:45.649378 APIC: 02: enabled 1
816 16:24:45.649440 APIC: 04: enabled 1
817 16:24:45.649497 APIC: 07: enabled 1
818 16:24:45.697364 Root Device scanning...
819 16:24:45.697506 scan_static_bus for Root Device
820 16:24:45.697942 DOMAIN: 0000 enabled
821 16:24:45.698075 CPU_CLUSTER: 0 enabled
822 16:24:45.698155 DOMAIN: 0000 scanning...
823 16:24:45.698419 PCI: pci_scan_bus for bus 00
824 16:24:45.698521 PCI: 00:00.0 [8086/0000] ops
825 16:24:45.698793 PCI: 00:00.0 [8086/9a12] enabled
826 16:24:45.698916 PCI: 00:02.0 [8086/0000] bus ops
827 16:24:45.699178 PCI: 00:02.0 [8086/9a40] enabled
828 16:24:45.699244 PCI: 00:04.0 [8086/0000] bus ops
829 16:24:45.699319 PCI: 00:04.0 [8086/9a03] enabled
830 16:24:45.699378 PCI: 00:05.0 [8086/9a19] enabled
831 16:24:45.699620 PCI: 00:07.0 [0000/0000] hidden
832 16:24:45.699681 PCI: 00:08.0 [8086/9a11] enabled
833 16:24:45.700162 PCI: 00:0a.0 [8086/9a0d] disabled
834 16:24:45.747744 PCI: 00:0d.0 [8086/0000] bus ops
835 16:24:45.747888 PCI: 00:0d.0 [8086/9a13] enabled
836 16:24:45.748153 PCI: 00:14.0 [8086/0000] bus ops
837 16:24:45.748224 PCI: 00:14.0 [8086/a0ed] enabled
838 16:24:45.748471 PCI: 00:14.2 [8086/a0ef] enabled
839 16:24:45.748538 PCI: 00:14.3 [8086/0000] bus ops
840 16:24:45.749003 PCI: 00:14.3 [8086/a0f0] enabled
841 16:24:45.749088 PCI: 00:15.0 [8086/0000] bus ops
842 16:24:45.749354 PCI: 00:15.0 [8086/a0e8] enabled
843 16:24:45.749452 PCI: 00:15.1 [8086/0000] bus ops
844 16:24:45.749840 PCI: 00:15.1 [8086/a0e9] enabled
845 16:24:45.749926 PCI: 00:15.2 [8086/0000] bus ops
846 16:24:45.750181 PCI: 00:15.2 [8086/a0ea] enabled
847 16:24:45.750251 PCI: 00:15.3 [8086/0000] bus ops
848 16:24:45.750498 PCI: 00:15.3 [8086/a0eb] enabled
849 16:24:45.750564 PCI: 00:16.0 [8086/0000] ops
850 16:24:45.753730 PCI: 00:16.0 [8086/a0e0] enabled
851 16:24:45.756566 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 16:24:45.759797 PCI: 00:19.0 [8086/0000] bus ops
853 16:24:45.763271 PCI: 00:19.0 [8086/a0c5] disabled
854 16:24:45.766810 PCI: 00:19.1 [8086/0000] bus ops
855 16:24:45.769796 PCI: 00:19.1 [8086/a0c6] enabled
856 16:24:45.773616 PCI: 00:1d.0 [8086/0000] bus ops
857 16:24:45.776730 PCI: 00:1d.0 [8086/a0b0] enabled
858 16:24:45.780050 PCI: 00:1e.0 [8086/0000] ops
859 16:24:45.783339 PCI: 00:1e.0 [8086/a0a8] enabled
860 16:24:45.786982 PCI: 00:1e.2 [8086/0000] bus ops
861 16:24:45.789939 PCI: 00:1e.2 [8086/a0aa] enabled
862 16:24:45.793347 PCI: 00:1e.3 [8086/0000] bus ops
863 16:24:45.796769 PCI: 00:1e.3 [8086/a0ab] enabled
864 16:24:45.800074 PCI: 00:1f.0 [8086/0000] bus ops
865 16:24:45.803175 PCI: 00:1f.0 [8086/a087] enabled
866 16:24:45.806349 RTC Init
867 16:24:45.810205 Set power on after power failure.
868 16:24:45.810291 Disabling Deep S3
869 16:24:45.812918 Disabling Deep S3
870 16:24:45.816390 Disabling Deep S4
871 16:24:45.816475 Disabling Deep S4
872 16:24:45.819477 Disabling Deep S5
873 16:24:45.819563 Disabling Deep S5
874 16:24:45.823363 PCI: 00:1f.2 [0000/0000] hidden
875 16:24:45.826213 PCI: 00:1f.3 [8086/0000] bus ops
876 16:24:45.829742 PCI: 00:1f.3 [8086/a0c8] enabled
877 16:24:45.833138 PCI: 00:1f.5 [8086/0000] bus ops
878 16:24:45.836017 PCI: 00:1f.5 [8086/a0a4] enabled
879 16:24:45.839508 PCI: Leftover static devices:
880 16:24:45.842826 PCI: 00:10.2
881 16:24:45.842911 PCI: 00:10.6
882 16:24:45.842978 PCI: 00:10.7
883 16:24:45.846392 PCI: 00:06.0
884 16:24:45.846478 PCI: 00:07.1
885 16:24:45.849508 PCI: 00:07.2
886 16:24:45.849630 PCI: 00:07.3
887 16:24:45.849699 PCI: 00:09.0
888 16:24:45.853390 PCI: 00:0d.1
889 16:24:45.853476 PCI: 00:0d.2
890 16:24:45.856227 PCI: 00:0d.3
891 16:24:45.856312 PCI: 00:0e.0
892 16:24:45.859721 PCI: 00:12.0
893 16:24:45.859807 PCI: 00:12.6
894 16:24:45.859874 PCI: 00:13.0
895 16:24:45.862842 PCI: 00:14.1
896 16:24:45.862927 PCI: 00:16.1
897 16:24:45.866366 PCI: 00:16.2
898 16:24:45.866451 PCI: 00:16.3
899 16:24:45.866517 PCI: 00:16.4
900 16:24:45.869372 PCI: 00:16.5
901 16:24:45.869457 PCI: 00:17.0
902 16:24:45.872951 PCI: 00:19.2
903 16:24:45.873036 PCI: 00:1e.1
904 16:24:45.873102 PCI: 00:1f.1
905 16:24:45.876093 PCI: 00:1f.4
906 16:24:45.876178 PCI: 00:1f.6
907 16:24:45.879585 PCI: 00:1f.7
908 16:24:45.883079 PCI: Check your devicetree.cb.
909 16:24:45.883164 PCI: 00:02.0 scanning...
910 16:24:45.889601 scan_generic_bus for PCI: 00:02.0
911 16:24:45.893026 scan_generic_bus for PCI: 00:02.0 done
912 16:24:45.896355 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 16:24:45.899570 PCI: 00:04.0 scanning...
914 16:24:45.903068 scan_generic_bus for PCI: 00:04.0
915 16:24:45.906216 GENERIC: 0.0 enabled
916 16:24:45.909403 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 16:24:45.915853 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 16:24:45.919404 PCI: 00:0d.0 scanning...
919 16:24:45.922609 scan_static_bus for PCI: 00:0d.0
920 16:24:45.922693 USB0 port 0 enabled
921 16:24:45.926110 USB0 port 0 scanning...
922 16:24:45.929321 scan_static_bus for USB0 port 0
923 16:24:45.932725 USB3 port 0 enabled
924 16:24:45.932810 USB3 port 1 enabled
925 16:24:45.936202 USB3 port 2 disabled
926 16:24:45.939421 USB3 port 3 disabled
927 16:24:45.939505 USB3 port 0 scanning...
928 16:24:45.942555 scan_static_bus for USB3 port 0
929 16:24:45.949339 scan_static_bus for USB3 port 0 done
930 16:24:45.952539 scan_bus: bus USB3 port 0 finished in 6 msecs
931 16:24:45.955929 USB3 port 1 scanning...
932 16:24:45.959238 scan_static_bus for USB3 port 1
933 16:24:45.962826 scan_static_bus for USB3 port 1 done
934 16:24:45.965504 scan_bus: bus USB3 port 1 finished in 6 msecs
935 16:24:45.969049 scan_static_bus for USB0 port 0 done
936 16:24:45.976130 scan_bus: bus USB0 port 0 finished in 43 msecs
937 16:24:45.978927 scan_static_bus for PCI: 00:0d.0 done
938 16:24:45.982398 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 16:24:45.985574 PCI: 00:14.0 scanning...
940 16:24:45.988916 scan_static_bus for PCI: 00:14.0
941 16:24:45.992119 USB0 port 0 enabled
942 16:24:45.995391 USB0 port 0 scanning...
943 16:24:45.999007 scan_static_bus for USB0 port 0
944 16:24:45.999092 USB2 port 0 disabled
945 16:24:46.002298 USB2 port 1 enabled
946 16:24:46.002383 USB2 port 2 enabled
947 16:24:46.005821 USB2 port 3 disabled
948 16:24:46.008874 USB2 port 4 enabled
949 16:24:46.008984 USB2 port 5 disabled
950 16:24:46.012318 USB2 port 6 disabled
951 16:24:46.015510 USB2 port 7 disabled
952 16:24:46.015605 USB2 port 8 disabled
953 16:24:46.018623 USB2 port 9 disabled
954 16:24:46.022389 USB3 port 0 disabled
955 16:24:46.022474 USB3 port 1 enabled
956 16:24:46.025403 USB3 port 2 disabled
957 16:24:46.029060 USB3 port 3 disabled
958 16:24:46.029172 USB2 port 1 scanning...
959 16:24:46.032192 scan_static_bus for USB2 port 1
960 16:24:46.035491 scan_static_bus for USB2 port 1 done
961 16:24:46.042058 scan_bus: bus USB2 port 1 finished in 6 msecs
962 16:24:46.045337 USB2 port 2 scanning...
963 16:24:46.048943 scan_static_bus for USB2 port 2
964 16:24:46.052148 scan_static_bus for USB2 port 2 done
965 16:24:46.055146 scan_bus: bus USB2 port 2 finished in 6 msecs
966 16:24:46.058800 USB2 port 4 scanning...
967 16:24:46.061679 scan_static_bus for USB2 port 4
968 16:24:46.064945 scan_static_bus for USB2 port 4 done
969 16:24:46.068263 scan_bus: bus USB2 port 4 finished in 6 msecs
970 16:24:46.071940 USB3 port 1 scanning...
971 16:24:46.075044 scan_static_bus for USB3 port 1
972 16:24:46.078337 scan_static_bus for USB3 port 1 done
973 16:24:46.085130 scan_bus: bus USB3 port 1 finished in 6 msecs
974 16:24:46.088281 scan_static_bus for USB0 port 0 done
975 16:24:46.091509 scan_bus: bus USB0 port 0 finished in 93 msecs
976 16:24:46.095148 scan_static_bus for PCI: 00:14.0 done
977 16:24:46.101361 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 16:24:46.104886 PCI: 00:14.3 scanning...
979 16:24:46.108293 scan_static_bus for PCI: 00:14.3
980 16:24:46.108446 GENERIC: 0.0 enabled
981 16:24:46.114878 scan_static_bus for PCI: 00:14.3 done
982 16:24:46.117934 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 16:24:46.121355 PCI: 00:15.0 scanning...
984 16:24:46.124529 scan_static_bus for PCI: 00:15.0
985 16:24:46.124615 I2C: 00:1a enabled
986 16:24:46.128274 I2C: 00:31 enabled
987 16:24:46.131703 I2C: 00:32 enabled
988 16:24:46.135422 scan_static_bus for PCI: 00:15.0 done
989 16:24:46.139245 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 16:24:46.142279 PCI: 00:15.1 scanning...
991 16:24:46.145456 scan_static_bus for PCI: 00:15.1
992 16:24:46.145542 I2C: 00:10 enabled
993 16:24:46.148668 scan_static_bus for PCI: 00:15.1 done
994 16:24:46.155365 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 16:24:46.158622 PCI: 00:15.2 scanning...
996 16:24:46.161985 scan_static_bus for PCI: 00:15.2
997 16:24:46.165274 scan_static_bus for PCI: 00:15.2 done
998 16:24:46.168645 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 16:24:46.171590 PCI: 00:15.3 scanning...
1000 16:24:46.175006 scan_static_bus for PCI: 00:15.3
1001 16:24:46.178350 scan_static_bus for PCI: 00:15.3 done
1002 16:24:46.185467 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 16:24:46.185555 PCI: 00:19.1 scanning...
1004 16:24:46.188582 scan_static_bus for PCI: 00:19.1
1005 16:24:46.191795 I2C: 00:15 enabled
1006 16:24:46.195395 scan_static_bus for PCI: 00:19.1 done
1007 16:24:46.201789 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 16:24:46.201875 PCI: 00:1d.0 scanning...
1009 16:24:46.208272 do_pci_scan_bridge for PCI: 00:1d.0
1010 16:24:46.208359 PCI: pci_scan_bus for bus 01
1011 16:24:46.211962 PCI: 01:00.0 [1c5c/174a] enabled
1012 16:24:46.215245 GENERIC: 0.0 enabled
1013 16:24:46.218752 Enabling Common Clock Configuration
1014 16:24:46.225272 L1 Sub-State supported from root port 29
1015 16:24:46.225359 L1 Sub-State Support = 0xf
1016 16:24:46.228436 CommonModeRestoreTime = 0x28
1017 16:24:46.235087 Power On Value = 0x16, Power On Scale = 0x0
1018 16:24:46.235175 ASPM: Enabled L1
1019 16:24:46.238533 PCIe: Max_Payload_Size adjusted to 128
1020 16:24:46.245242 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 16:24:46.245329 PCI: 00:1e.2 scanning...
1022 16:24:46.251923 scan_generic_bus for PCI: 00:1e.2
1023 16:24:46.252009 SPI: 00 enabled
1024 16:24:46.258657 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 16:24:46.261692 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 16:24:46.265224 PCI: 00:1e.3 scanning...
1027 16:24:46.268280 scan_generic_bus for PCI: 00:1e.3
1028 16:24:46.271672 SPI: 00 enabled
1029 16:24:46.278316 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 16:24:46.281460 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 16:24:46.285046 PCI: 00:1f.0 scanning...
1032 16:24:46.288198 scan_static_bus for PCI: 00:1f.0
1033 16:24:46.288284 PNP: 0c09.0 enabled
1034 16:24:46.291657 PNP: 0c09.0 scanning...
1035 16:24:46.295079 scan_static_bus for PNP: 0c09.0
1036 16:24:46.298662 scan_static_bus for PNP: 0c09.0 done
1037 16:24:46.305143 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 16:24:46.308371 scan_static_bus for PCI: 00:1f.0 done
1039 16:24:46.311708 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 16:24:46.314896 PCI: 00:1f.2 scanning...
1041 16:24:46.318365 scan_static_bus for PCI: 00:1f.2
1042 16:24:46.321435 GENERIC: 0.0 enabled
1043 16:24:46.324587 GENERIC: 0.0 scanning...
1044 16:24:46.328134 scan_static_bus for GENERIC: 0.0
1045 16:24:46.328220 GENERIC: 0.0 enabled
1046 16:24:46.331269 GENERIC: 1.0 enabled
1047 16:24:46.334530 scan_static_bus for GENERIC: 0.0 done
1048 16:24:46.341290 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 16:24:46.344780 scan_static_bus for PCI: 00:1f.2 done
1050 16:24:46.348124 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 16:24:46.351379 PCI: 00:1f.3 scanning...
1052 16:24:46.354630 scan_static_bus for PCI: 00:1f.3
1053 16:24:46.358028 scan_static_bus for PCI: 00:1f.3 done
1054 16:24:46.364508 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 16:24:46.364595 PCI: 00:1f.5 scanning...
1056 16:24:46.367961 scan_generic_bus for PCI: 00:1f.5
1057 16:24:46.374413 scan_generic_bus for PCI: 00:1f.5 done
1058 16:24:46.377852 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 16:24:46.380978 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 16:24:46.387803 scan_static_bus for Root Device done
1061 16:24:46.391057 scan_bus: bus Root Device finished in 737 msecs
1062 16:24:46.391143 done
1063 16:24:46.397693 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 16:24:46.401433 Chrome EC: UHEPI supported
1065 16:24:46.407543 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 16:24:46.414079 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 16:24:46.417545 SPI flash protection: WPSW=0 SRP0=0
1068 16:24:46.421091 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 16:24:46.427646 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 16:24:46.430739 found VGA at PCI: 00:02.0
1071 16:24:46.433983 Setting up VGA for PCI: 00:02.0
1072 16:24:46.437385 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 16:24:46.444163 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 16:24:46.447684 Allocating resources...
1075 16:24:46.447771 Reading resources...
1076 16:24:46.454540 Root Device read_resources bus 0 link: 0
1077 16:24:46.457292 DOMAIN: 0000 read_resources bus 0 link: 0
1078 16:24:46.460733 PCI: 00:04.0 read_resources bus 1 link: 0
1079 16:24:46.467387 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 16:24:46.470789 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 16:24:46.477525 USB0 port 0 read_resources bus 0 link: 0
1082 16:24:46.481152 USB0 port 0 read_resources bus 0 link: 0 done
1083 16:24:46.487353 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 16:24:46.490541 PCI: 00:14.0 read_resources bus 0 link: 0
1085 16:24:46.497161 USB0 port 0 read_resources bus 0 link: 0
1086 16:24:46.500493 USB0 port 0 read_resources bus 0 link: 0 done
1087 16:24:46.507178 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 16:24:46.510475 PCI: 00:14.3 read_resources bus 0 link: 0
1089 16:24:46.517406 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 16:24:46.520816 PCI: 00:15.0 read_resources bus 0 link: 0
1091 16:24:46.527247 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 16:24:46.530481 PCI: 00:15.1 read_resources bus 0 link: 0
1093 16:24:46.537376 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 16:24:46.540216 PCI: 00:19.1 read_resources bus 0 link: 0
1095 16:24:46.546797 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 16:24:46.550297 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 16:24:46.557413 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 16:24:46.560449 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 16:24:46.566987 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 16:24:46.570206 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 16:24:46.576768 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 16:24:46.580412 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 16:24:46.586582 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 16:24:46.589931 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 16:24:46.593328 GENERIC: 0.0 read_resources bus 0 link: 0
1106 16:24:46.600442 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 16:24:46.603797 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 16:24:46.611269 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 16:24:46.614259 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 16:24:46.620904 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 16:24:46.624195 Root Device read_resources bus 0 link: 0 done
1112 16:24:46.627559 Done reading resources.
1113 16:24:46.634454 Show resources in subtree (Root Device)...After reading.
1114 16:24:46.637611 Root Device child on link 0 DOMAIN: 0000
1115 16:24:46.640946 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 16:24:46.651130 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 16:24:46.660912 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 16:24:46.664167 PCI: 00:00.0
1119 16:24:46.674261 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 16:24:46.680537 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 16:24:46.690432 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 16:24:46.700508 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 16:24:46.710456 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 16:24:46.720502 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 16:24:46.730376 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 16:24:46.737302 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 16:24:46.747195 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 16:24:46.756735 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 16:24:46.767171 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 16:24:46.776961 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 16:24:46.783866 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 16:24:46.793537 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 16:24:46.803624 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 16:24:46.813366 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 16:24:46.823580 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 16:24:46.833184 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 16:24:46.840078 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 16:24:46.850097 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 16:24:46.853332 PCI: 00:02.0
1140 16:24:46.862891 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 16:24:46.873230 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 16:24:46.882846 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 16:24:46.886355 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 16:24:46.896260 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 16:24:46.899687 GENERIC: 0.0
1146 16:24:46.899772 PCI: 00:05.0
1147 16:24:46.909552 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 16:24:46.916282 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 16:24:46.916368 GENERIC: 0.0
1150 16:24:46.919843 PCI: 00:08.0
1151 16:24:46.929431 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 16:24:46.929528 PCI: 00:0a.0
1153 16:24:46.932783 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 16:24:46.942697 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 16:24:46.949392 USB0 port 0 child on link 0 USB3 port 0
1156 16:24:46.949477 USB3 port 0
1157 16:24:46.952911 USB3 port 1
1158 16:24:46.952995 USB3 port 2
1159 16:24:46.956189 USB3 port 3
1160 16:24:46.959516 PCI: 00:14.0 child on link 0 USB0 port 0
1161 16:24:46.969822 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 16:24:46.976391 USB0 port 0 child on link 0 USB2 port 0
1163 16:24:46.976547 USB2 port 0
1164 16:24:46.979501 USB2 port 1
1165 16:24:46.979585 USB2 port 2
1166 16:24:46.982920 USB2 port 3
1167 16:24:46.983055 USB2 port 4
1168 16:24:46.986103 USB2 port 5
1169 16:24:46.986257 USB2 port 6
1170 16:24:46.989382 USB2 port 7
1171 16:24:46.989481 USB2 port 8
1172 16:24:46.992912 USB2 port 9
1173 16:24:46.993031 USB3 port 0
1174 16:24:46.996047 USB3 port 1
1175 16:24:46.996131 USB3 port 2
1176 16:24:46.999720 USB3 port 3
1177 16:24:46.999808 PCI: 00:14.2
1178 16:24:47.009265 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 16:24:47.019137 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 16:24:47.025983 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 16:24:47.036029 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 16:24:47.036117 GENERIC: 0.0
1183 16:24:47.042462 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 16:24:47.052712 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 16:24:47.052799 I2C: 00:1a
1186 16:24:47.056388 I2C: 00:31
1187 16:24:47.056473 I2C: 00:32
1188 16:24:47.059112 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 16:24:47.069244 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 16:24:47.072580 I2C: 00:10
1191 16:24:47.072665 PCI: 00:15.2
1192 16:24:47.082472 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 16:24:47.085614 PCI: 00:15.3
1194 16:24:47.095933 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 16:24:47.096019 PCI: 00:16.0
1196 16:24:47.105729 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 16:24:47.109001 PCI: 00:19.0
1198 16:24:47.112104 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 16:24:47.122756 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 16:24:47.125726 I2C: 00:15
1201 16:24:47.128775 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 16:24:47.138877 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 16:24:47.145649 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 16:24:47.155437 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 16:24:47.159644 GENERIC: 0.0
1206 16:24:47.159748 PCI: 01:00.0
1207 16:24:47.168680 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 16:24:47.178505 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 16:24:47.188673 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 16:24:47.188770 PCI: 00:1e.0
1211 16:24:47.201970 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 16:24:47.205351 PCI: 00:1e.2 child on link 0 SPI: 00
1213 16:24:47.215120 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 16:24:47.215217 SPI: 00
1215 16:24:47.222004 PCI: 00:1e.3 child on link 0 SPI: 00
1216 16:24:47.231628 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 16:24:47.231727 SPI: 00
1218 16:24:47.235324 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 16:24:47.245335 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 16:24:47.245433 PNP: 0c09.0
1221 16:24:47.254913 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 16:24:47.258188 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 16:24:47.268192 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 16:24:47.278230 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 16:24:47.281349 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 16:24:47.284991 GENERIC: 0.0
1227 16:24:47.285087 GENERIC: 1.0
1228 16:24:47.288899 PCI: 00:1f.3
1229 16:24:47.298091 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 16:24:47.308158 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 16:24:47.311366 PCI: 00:1f.5
1232 16:24:47.318316 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 16:24:47.324885 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 16:24:47.324978 APIC: 00
1235 16:24:47.325061 APIC: 01
1236 16:24:47.328459 APIC: 03
1237 16:24:47.328544 APIC: 05
1238 16:24:47.328628 APIC: 06
1239 16:24:47.331187 APIC: 02
1240 16:24:47.331283 APIC: 04
1241 16:24:47.334886 APIC: 07
1242 16:24:47.341710 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 16:24:47.348061 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 16:24:47.354392 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 16:24:47.357889 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 16:24:47.364357 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 16:24:47.367923 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 16:24:47.371078 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 16:24:47.377865 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 16:24:47.387709 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 16:24:47.394528 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 16:24:47.400871 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 16:24:47.407610 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 16:24:47.414460 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 16:24:47.420876 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 16:24:47.431076 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 16:24:47.434282 DOMAIN: 0000: Resource ranges:
1258 16:24:47.437552 * Base: 1000, Size: 800, Tag: 100
1259 16:24:47.440753 * Base: 1900, Size: e700, Tag: 100
1260 16:24:47.447414 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 16:24:47.454105 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 16:24:47.460903 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 16:24:47.467513 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 16:24:47.473891 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 16:24:47.483889 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 16:24:47.490532 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 16:24:47.497417 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 16:24:47.507052 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 16:24:47.513944 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 16:24:47.520290 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 16:24:47.527101 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 16:24:47.537243 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 16:24:47.543716 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 16:24:47.550271 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 16:24:47.560072 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 16:24:47.566747 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 16:24:47.573538 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 16:24:47.583448 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 16:24:47.590216 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 16:24:47.596579 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 16:24:47.606484 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 16:24:47.613470 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 16:24:47.619936 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 16:24:47.629556 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 16:24:47.632977 DOMAIN: 0000: Resource ranges:
1286 16:24:47.636777 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 16:24:47.639977 * Base: d0000000, Size: 28000000, Tag: 200
1288 16:24:47.646383 * Base: fa000000, Size: 1000000, Tag: 200
1289 16:24:47.649563 * Base: fb001000, Size: 2fff000, Tag: 200
1290 16:24:47.652941 * Base: fe010000, Size: 2e000, Tag: 200
1291 16:24:47.656351 * Base: fe03f000, Size: d41000, Tag: 200
1292 16:24:47.663012 * Base: fed88000, Size: 8000, Tag: 200
1293 16:24:47.666268 * Base: fed93000, Size: d000, Tag: 200
1294 16:24:47.669488 * Base: feda2000, Size: 1e000, Tag: 200
1295 16:24:47.673154 * Base: fede0000, Size: 1220000, Tag: 200
1296 16:24:47.679823 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 16:24:47.686157 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 16:24:47.692967 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 16:24:47.699430 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 16:24:47.706318 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 16:24:47.713228 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 16:24:47.719385 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 16:24:47.725992 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 16:24:47.732728 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 16:24:47.739267 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 16:24:47.745870 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 16:24:47.752490 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 16:24:47.759292 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 16:24:47.765586 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 16:24:47.772604 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 16:24:47.779058 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 16:24:47.786361 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 16:24:47.792133 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 16:24:47.799105 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 16:24:47.805990 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 16:24:47.812420 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 16:24:47.819297 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 16:24:47.825301 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 16:24:47.832307 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 16:24:47.842324 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 16:24:47.845647 PCI: 00:1d.0: Resource ranges:
1322 16:24:47.848593 * Base: 7fc00000, Size: 100000, Tag: 200
1323 16:24:47.855761 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 16:24:47.861927 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 16:24:47.868677 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 16:24:47.875687 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 16:24:47.885670 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 16:24:47.889072 Root Device assign_resources, bus 0 link: 0
1329 16:24:47.892017 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 16:24:47.901927 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 16:24:47.908474 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 16:24:47.918358 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 16:24:47.925123 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 16:24:47.931473 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 16:24:47.935177 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 16:24:47.941761 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 16:24:47.951861 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 16:24:47.958466 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 16:24:47.964946 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 16:24:47.968312 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 16:24:47.978031 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 16:24:47.981382 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 16:24:47.985152 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 16:24:47.995054 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 16:24:48.001760 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 16:24:48.012091 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 16:24:48.014689 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 16:24:48.021361 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 16:24:48.028118 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 16:24:48.031267 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 16:24:48.037932 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 16:24:48.044770 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 16:24:48.051062 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 16:24:48.054502 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 16:24:48.064376 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 16:24:48.070896 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 16:24:48.080846 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 16:24:48.087623 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 16:24:48.093917 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 16:24:48.097521 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 16:24:48.107251 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 16:24:48.117284 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 16:24:48.124006 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 16:24:48.130933 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 16:24:48.137214 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 16:24:48.143636 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 16:24:48.153490 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 16:24:48.157161 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 16:24:48.167025 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 16:24:48.170280 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 16:24:48.173793 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 16:24:48.183842 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 16:24:48.187063 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 16:24:48.193573 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 16:24:48.196817 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 16:24:48.203700 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 16:24:48.206898 LPC: Trying to open IO window from 800 size 1ff
1378 16:24:48.216991 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 16:24:48.223165 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 16:24:48.233519 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 16:24:48.236711 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 16:24:48.239901 Root Device assign_resources, bus 0 link: 0
1383 16:24:48.243356 Done setting resources.
1384 16:24:48.249780 Show resources in subtree (Root Device)...After assigning values.
1385 16:24:48.252874 Root Device child on link 0 DOMAIN: 0000
1386 16:24:48.259884 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 16:24:48.266632 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 16:24:48.276518 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 16:24:48.280045 PCI: 00:00.0
1390 16:24:48.289519 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 16:24:48.299766 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 16:24:48.309856 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 16:24:48.316160 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 16:24:48.326253 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 16:24:48.336123 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 16:24:48.345920 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 16:24:48.355984 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 16:24:48.363219 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 16:24:48.372534 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 16:24:48.382317 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 16:24:48.392980 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 16:24:48.402530 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 16:24:48.409465 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 16:24:48.418896 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 16:24:48.429117 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 16:24:48.439097 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 16:24:48.449097 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 16:24:48.458650 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 16:24:48.468854 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 16:24:48.468946 PCI: 00:02.0
1411 16:24:48.478876 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 16:24:48.491691 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 16:24:48.498526 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 16:24:48.505170 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 16:24:48.515142 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 16:24:48.515229 GENERIC: 0.0
1417 16:24:48.518755 PCI: 00:05.0
1418 16:24:48.528474 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 16:24:48.535180 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 16:24:48.535266 GENERIC: 0.0
1421 16:24:48.538414 PCI: 00:08.0
1422 16:24:48.548252 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 16:24:48.548338 PCI: 00:0a.0
1424 16:24:48.552075 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 16:24:48.565197 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 16:24:48.568212 USB0 port 0 child on link 0 USB3 port 0
1427 16:24:48.568298 USB3 port 0
1428 16:24:48.571697 USB3 port 1
1429 16:24:48.575014 USB3 port 2
1430 16:24:48.575099 USB3 port 3
1431 16:24:48.578282 PCI: 00:14.0 child on link 0 USB0 port 0
1432 16:24:48.591555 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 16:24:48.594714 USB0 port 0 child on link 0 USB2 port 0
1434 16:24:48.594800 USB2 port 0
1435 16:24:48.598571 USB2 port 1
1436 16:24:48.598656 USB2 port 2
1437 16:24:48.601429 USB2 port 3
1438 16:24:48.604701 USB2 port 4
1439 16:24:48.604786 USB2 port 5
1440 16:24:48.608356 USB2 port 6
1441 16:24:48.608441 USB2 port 7
1442 16:24:48.611380 USB2 port 8
1443 16:24:48.611465 USB2 port 9
1444 16:24:48.614642 USB3 port 0
1445 16:24:48.614727 USB3 port 1
1446 16:24:48.618270 USB3 port 2
1447 16:24:48.618359 USB3 port 3
1448 16:24:48.621510 PCI: 00:14.2
1449 16:24:48.631550 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 16:24:48.641255 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 16:24:48.644581 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 16:24:48.658504 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 16:24:48.658588 GENERIC: 0.0
1454 16:24:48.661292 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 16:24:48.671325 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 16:24:48.674699 I2C: 00:1a
1457 16:24:48.674793 I2C: 00:31
1458 16:24:48.678032 I2C: 00:32
1459 16:24:48.681256 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 16:24:48.691617 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 16:24:48.694257 I2C: 00:10
1462 16:24:48.694340 PCI: 00:15.2
1463 16:24:48.704371 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 16:24:48.708167 PCI: 00:15.3
1465 16:24:48.717517 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 16:24:48.717640 PCI: 00:16.0
1467 16:24:48.731238 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 16:24:48.731323 PCI: 00:19.0
1469 16:24:48.734381 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 16:24:48.748027 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 16:24:48.748111 I2C: 00:15
1472 16:24:48.750861 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 16:24:48.760783 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 16:24:48.774150 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 16:24:48.784201 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 16:24:48.784305 GENERIC: 0.0
1477 16:24:48.787488 PCI: 01:00.0
1478 16:24:48.797226 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 16:24:48.807021 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 16:24:48.817415 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 16:24:48.820676 PCI: 00:1e.0
1482 16:24:48.830321 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 16:24:48.833859 PCI: 00:1e.2 child on link 0 SPI: 00
1484 16:24:48.843857 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 16:24:48.846996 SPI: 00
1486 16:24:48.850810 PCI: 00:1e.3 child on link 0 SPI: 00
1487 16:24:48.860221 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 16:24:48.863505 SPI: 00
1489 16:24:48.866909 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 16:24:48.877073 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 16:24:48.877205 PNP: 0c09.0
1492 16:24:48.886752 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 16:24:48.890287 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 16:24:48.899901 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 16:24:48.909974 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 16:24:48.913244 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 16:24:48.916982 GENERIC: 0.0
1498 16:24:48.917066 GENERIC: 1.0
1499 16:24:48.919941 PCI: 00:1f.3
1500 16:24:48.930093 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 16:24:48.940180 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 16:24:48.940269 PCI: 00:1f.5
1503 16:24:48.953208 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 16:24:48.956832 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 16:24:48.956930 APIC: 00
1506 16:24:48.959867 APIC: 01
1507 16:24:48.959974 APIC: 03
1508 16:24:48.960043 APIC: 05
1509 16:24:48.963245 APIC: 06
1510 16:24:48.963346 APIC: 02
1511 16:24:48.963414 APIC: 04
1512 16:24:48.967038 APIC: 07
1513 16:24:48.969969 Done allocating resources.
1514 16:24:48.976684 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 16:24:48.979784 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 16:24:48.983127 Configure GPIOs for I2S audio on UP4.
1517 16:24:48.991354 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 16:24:48.994793 Enabling resources...
1519 16:24:48.997942 PCI: 00:00.0 subsystem <- 8086/9a12
1520 16:24:49.001232 PCI: 00:00.0 cmd <- 06
1521 16:24:49.004400 PCI: 00:02.0 subsystem <- 8086/9a40
1522 16:24:49.008035 PCI: 00:02.0 cmd <- 03
1523 16:24:49.011554 PCI: 00:04.0 subsystem <- 8086/9a03
1524 16:24:49.014577 PCI: 00:04.0 cmd <- 02
1525 16:24:49.017812 PCI: 00:05.0 subsystem <- 8086/9a19
1526 16:24:49.017897 PCI: 00:05.0 cmd <- 02
1527 16:24:49.024505 PCI: 00:08.0 subsystem <- 8086/9a11
1528 16:24:49.024591 PCI: 00:08.0 cmd <- 06
1529 16:24:49.027683 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 16:24:49.031066 PCI: 00:0d.0 cmd <- 02
1531 16:24:49.034594 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 16:24:49.037722 PCI: 00:14.0 cmd <- 02
1533 16:24:49.040756 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 16:24:49.044154 PCI: 00:14.2 cmd <- 02
1535 16:24:49.047744 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 16:24:49.050932 PCI: 00:14.3 cmd <- 02
1537 16:24:49.054159 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 16:24:49.057447 PCI: 00:15.0 cmd <- 02
1539 16:24:49.060727 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 16:24:49.063992 PCI: 00:15.1 cmd <- 02
1541 16:24:49.067727 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 16:24:49.067812 PCI: 00:15.2 cmd <- 02
1543 16:24:49.074230 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 16:24:49.074316 PCI: 00:15.3 cmd <- 02
1545 16:24:49.077713 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 16:24:49.080836 PCI: 00:16.0 cmd <- 02
1547 16:24:49.083912 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 16:24:49.087719 PCI: 00:19.1 cmd <- 02
1549 16:24:49.090888 PCI: 00:1d.0 bridge ctrl <- 0013
1550 16:24:49.093926 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 16:24:49.097589 PCI: 00:1d.0 cmd <- 06
1552 16:24:49.100752 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 16:24:49.104215 PCI: 00:1e.0 cmd <- 06
1554 16:24:49.107323 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 16:24:49.110727 PCI: 00:1e.2 cmd <- 06
1556 16:24:49.114170 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 16:24:49.117546 PCI: 00:1e.3 cmd <- 02
1558 16:24:49.120812 PCI: 00:1f.0 subsystem <- 8086/a087
1559 16:24:49.120978 PCI: 00:1f.0 cmd <- 407
1560 16:24:49.127464 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 16:24:49.127632 PCI: 00:1f.3 cmd <- 02
1562 16:24:49.130821 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 16:24:49.133900 PCI: 00:1f.5 cmd <- 406
1564 16:24:49.138756 PCI: 01:00.0 cmd <- 02
1565 16:24:49.143590 done.
1566 16:24:49.147085 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 16:24:49.150223 Initializing devices...
1568 16:24:49.153672 Root Device init
1569 16:24:49.156882 Chrome EC: Set SMI mask to 0x0000000000000000
1570 16:24:49.163896 Chrome EC: clear events_b mask to 0x0000000000000000
1571 16:24:49.170230 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 16:24:49.177053 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 16:24:49.180365 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 16:24:49.187153 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 16:24:49.193654 fw_config match found: DB_USB=USB3_ACTIVE
1576 16:24:49.196682 Configure Right Type-C port orientation for retimer
1577 16:24:49.200725 Root Device init finished in 44 msecs
1578 16:24:49.204616 PCI: 00:00.0 init
1579 16:24:49.207957 CPU TDP = 9 Watts
1580 16:24:49.208403 CPU PL1 = 9 Watts
1581 16:24:49.210617 CPU PL2 = 40 Watts
1582 16:24:49.214200 CPU PL4 = 83 Watts
1583 16:24:49.217521 PCI: 00:00.0 init finished in 8 msecs
1584 16:24:49.217986 PCI: 00:02.0 init
1585 16:24:49.220633 GMA: Found VBT in CBFS
1586 16:24:49.224087 GMA: Found valid VBT in CBFS
1587 16:24:49.230561 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 16:24:49.236951 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 16:24:49.240531 PCI: 00:02.0 init finished in 18 msecs
1590 16:24:49.243730 PCI: 00:05.0 init
1591 16:24:49.247034 PCI: 00:05.0 init finished in 0 msecs
1592 16:24:49.250281 PCI: 00:08.0 init
1593 16:24:49.253552 PCI: 00:08.0 init finished in 0 msecs
1594 16:24:49.256834 PCI: 00:14.0 init
1595 16:24:49.260151 PCI: 00:14.0 init finished in 0 msecs
1596 16:24:49.263518 PCI: 00:14.2 init
1597 16:24:49.267106 PCI: 00:14.2 init finished in 0 msecs
1598 16:24:49.270300 PCI: 00:15.0 init
1599 16:24:49.270518 I2C bus 0 version 0x3230302a
1600 16:24:49.276747 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 16:24:49.280327 PCI: 00:15.0 init finished in 6 msecs
1602 16:24:49.280547 PCI: 00:15.1 init
1603 16:24:49.283189 I2C bus 1 version 0x3230302a
1604 16:24:49.286933 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 16:24:49.293163 PCI: 00:15.1 init finished in 6 msecs
1606 16:24:49.293343 PCI: 00:15.2 init
1607 16:24:49.296592 I2C bus 2 version 0x3230302a
1608 16:24:49.299755 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 16:24:49.303379 PCI: 00:15.2 init finished in 6 msecs
1610 16:24:49.306393 PCI: 00:15.3 init
1611 16:24:49.309932 I2C bus 3 version 0x3230302a
1612 16:24:49.313117 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 16:24:49.316462 PCI: 00:15.3 init finished in 6 msecs
1614 16:24:49.319841 PCI: 00:16.0 init
1615 16:24:49.323264 PCI: 00:16.0 init finished in 0 msecs
1616 16:24:49.326424 PCI: 00:19.1 init
1617 16:24:49.329729 I2C bus 5 version 0x3230302a
1618 16:24:49.332776 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 16:24:49.336578 PCI: 00:19.1 init finished in 6 msecs
1620 16:24:49.340063 PCI: 00:1d.0 init
1621 16:24:49.340148 Initializing PCH PCIe bridge.
1622 16:24:49.346195 PCI: 00:1d.0 init finished in 3 msecs
1623 16:24:49.349455 PCI: 00:1f.0 init
1624 16:24:49.352724 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 16:24:49.356499 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 16:24:49.359973 IOAPIC: ID = 0x02
1627 16:24:49.363244 IOAPIC: Dumping registers
1628 16:24:49.363409 reg 0x0000: 0x02000000
1629 16:24:49.366432 reg 0x0001: 0x00770020
1630 16:24:49.369649 reg 0x0002: 0x00000000
1631 16:24:49.373139 PCI: 00:1f.0 init finished in 21 msecs
1632 16:24:49.376089 PCI: 00:1f.2 init
1633 16:24:49.379982 Disabling ACPI via APMC.
1634 16:24:49.380141 APMC done.
1635 16:24:49.383217 PCI: 00:1f.2 init finished in 5 msecs
1636 16:24:49.396539 PCI: 01:00.0 init
1637 16:24:49.399941 PCI: 01:00.0 init finished in 0 msecs
1638 16:24:49.403637 PNP: 0c09.0 init
1639 16:24:49.406774 Google Chrome EC uptime: 8.420 seconds
1640 16:24:49.413439 Google Chrome AP resets since EC boot: 1
1641 16:24:49.416193 Google Chrome most recent AP reset causes:
1642 16:24:49.419980 0.349: 32775 shutdown: entering G3
1643 16:24:49.426060 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 16:24:49.429877 PNP: 0c09.0 init finished in 22 msecs
1645 16:24:49.435170 Devices initialized
1646 16:24:49.438620 Show all devs... After init.
1647 16:24:49.442281 Root Device: enabled 1
1648 16:24:49.442457 DOMAIN: 0000: enabled 1
1649 16:24:49.445382 CPU_CLUSTER: 0: enabled 1
1650 16:24:49.448617 PCI: 00:00.0: enabled 1
1651 16:24:49.451986 PCI: 00:02.0: enabled 1
1652 16:24:49.452214 PCI: 00:04.0: enabled 1
1653 16:24:49.455416 PCI: 00:05.0: enabled 1
1654 16:24:49.458596 PCI: 00:06.0: enabled 0
1655 16:24:49.462159 PCI: 00:07.0: enabled 0
1656 16:24:49.462429 PCI: 00:07.1: enabled 0
1657 16:24:49.465468 PCI: 00:07.2: enabled 0
1658 16:24:49.468542 PCI: 00:07.3: enabled 0
1659 16:24:49.471913 PCI: 00:08.0: enabled 1
1660 16:24:49.472252 PCI: 00:09.0: enabled 0
1661 16:24:49.475367 PCI: 00:0a.0: enabled 0
1662 16:24:49.478632 PCI: 00:0d.0: enabled 1
1663 16:24:49.482005 PCI: 00:0d.1: enabled 0
1664 16:24:49.482419 PCI: 00:0d.2: enabled 0
1665 16:24:49.485526 PCI: 00:0d.3: enabled 0
1666 16:24:49.488484 PCI: 00:0e.0: enabled 0
1667 16:24:49.488926 PCI: 00:10.2: enabled 1
1668 16:24:49.492248 PCI: 00:10.6: enabled 0
1669 16:24:49.495461 PCI: 00:10.7: enabled 0
1670 16:24:49.498591 PCI: 00:12.0: enabled 0
1671 16:24:49.499031 PCI: 00:12.6: enabled 0
1672 16:24:49.502257 PCI: 00:13.0: enabled 0
1673 16:24:49.505363 PCI: 00:14.0: enabled 1
1674 16:24:49.508797 PCI: 00:14.1: enabled 0
1675 16:24:49.509334 PCI: 00:14.2: enabled 1
1676 16:24:49.511834 PCI: 00:14.3: enabled 1
1677 16:24:49.515151 PCI: 00:15.0: enabled 1
1678 16:24:49.519047 PCI: 00:15.1: enabled 1
1679 16:24:49.519488 PCI: 00:15.2: enabled 1
1680 16:24:49.521989 PCI: 00:15.3: enabled 1
1681 16:24:49.525307 PCI: 00:16.0: enabled 1
1682 16:24:49.525868 PCI: 00:16.1: enabled 0
1683 16:24:49.528334 PCI: 00:16.2: enabled 0
1684 16:24:49.531924 PCI: 00:16.3: enabled 0
1685 16:24:49.534975 PCI: 00:16.4: enabled 0
1686 16:24:49.535440 PCI: 00:16.5: enabled 0
1687 16:24:49.538463 PCI: 00:17.0: enabled 0
1688 16:24:49.541687 PCI: 00:19.0: enabled 0
1689 16:24:49.545239 PCI: 00:19.1: enabled 1
1690 16:24:49.545705 PCI: 00:19.2: enabled 0
1691 16:24:49.548450 PCI: 00:1c.0: enabled 1
1692 16:24:49.551714 PCI: 00:1c.1: enabled 0
1693 16:24:49.555025 PCI: 00:1c.2: enabled 0
1694 16:24:49.555457 PCI: 00:1c.3: enabled 0
1695 16:24:49.558597 PCI: 00:1c.4: enabled 0
1696 16:24:49.561754 PCI: 00:1c.5: enabled 0
1697 16:24:49.565510 PCI: 00:1c.6: enabled 1
1698 16:24:49.566101 PCI: 00:1c.7: enabled 0
1699 16:24:49.568330 PCI: 00:1d.0: enabled 1
1700 16:24:49.571610 PCI: 00:1d.1: enabled 0
1701 16:24:49.572050 PCI: 00:1d.2: enabled 1
1702 16:24:49.575068 PCI: 00:1d.3: enabled 0
1703 16:24:49.578663 PCI: 00:1e.0: enabled 1
1704 16:24:49.581441 PCI: 00:1e.1: enabled 0
1705 16:24:49.581910 PCI: 00:1e.2: enabled 1
1706 16:24:49.584952 PCI: 00:1e.3: enabled 1
1707 16:24:49.588464 PCI: 00:1f.0: enabled 1
1708 16:24:49.591606 PCI: 00:1f.1: enabled 0
1709 16:24:49.592040 PCI: 00:1f.2: enabled 1
1710 16:24:49.594785 PCI: 00:1f.3: enabled 1
1711 16:24:49.598426 PCI: 00:1f.4: enabled 0
1712 16:24:49.601548 PCI: 00:1f.5: enabled 1
1713 16:24:49.602007 PCI: 00:1f.6: enabled 0
1714 16:24:49.604990 PCI: 00:1f.7: enabled 0
1715 16:24:49.608630 APIC: 00: enabled 1
1716 16:24:49.609178 GENERIC: 0.0: enabled 1
1717 16:24:49.611553 GENERIC: 0.0: enabled 1
1718 16:24:49.614759 GENERIC: 1.0: enabled 1
1719 16:24:49.618107 GENERIC: 0.0: enabled 1
1720 16:24:49.618539 GENERIC: 1.0: enabled 1
1721 16:24:49.621273 USB0 port 0: enabled 1
1722 16:24:49.624828 GENERIC: 0.0: enabled 1
1723 16:24:49.625259 USB0 port 0: enabled 1
1724 16:24:49.628047 GENERIC: 0.0: enabled 1
1725 16:24:49.631421 I2C: 00:1a: enabled 1
1726 16:24:49.634600 I2C: 00:31: enabled 1
1727 16:24:49.635126 I2C: 00:32: enabled 1
1728 16:24:49.638072 I2C: 00:10: enabled 1
1729 16:24:49.641142 I2C: 00:15: enabled 1
1730 16:24:49.641603 GENERIC: 0.0: enabled 0
1731 16:24:49.644858 GENERIC: 1.0: enabled 0
1732 16:24:49.647976 GENERIC: 0.0: enabled 1
1733 16:24:49.648413 SPI: 00: enabled 1
1734 16:24:49.651477 SPI: 00: enabled 1
1735 16:24:49.654663 PNP: 0c09.0: enabled 1
1736 16:24:49.654973 GENERIC: 0.0: enabled 1
1737 16:24:49.657893 USB3 port 0: enabled 1
1738 16:24:49.660945 USB3 port 1: enabled 1
1739 16:24:49.664644 USB3 port 2: enabled 0
1740 16:24:49.664855 USB3 port 3: enabled 0
1741 16:24:49.667803 USB2 port 0: enabled 0
1742 16:24:49.671063 USB2 port 1: enabled 1
1743 16:24:49.671222 USB2 port 2: enabled 1
1744 16:24:49.674166 USB2 port 3: enabled 0
1745 16:24:49.678105 USB2 port 4: enabled 1
1746 16:24:49.678323 USB2 port 5: enabled 0
1747 16:24:49.681218 USB2 port 6: enabled 0
1748 16:24:49.684254 USB2 port 7: enabled 0
1749 16:24:49.688228 USB2 port 8: enabled 0
1750 16:24:49.688446 USB2 port 9: enabled 0
1751 16:24:49.691265 USB3 port 0: enabled 0
1752 16:24:49.694365 USB3 port 1: enabled 1
1753 16:24:49.694583 USB3 port 2: enabled 0
1754 16:24:49.697674 USB3 port 3: enabled 0
1755 16:24:49.700639 GENERIC: 0.0: enabled 1
1756 16:24:49.704197 GENERIC: 1.0: enabled 1
1757 16:24:49.704332 APIC: 01: enabled 1
1758 16:24:49.707461 APIC: 03: enabled 1
1759 16:24:49.707705 APIC: 05: enabled 1
1760 16:24:49.711057 APIC: 06: enabled 1
1761 16:24:49.714565 APIC: 02: enabled 1
1762 16:24:49.714904 APIC: 04: enabled 1
1763 16:24:49.717567 APIC: 07: enabled 1
1764 16:24:49.720934 PCI: 01:00.0: enabled 1
1765 16:24:49.724174 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1766 16:24:49.730914 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 16:24:49.734414 ELOG: NV offset 0xf30000 size 0x1000
1768 16:24:49.741064 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 16:24:49.747491 ELOG: Event(17) added with size 13 at 2022-08-03 16:18:36 UTC
1770 16:24:49.754481 ELOG: Event(92) added with size 9 at 2022-08-03 16:18:36 UTC
1771 16:24:49.760871 ELOG: Event(93) added with size 9 at 2022-08-03 16:18:36 UTC
1772 16:24:49.767312 ELOG: Event(9E) added with size 10 at 2022-08-03 16:18:36 UTC
1773 16:24:49.774728 ELOG: Event(9F) added with size 14 at 2022-08-03 16:18:36 UTC
1774 16:24:49.778080 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 16:24:49.784124 ELOG: Event(A1) added with size 10 at 2022-08-03 16:18:36 UTC
1776 16:24:49.794193 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1777 16:24:49.800965 ELOG: Event(A0) added with size 9 at 2022-08-03 16:18:36 UTC
1778 16:24:49.804100 elog_add_boot_reason: Logged dev mode boot
1779 16:24:49.811433 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1780 16:24:49.811976 Finalize devices...
1781 16:24:49.814354 Devices finalized
1782 16:24:49.818069 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 16:24:49.824608 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 16:24:49.831111 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 16:24:49.834506 ME: HFSTS1 : 0x80030055
1786 16:24:49.837870 ME: HFSTS2 : 0x30280116
1787 16:24:49.844072 ME: HFSTS3 : 0x00000050
1788 16:24:49.847839 ME: HFSTS4 : 0x00004000
1789 16:24:49.854918 ME: HFSTS5 : 0x00000000
1790 16:24:49.857548 ME: HFSTS6 : 0x00400006
1791 16:24:49.860808 ME: Manufacturing Mode : YES
1792 16:24:49.864115 ME: SPI Protection Mode Enabled : NO
1793 16:24:49.867193 ME: FW Partition Table : OK
1794 16:24:49.871037 ME: Bringup Loader Failure : NO
1795 16:24:49.873784 ME: Firmware Init Complete : NO
1796 16:24:49.880817 ME: Boot Options Present : NO
1797 16:24:49.884438 ME: Update In Progress : NO
1798 16:24:49.887289 ME: D0i3 Support : YES
1799 16:24:49.890530 ME: Low Power State Enabled : NO
1800 16:24:49.894373 ME: CPU Replaced : YES
1801 16:24:49.897498 ME: CPU Replacement Valid : YES
1802 16:24:49.900325 ME: Current Working State : 5
1803 16:24:49.903641 ME: Current Operation State : 1
1804 16:24:49.910468 ME: Current Operation Mode : 3
1805 16:24:49.914197 ME: Error Code : 0
1806 16:24:49.917351 ME: Enhanced Debug Mode : NO
1807 16:24:49.920939 ME: CPU Debug Disabled : YES
1808 16:24:49.924178 ME: TXT Support : NO
1809 16:24:49.931290 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 16:24:49.937111 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1811 16:24:49.940200 CBFS: 'fallback/slic' not found.
1812 16:24:49.943779 ACPI: Writing ACPI tables at 76b01000.
1813 16:24:49.947202 ACPI: * FACS
1814 16:24:49.947634 ACPI: * DSDT
1815 16:24:49.950242 Ramoops buffer: 0x100000@0x76a00000.
1816 16:24:49.957300 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1817 16:24:49.960570 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1818 16:24:49.964792 Google Chrome EC: version:
1819 16:24:49.967953 ro: voema_v2.0.7540-147f8d37d1
1820 16:24:49.971146 rw: voema_v2.0.7540-147f8d37d1
1821 16:24:49.974483 running image: 2
1822 16:24:49.981078 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1823 16:24:49.984633 ACPI: * FADT
1824 16:24:49.985069 SCI is IRQ9
1825 16:24:49.988064 ACPI: added table 1/32, length now 40
1826 16:24:49.991293 ACPI: * SSDT
1827 16:24:49.994005 Found 1 CPU(s) with 8 core(s) each.
1828 16:24:50.000575 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1829 16:24:50.004102 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1830 16:24:50.007325 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1831 16:24:50.011366 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1832 16:24:50.018339 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1833 16:24:50.024271 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1834 16:24:50.027410 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1835 16:24:50.034207 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1836 16:24:50.040550 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1837 16:24:50.043764 \_SB.PCI0.RP09: Added StorageD3Enable property
1838 16:24:50.047028 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1839 16:24:50.053702 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1840 16:24:50.060409 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1841 16:24:50.064000 PS2K: Passing 80 keymaps to kernel
1842 16:24:50.070368 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1843 16:24:50.077536 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1844 16:24:50.083258 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1845 16:24:50.090209 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1846 16:24:50.096695 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1847 16:24:50.103685 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1848 16:24:50.109837 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1849 16:24:50.116768 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1850 16:24:50.119464 ACPI: added table 2/32, length now 44
1851 16:24:50.119757 ACPI: * MCFG
1852 16:24:50.122980 ACPI: added table 3/32, length now 48
1853 16:24:50.126265 ACPI: * TPM2
1854 16:24:50.129528 TPM2 log created at 0x769f0000
1855 16:24:50.132960 ACPI: added table 4/32, length now 52
1856 16:24:50.136247 ACPI: * MADT
1857 16:24:50.136580 SCI is IRQ9
1858 16:24:50.139442 ACPI: added table 5/32, length now 56
1859 16:24:50.142619 current = 76b09850
1860 16:24:50.142851 ACPI: * DMAR
1861 16:24:50.146428 ACPI: added table 6/32, length now 60
1862 16:24:50.149199 ACPI: added table 7/32, length now 64
1863 16:24:50.152496 ACPI: * HPET
1864 16:24:50.156214 ACPI: added table 8/32, length now 68
1865 16:24:50.156587 ACPI: done.
1866 16:24:50.159734 ACPI tables: 35216 bytes.
1867 16:24:50.162721 smbios_write_tables: 769ef000
1868 16:24:50.166391 EC returned error result code 3
1869 16:24:50.168989 Couldn't obtain OEM name from CBI
1870 16:24:50.172567 Create SMBIOS type 16
1871 16:24:50.175961 Create SMBIOS type 17
1872 16:24:50.178928 GENERIC: 0.0 (WIFI Device)
1873 16:24:50.179365 SMBIOS tables: 1750 bytes.
1874 16:24:50.185823 Writing table forward entry at 0x00000500
1875 16:24:50.192704 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1876 16:24:50.196008 Writing coreboot table at 0x76b25000
1877 16:24:50.203125 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1878 16:24:50.205772 1. 0000000000001000-000000000009ffff: RAM
1879 16:24:50.208932 2. 00000000000a0000-00000000000fffff: RESERVED
1880 16:24:50.215437 3. 0000000000100000-00000000769eefff: RAM
1881 16:24:50.219087 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1882 16:24:50.225837 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1883 16:24:50.232319 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1884 16:24:50.235415 7. 0000000077000000-000000007fbfffff: RESERVED
1885 16:24:50.238839 8. 00000000c0000000-00000000cfffffff: RESERVED
1886 16:24:50.245229 9. 00000000f8000000-00000000f9ffffff: RESERVED
1887 16:24:50.248538 10. 00000000fb000000-00000000fb000fff: RESERVED
1888 16:24:50.255640 11. 00000000fe000000-00000000fe00ffff: RESERVED
1889 16:24:50.258914 12. 00000000fed80000-00000000fed87fff: RESERVED
1890 16:24:50.265548 13. 00000000fed90000-00000000fed92fff: RESERVED
1891 16:24:50.269006 14. 00000000feda0000-00000000feda1fff: RESERVED
1892 16:24:50.275268 15. 00000000fedc0000-00000000feddffff: RESERVED
1893 16:24:50.278786 16. 0000000100000000-00000002803fffff: RAM
1894 16:24:50.281984 Passing 4 GPIOs to payload:
1895 16:24:50.285687 NAME | PORT | POLARITY | VALUE
1896 16:24:50.292087 lid | undefined | high | high
1897 16:24:50.298671 power | undefined | high | low
1898 16:24:50.301769 oprom | undefined | high | low
1899 16:24:50.308338 EC in RW | 0x000000e5 | high | high
1900 16:24:50.315049 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7134
1901 16:24:50.315577 coreboot table: 1576 bytes.
1902 16:24:50.321808 IMD ROOT 0. 0x76fff000 0x00001000
1903 16:24:50.325398 IMD SMALL 1. 0x76ffe000 0x00001000
1904 16:24:50.328201 FSP MEMORY 2. 0x76c4e000 0x003b0000
1905 16:24:50.332004 VPD 3. 0x76c4d000 0x00000367
1906 16:24:50.335132 RO MCACHE 4. 0x76c4c000 0x00000fdc
1907 16:24:50.338332 CONSOLE 5. 0x76c2c000 0x00020000
1908 16:24:50.341786 FMAP 6. 0x76c2b000 0x00000578
1909 16:24:50.345163 TIME STAMP 7. 0x76c2a000 0x00000910
1910 16:24:50.351976 VBOOT WORK 8. 0x76c16000 0x00014000
1911 16:24:50.354687 ROMSTG STCK 9. 0x76c15000 0x00001000
1912 16:24:50.358343 AFTER CAR 10. 0x76c0a000 0x0000b000
1913 16:24:50.361535 RAMSTAGE 11. 0x76b97000 0x00073000
1914 16:24:50.365227 REFCODE 12. 0x76b42000 0x00055000
1915 16:24:50.368540 SMM BACKUP 13. 0x76b32000 0x00010000
1916 16:24:50.371554 4f444749 14. 0x76b30000 0x00002000
1917 16:24:50.374808 EXT VBT15. 0x76b2d000 0x0000219f
1918 16:24:50.377890 COREBOOT 16. 0x76b25000 0x00008000
1919 16:24:50.385280 ACPI 17. 0x76b01000 0x00024000
1920 16:24:50.388052 ACPI GNVS 18. 0x76b00000 0x00001000
1921 16:24:50.391495 RAMOOPS 19. 0x76a00000 0x00100000
1922 16:24:50.395034 TPM2 TCGLOG20. 0x769f0000 0x00010000
1923 16:24:50.397957 SMBIOS 21. 0x769ef000 0x00000800
1924 16:24:50.401087 IMD small region:
1925 16:24:50.404704 IMD ROOT 0. 0x76ffec00 0x00000400
1926 16:24:50.408329 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1927 16:24:50.411258 POWER STATE 2. 0x76ffeb80 0x00000044
1928 16:24:50.415022 ROMSTAGE 3. 0x76ffeb60 0x00000004
1929 16:24:50.421327 MEM INFO 4. 0x76ffe980 0x000001e0
1930 16:24:50.424371 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1931 16:24:50.427726 MTRR: Physical address space:
1932 16:24:50.434468 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1933 16:24:50.440830 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1934 16:24:50.447482 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1935 16:24:50.453947 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1936 16:24:50.460790 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1937 16:24:50.467745 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1938 16:24:50.470968 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1939 16:24:50.477675 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 16:24:50.481186 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 16:24:50.484371 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 16:24:50.487621 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 16:24:50.494070 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 16:24:50.497336 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 16:24:50.500969 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 16:24:50.504239 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 16:24:50.510874 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 16:24:50.514163 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 16:24:50.517530 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 16:24:50.520642 call enable_fixed_mtrr()
1951 16:24:50.523925 CPU physical address size: 39 bits
1952 16:24:50.530473 MTRR: default type WB/UC MTRR counts: 6/6.
1953 16:24:50.534173 MTRR: UC selected as default type.
1954 16:24:50.540509 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1955 16:24:50.543839 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 16:24:50.550537 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 16:24:50.557101 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 16:24:50.563667 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1959 16:24:50.570444 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1960 16:24:50.570983
1961 16:24:50.573399 MTRR check
1962 16:24:50.577088 Fixed MTRRs : Enabled
1963 16:24:50.577661 Variable MTRRs: Enabled
1964 16:24:50.578023
1965 16:24:50.583529 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 16:24:50.587005 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 16:24:50.590207 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 16:24:50.593807 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 16:24:50.600135 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 16:24:50.603377 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 16:24:50.606767 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 16:24:50.610523 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 16:24:50.613411 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 16:24:50.620029 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 16:24:50.622984 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 16:24:50.629663 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1977 16:24:50.633309 call enable_fixed_mtrr()
1978 16:24:50.636878 Checking cr50 for pending updates
1979 16:24:50.640053 CPU physical address size: 39 bits
1980 16:24:50.643466 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 16:24:50.647070 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 16:24:50.650007 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 16:24:50.656811 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 16:24:50.660548 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 16:24:50.663284 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 16:24:50.667051 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 16:24:50.673510 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 16:24:50.676772 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 16:24:50.679833 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 16:24:50.683394 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 16:24:50.690157 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 16:24:50.693665 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 16:24:50.696348 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 16:24:50.703179 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 16:24:50.706830 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 16:24:50.709979 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 16:24:50.713370 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 16:24:50.720049 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 16:24:50.723196 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 16:24:50.726349 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 16:24:50.729692 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 16:24:50.733502 call enable_fixed_mtrr()
2003 16:24:50.737083 call enable_fixed_mtrr()
2004 16:24:50.741998 Reading cr50 TPM mode
2005 16:24:50.742435 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 16:24:50.748348 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 16:24:50.752283 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 16:24:50.754936 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 16:24:50.758633 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 16:24:50.764948 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 16:24:50.768276 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 16:24:50.771935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 16:24:50.775021 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 16:24:50.778546 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 16:24:50.784840 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 16:24:50.788145 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 16:24:50.795115 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 16:24:50.795655 call enable_fixed_mtrr()
2019 16:24:50.801990 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 16:24:50.804815 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 16:24:50.807950 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 16:24:50.811721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 16:24:50.815064 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 16:24:50.821503 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 16:24:50.824721 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 16:24:50.828027 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 16:24:50.831468 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 16:24:50.836376 CPU physical address size: 39 bits
2029 16:24:50.842366 call enable_fixed_mtrr()
2030 16:24:50.845637 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 16:24:50.848974 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 16:24:50.852291 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 16:24:50.858827 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 16:24:50.862255 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 16:24:50.865722 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 16:24:50.869159 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 16:24:50.871980 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 16:24:50.878785 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 16:24:50.882136 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 16:24:50.885449 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 16:24:50.889002 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 16:24:50.896447 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 16:24:50.896960 call enable_fixed_mtrr()
2044 16:24:50.902732 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 16:24:50.905987 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 16:24:50.910217 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 16:24:50.913053 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 16:24:50.920271 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 16:24:50.922863 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 16:24:50.926087 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 16:24:50.929755 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 16:24:50.936285 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 16:24:50.939703 CPU physical address size: 39 bits
2054 16:24:50.942623 call enable_fixed_mtrr()
2055 16:24:50.945869 CPU physical address size: 39 bits
2056 16:24:50.949429 CPU physical address size: 39 bits
2057 16:24:50.953463 CPU physical address size: 39 bits
2058 16:24:50.959508 CPU physical address size: 39 bits
2059 16:24:50.963019 BS: BS_PAYLOAD_LOAD entry times (exec / console): 108 / 6 ms
2060 16:24:50.972627 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2061 16:24:50.976274 Checking segment from ROM address 0xffc02b38
2062 16:24:50.979746 Checking segment from ROM address 0xffc02b54
2063 16:24:50.986085 Loading segment from ROM address 0xffc02b38
2064 16:24:50.986634 code (compression=0)
2065 16:24:50.996214 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 16:24:51.005673 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 16:24:51.006231 it's not compressed!
2068 16:24:51.145661 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 16:24:51.152478 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 16:24:51.158884 Loading segment from ROM address 0xffc02b54
2071 16:24:51.159399 Entry Point 0x30000000
2072 16:24:51.162348 Loaded segments
2073 16:24:51.168630 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2074 16:24:51.211827 Finalizing chipset.
2075 16:24:51.215576 Finalizing SMM.
2076 16:24:51.216170 APMC done.
2077 16:24:51.221937 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2078 16:24:51.225200 mp_park_aps done after 0 msecs.
2079 16:24:51.228210 Jumping to boot code at 0x30000000(0x76b25000)
2080 16:24:51.238262 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 16:24:51.238706
2082 16:24:51.241486 Starting depthcharge on Voema...
2083 16:24:51.242740 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2084 16:24:51.243320 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2085 16:24:51.243768 Setting prompt string to ['volteer:']
2086 16:24:51.244176 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2087 16:24:51.251270 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 16:24:51.258360 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 16:24:51.264970 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 16:24:51.268044 Failed to find eMMC card reader
2091 16:24:51.268584 Wipe memory regions:
2092 16:24:51.275284 [0x00000000001000, 0x000000000a0000)
2093 16:24:51.278193 [0x00000000100000, 0x00000030000000)
2094 16:24:51.307245 [0x00000032662db0, 0x000000769ef000)
2095 16:24:51.346688 [0x00000100000000, 0x00000280400000)
2096 16:24:51.551456 ec_init: CrosEC protocol v3 supported (256, 256)
2097 16:24:51.557975 update_port_state: port C0 state: usb enable 1 mux conn 0
2098 16:24:51.568259 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2099 16:24:51.574574 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2100 16:24:51.577957 send_conn_disc_msg: pmc_send_cmd succeeded
2101 16:24:52.011665 R8152: Initializing
2102 16:24:52.014548 Version 6 (ocp_data = 5c30)
2103 16:24:52.018592 R8152: Done initializing
2104 16:24:52.021354 Adding net device
2105 16:24:52.327366 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 16:24:52.327919
2107 16:24:52.331786 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2109 16:24:52.433637 volteer: tftpboot 192.168.201.1 6962877/tftp-deploy-ne4askvk/kernel/bzImage 6962877/tftp-deploy-ne4askvk/kernel/cmdline 6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
2110 16:24:52.434300 Setting prompt string to 'Starting kernel'
2111 16:24:52.434719 Setting prompt string to ['Starting kernel']
2112 16:24:52.435103 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2113 16:24:52.435512 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2114 16:24:52.439184 tftpboot 192.168.201.1 6962877/tftp-deploy-ne4askvk/kernel/bzImoy-ne4askvk/kernel/cmdline 6962877/tftp-deploy-ne4askvk/ramdisk/ramdisk.cpio.gz
2115 16:24:52.439695 Waiting for link
2116 16:24:52.643860 done.
2117 16:24:52.644434 MAC: 00:24:32:30:78:74
2118 16:24:52.646767 Sending DHCP discover... done.
2119 16:24:52.650059 Waiting for reply... done.
2120 16:24:52.653678 Sending DHCP request... done.
2121 16:24:52.660704 Waiting for reply... done.
2122 16:24:52.661185 My ip is 192.168.201.10
2123 16:24:52.663735 The DHCP server ip is 192.168.201.1
2124 16:24:52.670634 TFTP server IP predefined by user: 192.168.201.1
2125 16:24:52.677409 Bootfile predefined by user: 6962877/tftp-deploy-ne4askvk/kernel/bzImage
2126 16:24:52.680514 Sending tftp read request... done.
2127 16:24:52.683735 Waiting for the transfer...
2128 16:24:53.398959 00000000 ################################################################
2129 16:24:54.117034 00080000 ################################################################
2130 16:24:54.824872 00100000 ################################################################
2131 16:24:55.547298 00180000 ################################################################
2132 16:24:56.267322 00200000 ################################################################
2133 16:24:56.979070 00280000 ################################################################
2134 16:24:57.612161 00300000 ################################################################
2135 16:24:58.310474 00380000 ################################################################
2136 16:24:59.030297 00400000 ################################################################
2137 16:24:59.754701 00480000 ################################################################
2138 16:25:00.469399 00500000 ################################################################
2139 16:25:01.190619 00580000 ################################################################
2140 16:25:01.909127 00600000 ################################################################ done.
2141 16:25:01.912352 The bootfile was 6815632 bytes long.
2142 16:25:01.915887 Sending tftp read request... done.
2143 16:25:01.919208 Waiting for the transfer...
2144 16:25:02.614458 00000000 ################################################################
2145 16:25:03.301290 00080000 ################################################################
2146 16:25:03.985926 00100000 ################################################################
2147 16:25:04.680748 00180000 ################################################################
2148 16:25:05.367967 00200000 ################################################################
2149 16:25:06.060501 00280000 ################################################################
2150 16:25:06.759634 00300000 ################################################################
2151 16:25:07.426243 00380000 ################################################################
2152 16:25:08.124223 00400000 ################################################################
2153 16:25:08.802782 00480000 ################################################################
2154 16:25:09.495320 00500000 ################################################################
2155 16:25:10.175004 00580000 ################################################################
2156 16:25:10.846605 00600000 ################################################################
2157 16:25:11.529340 00680000 ################################################################
2158 16:25:12.154967 00700000 ################################################################
2159 16:25:12.785889 00780000 ################################################################
2160 16:25:12.980343 00800000 #################### done.
2161 16:25:12.983514 Sending tftp read request... done.
2162 16:25:12.986841 Waiting for the transfer...
2163 16:25:12.986929 00000000 # done.
2164 16:25:12.996729 Command line loaded dynamically from TFTP file: 6962877/tftp-deploy-ne4askvk/kernel/cmdline
2165 16:25:13.009796 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2166 16:25:13.018446 Shutting down all USB controllers.
2167 16:25:13.018532 Removing current net device
2168 16:25:13.021566 Finalizing coreboot
2169 16:25:13.028252 Exiting depthcharge with code 4 at timestamp: 30437037
2170 16:25:13.028340
2171 16:25:13.028410 Starting kernel ...
2172 16:25:13.028473
2173 16:25:13.028535
2174 16:25:13.028830 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2175 16:25:13.028929 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2176 16:25:13.029006 Setting prompt string to ['Linux version [0-9]']
2177 16:25:13.029077 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2178 16:25:13.029146 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2180 16:29:34.029933 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2182 16:29:34.031094 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2184 16:29:34.031941 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 16:29:34.033419 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 16:29:34.034508 Cleaning after the job
2190 16:29:34.034592 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/ramdisk
2191 16:29:34.035278 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/kernel
2192 16:29:34.035792 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962877/tftp-deploy-ne4askvk/modules
2193 16:29:34.035984 start: 5.1 power-off (timeout 00:00:30) [common]
2194 16:29:34.036134 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2195 16:29:34.055294 >> Command sent successfully.
2196 16:29:34.057119 Returned 0 in 0 seconds
2197 16:29:34.158165 end: 5.1 power-off (duration 00:00:00) [common]
2199 16:29:34.159792 start: 5.2 read-feedback (timeout 00:10:00) [common]
2200 16:29:34.160977 Listened to connection for namespace 'common' for up to 1s
2201 16:29:35.163919 Finalising connection for namespace 'common'
2202 16:29:35.164682 Disconnecting from shell: Finalise
2203 16:29:35.266157 end: 5.2 read-feedback (duration 00:00:01) [common]
2204 16:29:35.266804 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6962877
2205 16:29:35.275737 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6962877
2206 16:29:35.275857 JobError: Your job cannot terminate cleanly.