Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 17:31:11.865913 lava-dispatcher, installed at version: 2022.06
2 17:31:11.866090 start: 0 validate
3 17:31:11.866222 Start time: 2022-08-03 17:31:11.866215+00:00 (UTC)
4 17:31:11.866358 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:31:11.866492 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 17:31:12.154485 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:31:12.154827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:31:12.436697 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:31:12.437389 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:31:12.731911 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:31:12.732078 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:31:13.022485 validate duration: 1.16
14 17:31:13.023498 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:31:13.023923 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:31:13.024311 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:31:13.024724 Not decompressing ramdisk as can be used compressed.
18 17:31:13.025085 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 17:31:13.025374 saving as /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/ramdisk/initrd.cpio.gz
20 17:31:13.025624 total size: 5411064 (5MB)
21 17:31:13.029688 progress 0% (0MB)
22 17:31:13.035412 progress 5% (0MB)
23 17:31:13.040692 progress 10% (0MB)
24 17:31:13.045949 progress 15% (0MB)
25 17:31:13.050442 progress 20% (1MB)
26 17:31:13.053778 progress 25% (1MB)
27 17:31:13.056708 progress 30% (1MB)
28 17:31:13.059200 progress 35% (1MB)
29 17:31:13.061899 progress 40% (2MB)
30 17:31:13.064070 progress 45% (2MB)
31 17:31:13.066172 progress 50% (2MB)
32 17:31:13.068060 progress 55% (2MB)
33 17:31:13.070106 progress 60% (3MB)
34 17:31:13.071915 progress 65% (3MB)
35 17:31:13.073562 progress 70% (3MB)
36 17:31:13.075217 progress 75% (3MB)
37 17:31:13.077039 progress 80% (4MB)
38 17:31:13.078511 progress 85% (4MB)
39 17:31:13.080003 progress 90% (4MB)
40 17:31:13.081525 progress 95% (4MB)
41 17:31:13.083057 progress 100% (5MB)
42 17:31:13.083238 5MB downloaded in 0.06s (89.56MB/s)
43 17:31:13.083395 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:31:13.083655 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:31:13.083748 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:31:13.083839 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:31:13.083948 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:31:13.084019 saving as /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/kernel/bzImage
50 17:31:13.084082 total size: 6815632 (6MB)
51 17:31:13.084145 No compression specified
52 17:31:13.085260 progress 0% (0MB)
53 17:31:13.087090 progress 5% (0MB)
54 17:31:13.088710 progress 10% (0MB)
55 17:31:13.090502 progress 15% (1MB)
56 17:31:13.092151 progress 20% (1MB)
57 17:31:13.093720 progress 25% (1MB)
58 17:31:13.095670 progress 30% (1MB)
59 17:31:13.097448 progress 35% (2MB)
60 17:31:13.099469 progress 40% (2MB)
61 17:31:13.101250 progress 45% (2MB)
62 17:31:13.103112 progress 50% (3MB)
63 17:31:13.105033 progress 55% (3MB)
64 17:31:13.106871 progress 60% (3MB)
65 17:31:13.108860 progress 65% (4MB)
66 17:31:13.110568 progress 70% (4MB)
67 17:31:13.112178 progress 75% (4MB)
68 17:31:13.113868 progress 80% (5MB)
69 17:31:13.115467 progress 85% (5MB)
70 17:31:13.117219 progress 90% (5MB)
71 17:31:13.118774 progress 95% (6MB)
72 17:31:13.120457 progress 100% (6MB)
73 17:31:13.120738 6MB downloaded in 0.04s (177.34MB/s)
74 17:31:13.120907 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:31:13.121147 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:31:13.121236 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:31:13.121325 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:31:13.121431 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 17:31:13.121498 saving as /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/nfsrootfs/full.rootfs.tar
81 17:31:13.121560 total size: 122624016 (116MB)
82 17:31:13.121622 Using unxz to decompress xz
83 17:31:13.124886 progress 0% (0MB)
84 17:31:13.555824 progress 5% (5MB)
85 17:31:14.002949 progress 10% (11MB)
86 17:31:14.457827 progress 15% (17MB)
87 17:31:14.917839 progress 20% (23MB)
88 17:31:15.231638 progress 25% (29MB)
89 17:31:15.567157 progress 30% (35MB)
90 17:31:15.804770 progress 35% (40MB)
91 17:31:16.008956 progress 40% (46MB)
92 17:31:16.349369 progress 45% (52MB)
93 17:31:16.702151 progress 50% (58MB)
94 17:31:17.032870 progress 55% (64MB)
95 17:31:17.379283 progress 60% (70MB)
96 17:31:17.708575 progress 65% (76MB)
97 17:31:18.081657 progress 70% (81MB)
98 17:31:18.485308 progress 75% (87MB)
99 17:31:18.889879 progress 80% (93MB)
100 17:31:19.000952 progress 85% (99MB)
101 17:31:19.162016 progress 90% (105MB)
102 17:31:19.484959 progress 95% (111MB)
103 17:31:19.845852 progress 100% (116MB)
104 17:31:19.850835 116MB downloaded in 6.73s (17.38MB/s)
105 17:31:19.851112 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:31:19.851422 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:31:19.851533 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:31:19.851632 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:31:19.851753 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:31:19.851827 saving as /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/modules/modules.tar
112 17:31:19.851890 total size: 51872 (0MB)
113 17:31:19.851954 Using unxz to decompress xz
114 17:31:19.854986 progress 63% (0MB)
115 17:31:19.855357 progress 100% (0MB)
116 17:31:19.858523 0MB downloaded in 0.01s (7.46MB/s)
117 17:31:19.858731 end: 1.4.1 http-download (duration 00:00:00) [common]
119 17:31:19.859010 end: 1.4 download-retry (duration 00:00:00) [common]
120 17:31:19.859108 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 17:31:19.859204 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 17:31:21.490701 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6962853/extract-nfsrootfs-cq4cj3yi
123 17:31:21.490911 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 17:31:21.491058 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 17:31:21.491196 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8
126 17:31:21.491303 makedir: /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin
127 17:31:21.491390 makedir: /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/tests
128 17:31:21.491472 makedir: /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/results
129 17:31:21.491570 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-add-keys
130 17:31:21.491698 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-add-sources
131 17:31:21.491814 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-background-process-start
132 17:31:21.491928 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-background-process-stop
133 17:31:21.492040 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-common-functions
134 17:31:21.492151 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-echo-ipv4
135 17:31:21.492261 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-install-packages
136 17:31:21.492369 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-installed-packages
137 17:31:21.492477 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-os-build
138 17:31:21.492586 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-probe-channel
139 17:31:21.492694 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-probe-ip
140 17:31:21.492802 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-target-ip
141 17:31:21.492910 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-target-mac
142 17:31:21.493017 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-target-storage
143 17:31:21.493128 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-case
144 17:31:21.493238 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-event
145 17:31:21.493346 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-feedback
146 17:31:21.493454 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-raise
147 17:31:21.493562 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-reference
148 17:31:21.493672 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-runner
149 17:31:21.493795 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-set
150 17:31:21.493915 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-test-shell
151 17:31:21.494035 Updating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-install-packages (oe)
152 17:31:21.494157 Updating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/bin/lava-installed-packages (oe)
153 17:31:21.494265 Creating /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/environment
154 17:31:21.494361 LAVA metadata
155 17:31:21.494433 - LAVA_JOB_ID=6962853
156 17:31:21.494500 - LAVA_DISPATCHER_IP=192.168.201.1
157 17:31:21.494600 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 17:31:21.494668 skipped lava-vland-overlay
159 17:31:21.494747 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 17:31:21.494830 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 17:31:21.494897 skipped lava-multinode-overlay
162 17:31:21.495007 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 17:31:21.495091 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 17:31:21.495163 Loading test definitions
165 17:31:21.495253 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 17:31:21.495328 Using /lava-6962853 at stage 0
167 17:31:21.495424 Fetching tests from https://github.com/kernelci/test-definitions
168 17:31:21.495506 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/0/tests/0_ltp-mm'
169 17:31:25.054687 Running '/usr/bin/git checkout kernelci.org
170 17:31:25.119790 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 17:31:25.120507 uuid=6962853_1.5.2.3.1 testdef=None
172 17:31:25.120676 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 17:31:25.120943 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 17:31:25.121716 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 17:31:25.121952 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 17:31:25.122900 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 17:31:25.123190 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 17:31:25.124095 runner path: /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/0/tests/0_ltp-mm test_uuid 6962853_1.5.2.3.1
182 17:31:25.124185 SKIPFILE='skipfile-lkft.yaml'
183 17:31:25.124252 SKIP_INSTALL='true'
184 17:31:25.124312 TST_CMDFILES='mm'
185 17:31:25.124446 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 17:31:25.124671 Creating lava-test-runner.conf files
188 17:31:25.124736 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6962853/lava-overlay-g3n0mhy8/lava-6962853/0 for stage 0
189 17:31:25.124819 - 0_ltp-mm
190 17:31:25.124915 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 17:31:25.125011 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 17:31:32.247204 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 17:31:32.247369 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
194 17:31:32.247466 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 17:31:32.247572 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 17:31:32.247688 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
197 17:31:32.348596 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 17:31:32.348942 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
199 17:31:32.349052 extracting modules file /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962853/extract-nfsrootfs-cq4cj3yi
200 17:31:32.353032 extracting modules file /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962853/extract-overlay-ramdisk-144xjh3x/ramdisk
201 17:31:32.356614 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 17:31:32.356717 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
203 17:31:32.356805 [common] Applying overlay to NFS
204 17:31:32.356878 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6962853/compress-overlay-8j4uerwa/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6962853/extract-nfsrootfs-cq4cj3yi
205 17:31:32.793342 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 17:31:32.793519 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
207 17:31:32.793615 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 17:31:32.793709 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
209 17:31:32.793790 Building ramdisk /var/lib/lava/dispatcher/tmp/6962853/extract-overlay-ramdisk-144xjh3x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6962853/extract-overlay-ramdisk-144xjh3x/ramdisk
210 17:31:32.827102 >> 24431 blocks
211 17:31:33.284338 rename /var/lib/lava/dispatcher/tmp/6962853/extract-overlay-ramdisk-144xjh3x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
212 17:31:33.284749 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 17:31:33.284868 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
214 17:31:33.284968 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
215 17:31:33.285065 No mkimage arch provided, not using FIT.
216 17:31:33.285154 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 17:31:33.285239 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 17:31:33.285334 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
219 17:31:33.285429 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
220 17:31:33.285506 No LXC device requested
221 17:31:33.285590 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 17:31:33.285678 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
223 17:31:33.285761 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 17:31:33.285833 Checking files for TFTP limit of 4294967296 bytes.
225 17:31:33.286242 end: 1 tftp-deploy (duration 00:00:20) [common]
226 17:31:33.286344 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 17:31:33.286440 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 17:31:33.286569 substitutions:
229 17:31:33.286638 - {DTB}: None
230 17:31:33.286701 - {INITRD}: 6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
231 17:31:33.286762 - {KERNEL}: 6962853/tftp-deploy-ksrn35rs/kernel/bzImage
232 17:31:33.286821 - {LAVA_MAC}: None
233 17:31:33.286879 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6962853/extract-nfsrootfs-cq4cj3yi
234 17:31:33.286979 - {NFS_SERVER_IP}: 192.168.201.1
235 17:31:33.287036 - {PRESEED_CONFIG}: None
236 17:31:33.287092 - {PRESEED_LOCAL}: None
237 17:31:33.287149 - {RAMDISK}: 6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
238 17:31:33.287205 - {ROOT_PART}: None
239 17:31:33.287260 - {ROOT}: None
240 17:31:33.287315 - {SERVER_IP}: 192.168.201.1
241 17:31:33.287370 - {TEE}: None
242 17:31:33.287425 Parsed boot commands:
243 17:31:33.287481 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 17:31:33.287629 Parsed boot commands: tftpboot 192.168.201.1 6962853/tftp-deploy-ksrn35rs/kernel/bzImage 6962853/tftp-deploy-ksrn35rs/kernel/cmdline 6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
245 17:31:33.287721 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 17:31:33.287808 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 17:31:33.287899 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 17:31:33.287989 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 17:31:33.288061 Not connected, no need to disconnect.
250 17:31:33.288139 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 17:31:33.288221 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 17:31:33.288289 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
253 17:31:33.290936 Setting prompt string to ['lava-test: # ']
254 17:31:33.291234 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 17:31:33.291342 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 17:31:33.291473 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 17:31:33.291565 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 17:31:33.291737 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
259 17:31:33.310959 >> Command sent successfully.
260 17:31:33.312743 Returned 0 in 0 seconds
261 17:31:33.413932 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 17:31:33.415327 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 17:31:33.415932 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 17:31:33.416339 Setting prompt string to 'Starting depthcharge on Helios...'
266 17:31:33.416655 Changing prompt to 'Starting depthcharge on Helios...'
267 17:31:33.416980 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 17:31:33.418120 [Enter `^Ec?' for help]
269 17:31:40.405527
270 17:31:40.406217
271 17:31:40.415333 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 17:31:40.418407 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 17:31:40.425135 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 17:31:40.428259 CPU: AES supported, TXT NOT supported, VT supported
275 17:31:40.434724 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 17:31:40.441242 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 17:31:40.444531 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 17:31:40.447683 VBOOT: Loading verstage.
279 17:31:40.454246 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 17:31:40.457300 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 17:31:40.464018 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 17:31:40.464110 CBFS @ c08000 size 3f8000
283 17:31:40.470603 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 17:31:40.474062 CBFS: Locating 'fallback/verstage'
285 17:31:40.477439 CBFS: Found @ offset 10fb80 size 1072c
286 17:31:40.481823
287 17:31:40.482026
288 17:31:40.491453 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 17:31:40.506289 Probing TPM: . done!
290 17:31:40.509350 TPM ready after 0 ms
291 17:31:40.512528 Connected to device vid:did:rid of 1ae0:0028:00
292 17:31:40.523450 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 17:31:40.526756 Initialized TPM device CR50 revision 0
294 17:31:40.571235 tlcl_send_startup: Startup return code is 0
295 17:31:40.571813 TPM: setup succeeded
296 17:31:40.583721 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 17:31:40.587663 Chrome EC: UHEPI supported
298 17:31:40.590641 Phase 1
299 17:31:40.594003 FMAP: area GBB found @ c05000 (12288 bytes)
300 17:31:40.600837 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 17:31:40.603880 Phase 2
302 17:31:40.604374 Phase 3
303 17:31:40.606989 FMAP: area GBB found @ c05000 (12288 bytes)
304 17:31:40.613989 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 17:31:40.620516 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 17:31:40.623879 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 17:31:40.630151 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 17:31:40.646576 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 17:31:40.649907 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 17:31:40.656314 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 17:31:40.660361 Phase 4
312 17:31:40.663754 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 17:31:40.673199 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 17:31:40.849855 VB2:vb2_rsa_verify_digest() Digest check failed!
315 17:31:40.856620 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 17:31:40.857200 Saving nvdata
317 17:31:40.859582 Reboot requested (10020007)
318 17:31:40.862880 board_reset() called!
319 17:31:40.863509 full_reset() called!
320 17:31:45.371681
321 17:31:45.372258
322 17:31:45.381684 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 17:31:45.384763 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 17:31:45.391344 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 17:31:45.394259 CPU: AES supported, TXT NOT supported, VT supported
326 17:31:45.401487 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 17:31:45.407614 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 17:31:45.410928 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 17:31:45.414250 VBOOT: Loading verstage.
330 17:31:45.420928 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 17:31:45.424207 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 17:31:45.430698 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 17:31:45.431343 CBFS @ c08000 size 3f8000
334 17:31:45.437189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 17:31:45.440624 CBFS: Locating 'fallback/verstage'
336 17:31:45.447216 CBFS: Found @ offset 10fb80 size 1072c
337 17:31:45.447794
338 17:31:45.448187
339 17:31:45.456704 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 17:31:45.472869 Probing TPM: . done!
341 17:31:45.476189 TPM ready after 0 ms
342 17:31:45.479542 Connected to device vid:did:rid of 1ae0:0028:00
343 17:31:45.489443 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 17:31:45.493119 Initialized TPM device CR50 revision 0
345 17:31:45.537794 tlcl_send_startup: Startup return code is 0
346 17:31:45.538462 TPM: setup succeeded
347 17:31:45.550040 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 17:31:45.553950 Chrome EC: UHEPI supported
349 17:31:45.557406 Phase 1
350 17:31:45.560572 FMAP: area GBB found @ c05000 (12288 bytes)
351 17:31:45.567014 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 17:31:45.573769 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 17:31:45.576828 Recovery requested (1009000e)
354 17:31:45.582922 Saving nvdata
355 17:31:45.588904 tlcl_extend: response is 0
356 17:31:45.597722 tlcl_extend: response is 0
357 17:31:45.604532 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 17:31:45.607956 CBFS @ c08000 size 3f8000
359 17:31:45.614621 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 17:31:45.617980 CBFS: Locating 'fallback/romstage'
361 17:31:45.621101 CBFS: Found @ offset 80 size 145fc
362 17:31:45.624343 Accumulated console time in verstage 99 ms
363 17:31:45.624782
364 17:31:45.627596
365 17:31:45.637651 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 17:31:45.644394 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 17:31:45.647697 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 17:31:45.651260 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 17:31:45.657416 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 17:31:45.661067 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 17:31:45.664242 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 17:31:45.667484 TCO_STS: 0000 0000
373 17:31:45.670927 GEN_PMCON: e0015238 00000200
374 17:31:45.673971 GBLRST_CAUSE: 00000000 00000000
375 17:31:45.674561 prev_sleep_state 5
376 17:31:45.677954 Boot Count incremented to 27772
377 17:31:45.684358 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 17:31:45.687789 CBFS @ c08000 size 3f8000
379 17:31:45.694487 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 17:31:45.695028 CBFS: Locating 'fspm.bin'
381 17:31:45.700786 CBFS: Found @ offset 5ffc0 size 71000
382 17:31:45.704043 Chrome EC: UHEPI supported
383 17:31:45.710916 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 17:31:45.714559 Probing TPM: done!
385 17:31:45.721075 Connected to device vid:did:rid of 1ae0:0028:00
386 17:31:45.730867 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 17:31:45.737877 Initialized TPM device CR50 revision 0
388 17:31:45.747554 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 17:31:45.753969 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 17:31:45.757023 MRC cache found, size 1948
391 17:31:45.760574 bootmode is set to: 2
392 17:31:45.763592 PRMRR disabled by config.
393 17:31:45.767121 SPD INDEX = 1
394 17:31:45.770461 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 17:31:45.773537 CBFS @ c08000 size 3f8000
396 17:31:45.780509 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 17:31:45.781105 CBFS: Locating 'spd.bin'
398 17:31:45.783404 CBFS: Found @ offset 5fb80 size 400
399 17:31:45.786942 SPD: module type is LPDDR3
400 17:31:45.790130 SPD: module part is
401 17:31:45.796881 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 17:31:45.799980 SPD: device width 4 bits, bus width 8 bits
403 17:31:45.803256 SPD: module size is 4096 MB (per channel)
404 17:31:45.806577 memory slot: 0 configuration done.
405 17:31:45.809773 memory slot: 2 configuration done.
406 17:31:45.861819 CBMEM:
407 17:31:45.864813 IMD: root @ 99fff000 254 entries.
408 17:31:45.868411 IMD: root @ 99ffec00 62 entries.
409 17:31:45.871578 External stage cache:
410 17:31:45.875067 IMD: root @ 9abff000 254 entries.
411 17:31:45.878256 IMD: root @ 9abfec00 62 entries.
412 17:31:45.884706 Chrome EC: clear events_b mask to 0x0000000020004000
413 17:31:45.898466 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 17:31:45.914078 tlcl_write: response is 0
415 17:31:45.923117 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 17:31:45.930100 MRC: TPM MRC hash updated successfully.
417 17:31:45.930701 2 DIMMs found
418 17:31:45.933120 SMM Memory Map
419 17:31:45.936606 SMRAM : 0x9a000000 0x1000000
420 17:31:45.940038 Subregion 0: 0x9a000000 0xa00000
421 17:31:45.943177 Subregion 1: 0x9aa00000 0x200000
422 17:31:45.945826 Subregion 2: 0x9ac00000 0x400000
423 17:31:45.949022 top_of_ram = 0x9a000000
424 17:31:45.952628 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 17:31:45.958927 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 17:31:45.962354 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 17:31:45.968872 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 17:31:45.972483 CBFS @ c08000 size 3f8000
429 17:31:45.975804 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 17:31:45.979102 CBFS: Locating 'fallback/postcar'
431 17:31:45.985500 CBFS: Found @ offset 107000 size 4b44
432 17:31:45.992321 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 17:31:46.002322 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 17:31:46.005476 Processing 180 relocs. Offset value of 0x97c0c000
435 17:31:46.014484 Accumulated console time in romstage 286 ms
436 17:31:46.015117
437 17:31:46.015516
438 17:31:46.024245 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 17:31:46.030993 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 17:31:46.034326 CBFS @ c08000 size 3f8000
441 17:31:46.037587 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 17:31:46.044082 CBFS: Locating 'fallback/ramstage'
443 17:31:46.047353 CBFS: Found @ offset 43380 size 1b9e8
444 17:31:46.053782 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 17:31:46.086052 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 17:31:46.089235 Processing 3976 relocs. Offset value of 0x98db0000
447 17:31:46.095905 Accumulated console time in postcar 52 ms
448 17:31:46.096404
449 17:31:46.096887
450 17:31:46.105647 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 17:31:46.112299 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 17:31:46.115672 WARNING: RO_VPD is uninitialized or empty.
453 17:31:46.119050 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 17:31:46.125409 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 17:31:46.125987 Normal boot.
456 17:31:46.132226 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 17:31:46.135826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 17:31:46.139055 CBFS @ c08000 size 3f8000
459 17:31:46.145436 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 17:31:46.148604 CBFS: Locating 'cpu_microcode_blob.bin'
461 17:31:46.151802 CBFS: Found @ offset 14700 size 2ec00
462 17:31:46.155086 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 17:31:46.158626 Skip microcode update
464 17:31:46.165173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 17:31:46.165759 CBFS @ c08000 size 3f8000
466 17:31:46.171461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 17:31:46.175121 CBFS: Locating 'fsps.bin'
468 17:31:46.177953 CBFS: Found @ offset d1fc0 size 35000
469 17:31:46.204379 Detected 4 core, 8 thread CPU.
470 17:31:46.207453 Setting up SMI for CPU
471 17:31:46.210659 IED base = 0x9ac00000
472 17:31:46.211177 IED size = 0x00400000
473 17:31:46.214052 Will perform SMM setup.
474 17:31:46.220541 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 17:31:46.227502 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 17:31:46.230975 Processing 16 relocs. Offset value of 0x00030000
477 17:31:46.234535 Attempting to start 7 APs
478 17:31:46.237997 Waiting for 10ms after sending INIT.
479 17:31:46.254167 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
480 17:31:46.254757 done.
481 17:31:46.257373 AP: slot 2 apic_id 6.
482 17:31:46.260430 AP: slot 5 apic_id 7.
483 17:31:46.263937 Waiting for 2nd SIPI to complete...done.
484 17:31:46.267121 AP: slot 4 apic_id 3.
485 17:31:46.267704 AP: slot 1 apic_id 2.
486 17:31:46.270259 AP: slot 7 apic_id 5.
487 17:31:46.273776 AP: slot 6 apic_id 4.
488 17:31:46.280440 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 17:31:46.286747 Processing 13 relocs. Offset value of 0x00038000
490 17:31:46.293321 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 17:31:46.296751 Installing SMM handler to 0x9a000000
492 17:31:46.303359 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 17:31:46.309980 Processing 658 relocs. Offset value of 0x9a010000
494 17:31:46.316692 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 17:31:46.320056 Processing 13 relocs. Offset value of 0x9a008000
496 17:31:46.326241 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 17:31:46.332864 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 17:31:46.339581 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 17:31:46.342847 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 17:31:46.349638 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 17:31:46.356087 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 17:31:46.362865 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 17:31:46.369089 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 17:31:46.372492 Clearing SMI status registers
505 17:31:46.373072 SMI_STS: PM1
506 17:31:46.375840 PM1_STS: PWRBTN
507 17:31:46.376425 TCO_STS: SECOND_TO
508 17:31:46.378827 New SMBASE 0x9a000000
509 17:31:46.381995 In relocation handler: CPU 0
510 17:31:46.385455 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 17:31:46.392114 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 17:31:46.392691 Relocation complete.
513 17:31:46.395049 New SMBASE 0x99fff400
514 17:31:46.398388 In relocation handler: CPU 3
515 17:31:46.401674 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
516 17:31:46.408376 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 17:31:46.408934 Relocation complete.
518 17:31:46.411601 New SMBASE 0x99fff000
519 17:31:46.414882 In relocation handler: CPU 4
520 17:31:46.418089 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
521 17:31:46.424865 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 17:31:46.425355 Relocation complete.
523 17:31:46.427902 New SMBASE 0x99fffc00
524 17:31:46.431591 In relocation handler: CPU 1
525 17:31:46.434837 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
526 17:31:46.441462 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 17:31:46.442044 Relocation complete.
528 17:31:46.444537 New SMBASE 0x99fff800
529 17:31:46.447710 In relocation handler: CPU 2
530 17:31:46.451114 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
531 17:31:46.458003 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 17:31:46.458587 Relocation complete.
533 17:31:46.461145 New SMBASE 0x99ffec00
534 17:31:46.464217 In relocation handler: CPU 5
535 17:31:46.467795 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
536 17:31:46.474164 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 17:31:46.474652 Relocation complete.
538 17:31:46.477639 New SMBASE 0x99ffe800
539 17:31:46.481051 In relocation handler: CPU 6
540 17:31:46.483862 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
541 17:31:46.490514 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 17:31:46.491122 Relocation complete.
543 17:31:46.493924 New SMBASE 0x99ffe400
544 17:31:46.497113 In relocation handler: CPU 7
545 17:31:46.500246 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 17:31:46.506961 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 17:31:46.507452 Relocation complete.
548 17:31:46.510130 Initializing CPU #0
549 17:31:46.513966 CPU: vendor Intel device 806ec
550 17:31:46.516866 CPU: family 06, model 8e, stepping 0c
551 17:31:46.519898 Clearing out pending MCEs
552 17:31:46.523425 Setting up local APIC...
553 17:31:46.524005 apic_id: 0x00 done.
554 17:31:46.526608 Turbo is available but hidden
555 17:31:46.530283 Turbo is available and visible
556 17:31:46.533322 VMX status: enabled
557 17:31:46.536350 IA32_FEATURE_CONTROL status: locked
558 17:31:46.539849 Skip microcode update
559 17:31:46.540331 CPU #0 initialized
560 17:31:46.543257 Initializing CPU #3
561 17:31:46.543843 Initializing CPU #7
562 17:31:46.546274 Initializing CPU #6
563 17:31:46.549825 CPU: vendor Intel device 806ec
564 17:31:46.553082 CPU: family 06, model 8e, stepping 0c
565 17:31:46.556125 Initializing CPU #5
566 17:31:46.559604 CPU: vendor Intel device 806ec
567 17:31:46.562804 CPU: family 06, model 8e, stepping 0c
568 17:31:46.566478 Clearing out pending MCEs
569 17:31:46.569009 CPU: vendor Intel device 806ec
570 17:31:46.572569 CPU: family 06, model 8e, stepping 0c
571 17:31:46.575987 Clearing out pending MCEs
572 17:31:46.576468 Clearing out pending MCEs
573 17:31:46.579535 Setting up local APIC...
574 17:31:46.582242 Setting up local APIC...
575 17:31:46.586106 apic_id: 0x05 done.
576 17:31:46.586705 Initializing CPU #4
577 17:31:46.588869 Initializing CPU #1
578 17:31:46.592376 CPU: vendor Intel device 806ec
579 17:31:46.595618 CPU: family 06, model 8e, stepping 0c
580 17:31:46.598936 CPU: vendor Intel device 806ec
581 17:31:46.602379 CPU: family 06, model 8e, stepping 0c
582 17:31:46.605773 Clearing out pending MCEs
583 17:31:46.608964 Clearing out pending MCEs
584 17:31:46.609542 Setting up local APIC...
585 17:31:46.612017 Setting up local APIC...
586 17:31:46.615371 CPU: vendor Intel device 806ec
587 17:31:46.618640 CPU: family 06, model 8e, stepping 0c
588 17:31:46.621976 Initializing CPU #2
589 17:31:46.625774 Clearing out pending MCEs
590 17:31:46.628540 CPU: vendor Intel device 806ec
591 17:31:46.632095 CPU: family 06, model 8e, stepping 0c
592 17:31:46.635425 Setting up local APIC...
593 17:31:46.636002 apic_id: 0x01 done.
594 17:31:46.638813 Setting up local APIC...
595 17:31:46.641862 VMX status: enabled
596 17:31:46.642341 apic_id: 0x03 done.
597 17:31:46.645193 apic_id: 0x02 done.
598 17:31:46.648461 VMX status: enabled
599 17:31:46.649088 VMX status: enabled
600 17:31:46.651642 IA32_FEATURE_CONTROL status: locked
601 17:31:46.655044 IA32_FEATURE_CONTROL status: locked
602 17:31:46.658227 Skip microcode update
603 17:31:46.661464 Skip microcode update
604 17:31:46.661959 CPU #4 initialized
605 17:31:46.665127 CPU #1 initialized
606 17:31:46.667996 apic_id: 0x04 done.
607 17:31:46.668480 VMX status: enabled
608 17:31:46.671350 VMX status: enabled
609 17:31:46.674648 IA32_FEATURE_CONTROL status: locked
610 17:31:46.678158 IA32_FEATURE_CONTROL status: locked
611 17:31:46.681434 Skip microcode update
612 17:31:46.682143 Skip microcode update
613 17:31:46.684594 CPU #7 initialized
614 17:31:46.687751 CPU #6 initialized
615 17:31:46.688260 Clearing out pending MCEs
616 17:31:46.691490 apic_id: 0x07 done.
617 17:31:46.694425 Setting up local APIC...
618 17:31:46.697634 IA32_FEATURE_CONTROL status: locked
619 17:31:46.700823 apic_id: 0x06 done.
620 17:31:46.701309 VMX status: enabled
621 17:31:46.704101 VMX status: enabled
622 17:31:46.707691 IA32_FEATURE_CONTROL status: locked
623 17:31:46.710805 IA32_FEATURE_CONTROL status: locked
624 17:31:46.714160 Skip microcode update
625 17:31:46.714644 Skip microcode update
626 17:31:46.717494 CPU #5 initialized
627 17:31:46.720756 CPU #2 initialized
628 17:31:46.721248 Skip microcode update
629 17:31:46.723746 CPU #3 initialized
630 17:31:46.727405 bsp_do_flight_plan done after 462 msecs.
631 17:31:46.730627 CPU: frequency set to 4200 MHz
632 17:31:46.733818 Enabling SMIs.
633 17:31:46.734394 Locking SMM.
634 17:31:46.748721 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 17:31:46.751839 CBFS @ c08000 size 3f8000
636 17:31:46.758317 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 17:31:46.758958 CBFS: Locating 'vbt.bin'
638 17:31:46.764949 CBFS: Found @ offset 5f5c0 size 499
639 17:31:46.768147 Found a VBT of 4608 bytes after decompression
640 17:31:46.951871 Display FSP Version Info HOB
641 17:31:46.955072 Reference Code - CPU = 9.0.1e.30
642 17:31:46.958085 uCode Version = 0.0.0.ca
643 17:31:46.960976 TXT ACM version = ff.ff.ff.ffff
644 17:31:46.964693 Display FSP Version Info HOB
645 17:31:46.967815 Reference Code - ME = 9.0.1e.30
646 17:31:46.970972 MEBx version = 0.0.0.0
647 17:31:46.974036 ME Firmware Version = Consumer SKU
648 17:31:46.977480 Display FSP Version Info HOB
649 17:31:46.980706 Reference Code - CML PCH = 9.0.1e.30
650 17:31:46.983856 PCH-CRID Status = Disabled
651 17:31:46.987390 PCH-CRID Original Value = ff.ff.ff.ffff
652 17:31:46.991022 PCH-CRID New Value = ff.ff.ff.ffff
653 17:31:46.994162 OPROM - RST - RAID = ff.ff.ff.ffff
654 17:31:46.996922 ChipsetInit Base Version = ff.ff.ff.ffff
655 17:31:47.000203 ChipsetInit Oem Version = ff.ff.ff.ffff
656 17:31:47.003510 Display FSP Version Info HOB
657 17:31:47.010293 Reference Code - SA - System Agent = 9.0.1e.30
658 17:31:47.013274 Reference Code - MRC = 0.7.1.6c
659 17:31:47.016811 SA - PCIe Version = 9.0.1e.30
660 17:31:47.019870 SA-CRID Status = Disabled
661 17:31:47.023132 SA-CRID Original Value = 0.0.0.c
662 17:31:47.023612 SA-CRID New Value = 0.0.0.c
663 17:31:47.026875 OPROM - VBIOS = ff.ff.ff.ffff
664 17:31:47.029819 RTC Init
665 17:31:47.033525 Set power on after power failure.
666 17:31:47.034176 Disabling Deep S3
667 17:31:47.036545 Disabling Deep S3
668 17:31:47.040124 Disabling Deep S4
669 17:31:47.040706 Disabling Deep S4
670 17:31:47.042957 Disabling Deep S5
671 17:31:47.043437 Disabling Deep S5
672 17:31:47.049870 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
673 17:31:47.052842 Enumerating buses...
674 17:31:47.056199 Show all devs... Before device enumeration.
675 17:31:47.059235 Root Device: enabled 1
676 17:31:47.062547 CPU_CLUSTER: 0: enabled 1
677 17:31:47.063074 DOMAIN: 0000: enabled 1
678 17:31:47.066276 APIC: 00: enabled 1
679 17:31:47.069069 PCI: 00:00.0: enabled 1
680 17:31:47.069553 PCI: 00:02.0: enabled 1
681 17:31:47.072786 PCI: 00:04.0: enabled 0
682 17:31:47.075607 PCI: 00:05.0: enabled 0
683 17:31:47.079063 PCI: 00:12.0: enabled 1
684 17:31:47.079609 PCI: 00:12.5: enabled 0
685 17:31:47.082326 PCI: 00:12.6: enabled 0
686 17:31:47.085883 PCI: 00:14.0: enabled 1
687 17:31:47.088875 PCI: 00:14.1: enabled 0
688 17:31:47.089391 PCI: 00:14.3: enabled 1
689 17:31:47.092017 PCI: 00:14.5: enabled 0
690 17:31:47.095529 PCI: 00:15.0: enabled 1
691 17:31:47.098711 PCI: 00:15.1: enabled 1
692 17:31:47.099261 PCI: 00:15.2: enabled 0
693 17:31:47.101803 PCI: 00:15.3: enabled 0
694 17:31:47.105353 PCI: 00:16.0: enabled 1
695 17:31:47.108902 PCI: 00:16.1: enabled 0
696 17:31:47.109493 PCI: 00:16.2: enabled 0
697 17:31:47.111956 PCI: 00:16.3: enabled 0
698 17:31:47.114982 PCI: 00:16.4: enabled 0
699 17:31:47.118382 PCI: 00:16.5: enabled 0
700 17:31:47.118879 PCI: 00:17.0: enabled 1
701 17:31:47.121390 PCI: 00:19.0: enabled 1
702 17:31:47.124848 PCI: 00:19.1: enabled 0
703 17:31:47.128169 PCI: 00:19.2: enabled 0
704 17:31:47.128655 PCI: 00:1a.0: enabled 0
705 17:31:47.131473 PCI: 00:1c.0: enabled 0
706 17:31:47.134863 PCI: 00:1c.1: enabled 0
707 17:31:47.138105 PCI: 00:1c.2: enabled 0
708 17:31:47.138687 PCI: 00:1c.3: enabled 0
709 17:31:47.141172 PCI: 00:1c.4: enabled 0
710 17:31:47.144382 PCI: 00:1c.5: enabled 0
711 17:31:47.148069 PCI: 00:1c.6: enabled 0
712 17:31:47.148651 PCI: 00:1c.7: enabled 0
713 17:31:47.151251 PCI: 00:1d.0: enabled 1
714 17:31:47.154069 PCI: 00:1d.1: enabled 0
715 17:31:47.157800 PCI: 00:1d.2: enabled 0
716 17:31:47.158380 PCI: 00:1d.3: enabled 0
717 17:31:47.160640 PCI: 00:1d.4: enabled 0
718 17:31:47.163956 PCI: 00:1d.5: enabled 1
719 17:31:47.167326 PCI: 00:1e.0: enabled 1
720 17:31:47.167809 PCI: 00:1e.1: enabled 0
721 17:31:47.170648 PCI: 00:1e.2: enabled 1
722 17:31:47.173804 PCI: 00:1e.3: enabled 1
723 17:31:47.177146 PCI: 00:1f.0: enabled 1
724 17:31:47.177633 PCI: 00:1f.1: enabled 1
725 17:31:47.180283 PCI: 00:1f.2: enabled 1
726 17:31:47.183832 PCI: 00:1f.3: enabled 1
727 17:31:47.184430 PCI: 00:1f.4: enabled 1
728 17:31:47.187002 PCI: 00:1f.5: enabled 1
729 17:31:47.190123 PCI: 00:1f.6: enabled 0
730 17:31:47.193263 USB0 port 0: enabled 1
731 17:31:47.193749 I2C: 00:15: enabled 1
732 17:31:47.196666 I2C: 00:5d: enabled 1
733 17:31:47.199980 GENERIC: 0.0: enabled 1
734 17:31:47.203237 I2C: 00:1a: enabled 1
735 17:31:47.203717 I2C: 00:38: enabled 1
736 17:31:47.206461 I2C: 00:39: enabled 1
737 17:31:47.209900 I2C: 00:3a: enabled 1
738 17:31:47.210488 I2C: 00:3b: enabled 1
739 17:31:47.213324 PCI: 00:00.0: enabled 1
740 17:31:47.216682 SPI: 00: enabled 1
741 17:31:47.217270 SPI: 01: enabled 1
742 17:31:47.219589 PNP: 0c09.0: enabled 1
743 17:31:47.223071 USB2 port 0: enabled 1
744 17:31:47.223659 USB2 port 1: enabled 1
745 17:31:47.226065 USB2 port 2: enabled 0
746 17:31:47.229181 USB2 port 3: enabled 0
747 17:31:47.229713 USB2 port 5: enabled 0
748 17:31:47.232601 USB2 port 6: enabled 1
749 17:31:47.236023 USB2 port 9: enabled 1
750 17:31:47.239319 USB3 port 0: enabled 1
751 17:31:47.239909 USB3 port 1: enabled 1
752 17:31:47.242569 USB3 port 2: enabled 1
753 17:31:47.245895 USB3 port 3: enabled 1
754 17:31:47.246551 USB3 port 4: enabled 0
755 17:31:47.249026 APIC: 02: enabled 1
756 17:31:47.251967 APIC: 06: enabled 1
757 17:31:47.252458 APIC: 01: enabled 1
758 17:31:47.255661 APIC: 03: enabled 1
759 17:31:47.258850 APIC: 07: enabled 1
760 17:31:47.259465 APIC: 04: enabled 1
761 17:31:47.261781 APIC: 05: enabled 1
762 17:31:47.265334 Compare with tree...
763 17:31:47.265925 Root Device: enabled 1
764 17:31:47.268403 CPU_CLUSTER: 0: enabled 1
765 17:31:47.271929 APIC: 00: enabled 1
766 17:31:47.272512 APIC: 02: enabled 1
767 17:31:47.275087 APIC: 06: enabled 1
768 17:31:47.278404 APIC: 01: enabled 1
769 17:31:47.279030 APIC: 03: enabled 1
770 17:31:47.281758 APIC: 07: enabled 1
771 17:31:47.284897 APIC: 04: enabled 1
772 17:31:47.287913 APIC: 05: enabled 1
773 17:31:47.288398 DOMAIN: 0000: enabled 1
774 17:31:47.291516 PCI: 00:00.0: enabled 1
775 17:31:47.294945 PCI: 00:02.0: enabled 1
776 17:31:47.298129 PCI: 00:04.0: enabled 0
777 17:31:47.301287 PCI: 00:05.0: enabled 0
778 17:31:47.301772 PCI: 00:12.0: enabled 1
779 17:31:47.304616 PCI: 00:12.5: enabled 0
780 17:31:47.307705 PCI: 00:12.6: enabled 0
781 17:31:47.311127 PCI: 00:14.0: enabled 1
782 17:31:47.314331 USB0 port 0: enabled 1
783 17:31:47.314936 USB2 port 0: enabled 1
784 17:31:47.317669 USB2 port 1: enabled 1
785 17:31:47.320964 USB2 port 2: enabled 0
786 17:31:47.323932 USB2 port 3: enabled 0
787 17:31:47.327076 USB2 port 5: enabled 0
788 17:31:47.330356 USB2 port 6: enabled 1
789 17:31:47.330840 USB2 port 9: enabled 1
790 17:31:47.334012 USB3 port 0: enabled 1
791 17:31:47.337145 USB3 port 1: enabled 1
792 17:31:47.340241 USB3 port 2: enabled 1
793 17:31:47.343879 USB3 port 3: enabled 1
794 17:31:47.346611 USB3 port 4: enabled 0
795 17:31:47.347124 PCI: 00:14.1: enabled 0
796 17:31:47.350341 PCI: 00:14.3: enabled 1
797 17:31:47.353390 PCI: 00:14.5: enabled 0
798 17:31:47.356765 PCI: 00:15.0: enabled 1
799 17:31:47.359995 I2C: 00:15: enabled 1
800 17:31:47.360624 PCI: 00:15.1: enabled 1
801 17:31:47.362791 I2C: 00:5d: enabled 1
802 17:31:47.366360 GENERIC: 0.0: enabled 1
803 17:31:47.369608 PCI: 00:15.2: enabled 0
804 17:31:47.372820 PCI: 00:15.3: enabled 0
805 17:31:47.375935 PCI: 00:16.0: enabled 1
806 17:31:47.376420 PCI: 00:16.1: enabled 0
807 17:31:47.379634 PCI: 00:16.2: enabled 0
808 17:31:47.382432 PCI: 00:16.3: enabled 0
809 17:31:47.386025 PCI: 00:16.4: enabled 0
810 17:31:47.389181 PCI: 00:16.5: enabled 0
811 17:31:47.389666 PCI: 00:17.0: enabled 1
812 17:31:47.392334 PCI: 00:19.0: enabled 1
813 17:31:47.395739 I2C: 00:1a: enabled 1
814 17:31:47.399001 I2C: 00:38: enabled 1
815 17:31:47.399487 I2C: 00:39: enabled 1
816 17:31:47.402155 I2C: 00:3a: enabled 1
817 17:31:47.405688 I2C: 00:3b: enabled 1
818 17:31:47.408799 PCI: 00:19.1: enabled 0
819 17:31:47.412105 PCI: 00:19.2: enabled 0
820 17:31:47.412694 PCI: 00:1a.0: enabled 0
821 17:31:47.415282 PCI: 00:1c.0: enabled 0
822 17:31:47.418680 PCI: 00:1c.1: enabled 0
823 17:31:47.421830 PCI: 00:1c.2: enabled 0
824 17:31:47.424887 PCI: 00:1c.3: enabled 0
825 17:31:47.425371 PCI: 00:1c.4: enabled 0
826 17:31:47.428074 PCI: 00:1c.5: enabled 0
827 17:31:47.431459 PCI: 00:1c.6: enabled 0
828 17:31:47.435078 PCI: 00:1c.7: enabled 0
829 17:31:47.438429 PCI: 00:1d.0: enabled 1
830 17:31:47.439041 PCI: 00:1d.1: enabled 0
831 17:31:47.441476 PCI: 00:1d.2: enabled 0
832 17:31:47.444654 PCI: 00:1d.3: enabled 0
833 17:31:47.447994 PCI: 00:1d.4: enabled 0
834 17:31:47.451578 PCI: 00:1d.5: enabled 1
835 17:31:47.454774 PCI: 00:00.0: enabled 1
836 17:31:47.455393 PCI: 00:1e.0: enabled 1
837 17:31:47.458109 PCI: 00:1e.1: enabled 0
838 17:31:47.461102 PCI: 00:1e.2: enabled 1
839 17:31:47.464070 SPI: 00: enabled 1
840 17:31:47.464554 PCI: 00:1e.3: enabled 1
841 17:31:47.467387 SPI: 01: enabled 1
842 17:31:47.470764 PCI: 00:1f.0: enabled 1
843 17:31:47.474220 PNP: 0c09.0: enabled 1
844 17:31:47.477390 PCI: 00:1f.1: enabled 1
845 17:31:47.477971 PCI: 00:1f.2: enabled 1
846 17:31:47.480478 PCI: 00:1f.3: enabled 1
847 17:31:47.483596 PCI: 00:1f.4: enabled 1
848 17:31:47.487107 PCI: 00:1f.5: enabled 1
849 17:31:47.490524 PCI: 00:1f.6: enabled 0
850 17:31:47.491132 Root Device scanning...
851 17:31:47.493660 scan_static_bus for Root Device
852 17:31:47.496871 CPU_CLUSTER: 0 enabled
853 17:31:47.500181 DOMAIN: 0000 enabled
854 17:31:47.503566 DOMAIN: 0000 scanning...
855 17:31:47.506618 PCI: pci_scan_bus for bus 00
856 17:31:47.507128 PCI: 00:00.0 [8086/0000] ops
857 17:31:47.509636 PCI: 00:00.0 [8086/9b61] enabled
858 17:31:47.513252 PCI: 00:02.0 [8086/0000] bus ops
859 17:31:47.516594 PCI: 00:02.0 [8086/9b41] enabled
860 17:31:47.523235 PCI: 00:04.0 [8086/1903] disabled
861 17:31:47.526333 PCI: 00:08.0 [8086/1911] enabled
862 17:31:47.529659 PCI: 00:12.0 [8086/02f9] enabled
863 17:31:47.532615 PCI: 00:14.0 [8086/0000] bus ops
864 17:31:47.536040 PCI: 00:14.0 [8086/02ed] enabled
865 17:31:47.539560 PCI: 00:14.2 [8086/02ef] enabled
866 17:31:47.542578 PCI: 00:14.3 [8086/02f0] enabled
867 17:31:47.545755 PCI: 00:15.0 [8086/0000] bus ops
868 17:31:47.549277 PCI: 00:15.0 [8086/02e8] enabled
869 17:31:47.552621 PCI: 00:15.1 [8086/0000] bus ops
870 17:31:47.555710 PCI: 00:15.1 [8086/02e9] enabled
871 17:31:47.559113 PCI: 00:16.0 [8086/0000] ops
872 17:31:47.562230 PCI: 00:16.0 [8086/02e0] enabled
873 17:31:47.565386 PCI: 00:17.0 [8086/0000] ops
874 17:31:47.568870 PCI: 00:17.0 [8086/02d3] enabled
875 17:31:47.571752 PCI: 00:19.0 [8086/0000] bus ops
876 17:31:47.575212 PCI: 00:19.0 [8086/02c5] enabled
877 17:31:47.578382 PCI: 00:1d.0 [8086/0000] bus ops
878 17:31:47.581684 PCI: 00:1d.0 [8086/02b0] enabled
879 17:31:47.585231 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 17:31:47.588256 PCI: 00:1e.0 [8086/0000] ops
881 17:31:47.591634 PCI: 00:1e.0 [8086/02a8] enabled
882 17:31:47.594667 PCI: 00:1e.2 [8086/0000] bus ops
883 17:31:47.597940 PCI: 00:1e.2 [8086/02aa] enabled
884 17:31:47.601232 PCI: 00:1e.3 [8086/0000] bus ops
885 17:31:47.604555 PCI: 00:1e.3 [8086/02ab] enabled
886 17:31:47.607545 PCI: 00:1f.0 [8086/0000] bus ops
887 17:31:47.611249 PCI: 00:1f.0 [8086/0284] enabled
888 17:31:47.617542 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 17:31:47.624210 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 17:31:47.627447 PCI: 00:1f.3 [8086/0000] bus ops
891 17:31:47.630448 PCI: 00:1f.3 [8086/02c8] enabled
892 17:31:47.633853 PCI: 00:1f.4 [8086/0000] bus ops
893 17:31:47.637276 PCI: 00:1f.4 [8086/02a3] enabled
894 17:31:47.640482 PCI: 00:1f.5 [8086/0000] bus ops
895 17:31:47.643640 PCI: 00:1f.5 [8086/02a4] enabled
896 17:31:47.646744 PCI: Leftover static devices:
897 17:31:47.647306 PCI: 00:05.0
898 17:31:47.650026 PCI: 00:12.5
899 17:31:47.650512 PCI: 00:12.6
900 17:31:47.653629 PCI: 00:14.1
901 17:31:47.654213 PCI: 00:14.5
902 17:31:47.654600 PCI: 00:15.2
903 17:31:47.656861 PCI: 00:15.3
904 17:31:47.657444 PCI: 00:16.1
905 17:31:47.659854 PCI: 00:16.2
906 17:31:47.660343 PCI: 00:16.3
907 17:31:47.663094 PCI: 00:16.4
908 17:31:47.663599 PCI: 00:16.5
909 17:31:47.663988 PCI: 00:19.1
910 17:31:47.666596 PCI: 00:19.2
911 17:31:47.667238 PCI: 00:1a.0
912 17:31:47.669782 PCI: 00:1c.0
913 17:31:47.670272 PCI: 00:1c.1
914 17:31:47.673052 PCI: 00:1c.2
915 17:31:47.673538 PCI: 00:1c.3
916 17:31:47.673932 PCI: 00:1c.4
917 17:31:47.676340 PCI: 00:1c.5
918 17:31:47.676830 PCI: 00:1c.6
919 17:31:47.679401 PCI: 00:1c.7
920 17:31:47.679891 PCI: 00:1d.1
921 17:31:47.680276 PCI: 00:1d.2
922 17:31:47.682872 PCI: 00:1d.3
923 17:31:47.683498 PCI: 00:1d.4
924 17:31:47.686039 PCI: 00:1d.5
925 17:31:47.686623 PCI: 00:1e.1
926 17:31:47.689323 PCI: 00:1f.1
927 17:31:47.689808 PCI: 00:1f.2
928 17:31:47.690190 PCI: 00:1f.6
929 17:31:47.692738 PCI: Check your devicetree.cb.
930 17:31:47.695810 PCI: 00:02.0 scanning...
931 17:31:47.699019 scan_generic_bus for PCI: 00:02.0
932 17:31:47.702327 scan_generic_bus for PCI: 00:02.0 done
933 17:31:47.708762 scan_bus: scanning of bus PCI: 00:02.0 took 10186 usecs
934 17:31:47.712125 PCI: 00:14.0 scanning...
935 17:31:47.715264 scan_static_bus for PCI: 00:14.0
936 17:31:47.718684 USB0 port 0 enabled
937 17:31:47.719203 USB0 port 0 scanning...
938 17:31:47.722155 scan_static_bus for USB0 port 0
939 17:31:47.725232 USB2 port 0 enabled
940 17:31:47.728597 USB2 port 1 enabled
941 17:31:47.729192 USB2 port 2 disabled
942 17:31:47.731426 USB2 port 3 disabled
943 17:31:47.735315 USB2 port 5 disabled
944 17:31:47.735900 USB2 port 6 enabled
945 17:31:47.738268 USB2 port 9 enabled
946 17:31:47.741717 USB3 port 0 enabled
947 17:31:47.742303 USB3 port 1 enabled
948 17:31:47.744912 USB3 port 2 enabled
949 17:31:47.745425 USB3 port 3 enabled
950 17:31:47.748131 USB3 port 4 disabled
951 17:31:47.751689 USB2 port 0 scanning...
952 17:31:47.754669 scan_static_bus for USB2 port 0
953 17:31:47.757885 scan_static_bus for USB2 port 0 done
954 17:31:47.764290 scan_bus: scanning of bus USB2 port 0 took 9715 usecs
955 17:31:47.764816 USB2 port 1 scanning...
956 17:31:47.767792 scan_static_bus for USB2 port 1
957 17:31:47.774208 scan_static_bus for USB2 port 1 done
958 17:31:47.777668 scan_bus: scanning of bus USB2 port 1 took 9713 usecs
959 17:31:47.780677 USB2 port 6 scanning...
960 17:31:47.784104 scan_static_bus for USB2 port 6
961 17:31:47.787838 scan_static_bus for USB2 port 6 done
962 17:31:47.794157 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
963 17:31:47.797002 USB2 port 9 scanning...
964 17:31:47.800271 scan_static_bus for USB2 port 9
965 17:31:47.803444 scan_static_bus for USB2 port 9 done
966 17:31:47.807091 scan_bus: scanning of bus USB2 port 9 took 9714 usecs
967 17:31:47.810596 USB3 port 0 scanning...
968 17:31:47.813585 scan_static_bus for USB3 port 0
969 17:31:47.816712 scan_static_bus for USB3 port 0 done
970 17:31:47.823434 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
971 17:31:47.826855 USB3 port 1 scanning...
972 17:31:47.830114 scan_static_bus for USB3 port 1
973 17:31:47.833130 scan_static_bus for USB3 port 1 done
974 17:31:47.839717 scan_bus: scanning of bus USB3 port 1 took 9714 usecs
975 17:31:47.840335 USB3 port 2 scanning...
976 17:31:47.842822 scan_static_bus for USB3 port 2
977 17:31:47.849488 scan_static_bus for USB3 port 2 done
978 17:31:47.852619 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
979 17:31:47.855722 USB3 port 3 scanning...
980 17:31:47.859090 scan_static_bus for USB3 port 3
981 17:31:47.862299 scan_static_bus for USB3 port 3 done
982 17:31:47.868957 scan_bus: scanning of bus USB3 port 3 took 9713 usecs
983 17:31:47.871901 scan_static_bus for USB0 port 0 done
984 17:31:47.879125 scan_bus: scanning of bus USB0 port 0 took 155521 usecs
985 17:31:47.881944 scan_static_bus for PCI: 00:14.0 done
986 17:31:47.888543 scan_bus: scanning of bus PCI: 00:14.0 took 173166 usecs
987 17:31:47.889149 PCI: 00:15.0 scanning...
988 17:31:47.891742 scan_generic_bus for PCI: 00:15.0
989 17:31:47.898348 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 17:31:47.901876 scan_generic_bus for PCI: 00:15.0 done
991 17:31:47.908141 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
992 17:31:47.908643 PCI: 00:15.1 scanning...
993 17:31:47.915145 scan_generic_bus for PCI: 00:15.1
994 17:31:47.917840 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 17:31:47.921327 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 17:31:47.924442 scan_generic_bus for PCI: 00:15.1 done
997 17:31:47.930802 scan_bus: scanning of bus PCI: 00:15.1 took 18629 usecs
998 17:31:47.934219 PCI: 00:19.0 scanning...
999 17:31:47.937275 scan_generic_bus for PCI: 00:19.0
1000 17:31:47.940789 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 17:31:47.944103 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 17:31:47.950356 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 17:31:47.953904 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 17:31:47.956946 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 17:31:47.960090 scan_generic_bus for PCI: 00:19.0 done
1006 17:31:47.966998 scan_bus: scanning of bus PCI: 00:19.0 took 30755 usecs
1007 17:31:47.970344 PCI: 00:1d.0 scanning...
1008 17:31:47.973315 do_pci_scan_bridge for PCI: 00:1d.0
1009 17:31:47.976330 PCI: pci_scan_bus for bus 01
1010 17:31:47.979803 PCI: 01:00.0 [1c5c/1327] enabled
1011 17:31:47.983144 Enabling Common Clock Configuration
1012 17:31:47.986364 L1 Sub-State supported from root port 29
1013 17:31:47.989502 L1 Sub-State Support = 0xf
1014 17:31:47.992755 CommonModeRestoreTime = 0x28
1015 17:31:47.999231 Power On Value = 0x16, Power On Scale = 0x0
1016 17:31:47.999724 ASPM: Enabled L1
1017 17:31:48.005742 scan_bus: scanning of bus PCI: 00:1d.0 took 32818 usecs
1018 17:31:48.009166 PCI: 00:1e.2 scanning...
1019 17:31:48.012286 scan_generic_bus for PCI: 00:1e.2
1020 17:31:48.015551 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 17:31:48.018756 scan_generic_bus for PCI: 00:1e.2 done
1022 17:31:48.025445 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1023 17:31:48.028624 PCI: 00:1e.3 scanning...
1024 17:31:48.031935 scan_generic_bus for PCI: 00:1e.3
1025 17:31:48.035452 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 17:31:48.038678 scan_generic_bus for PCI: 00:1e.3 done
1027 17:31:48.045090 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1028 17:31:48.048228 PCI: 00:1f.0 scanning...
1029 17:31:48.051851 scan_static_bus for PCI: 00:1f.0
1030 17:31:48.052402 PNP: 0c09.0 enabled
1031 17:31:48.054834 scan_static_bus for PCI: 00:1f.0 done
1032 17:31:48.061105 scan_bus: scanning of bus PCI: 00:1f.0 took 12064 usecs
1033 17:31:48.064554 PCI: 00:1f.3 scanning...
1034 17:31:48.071117 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1035 17:31:48.071699 PCI: 00:1f.4 scanning...
1036 17:31:48.077770 scan_generic_bus for PCI: 00:1f.4
1037 17:31:48.081194 scan_generic_bus for PCI: 00:1f.4 done
1038 17:31:48.084308 scan_bus: scanning of bus PCI: 00:1f.4 took 10202 usecs
1039 17:31:48.087502 PCI: 00:1f.5 scanning...
1040 17:31:48.091118 scan_generic_bus for PCI: 00:1f.5
1041 17:31:48.097247 scan_generic_bus for PCI: 00:1f.5 done
1042 17:31:48.100822 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1043 17:31:48.107316 scan_bus: scanning of bus DOMAIN: 0000 took 605406 usecs
1044 17:31:48.110461 scan_static_bus for Root Device done
1045 17:31:48.117057 scan_bus: scanning of bus Root Device took 625288 usecs
1046 17:31:48.117690 done
1047 17:31:48.120446 Chrome EC: UHEPI supported
1048 17:31:48.126959 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 17:31:48.133261 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 17:31:48.139825 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 17:31:48.146603 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 17:31:48.150019 SPI flash protection: WPSW=0 SRP0=0
1053 17:31:48.153162 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 17:31:48.159717 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 17:31:48.162938 found VGA at PCI: 00:02.0
1056 17:31:48.166158 Setting up VGA for PCI: 00:02.0
1057 17:31:48.169283 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 17:31:48.175779 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 17:31:48.179122 Allocating resources...
1060 17:31:48.179708 Reading resources...
1061 17:31:48.182527 Root Device read_resources bus 0 link: 0
1062 17:31:48.189270 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 17:31:48.192482 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 17:31:48.198836 DOMAIN: 0000 read_resources bus 0 link: 0
1065 17:31:48.205547 PCI: 00:14.0 read_resources bus 0 link: 0
1066 17:31:48.209005 USB0 port 0 read_resources bus 0 link: 0
1067 17:31:48.216270 USB0 port 0 read_resources bus 0 link: 0 done
1068 17:31:48.219757 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 17:31:48.226849 PCI: 00:15.0 read_resources bus 1 link: 0
1070 17:31:48.230378 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 17:31:48.237141 PCI: 00:15.1 read_resources bus 2 link: 0
1072 17:31:48.240216 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 17:31:48.247667 PCI: 00:19.0 read_resources bus 3 link: 0
1074 17:31:48.254366 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 17:31:48.257567 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 17:31:48.264067 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 17:31:48.267235 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 17:31:48.274004 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 17:31:48.277258 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 17:31:48.284065 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 17:31:48.287223 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 17:31:48.293678 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 17:31:48.300522 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 17:31:48.303562 Root Device read_resources bus 0 link: 0 done
1085 17:31:48.306728 Done reading resources.
1086 17:31:48.313520 Show resources in subtree (Root Device)...After reading.
1087 17:31:48.316592 Root Device child on link 0 CPU_CLUSTER: 0
1088 17:31:48.319890 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 17:31:48.323218 APIC: 00
1090 17:31:48.323702 APIC: 02
1091 17:31:48.326440 APIC: 06
1092 17:31:48.327098 APIC: 01
1093 17:31:48.327503 APIC: 03
1094 17:31:48.376343 APIC: 07
1095 17:31:48.376948 APIC: 04
1096 17:31:48.377336 APIC: 05
1097 17:31:48.377703 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 17:31:48.378055 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 17:31:48.378822 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 17:31:48.379235 PCI: 00:00.0
1101 17:31:48.379580 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 17:31:48.379918 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 17:31:48.410214 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 17:31:48.410789 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 17:31:48.411595 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 17:31:48.413026 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 17:31:48.422785 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 17:31:48.432414 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 17:31:48.439075 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 17:31:48.448886 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 17:31:48.458889 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 17:31:48.468403 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 17:31:48.478270 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 17:31:48.488268 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 17:31:48.497608 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 17:31:48.507455 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 17:31:48.508034 PCI: 00:02.0
1118 17:31:48.517569 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 17:31:48.527244 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 17:31:48.536752 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 17:31:48.537248 PCI: 00:04.0
1122 17:31:48.540316 PCI: 00:08.0
1123 17:31:48.549983 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 17:31:48.553632 PCI: 00:12.0
1125 17:31:48.563454 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 17:31:48.566371 PCI: 00:14.0 child on link 0 USB0 port 0
1127 17:31:48.575921 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 17:31:48.579554 USB0 port 0 child on link 0 USB2 port 0
1129 17:31:48.582981 USB2 port 0
1130 17:31:48.583567 USB2 port 1
1131 17:31:48.586046 USB2 port 2
1132 17:31:48.586623 USB2 port 3
1133 17:31:48.589126 USB2 port 5
1134 17:31:48.592338 USB2 port 6
1135 17:31:48.592815 USB2 port 9
1136 17:31:48.595874 USB3 port 0
1137 17:31:48.596348 USB3 port 1
1138 17:31:48.598969 USB3 port 2
1139 17:31:48.599447 USB3 port 3
1140 17:31:48.602377 USB3 port 4
1141 17:31:48.602856 PCI: 00:14.2
1142 17:31:48.612141 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 17:31:48.621800 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 17:31:48.625259 PCI: 00:14.3
1145 17:31:48.634986 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 17:31:48.638259 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 17:31:48.647957 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 17:31:48.651202 I2C: 01:15
1149 17:31:48.654535 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 17:31:48.664288 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 17:31:48.667810 I2C: 02:5d
1152 17:31:48.668396 GENERIC: 0.0
1153 17:31:48.670866 PCI: 00:16.0
1154 17:31:48.680826 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 17:31:48.681425 PCI: 00:17.0
1156 17:31:48.690267 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 17:31:48.700152 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 17:31:48.706648 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 17:31:48.717062 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 17:31:48.723008 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 17:31:48.733018 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 17:31:48.736331 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 17:31:48.746399 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 17:31:48.749656 I2C: 03:1a
1165 17:31:48.750266 I2C: 03:38
1166 17:31:48.752918 I2C: 03:39
1167 17:31:48.753503 I2C: 03:3a
1168 17:31:48.756118 I2C: 03:3b
1169 17:31:48.759129 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 17:31:48.768957 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 17:31:48.778956 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 17:31:48.788983 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 17:31:48.789572 PCI: 01:00.0
1174 17:31:48.798207 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 17:31:48.801470 PCI: 00:1e.0
1176 17:31:48.811219 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 17:31:48.820912 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 17:31:48.824192 PCI: 00:1e.2 child on link 0 SPI: 00
1179 17:31:48.834261 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 17:31:48.837396 SPI: 00
1181 17:31:48.840877 PCI: 00:1e.3 child on link 0 SPI: 01
1182 17:31:48.850552 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 17:31:48.851078 SPI: 01
1184 17:31:48.856873 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 17:31:48.863332 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 17:31:48.873151 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 17:31:48.876539 PNP: 0c09.0
1188 17:31:48.882988 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 17:31:48.886536 PCI: 00:1f.3
1190 17:31:48.896226 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 17:31:48.905809 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 17:31:48.908955 PCI: 00:1f.4
1193 17:31:48.915674 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 17:31:48.925499 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 17:31:48.928646 PCI: 00:1f.5
1196 17:31:48.938419 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 17:31:48.945083 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 17:31:48.951764 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 17:31:48.957945 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 17:31:48.961397 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 17:31:48.964581 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 17:31:48.968047 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 17:31:48.970945 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 17:31:48.977652 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 17:31:48.984220 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 17:31:48.993905 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 17:31:49.000506 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 17:31:49.006956 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 17:31:49.010019 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 17:31:49.020009 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 17:31:49.023221 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 17:31:49.029745 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 17:31:49.032738 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 17:31:49.039411 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 17:31:49.042631 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 17:31:49.049097 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 17:31:49.052771 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 17:31:49.059156 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 17:31:49.062016 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 17:31:49.068621 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 17:31:49.071870 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 17:31:49.078593 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 17:31:49.082222 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 17:31:49.088498 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 17:31:49.091522 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 17:31:49.098198 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 17:31:49.101457 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 17:31:49.108022 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 17:31:49.111175 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 17:31:49.117893 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 17:31:49.120943 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 17:31:49.127590 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 17:31:49.130814 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 17:31:49.140732 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 17:31:49.144136 avoid_fixed_resources: DOMAIN: 0000
1236 17:31:49.150433 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 17:31:49.156927 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 17:31:49.163553 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 17:31:49.170075 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 17:31:49.179821 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 17:31:49.186411 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 17:31:49.192909 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 17:31:49.202946 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 17:31:49.209207 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 17:31:49.215780 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 17:31:49.222188 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 17:31:49.231850 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 17:31:49.232339 Setting resources...
1249 17:31:49.238447 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 17:31:49.245037 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 17:31:49.248216 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 17:31:49.251519 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 17:31:49.254864 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 17:31:49.261539 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 17:31:49.267798 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 17:31:49.274312 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 17:31:49.281167 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 17:31:49.287266 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 17:31:49.290770 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 17:31:49.297276 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 17:31:49.300514 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 17:31:49.307278 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 17:31:49.310175 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 17:31:49.316687 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 17:31:49.319799 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 17:31:49.326432 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 17:31:49.329766 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 17:31:49.336595 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 17:31:49.339901 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 17:31:49.346030 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 17:31:49.349138 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 17:31:49.355883 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 17:31:49.359159 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 17:31:49.365703 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 17:31:49.369460 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 17:31:49.375381 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 17:31:49.379108 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 17:31:49.385535 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 17:31:49.388516 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 17:31:49.395276 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 17:31:49.401306 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 17:31:49.407878 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 17:31:49.417672 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 17:31:49.424516 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 17:31:49.427512 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 17:31:49.437528 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 17:31:49.440693 Root Device assign_resources, bus 0 link: 0
1288 17:31:49.444285 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 17:31:49.454362 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 17:31:49.463795 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 17:31:49.470545 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 17:31:49.476845 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 17:31:49.486686 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 17:31:49.493302 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 17:31:49.499804 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 17:31:49.502800 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 17:31:49.512594 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 17:31:49.519293 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 17:31:49.529415 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 17:31:49.535715 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 17:31:49.542282 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 17:31:49.545552 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 17:31:49.555751 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 17:31:49.558859 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 17:31:49.565211 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 17:31:49.571719 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 17:31:49.581886 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 17:31:49.588188 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 17:31:49.594945 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 17:31:49.604553 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 17:31:49.610688 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 17:31:49.617286 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 17:31:49.627091 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 17:31:49.630458 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 17:31:49.637273 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 17:31:49.643542 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 17:31:49.653240 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 17:31:49.662931 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 17:31:49.666293 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 17:31:49.675888 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 17:31:49.679159 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 17:31:49.688996 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 17:31:49.695589 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 17:31:49.701961 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 17:31:49.705234 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 17:31:49.714792 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 17:31:49.718378 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 17:31:49.721770 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 17:31:49.728513 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 17:31:49.731580 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 17:31:49.738152 LPC: Trying to open IO window from 800 size 1ff
1332 17:31:49.744544 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 17:31:49.754199 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 17:31:49.760681 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 17:31:49.771132 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 17:31:49.774089 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 17:31:49.780520 Root Device assign_resources, bus 0 link: 0
1338 17:31:49.784057 Done setting resources.
1339 17:31:49.790864 Show resources in subtree (Root Device)...After assigning values.
1340 17:31:49.793543 Root Device child on link 0 CPU_CLUSTER: 0
1341 17:31:49.797106 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 17:31:49.800139 APIC: 00
1343 17:31:49.800618 APIC: 02
1344 17:31:49.800996 APIC: 06
1345 17:31:49.803640 APIC: 01
1346 17:31:49.804117 APIC: 03
1347 17:31:49.804488 APIC: 07
1348 17:31:49.806943 APIC: 04
1349 17:31:49.807533 APIC: 05
1350 17:31:49.813122 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 17:31:49.822952 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 17:31:49.832673 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 17:31:49.835869 PCI: 00:00.0
1354 17:31:49.842587 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 17:31:49.852650 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 17:31:49.862339 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 17:31:49.872067 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 17:31:49.882035 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 17:31:49.891796 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 17:31:49.901656 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 17:31:49.908158 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 17:31:49.917502 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 17:31:49.927494 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 17:31:49.936938 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 17:31:49.946680 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 17:31:49.956930 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 17:31:49.966361 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 17:31:49.976038 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 17:31:49.986318 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 17:31:49.986993 PCI: 00:02.0
1371 17:31:49.995878 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 17:31:50.008992 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 17:31:50.015431 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 17:31:50.018988 PCI: 00:04.0
1375 17:31:50.019576 PCI: 00:08.0
1376 17:31:50.028708 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 17:31:50.031699 PCI: 00:12.0
1378 17:31:50.041777 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 17:31:50.044966 PCI: 00:14.0 child on link 0 USB0 port 0
1380 17:31:50.058022 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 17:31:50.061057 USB0 port 0 child on link 0 USB2 port 0
1382 17:31:50.064249 USB2 port 0
1383 17:31:50.064734 USB2 port 1
1384 17:31:50.067894 USB2 port 2
1385 17:31:50.068479 USB2 port 3
1386 17:31:50.071061 USB2 port 5
1387 17:31:50.071639 USB2 port 6
1388 17:31:50.074278 USB2 port 9
1389 17:31:50.074960 USB3 port 0
1390 17:31:50.077608 USB3 port 1
1391 17:31:50.078090 USB3 port 2
1392 17:31:50.080504 USB3 port 3
1393 17:31:50.084207 USB3 port 4
1394 17:31:50.084794 PCI: 00:14.2
1395 17:31:50.093814 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 17:31:50.103608 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 17:31:50.106651 PCI: 00:14.3
1398 17:31:50.116505 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 17:31:50.119580 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 17:31:50.129618 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 17:31:50.132890 I2C: 01:15
1402 17:31:50.136132 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 17:31:50.146011 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 17:31:50.149407 I2C: 02:5d
1405 17:31:50.149991 GENERIC: 0.0
1406 17:31:50.152420 PCI: 00:16.0
1407 17:31:50.162390 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 17:31:50.165309 PCI: 00:17.0
1409 17:31:50.175317 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 17:31:50.185249 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 17:31:50.194793 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 17:31:50.201594 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 17:31:50.211430 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 17:31:50.220773 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 17:31:50.227507 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 17:31:50.237167 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 17:31:50.237751 I2C: 03:1a
1418 17:31:50.240822 I2C: 03:38
1419 17:31:50.241587 I2C: 03:39
1420 17:31:50.243726 I2C: 03:3a
1421 17:31:50.244215 I2C: 03:3b
1422 17:31:50.250670 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 17:31:50.256837 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 17:31:50.266602 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 17:31:50.279524 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 17:31:50.280110 PCI: 01:00.0
1427 17:31:50.289511 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 17:31:50.292808 PCI: 00:1e.0
1429 17:31:50.303073 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 17:31:50.312587 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 17:31:50.319139 PCI: 00:1e.2 child on link 0 SPI: 00
1432 17:31:50.328845 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 17:31:50.329434 SPI: 00
1434 17:31:50.332044 PCI: 00:1e.3 child on link 0 SPI: 01
1435 17:31:50.344961 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 17:31:50.345549 SPI: 01
1437 17:31:50.348313 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 17:31:50.358393 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 17:31:50.367719 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 17:31:50.368211 PNP: 0c09.0
1441 17:31:50.377813 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 17:31:50.378437 PCI: 00:1f.3
1443 17:31:50.391053 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 17:31:50.400439 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 17:31:50.400967 PCI: 00:1f.4
1446 17:31:50.410732 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 17:31:50.420019 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 17:31:50.423605 PCI: 00:1f.5
1449 17:31:50.433530 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 17:31:50.436547 Done allocating resources.
1451 17:31:50.439934 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 17:31:50.443028 Enabling resources...
1453 17:31:50.450014 PCI: 00:00.0 subsystem <- 8086/9b61
1454 17:31:50.450603 PCI: 00:00.0 cmd <- 06
1455 17:31:50.453189 PCI: 00:02.0 subsystem <- 8086/9b41
1456 17:31:50.456267 PCI: 00:02.0 cmd <- 03
1457 17:31:50.459517 PCI: 00:08.0 cmd <- 06
1458 17:31:50.462636 PCI: 00:12.0 subsystem <- 8086/02f9
1459 17:31:50.465800 PCI: 00:12.0 cmd <- 02
1460 17:31:50.469668 PCI: 00:14.0 subsystem <- 8086/02ed
1461 17:31:50.472613 PCI: 00:14.0 cmd <- 02
1462 17:31:50.475730 PCI: 00:14.2 cmd <- 02
1463 17:31:50.479015 PCI: 00:14.3 subsystem <- 8086/02f0
1464 17:31:50.482247 PCI: 00:14.3 cmd <- 02
1465 17:31:50.485620 PCI: 00:15.0 subsystem <- 8086/02e8
1466 17:31:50.488878 PCI: 00:15.0 cmd <- 02
1467 17:31:50.492366 PCI: 00:15.1 subsystem <- 8086/02e9
1468 17:31:50.492956 PCI: 00:15.1 cmd <- 02
1469 17:31:50.499057 PCI: 00:16.0 subsystem <- 8086/02e0
1470 17:31:50.499647 PCI: 00:16.0 cmd <- 02
1471 17:31:50.502051 PCI: 00:17.0 subsystem <- 8086/02d3
1472 17:31:50.505326 PCI: 00:17.0 cmd <- 03
1473 17:31:50.508762 PCI: 00:19.0 subsystem <- 8086/02c5
1474 17:31:50.511751 PCI: 00:19.0 cmd <- 02
1475 17:31:50.515128 PCI: 00:1d.0 bridge ctrl <- 0013
1476 17:31:50.518206 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 17:31:50.521571 PCI: 00:1d.0 cmd <- 06
1478 17:31:50.524802 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 17:31:50.528191 PCI: 00:1e.0 cmd <- 06
1480 17:31:50.531565 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 17:31:50.535241 PCI: 00:1e.2 cmd <- 06
1482 17:31:50.538088 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 17:31:50.541486 PCI: 00:1e.3 cmd <- 02
1484 17:31:50.544723 PCI: 00:1f.0 subsystem <- 8086/0284
1485 17:31:50.547754 PCI: 00:1f.0 cmd <- 407
1486 17:31:50.550860 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 17:31:50.554636 PCI: 00:1f.3 cmd <- 02
1488 17:31:50.557587 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 17:31:50.560791 PCI: 00:1f.4 cmd <- 03
1490 17:31:50.564103 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 17:31:50.567355 PCI: 00:1f.5 cmd <- 406
1492 17:31:50.574725 PCI: 01:00.0 cmd <- 02
1493 17:31:50.579871 done.
1494 17:31:50.589023 ME: Version: 14.0.39.1367
1495 17:31:50.595624 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1496 17:31:50.599099 Initializing devices...
1497 17:31:50.599711 Root Device init ...
1498 17:31:50.605418 Chrome EC: Set SMI mask to 0x0000000000000000
1499 17:31:50.608630 Chrome EC: clear events_b mask to 0x0000000000000000
1500 17:31:50.615218 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 17:31:50.621744 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 17:31:50.628245 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 17:31:50.631786 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 17:31:50.638149 Root Device init finished in 35154 usecs
1505 17:31:50.638732 CPU_CLUSTER: 0 init ...
1506 17:31:50.644699 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 17:31:50.649646 PCI: 00:00.0 init ...
1508 17:31:50.653104 CPU TDP: 15 Watts
1509 17:31:50.655917 CPU PL2 = 64 Watts
1510 17:31:50.659509 PCI: 00:00.0 init finished in 7080 usecs
1511 17:31:50.662647 PCI: 00:02.0 init ...
1512 17:31:50.665877 PCI: 00:02.0 init finished in 2252 usecs
1513 17:31:50.669301 PCI: 00:08.0 init ...
1514 17:31:50.672469 PCI: 00:08.0 init finished in 2253 usecs
1515 17:31:50.675653 PCI: 00:12.0 init ...
1516 17:31:50.678938 PCI: 00:12.0 init finished in 2252 usecs
1517 17:31:50.682393 PCI: 00:14.0 init ...
1518 17:31:50.685673 PCI: 00:14.0 init finished in 2252 usecs
1519 17:31:50.688805 PCI: 00:14.2 init ...
1520 17:31:50.691775 PCI: 00:14.2 init finished in 2252 usecs
1521 17:31:50.695284 PCI: 00:14.3 init ...
1522 17:31:50.698702 PCI: 00:14.3 init finished in 2269 usecs
1523 17:31:50.702187 PCI: 00:15.0 init ...
1524 17:31:50.705227 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 17:31:50.711762 PCI: 00:15.0 init finished in 5974 usecs
1526 17:31:50.712335 PCI: 00:15.1 init ...
1527 17:31:50.718362 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 17:31:50.721284 PCI: 00:15.1 init finished in 5975 usecs
1529 17:31:50.724799 PCI: 00:16.0 init ...
1530 17:31:50.728075 PCI: 00:16.0 init finished in 2251 usecs
1531 17:31:50.731215 PCI: 00:19.0 init ...
1532 17:31:50.734604 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 17:31:50.737866 PCI: 00:19.0 init finished in 5975 usecs
1534 17:31:50.741320 PCI: 00:1d.0 init ...
1535 17:31:50.744599 Initializing PCH PCIe bridge.
1536 17:31:50.747668 PCI: 00:1d.0 init finished in 5285 usecs
1537 17:31:50.751623 PCI: 00:1f.0 init ...
1538 17:31:50.754954 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 17:31:50.761502 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 17:31:50.762106 IOAPIC: ID = 0x02
1541 17:31:50.764978 IOAPIC: Dumping registers
1542 17:31:50.767872 reg 0x0000: 0x02000000
1543 17:31:50.771081 reg 0x0001: 0x00770020
1544 17:31:50.774559 reg 0x0002: 0x00000000
1545 17:31:50.777472 PCI: 00:1f.0 init finished in 23538 usecs
1546 17:31:50.780824 PCI: 00:1f.4 init ...
1547 17:31:50.784078 PCI: 00:1f.4 init finished in 2263 usecs
1548 17:31:50.795870 PCI: 01:00.0 init ...
1549 17:31:50.799015 PCI: 01:00.0 init finished in 2251 usecs
1550 17:31:50.803270 PNP: 0c09.0 init ...
1551 17:31:50.810038 Google Chrome EC uptime: 11.146 seconds
1552 17:31:50.813275 Google Chrome AP resets since EC boot: 0
1553 17:31:50.816009 Google Chrome most recent AP reset causes:
1554 17:31:50.822512 Google Chrome EC reset flags at last EC boot: reset-pin
1555 17:31:50.825774 PNP: 0c09.0 init finished in 20561 usecs
1556 17:31:50.829242 Devices initialized
1557 17:31:50.832524 Show all devs... After init.
1558 17:31:50.833010 Root Device: enabled 1
1559 17:31:50.835768 CPU_CLUSTER: 0: enabled 1
1560 17:31:50.838983 DOMAIN: 0000: enabled 1
1561 17:31:50.842343 APIC: 00: enabled 1
1562 17:31:50.842969 PCI: 00:00.0: enabled 1
1563 17:31:50.845448 PCI: 00:02.0: enabled 1
1564 17:31:50.848704 PCI: 00:04.0: enabled 0
1565 17:31:50.851968 PCI: 00:05.0: enabled 0
1566 17:31:50.852618 PCI: 00:12.0: enabled 1
1567 17:31:50.855267 PCI: 00:12.5: enabled 0
1568 17:31:50.858701 PCI: 00:12.6: enabled 0
1569 17:31:50.861753 PCI: 00:14.0: enabled 1
1570 17:31:50.862246 PCI: 00:14.1: enabled 0
1571 17:31:50.865141 PCI: 00:14.3: enabled 1
1572 17:31:50.868129 PCI: 00:14.5: enabled 0
1573 17:31:50.871598 PCI: 00:15.0: enabled 1
1574 17:31:50.872084 PCI: 00:15.1: enabled 1
1575 17:31:50.874971 PCI: 00:15.2: enabled 0
1576 17:31:50.877834 PCI: 00:15.3: enabled 0
1577 17:31:50.881132 PCI: 00:16.0: enabled 1
1578 17:31:50.881619 PCI: 00:16.1: enabled 0
1579 17:31:50.884792 PCI: 00:16.2: enabled 0
1580 17:31:50.887836 PCI: 00:16.3: enabled 0
1581 17:31:50.891414 PCI: 00:16.4: enabled 0
1582 17:31:50.891995 PCI: 00:16.5: enabled 0
1583 17:31:50.894463 PCI: 00:17.0: enabled 1
1584 17:31:50.897555 PCI: 00:19.0: enabled 1
1585 17:31:50.898046 PCI: 00:19.1: enabled 0
1586 17:31:50.900958 PCI: 00:19.2: enabled 0
1587 17:31:50.904092 PCI: 00:1a.0: enabled 0
1588 17:31:50.907365 PCI: 00:1c.0: enabled 0
1589 17:31:50.907849 PCI: 00:1c.1: enabled 0
1590 17:31:50.910556 PCI: 00:1c.2: enabled 0
1591 17:31:50.914167 PCI: 00:1c.3: enabled 0
1592 17:31:50.917223 PCI: 00:1c.4: enabled 0
1593 17:31:50.917737 PCI: 00:1c.5: enabled 0
1594 17:31:50.920387 PCI: 00:1c.6: enabled 0
1595 17:31:50.923788 PCI: 00:1c.7: enabled 0
1596 17:31:50.927081 PCI: 00:1d.0: enabled 1
1597 17:31:50.927568 PCI: 00:1d.1: enabled 0
1598 17:31:50.930264 PCI: 00:1d.2: enabled 0
1599 17:31:50.933634 PCI: 00:1d.3: enabled 0
1600 17:31:50.937110 PCI: 00:1d.4: enabled 0
1601 17:31:50.937693 PCI: 00:1d.5: enabled 0
1602 17:31:50.940392 PCI: 00:1e.0: enabled 1
1603 17:31:50.943498 PCI: 00:1e.1: enabled 0
1604 17:31:50.946874 PCI: 00:1e.2: enabled 1
1605 17:31:50.947521 PCI: 00:1e.3: enabled 1
1606 17:31:50.949710 PCI: 00:1f.0: enabled 1
1607 17:31:50.953216 PCI: 00:1f.1: enabled 0
1608 17:31:50.956593 PCI: 00:1f.2: enabled 0
1609 17:31:50.957076 PCI: 00:1f.3: enabled 1
1610 17:31:50.959659 PCI: 00:1f.4: enabled 1
1611 17:31:50.962955 PCI: 00:1f.5: enabled 1
1612 17:31:50.966075 PCI: 00:1f.6: enabled 0
1613 17:31:50.966561 USB0 port 0: enabled 1
1614 17:31:50.969430 I2C: 01:15: enabled 1
1615 17:31:50.972765 I2C: 02:5d: enabled 1
1616 17:31:50.973249 GENERIC: 0.0: enabled 1
1617 17:31:50.975989 I2C: 03:1a: enabled 1
1618 17:31:50.979005 I2C: 03:38: enabled 1
1619 17:31:50.979484 I2C: 03:39: enabled 1
1620 17:31:50.982365 I2C: 03:3a: enabled 1
1621 17:31:50.985649 I2C: 03:3b: enabled 1
1622 17:31:50.989141 PCI: 00:00.0: enabled 1
1623 17:31:50.989754 SPI: 00: enabled 1
1624 17:31:50.992483 SPI: 01: enabled 1
1625 17:31:50.993131 PNP: 0c09.0: enabled 1
1626 17:31:50.995834 USB2 port 0: enabled 1
1627 17:31:50.998932 USB2 port 1: enabled 1
1628 17:31:51.001985 USB2 port 2: enabled 0
1629 17:31:51.002470 USB2 port 3: enabled 0
1630 17:31:51.005394 USB2 port 5: enabled 0
1631 17:31:51.008945 USB2 port 6: enabled 1
1632 17:31:51.009598 USB2 port 9: enabled 1
1633 17:31:51.012073 USB3 port 0: enabled 1
1634 17:31:51.015383 USB3 port 1: enabled 1
1635 17:31:51.018270 USB3 port 2: enabled 1
1636 17:31:51.018790 USB3 port 3: enabled 1
1637 17:31:51.021584 USB3 port 4: enabled 0
1638 17:31:51.024859 APIC: 02: enabled 1
1639 17:31:51.025357 APIC: 06: enabled 1
1640 17:31:51.028159 APIC: 01: enabled 1
1641 17:31:51.031372 APIC: 03: enabled 1
1642 17:31:51.031852 APIC: 07: enabled 1
1643 17:31:51.034530 APIC: 04: enabled 1
1644 17:31:51.035027 APIC: 05: enabled 1
1645 17:31:51.037753 PCI: 00:08.0: enabled 1
1646 17:31:51.041242 PCI: 00:14.2: enabled 1
1647 17:31:51.044649 PCI: 01:00.0: enabled 1
1648 17:31:51.047836 Disabling ACPI via APMC:
1649 17:31:51.051062 done.
1650 17:31:51.054748 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 17:31:51.057402 ELOG: NV offset 0xaf0000 size 0x4000
1652 17:31:51.064736 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 17:31:51.071455 ELOG: Event(17) added with size 13 at 2022-08-03 17:31:51 UTC
1654 17:31:51.077631 POST: Unexpected post code in previous boot: 0x73
1655 17:31:51.084256 ELOG: Event(A3) added with size 11 at 2022-08-03 17:31:51 UTC
1656 17:31:51.091002 ELOG: Event(92) added with size 9 at 2022-08-03 17:31:51 UTC
1657 17:31:51.097231 ELOG: Event(93) added with size 9 at 2022-08-03 17:31:51 UTC
1658 17:31:51.103593 ELOG: Event(9A) added with size 9 at 2022-08-03 17:31:51 UTC
1659 17:31:51.110293 ELOG: Event(9E) added with size 10 at 2022-08-03 17:31:51 UTC
1660 17:31:51.116652 ELOG: Event(9F) added with size 14 at 2022-08-03 17:31:51 UTC
1661 17:31:51.119900 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1662 17:31:51.126577 ELOG: Event(A1) added with size 10 at 2022-08-03 17:31:51 UTC
1663 17:31:51.136193 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 17:31:51.142998 ELOG: Event(A0) added with size 9 at 2022-08-03 17:31:51 UTC
1665 17:31:51.146238 elog_add_boot_reason: Logged dev mode boot
1666 17:31:51.149391 Finalize devices...
1667 17:31:51.149873 PCI: 00:17.0 final
1668 17:31:51.152637 Devices finalized
1669 17:31:51.155886 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1670 17:31:51.162722 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1671 17:31:51.165956 ME: HFSTS1 : 0x90000245
1672 17:31:51.168960 ME: HFSTS2 : 0x3B850126
1673 17:31:51.175348 ME: HFSTS3 : 0x00000020
1674 17:31:51.178654 ME: HFSTS4 : 0x00004800
1675 17:31:51.181866 ME: HFSTS5 : 0x00000000
1676 17:31:51.185207 ME: HFSTS6 : 0x40400006
1677 17:31:51.188340 ME: Manufacturing Mode : NO
1678 17:31:51.191900 ME: FW Partition Table : OK
1679 17:31:51.195545 ME: Bringup Loader Failure : NO
1680 17:31:51.198566 ME: Firmware Init Complete : YES
1681 17:31:51.201707 ME: Boot Options Present : NO
1682 17:31:51.208096 ME: Update In Progress : NO
1683 17:31:51.211427 ME: D0i3 Support : YES
1684 17:31:51.214879 ME: Low Power State Enabled : NO
1685 17:31:51.217853 ME: CPU Replaced : NO
1686 17:31:51.221210 ME: CPU Replacement Valid : YES
1687 17:31:51.224633 ME: Current Working State : 5
1688 17:31:51.227844 ME: Current Operation State : 1
1689 17:31:51.231350 ME: Current Operation Mode : 0
1690 17:31:51.234334 ME: Error Code : 0
1691 17:31:51.237794 ME: CPU Debug Disabled : YES
1692 17:31:51.241250 ME: TXT Support : NO
1693 17:31:51.244548 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1694 17:31:51.250880 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1695 17:31:51.253655 CBFS @ c08000 size 3f8000
1696 17:31:51.257166 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1697 17:31:51.263797 CBFS: Locating 'fallback/dsdt.aml'
1698 17:31:51.267176 CBFS: Found @ offset 10bb80 size 3fa5
1699 17:31:51.270193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 17:31:51.273436 CBFS @ c08000 size 3f8000
1701 17:31:51.279994 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 17:31:51.282872 CBFS: Locating 'fallback/slic'
1703 17:31:51.290046 CBFS: 'fallback/slic' not found.
1704 17:31:51.293285 ACPI: Writing ACPI tables at 99b3e000.
1705 17:31:51.293779 ACPI: * FACS
1706 17:31:51.297013 ACPI: * DSDT
1707 17:31:51.300025 Ramoops buffer: 0x100000@0x99a3d000.
1708 17:31:51.303004 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1709 17:31:51.309639 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1710 17:31:51.313137 Google Chrome EC: version:
1711 17:31:51.316204 ro: helios_v2.0.2659-56403530b
1712 17:31:51.319055 rw: helios_v2.0.2849-c41de27e7d
1713 17:31:51.319545 running image: 1
1714 17:31:51.323824 ACPI: * FADT
1715 17:31:51.324310 SCI is IRQ9
1716 17:31:51.330458 ACPI: added table 1/32, length now 40
1717 17:31:51.331081 ACPI: * SSDT
1718 17:31:51.333757 Found 1 CPU(s) with 8 core(s) each.
1719 17:31:51.340587 Error: Could not locate 'wifi_sar' in VPD.
1720 17:31:51.343608 Checking CBFS for default SAR values
1721 17:31:51.347187 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 17:31:51.349960 CBFS @ c08000 size 3f8000
1723 17:31:51.356717 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 17:31:51.360015 CBFS: Locating 'wifi_sar_defaults.hex'
1725 17:31:51.363407 CBFS: Found @ offset 5fac0 size 77
1726 17:31:51.366466 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1727 17:31:51.373075 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1728 17:31:51.376201 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1729 17:31:51.382696 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1730 17:31:51.386303 failed to find key in VPD: dsm_calib_r0_0
1731 17:31:51.395735 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1732 17:31:51.402484 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1733 17:31:51.405384 failed to find key in VPD: dsm_calib_r0_1
1734 17:31:51.412039 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1735 17:31:51.418617 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1736 17:31:51.422063 failed to find key in VPD: dsm_calib_r0_2
1737 17:31:51.431703 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1738 17:31:51.438443 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1739 17:31:51.441691 failed to find key in VPD: dsm_calib_r0_3
1740 17:31:51.451250 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1741 17:31:51.454625 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1742 17:31:51.461184 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1743 17:31:51.464788 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1744 17:31:51.467974 EC returned error result code 1
1745 17:31:51.471077 EC returned error result code 1
1746 17:31:51.474298 EC returned error result code 1
1747 17:31:51.480861 PS2K: Bad resp from EC. Vivaldi disabled!
1748 17:31:51.487723 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1749 17:31:51.490654 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1750 17:31:51.497239 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1751 17:31:51.500562 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1752 17:31:51.507004 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1753 17:31:51.513538 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1754 17:31:51.520173 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1755 17:31:51.526391 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1756 17:31:51.529806 ACPI: added table 2/32, length now 44
1757 17:31:51.530294 ACPI: * MCFG
1758 17:31:51.532905 ACPI: added table 3/32, length now 48
1759 17:31:51.536451 ACPI: * TPM2
1760 17:31:51.539583 TPM2 log created at 99a2d000
1761 17:31:51.542935 ACPI: added table 4/32, length now 52
1762 17:31:51.543422 ACPI: * MADT
1763 17:31:51.546248 SCI is IRQ9
1764 17:31:51.549811 ACPI: added table 5/32, length now 56
1765 17:31:51.552801 current = 99b43ac0
1766 17:31:51.553303 ACPI: * DMAR
1767 17:31:51.555897 ACPI: added table 6/32, length now 60
1768 17:31:51.559429 ACPI: * IGD OpRegion
1769 17:31:51.562727 GMA: Found VBT in CBFS
1770 17:31:51.565891 GMA: Found valid VBT in CBFS
1771 17:31:51.569308 ACPI: added table 7/32, length now 64
1772 17:31:51.569896 ACPI: * HPET
1773 17:31:51.575313 ACPI: added table 8/32, length now 68
1774 17:31:51.575795 ACPI: done.
1775 17:31:51.578473 ACPI tables: 31744 bytes.
1776 17:31:51.582039 smbios_write_tables: 99a2c000
1777 17:31:51.585162 EC returned error result code 3
1778 17:31:51.588349 Couldn't obtain OEM name from CBI
1779 17:31:51.591850 Create SMBIOS type 17
1780 17:31:51.595216 PCI: 00:00.0 (Intel Cannonlake)
1781 17:31:51.595699 PCI: 00:14.3 (Intel WiFi)
1782 17:31:51.598373 SMBIOS tables: 939 bytes.
1783 17:31:51.604869 Writing table forward entry at 0x00000500
1784 17:31:51.608357 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1785 17:31:51.614694 Writing coreboot table at 0x99b62000
1786 17:31:51.617927 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1787 17:31:51.624359 1. 0000000000001000-000000000009ffff: RAM
1788 17:31:51.627582 2. 00000000000a0000-00000000000fffff: RESERVED
1789 17:31:51.631194 3. 0000000000100000-0000000099a2bfff: RAM
1790 17:31:51.637863 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1791 17:31:51.644296 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1792 17:31:51.647218 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1793 17:31:51.653787 7. 000000009a000000-000000009f7fffff: RESERVED
1794 17:31:51.656996 8. 00000000e0000000-00000000efffffff: RESERVED
1795 17:31:51.663394 9. 00000000fc000000-00000000fc000fff: RESERVED
1796 17:31:51.666837 10. 00000000fe000000-00000000fe00ffff: RESERVED
1797 17:31:51.673524 11. 00000000fed10000-00000000fed17fff: RESERVED
1798 17:31:51.676722 12. 00000000fed80000-00000000fed83fff: RESERVED
1799 17:31:51.683106 13. 00000000fed90000-00000000fed91fff: RESERVED
1800 17:31:51.686589 14. 00000000feda0000-00000000feda1fff: RESERVED
1801 17:31:51.689980 15. 0000000100000000-000000045e7fffff: RAM
1802 17:31:51.696308 Graphics framebuffer located at 0xc0000000
1803 17:31:51.699776 Passing 5 GPIOs to payload:
1804 17:31:51.702714 NAME | PORT | POLARITY | VALUE
1805 17:31:51.709459 write protect | undefined | high | low
1806 17:31:51.715866 lid | undefined | high | high
1807 17:31:51.718989 power | undefined | high | low
1808 17:31:51.725390 oprom | undefined | high | low
1809 17:31:51.728693 EC in RW | 0x000000cb | high | low
1810 17:31:51.732046 Board ID: 4
1811 17:31:51.735576 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1812 17:31:51.738725 CBFS @ c08000 size 3f8000
1813 17:31:51.745419 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1814 17:31:51.751773 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d36
1815 17:31:51.755051 coreboot table: 1492 bytes.
1816 17:31:51.758166 IMD ROOT 0. 99fff000 00001000
1817 17:31:51.761588 IMD SMALL 1. 99ffe000 00001000
1818 17:31:51.764769 FSP MEMORY 2. 99c4e000 003b0000
1819 17:31:51.768319 CONSOLE 3. 99c2e000 00020000
1820 17:31:51.771387 FMAP 4. 99c2d000 0000054e
1821 17:31:51.774691 TIME STAMP 5. 99c2c000 00000910
1822 17:31:51.777775 VBOOT WORK 6. 99c18000 00014000
1823 17:31:51.781189 MRC DATA 7. 99c16000 00001958
1824 17:31:51.784366 ROMSTG STCK 8. 99c15000 00001000
1825 17:31:51.787532 AFTER CAR 9. 99c0b000 0000a000
1826 17:31:51.790842 RAMSTAGE 10. 99baf000 0005c000
1827 17:31:51.794277 REFCODE 11. 99b7a000 00035000
1828 17:31:51.797161 SMM BACKUP 12. 99b6a000 00010000
1829 17:31:51.800600 COREBOOT 13. 99b62000 00008000
1830 17:31:51.803946 ACPI 14. 99b3e000 00024000
1831 17:31:51.807201 ACPI GNVS 15. 99b3d000 00001000
1832 17:31:51.810560 RAMOOPS 16. 99a3d000 00100000
1833 17:31:51.814082 TPM2 TCGLOG17. 99a2d000 00010000
1834 17:31:51.817075 SMBIOS 18. 99a2c000 00000800
1835 17:31:51.819933 IMD small region:
1836 17:31:51.823453 IMD ROOT 0. 99ffec00 00000400
1837 17:31:51.826663 FSP RUNTIME 1. 99ffebe0 00000004
1838 17:31:51.829842 EC HOSTEVENT 2. 99ffebc0 00000008
1839 17:31:51.833178 POWER STATE 3. 99ffeb80 00000040
1840 17:31:51.836269 ROMSTAGE 4. 99ffeb60 00000004
1841 17:31:51.839688 MEM INFO 5. 99ffe9a0 000001b9
1842 17:31:51.843218 VPD 6. 99ffe940 0000004c
1843 17:31:51.846523 MTRR: Physical address space:
1844 17:31:51.852837 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1845 17:31:51.859028 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1846 17:31:51.865970 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1847 17:31:51.872238 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1848 17:31:51.878884 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1849 17:31:51.885262 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1850 17:31:51.891807 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1851 17:31:51.894701 MTRR: Fixed MSR 0x250 0x0606060606060606
1852 17:31:51.898106 MTRR: Fixed MSR 0x258 0x0606060606060606
1853 17:31:51.901589 MTRR: Fixed MSR 0x259 0x0000000000000000
1854 17:31:51.907979 MTRR: Fixed MSR 0x268 0x0606060606060606
1855 17:31:51.911412 MTRR: Fixed MSR 0x269 0x0606060606060606
1856 17:31:51.914691 MTRR: Fixed MSR 0x26a 0x0606060606060606
1857 17:31:51.917860 MTRR: Fixed MSR 0x26b 0x0606060606060606
1858 17:31:51.924140 MTRR: Fixed MSR 0x26c 0x0606060606060606
1859 17:31:51.927677 MTRR: Fixed MSR 0x26d 0x0606060606060606
1860 17:31:51.930842 MTRR: Fixed MSR 0x26e 0x0606060606060606
1861 17:31:51.934097 MTRR: Fixed MSR 0x26f 0x0606060606060606
1862 17:31:51.937556 call enable_fixed_mtrr()
1863 17:31:51.941108 CPU physical address size: 39 bits
1864 17:31:51.947677 MTRR: default type WB/UC MTRR counts: 6/8.
1865 17:31:51.950979 MTRR: WB selected as default type.
1866 17:31:51.957602 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1867 17:31:51.963965 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1868 17:31:51.967317 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1869 17:31:51.973348 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1870 17:31:51.980090 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1871 17:31:51.986442 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1872 17:31:51.993050 MTRR: Fixed MSR 0x250 0x0606060606060606
1873 17:31:51.996110 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 17:31:51.999399 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 17:31:52.003054 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 17:31:52.009297 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 17:31:52.012585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 17:31:52.015982 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 17:31:52.019133 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 17:31:52.025343 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 17:31:52.028754 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 17:31:52.031963 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 17:31:52.032451
1884 17:31:52.035286 MTRR check
1885 17:31:52.035798 Fixed MTRRs : Enabled
1886 17:31:52.038738 Variable MTRRs: Enabled
1887 17:31:52.039312
1888 17:31:52.042091 call enable_fixed_mtrr()
1889 17:31:52.048466 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1890 17:31:52.051688 CPU physical address size: 39 bits
1891 17:31:52.054821 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1892 17:31:52.061458 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 17:31:52.064582 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 17:31:52.067888 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 17:31:52.071475 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 17:31:52.077840 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 17:31:52.081145 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 17:31:52.084298 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 17:31:52.087788 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 17:31:52.094194 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 17:31:52.097526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 17:31:52.100998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 17:31:52.107171 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 17:31:52.107720 call enable_fixed_mtrr()
1905 17:31:52.113967 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 17:31:52.117003 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 17:31:52.120263 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 17:31:52.123483 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 17:31:52.129821 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 17:31:52.133520 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 17:31:52.136562 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 17:31:52.139771 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 17:31:52.146331 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 17:31:52.149498 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 17:31:52.152863 CPU physical address size: 39 bits
1916 17:31:52.155785 call enable_fixed_mtrr()
1917 17:31:52.159048 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 17:31:52.162505 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 17:31:52.169146 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 17:31:52.172226 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 17:31:52.175774 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 17:31:52.178933 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 17:31:52.185120 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 17:31:52.188430 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 17:31:52.191810 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 17:31:52.198645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 17:31:52.201663 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 17:31:52.204633 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 17:31:52.207944 call enable_fixed_mtrr()
1930 17:31:52.211347 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 17:31:52.214958 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 17:31:52.221009 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 17:31:52.224291 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 17:31:52.227519 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 17:31:52.231078 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 17:31:52.237312 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 17:31:52.241080 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 17:31:52.243985 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 17:31:52.247588 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 17:31:52.253776 CPU physical address size: 39 bits
1941 17:31:52.254409 call enable_fixed_mtrr()
1942 17:31:52.260133 CPU physical address size: 39 bits
1943 17:31:52.263433 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 17:31:52.266943 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 17:31:52.270266 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 17:31:52.277037 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 17:31:52.280082 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 17:31:52.283490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 17:31:52.286203 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 17:31:52.292651 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 17:31:52.296417 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 17:31:52.299225 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 17:31:52.302785 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 17:31:52.309511 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 17:31:52.309999 call enable_fixed_mtrr()
1956 17:31:52.316150 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 17:31:52.319268 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 17:31:52.322695 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 17:31:52.326020 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 17:31:52.332297 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 17:31:52.335629 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 17:31:52.338811 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 17:31:52.342387 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 17:31:52.349147 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 17:31:52.351861 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 17:31:52.355161 CPU physical address size: 39 bits
1967 17:31:52.358778 call enable_fixed_mtrr()
1968 17:31:52.361694 CPU physical address size: 39 bits
1969 17:31:52.365362 CBFS @ c08000 size 3f8000
1970 17:31:52.371680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1971 17:31:52.375033 CBFS: Locating 'fallback/payload'
1972 17:31:52.378391 CPU physical address size: 39 bits
1973 17:31:52.381594 CBFS: Found @ offset 1c96c0 size 3f798
1974 17:31:52.384360 Checking segment from ROM address 0xffdd16f8
1975 17:31:52.390856 Checking segment from ROM address 0xffdd1714
1976 17:31:52.394440 Loading segment from ROM address 0xffdd16f8
1977 17:31:52.397927 code (compression=0)
1978 17:31:52.404334 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1979 17:31:52.414111 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1980 17:31:52.417370 it's not compressed!
1981 17:31:52.508068 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1982 17:31:52.514614 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1983 17:31:52.520919 Loading segment from ROM address 0xffdd1714
1984 17:31:52.521489 Entry Point 0x30000000
1985 17:31:52.524081 Loaded segments
1986 17:31:52.530295 Finalizing chipset.
1987 17:31:52.533304 Finalizing SMM.
1988 17:31:52.536575 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1989 17:31:52.539993 mp_park_aps done after 0 msecs.
1990 17:31:52.546785 Jumping to boot code at 30000000(99b62000)
1991 17:31:52.553153 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1992 17:31:52.553744
1993 17:31:52.556303 Starting depthcharge on Helios...
1994 17:31:52.557576 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1995 17:31:52.558171 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1996 17:31:52.558638 Setting prompt string to ['hatch:']
1997 17:31:52.559132 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1998 17:31:52.566434 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1999 17:31:52.572702 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2000 17:31:52.579356 board_setup: Info: eMMC controller not present; skipping
2001 17:31:52.582549 New NVMe Controller 0x30053ac0 @ 00:1d:00
2002 17:31:52.589010 board_setup: Info: SDHCI controller not present; skipping
2003 17:31:52.595444 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2004 17:31:52.595925 Wipe memory regions:
2005 17:31:52.602267 [0x00000000001000, 0x000000000a0000)
2006 17:31:52.605163 [0x00000000100000, 0x00000030000000)
2007 17:31:52.669162 [0x00000030657430, 0x00000099a2c000)
2008 17:31:52.802181 [0x00000100000000, 0x0000045e800000)
2009 17:31:54.120870 R8152: Initializing
2010 17:31:54.124248 Version 9 (ocp_data = 6010)
2011 17:31:54.128566 R8152: Done initializing
2012 17:31:54.131583 Adding net device
2013 17:31:54.501078 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2014 17:31:54.501645
2015 17:31:54.502522 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2017 17:31:54.604494 hatch: tftpboot 192.168.201.1 6962853/tftp-deploy-ksrn35rs/kernel/bzImage 6962853/tftp-deploy-ksrn35rs/kernel/cmdline 6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
2018 17:31:54.605189 Setting prompt string to 'Starting kernel'
2019 17:31:54.605634 Setting prompt string to ['Starting kernel']
2020 17:31:54.606027 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2021 17:31:54.606440 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2022 17:31:54.610052 tftpboot 192.168.201.1 6962853/tftp-deploy-ksrn35rs/kernel/bzImoy-ksrn35rs/kernel/cmdline 6962853/tftp-deploy-ksrn35rs/ramdisk/ramdisk.cpio.gz
2023 17:31:54.610550 Waiting for link
2024 17:31:54.811195 done.
2025 17:31:54.811778 MAC: f4:f5:e8:50:e7:f3
2026 17:31:54.814309 Sending DHCP discover... done.
2027 17:31:54.817384 Waiting for reply... done.
2028 17:31:54.820495 Sending DHCP request... done.
2029 17:31:54.823959 Waiting for reply... done.
2030 17:31:54.827486 My ip is 192.168.201.16
2031 17:31:54.830444 The DHCP server ip is 192.168.201.1
2032 17:31:54.837060 TFTP server IP predefined by user: 192.168.201.1
2033 17:31:54.843384 Bootfile predefined by user: 6962853/tftp-deploy-ksrn35rs/kernel/bzImage
2034 17:31:54.846755 Sending tftp read request... done.
2035 17:31:54.849774 Waiting for the transfer...
2036 17:31:55.130238 00000000 ################################################################
2037 17:31:55.432626 00080000 ################################################################
2038 17:31:55.718876 00100000 ################################################################
2039 17:31:56.012594 00180000 ################################################################
2040 17:31:56.316867 00200000 ################################################################
2041 17:31:56.584814 00280000 ################################################################
2042 17:31:56.841030 00300000 ################################################################
2043 17:31:57.123486 00380000 ################################################################
2044 17:31:57.418864 00400000 ################################################################
2045 17:31:57.725883 00480000 ################################################################
2046 17:31:58.044609 00500000 ################################################################
2047 17:31:58.364179 00580000 ################################################################
2048 17:31:58.666812 00600000 ################################################################ done.
2049 17:31:58.670180 The bootfile was 6815632 bytes long.
2050 17:31:58.673531 Sending tftp read request... done.
2051 17:31:58.676654 Waiting for the transfer...
2052 17:31:59.046171 00000000 ################################################################
2053 17:31:59.432182 00080000 ################################################################
2054 17:31:59.809733 00100000 ################################################################
2055 17:32:00.161901 00180000 ################################################################
2056 17:32:00.418628 00200000 ################################################################
2057 17:32:00.695338 00280000 ################################################################
2058 17:32:00.957284 00300000 ################################################################
2059 17:32:01.245805 00380000 ################################################################
2060 17:32:01.538310 00400000 ################################################################
2061 17:32:01.833458 00480000 ################################################################
2062 17:32:01.949255 00500000 ############################# done.
2063 17:32:01.952755 Sending tftp read request... done.
2064 17:32:01.955931 Waiting for the transfer...
2065 17:32:01.956023 00000000 # done.
2066 17:32:01.966007 Command line loaded dynamically from TFTP file: 6962853/tftp-deploy-ksrn35rs/kernel/cmdline
2067 17:32:01.992064 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6962853/extract-nfsrootfs-cq4cj3yi,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2068 17:32:01.998589 ec_init(0): CrosEC protocol v3 supported (256, 256)
2069 17:32:02.005125 Shutting down all USB controllers.
2070 17:32:02.005575 Removing current net device
2071 17:32:02.008677 Finalizing coreboot
2072 17:32:02.015764 Exiting depthcharge with code 4 at timestamp: 16752790
2073 17:32:02.016365
2074 17:32:02.016761 Starting kernel ...
2075 17:32:02.017661 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2076 17:32:02.018207 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2077 17:32:02.018630 Setting prompt string to ['Linux version [0-9]']
2078 17:32:02.019075 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2079 17:32:02.019486 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2080 17:32:02.020467
2081 17:32:02.020888
2083 17:36:33.019134 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2085 17:36:33.020302 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2087 17:36:33.021199 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2090 17:36:33.022995 end: 2 depthcharge-action (duration 00:05:00) [common]
2092 17:36:33.024154 Cleaning after the job
2093 17:36:33.024606 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/ramdisk
2094 17:36:33.026887 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/kernel
2095 17:36:33.029551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/nfsrootfs
2096 17:36:33.104697 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962853/tftp-deploy-ksrn35rs/modules
2097 17:36:33.104993 start: 4.1 power-off (timeout 00:00:30) [common]
2098 17:36:33.105172 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2099 17:36:33.124421 >> Command sent successfully.
2100 17:36:33.126270 Returned 0 in 0 seconds
2101 17:36:33.227400 end: 4.1 power-off (duration 00:00:00) [common]
2103 17:36:33.228941 start: 4.2 read-feedback (timeout 00:10:00) [common]
2104 17:36:33.230206 Listened to connection for namespace 'common' for up to 1s
2105 17:36:34.230994 Finalising connection for namespace 'common'
2106 17:36:34.231293 Disconnecting from shell: Finalise
2107 17:36:34.332222 end: 4.2 read-feedback (duration 00:00:01) [common]
2108 17:36:34.332399 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6962853
2109 17:36:34.485965 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6962853
2110 17:36:34.486138 JobError: Your job cannot terminate cleanly.