Boot log: asus-C436FA-Flip-hatch

    1 09:52:17.376771  lava-dispatcher, installed at version: 2022.06
    2 09:52:17.376974  start: 0 validate
    3 09:52:17.377107  Start time: 2022-08-12 09:52:17.377099+00:00 (UTC)
    4 09:52:17.377241  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:52:17.377368  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
    6 09:52:17.669660  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:52:17.670403  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:52:17.958170  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:52:17.958875  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 09:52:18.260226  validate duration: 0.88
   12 09:52:18.261581  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 09:52:18.262158  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 09:52:18.262702  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 09:52:18.263278  Not decompressing ramdisk as can be used compressed.
   16 09:52:18.263753  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
   17 09:52:18.264116  saving as /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/ramdisk/rootfs.cpio.gz
   18 09:52:18.264460  total size: 8415960 (8MB)
   19 09:52:18.269794  progress   0% (0MB)
   20 09:52:18.281700  progress   5% (0MB)
   21 09:52:18.288729  progress  10% (0MB)
   22 09:52:18.294161  progress  15% (1MB)
   23 09:52:18.298499  progress  20% (1MB)
   24 09:52:18.302294  progress  25% (2MB)
   25 09:52:18.305754  progress  30% (2MB)
   26 09:52:18.308534  progress  35% (2MB)
   27 09:52:18.311429  progress  40% (3MB)
   28 09:52:18.314088  progress  45% (3MB)
   29 09:52:18.316716  progress  50% (4MB)
   30 09:52:18.319081  progress  55% (4MB)
   31 09:52:18.321365  progress  60% (4MB)
   32 09:52:18.323353  progress  65% (5MB)
   33 09:52:18.325481  progress  70% (5MB)
   34 09:52:18.327577  progress  75% (6MB)
   35 09:52:18.329606  progress  80% (6MB)
   36 09:52:18.331684  progress  85% (6MB)
   37 09:52:18.333713  progress  90% (7MB)
   38 09:52:18.335650  progress  95% (7MB)
   39 09:52:18.337697  progress 100% (8MB)
   40 09:52:18.337965  8MB downloaded in 0.07s (109.19MB/s)
   41 09:52:18.338117  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 09:52:18.338362  end: 1.1 download-retry (duration 00:00:00) [common]
   44 09:52:18.338451  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 09:52:18.338537  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 09:52:18.338640  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 09:52:18.338706  saving as /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/kernel/bzImage
   48 09:52:18.338766  total size: 6815632 (6MB)
   49 09:52:18.338825  No compression specified
   50 09:52:18.339903  progress   0% (0MB)
   51 09:52:18.341627  progress   5% (0MB)
   52 09:52:18.343285  progress  10% (0MB)
   53 09:52:18.345064  progress  15% (1MB)
   54 09:52:18.346667  progress  20% (1MB)
   55 09:52:18.348328  progress  25% (1MB)
   56 09:52:18.350104  progress  30% (1MB)
   57 09:52:18.351807  progress  35% (2MB)
   58 09:52:18.353610  progress  40% (2MB)
   59 09:52:18.355213  progress  45% (2MB)
   60 09:52:18.356801  progress  50% (3MB)
   61 09:52:18.358544  progress  55% (3MB)
   62 09:52:18.360143  progress  60% (3MB)
   63 09:52:18.361881  progress  65% (4MB)
   64 09:52:18.363485  progress  70% (4MB)
   65 09:52:18.365062  progress  75% (4MB)
   66 09:52:18.366796  progress  80% (5MB)
   67 09:52:18.368419  progress  85% (5MB)
   68 09:52:18.370166  progress  90% (5MB)
   69 09:52:18.371802  progress  95% (6MB)
   70 09:52:18.373419  progress 100% (6MB)
   71 09:52:18.373709  6MB downloaded in 0.03s (186.04MB/s)
   72 09:52:18.373858  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 09:52:18.374094  end: 1.2 download-retry (duration 00:00:00) [common]
   75 09:52:18.374182  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 09:52:18.374267  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 09:52:18.374397  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 09:52:18.374476  saving as /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/modules/modules.tar
   79 09:52:18.374537  total size: 51724 (0MB)
   80 09:52:18.374597  Using unxz to decompress xz
   81 09:52:18.378021  progress  63% (0MB)
   82 09:52:18.378388  progress 100% (0MB)
   83 09:52:18.381658  0MB downloaded in 0.01s (6.93MB/s)
   84 09:52:18.381887  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 09:52:18.382144  end: 1.3 download-retry (duration 00:00:00) [common]
   87 09:52:18.382239  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   88 09:52:18.382338  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
   89 09:52:18.382423  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 09:52:18.382510  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
   91 09:52:18.382673  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9
   92 09:52:18.382779  makedir: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin
   93 09:52:18.382863  makedir: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/tests
   94 09:52:18.382988  makedir: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/results
   95 09:52:18.383093  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-add-keys
   96 09:52:18.383222  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-add-sources
   97 09:52:18.383336  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-background-process-start
   98 09:52:18.383447  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-background-process-stop
   99 09:52:18.383565  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-common-functions
  100 09:52:18.383675  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-echo-ipv4
  101 09:52:18.383785  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-install-packages
  102 09:52:18.383894  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-installed-packages
  103 09:52:18.384000  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-os-build
  104 09:52:18.384109  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-probe-channel
  105 09:52:18.384217  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-probe-ip
  106 09:52:18.384324  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-target-ip
  107 09:52:18.384430  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-target-mac
  108 09:52:18.384537  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-target-storage
  109 09:52:18.384647  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-case
  110 09:52:18.384754  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-event
  111 09:52:18.384860  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-feedback
  112 09:52:18.384965  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-raise
  113 09:52:18.385074  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-reference
  114 09:52:18.385180  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-runner
  115 09:52:18.385285  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-set
  116 09:52:18.385391  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-test-shell
  117 09:52:18.385500  Updating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-install-packages (oe)
  118 09:52:18.385621  Updating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/bin/lava-installed-packages (oe)
  119 09:52:18.385719  Creating /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/environment
  120 09:52:18.385807  LAVA metadata
  121 09:52:18.385885  - LAVA_JOB_ID=7022983
  122 09:52:18.385952  - LAVA_DISPATCHER_IP=192.168.201.1
  123 09:52:18.386056  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  124 09:52:18.386121  skipped lava-vland-overlay
  125 09:52:18.386198  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 09:52:18.386283  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  127 09:52:18.386348  skipped lava-multinode-overlay
  128 09:52:18.386422  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 09:52:18.386503  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  130 09:52:18.386578  Loading test definitions
  131 09:52:18.386672  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  132 09:52:18.386750  Using /lava-7022983 at stage 0
  133 09:52:18.387053  uuid=7022983_1.4.2.3.1 testdef=None
  134 09:52:18.387143  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 09:52:18.387231  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  136 09:52:18.387729  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 09:52:18.387961  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  139 09:52:18.388528  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 09:52:18.388777  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  142 09:52:18.389310  runner path: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/0/tests/0_dmesg test_uuid 7022983_1.4.2.3.1
  143 09:52:18.389458  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 09:52:18.389688  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  146 09:52:18.389761  Using /lava-7022983 at stage 1
  147 09:52:18.390008  uuid=7022983_1.4.2.3.5 testdef=None
  148 09:52:18.390097  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 09:52:18.390182  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  150 09:52:18.390617  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 09:52:18.390842  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  153 09:52:18.391424  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 09:52:18.391663  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  156 09:52:18.392216  runner path: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/1/tests/1_bootrr test_uuid 7022983_1.4.2.3.5
  157 09:52:18.392356  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 09:52:18.392565  Creating lava-test-runner.conf files
  160 09:52:18.392630  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/0 for stage 0
  161 09:52:18.392711  - 0_dmesg
  162 09:52:18.392787  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022983/lava-overlay-78ojlra9/lava-7022983/1 for stage 1
  163 09:52:18.392868  - 1_bootrr
  164 09:52:18.392958  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 09:52:18.393046  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  166 09:52:18.399183  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 09:52:18.399291  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  168 09:52:18.399383  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 09:52:18.399470  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 09:52:18.399557  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  171 09:52:18.584347  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 09:52:18.584691  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  173 09:52:18.584801  extracting modules file /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022983/extract-overlay-ramdisk-vmyvxwfq/ramdisk
  174 09:52:18.588926  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 09:52:18.589037  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  176 09:52:18.589127  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022983/compress-overlay-cwe_tare/overlay-1.4.2.4.tar.gz to ramdisk
  177 09:52:18.589201  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022983/compress-overlay-cwe_tare/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022983/extract-overlay-ramdisk-vmyvxwfq/ramdisk
  178 09:52:18.592888  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 09:52:18.592999  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  180 09:52:18.593089  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 09:52:18.593181  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  182 09:52:18.593258  Building ramdisk /var/lib/lava/dispatcher/tmp/7022983/extract-overlay-ramdisk-vmyvxwfq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022983/extract-overlay-ramdisk-vmyvxwfq/ramdisk
  183 09:52:18.657099  >> 48006 blocks

  184 09:52:19.403547  rename /var/lib/lava/dispatcher/tmp/7022983/extract-overlay-ramdisk-vmyvxwfq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
  185 09:52:19.403965  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 09:52:19.404083  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  187 09:52:19.404180  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  188 09:52:19.404270  No mkimage arch provided, not using FIT.
  189 09:52:19.404358  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 09:52:19.404442  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 09:52:19.404539  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 09:52:19.404634  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  193 09:52:19.404713  No LXC device requested
  194 09:52:19.404806  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 09:52:19.404903  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  196 09:52:19.404985  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 09:52:19.405057  Checking files for TFTP limit of 4294967296 bytes.
  198 09:52:19.405445  end: 1 tftp-deploy (duration 00:00:01) [common]
  199 09:52:19.405547  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 09:52:19.405639  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 09:52:19.405766  substitutions:
  202 09:52:19.405836  - {DTB}: None
  203 09:52:19.405901  - {INITRD}: 7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
  204 09:52:19.405961  - {KERNEL}: 7022983/tftp-deploy-evx5htap/kernel/bzImage
  205 09:52:19.406019  - {LAVA_MAC}: None
  206 09:52:19.406075  - {PRESEED_CONFIG}: None
  207 09:52:19.406132  - {PRESEED_LOCAL}: None
  208 09:52:19.406186  - {RAMDISK}: 7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
  209 09:52:19.406242  - {ROOT_PART}: None
  210 09:52:19.406295  - {ROOT}: None
  211 09:52:19.406350  - {SERVER_IP}: 192.168.201.1
  212 09:52:19.406404  - {TEE}: None
  213 09:52:19.406458  Parsed boot commands:
  214 09:52:19.406512  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 09:52:19.406661  Parsed boot commands: tftpboot 192.168.201.1 7022983/tftp-deploy-evx5htap/kernel/bzImage 7022983/tftp-deploy-evx5htap/kernel/cmdline 7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
  216 09:52:19.406750  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 09:52:19.406845  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 09:52:19.406947  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 09:52:19.407037  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 09:52:19.407108  Not connected, no need to disconnect.
  221 09:52:19.407185  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 09:52:19.407266  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 09:52:19.407332  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
  224 09:52:19.410072  Setting prompt string to ['lava-test: # ']
  225 09:52:19.410351  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 09:52:19.410455  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 09:52:19.410553  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 09:52:19.410641  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 09:52:19.410807  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
  230 09:52:19.429917  >> Command sent successfully.

  231 09:52:19.431853  Returned 0 in 0 seconds
  232 09:52:19.532632  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 09:52:19.533184  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 09:52:19.533282  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 09:52:19.533369  Setting prompt string to 'Starting depthcharge on Helios...'
  237 09:52:19.533443  Changing prompt to 'Starting depthcharge on Helios...'
  238 09:52:19.533513  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  239 09:52:19.533784  [Enter `^Ec?' for help]
  240 09:52:26.089406  
  241 09:52:26.089570  
  242 09:52:26.098998  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  243 09:52:26.102304  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  244 09:52:26.109086  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  245 09:52:26.112084  CPU: AES supported, TXT NOT supported, VT supported
  246 09:52:26.118788  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  247 09:52:26.125243  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  248 09:52:26.128457  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  249 09:52:26.131919  VBOOT: Loading verstage.
  250 09:52:26.138424  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  251 09:52:26.141788  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  252 09:52:26.148528  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  253 09:52:26.148617  CBFS @ c08000 size 3f8000
  254 09:52:26.154972  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  255 09:52:26.158131  CBFS: Locating 'fallback/verstage'
  256 09:52:26.164596  CBFS: Found @ offset 10fb80 size 1072c
  257 09:52:26.164683  
  258 09:52:26.164751  
  259 09:52:26.174550  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  260 09:52:26.190350  Probing TPM: . done!
  261 09:52:26.193470  TPM ready after 0 ms
  262 09:52:26.196946  Connected to device vid:did:rid of 1ae0:0028:00
  263 09:52:26.207223  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  264 09:52:26.210597  Initialized TPM device CR50 revision 0
  265 09:52:26.255168  tlcl_send_startup: Startup return code is 0
  266 09:52:26.255309  TPM: setup succeeded
  267 09:52:26.268010  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  268 09:52:26.271852  Chrome EC: UHEPI supported
  269 09:52:26.275161  Phase 1
  270 09:52:26.278312  FMAP: area GBB found @ c05000 (12288 bytes)
  271 09:52:26.284995  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  272 09:52:26.288305  Phase 2
  273 09:52:26.288391  Phase 3
  274 09:52:26.291345  FMAP: area GBB found @ c05000 (12288 bytes)
  275 09:52:26.298001  VB2:vb2_report_dev_firmware() This is developer signed firmware
  276 09:52:26.304557  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  277 09:52:26.307837  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  278 09:52:26.314408  VB2:vb2_verify_keyblock() Checking keyblock signature...
  279 09:52:26.330502  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  280 09:52:26.333726  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  281 09:52:26.340486  VB2:vb2_verify_fw_preamble() Verifying preamble.
  282 09:52:26.344744  Phase 4
  283 09:52:26.348202  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  284 09:52:26.357781  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  285 09:52:26.534308  VB2:vb2_rsa_verify_digest() Digest check failed!
  286 09:52:26.540705  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  287 09:52:26.540835  Saving nvdata
  288 09:52:26.543848  Reboot requested (10020007)
  289 09:52:26.547083  board_reset() called!
  290 09:52:26.547200  full_reset() called!
  291 09:52:31.056657  
  292 09:52:31.056975  
  293 09:52:31.066675  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  294 09:52:31.070102  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  295 09:52:31.076431  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  296 09:52:31.079689  CPU: AES supported, TXT NOT supported, VT supported
  297 09:52:31.086363  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  298 09:52:31.092701  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  299 09:52:31.096056  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  300 09:52:31.099358  VBOOT: Loading verstage.
  301 09:52:31.105829  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  302 09:52:31.109295  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  303 09:52:31.116290  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  304 09:52:31.116611  CBFS @ c08000 size 3f8000
  305 09:52:31.122380  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  306 09:52:31.125910  CBFS: Locating 'fallback/verstage'
  307 09:52:31.132240  CBFS: Found @ offset 10fb80 size 1072c
  308 09:52:31.132570  
  309 09:52:31.132785  
  310 09:52:31.141902  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  311 09:52:31.157772  Probing TPM: . done!
  312 09:52:31.160982  TPM ready after 0 ms
  313 09:52:31.164708  Connected to device vid:did:rid of 1ae0:0028:00
  314 09:52:31.174405  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  315 09:52:31.178358  Initialized TPM device CR50 revision 0
  316 09:52:31.222515  tlcl_send_startup: Startup return code is 0
  317 09:52:31.222701  TPM: setup succeeded
  318 09:52:31.234940  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  319 09:52:31.238931  Chrome EC: UHEPI supported
  320 09:52:31.242118  Phase 1
  321 09:52:31.245340  FMAP: area GBB found @ c05000 (12288 bytes)
  322 09:52:31.252244  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  323 09:52:31.258715  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  324 09:52:31.262015  Recovery requested (1009000e)
  325 09:52:31.267925  Saving nvdata
  326 09:52:31.274305  tlcl_extend: response is 0
  327 09:52:31.282666  tlcl_extend: response is 0
  328 09:52:31.289691  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  329 09:52:31.293144  CBFS @ c08000 size 3f8000
  330 09:52:31.299564  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  331 09:52:31.302792  CBFS: Locating 'fallback/romstage'
  332 09:52:31.306062  CBFS: Found @ offset 80 size 145fc
  333 09:52:31.309298  Accumulated console time in verstage 98 ms
  334 09:52:31.309557  
  335 09:52:31.309764  
  336 09:52:31.322704  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  337 09:52:31.329074  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  338 09:52:31.332426  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  339 09:52:31.336120  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  340 09:52:31.342406  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  341 09:52:31.345839  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  342 09:52:31.348962  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  343 09:52:31.352348  TCO_STS:   0000 0000
  344 09:52:31.355640  GEN_PMCON: e0015238 00000200
  345 09:52:31.358633  GBLRST_CAUSE: 00000000 00000000
  346 09:52:31.358922  prev_sleep_state 5
  347 09:52:31.362545  Boot Count incremented to 28575
  348 09:52:31.369406  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  349 09:52:31.372575  CBFS @ c08000 size 3f8000
  350 09:52:31.379175  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  351 09:52:31.379424  CBFS: Locating 'fspm.bin'
  352 09:52:31.385948  CBFS: Found @ offset 5ffc0 size 71000
  353 09:52:31.389284  Chrome EC: UHEPI supported
  354 09:52:31.395773  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  355 09:52:31.399305  Probing TPM:  done!
  356 09:52:31.405954  Connected to device vid:did:rid of 1ae0:0028:00
  357 09:52:31.415962  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  358 09:52:31.422436  Initialized TPM device CR50 revision 0
  359 09:52:31.431967  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  360 09:52:31.441544  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  361 09:52:31.441800  MRC cache found, size 1948
  362 09:52:31.444914  bootmode is set to: 2
  363 09:52:31.447970  PRMRR disabled by config.
  364 09:52:31.451607  SPD INDEX = 1
  365 09:52:31.455165  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  366 09:52:31.458225  CBFS @ c08000 size 3f8000
  367 09:52:31.464770  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  368 09:52:31.465211  CBFS: Locating 'spd.bin'
  369 09:52:31.468053  CBFS: Found @ offset 5fb80 size 400
  370 09:52:31.471211  SPD: module type is LPDDR3
  371 09:52:31.474489  SPD: module part is 
  372 09:52:31.481214  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  373 09:52:31.484470  SPD: device width 4 bits, bus width 8 bits
  374 09:52:31.487783  SPD: module size is 4096 MB (per channel)
  375 09:52:31.490870  memory slot: 0 configuration done.
  376 09:52:31.494345  memory slot: 2 configuration done.
  377 09:52:31.545974  CBMEM:
  378 09:52:31.548926  IMD: root @ 99fff000 254 entries.
  379 09:52:31.552065  IMD: root @ 99ffec00 62 entries.
  380 09:52:31.555516  External stage cache:
  381 09:52:31.558827  IMD: root @ 9abff000 254 entries.
  382 09:52:31.562005  IMD: root @ 9abfec00 62 entries.
  383 09:52:31.568722  Chrome EC: clear events_b mask to 0x0000000020004000
  384 09:52:31.582537  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  385 09:52:31.597872  tlcl_write: response is 0
  386 09:52:31.607596  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  387 09:52:31.613847  MRC: TPM MRC hash updated successfully.
  388 09:52:31.614124  2 DIMMs found
  389 09:52:31.616995  SMM Memory Map
  390 09:52:31.620321  SMRAM       : 0x9a000000 0x1000000
  391 09:52:31.623837   Subregion 0: 0x9a000000 0xa00000
  392 09:52:31.627182   Subregion 1: 0x9aa00000 0x200000
  393 09:52:31.630453   Subregion 2: 0x9ac00000 0x400000
  394 09:52:31.633436  top_of_ram = 0x9a000000
  395 09:52:31.637020  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  396 09:52:31.643729  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  397 09:52:31.646809  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  398 09:52:31.653340  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 09:52:31.657040  CBFS @ c08000 size 3f8000
  400 09:52:31.659772  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 09:52:31.663525  CBFS: Locating 'fallback/postcar'
  402 09:52:31.669876  CBFS: Found @ offset 107000 size 4b44
  403 09:52:31.676230  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  404 09:52:31.686343  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  405 09:52:31.689578  Processing 180 relocs. Offset value of 0x97c0c000
  406 09:52:31.697781  Accumulated console time in romstage 285 ms
  407 09:52:31.698020  
  408 09:52:31.698211  
  409 09:52:31.707848  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  410 09:52:31.714422  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  411 09:52:31.717383  CBFS @ c08000 size 3f8000
  412 09:52:31.724119  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  413 09:52:31.727529  CBFS: Locating 'fallback/ramstage'
  414 09:52:31.730709  CBFS: Found @ offset 43380 size 1b9e8
  415 09:52:31.737163  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  416 09:52:31.769895  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  417 09:52:31.773006  Processing 3976 relocs. Offset value of 0x98db0000
  418 09:52:31.779619  Accumulated console time in postcar 52 ms
  419 09:52:31.780058  
  420 09:52:31.780409  
  421 09:52:31.789718  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  422 09:52:31.796204  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  423 09:52:31.799427  WARNING: RO_VPD is uninitialized or empty.
  424 09:52:31.802488  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  425 09:52:31.809071  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  426 09:52:31.809471  Normal boot.
  427 09:52:31.815660  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  428 09:52:31.819161  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  429 09:52:31.822492  CBFS @ c08000 size 3f8000
  430 09:52:31.829052  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  431 09:52:31.832429  CBFS: Locating 'cpu_microcode_blob.bin'
  432 09:52:31.835480  CBFS: Found @ offset 14700 size 2ec00
  433 09:52:31.838808  microcode: sig=0x806ec pf=0x4 revision=0xc9
  434 09:52:31.842048  Skip microcode update
  435 09:52:31.848622  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  436 09:52:31.848945  CBFS @ c08000 size 3f8000
  437 09:52:31.855365  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  438 09:52:31.858565  CBFS: Locating 'fsps.bin'
  439 09:52:31.861661  CBFS: Found @ offset d1fc0 size 35000
  440 09:52:31.887691  Detected 4 core, 8 thread CPU.
  441 09:52:31.890832  Setting up SMI for CPU
  442 09:52:31.894278  IED base = 0x9ac00000
  443 09:52:31.897602  IED size = 0x00400000
  444 09:52:31.897956  Will perform SMM setup.
  445 09:52:31.904141  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  446 09:52:31.910707  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  447 09:52:31.917487  Processing 16 relocs. Offset value of 0x00030000
  448 09:52:31.917840  Attempting to start 7 APs
  449 09:52:31.923897  Waiting for 10ms after sending INIT.
  450 09:52:31.937280  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  451 09:52:31.937542  done.
  452 09:52:31.940743  AP: slot 4 apic_id 7.
  453 09:52:31.943871  AP: slot 5 apic_id 6.
  454 09:52:31.947426  Waiting for 2nd SIPI to complete...done.
  455 09:52:31.950421  AP: slot 6 apic_id 3.
  456 09:52:31.950655  AP: slot 7 apic_id 2.
  457 09:52:31.953707  AP: slot 2 apic_id 5.
  458 09:52:31.956918  AP: slot 3 apic_id 4.
  459 09:52:31.963567  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  460 09:52:31.970187  Processing 13 relocs. Offset value of 0x00038000
  461 09:52:31.976929  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  462 09:52:31.980416  Installing SMM handler to 0x9a000000
  463 09:52:31.986858  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  464 09:52:31.993263  Processing 658 relocs. Offset value of 0x9a010000
  465 09:52:32.000013  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  466 09:52:32.003114  Processing 13 relocs. Offset value of 0x9a008000
  467 09:52:32.009660  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  468 09:52:32.016469  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  469 09:52:32.022927  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  470 09:52:32.026392  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  471 09:52:32.033342  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  472 09:52:32.039684  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  473 09:52:32.046041  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  474 09:52:32.052756  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  475 09:52:32.055844  Clearing SMI status registers
  476 09:52:32.056082  SMI_STS: PM1 
  477 09:52:32.058973  PM1_STS: PWRBTN 
  478 09:52:32.059210  TCO_STS: SECOND_TO 
  479 09:52:32.062585  New SMBASE 0x9a000000
  480 09:52:32.065554  In relocation handler: CPU 0
  481 09:52:32.068801  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  482 09:52:32.075416  Writing SMRR. base = 0x9a000006, mask=0xff000800
  483 09:52:32.075656  Relocation complete.
  484 09:52:32.078830  New SMBASE 0x99fffc00
  485 09:52:32.082100  In relocation handler: CPU 1
  486 09:52:32.085301  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  487 09:52:32.091756  Writing SMRR. base = 0x9a000006, mask=0xff000800
  488 09:52:32.091993  Relocation complete.
  489 09:52:32.095070  New SMBASE 0x99ffec00
  490 09:52:32.098482  In relocation handler: CPU 5
  491 09:52:32.101816  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  492 09:52:32.108405  Writing SMRR. base = 0x9a000006, mask=0xff000800
  493 09:52:32.108642  Relocation complete.
  494 09:52:32.111664  New SMBASE 0x99ffe800
  495 09:52:32.114846  In relocation handler: CPU 6
  496 09:52:32.118303  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  497 09:52:32.124714  Writing SMRR. base = 0x9a000006, mask=0xff000800
  498 09:52:32.124951  Relocation complete.
  499 09:52:32.128470  New SMBASE 0x99ffe400
  500 09:52:32.131310  In relocation handler: CPU 7
  501 09:52:32.134540  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  502 09:52:32.137648  Writing SMRR. base = 0x9a000006, mask=0xff000800
  503 09:52:32.140992  Relocation complete.
  504 09:52:32.144499  New SMBASE 0x99fff000
  505 09:52:32.147710  In relocation handler: CPU 4
  506 09:52:32.150787  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  507 09:52:32.154262  Writing SMRR. base = 0x9a000006, mask=0xff000800
  508 09:52:32.157533  Relocation complete.
  509 09:52:32.160674  New SMBASE 0x99fff800
  510 09:52:32.164179  In relocation handler: CPU 2
  511 09:52:32.167698  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  512 09:52:32.170559  Writing SMRR. base = 0x9a000006, mask=0xff000800
  513 09:52:32.173730  Relocation complete.
  514 09:52:32.177037  New SMBASE 0x99fff400
  515 09:52:32.180509  In relocation handler: CPU 3
  516 09:52:32.183845  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  517 09:52:32.186717  Writing SMRR. base = 0x9a000006, mask=0xff000800
  518 09:52:32.190244  Relocation complete.
  519 09:52:32.193359  Initializing CPU #0
  520 09:52:32.196629  CPU: vendor Intel device 806ec
  521 09:52:32.200022  CPU: family 06, model 8e, stepping 0c
  522 09:52:32.203281  Clearing out pending MCEs
  523 09:52:32.203379  Setting up local APIC...
  524 09:52:32.206784   apic_id: 0x00 done.
  525 09:52:32.210170  Turbo is available but hidden
  526 09:52:32.213410  Turbo is available and visible
  527 09:52:32.216695  VMX status: enabled
  528 09:52:32.219803  IA32_FEATURE_CONTROL status: locked
  529 09:52:32.219888  Skip microcode update
  530 09:52:32.223136  CPU #0 initialized
  531 09:52:32.226723  Initializing CPU #1
  532 09:52:32.226814  Initializing CPU #7
  533 09:52:32.229563  Initializing CPU #6
  534 09:52:32.232840  CPU: vendor Intel device 806ec
  535 09:52:32.236634  CPU: family 06, model 8e, stepping 0c
  536 09:52:32.239913  CPU: vendor Intel device 806ec
  537 09:52:32.242945  CPU: family 06, model 8e, stepping 0c
  538 09:52:32.246164  Clearing out pending MCEs
  539 09:52:32.249379  Clearing out pending MCEs
  540 09:52:32.249480  Setting up local APIC...
  541 09:52:32.253002  CPU: vendor Intel device 806ec
  542 09:52:32.259600  CPU: family 06, model 8e, stepping 0c
  543 09:52:32.259692  Clearing out pending MCEs
  544 09:52:32.262619   apic_id: 0x02 done.
  545 09:52:32.265940  Setting up local APIC...
  546 09:52:32.269405  Setting up local APIC...
  547 09:52:32.269481  Initializing CPU #4
  548 09:52:32.272656  Initializing CPU #5
  549 09:52:32.276032  CPU: vendor Intel device 806ec
  550 09:52:32.279325  CPU: family 06, model 8e, stepping 0c
  551 09:52:32.282516  CPU: vendor Intel device 806ec
  552 09:52:32.285997  CPU: family 06, model 8e, stepping 0c
  553 09:52:32.289328  Clearing out pending MCEs
  554 09:52:32.292511  Clearing out pending MCEs
  555 09:52:32.292627  Setting up local APIC...
  556 09:52:32.295825   apic_id: 0x01 done.
  557 09:52:32.299088  Initializing CPU #3
  558 09:52:32.299199  Initializing CPU #2
  559 09:52:32.302310  Setting up local APIC...
  560 09:52:32.305612  VMX status: enabled
  561 09:52:32.305738  VMX status: enabled
  562 09:52:32.309006   apic_id: 0x03 done.
  563 09:52:32.312361  IA32_FEATURE_CONTROL status: locked
  564 09:52:32.315673  VMX status: enabled
  565 09:52:32.315831  Skip microcode update
  566 09:52:32.318949  IA32_FEATURE_CONTROL status: locked
  567 09:52:32.322359  CPU #7 initialized
  568 09:52:32.325602  Skip microcode update
  569 09:52:32.328703  IA32_FEATURE_CONTROL status: locked
  570 09:52:32.328915   apic_id: 0x06 done.
  571 09:52:32.332034   apic_id: 0x07 done.
  572 09:52:32.335372  VMX status: enabled
  573 09:52:32.335582  VMX status: enabled
  574 09:52:32.338853  IA32_FEATURE_CONTROL status: locked
  575 09:52:32.342034  IA32_FEATURE_CONTROL status: locked
  576 09:52:32.345333  Skip microcode update
  577 09:52:32.348773  CPU: vendor Intel device 806ec
  578 09:52:32.351946  CPU: family 06, model 8e, stepping 0c
  579 09:52:32.355277  CPU: vendor Intel device 806ec
  580 09:52:32.358608  CPU: family 06, model 8e, stepping 0c
  581 09:52:32.361890  Clearing out pending MCEs
  582 09:52:32.365263  CPU #6 initialized
  583 09:52:32.365473  Clearing out pending MCEs
  584 09:52:32.368697  Setting up local APIC...
  585 09:52:32.371725  CPU #5 initialized
  586 09:52:32.371968  Skip microcode update
  587 09:52:32.375185  Setting up local APIC...
  588 09:52:32.378180  Skip microcode update
  589 09:52:32.378401  CPU #4 initialized
  590 09:52:32.381709   apic_id: 0x05 done.
  591 09:52:32.384845   apic_id: 0x04 done.
  592 09:52:32.385056  VMX status: enabled
  593 09:52:32.388269  VMX status: enabled
  594 09:52:32.391462  IA32_FEATURE_CONTROL status: locked
  595 09:52:32.394806  IA32_FEATURE_CONTROL status: locked
  596 09:52:32.397950  Skip microcode update
  597 09:52:32.401566  Skip microcode update
  598 09:52:32.401863  CPU #2 initialized
  599 09:52:32.404667  CPU #3 initialized
  600 09:52:32.404893  CPU #1 initialized
  601 09:52:32.411234  bsp_do_flight_plan done after 461 msecs.
  602 09:52:32.414831  CPU: frequency set to 4200 MHz
  603 09:52:32.415148  Enabling SMIs.
  604 09:52:32.415333  Locking SMM.
  605 09:52:32.430672  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  606 09:52:32.434066  CBFS @ c08000 size 3f8000
  607 09:52:32.440564  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  608 09:52:32.440783  CBFS: Locating 'vbt.bin'
  609 09:52:32.447253  CBFS: Found @ offset 5f5c0 size 499
  610 09:52:32.450111  Found a VBT of 4608 bytes after decompression
  611 09:52:32.633910  Display FSP Version Info HOB
  612 09:52:32.637271  Reference Code - CPU = 9.0.1e.30
  613 09:52:32.640473  uCode Version = 0.0.0.ca
  614 09:52:32.643701  TXT ACM version = ff.ff.ff.ffff
  615 09:52:32.646966  Display FSP Version Info HOB
  616 09:52:32.650089  Reference Code - ME = 9.0.1e.30
  617 09:52:32.653429  MEBx version = 0.0.0.0
  618 09:52:32.656964  ME Firmware Version = Consumer SKU
  619 09:52:32.660031  Display FSP Version Info HOB
  620 09:52:32.663324  Reference Code - CML PCH = 9.0.1e.30
  621 09:52:32.666437  PCH-CRID Status = Disabled
  622 09:52:32.669811  PCH-CRID Original Value = ff.ff.ff.ffff
  623 09:52:32.673216  PCH-CRID New Value = ff.ff.ff.ffff
  624 09:52:32.676238  OPROM - RST - RAID = ff.ff.ff.ffff
  625 09:52:32.679475  ChipsetInit Base Version = ff.ff.ff.ffff
  626 09:52:32.685968  ChipsetInit Oem Version = ff.ff.ff.ffff
  627 09:52:32.686054  Display FSP Version Info HOB
  628 09:52:32.692679  Reference Code - SA - System Agent = 9.0.1e.30
  629 09:52:32.695887  Reference Code - MRC = 0.7.1.6c
  630 09:52:32.699376  SA - PCIe Version = 9.0.1e.30
  631 09:52:32.702332  SA-CRID Status = Disabled
  632 09:52:32.705669  SA-CRID Original Value = 0.0.0.c
  633 09:52:32.705755  SA-CRID New Value = 0.0.0.c
  634 09:52:32.709076  OPROM - VBIOS = ff.ff.ff.ffff
  635 09:52:32.712786  RTC Init
  636 09:52:32.716038  Set power on after power failure.
  637 09:52:32.719396  Disabling Deep S3
  638 09:52:32.719480  Disabling Deep S3
  639 09:52:32.722795  Disabling Deep S4
  640 09:52:32.722881  Disabling Deep S4
  641 09:52:32.725844  Disabling Deep S5
  642 09:52:32.725928  Disabling Deep S5
  643 09:52:32.732210  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
  644 09:52:32.735693  Enumerating buses...
  645 09:52:32.738639  Show all devs... Before device enumeration.
  646 09:52:32.742122  Root Device: enabled 1
  647 09:52:32.745466  CPU_CLUSTER: 0: enabled 1
  648 09:52:32.745550  DOMAIN: 0000: enabled 1
  649 09:52:32.748837  APIC: 00: enabled 1
  650 09:52:32.752215  PCI: 00:00.0: enabled 1
  651 09:52:32.752301  PCI: 00:02.0: enabled 1
  652 09:52:32.755190  PCI: 00:04.0: enabled 0
  653 09:52:32.758639  PCI: 00:05.0: enabled 0
  654 09:52:32.761939  PCI: 00:12.0: enabled 1
  655 09:52:32.762025  PCI: 00:12.5: enabled 0
  656 09:52:32.765169  PCI: 00:12.6: enabled 0
  657 09:52:32.768492  PCI: 00:14.0: enabled 1
  658 09:52:32.771534  PCI: 00:14.1: enabled 0
  659 09:52:32.771619  PCI: 00:14.3: enabled 1
  660 09:52:32.775014  PCI: 00:14.5: enabled 0
  661 09:52:32.778113  PCI: 00:15.0: enabled 1
  662 09:52:32.781528  PCI: 00:15.1: enabled 1
  663 09:52:32.781614  PCI: 00:15.2: enabled 0
  664 09:52:32.784798  PCI: 00:15.3: enabled 0
  665 09:52:32.788251  PCI: 00:16.0: enabled 1
  666 09:52:32.791194  PCI: 00:16.1: enabled 0
  667 09:52:32.791282  PCI: 00:16.2: enabled 0
  668 09:52:32.794564  PCI: 00:16.3: enabled 0
  669 09:52:32.798103  PCI: 00:16.4: enabled 0
  670 09:52:32.801487  PCI: 00:16.5: enabled 0
  671 09:52:32.801571  PCI: 00:17.0: enabled 1
  672 09:52:32.804398  PCI: 00:19.0: enabled 1
  673 09:52:32.807850  PCI: 00:19.1: enabled 0
  674 09:52:32.807935  PCI: 00:19.2: enabled 0
  675 09:52:32.811020  PCI: 00:1a.0: enabled 0
  676 09:52:32.814124  PCI: 00:1c.0: enabled 0
  677 09:52:32.817527  PCI: 00:1c.1: enabled 0
  678 09:52:32.817614  PCI: 00:1c.2: enabled 0
  679 09:52:32.820612  PCI: 00:1c.3: enabled 0
  680 09:52:32.823900  PCI: 00:1c.4: enabled 0
  681 09:52:32.827337  PCI: 00:1c.5: enabled 0
  682 09:52:32.827426  PCI: 00:1c.6: enabled 0
  683 09:52:32.830470  PCI: 00:1c.7: enabled 0
  684 09:52:32.833902  PCI: 00:1d.0: enabled 1
  685 09:52:32.837083  PCI: 00:1d.1: enabled 0
  686 09:52:32.837174  PCI: 00:1d.2: enabled 0
  687 09:52:32.840246  PCI: 00:1d.3: enabled 0
  688 09:52:32.843459  PCI: 00:1d.4: enabled 0
  689 09:52:32.846770  PCI: 00:1d.5: enabled 1
  690 09:52:32.846859  PCI: 00:1e.0: enabled 1
  691 09:52:32.850282  PCI: 00:1e.1: enabled 0
  692 09:52:32.853503  PCI: 00:1e.2: enabled 1
  693 09:52:32.856643  PCI: 00:1e.3: enabled 1
  694 09:52:32.856733  PCI: 00:1f.0: enabled 1
  695 09:52:32.860030  PCI: 00:1f.1: enabled 1
  696 09:52:32.863243  PCI: 00:1f.2: enabled 1
  697 09:52:32.866650  PCI: 00:1f.3: enabled 1
  698 09:52:32.866734  PCI: 00:1f.4: enabled 1
  699 09:52:32.869659  PCI: 00:1f.5: enabled 1
  700 09:52:32.873058  PCI: 00:1f.6: enabled 0
  701 09:52:32.876353  USB0 port 0: enabled 1
  702 09:52:32.876439  I2C: 00:15: enabled 1
  703 09:52:32.879688  I2C: 00:5d: enabled 1
  704 09:52:32.882770  GENERIC: 0.0: enabled 1
  705 09:52:32.882855  I2C: 00:1a: enabled 1
  706 09:52:32.886383  I2C: 00:38: enabled 1
  707 09:52:32.889397  I2C: 00:39: enabled 1
  708 09:52:32.889481  I2C: 00:3a: enabled 1
  709 09:52:32.892449  I2C: 00:3b: enabled 1
  710 09:52:32.895795  PCI: 00:00.0: enabled 1
  711 09:52:32.895880  SPI: 00: enabled 1
  712 09:52:32.899176  SPI: 01: enabled 1
  713 09:52:32.902236  PNP: 0c09.0: enabled 1
  714 09:52:32.902321  USB2 port 0: enabled 1
  715 09:52:32.905735  USB2 port 1: enabled 1
  716 09:52:32.908951  USB2 port 2: enabled 0
  717 09:52:32.912039  USB2 port 3: enabled 0
  718 09:52:32.912124  USB2 port 5: enabled 0
  719 09:52:32.915589  USB2 port 6: enabled 1
  720 09:52:32.918673  USB2 port 9: enabled 1
  721 09:52:32.922032  USB3 port 0: enabled 1
  722 09:52:32.922117  USB3 port 1: enabled 1
  723 09:52:32.925294  USB3 port 2: enabled 1
  724 09:52:32.928615  USB3 port 3: enabled 1
  725 09:52:32.928700  USB3 port 4: enabled 0
  726 09:52:32.931823  APIC: 01: enabled 1
  727 09:52:32.935181  APIC: 05: enabled 1
  728 09:52:32.935268  APIC: 04: enabled 1
  729 09:52:32.938261  APIC: 07: enabled 1
  730 09:52:32.938346  APIC: 06: enabled 1
  731 09:52:32.941669  APIC: 03: enabled 1
  732 09:52:32.944969  APIC: 02: enabled 1
  733 09:52:32.945054  Compare with tree...
  734 09:52:32.948303  Root Device: enabled 1
  735 09:52:32.951465   CPU_CLUSTER: 0: enabled 1
  736 09:52:32.954762    APIC: 00: enabled 1
  737 09:52:32.954863    APIC: 01: enabled 1
  738 09:52:32.957853    APIC: 05: enabled 1
  739 09:52:32.961315    APIC: 04: enabled 1
  740 09:52:32.961400    APIC: 07: enabled 1
  741 09:52:32.964353    APIC: 06: enabled 1
  742 09:52:32.967894    APIC: 03: enabled 1
  743 09:52:32.967980    APIC: 02: enabled 1
  744 09:52:32.970991   DOMAIN: 0000: enabled 1
  745 09:52:32.974282    PCI: 00:00.0: enabled 1
  746 09:52:32.977600    PCI: 00:02.0: enabled 1
  747 09:52:32.980760    PCI: 00:04.0: enabled 0
  748 09:52:32.980844    PCI: 00:05.0: enabled 0
  749 09:52:32.984079    PCI: 00:12.0: enabled 1
  750 09:52:32.987328    PCI: 00:12.5: enabled 0
  751 09:52:32.990544    PCI: 00:12.6: enabled 0
  752 09:52:32.994018    PCI: 00:14.0: enabled 1
  753 09:52:32.994104     USB0 port 0: enabled 1
  754 09:52:32.997104      USB2 port 0: enabled 1
  755 09:52:33.000443      USB2 port 1: enabled 1
  756 09:52:33.003923      USB2 port 2: enabled 0
  757 09:52:33.006919      USB2 port 3: enabled 0
  758 09:52:33.010680      USB2 port 5: enabled 0
  759 09:52:33.010766      USB2 port 6: enabled 1
  760 09:52:33.013762      USB2 port 9: enabled 1
  761 09:52:33.017330      USB3 port 0: enabled 1
  762 09:52:33.020602      USB3 port 1: enabled 1
  763 09:52:33.023428      USB3 port 2: enabled 1
  764 09:52:33.026472      USB3 port 3: enabled 1
  765 09:52:33.026557      USB3 port 4: enabled 0
  766 09:52:33.029816    PCI: 00:14.1: enabled 0
  767 09:52:33.033100    PCI: 00:14.3: enabled 1
  768 09:52:33.036534    PCI: 00:14.5: enabled 0
  769 09:52:33.039919    PCI: 00:15.0: enabled 1
  770 09:52:33.040003     I2C: 00:15: enabled 1
  771 09:52:33.042936    PCI: 00:15.1: enabled 1
  772 09:52:33.046475     I2C: 00:5d: enabled 1
  773 09:52:33.049801     GENERIC: 0.0: enabled 1
  774 09:52:33.053008    PCI: 00:15.2: enabled 0
  775 09:52:33.053093    PCI: 00:15.3: enabled 0
  776 09:52:33.056130    PCI: 00:16.0: enabled 1
  777 09:52:33.059566    PCI: 00:16.1: enabled 0
  778 09:52:33.062746    PCI: 00:16.2: enabled 0
  779 09:52:33.066093    PCI: 00:16.3: enabled 0
  780 09:52:33.066178    PCI: 00:16.4: enabled 0
  781 09:52:33.069485    PCI: 00:16.5: enabled 0
  782 09:52:33.072789    PCI: 00:17.0: enabled 1
  783 09:52:33.075981    PCI: 00:19.0: enabled 1
  784 09:52:33.079052     I2C: 00:1a: enabled 1
  785 09:52:33.079162     I2C: 00:38: enabled 1
  786 09:52:33.082285     I2C: 00:39: enabled 1
  787 09:52:33.085838     I2C: 00:3a: enabled 1
  788 09:52:33.089117     I2C: 00:3b: enabled 1
  789 09:52:33.089203    PCI: 00:19.1: enabled 0
  790 09:52:33.092337    PCI: 00:19.2: enabled 0
  791 09:52:33.095546    PCI: 00:1a.0: enabled 0
  792 09:52:33.098730    PCI: 00:1c.0: enabled 0
  793 09:52:33.102044    PCI: 00:1c.1: enabled 0
  794 09:52:33.102130    PCI: 00:1c.2: enabled 0
  795 09:52:33.105232    PCI: 00:1c.3: enabled 0
  796 09:52:33.108558    PCI: 00:1c.4: enabled 0
  797 09:52:33.111912    PCI: 00:1c.5: enabled 0
  798 09:52:33.115225    PCI: 00:1c.6: enabled 0
  799 09:52:33.115311    PCI: 00:1c.7: enabled 0
  800 09:52:33.118292    PCI: 00:1d.0: enabled 1
  801 09:52:33.121749    PCI: 00:1d.1: enabled 0
  802 09:52:33.125034    PCI: 00:1d.2: enabled 0
  803 09:52:33.128506    PCI: 00:1d.3: enabled 0
  804 09:52:33.128592    PCI: 00:1d.4: enabled 0
  805 09:52:33.131699    PCI: 00:1d.5: enabled 1
  806 09:52:33.134875     PCI: 00:00.0: enabled 1
  807 09:52:33.138321    PCI: 00:1e.0: enabled 1
  808 09:52:33.141269    PCI: 00:1e.1: enabled 0
  809 09:52:33.141355    PCI: 00:1e.2: enabled 1
  810 09:52:33.144532     SPI: 00: enabled 1
  811 09:52:33.147939    PCI: 00:1e.3: enabled 1
  812 09:52:33.151069     SPI: 01: enabled 1
  813 09:52:33.151170    PCI: 00:1f.0: enabled 1
  814 09:52:33.154510     PNP: 0c09.0: enabled 1
  815 09:52:33.157417    PCI: 00:1f.1: enabled 1
  816 09:52:33.160788    PCI: 00:1f.2: enabled 1
  817 09:52:33.164065    PCI: 00:1f.3: enabled 1
  818 09:52:33.164149    PCI: 00:1f.4: enabled 1
  819 09:52:33.167437    PCI: 00:1f.5: enabled 1
  820 09:52:33.170550    PCI: 00:1f.6: enabled 0
  821 09:52:33.173752  Root Device scanning...
  822 09:52:33.176937  scan_static_bus for Root Device
  823 09:52:33.180411  CPU_CLUSTER: 0 enabled
  824 09:52:33.180495  DOMAIN: 0000 enabled
  825 09:52:33.183601  DOMAIN: 0000 scanning...
  826 09:52:33.187017  PCI: pci_scan_bus for bus 00
  827 09:52:33.190042  PCI: 00:00.0 [8086/0000] ops
  828 09:52:33.193484  PCI: 00:00.0 [8086/9b61] enabled
  829 09:52:33.196608  PCI: 00:02.0 [8086/0000] bus ops
  830 09:52:33.200048  PCI: 00:02.0 [8086/9b41] enabled
  831 09:52:33.203233  PCI: 00:04.0 [8086/1903] disabled
  832 09:52:33.206513  PCI: 00:08.0 [8086/1911] enabled
  833 09:52:33.209642  PCI: 00:12.0 [8086/02f9] enabled
  834 09:52:33.212974  PCI: 00:14.0 [8086/0000] bus ops
  835 09:52:33.216465  PCI: 00:14.0 [8086/02ed] enabled
  836 09:52:33.219743  PCI: 00:14.2 [8086/02ef] enabled
  837 09:52:33.222634  PCI: 00:14.3 [8086/02f0] enabled
  838 09:52:33.226017  PCI: 00:15.0 [8086/0000] bus ops
  839 09:52:33.229476  PCI: 00:15.0 [8086/02e8] enabled
  840 09:52:33.232433  PCI: 00:15.1 [8086/0000] bus ops
  841 09:52:33.235810  PCI: 00:15.1 [8086/02e9] enabled
  842 09:52:33.239242  PCI: 00:16.0 [8086/0000] ops
  843 09:52:33.242365  PCI: 00:16.0 [8086/02e0] enabled
  844 09:52:33.245915  PCI: 00:17.0 [8086/0000] ops
  845 09:52:33.248853  PCI: 00:17.0 [8086/02d3] enabled
  846 09:52:33.252193  PCI: 00:19.0 [8086/0000] bus ops
  847 09:52:33.255282  PCI: 00:19.0 [8086/02c5] enabled
  848 09:52:33.258762  PCI: 00:1d.0 [8086/0000] bus ops
  849 09:52:33.262172  PCI: 00:1d.0 [8086/02b0] enabled
  850 09:52:33.268607  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  851 09:52:33.271861  PCI: 00:1e.0 [8086/0000] ops
  852 09:52:33.275046  PCI: 00:1e.0 [8086/02a8] enabled
  853 09:52:33.278376  PCI: 00:1e.2 [8086/0000] bus ops
  854 09:52:33.281573  PCI: 00:1e.2 [8086/02aa] enabled
  855 09:52:33.284697  PCI: 00:1e.3 [8086/0000] bus ops
  856 09:52:33.288163  PCI: 00:1e.3 [8086/02ab] enabled
  857 09:52:33.291590  PCI: 00:1f.0 [8086/0000] bus ops
  858 09:52:33.294845  PCI: 00:1f.0 [8086/0284] enabled
  859 09:52:33.301351  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  860 09:52:33.304492  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  861 09:52:33.307878  PCI: 00:1f.3 [8086/0000] bus ops
  862 09:52:33.311226  PCI: 00:1f.3 [8086/02c8] enabled
  863 09:52:33.314308  PCI: 00:1f.4 [8086/0000] bus ops
  864 09:52:33.317501  PCI: 00:1f.4 [8086/02a3] enabled
  865 09:52:33.320987  PCI: 00:1f.5 [8086/0000] bus ops
  866 09:52:33.324453  PCI: 00:1f.5 [8086/02a4] enabled
  867 09:52:33.327458  PCI: Leftover static devices:
  868 09:52:33.330581  PCI: 00:05.0
  869 09:52:33.330665  PCI: 00:12.5
  870 09:52:33.333999  PCI: 00:12.6
  871 09:52:33.334082  PCI: 00:14.1
  872 09:52:33.334148  PCI: 00:14.5
  873 09:52:33.337190  PCI: 00:15.2
  874 09:52:33.337273  PCI: 00:15.3
  875 09:52:33.340546  PCI: 00:16.1
  876 09:52:33.340629  PCI: 00:16.2
  877 09:52:33.343795  PCI: 00:16.3
  878 09:52:33.343879  PCI: 00:16.4
  879 09:52:33.343944  PCI: 00:16.5
  880 09:52:33.347005  PCI: 00:19.1
  881 09:52:33.347089  PCI: 00:19.2
  882 09:52:33.350288  PCI: 00:1a.0
  883 09:52:33.350372  PCI: 00:1c.0
  884 09:52:33.350438  PCI: 00:1c.1
  885 09:52:33.353622  PCI: 00:1c.2
  886 09:52:33.353706  PCI: 00:1c.3
  887 09:52:33.356689  PCI: 00:1c.4
  888 09:52:33.356772  PCI: 00:1c.5
  889 09:52:33.360294  PCI: 00:1c.6
  890 09:52:33.360379  PCI: 00:1c.7
  891 09:52:33.360443  PCI: 00:1d.1
  892 09:52:33.363322  PCI: 00:1d.2
  893 09:52:33.363406  PCI: 00:1d.3
  894 09:52:33.366656  PCI: 00:1d.4
  895 09:52:33.366739  PCI: 00:1d.5
  896 09:52:33.366804  PCI: 00:1e.1
  897 09:52:33.369870  PCI: 00:1f.1
  898 09:52:33.369953  PCI: 00:1f.2
  899 09:52:33.373115  PCI: 00:1f.6
  900 09:52:33.376386  PCI: Check your devicetree.cb.
  901 09:52:33.376470  PCI: 00:02.0 scanning...
  902 09:52:33.383014  scan_generic_bus for PCI: 00:02.0
  903 09:52:33.386437  scan_generic_bus for PCI: 00:02.0 done
  904 09:52:33.389688  scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
  905 09:52:33.392905  PCI: 00:14.0 scanning...
  906 09:52:33.396086  scan_static_bus for PCI: 00:14.0
  907 09:52:33.399664  USB0 port 0 enabled
  908 09:52:33.402776  USB0 port 0 scanning...
  909 09:52:33.406034  scan_static_bus for USB0 port 0
  910 09:52:33.406118  USB2 port 0 enabled
  911 09:52:33.409439  USB2 port 1 enabled
  912 09:52:33.412590  USB2 port 2 disabled
  913 09:52:33.412674  USB2 port 3 disabled
  914 09:52:33.415927  USB2 port 5 disabled
  915 09:52:33.419163  USB2 port 6 enabled
  916 09:52:33.419247  USB2 port 9 enabled
  917 09:52:33.422250  USB3 port 0 enabled
  918 09:52:33.422332  USB3 port 1 enabled
  919 09:52:33.425540  USB3 port 2 enabled
  920 09:52:33.428729  USB3 port 3 enabled
  921 09:52:33.428813  USB3 port 4 disabled
  922 09:52:33.432323  USB2 port 0 scanning...
  923 09:52:33.435328  scan_static_bus for USB2 port 0
  924 09:52:33.438566  scan_static_bus for USB2 port 0 done
  925 09:52:33.445249  scan_bus: scanning of bus USB2 port 0 took 9680 usecs
  926 09:52:33.448309  USB2 port 1 scanning...
  927 09:52:33.451574  scan_static_bus for USB2 port 1
  928 09:52:33.455014  scan_static_bus for USB2 port 1 done
  929 09:52:33.461414  scan_bus: scanning of bus USB2 port 1 took 9696 usecs
  930 09:52:33.461499  USB2 port 6 scanning...
  931 09:52:33.464825  scan_static_bus for USB2 port 6
  932 09:52:33.467954  scan_static_bus for USB2 port 6 done
  933 09:52:33.474549  scan_bus: scanning of bus USB2 port 6 took 9698 usecs
  934 09:52:33.477836  USB2 port 9 scanning...
  935 09:52:33.481160  scan_static_bus for USB2 port 9
  936 09:52:33.484251  scan_static_bus for USB2 port 9 done
  937 09:52:33.490771  scan_bus: scanning of bus USB2 port 9 took 9700 usecs
  938 09:52:33.490857  USB3 port 0 scanning...
  939 09:52:33.494299  scan_static_bus for USB3 port 0
  940 09:52:33.500781  scan_static_bus for USB3 port 0 done
  941 09:52:33.504303  scan_bus: scanning of bus USB3 port 0 took 9680 usecs
  942 09:52:33.507513  USB3 port 1 scanning...
  943 09:52:33.510804  scan_static_bus for USB3 port 1
  944 09:52:33.513909  scan_static_bus for USB3 port 1 done
  945 09:52:33.520628  scan_bus: scanning of bus USB3 port 1 took 9687 usecs
  946 09:52:33.523655  USB3 port 2 scanning...
  947 09:52:33.526857  scan_static_bus for USB3 port 2
  948 09:52:33.530107  scan_static_bus for USB3 port 2 done
  949 09:52:33.533594  scan_bus: scanning of bus USB3 port 2 took 9689 usecs
  950 09:52:33.536663  USB3 port 3 scanning...
  951 09:52:33.540031  scan_static_bus for USB3 port 3
  952 09:52:33.543414  scan_static_bus for USB3 port 3 done
  953 09:52:33.549880  scan_bus: scanning of bus USB3 port 3 took 9687 usecs
  954 09:52:33.553056  scan_static_bus for USB0 port 0 done
  955 09:52:33.559874  scan_bus: scanning of bus USB0 port 0 took 155181 usecs
  956 09:52:33.563033  scan_static_bus for PCI: 00:14.0 done
  957 09:52:33.569688  scan_bus: scanning of bus PCI: 00:14.0 took 172783 usecs
  958 09:52:33.569773  PCI: 00:15.0 scanning...
  959 09:52:33.576525  scan_generic_bus for PCI: 00:15.0
  960 09:52:33.579393  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
  961 09:52:33.582641  scan_generic_bus for PCI: 00:15.0 done
  962 09:52:33.589399  scan_bus: scanning of bus PCI: 00:15.0 took 14283 usecs
  963 09:52:33.589485  PCI: 00:15.1 scanning...
  964 09:52:33.595908  scan_generic_bus for PCI: 00:15.1
  965 09:52:33.599293  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
  966 09:52:33.602519  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
  967 09:52:33.605794  scan_generic_bus for PCI: 00:15.1 done
  968 09:52:33.612147  scan_bus: scanning of bus PCI: 00:15.1 took 18600 usecs
  969 09:52:33.615512  PCI: 00:19.0 scanning...
  970 09:52:33.619047  scan_generic_bus for PCI: 00:19.0
  971 09:52:33.622173  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
  972 09:52:33.625423  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
  973 09:52:33.631793  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
  974 09:52:33.635059  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
  975 09:52:33.638436  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
  976 09:52:33.641561  scan_generic_bus for PCI: 00:19.0 done
  977 09:52:33.648436  scan_bus: scanning of bus PCI: 00:19.0 took 30696 usecs
  978 09:52:33.651691  PCI: 00:1d.0 scanning...
  979 09:52:33.654927  do_pci_scan_bridge for PCI: 00:1d.0
  980 09:52:33.658192  PCI: pci_scan_bus for bus 01
  981 09:52:33.661312  PCI: 01:00.0 [1c5c/1327] enabled
  982 09:52:33.664535  Enabling Common Clock Configuration
  983 09:52:33.667837  L1 Sub-State supported from root port 29
  984 09:52:33.671257  L1 Sub-State Support = 0xf
  985 09:52:33.674321  CommonModeRestoreTime = 0x28
  986 09:52:33.677457  Power On Value = 0x16, Power On Scale = 0x0
  987 09:52:33.680744  ASPM: Enabled L1
  988 09:52:33.687549  scan_bus: scanning of bus PCI: 00:1d.0 took 32761 usecs
  989 09:52:33.687635  PCI: 00:1e.2 scanning...
  990 09:52:33.694311  scan_generic_bus for PCI: 00:1e.2
  991 09:52:33.697539  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
  992 09:52:33.700740  scan_generic_bus for PCI: 00:1e.2 done
  993 09:52:33.707430  scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
  994 09:52:33.707515  PCI: 00:1e.3 scanning...
  995 09:52:33.710484  scan_generic_bus for PCI: 00:1e.3
  996 09:52:33.717277  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
  997 09:52:33.720389  scan_generic_bus for PCI: 00:1e.3 done
  998 09:52:33.723952  scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
  999 09:52:33.727052  PCI: 00:1f.0 scanning...
 1000 09:52:33.730272  scan_static_bus for PCI: 00:1f.0
 1001 09:52:33.733546  PNP: 0c09.0 enabled
 1002 09:52:33.737089  scan_static_bus for PCI: 00:1f.0 done
 1003 09:52:33.743449  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
 1004 09:52:33.746602  PCI: 00:1f.3 scanning...
 1005 09:52:33.749910  scan_bus: scanning of bus PCI: 00:1f.3 took 2857 usecs
 1006 09:52:33.753310  PCI: 00:1f.4 scanning...
 1007 09:52:33.756434  scan_generic_bus for PCI: 00:1f.4
 1008 09:52:33.759847  scan_generic_bus for PCI: 00:1f.4 done
 1009 09:52:33.766268  scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
 1010 09:52:33.769584  PCI: 00:1f.5 scanning...
 1011 09:52:33.772838  scan_generic_bus for PCI: 00:1f.5
 1012 09:52:33.776258  scan_generic_bus for PCI: 00:1f.5 done
 1013 09:52:33.782637  scan_bus: scanning of bus PCI: 00:1f.5 took 10179 usecs
 1014 09:52:33.789190  scan_bus: scanning of bus DOMAIN: 0000 took 604455 usecs
 1015 09:52:33.792493  scan_static_bus for Root Device done
 1016 09:52:33.798850  scan_bus: scanning of bus Root Device took 624321 usecs
 1017 09:52:33.798941  done
 1018 09:52:33.802270  Chrome EC: UHEPI supported
 1019 09:52:33.808887  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1020 09:52:33.812223  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1021 09:52:33.818616  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1022 09:52:33.825640  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1023 09:52:33.828890  SPI flash protection: WPSW=0 SRP0=0
 1024 09:52:33.835360  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1025 09:52:33.838796  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1026 09:52:33.842183  found VGA at PCI: 00:02.0
 1027 09:52:33.845288  Setting up VGA for PCI: 00:02.0
 1028 09:52:33.851897  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1029 09:52:33.855174  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1030 09:52:33.858262  Allocating resources...
 1031 09:52:33.861717  Reading resources...
 1032 09:52:33.865050  Root Device read_resources bus 0 link: 0
 1033 09:52:33.868330  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1034 09:52:33.874926  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1035 09:52:33.878185  DOMAIN: 0000 read_resources bus 0 link: 0
 1036 09:52:33.886336  PCI: 00:14.0 read_resources bus 0 link: 0
 1037 09:52:33.889125  USB0 port 0 read_resources bus 0 link: 0
 1038 09:52:33.897374  USB0 port 0 read_resources bus 0 link: 0 done
 1039 09:52:33.900449  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1040 09:52:33.908072  PCI: 00:15.0 read_resources bus 1 link: 0
 1041 09:52:33.911060  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1042 09:52:33.918022  PCI: 00:15.1 read_resources bus 2 link: 0
 1043 09:52:33.920905  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1044 09:52:33.928539  PCI: 00:19.0 read_resources bus 3 link: 0
 1045 09:52:33.935170  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1046 09:52:33.938704  PCI: 00:1d.0 read_resources bus 1 link: 0
 1047 09:52:33.945146  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1048 09:52:33.948253  PCI: 00:1e.2 read_resources bus 4 link: 0
 1049 09:52:33.954859  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1050 09:52:33.957829  PCI: 00:1e.3 read_resources bus 5 link: 0
 1051 09:52:33.964474  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1052 09:52:33.967846  PCI: 00:1f.0 read_resources bus 0 link: 0
 1053 09:52:33.974598  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1054 09:52:33.980876  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1055 09:52:33.984105  Root Device read_resources bus 0 link: 0 done
 1056 09:52:33.987624  Done reading resources.
 1057 09:52:33.994087  Show resources in subtree (Root Device)...After reading.
 1058 09:52:33.997400   Root Device child on link 0 CPU_CLUSTER: 0
 1059 09:52:34.000495    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1060 09:52:34.003677     APIC: 00
 1061 09:52:34.003762     APIC: 01
 1062 09:52:34.006855     APIC: 05
 1063 09:52:34.006975     APIC: 04
 1064 09:52:34.007042     APIC: 07
 1065 09:52:34.010344     APIC: 06
 1066 09:52:34.010428     APIC: 03
 1067 09:52:34.059942     APIC: 02
 1068 09:52:34.060041    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1069 09:52:34.060305    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1070 09:52:34.060395    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1071 09:52:34.060662     PCI: 00:00.0
 1072 09:52:34.060916     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1073 09:52:34.061359     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1074 09:52:34.109529     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1075 09:52:34.109989     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1076 09:52:34.110387     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1077 09:52:34.110844     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1078 09:52:34.111258     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1079 09:52:34.153866     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1080 09:52:34.154155     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1081 09:52:34.154515     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1082 09:52:34.155008     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1083 09:52:34.155283     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1084 09:52:34.158448     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1085 09:52:34.168322     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1086 09:52:34.178073     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1087 09:52:34.187820     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1088 09:52:34.187906     PCI: 00:02.0
 1089 09:52:34.197416     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1090 09:52:34.207444     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1091 09:52:34.217342     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1092 09:52:34.220391     PCI: 00:04.0
 1093 09:52:34.220479     PCI: 00:08.0
 1094 09:52:34.230324     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1095 09:52:34.233427     PCI: 00:12.0
 1096 09:52:34.243524     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1097 09:52:34.246654     PCI: 00:14.0 child on link 0 USB0 port 0
 1098 09:52:34.256292     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1099 09:52:34.259423      USB0 port 0 child on link 0 USB2 port 0
 1100 09:52:34.262932       USB2 port 0
 1101 09:52:34.263018       USB2 port 1
 1102 09:52:34.266215       USB2 port 2
 1103 09:52:34.269232       USB2 port 3
 1104 09:52:34.269316       USB2 port 5
 1105 09:52:34.272553       USB2 port 6
 1106 09:52:34.272645       USB2 port 9
 1107 09:52:34.276012       USB3 port 0
 1108 09:52:34.276098       USB3 port 1
 1109 09:52:34.279254       USB3 port 2
 1110 09:52:34.279339       USB3 port 3
 1111 09:52:34.282361       USB3 port 4
 1112 09:52:34.282445     PCI: 00:14.2
 1113 09:52:34.292247     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1114 09:52:34.302224     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1115 09:52:34.305406     PCI: 00:14.3
 1116 09:52:34.315255     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1117 09:52:34.318483     PCI: 00:15.0 child on link 0 I2C: 01:15
 1118 09:52:34.328331     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1119 09:52:34.331661      I2C: 01:15
 1120 09:52:34.334803     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1121 09:52:34.344758     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1122 09:52:34.347820      I2C: 02:5d
 1123 09:52:34.347906      GENERIC: 0.0
 1124 09:52:34.351155     PCI: 00:16.0
 1125 09:52:34.360877     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1126 09:52:34.360964     PCI: 00:17.0
 1127 09:52:34.370635     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1128 09:52:34.380511     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1129 09:52:34.387187     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1130 09:52:34.396614     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1131 09:52:34.403372     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1132 09:52:34.412911     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1133 09:52:34.416151     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1134 09:52:34.426104     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1135 09:52:34.429237      I2C: 03:1a
 1136 09:52:34.429320      I2C: 03:38
 1137 09:52:34.432692      I2C: 03:39
 1138 09:52:34.432777      I2C: 03:3a
 1139 09:52:34.436296      I2C: 03:3b
 1140 09:52:34.439021     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1141 09:52:34.448791     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1142 09:52:34.458854     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1143 09:52:34.468557     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1144 09:52:34.468642      PCI: 01:00.0
 1145 09:52:34.478344      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1146 09:52:34.481611     PCI: 00:1e.0
 1147 09:52:34.491354     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1148 09:52:34.501365     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1149 09:52:34.504385     PCI: 00:1e.2 child on link 0 SPI: 00
 1150 09:52:34.514292     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1151 09:52:34.517431      SPI: 00
 1152 09:52:34.520732     PCI: 00:1e.3 child on link 0 SPI: 01
 1153 09:52:34.530650     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1154 09:52:34.533904      SPI: 01
 1155 09:52:34.536949     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1156 09:52:34.546839     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1157 09:52:34.553469     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1158 09:52:34.556752      PNP: 0c09.0
 1159 09:52:34.563180      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1160 09:52:34.566497     PCI: 00:1f.3
 1161 09:52:34.576262     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1162 09:52:34.586224     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1163 09:52:34.589581     PCI: 00:1f.4
 1164 09:52:34.595853     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1165 09:52:34.605958     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1166 09:52:34.609294     PCI: 00:1f.5
 1167 09:52:34.618744     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1168 09:52:34.625427  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1169 09:52:34.631914  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1170 09:52:34.638331  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1171 09:52:34.641719  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1172 09:52:34.645000  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1173 09:52:34.648202  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1174 09:52:34.651513  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1175 09:52:34.658211  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1176 09:52:34.664621  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1177 09:52:34.671247  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1178 09:52:34.681028  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1179 09:52:34.687513  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1180 09:52:34.690753  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1181 09:52:34.700423  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1182 09:52:34.703677  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1183 09:52:34.710324  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1184 09:52:34.713481  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1185 09:52:34.720172  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1186 09:52:34.723162  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1187 09:52:34.729845  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1188 09:52:34.733009  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1189 09:52:34.739661  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1190 09:52:34.742814  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1191 09:52:34.749469  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1192 09:52:34.753040  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1193 09:52:34.759239  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1194 09:52:34.762543  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1195 09:52:34.766468  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1196 09:52:34.772540  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1197 09:52:34.775947  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1198 09:52:34.782211  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1199 09:52:34.785400  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1200 09:52:34.792226  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1201 09:52:34.795514  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1202 09:52:34.801937  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1203 09:52:34.805556  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1204 09:52:34.811706  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1205 09:52:34.818140  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1206 09:52:34.824627  avoid_fixed_resources: DOMAIN: 0000
 1207 09:52:34.827977  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1208 09:52:34.834474  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1209 09:52:34.844291  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1210 09:52:34.850926  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1211 09:52:34.857263  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1212 09:52:34.867029  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1213 09:52:34.873702  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1214 09:52:34.880213  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1215 09:52:34.890126  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1216 09:52:34.896822  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1217 09:52:34.903039  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1218 09:52:34.909830  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1219 09:52:34.913023  Setting resources...
 1220 09:52:34.919558  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1221 09:52:34.922782  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1222 09:52:34.926211  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1223 09:52:34.932452  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1224 09:52:34.936045  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1225 09:52:34.942622  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1226 09:52:34.948957  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1227 09:52:34.955354  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1228 09:52:34.962012  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1229 09:52:34.968397  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1230 09:52:34.971640  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1231 09:52:34.978365  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1232 09:52:34.981646  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1233 09:52:34.988151  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1234 09:52:34.991583  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1235 09:52:34.997911  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1236 09:52:35.001066  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1237 09:52:35.007449  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1238 09:52:35.010854  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1239 09:52:35.017560  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1240 09:52:35.020555  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1241 09:52:35.026926  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1242 09:52:35.030443  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1243 09:52:35.033584  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1244 09:52:35.040157  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1245 09:52:35.043464  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1246 09:52:35.049855  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1247 09:52:35.053190  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1248 09:52:35.059902  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1249 09:52:35.063165  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1250 09:52:35.069588  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1251 09:52:35.072932  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1252 09:52:35.082680  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1253 09:52:35.088972  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1254 09:52:35.095726  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1255 09:52:35.102096  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1256 09:52:35.108787  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1257 09:52:35.115283  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1258 09:52:35.121871  Root Device assign_resources, bus 0 link: 0
 1259 09:52:35.124951  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1260 09:52:35.134596  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1261 09:52:35.141295  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1262 09:52:35.150887  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1263 09:52:35.157425  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1264 09:52:35.167306  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1265 09:52:35.174025  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1266 09:52:35.180377  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1267 09:52:35.183782  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1268 09:52:35.193471  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1269 09:52:35.200122  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1270 09:52:35.210008  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1271 09:52:35.216744  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1272 09:52:35.223029  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1273 09:52:35.225952  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1274 09:52:35.236079  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1275 09:52:35.239059  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1276 09:52:35.242328  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1277 09:52:35.252088  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1278 09:52:35.258562  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1279 09:52:35.268520  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1280 09:52:35.275021  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1281 09:52:35.281776  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1282 09:52:35.291338  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1283 09:52:35.297979  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1284 09:52:35.307679  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1285 09:52:35.311250  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1286 09:52:35.317546  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1287 09:52:35.324095  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1288 09:52:35.333772  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1289 09:52:35.340495  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1290 09:52:35.347357  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1291 09:52:35.353754  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1292 09:52:35.360015  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1293 09:52:35.366751  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1294 09:52:35.376652  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1295 09:52:35.379702  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1296 09:52:35.386374  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1297 09:52:35.392689  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1298 09:52:35.399162  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1299 09:52:35.402576  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1300 09:52:35.409062  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1301 09:52:35.412356  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1302 09:52:35.418804  LPC: Trying to open IO window from 800 size 1ff
 1303 09:52:35.425638  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1304 09:52:35.435414  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1305 09:52:35.441764  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1306 09:52:35.451361  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1307 09:52:35.454670  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1308 09:52:35.461535  Root Device assign_resources, bus 0 link: 0
 1309 09:52:35.461638  Done setting resources.
 1310 09:52:35.468085  Show resources in subtree (Root Device)...After assigning values.
 1311 09:52:35.474413   Root Device child on link 0 CPU_CLUSTER: 0
 1312 09:52:35.477703    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1313 09:52:35.477815     APIC: 00
 1314 09:52:35.481043     APIC: 01
 1315 09:52:35.481153     APIC: 05
 1316 09:52:35.481249     APIC: 04
 1317 09:52:35.484223     APIC: 07
 1318 09:52:35.484334     APIC: 06
 1319 09:52:35.487743     APIC: 03
 1320 09:52:35.487855     APIC: 02
 1321 09:52:35.490840    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1322 09:52:35.500538    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1323 09:52:35.513832    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1324 09:52:35.513946     PCI: 00:00.0
 1325 09:52:35.523312     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1326 09:52:35.533177     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1327 09:52:35.542879     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1328 09:52:35.552918     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1329 09:52:35.562433     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1330 09:52:35.569330     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1331 09:52:35.579083     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1332 09:52:35.588846     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1333 09:52:35.598694     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1334 09:52:35.608493     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1335 09:52:35.618145     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1336 09:52:35.627920     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1337 09:52:35.637588     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1338 09:52:35.647365     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1339 09:52:35.654337     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1340 09:52:35.663837     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1341 09:52:35.667205     PCI: 00:02.0
 1342 09:52:35.677048     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1343 09:52:35.686689     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1344 09:52:35.696470     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1345 09:52:35.699649     PCI: 00:04.0
 1346 09:52:35.699733     PCI: 00:08.0
 1347 09:52:35.709396     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1348 09:52:35.712714     PCI: 00:12.0
 1349 09:52:35.722459     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1350 09:52:35.725665     PCI: 00:14.0 child on link 0 USB0 port 0
 1351 09:52:35.735756     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1352 09:52:35.742086      USB0 port 0 child on link 0 USB2 port 0
 1353 09:52:35.742171       USB2 port 0
 1354 09:52:35.745317       USB2 port 1
 1355 09:52:35.745402       USB2 port 2
 1356 09:52:35.748594       USB2 port 3
 1357 09:52:35.748678       USB2 port 5
 1358 09:52:35.751720       USB2 port 6
 1359 09:52:35.755104       USB2 port 9
 1360 09:52:35.755189       USB3 port 0
 1361 09:52:35.758407       USB3 port 1
 1362 09:52:35.758495       USB3 port 2
 1363 09:52:35.761721       USB3 port 3
 1364 09:52:35.761807       USB3 port 4
 1365 09:52:35.765180     PCI: 00:14.2
 1366 09:52:35.774729     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1367 09:52:35.784491     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1368 09:52:35.787663     PCI: 00:14.3
 1369 09:52:35.797431     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1370 09:52:35.800746     PCI: 00:15.0 child on link 0 I2C: 01:15
 1371 09:52:35.810656     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1372 09:52:35.813893      I2C: 01:15
 1373 09:52:35.817248     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1374 09:52:35.826787     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1375 09:52:35.830129      I2C: 02:5d
 1376 09:52:35.830214      GENERIC: 0.0
 1377 09:52:35.833360     PCI: 00:16.0
 1378 09:52:35.843269     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1379 09:52:35.843355     PCI: 00:17.0
 1380 09:52:35.853059     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1381 09:52:35.866073     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1382 09:52:35.872570     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1383 09:52:35.882605     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1384 09:52:35.892214     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1385 09:52:35.901808     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1386 09:52:35.905239     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1387 09:52:35.914892     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1388 09:52:35.918291      I2C: 03:1a
 1389 09:52:35.918376      I2C: 03:38
 1390 09:52:35.921672      I2C: 03:39
 1391 09:52:35.921756      I2C: 03:3a
 1392 09:52:35.924706      I2C: 03:3b
 1393 09:52:35.928049     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1394 09:52:35.938055     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1395 09:52:35.947644     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1396 09:52:35.957436     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1397 09:52:35.960771      PCI: 01:00.0
 1398 09:52:35.970710      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1399 09:52:35.973603     PCI: 00:1e.0
 1400 09:52:35.983516     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1401 09:52:35.993060     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1402 09:52:35.996569     PCI: 00:1e.2 child on link 0 SPI: 00
 1403 09:52:36.009487     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1404 09:52:36.009573      SPI: 00
 1405 09:52:36.012673     PCI: 00:1e.3 child on link 0 SPI: 01
 1406 09:52:36.022440     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1407 09:52:36.025772      SPI: 01
 1408 09:52:36.029003     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1409 09:52:36.038642     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1410 09:52:36.045324     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1411 09:52:36.048459      PNP: 0c09.0
 1412 09:52:36.058563      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1413 09:52:36.058649     PCI: 00:1f.3
 1414 09:52:36.068361     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1415 09:52:36.081377     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1416 09:52:36.081463     PCI: 00:1f.4
 1417 09:52:36.091234     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1418 09:52:36.100937     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1419 09:52:36.101023     PCI: 00:1f.5
 1420 09:52:36.113711     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1421 09:52:36.113797  Done allocating resources.
 1422 09:52:36.120309  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1423 09:52:36.123749  Enabling resources...
 1424 09:52:36.127049  PCI: 00:00.0 subsystem <- 8086/9b61
 1425 09:52:36.130181  PCI: 00:00.0 cmd <- 06
 1426 09:52:36.133512  PCI: 00:02.0 subsystem <- 8086/9b41
 1427 09:52:36.136571  PCI: 00:02.0 cmd <- 03
 1428 09:52:36.139992  PCI: 00:08.0 cmd <- 06
 1429 09:52:36.143196  PCI: 00:12.0 subsystem <- 8086/02f9
 1430 09:52:36.146494  PCI: 00:12.0 cmd <- 02
 1431 09:52:36.149932  PCI: 00:14.0 subsystem <- 8086/02ed
 1432 09:52:36.152990  PCI: 00:14.0 cmd <- 02
 1433 09:52:36.153074  PCI: 00:14.2 cmd <- 02
 1434 09:52:36.159816  PCI: 00:14.3 subsystem <- 8086/02f0
 1435 09:52:36.159901  PCI: 00:14.3 cmd <- 02
 1436 09:52:36.163366  PCI: 00:15.0 subsystem <- 8086/02e8
 1437 09:52:36.166651  PCI: 00:15.0 cmd <- 02
 1438 09:52:36.169872  PCI: 00:15.1 subsystem <- 8086/02e9
 1439 09:52:36.172988  PCI: 00:15.1 cmd <- 02
 1440 09:52:36.176224  PCI: 00:16.0 subsystem <- 8086/02e0
 1441 09:52:36.179587  PCI: 00:16.0 cmd <- 02
 1442 09:52:36.182817  PCI: 00:17.0 subsystem <- 8086/02d3
 1443 09:52:36.185960  PCI: 00:17.0 cmd <- 03
 1444 09:52:36.189442  PCI: 00:19.0 subsystem <- 8086/02c5
 1445 09:52:36.192636  PCI: 00:19.0 cmd <- 02
 1446 09:52:36.195969  PCI: 00:1d.0 bridge ctrl <- 0013
 1447 09:52:36.199308  PCI: 00:1d.0 subsystem <- 8086/02b0
 1448 09:52:36.202431  PCI: 00:1d.0 cmd <- 06
 1449 09:52:36.205848  PCI: 00:1e.0 subsystem <- 8086/02a8
 1450 09:52:36.208978  PCI: 00:1e.0 cmd <- 06
 1451 09:52:36.212228  PCI: 00:1e.2 subsystem <- 8086/02aa
 1452 09:52:36.215522  PCI: 00:1e.2 cmd <- 06
 1453 09:52:36.218844  PCI: 00:1e.3 subsystem <- 8086/02ab
 1454 09:52:36.222220  PCI: 00:1e.3 cmd <- 02
 1455 09:52:36.225291  PCI: 00:1f.0 subsystem <- 8086/0284
 1456 09:52:36.228607  PCI: 00:1f.0 cmd <- 407
 1457 09:52:36.231685  PCI: 00:1f.3 subsystem <- 8086/02c8
 1458 09:52:36.231769  PCI: 00:1f.3 cmd <- 02
 1459 09:52:36.238438  PCI: 00:1f.4 subsystem <- 8086/02a3
 1460 09:52:36.238521  PCI: 00:1f.4 cmd <- 03
 1461 09:52:36.244814  PCI: 00:1f.5 subsystem <- 8086/02a4
 1462 09:52:36.244898  PCI: 00:1f.5 cmd <- 406
 1463 09:52:36.254519  PCI: 01:00.0 cmd <- 02
 1464 09:52:36.259797  done.
 1465 09:52:36.272858  ME: Version: 14.0.39.1367
 1466 09:52:36.279438  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
 1467 09:52:36.282734  Initializing devices...
 1468 09:52:36.282818  Root Device init ...
 1469 09:52:36.289350  Chrome EC: Set SMI mask to 0x0000000000000000
 1470 09:52:36.295943  Chrome EC: clear events_b mask to 0x0000000000000000
 1471 09:52:36.298847  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1472 09:52:36.305649  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1473 09:52:36.311833  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1474 09:52:36.315271  Chrome EC: Set WAKE mask to 0x0000000000000000
 1475 09:52:36.321924  Root Device init finished in 35143 usecs
 1476 09:52:36.324911  CPU_CLUSTER: 0 init ...
 1477 09:52:36.328264  CPU_CLUSTER: 0 init finished in 2448 usecs
 1478 09:52:36.333285  PCI: 00:00.0 init ...
 1479 09:52:36.337024  CPU TDP: 15 Watts
 1480 09:52:36.340082  CPU PL2 = 64 Watts
 1481 09:52:36.343290  PCI: 00:00.0 init finished in 7073 usecs
 1482 09:52:36.346546  PCI: 00:02.0 init ...
 1483 09:52:36.349850  PCI: 00:02.0 init finished in 2252 usecs
 1484 09:52:36.352993  PCI: 00:08.0 init ...
 1485 09:52:36.356338  PCI: 00:08.0 init finished in 2253 usecs
 1486 09:52:36.359715  PCI: 00:12.0 init ...
 1487 09:52:36.362754  PCI: 00:12.0 init finished in 2251 usecs
 1488 09:52:36.366289  PCI: 00:14.0 init ...
 1489 09:52:36.369207  PCI: 00:14.0 init finished in 2252 usecs
 1490 09:52:36.372631  PCI: 00:14.2 init ...
 1491 09:52:36.375742  PCI: 00:14.2 init finished in 2252 usecs
 1492 09:52:36.379119  PCI: 00:14.3 init ...
 1493 09:52:36.382387  PCI: 00:14.3 init finished in 2270 usecs
 1494 09:52:36.385990  PCI: 00:15.0 init ...
 1495 09:52:36.389299  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1496 09:52:36.395726  PCI: 00:15.0 init finished in 5977 usecs
 1497 09:52:36.395811  PCI: 00:15.1 init ...
 1498 09:52:36.402224  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1499 09:52:36.405523  PCI: 00:15.1 init finished in 5974 usecs
 1500 09:52:36.408740  PCI: 00:16.0 init ...
 1501 09:52:36.411963  PCI: 00:16.0 init finished in 2252 usecs
 1502 09:52:36.415524  PCI: 00:19.0 init ...
 1503 09:52:36.418494  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1504 09:52:36.422083  PCI: 00:19.0 init finished in 5978 usecs
 1505 09:52:36.425198  PCI: 00:1d.0 init ...
 1506 09:52:36.428330  Initializing PCH PCIe bridge.
 1507 09:52:36.431522  PCI: 00:1d.0 init finished in 5284 usecs
 1508 09:52:36.435426  PCI: 00:1f.0 init ...
 1509 09:52:36.438695  IOAPIC: Initializing IOAPIC at 0xfec00000
 1510 09:52:36.445259  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1511 09:52:36.445344  IOAPIC: ID = 0x02
 1512 09:52:36.448839  IOAPIC: Dumping registers
 1513 09:52:36.451563    reg 0x0000: 0x02000000
 1514 09:52:36.454838    reg 0x0001: 0x00770020
 1515 09:52:36.458610    reg 0x0002: 0x00000000
 1516 09:52:36.461400  PCI: 00:1f.0 init finished in 23574 usecs
 1517 09:52:36.464611  PCI: 00:1f.4 init ...
 1518 09:52:36.467854  PCI: 00:1f.4 init finished in 2262 usecs
 1519 09:52:36.479710  PCI: 01:00.0 init ...
 1520 09:52:36.482932  PCI: 01:00.0 init finished in 2252 usecs
 1521 09:52:36.487053  PNP: 0c09.0 init ...
 1522 09:52:36.490390  Google Chrome EC uptime: 11.151 seconds
 1523 09:52:36.497096  Google Chrome AP resets since EC boot: 0
 1524 09:52:36.500108  Google Chrome most recent AP reset causes:
 1525 09:52:36.506785  Google Chrome EC reset flags at last EC boot: reset-pin
 1526 09:52:36.509911  PNP: 0c09.0 init finished in 20557 usecs
 1527 09:52:36.513346  Devices initialized
 1528 09:52:36.516425  Show all devs... After init.
 1529 09:52:36.516525  Root Device: enabled 1
 1530 09:52:36.519835  CPU_CLUSTER: 0: enabled 1
 1531 09:52:36.523090  DOMAIN: 0000: enabled 1
 1532 09:52:36.526461  APIC: 00: enabled 1
 1533 09:52:36.526545  PCI: 00:00.0: enabled 1
 1534 09:52:36.529936  PCI: 00:02.0: enabled 1
 1535 09:52:36.532949  PCI: 00:04.0: enabled 0
 1536 09:52:36.533033  PCI: 00:05.0: enabled 0
 1537 09:52:36.535993  PCI: 00:12.0: enabled 1
 1538 09:52:36.539329  PCI: 00:12.5: enabled 0
 1539 09:52:36.542709  PCI: 00:12.6: enabled 0
 1540 09:52:36.542794  PCI: 00:14.0: enabled 1
 1541 09:52:36.545743  PCI: 00:14.1: enabled 0
 1542 09:52:36.549142  PCI: 00:14.3: enabled 1
 1543 09:52:36.552550  PCI: 00:14.5: enabled 0
 1544 09:52:36.552635  PCI: 00:15.0: enabled 1
 1545 09:52:36.555635  PCI: 00:15.1: enabled 1
 1546 09:52:36.559210  PCI: 00:15.2: enabled 0
 1547 09:52:36.562182  PCI: 00:15.3: enabled 0
 1548 09:52:36.562266  PCI: 00:16.0: enabled 1
 1549 09:52:36.565514  PCI: 00:16.1: enabled 0
 1550 09:52:36.568990  PCI: 00:16.2: enabled 0
 1551 09:52:36.572134  PCI: 00:16.3: enabled 0
 1552 09:52:36.572218  PCI: 00:16.4: enabled 0
 1553 09:52:36.575491  PCI: 00:16.5: enabled 0
 1554 09:52:36.578670  PCI: 00:17.0: enabled 1
 1555 09:52:36.581747  PCI: 00:19.0: enabled 1
 1556 09:52:36.581831  PCI: 00:19.1: enabled 0
 1557 09:52:36.585301  PCI: 00:19.2: enabled 0
 1558 09:52:36.588310  PCI: 00:1a.0: enabled 0
 1559 09:52:36.591723  PCI: 00:1c.0: enabled 0
 1560 09:52:36.591808  PCI: 00:1c.1: enabled 0
 1561 09:52:36.594850  PCI: 00:1c.2: enabled 0
 1562 09:52:36.598203  PCI: 00:1c.3: enabled 0
 1563 09:52:36.601404  PCI: 00:1c.4: enabled 0
 1564 09:52:36.601489  PCI: 00:1c.5: enabled 0
 1565 09:52:36.604820  PCI: 00:1c.6: enabled 0
 1566 09:52:36.607931  PCI: 00:1c.7: enabled 0
 1567 09:52:36.611242  PCI: 00:1d.0: enabled 1
 1568 09:52:36.611326  PCI: 00:1d.1: enabled 0
 1569 09:52:36.614595  PCI: 00:1d.2: enabled 0
 1570 09:52:36.617616  PCI: 00:1d.3: enabled 0
 1571 09:52:36.620914  PCI: 00:1d.4: enabled 0
 1572 09:52:36.620999  PCI: 00:1d.5: enabled 0
 1573 09:52:36.624351  PCI: 00:1e.0: enabled 1
 1574 09:52:36.627423  PCI: 00:1e.1: enabled 0
 1575 09:52:36.630790  PCI: 00:1e.2: enabled 1
 1576 09:52:36.630874  PCI: 00:1e.3: enabled 1
 1577 09:52:36.633972  PCI: 00:1f.0: enabled 1
 1578 09:52:36.637525  PCI: 00:1f.1: enabled 0
 1579 09:52:36.640561  PCI: 00:1f.2: enabled 0
 1580 09:52:36.640689  PCI: 00:1f.3: enabled 1
 1581 09:52:36.643993  PCI: 00:1f.4: enabled 1
 1582 09:52:36.646957  PCI: 00:1f.5: enabled 1
 1583 09:52:36.650275  PCI: 00:1f.6: enabled 0
 1584 09:52:36.650359  USB0 port 0: enabled 1
 1585 09:52:36.653461  I2C: 01:15: enabled 1
 1586 09:52:36.656894  I2C: 02:5d: enabled 1
 1587 09:52:36.656978  GENERIC: 0.0: enabled 1
 1588 09:52:36.660020  I2C: 03:1a: enabled 1
 1589 09:52:36.663219  I2C: 03:38: enabled 1
 1590 09:52:36.663303  I2C: 03:39: enabled 1
 1591 09:52:36.666621  I2C: 03:3a: enabled 1
 1592 09:52:36.669783  I2C: 03:3b: enabled 1
 1593 09:52:36.673078  PCI: 00:00.0: enabled 1
 1594 09:52:36.673161  SPI: 00: enabled 1
 1595 09:52:36.676309  SPI: 01: enabled 1
 1596 09:52:36.676392  PNP: 0c09.0: enabled 1
 1597 09:52:36.679720  USB2 port 0: enabled 1
 1598 09:52:36.682844  USB2 port 1: enabled 1
 1599 09:52:36.686097  USB2 port 2: enabled 0
 1600 09:52:36.686180  USB2 port 3: enabled 0
 1601 09:52:36.689311  USB2 port 5: enabled 0
 1602 09:52:36.692615  USB2 port 6: enabled 1
 1603 09:52:36.692699  USB2 port 9: enabled 1
 1604 09:52:36.695672  USB3 port 0: enabled 1
 1605 09:52:36.699213  USB3 port 1: enabled 1
 1606 09:52:36.702282  USB3 port 2: enabled 1
 1607 09:52:36.702366  USB3 port 3: enabled 1
 1608 09:52:36.705393  USB3 port 4: enabled 0
 1609 09:52:36.708746  APIC: 01: enabled 1
 1610 09:52:36.708830  APIC: 05: enabled 1
 1611 09:52:36.712058  APIC: 04: enabled 1
 1612 09:52:36.715262  APIC: 07: enabled 1
 1613 09:52:36.715345  APIC: 06: enabled 1
 1614 09:52:36.718522  APIC: 03: enabled 1
 1615 09:52:36.718606  APIC: 02: enabled 1
 1616 09:52:36.721874  PCI: 00:08.0: enabled 1
 1617 09:52:36.725007  PCI: 00:14.2: enabled 1
 1618 09:52:36.728621  PCI: 01:00.0: enabled 1
 1619 09:52:36.731701  Disabling ACPI via APMC:
 1620 09:52:36.735099  done.
 1621 09:52:36.738440  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1622 09:52:36.741636  ELOG: NV offset 0xaf0000 size 0x4000
 1623 09:52:36.748437  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1624 09:52:36.755081  ELOG: Event(17) added with size 13 at 2022-08-12 09:52:33 UTC
 1625 09:52:36.761863  POST: Unexpected post code in previous boot: 0x73
 1626 09:52:36.768323  ELOG: Event(A3) added with size 11 at 2022-08-12 09:52:33 UTC
 1627 09:52:36.774610  ELOG: Event(92) added with size 9 at 2022-08-12 09:52:33 UTC
 1628 09:52:36.781266  ELOG: Event(93) added with size 9 at 2022-08-12 09:52:33 UTC
 1629 09:52:36.787977  ELOG: Event(9A) added with size 9 at 2022-08-12 09:52:33 UTC
 1630 09:52:36.794179  ELOG: Event(9E) added with size 10 at 2022-08-12 09:52:33 UTC
 1631 09:52:36.797452  ELOG: Event(9F) added with size 14 at 2022-08-12 09:52:33 UTC
 1632 09:52:36.804034  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1633 09:52:36.810570  ELOG: Event(A1) added with size 10 at 2022-08-12 09:52:33 UTC
 1634 09:52:36.820553  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1635 09:52:36.823644  ELOG: Event(A0) added with size 9 at 2022-08-12 09:52:33 UTC
 1636 09:52:36.830465  elog_add_boot_reason: Logged dev mode boot
 1637 09:52:36.830547  Finalize devices...
 1638 09:52:36.833558  PCI: 00:17.0 final
 1639 09:52:36.837004  Devices finalized
 1640 09:52:36.840001  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1641 09:52:36.846591  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1642 09:52:36.849928  ME: HFSTS1                  : 0x90000245
 1643 09:52:36.853276  ME: HFSTS2                  : 0x3B850126
 1644 09:52:36.859486  ME: HFSTS3                  : 0x00000020
 1645 09:52:36.862925  ME: HFSTS4                  : 0x00004800
 1646 09:52:36.866380  ME: HFSTS5                  : 0x00000000
 1647 09:52:36.869317  ME: HFSTS6                  : 0x40400006
 1648 09:52:36.872627  ME: Manufacturing Mode      : NO
 1649 09:52:36.875985  ME: FW Partition Table      : OK
 1650 09:52:36.879211  ME: Bringup Loader Failure  : NO
 1651 09:52:36.882419  ME: Firmware Init Complete  : YES
 1652 09:52:36.885743  ME: Boot Options Present    : NO
 1653 09:52:36.888973  ME: Update In Progress      : NO
 1654 09:52:36.892377  ME: D0i3 Support            : YES
 1655 09:52:36.895624  ME: Low Power State Enabled : NO
 1656 09:52:36.899001  ME: CPU Replaced            : NO
 1657 09:52:36.905400  ME: CPU Replacement Valid   : YES
 1658 09:52:36.908712  ME: Current Working State   : 5
 1659 09:52:36.908795  ME: Current Operation State : 1
 1660 09:52:36.912182  ME: Current Operation Mode  : 0
 1661 09:52:36.915474  ME: Error Code              : 0
 1662 09:52:36.918685  ME: CPU Debug Disabled      : YES
 1663 09:52:36.925132  ME: TXT Support             : NO
 1664 09:52:36.928473  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1665 09:52:36.935120  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1666 09:52:36.938535  CBFS @ c08000 size 3f8000
 1667 09:52:36.941465  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1668 09:52:36.944686  CBFS: Locating 'fallback/dsdt.aml'
 1669 09:52:36.951647  CBFS: Found @ offset 10bb80 size 3fa5
 1670 09:52:36.954750  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1671 09:52:36.957908  CBFS @ c08000 size 3f8000
 1672 09:52:36.964713  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1673 09:52:36.967773  CBFS: Locating 'fallback/slic'
 1674 09:52:36.971110  CBFS: 'fallback/slic' not found.
 1675 09:52:36.977819  ACPI: Writing ACPI tables at 99b3e000.
 1676 09:52:36.977902  ACPI:    * FACS
 1677 09:52:36.980892  ACPI:    * DSDT
 1678 09:52:36.984307  Ramoops buffer: 0x100000@0x99a3d000.
 1679 09:52:36.987830  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1680 09:52:36.990730  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1681 09:52:36.994872  Google Chrome EC: version:
 1682 09:52:36.997972  	ro: helios_v2.0.2659-56403530b
 1683 09:52:37.001256  	rw: helios_v2.0.2849-c41de27e7d
 1684 09:52:37.004598    running image: 1
 1685 09:52:37.007780  ACPI:    * FADT
 1686 09:52:37.007862  SCI is IRQ9
 1687 09:52:37.014179  ACPI: added table 1/32, length now 40
 1688 09:52:37.014262  ACPI:     * SSDT
 1689 09:52:37.017560  Found 1 CPU(s) with 8 core(s) each.
 1690 09:52:37.020955  Error: Could not locate 'wifi_sar' in VPD.
 1691 09:52:37.027565  Checking CBFS for default SAR values
 1692 09:52:37.030833  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1693 09:52:37.033903  CBFS @ c08000 size 3f8000
 1694 09:52:37.040512  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1695 09:52:37.043884  CBFS: Locating 'wifi_sar_defaults.hex'
 1696 09:52:37.046926  CBFS: Found @ offset 5fac0 size 77
 1697 09:52:37.050371  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1698 09:52:37.056838  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1699 09:52:37.060089  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1700 09:52:37.066565  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1701 09:52:37.069846  failed to find key in VPD: dsm_calib_r0_0
 1702 09:52:37.079991  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1703 09:52:37.082860  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1704 09:52:37.089589  failed to find key in VPD: dsm_calib_r0_1
 1705 09:52:37.095950  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1706 09:52:37.102494  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1707 09:52:37.105688  failed to find key in VPD: dsm_calib_r0_2
 1708 09:52:37.115789  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1709 09:52:37.122319  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1710 09:52:37.125139  failed to find key in VPD: dsm_calib_r0_3
 1711 09:52:37.134943  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1712 09:52:37.138273  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1713 09:52:37.144821  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1714 09:52:37.148424  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1715 09:52:37.151577  EC returned error result code 1
 1716 09:52:37.154988  EC returned error result code 1
 1717 09:52:37.158199  EC returned error result code 1
 1718 09:52:37.164743  PS2K: Bad resp from EC. Vivaldi disabled!
 1719 09:52:37.167956  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1720 09:52:37.174673  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1721 09:52:37.180979  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1722 09:52:37.184276  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1723 09:52:37.190832  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1724 09:52:37.197412  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1725 09:52:37.203959  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1726 09:52:37.210493  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1727 09:52:37.213539  ACPI: added table 2/32, length now 44
 1728 09:52:37.213631  ACPI:    * MCFG
 1729 09:52:37.216831  ACPI: added table 3/32, length now 48
 1730 09:52:37.220138  ACPI:    * TPM2
 1731 09:52:37.223581  TPM2 log created at 99a2d000
 1732 09:52:37.226617  ACPI: added table 4/32, length now 52
 1733 09:52:37.226701  ACPI:    * MADT
 1734 09:52:37.229930  SCI is IRQ9
 1735 09:52:37.233288  ACPI: added table 5/32, length now 56
 1736 09:52:37.236326  current = 99b43ac0
 1737 09:52:37.236411  ACPI:    * DMAR
 1738 09:52:37.239675  ACPI: added table 6/32, length now 60
 1739 09:52:37.243080  ACPI:    * IGD OpRegion
 1740 09:52:37.246281  GMA: Found VBT in CBFS
 1741 09:52:37.249623  GMA: Found valid VBT in CBFS
 1742 09:52:37.252929  ACPI: added table 7/32, length now 64
 1743 09:52:37.253014  ACPI:    * HPET
 1744 09:52:37.259311  ACPI: added table 8/32, length now 68
 1745 09:52:37.259397  ACPI: done.
 1746 09:52:37.262588  ACPI tables: 31744 bytes.
 1747 09:52:37.265790  smbios_write_tables: 99a2c000
 1748 09:52:37.269014  EC returned error result code 3
 1749 09:52:37.272476  Couldn't obtain OEM name from CBI
 1750 09:52:37.275669  Create SMBIOS type 17
 1751 09:52:37.278728  PCI: 00:00.0 (Intel Cannonlake)
 1752 09:52:37.282095  PCI: 00:14.3 (Intel WiFi)
 1753 09:52:37.282179  SMBIOS tables: 939 bytes.
 1754 09:52:37.288546  Writing table forward entry at 0x00000500
 1755 09:52:37.291788  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1756 09:52:37.298347  Writing coreboot table at 0x99b62000
 1757 09:52:37.301487   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1758 09:52:37.308153   1. 0000000000001000-000000000009ffff: RAM
 1759 09:52:37.311317   2. 00000000000a0000-00000000000fffff: RESERVED
 1760 09:52:37.318065   3. 0000000000100000-0000000099a2bfff: RAM
 1761 09:52:37.321170   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1762 09:52:37.327807   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1763 09:52:37.334254   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1764 09:52:37.337402   7. 000000009a000000-000000009f7fffff: RESERVED
 1765 09:52:37.343994   8. 00000000e0000000-00000000efffffff: RESERVED
 1766 09:52:37.347500   9. 00000000fc000000-00000000fc000fff: RESERVED
 1767 09:52:37.350739  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1768 09:52:37.356982  11. 00000000fed10000-00000000fed17fff: RESERVED
 1769 09:52:37.360445  12. 00000000fed80000-00000000fed83fff: RESERVED
 1770 09:52:37.366853  13. 00000000fed90000-00000000fed91fff: RESERVED
 1771 09:52:37.370233  14. 00000000feda0000-00000000feda1fff: RESERVED
 1772 09:52:37.376703  15. 0000000100000000-000000045e7fffff: RAM
 1773 09:52:37.379893  Graphics framebuffer located at 0xc0000000
 1774 09:52:37.383427  Passing 5 GPIOs to payload:
 1775 09:52:37.386538              NAME |       PORT | POLARITY |     VALUE
 1776 09:52:37.393160     write protect |  undefined |     high |       low
 1777 09:52:37.399639               lid |  undefined |     high |      high
 1778 09:52:37.402923             power |  undefined |     high |       low
 1779 09:52:37.409291             oprom |  undefined |     high |       low
 1780 09:52:37.412805          EC in RW | 0x000000cb |     high |       low
 1781 09:52:37.415759  Board ID: 4
 1782 09:52:37.418920  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1783 09:52:37.422273  CBFS @ c08000 size 3f8000
 1784 09:52:37.428984  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1785 09:52:37.435294  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d36
 1786 09:52:37.438702  coreboot table: 1492 bytes.
 1787 09:52:37.441826  IMD ROOT    0. 99fff000 00001000
 1788 09:52:37.445410  IMD SMALL   1. 99ffe000 00001000
 1789 09:52:37.448740  FSP MEMORY  2. 99c4e000 003b0000
 1790 09:52:37.451874  CONSOLE     3. 99c2e000 00020000
 1791 09:52:37.454926  FMAP        4. 99c2d000 0000054e
 1792 09:52:37.458424  TIME STAMP  5. 99c2c000 00000910
 1793 09:52:37.461566  VBOOT WORK  6. 99c18000 00014000
 1794 09:52:37.464812  MRC DATA    7. 99c16000 00001958
 1795 09:52:37.468125  ROMSTG STCK 8. 99c15000 00001000
 1796 09:52:37.471461  AFTER CAR   9. 99c0b000 0000a000
 1797 09:52:37.474595  RAMSTAGE   10. 99baf000 0005c000
 1798 09:52:37.477801  REFCODE    11. 99b7a000 00035000
 1799 09:52:37.481007  SMM BACKUP 12. 99b6a000 00010000
 1800 09:52:37.484419  COREBOOT   13. 99b62000 00008000
 1801 09:52:37.487400  ACPI       14. 99b3e000 00024000
 1802 09:52:37.490821  ACPI GNVS  15. 99b3d000 00001000
 1803 09:52:37.494266  RAMOOPS    16. 99a3d000 00100000
 1804 09:52:37.497525  TPM2 TCGLOG17. 99a2d000 00010000
 1805 09:52:37.500476  SMBIOS     18. 99a2c000 00000800
 1806 09:52:37.504053  IMD small region:
 1807 09:52:37.506869    IMD ROOT    0. 99ffec00 00000400
 1808 09:52:37.510328    FSP RUNTIME 1. 99ffebe0 00000004
 1809 09:52:37.513561    EC HOSTEVENT 2. 99ffebc0 00000008
 1810 09:52:37.516817    POWER STATE 3. 99ffeb80 00000040
 1811 09:52:37.520270    ROMSTAGE    4. 99ffeb60 00000004
 1812 09:52:37.523587    MEM INFO    5. 99ffe9a0 000001b9
 1813 09:52:37.526775    VPD         6. 99ffe940 0000004c
 1814 09:52:37.530278  MTRR: Physical address space:
 1815 09:52:37.536565  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1816 09:52:37.543202  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1817 09:52:37.549672  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1818 09:52:37.556311  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1819 09:52:37.562532  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1820 09:52:37.569301  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1821 09:52:37.575815  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1822 09:52:37.579026  MTRR: Fixed MSR 0x250 0x0606060606060606
 1823 09:52:37.582281  MTRR: Fixed MSR 0x258 0x0606060606060606
 1824 09:52:37.585589  MTRR: Fixed MSR 0x259 0x0000000000000000
 1825 09:52:37.592268  MTRR: Fixed MSR 0x268 0x0606060606060606
 1826 09:52:37.595460  MTRR: Fixed MSR 0x269 0x0606060606060606
 1827 09:52:37.598791  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1828 09:52:37.601884  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1829 09:52:37.608535  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1830 09:52:37.611562  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1831 09:52:37.615187  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1832 09:52:37.618176  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1833 09:52:37.621502  call enable_fixed_mtrr()
 1834 09:52:37.624925  CPU physical address size: 39 bits
 1835 09:52:37.631484  MTRR: default type WB/UC MTRR counts: 6/8.
 1836 09:52:37.634764  MTRR: WB selected as default type.
 1837 09:52:37.641134  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1838 09:52:37.647707  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1839 09:52:37.651085  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1840 09:52:37.657460  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1841 09:52:37.664074  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1842 09:52:37.670383  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1843 09:52:37.677281  MTRR: Fixed MSR 0x250 0x0606060606060606
 1844 09:52:37.680239  MTRR: Fixed MSR 0x258 0x0606060606060606
 1845 09:52:37.683397  MTRR: Fixed MSR 0x259 0x0000000000000000
 1846 09:52:37.686837  MTRR: Fixed MSR 0x268 0x0606060606060606
 1847 09:52:37.693411  MTRR: Fixed MSR 0x269 0x0606060606060606
 1848 09:52:37.696826  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1849 09:52:37.700327  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1850 09:52:37.703166  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1851 09:52:37.709594  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1852 09:52:37.712952  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1853 09:52:37.716377  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1854 09:52:37.716461  
 1855 09:52:37.719716  MTRR check
 1856 09:52:37.719799  Fixed MTRRs   : Enabled
 1857 09:52:37.722946  Variable MTRRs: Enabled
 1858 09:52:37.723030  
 1859 09:52:37.726162  call enable_fixed_mtrr()
 1860 09:52:37.732628  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1861 09:52:37.736160  CPU physical address size: 39 bits
 1862 09:52:37.739255  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1863 09:52:37.745935  MTRR: Fixed MSR 0x250 0x0606060606060606
 1864 09:52:37.749360  MTRR: Fixed MSR 0x250 0x0606060606060606
 1865 09:52:37.752375  MTRR: Fixed MSR 0x258 0x0606060606060606
 1866 09:52:37.755607  MTRR: Fixed MSR 0x259 0x0000000000000000
 1867 09:52:37.762130  MTRR: Fixed MSR 0x268 0x0606060606060606
 1868 09:52:37.765614  MTRR: Fixed MSR 0x269 0x0606060606060606
 1869 09:52:37.768521  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1870 09:52:37.771827  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1871 09:52:37.778356  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1872 09:52:37.781610  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1873 09:52:37.784914  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1874 09:52:37.788478  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1875 09:52:37.794711  MTRR: Fixed MSR 0x258 0x0606060606060606
 1876 09:52:37.798078  call enable_fixed_mtrr()
 1877 09:52:37.801191  MTRR: Fixed MSR 0x259 0x0000000000000000
 1878 09:52:37.804522  MTRR: Fixed MSR 0x268 0x0606060606060606
 1879 09:52:37.807576  MTRR: Fixed MSR 0x269 0x0606060606060606
 1880 09:52:37.814254  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1881 09:52:37.817456  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1882 09:52:37.820780  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1883 09:52:37.823989  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1884 09:52:37.830490  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1885 09:52:37.833831  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1886 09:52:37.837109  CPU physical address size: 39 bits
 1887 09:52:37.840344  call enable_fixed_mtrr()
 1888 09:52:37.843760  CBFS @ c08000 size 3f8000
 1889 09:52:37.846878  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1890 09:52:37.853554  MTRR: Fixed MSR 0x250 0x0606060606060606
 1891 09:52:37.856577  MTRR: Fixed MSR 0x258 0x0606060606060606
 1892 09:52:37.859954  MTRR: Fixed MSR 0x259 0x0000000000000000
 1893 09:52:37.863178  MTRR: Fixed MSR 0x268 0x0606060606060606
 1894 09:52:37.869537  MTRR: Fixed MSR 0x269 0x0606060606060606
 1895 09:52:37.872950  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1896 09:52:37.876133  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1897 09:52:37.879357  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1898 09:52:37.886081  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1899 09:52:37.889189  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1900 09:52:37.892488  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1901 09:52:37.899167  MTRR: Fixed MSR 0x250 0x0606060606060606
 1902 09:52:37.899252  call enable_fixed_mtrr()
 1903 09:52:37.905585  MTRR: Fixed MSR 0x258 0x0606060606060606
 1904 09:52:37.908817  MTRR: Fixed MSR 0x259 0x0000000000000000
 1905 09:52:37.912238  MTRR: Fixed MSR 0x268 0x0606060606060606
 1906 09:52:37.915228  MTRR: Fixed MSR 0x269 0x0606060606060606
 1907 09:52:37.921735  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1908 09:52:37.925108  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1909 09:52:37.928133  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1910 09:52:37.931468  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1911 09:52:37.938243  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1912 09:52:37.941197  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1913 09:52:37.944634  CPU physical address size: 39 bits
 1914 09:52:37.947920  call enable_fixed_mtrr()
 1915 09:52:37.951128  CBFS: Locating 'fallback/payload'
 1916 09:52:37.954537  CPU physical address size: 39 bits
 1917 09:52:37.957569  CPU physical address size: 39 bits
 1918 09:52:37.960975  MTRR: Fixed MSR 0x250 0x0606060606060606
 1919 09:52:37.967253  MTRR: Fixed MSR 0x250 0x0606060606060606
 1920 09:52:37.970837  MTRR: Fixed MSR 0x258 0x0606060606060606
 1921 09:52:37.973830  MTRR: Fixed MSR 0x259 0x0000000000000000
 1922 09:52:37.977185  MTRR: Fixed MSR 0x268 0x0606060606060606
 1923 09:52:37.983899  MTRR: Fixed MSR 0x269 0x0606060606060606
 1924 09:52:37.987035  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1925 09:52:37.990456  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1926 09:52:37.993699  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1927 09:52:38.000269  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1928 09:52:38.003539  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1929 09:52:38.006664  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1930 09:52:38.012966  MTRR: Fixed MSR 0x258 0x0606060606060606
 1931 09:52:38.013052  call enable_fixed_mtrr()
 1932 09:52:38.019653  MTRR: Fixed MSR 0x259 0x0000000000000000
 1933 09:52:38.023051  MTRR: Fixed MSR 0x268 0x0606060606060606
 1934 09:52:38.026023  MTRR: Fixed MSR 0x269 0x0606060606060606
 1935 09:52:38.029476  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1936 09:52:38.035976  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1937 09:52:38.039123  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1938 09:52:38.042552  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1939 09:52:38.045514  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1940 09:52:38.052343  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1941 09:52:38.055382  CPU physical address size: 39 bits
 1942 09:52:38.058646  call enable_fixed_mtrr()
 1943 09:52:38.062089  CBFS: Found @ offset 1c96c0 size 3f798
 1944 09:52:38.065387  CPU physical address size: 39 bits
 1945 09:52:38.068830  Checking segment from ROM address 0xffdd16f8
 1946 09:52:38.074944  Checking segment from ROM address 0xffdd1714
 1947 09:52:38.078495  Loading segment from ROM address 0xffdd16f8
 1948 09:52:38.081665    code (compression=0)
 1949 09:52:38.088149    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1950 09:52:38.097947  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1951 09:52:38.101124  it's not compressed!
 1952 09:52:38.192086  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 1953 09:52:38.198574  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 1954 09:52:38.201762  Loading segment from ROM address 0xffdd1714
 1955 09:52:38.205411    Entry Point 0x30000000
 1956 09:52:38.208545  Loaded segments
 1957 09:52:38.214073  Finalizing chipset.
 1958 09:52:38.217291  Finalizing SMM.
 1959 09:52:38.220737  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 1960 09:52:38.224141  mp_park_aps done after 0 msecs.
 1961 09:52:38.230439  Jumping to boot code at 30000000(99b62000)
 1962 09:52:38.237199  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 1963 09:52:38.237283  
 1964 09:52:38.240145  Starting depthcharge on Helios...
 1965 09:52:38.240506  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 1966 09:52:38.240611  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 1967 09:52:38.240696  Setting prompt string to ['hatch:']
 1968 09:52:38.240777  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 1969 09:52:38.250141  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 1970 09:52:38.256687  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 1971 09:52:38.263278  board_setup: Info: eMMC controller not present; skipping
 1972 09:52:38.266337  New NVMe Controller 0x30053ac0 @ 00:1d:00
 1973 09:52:38.272826  board_setup: Info: SDHCI controller not present; skipping
 1974 09:52:38.279573  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 1975 09:52:38.279656  Wipe memory regions:
 1976 09:52:38.286081  	[0x00000000001000, 0x000000000a0000)
 1977 09:52:38.289374  	[0x00000000100000, 0x00000030000000)
 1978 09:52:38.353188  	[0x00000030657430, 0x00000099a2c000)
 1979 09:52:38.485120  	[0x00000100000000, 0x0000045e800000)
 1980 09:52:39.803917  R8152: Initializing
 1981 09:52:39.806921  Version 9 (ocp_data = 6010)
 1982 09:52:39.811398  R8152: Done initializing
 1983 09:52:39.814663  Adding net device
 1984 09:52:40.184136  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 1985 09:52:40.184278  
 1986 09:52:40.184554  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 1988 09:52:40.285336  hatch: tftpboot 192.168.201.1 7022983/tftp-deploy-evx5htap/kernel/bzImage 7022983/tftp-deploy-evx5htap/kernel/cmdline 7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
 1989 09:52:40.285555  Setting prompt string to 'Starting kernel'
 1990 09:52:40.285674  Setting prompt string to ['Starting kernel']
 1991 09:52:40.285755  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 1992 09:52:40.285827  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 1993 09:52:40.289938  tftpboot 192.168.201.1 7022983/tftp-deploy-evx5htap/kernel/bzImoy-evx5htap/kernel/cmdline 7022983/tftp-deploy-evx5htap/ramdisk/ramdisk.cpio.gz
 1994 09:52:40.290041  Waiting for link
 1995 09:52:40.491070  done.
 1996 09:52:40.491222  MAC: f4:f5:e8:50:e7:f3
 1997 09:52:40.494044  Sending DHCP discover... done.
 1998 09:52:40.497300  Waiting for reply... done.
 1999 09:52:40.500494  Sending DHCP request... done.
 2000 09:52:40.503754  Waiting for reply... done.
 2001 09:52:40.506911  My ip is 192.168.201.16
 2002 09:52:40.510245  The DHCP server ip is 192.168.201.1
 2003 09:52:40.517085  TFTP server IP predefined by user: 192.168.201.1
 2004 09:52:40.523245  Bootfile predefined by user: 7022983/tftp-deploy-evx5htap/kernel/bzImage
 2005 09:52:40.526649  Sending tftp read request... done.
 2006 09:52:40.529893  Waiting for the transfer... 
 2007 09:52:40.801887  00000000 ################################################################
 2008 09:52:41.095304  00080000 ################################################################
 2009 09:52:41.390323  00100000 ################################################################
 2010 09:52:41.674073  00180000 ################################################################
 2011 09:52:41.934697  00200000 ################################################################
 2012 09:52:42.204190  00280000 ################################################################
 2013 09:52:42.459188  00300000 ################################################################
 2014 09:52:42.718333  00380000 ################################################################
 2015 09:52:42.981829  00400000 ################################################################
 2016 09:52:43.270073  00480000 ################################################################
 2017 09:52:43.561304  00500000 ################################################################
 2018 09:52:43.818497  00580000 ################################################################
 2019 09:52:44.097627  00600000 ################################################################ done.
 2020 09:52:44.101027  The bootfile was 6815632 bytes long.
 2021 09:52:44.104079  Sending tftp read request... done.
 2022 09:52:44.107083  Waiting for the transfer... 
 2023 09:52:44.485435  00000000 ################################################################
 2024 09:52:44.815270  00080000 ################################################################
 2025 09:52:45.134795  00100000 ################################################################
 2026 09:52:45.453290  00180000 ################################################################
 2027 09:52:45.751508  00200000 ################################################################
 2028 09:52:46.030961  00280000 ################################################################
 2029 09:52:46.309554  00300000 ################################################################
 2030 09:52:46.605522  00380000 ################################################################
 2031 09:52:46.925076  00400000 ################################################################
 2032 09:52:47.244173  00480000 ################################################################
 2033 09:52:47.557036  00500000 ################################################################
 2034 09:52:47.861547  00580000 ################################################################
 2035 09:52:48.143066  00600000 ################################################################
 2036 09:52:48.439524  00680000 ################################################################
 2037 09:52:48.758839  00700000 ################################################################
 2038 09:52:49.074876  00780000 ################################################################
 2039 09:52:49.174734  00800000 #################### done.
 2040 09:52:49.178182  Sending tftp read request... done.
 2041 09:52:49.181347  Waiting for the transfer... 
 2042 09:52:49.181437  00000000 # done.
 2043 09:52:49.191318  Command line loaded dynamically from TFTP file: 7022983/tftp-deploy-evx5htap/kernel/cmdline
 2044 09:52:49.207892  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2045 09:52:49.214435  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2046 09:52:49.222101  Shutting down all USB controllers.
 2047 09:52:49.222398  Removing current net device
 2048 09:52:49.225633  Finalizing coreboot
 2049 09:52:49.232351  Exiting depthcharge with code 4 at timestamp: 18292974
 2050 09:52:49.232755  
 2051 09:52:49.233009  Starting kernel ...
 2052 09:52:49.233683  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 2053 09:52:49.234020  start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
 2054 09:52:49.234316  Setting prompt string to ['Linux version [0-9]']
 2055 09:52:49.234567  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2056 09:52:49.234841  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2057 09:52:49.235573  
 2058 09:52:49.235930  
 2060 09:57:19.235118  end: 2.2.5 auto-login-action (duration 00:04:30) [common]
 2062 09:57:19.236240  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
 2064 09:57:19.237133  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2067 09:57:19.238910  end: 2 depthcharge-action (duration 00:05:00) [common]
 2069 09:57:19.240029  Cleaning after the job
 2070 09:57:19.240472  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/ramdisk
 2071 09:57:19.243634  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/kernel
 2072 09:57:19.246188  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022983/tftp-deploy-evx5htap/modules
 2073 09:57:19.247232  start: 5.1 power-off (timeout 00:00:30) [common]
 2074 09:57:19.248119  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
 2075 09:57:19.274650  >> Command sent successfully.

 2076 09:57:19.276663  Returned 0 in 0 seconds
 2077 09:57:19.377428  end: 5.1 power-off (duration 00:00:00) [common]
 2079 09:57:19.378983  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2080 09:57:19.380355  Listened to connection for namespace 'common' for up to 1s
 2081 09:57:20.383132  Finalising connection for namespace 'common'
 2082 09:57:20.383854  Disconnecting from shell: Finalise
 2083 09:57:20.485296  end: 5.2 read-feedback (duration 00:00:01) [common]
 2084 09:57:20.485975  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022983
 2085 09:57:20.511372  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022983
 2086 09:57:20.512026  JobError: Your job cannot terminate cleanly.