Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:38.789709 lava-dispatcher, installed at version: 2022.06
2 09:46:38.789920 start: 0 validate
3 09:46:38.790083 Start time: 2022-08-12 09:46:38.790076+00:00 (UTC)
4 09:46:38.790259 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:38.790440 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
6 09:46:39.090431 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:39.091177 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:41.599784 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:41.599974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 09:46:41.602472 validate duration: 2.81
12 09:46:41.602715 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:46:41.602823 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:46:41.602924 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:46:41.603044 Not decompressing ramdisk as can be used compressed.
16 09:46:41.603131 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
17 09:46:41.603207 saving as /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/ramdisk/rootfs.cpio.gz
18 09:46:41.603270 total size: 8415960 (8MB)
19 09:46:41.604259 progress 0% (0MB)
20 09:46:41.606449 progress 5% (0MB)
21 09:46:41.608714 progress 10% (0MB)
22 09:46:41.610973 progress 15% (1MB)
23 09:46:41.613183 progress 20% (1MB)
24 09:46:41.615310 progress 25% (2MB)
25 09:46:41.617495 progress 30% (2MB)
26 09:46:41.619462 progress 35% (2MB)
27 09:46:41.621644 progress 40% (3MB)
28 09:46:41.623794 progress 45% (3MB)
29 09:46:41.625995 progress 50% (4MB)
30 09:46:41.628122 progress 55% (4MB)
31 09:46:41.630249 progress 60% (4MB)
32 09:46:41.632181 progress 65% (5MB)
33 09:46:41.634294 progress 70% (5MB)
34 09:46:41.636378 progress 75% (6MB)
35 09:46:41.638508 progress 80% (6MB)
36 09:46:41.640602 progress 85% (6MB)
37 09:46:41.642698 progress 90% (7MB)
38 09:46:41.644628 progress 95% (7MB)
39 09:46:41.646733 progress 100% (8MB)
40 09:46:41.647002 8MB downloaded in 0.04s (183.55MB/s)
41 09:46:41.647154 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:46:41.647396 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:46:41.647485 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:46:41.647573 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:46:41.647703 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 09:46:41.647774 saving as /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/kernel/bzImage
48 09:46:41.647836 total size: 6815632 (6MB)
49 09:46:41.647897 No compression specified
50 09:46:41.648969 progress 0% (0MB)
51 09:46:41.650758 progress 5% (0MB)
52 09:46:41.652691 progress 10% (0MB)
53 09:46:41.654518 progress 15% (1MB)
54 09:46:41.656188 progress 20% (1MB)
55 09:46:41.657887 progress 25% (1MB)
56 09:46:41.659712 progress 30% (1MB)
57 09:46:41.661472 progress 35% (2MB)
58 09:46:41.663490 progress 40% (2MB)
59 09:46:41.665255 progress 45% (2MB)
60 09:46:41.666972 progress 50% (3MB)
61 09:46:41.668843 progress 55% (3MB)
62 09:46:41.670514 progress 60% (3MB)
63 09:46:41.672337 progress 65% (4MB)
64 09:46:41.674055 progress 70% (4MB)
65 09:46:41.675716 progress 75% (4MB)
66 09:46:41.677553 progress 80% (5MB)
67 09:46:41.679220 progress 85% (5MB)
68 09:46:41.681088 progress 90% (5MB)
69 09:46:41.682748 progress 95% (6MB)
70 09:46:41.684450 progress 100% (6MB)
71 09:46:41.684806 6MB downloaded in 0.04s (175.84MB/s)
72 09:46:41.684957 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:46:41.685198 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:46:41.685289 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:46:41.685380 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:46:41.685515 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 09:46:41.685588 saving as /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/modules/modules.tar
79 09:46:41.685653 total size: 51724 (0MB)
80 09:46:41.685716 Using unxz to decompress xz
81 09:46:41.689152 progress 63% (0MB)
82 09:46:41.689671 progress 100% (0MB)
83 09:46:41.692976 0MB downloaded in 0.01s (6.74MB/s)
84 09:46:41.693286 end: 1.3.1 http-download (duration 00:00:00) [common]
86 09:46:41.693706 end: 1.3 download-retry (duration 00:00:00) [common]
87 09:46:41.693862 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 09:46:41.694025 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 09:46:41.694154 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 09:46:41.694289 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 09:46:41.694536 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4
92 09:46:41.694725 makedir: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin
93 09:46:41.694866 makedir: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/tests
94 09:46:41.695011 makedir: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/results
95 09:46:41.695159 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-add-keys
96 09:46:41.695362 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-add-sources
97 09:46:41.695548 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-background-process-start
98 09:46:41.695726 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-background-process-stop
99 09:46:41.695898 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-common-functions
100 09:46:41.696076 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-echo-ipv4
101 09:46:41.696255 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-install-packages
102 09:46:41.696428 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-installed-packages
103 09:46:41.696648 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-os-build
104 09:46:41.696828 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-probe-channel
105 09:46:41.697003 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-probe-ip
106 09:46:41.697183 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-target-ip
107 09:46:41.697358 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-target-mac
108 09:46:41.697536 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-target-storage
109 09:46:41.697719 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-case
110 09:46:41.697893 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-event
111 09:46:41.698069 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-feedback
112 09:46:41.698251 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-raise
113 09:46:41.698426 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-reference
114 09:46:41.698604 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-runner
115 09:46:41.698781 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-set
116 09:46:41.698950 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-test-shell
117 09:46:41.699131 Updating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-install-packages (oe)
118 09:46:41.699344 Updating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/bin/lava-installed-packages (oe)
119 09:46:41.699536 Creating /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/environment
120 09:46:41.699682 LAVA metadata
121 09:46:41.699793 - LAVA_JOB_ID=7022965
122 09:46:41.699897 - LAVA_DISPATCHER_IP=192.168.201.1
123 09:46:41.700053 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 09:46:41.700153 skipped lava-vland-overlay
125 09:46:41.700266 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 09:46:41.700400 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 09:46:41.700541 skipped lava-multinode-overlay
128 09:46:41.700667 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 09:46:41.700795 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 09:46:41.700912 Loading test definitions
131 09:46:41.701073 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 09:46:41.701191 Using /lava-7022965 at stage 0
133 09:46:41.701647 uuid=7022965_1.4.2.3.1 testdef=None
134 09:46:41.701776 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 09:46:41.701911 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 09:46:41.702668 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 09:46:41.703034 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 09:46:41.704003 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 09:46:41.704377 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 09:46:41.705352 runner path: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/0/tests/0_dmesg test_uuid 7022965_1.4.2.3.1
143 09:46:41.705571 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 09:46:41.705935 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 09:46:41.706050 Using /lava-7022965 at stage 1
147 09:46:41.706466 uuid=7022965_1.4.2.3.5 testdef=None
148 09:46:41.706601 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 09:46:41.706727 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 09:46:41.707438 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 09:46:41.707787 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 09:46:41.708793 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 09:46:41.709168 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 09:46:41.710139 runner path: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/1/tests/1_bootrr test_uuid 7022965_1.4.2.3.5
157 09:46:41.710367 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 09:46:41.710721 Creating lava-test-runner.conf files
160 09:46:41.710817 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/0 for stage 0
161 09:46:41.710943 - 0_dmesg
162 09:46:41.711060 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022965/lava-overlay-z5mg3ed4/lava-7022965/1 for stage 1
163 09:46:41.711187 - 1_bootrr
164 09:46:41.711331 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 09:46:41.711461 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 09:46:41.720162 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 09:46:41.720320 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 09:46:41.720448 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 09:46:41.720618 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 09:46:41.720746 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 09:46:41.948039 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 09:46:41.948375 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 09:46:41.948532 extracting modules file /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022965/extract-overlay-ramdisk-d4ryy503/ramdisk
174 09:46:41.953352 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 09:46:41.953475 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 09:46:41.953563 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022965/compress-overlay-6tbq702g/overlay-1.4.2.4.tar.gz to ramdisk
177 09:46:41.953640 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022965/compress-overlay-6tbq702g/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022965/extract-overlay-ramdisk-d4ryy503/ramdisk
178 09:46:41.958073 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 09:46:41.958189 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 09:46:41.958285 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 09:46:41.958379 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 09:46:41.958463 Building ramdisk /var/lib/lava/dispatcher/tmp/7022965/extract-overlay-ramdisk-d4ryy503/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022965/extract-overlay-ramdisk-d4ryy503/ramdisk
183 09:46:42.049100 >> 48006 blocks
184 09:46:42.839602 rename /var/lib/lava/dispatcher/tmp/7022965/extract-overlay-ramdisk-d4ryy503/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
185 09:46:42.840131 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 09:46:42.840317 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 09:46:42.840481 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 09:46:42.840624 No mkimage arch provided, not using FIT.
189 09:46:42.840766 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 09:46:42.840908 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 09:46:42.841061 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 09:46:42.841209 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 09:46:42.841332 No LXC device requested
194 09:46:42.841469 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 09:46:42.841618 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 09:46:42.841760 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 09:46:42.841880 Checking files for TFTP limit of 4294967296 bytes.
198 09:46:42.842428 end: 1 tftp-deploy (duration 00:00:01) [common]
199 09:46:42.842580 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 09:46:42.842731 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 09:46:42.842920 substitutions:
202 09:46:42.843035 - {DTB}: None
203 09:46:42.843144 - {INITRD}: 7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
204 09:46:42.843249 - {KERNEL}: 7022965/tftp-deploy-k8rmvax4/kernel/bzImage
205 09:46:42.843353 - {LAVA_MAC}: None
206 09:46:42.843454 - {PRESEED_CONFIG}: None
207 09:46:42.843557 - {PRESEED_LOCAL}: None
208 09:46:42.843661 - {RAMDISK}: 7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
209 09:46:42.843765 - {ROOT_PART}: None
210 09:46:42.843869 - {ROOT}: None
211 09:46:42.843972 - {SERVER_IP}: 192.168.201.1
212 09:46:42.844075 - {TEE}: None
213 09:46:42.844176 Parsed boot commands:
214 09:46:42.844276 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 09:46:42.844528 Parsed boot commands: tftpboot 192.168.201.1 7022965/tftp-deploy-k8rmvax4/kernel/bzImage 7022965/tftp-deploy-k8rmvax4/kernel/cmdline 7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
216 09:46:42.844679 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 09:46:42.844828 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 09:46:42.844988 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 09:46:42.845131 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 09:46:42.845246 Not connected, no need to disconnect.
221 09:46:42.845376 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 09:46:42.845515 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 09:46:42.845633 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
224 09:46:42.848928 Setting prompt string to ['lava-test: # ']
225 09:46:42.849325 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 09:46:42.849482 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 09:46:42.849635 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 09:46:42.849785 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 09:46:42.850080 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
230 09:46:42.870561 >> Command sent successfully.
231 09:46:42.872768 Returned 0 in 0 seconds
232 09:46:42.973578 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 09:46:42.974216 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 09:46:42.974340 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 09:46:42.974443 Setting prompt string to 'Starting depthcharge on Voema...'
237 09:46:42.974522 Changing prompt to 'Starting depthcharge on Voema...'
238 09:46:42.974611 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 09:46:42.974911 [Enter `^Ec?' for help]
240 09:46:50.532210
241 09:46:50.532422
242 09:46:50.542253 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 09:46:50.545064 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 09:46:50.551820 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 09:46:50.555306 CPU: AES supported, TXT NOT supported, VT supported
246 09:46:50.562030 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 09:46:50.568525 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 09:46:50.572048 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 09:46:50.575395 VBOOT: Loading verstage.
250 09:46:50.578696 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 09:46:50.585092 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 09:46:50.588482 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 09:46:50.599084 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 09:46:50.605647 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 09:46:50.605746
256 09:46:50.605814
257 09:46:50.618664 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 09:46:50.632444 Probing TPM: . done!
259 09:46:50.635893 TPM ready after 0 ms
260 09:46:50.639442 Connected to device vid:did:rid of 1ae0:0028:00
261 09:46:50.650376 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
262 09:46:50.657348 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 09:46:50.660743 Initialized TPM device CR50 revision 0
264 09:46:50.710694 tlcl_send_startup: Startup return code is 0
265 09:46:50.710850 TPM: setup succeeded
266 09:46:50.726666 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 09:46:50.740227 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 09:46:50.753688 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 09:46:50.763202 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 09:46:50.767160 Chrome EC: UHEPI supported
271 09:46:50.770628 Phase 1
272 09:46:50.773791 FMAP: area GBB found @ 1805000 (458752 bytes)
273 09:46:50.784020 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 09:46:50.790582 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 09:46:50.797132 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 09:46:50.803757 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 09:46:50.807212 Recovery requested (1009000e)
278 09:46:50.810492 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 09:46:50.821862 tlcl_extend: response is 0
280 09:46:50.828595 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 09:46:50.838650 tlcl_extend: response is 0
282 09:46:50.845430 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 09:46:50.851568 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 09:46:50.858539 BS: verstage times (exec / console): total (unknown) / 142 ms
285 09:46:50.858628
286 09:46:50.858696
287 09:46:50.871468 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 09:46:50.878284 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 09:46:50.881325 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 09:46:50.884972 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 09:46:50.891659 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 09:46:50.894678 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 09:46:50.898160 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 09:46:50.901730 TCO_STS: 0000 0000
295 09:46:50.905067 GEN_PMCON: d0015038 00002200
296 09:46:50.908353 GBLRST_CAUSE: 00000000 00000000
297 09:46:50.908470 HPR_CAUSE0: 00000000
298 09:46:50.911585 prev_sleep_state 5
299 09:46:50.914670 Boot Count incremented to 9059
300 09:46:50.921604 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 09:46:50.927840 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 09:46:50.934594 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 09:46:50.940996 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 09:46:50.945504 Chrome EC: UHEPI supported
305 09:46:50.952401 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 09:46:50.965065 Probing TPM: done!
307 09:46:50.972103 Connected to device vid:did:rid of 1ae0:0028:00
308 09:46:50.982527 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
309 09:46:50.991414 Initialized TPM device CR50 revision 0
310 09:46:51.001167 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 09:46:51.007981 MRC: Hash idx 0x100b comparison successful.
312 09:46:51.011154 MRC cache found, size faa8
313 09:46:51.011241 bootmode is set to: 2
314 09:46:51.014676 SPD index = 0
315 09:46:51.021569 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 09:46:51.024378 SPD: module type is LPDDR4X
317 09:46:51.027801 SPD: module part number is MT53E512M64D4NW-046
318 09:46:51.034277 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 09:46:51.037783 SPD: device width 16 bits, bus width 16 bits
320 09:46:51.044371 SPD: module size is 1024 MB (per channel)
321 09:46:51.477656 CBMEM:
322 09:46:51.481121 IMD: root @ 0x76fff000 254 entries.
323 09:46:51.484205 IMD: root @ 0x76ffec00 62 entries.
324 09:46:51.487768 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 09:46:51.494148 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 09:46:51.497396 External stage cache:
327 09:46:51.500769 IMD: root @ 0x7b3ff000 254 entries.
328 09:46:51.504159 IMD: root @ 0x7b3fec00 62 entries.
329 09:46:51.519260 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 09:46:51.525901 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 09:46:51.532691 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 09:46:51.546415 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 09:46:51.553432 cse_lite: Skip switching to RW in the recovery path
334 09:46:51.553520 8 DIMMs found
335 09:46:51.553589 SMM Memory Map
336 09:46:51.556340 SMRAM : 0x7b000000 0x800000
337 09:46:51.564099 Subregion 0: 0x7b000000 0x200000
338 09:46:51.564191 Subregion 1: 0x7b200000 0x200000
339 09:46:51.567746 Subregion 2: 0x7b400000 0x400000
340 09:46:51.571167 top_of_ram = 0x77000000
341 09:46:51.577819 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 09:46:51.580944 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 09:46:51.587403 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 09:46:51.591053 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 09:46:51.601026 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 09:46:51.604364 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 09:46:51.616106 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 09:46:51.622550 Processing 211 relocs. Offset value of 0x74c0b000
349 09:46:51.629371 BS: romstage times (exec / console): total (unknown) / 277 ms
350 09:46:51.635550
351 09:46:51.635637
352 09:46:51.645607 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 09:46:51.648573 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 09:46:51.658800 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 09:46:51.665374 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 09:46:51.672050 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 09:46:51.678550 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 09:46:51.725535 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 09:46:51.732475 Processing 5008 relocs. Offset value of 0x75d98000
360 09:46:51.735413 BS: postcar times (exec / console): total (unknown) / 59 ms
361 09:46:51.738826
362 09:46:51.738917
363 09:46:51.748506 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 09:46:51.748598 Normal boot
365 09:46:51.752612 FW_CONFIG value is 0x804c02
366 09:46:51.755304 PCI: 00:07.0 disabled by fw_config
367 09:46:51.758839 PCI: 00:07.1 disabled by fw_config
368 09:46:51.762508 PCI: 00:0d.2 disabled by fw_config
369 09:46:51.765522 PCI: 00:1c.7 disabled by fw_config
370 09:46:51.772238 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 09:46:51.778748 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 09:46:51.782317 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 09:46:51.785442 GENERIC: 0.0 disabled by fw_config
374 09:46:51.788839 GENERIC: 1.0 disabled by fw_config
375 09:46:51.795430 fw_config match found: DB_USB=USB3_ACTIVE
376 09:46:51.798773 fw_config match found: DB_USB=USB3_ACTIVE
377 09:46:51.802226 fw_config match found: DB_USB=USB3_ACTIVE
378 09:46:51.805336 fw_config match found: DB_USB=USB3_ACTIVE
379 09:46:51.812232 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 09:46:51.819009 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 09:46:51.828683 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 09:46:51.835187 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 09:46:51.838449 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 09:46:51.845324 microcode: Update skipped, already up-to-date
385 09:46:51.851783 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 09:46:51.879118 Detected 4 core, 8 thread CPU.
387 09:46:51.882742 Setting up SMI for CPU
388 09:46:51.885558 IED base = 0x7b400000
389 09:46:51.885648 IED size = 0x00400000
390 09:46:51.889143 Will perform SMM setup.
391 09:46:51.895755 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 09:46:51.902333 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 09:46:51.909005 Processing 16 relocs. Offset value of 0x00030000
394 09:46:51.912266 Attempting to start 7 APs
395 09:46:51.915537 Waiting for 10ms after sending INIT.
396 09:46:51.931144 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 09:46:51.934629 AP: slot 7 apic_id 3.
398 09:46:51.937927 AP: slot 4 apic_id 2.
399 09:46:51.938018 AP: slot 2 apic_id 5.
400 09:46:51.938086 done.
401 09:46:51.941118 AP: slot 6 apic_id 6.
402 09:46:51.944373 AP: slot 3 apic_id 7.
403 09:46:51.948114 Waiting for 2nd SIPI to complete...done.
404 09:46:51.951076 AP: slot 5 apic_id 4.
405 09:46:51.957520 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 09:46:51.964572 Processing 13 relocs. Offset value of 0x00038000
407 09:46:51.967859 Unable to locate Global NVS
408 09:46:51.974245 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 09:46:51.977736 Installing permanent SMM handler to 0x7b000000
410 09:46:51.987426 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 09:46:51.990902 Processing 794 relocs. Offset value of 0x7b010000
412 09:46:52.000715 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 09:46:52.004102 Processing 13 relocs. Offset value of 0x7b008000
414 09:46:52.010935 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 09:46:52.017595 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 09:46:52.021247 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 09:46:52.027593 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 09:46:52.034155 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 09:46:52.040858 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 09:46:52.047236 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 09:46:52.047323 Unable to locate Global NVS
422 09:46:52.057326 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 09:46:52.060348 Clearing SMI status registers
424 09:46:52.060434 SMI_STS: PM1
425 09:46:52.063788 PM1_STS: PWRBTN
426 09:46:52.070625 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 09:46:52.074135 In relocation handler: CPU 0
428 09:46:52.077164 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 09:46:52.084055 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 09:46:52.084145 Relocation complete.
431 09:46:52.093844 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 09:46:52.093931 In relocation handler: CPU 1
433 09:46:52.100419 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 09:46:52.100545 Relocation complete.
435 09:46:52.110562 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 09:46:52.110649 In relocation handler: CPU 7
437 09:46:52.117128 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 09:46:52.117217 Relocation complete.
439 09:46:52.126907 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
440 09:46:52.126996 In relocation handler: CPU 4
441 09:46:52.133734 New SMBASE=0x7afff000 IEDBASE=0x7b400000
442 09:46:52.137128 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 09:46:52.140432 Relocation complete.
444 09:46:52.146711 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
445 09:46:52.150305 In relocation handler: CPU 6
446 09:46:52.153399 New SMBASE=0x7affe800 IEDBASE=0x7b400000
447 09:46:52.160410 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 09:46:52.160504 Relocation complete.
449 09:46:52.166964 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
450 09:46:52.170103 In relocation handler: CPU 3
451 09:46:52.176633 New SMBASE=0x7afff400 IEDBASE=0x7b400000
452 09:46:52.176720 Relocation complete.
453 09:46:52.183705 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
454 09:46:52.186745 In relocation handler: CPU 2
455 09:46:52.190252 New SMBASE=0x7afff800 IEDBASE=0x7b400000
456 09:46:52.193232 Relocation complete.
457 09:46:52.199778 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 09:46:52.203277 In relocation handler: CPU 5
459 09:46:52.206568 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 09:46:52.213517 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 09:46:52.216836 Relocation complete.
462 09:46:52.216923 Initializing CPU #0
463 09:46:52.220030 CPU: vendor Intel device 806c1
464 09:46:52.223256 CPU: family 06, model 8c, stepping 01
465 09:46:52.226782 Clearing out pending MCEs
466 09:46:52.229993 Setting up local APIC...
467 09:46:52.233645 apic_id: 0x00 done.
468 09:46:52.233723 Turbo is available but hidden
469 09:46:52.237522 Turbo is available and visible
470 09:46:52.244356 microcode: Update skipped, already up-to-date
471 09:46:52.244469 CPU #0 initialized
472 09:46:52.247809 Initializing CPU #7
473 09:46:52.247885 Initializing CPU #4
474 09:46:52.251038 CPU: vendor Intel device 806c1
475 09:46:52.254474 CPU: family 06, model 8c, stepping 01
476 09:46:52.257499 CPU: vendor Intel device 806c1
477 09:46:52.264353 CPU: family 06, model 8c, stepping 01
478 09:46:52.264440 Clearing out pending MCEs
479 09:46:52.267820 Clearing out pending MCEs
480 09:46:52.271381 Setting up local APIC...
481 09:46:52.274280 Initializing CPU #5
482 09:46:52.274367 Initializing CPU #2
483 09:46:52.277717 CPU: vendor Intel device 806c1
484 09:46:52.281221 CPU: family 06, model 8c, stepping 01
485 09:46:52.284598 CPU: vendor Intel device 806c1
486 09:46:52.287653 CPU: family 06, model 8c, stepping 01
487 09:46:52.291023 Clearing out pending MCEs
488 09:46:52.294120 Clearing out pending MCEs
489 09:46:52.297866 apic_id: 0x03 done.
490 09:46:52.297952 Initializing CPU #1
491 09:46:52.300683 Setting up local APIC...
492 09:46:52.304151 Initializing CPU #3
493 09:46:52.307500 microcode: Update skipped, already up-to-date
494 09:46:52.310637 apic_id: 0x02 done.
495 09:46:52.310724 CPU #7 initialized
496 09:46:52.317280 microcode: Update skipped, already up-to-date
497 09:46:52.317367 CPU: vendor Intel device 806c1
498 09:46:52.323867 CPU: family 06, model 8c, stepping 01
499 09:46:52.323954 Initializing CPU #6
500 09:46:52.327427 Clearing out pending MCEs
501 09:46:52.330764 CPU: vendor Intel device 806c1
502 09:46:52.334011 CPU: family 06, model 8c, stepping 01
503 09:46:52.337525 Setting up local APIC...
504 09:46:52.340766 CPU: vendor Intel device 806c1
505 09:46:52.344765 CPU: family 06, model 8c, stepping 01
506 09:46:52.347583 CPU #4 initialized
507 09:46:52.347670 apic_id: 0x07 done.
508 09:46:52.350564 Clearing out pending MCEs
509 09:46:52.354375 microcode: Update skipped, already up-to-date
510 09:46:52.357417 Setting up local APIC...
511 09:46:52.360825 Setting up local APIC...
512 09:46:52.363848 Clearing out pending MCEs
513 09:46:52.363932 apic_id: 0x05 done.
514 09:46:52.367441 Setting up local APIC...
515 09:46:52.370322 Setting up local APIC...
516 09:46:52.373912 apic_id: 0x06 done.
517 09:46:52.374005 apic_id: 0x01 done.
518 09:46:52.380807 microcode: Update skipped, already up-to-date
519 09:46:52.380924 CPU #3 initialized
520 09:46:52.383752 CPU #6 initialized
521 09:46:52.383838 apic_id: 0x04 done.
522 09:46:52.390668 microcode: Update skipped, already up-to-date
523 09:46:52.393713 microcode: Update skipped, already up-to-date
524 09:46:52.397157 CPU #2 initialized
525 09:46:52.397243 CPU #5 initialized
526 09:46:52.403694 microcode: Update skipped, already up-to-date
527 09:46:52.403780 CPU #1 initialized
528 09:46:52.410116 bsp_do_flight_plan done after 457 msecs.
529 09:46:52.413936 CPU: frequency set to 4000 MHz
530 09:46:52.414022 Enabling SMIs.
531 09:46:52.420091 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 09:46:52.435913 SATAXPCIE1 indicates PCIe NVMe is present
533 09:46:52.439218 Probing TPM: done!
534 09:46:52.442906 Connected to device vid:did:rid of 1ae0:0028:00
535 09:46:52.453436 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
536 09:46:52.456799 Initialized TPM device CR50 revision 0
537 09:46:52.460145 Enabling S0i3.4
538 09:46:52.466567 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 09:46:52.470492 Found a VBT of 8704 bytes after decompression
540 09:46:52.476594 cse_lite: CSE RO boot. HybridStorageMode disabled
541 09:46:52.483250 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 09:46:52.559507 FSPS returned 0
543 09:46:52.563130 Executing Phase 1 of FspMultiPhaseSiInit
544 09:46:52.573092 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 09:46:52.576234 port C0 DISC req: usage 1 usb3 1 usb2 5
546 09:46:52.579784 Raw Buffer output 0 00000511
547 09:46:52.582816 Raw Buffer output 1 00000000
548 09:46:52.586855 pmc_send_ipc_cmd succeeded
549 09:46:52.593278 port C1 DISC req: usage 1 usb3 2 usb2 3
550 09:46:52.593367 Raw Buffer output 0 00000321
551 09:46:52.596743 Raw Buffer output 1 00000000
552 09:46:52.600836 pmc_send_ipc_cmd succeeded
553 09:46:52.605792 Detected 4 core, 8 thread CPU.
554 09:46:52.609316 Detected 4 core, 8 thread CPU.
555 09:46:52.843202 Display FSP Version Info HOB
556 09:46:52.846045 Reference Code - CPU = a.0.4c.31
557 09:46:52.849823 uCode Version = 0.0.0.86
558 09:46:52.853086 TXT ACM version = ff.ff.ff.ffff
559 09:46:52.856177 Reference Code - ME = a.0.4c.31
560 09:46:52.859522 MEBx version = 0.0.0.0
561 09:46:52.862759 ME Firmware Version = Consumer SKU
562 09:46:52.866047 Reference Code - PCH = a.0.4c.31
563 09:46:52.869434 PCH-CRID Status = Disabled
564 09:46:52.872919 PCH-CRID Original Value = ff.ff.ff.ffff
565 09:46:52.875930 PCH-CRID New Value = ff.ff.ff.ffff
566 09:46:52.879459 OPROM - RST - RAID = ff.ff.ff.ffff
567 09:46:52.882852 PCH Hsio Version = 4.0.0.0
568 09:46:52.886028 Reference Code - SA - System Agent = a.0.4c.31
569 09:46:52.889551 Reference Code - MRC = 2.0.0.1
570 09:46:52.892984 SA - PCIe Version = a.0.4c.31
571 09:46:52.896118 SA-CRID Status = Disabled
572 09:46:52.899647 SA-CRID Original Value = 0.0.0.1
573 09:46:52.902754 SA-CRID New Value = 0.0.0.1
574 09:46:52.906151 OPROM - VBIOS = ff.ff.ff.ffff
575 09:46:52.909465 IO Manageability Engine FW Version = 11.1.4.0
576 09:46:52.912439 PHY Build Version = 0.0.0.e0
577 09:46:52.915905 Thunderbolt(TM) FW Version = 0.0.0.0
578 09:46:52.922524 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 09:46:52.926498 ITSS IRQ Polarities Before:
580 09:46:52.926599 IPC0: 0xffffffff
581 09:46:52.929271 IPC1: 0xffffffff
582 09:46:52.929359 IPC2: 0xffffffff
583 09:46:52.932782 IPC3: 0xffffffff
584 09:46:52.936111 ITSS IRQ Polarities After:
585 09:46:52.936202 IPC0: 0xffffffff
586 09:46:52.939192 IPC1: 0xffffffff
587 09:46:52.939281 IPC2: 0xffffffff
588 09:46:52.942741 IPC3: 0xffffffff
589 09:46:52.945964 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 09:46:52.959132 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 09:46:52.969115 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 09:46:52.982501 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 09:46:52.989327 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
594 09:46:52.989440 Enumerating buses...
595 09:46:52.996168 Show all devs... Before device enumeration.
596 09:46:52.996267 Root Device: enabled 1
597 09:46:52.999463 DOMAIN: 0000: enabled 1
598 09:46:53.002427 CPU_CLUSTER: 0: enabled 1
599 09:46:53.005932 PCI: 00:00.0: enabled 1
600 09:46:53.006016 PCI: 00:02.0: enabled 1
601 09:46:53.009035 PCI: 00:04.0: enabled 1
602 09:46:53.012703 PCI: 00:05.0: enabled 1
603 09:46:53.015685 PCI: 00:06.0: enabled 0
604 09:46:53.015771 PCI: 00:07.0: enabled 0
605 09:46:53.019070 PCI: 00:07.1: enabled 0
606 09:46:53.022442 PCI: 00:07.2: enabled 0
607 09:46:53.026093 PCI: 00:07.3: enabled 0
608 09:46:53.026189 PCI: 00:08.0: enabled 1
609 09:46:53.029148 PCI: 00:09.0: enabled 0
610 09:46:53.032264 PCI: 00:0a.0: enabled 0
611 09:46:53.035865 PCI: 00:0d.0: enabled 1
612 09:46:53.035955 PCI: 00:0d.1: enabled 0
613 09:46:53.038997 PCI: 00:0d.2: enabled 0
614 09:46:53.042201 PCI: 00:0d.3: enabled 0
615 09:46:53.042290 PCI: 00:0e.0: enabled 0
616 09:46:53.045670 PCI: 00:10.2: enabled 1
617 09:46:53.049224 PCI: 00:10.6: enabled 0
618 09:46:53.052721 PCI: 00:10.7: enabled 0
619 09:46:53.052860 PCI: 00:12.0: enabled 0
620 09:46:53.055417 PCI: 00:12.6: enabled 0
621 09:46:53.058802 PCI: 00:13.0: enabled 0
622 09:46:53.062136 PCI: 00:14.0: enabled 1
623 09:46:53.062227 PCI: 00:14.1: enabled 0
624 09:46:53.065667 PCI: 00:14.2: enabled 1
625 09:46:53.068859 PCI: 00:14.3: enabled 1
626 09:46:53.072398 PCI: 00:15.0: enabled 1
627 09:46:53.072515 PCI: 00:15.1: enabled 1
628 09:46:53.075380 PCI: 00:15.2: enabled 1
629 09:46:53.078882 PCI: 00:15.3: enabled 1
630 09:46:53.082543 PCI: 00:16.0: enabled 1
631 09:46:53.082666 PCI: 00:16.1: enabled 0
632 09:46:53.085406 PCI: 00:16.2: enabled 0
633 09:46:53.088870 PCI: 00:16.3: enabled 0
634 09:46:53.088958 PCI: 00:16.4: enabled 0
635 09:46:53.091974 PCI: 00:16.5: enabled 0
636 09:46:53.095247 PCI: 00:17.0: enabled 1
637 09:46:53.098804 PCI: 00:19.0: enabled 0
638 09:46:53.098908 PCI: 00:19.1: enabled 1
639 09:46:53.102209 PCI: 00:19.2: enabled 0
640 09:46:53.105241 PCI: 00:1c.0: enabled 1
641 09:46:53.108706 PCI: 00:1c.1: enabled 0
642 09:46:53.108794 PCI: 00:1c.2: enabled 0
643 09:46:53.112231 PCI: 00:1c.3: enabled 0
644 09:46:53.115161 PCI: 00:1c.4: enabled 0
645 09:46:53.118817 PCI: 00:1c.5: enabled 0
646 09:46:53.118922 PCI: 00:1c.6: enabled 1
647 09:46:53.121814 PCI: 00:1c.7: enabled 0
648 09:46:53.125509 PCI: 00:1d.0: enabled 1
649 09:46:53.125612 PCI: 00:1d.1: enabled 0
650 09:46:53.128822 PCI: 00:1d.2: enabled 1
651 09:46:53.132046 PCI: 00:1d.3: enabled 0
652 09:46:53.135244 PCI: 00:1e.0: enabled 1
653 09:46:53.135345 PCI: 00:1e.1: enabled 0
654 09:46:53.138925 PCI: 00:1e.2: enabled 1
655 09:46:53.141803 PCI: 00:1e.3: enabled 1
656 09:46:53.145202 PCI: 00:1f.0: enabled 1
657 09:46:53.145297 PCI: 00:1f.1: enabled 0
658 09:46:53.148676 PCI: 00:1f.2: enabled 1
659 09:46:53.151938 PCI: 00:1f.3: enabled 1
660 09:46:53.155652 PCI: 00:1f.4: enabled 0
661 09:46:53.155733 PCI: 00:1f.5: enabled 1
662 09:46:53.158851 PCI: 00:1f.6: enabled 0
663 09:46:53.161994 PCI: 00:1f.7: enabled 0
664 09:46:53.162117 APIC: 00: enabled 1
665 09:46:53.165311 GENERIC: 0.0: enabled 1
666 09:46:53.168687 GENERIC: 0.0: enabled 1
667 09:46:53.172084 GENERIC: 1.0: enabled 1
668 09:46:53.172164 GENERIC: 0.0: enabled 1
669 09:46:53.175131 GENERIC: 1.0: enabled 1
670 09:46:53.178302 USB0 port 0: enabled 1
671 09:46:53.181727 GENERIC: 0.0: enabled 1
672 09:46:53.181857 USB0 port 0: enabled 1
673 09:46:53.185258 GENERIC: 0.0: enabled 1
674 09:46:53.188787 I2C: 00:1a: enabled 1
675 09:46:53.188872 I2C: 00:31: enabled 1
676 09:46:53.191733 I2C: 00:32: enabled 1
677 09:46:53.195229 I2C: 00:10: enabled 1
678 09:46:53.195315 I2C: 00:15: enabled 1
679 09:46:53.198669 GENERIC: 0.0: enabled 0
680 09:46:53.202057 GENERIC: 1.0: enabled 0
681 09:46:53.204992 GENERIC: 0.0: enabled 1
682 09:46:53.205071 SPI: 00: enabled 1
683 09:46:53.208527 SPI: 00: enabled 1
684 09:46:53.208603 PNP: 0c09.0: enabled 1
685 09:46:53.212097 GENERIC: 0.0: enabled 1
686 09:46:53.215336 USB3 port 0: enabled 1
687 09:46:53.218203 USB3 port 1: enabled 1
688 09:46:53.218279 USB3 port 2: enabled 0
689 09:46:53.221560 USB3 port 3: enabled 0
690 09:46:53.225181 USB2 port 0: enabled 0
691 09:46:53.225278 USB2 port 1: enabled 1
692 09:46:53.228232 USB2 port 2: enabled 1
693 09:46:53.231500 USB2 port 3: enabled 0
694 09:46:53.234761 USB2 port 4: enabled 1
695 09:46:53.234840 USB2 port 5: enabled 0
696 09:46:53.238562 USB2 port 6: enabled 0
697 09:46:53.241607 USB2 port 7: enabled 0
698 09:46:53.241715 USB2 port 8: enabled 0
699 09:46:53.245115 USB2 port 9: enabled 0
700 09:46:53.248511 USB3 port 0: enabled 0
701 09:46:53.248615 USB3 port 1: enabled 1
702 09:46:53.251598 USB3 port 2: enabled 0
703 09:46:53.254839 USB3 port 3: enabled 0
704 09:46:53.258032 GENERIC: 0.0: enabled 1
705 09:46:53.258166 GENERIC: 1.0: enabled 1
706 09:46:53.261553 APIC: 01: enabled 1
707 09:46:53.265027 APIC: 05: enabled 1
708 09:46:53.265157 APIC: 07: enabled 1
709 09:46:53.268260 APIC: 02: enabled 1
710 09:46:53.268379 APIC: 04: enabled 1
711 09:46:53.271585 APIC: 06: enabled 1
712 09:46:53.274805 APIC: 03: enabled 1
713 09:46:53.274895 Compare with tree...
714 09:46:53.277966 Root Device: enabled 1
715 09:46:53.281536 DOMAIN: 0000: enabled 1
716 09:46:53.284896 PCI: 00:00.0: enabled 1
717 09:46:53.284983 PCI: 00:02.0: enabled 1
718 09:46:53.288040 PCI: 00:04.0: enabled 1
719 09:46:53.291462 GENERIC: 0.0: enabled 1
720 09:46:53.294579 PCI: 00:05.0: enabled 1
721 09:46:53.298070 PCI: 00:06.0: enabled 0
722 09:46:53.298168 PCI: 00:07.0: enabled 0
723 09:46:53.301844 GENERIC: 0.0: enabled 1
724 09:46:53.304835 PCI: 00:07.1: enabled 0
725 09:46:53.308385 GENERIC: 1.0: enabled 1
726 09:46:53.311370 PCI: 00:07.2: enabled 0
727 09:46:53.311492 GENERIC: 0.0: enabled 1
728 09:46:53.314396 PCI: 00:07.3: enabled 0
729 09:46:53.317872 GENERIC: 1.0: enabled 1
730 09:46:53.321424 PCI: 00:08.0: enabled 1
731 09:46:53.324385 PCI: 00:09.0: enabled 0
732 09:46:53.324509 PCI: 00:0a.0: enabled 0
733 09:46:53.327715 PCI: 00:0d.0: enabled 1
734 09:46:53.331382 USB0 port 0: enabled 1
735 09:46:53.334699 USB3 port 0: enabled 1
736 09:46:53.337797 USB3 port 1: enabled 1
737 09:46:53.341061 USB3 port 2: enabled 0
738 09:46:53.341149 USB3 port 3: enabled 0
739 09:46:53.344511 PCI: 00:0d.1: enabled 0
740 09:46:53.347956 PCI: 00:0d.2: enabled 0
741 09:46:53.351053 GENERIC: 0.0: enabled 1
742 09:46:53.354300 PCI: 00:0d.3: enabled 0
743 09:46:53.354435 PCI: 00:0e.0: enabled 0
744 09:46:53.358173 PCI: 00:10.2: enabled 1
745 09:46:53.360966 PCI: 00:10.6: enabled 0
746 09:46:53.364466 PCI: 00:10.7: enabled 0
747 09:46:53.367916 PCI: 00:12.0: enabled 0
748 09:46:53.368002 PCI: 00:12.6: enabled 0
749 09:46:53.370945 PCI: 00:13.0: enabled 0
750 09:46:53.374754 PCI: 00:14.0: enabled 1
751 09:46:53.377752 USB0 port 0: enabled 1
752 09:46:53.381038 USB2 port 0: enabled 0
753 09:46:53.381193 USB2 port 1: enabled 1
754 09:46:53.384196 USB2 port 2: enabled 1
755 09:46:53.387460 USB2 port 3: enabled 0
756 09:46:53.391213 USB2 port 4: enabled 1
757 09:46:53.394129 USB2 port 5: enabled 0
758 09:46:53.394221 USB2 port 6: enabled 0
759 09:46:53.397635 USB2 port 7: enabled 0
760 09:46:53.401080 USB2 port 8: enabled 0
761 09:46:53.404418 USB2 port 9: enabled 0
762 09:46:53.407781 USB3 port 0: enabled 0
763 09:46:53.410617 USB3 port 1: enabled 1
764 09:46:53.410711 USB3 port 2: enabled 0
765 09:46:53.414379 USB3 port 3: enabled 0
766 09:46:53.417384 PCI: 00:14.1: enabled 0
767 09:46:53.420839 PCI: 00:14.2: enabled 1
768 09:46:53.424415 PCI: 00:14.3: enabled 1
769 09:46:53.424521 GENERIC: 0.0: enabled 1
770 09:46:53.427810 PCI: 00:15.0: enabled 1
771 09:46:53.430678 I2C: 00:1a: enabled 1
772 09:46:53.434194 I2C: 00:31: enabled 1
773 09:46:53.437563 I2C: 00:32: enabled 1
774 09:46:53.437654 PCI: 00:15.1: enabled 1
775 09:46:53.440957 I2C: 00:10: enabled 1
776 09:46:53.444114 PCI: 00:15.2: enabled 1
777 09:46:53.448038 PCI: 00:15.3: enabled 1
778 09:46:53.448131 PCI: 00:16.0: enabled 1
779 09:46:53.450756 PCI: 00:16.1: enabled 0
780 09:46:53.454087 PCI: 00:16.2: enabled 0
781 09:46:53.457625 PCI: 00:16.3: enabled 0
782 09:46:53.460710 PCI: 00:16.4: enabled 0
783 09:46:53.460801 PCI: 00:16.5: enabled 0
784 09:46:53.464345 PCI: 00:17.0: enabled 1
785 09:46:53.467324 PCI: 00:19.0: enabled 0
786 09:46:53.470869 PCI: 00:19.1: enabled 1
787 09:46:53.474030 I2C: 00:15: enabled 1
788 09:46:53.474118 PCI: 00:19.2: enabled 0
789 09:46:53.477405 PCI: 00:1d.0: enabled 1
790 09:46:53.480588 GENERIC: 0.0: enabled 1
791 09:46:53.484289 PCI: 00:1e.0: enabled 1
792 09:46:53.488008 PCI: 00:1e.1: enabled 0
793 09:46:53.488176 PCI: 00:1e.2: enabled 1
794 09:46:53.491618 SPI: 00: enabled 1
795 09:46:53.494886 PCI: 00:1e.3: enabled 1
796 09:46:53.494976 SPI: 00: enabled 1
797 09:46:53.545003 PCI: 00:1f.0: enabled 1
798 09:46:53.545167 PNP: 0c09.0: enabled 1
799 09:46:53.545740 PCI: 00:1f.1: enabled 0
800 09:46:53.545858 PCI: 00:1f.2: enabled 1
801 09:46:53.545924 GENERIC: 0.0: enabled 1
802 09:46:53.546210 GENERIC: 0.0: enabled 1
803 09:46:53.546307 GENERIC: 1.0: enabled 1
804 09:46:53.546553 PCI: 00:1f.3: enabled 1
805 09:46:53.546630 PCI: 00:1f.4: enabled 0
806 09:46:53.546920 PCI: 00:1f.5: enabled 1
807 09:46:53.547005 PCI: 00:1f.6: enabled 0
808 09:46:53.547074 PCI: 00:1f.7: enabled 0
809 09:46:53.547594 CPU_CLUSTER: 0: enabled 1
810 09:46:53.547680 APIC: 00: enabled 1
811 09:46:53.547952 APIC: 01: enabled 1
812 09:46:53.548025 APIC: 05: enabled 1
813 09:46:53.548089 APIC: 07: enabled 1
814 09:46:53.548151 APIC: 02: enabled 1
815 09:46:53.548210 APIC: 04: enabled 1
816 09:46:53.548268 APIC: 06: enabled 1
817 09:46:53.574496 APIC: 03: enabled 1
818 09:46:53.574665 Root Device scanning...
819 09:46:53.575022 scan_static_bus for Root Device
820 09:46:53.575110 DOMAIN: 0000 enabled
821 09:46:53.575196 CPU_CLUSTER: 0 enabled
822 09:46:53.575457 DOMAIN: 0000 scanning...
823 09:46:53.575529 PCI: pci_scan_bus for bus 00
824 09:46:53.575593 PCI: 00:00.0 [8086/0000] ops
825 09:46:53.575654 PCI: 00:00.0 [8086/9a12] enabled
826 09:46:53.578827 PCI: 00:02.0 [8086/0000] bus ops
827 09:46:53.578914 PCI: 00:02.0 [8086/9a40] enabled
828 09:46:53.581819 PCI: 00:04.0 [8086/0000] bus ops
829 09:46:53.585259 PCI: 00:04.0 [8086/9a03] enabled
830 09:46:53.588716 PCI: 00:05.0 [8086/9a19] enabled
831 09:46:53.591824 PCI: 00:07.0 [0000/0000] hidden
832 09:46:53.595478 PCI: 00:08.0 [8086/9a11] enabled
833 09:46:53.598371 PCI: 00:0a.0 [8086/9a0d] disabled
834 09:46:53.601903 PCI: 00:0d.0 [8086/0000] bus ops
835 09:46:53.605512 PCI: 00:0d.0 [8086/9a13] enabled
836 09:46:53.608258 PCI: 00:14.0 [8086/0000] bus ops
837 09:46:53.611579 PCI: 00:14.0 [8086/a0ed] enabled
838 09:46:53.615166 PCI: 00:14.2 [8086/a0ef] enabled
839 09:46:53.618311 PCI: 00:14.3 [8086/0000] bus ops
840 09:46:53.621810 PCI: 00:14.3 [8086/a0f0] enabled
841 09:46:53.625225 PCI: 00:15.0 [8086/0000] bus ops
842 09:46:53.628452 PCI: 00:15.0 [8086/a0e8] enabled
843 09:46:53.631638 PCI: 00:15.1 [8086/0000] bus ops
844 09:46:53.635146 PCI: 00:15.1 [8086/a0e9] enabled
845 09:46:53.638518 PCI: 00:15.2 [8086/0000] bus ops
846 09:46:53.641660 PCI: 00:15.2 [8086/a0ea] enabled
847 09:46:53.645055 PCI: 00:15.3 [8086/0000] bus ops
848 09:46:53.648398 PCI: 00:15.3 [8086/a0eb] enabled
849 09:46:53.651664 PCI: 00:16.0 [8086/0000] ops
850 09:46:53.654884 PCI: 00:16.0 [8086/a0e0] enabled
851 09:46:53.661560 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 09:46:53.665026 PCI: 00:19.0 [8086/0000] bus ops
853 09:46:53.668393 PCI: 00:19.0 [8086/a0c5] disabled
854 09:46:53.671927 PCI: 00:19.1 [8086/0000] bus ops
855 09:46:53.674819 PCI: 00:19.1 [8086/a0c6] enabled
856 09:46:53.678710 PCI: 00:1d.0 [8086/0000] bus ops
857 09:46:53.681980 PCI: 00:1d.0 [8086/a0b0] enabled
858 09:46:53.685039 PCI: 00:1e.0 [8086/0000] ops
859 09:46:53.688456 PCI: 00:1e.0 [8086/a0a8] enabled
860 09:46:53.691534 PCI: 00:1e.2 [8086/0000] bus ops
861 09:46:53.694940 PCI: 00:1e.2 [8086/a0aa] enabled
862 09:46:53.698535 PCI: 00:1e.3 [8086/0000] bus ops
863 09:46:53.701829 PCI: 00:1e.3 [8086/a0ab] enabled
864 09:46:53.705404 PCI: 00:1f.0 [8086/0000] bus ops
865 09:46:53.708391 PCI: 00:1f.0 [8086/a087] enabled
866 09:46:53.708503 RTC Init
867 09:46:53.711738 Set power on after power failure.
868 09:46:53.715232 Disabling Deep S3
869 09:46:53.715325 Disabling Deep S3
870 09:46:53.718525 Disabling Deep S4
871 09:46:53.718642 Disabling Deep S4
872 09:46:53.721780 Disabling Deep S5
873 09:46:53.725263 Disabling Deep S5
874 09:46:53.728224 PCI: 00:1f.2 [0000/0000] hidden
875 09:46:53.731816 PCI: 00:1f.3 [8086/0000] bus ops
876 09:46:53.735169 PCI: 00:1f.3 [8086/a0c8] enabled
877 09:46:53.738079 PCI: 00:1f.5 [8086/0000] bus ops
878 09:46:53.741964 PCI: 00:1f.5 [8086/a0a4] enabled
879 09:46:53.742057 PCI: Leftover static devices:
880 09:46:53.744928 PCI: 00:10.2
881 09:46:53.745018 PCI: 00:10.6
882 09:46:53.748344 PCI: 00:10.7
883 09:46:53.748432 PCI: 00:06.0
884 09:46:53.751990 PCI: 00:07.1
885 09:46:53.752078 PCI: 00:07.2
886 09:46:53.752144 PCI: 00:07.3
887 09:46:53.754769 PCI: 00:09.0
888 09:46:53.754855 PCI: 00:0d.1
889 09:46:53.758154 PCI: 00:0d.2
890 09:46:53.758273 PCI: 00:0d.3
891 09:46:53.758370 PCI: 00:0e.0
892 09:46:53.761547 PCI: 00:12.0
893 09:46:53.761634 PCI: 00:12.6
894 09:46:53.764998 PCI: 00:13.0
895 09:46:53.765110 PCI: 00:14.1
896 09:46:53.765179 PCI: 00:16.1
897 09:46:53.768290 PCI: 00:16.2
898 09:46:53.768375 PCI: 00:16.3
899 09:46:53.771371 PCI: 00:16.4
900 09:46:53.771457 PCI: 00:16.5
901 09:46:53.775078 PCI: 00:17.0
902 09:46:53.775181 PCI: 00:19.2
903 09:46:53.775281 PCI: 00:1e.1
904 09:46:53.778572 PCI: 00:1f.1
905 09:46:53.778655 PCI: 00:1f.4
906 09:46:53.781678 PCI: 00:1f.6
907 09:46:53.781765 PCI: 00:1f.7
908 09:46:53.784824 PCI: Check your devicetree.cb.
909 09:46:53.787972 PCI: 00:02.0 scanning...
910 09:46:53.791378 scan_generic_bus for PCI: 00:02.0
911 09:46:53.794995 scan_generic_bus for PCI: 00:02.0 done
912 09:46:53.797887 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 09:46:53.801402 PCI: 00:04.0 scanning...
914 09:46:53.804969 scan_generic_bus for PCI: 00:04.0
915 09:46:53.807957 GENERIC: 0.0 enabled
916 09:46:53.814727 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 09:46:53.818076 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 09:46:53.821618 PCI: 00:0d.0 scanning...
919 09:46:53.824513 scan_static_bus for PCI: 00:0d.0
920 09:46:53.827726 USB0 port 0 enabled
921 09:46:53.827833 USB0 port 0 scanning...
922 09:46:53.831131 scan_static_bus for USB0 port 0
923 09:46:53.834603 USB3 port 0 enabled
924 09:46:53.838080 USB3 port 1 enabled
925 09:46:53.838167 USB3 port 2 disabled
926 09:46:53.841043 USB3 port 3 disabled
927 09:46:53.844487 USB3 port 0 scanning...
928 09:46:53.847583 scan_static_bus for USB3 port 0
929 09:46:53.851306 scan_static_bus for USB3 port 0 done
930 09:46:53.854553 scan_bus: bus USB3 port 0 finished in 6 msecs
931 09:46:53.857929 USB3 port 1 scanning...
932 09:46:53.860942 scan_static_bus for USB3 port 1
933 09:46:53.864403 scan_static_bus for USB3 port 1 done
934 09:46:53.871086 scan_bus: bus USB3 port 1 finished in 6 msecs
935 09:46:53.874533 scan_static_bus for USB0 port 0 done
936 09:46:53.877527 scan_bus: bus USB0 port 0 finished in 43 msecs
937 09:46:53.880961 scan_static_bus for PCI: 00:0d.0 done
938 09:46:53.887723 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 09:46:53.887820 PCI: 00:14.0 scanning...
940 09:46:53.891170 scan_static_bus for PCI: 00:14.0
941 09:46:53.894362 USB0 port 0 enabled
942 09:46:53.897878 USB0 port 0 scanning...
943 09:46:53.900853 scan_static_bus for USB0 port 0
944 09:46:53.904345 USB2 port 0 disabled
945 09:46:53.904425 USB2 port 1 enabled
946 09:46:53.907390 USB2 port 2 enabled
947 09:46:53.907494 USB2 port 3 disabled
948 09:46:53.910890 USB2 port 4 enabled
949 09:46:53.914340 USB2 port 5 disabled
950 09:46:53.914444 USB2 port 6 disabled
951 09:46:53.917506 USB2 port 7 disabled
952 09:46:53.920989 USB2 port 8 disabled
953 09:46:53.921093 USB2 port 9 disabled
954 09:46:53.923998 USB3 port 0 disabled
955 09:46:53.927465 USB3 port 1 enabled
956 09:46:53.927555 USB3 port 2 disabled
957 09:46:53.930917 USB3 port 3 disabled
958 09:46:53.934028 USB2 port 1 scanning...
959 09:46:53.937628 scan_static_bus for USB2 port 1
960 09:46:53.940485 scan_static_bus for USB2 port 1 done
961 09:46:53.943934 scan_bus: bus USB2 port 1 finished in 6 msecs
962 09:46:53.947292 USB2 port 2 scanning...
963 09:46:53.950523 scan_static_bus for USB2 port 2
964 09:46:53.954272 scan_static_bus for USB2 port 2 done
965 09:46:53.957069 scan_bus: bus USB2 port 2 finished in 6 msecs
966 09:46:53.960848 USB2 port 4 scanning...
967 09:46:53.963809 scan_static_bus for USB2 port 4
968 09:46:53.967073 scan_static_bus for USB2 port 4 done
969 09:46:53.973859 scan_bus: bus USB2 port 4 finished in 6 msecs
970 09:46:53.973948 USB3 port 1 scanning...
971 09:46:53.977415 scan_static_bus for USB3 port 1
972 09:46:53.983799 scan_static_bus for USB3 port 1 done
973 09:46:53.987101 scan_bus: bus USB3 port 1 finished in 6 msecs
974 09:46:53.990619 scan_static_bus for USB0 port 0 done
975 09:46:53.993928 scan_bus: bus USB0 port 0 finished in 93 msecs
976 09:46:54.000646 scan_static_bus for PCI: 00:14.0 done
977 09:46:54.004169 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 09:46:54.007034 PCI: 00:14.3 scanning...
979 09:46:54.010655 scan_static_bus for PCI: 00:14.3
980 09:46:54.013674 GENERIC: 0.0 enabled
981 09:46:54.017142 scan_static_bus for PCI: 00:14.3 done
982 09:46:54.020261 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 09:46:54.023767 PCI: 00:15.0 scanning...
984 09:46:54.027126 scan_static_bus for PCI: 00:15.0
985 09:46:54.030705 I2C: 00:1a enabled
986 09:46:54.030791 I2C: 00:31 enabled
987 09:46:54.033934 I2C: 00:32 enabled
988 09:46:54.037387 scan_static_bus for PCI: 00:15.0 done
989 09:46:54.040653 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 09:46:54.043733 PCI: 00:15.1 scanning...
991 09:46:54.047228 scan_static_bus for PCI: 00:15.1
992 09:46:54.050507 I2C: 00:10 enabled
993 09:46:54.053391 scan_static_bus for PCI: 00:15.1 done
994 09:46:54.057143 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 09:46:54.060117 PCI: 00:15.2 scanning...
996 09:46:54.063279 scan_static_bus for PCI: 00:15.2
997 09:46:54.066772 scan_static_bus for PCI: 00:15.2 done
998 09:46:54.074382 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 09:46:54.074469 PCI: 00:15.3 scanning...
1000 09:46:54.077253 scan_static_bus for PCI: 00:15.3
1001 09:46:54.084268 scan_static_bus for PCI: 00:15.3 done
1002 09:46:54.087496 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 09:46:54.090846 PCI: 00:19.1 scanning...
1004 09:46:54.094028 scan_static_bus for PCI: 00:19.1
1005 09:46:54.094113 I2C: 00:15 enabled
1006 09:46:54.100750 scan_static_bus for PCI: 00:19.1 done
1007 09:46:54.103799 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 09:46:54.107086 PCI: 00:1d.0 scanning...
1009 09:46:54.110670 do_pci_scan_bridge for PCI: 00:1d.0
1010 09:46:54.114182 PCI: pci_scan_bus for bus 01
1011 09:46:54.117211 PCI: 01:00.0 [1c5c/174a] enabled
1012 09:46:54.117296 GENERIC: 0.0 enabled
1013 09:46:54.124101 Enabling Common Clock Configuration
1014 09:46:54.127040 L1 Sub-State supported from root port 29
1015 09:46:54.130539 L1 Sub-State Support = 0xf
1016 09:46:54.133697 CommonModeRestoreTime = 0x28
1017 09:46:54.137032 Power On Value = 0x16, Power On Scale = 0x0
1018 09:46:54.137117 ASPM: Enabled L1
1019 09:46:54.143638 PCIe: Max_Payload_Size adjusted to 128
1020 09:46:54.147117 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 09:46:54.150570 PCI: 00:1e.2 scanning...
1022 09:46:54.153575 scan_generic_bus for PCI: 00:1e.2
1023 09:46:54.153651 SPI: 00 enabled
1024 09:46:54.160053 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 09:46:54.167200 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 09:46:54.167289 PCI: 00:1e.3 scanning...
1027 09:46:54.173888 scan_generic_bus for PCI: 00:1e.3
1028 09:46:54.173978 SPI: 00 enabled
1029 09:46:54.180447 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 09:46:54.183918 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 09:46:54.187434 PCI: 00:1f.0 scanning...
1032 09:46:54.190378 scan_static_bus for PCI: 00:1f.0
1033 09:46:54.193615 PNP: 0c09.0 enabled
1034 09:46:54.193702 PNP: 0c09.0 scanning...
1035 09:46:54.197412 scan_static_bus for PNP: 0c09.0
1036 09:46:54.203846 scan_static_bus for PNP: 0c09.0 done
1037 09:46:54.207441 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 09:46:54.210533 scan_static_bus for PCI: 00:1f.0 done
1039 09:46:54.217140 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 09:46:54.217261 PCI: 00:1f.2 scanning...
1041 09:46:54.220687 scan_static_bus for PCI: 00:1f.2
1042 09:46:54.224014 GENERIC: 0.0 enabled
1043 09:46:54.227043 GENERIC: 0.0 scanning...
1044 09:46:54.230477 scan_static_bus for GENERIC: 0.0
1045 09:46:54.233729 GENERIC: 0.0 enabled
1046 09:46:54.233815 GENERIC: 1.0 enabled
1047 09:46:54.237122 scan_static_bus for GENERIC: 0.0 done
1048 09:46:54.243713 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 09:46:54.247135 scan_static_bus for PCI: 00:1f.2 done
1050 09:46:54.250480 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 09:46:54.253634 PCI: 00:1f.3 scanning...
1052 09:46:54.257224 scan_static_bus for PCI: 00:1f.3
1053 09:46:54.260703 scan_static_bus for PCI: 00:1f.3 done
1054 09:46:54.266859 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 09:46:54.266948 PCI: 00:1f.5 scanning...
1056 09:46:54.273735 scan_generic_bus for PCI: 00:1f.5
1057 09:46:54.277138 scan_generic_bus for PCI: 00:1f.5 done
1058 09:46:54.280284 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 09:46:54.287018 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 09:46:54.290427 scan_static_bus for Root Device done
1061 09:46:54.293644 scan_bus: bus Root Device finished in 737 msecs
1062 09:46:54.293794 done
1063 09:46:54.300541 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 09:46:54.303932 Chrome EC: UHEPI supported
1065 09:46:54.311005 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 09:46:54.317581 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 09:46:54.320702 SPI flash protection: WPSW=0 SRP0=0
1068 09:46:54.327590 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 09:46:54.330726 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1070 09:46:54.334192 found VGA at PCI: 00:02.0
1071 09:46:54.337761 Setting up VGA for PCI: 00:02.0
1072 09:46:54.344265 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 09:46:54.347207 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 09:46:54.350777 Allocating resources...
1075 09:46:54.354073 Reading resources...
1076 09:46:54.357502 Root Device read_resources bus 0 link: 0
1077 09:46:54.360520 DOMAIN: 0000 read_resources bus 0 link: 0
1078 09:46:54.367420 PCI: 00:04.0 read_resources bus 1 link: 0
1079 09:46:54.370471 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 09:46:54.377285 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 09:46:54.380585 USB0 port 0 read_resources bus 0 link: 0
1082 09:46:54.387452 USB0 port 0 read_resources bus 0 link: 0 done
1083 09:46:54.390751 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 09:46:54.393936 PCI: 00:14.0 read_resources bus 0 link: 0
1085 09:46:54.400900 USB0 port 0 read_resources bus 0 link: 0
1086 09:46:54.404378 USB0 port 0 read_resources bus 0 link: 0 done
1087 09:46:54.410704 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 09:46:54.414177 PCI: 00:14.3 read_resources bus 0 link: 0
1089 09:46:54.421313 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 09:46:54.424204 PCI: 00:15.0 read_resources bus 0 link: 0
1091 09:46:54.430968 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 09:46:54.434533 PCI: 00:15.1 read_resources bus 0 link: 0
1093 09:46:54.441113 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 09:46:54.447572 PCI: 00:19.1 read_resources bus 0 link: 0
1095 09:46:54.451116 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 09:46:54.453965 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 09:46:54.461226 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 09:46:54.464709 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 09:46:54.471360 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 09:46:54.474583 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 09:46:54.481479 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 09:46:54.484943 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 09:46:54.491146 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 09:46:54.494880 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 09:46:54.497675 GENERIC: 0.0 read_resources bus 0 link: 0
1106 09:46:54.505114 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 09:46:54.508069 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 09:46:54.515543 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 09:46:54.519162 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 09:46:54.525513 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 09:46:54.528986 Root Device read_resources bus 0 link: 0 done
1112 09:46:54.532152 Done reading resources.
1113 09:46:54.539033 Show resources in subtree (Root Device)...After reading.
1114 09:46:54.542017 Root Device child on link 0 DOMAIN: 0000
1115 09:46:54.545552 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 09:46:54.555487 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 09:46:54.565243 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 09:46:54.568581 PCI: 00:00.0
1119 09:46:54.575387 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 09:46:54.585762 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 09:46:54.595737 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 09:46:54.605882 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 09:46:54.615379 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 09:46:54.625511 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 09:46:54.631872 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 09:46:54.641770 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 09:46:54.651894 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 09:46:54.662260 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 09:46:54.671843 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 09:46:54.678394 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 09:46:54.688295 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 09:46:54.698316 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 09:46:54.708281 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 09:46:54.718548 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 09:46:54.728258 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 09:46:54.738267 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 09:46:54.744834 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 09:46:54.754799 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 09:46:54.758232 PCI: 00:02.0
1140 09:46:54.767994 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 09:46:54.777974 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 09:46:54.787850 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 09:46:54.791050 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 09:46:54.801112 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 09:46:54.801205 GENERIC: 0.0
1146 09:46:54.804436 PCI: 00:05.0
1147 09:46:54.814486 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 09:46:54.818251 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 09:46:54.821179 GENERIC: 0.0
1150 09:46:54.821264 PCI: 00:08.0
1151 09:46:54.831006 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 09:46:54.834547 PCI: 00:0a.0
1153 09:46:54.838007 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 09:46:54.847837 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 09:46:54.854344 USB0 port 0 child on link 0 USB3 port 0
1156 09:46:54.854429 USB3 port 0
1157 09:46:54.857871 USB3 port 1
1158 09:46:54.857989 USB3 port 2
1159 09:46:54.861240 USB3 port 3
1160 09:46:54.864337 PCI: 00:14.0 child on link 0 USB0 port 0
1161 09:46:54.874134 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 09:46:54.877821 USB0 port 0 child on link 0 USB2 port 0
1163 09:46:54.880984 USB2 port 0
1164 09:46:54.881066 USB2 port 1
1165 09:46:54.884279 USB2 port 2
1166 09:46:54.887824 USB2 port 3
1167 09:46:54.887903 USB2 port 4
1168 09:46:54.891049 USB2 port 5
1169 09:46:54.891136 USB2 port 6
1170 09:46:54.894422 USB2 port 7
1171 09:46:54.894511 USB2 port 8
1172 09:46:54.897625 USB2 port 9
1173 09:46:54.897741 USB3 port 0
1174 09:46:54.901176 USB3 port 1
1175 09:46:54.901263 USB3 port 2
1176 09:46:54.904036 USB3 port 3
1177 09:46:54.904122 PCI: 00:14.2
1178 09:46:54.913975 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 09:46:54.923956 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 09:46:54.930479 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 09:46:54.940797 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 09:46:54.940931 GENERIC: 0.0
1183 09:46:54.947619 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 09:46:54.957166 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 09:46:54.957296 I2C: 00:1a
1186 09:46:54.957369 I2C: 00:31
1187 09:46:54.960779 I2C: 00:32
1188 09:46:54.963711 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 09:46:54.974018 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 09:46:54.977327 I2C: 00:10
1191 09:46:54.977429 PCI: 00:15.2
1192 09:46:54.987407 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 09:46:54.990192 PCI: 00:15.3
1194 09:46:55.000610 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 09:46:55.000719 PCI: 00:16.0
1196 09:46:55.010249 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 09:46:55.013620 PCI: 00:19.0
1198 09:46:55.017030 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 09:46:55.026827 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 09:46:55.026956 I2C: 00:15
1201 09:46:55.033710 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 09:46:55.040009 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 09:46:55.050319 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 09:46:55.060493 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 09:46:55.063255 GENERIC: 0.0
1206 09:46:55.063369 PCI: 01:00.0
1207 09:46:55.073200 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 09:46:55.083587 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 09:46:55.093339 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 09:46:55.093499 PCI: 00:1e.0
1211 09:46:55.106575 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 09:46:55.109756 PCI: 00:1e.2 child on link 0 SPI: 00
1213 09:46:55.120092 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 09:46:55.120229 SPI: 00
1215 09:46:55.123046 PCI: 00:1e.3 child on link 0 SPI: 00
1216 09:46:55.133111 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 09:46:55.136432 SPI: 00
1218 09:46:55.140021 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 09:46:55.149531 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 09:46:55.149655 PNP: 0c09.0
1221 09:46:55.159556 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 09:46:55.163129 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 09:46:55.173130 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 09:46:55.182928 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 09:46:55.186683 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 09:46:55.189637 GENERIC: 0.0
1227 09:46:55.189728 GENERIC: 1.0
1228 09:46:55.192993 PCI: 00:1f.3
1229 09:46:55.202752 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 09:46:55.212885 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 09:46:55.212990 PCI: 00:1f.5
1232 09:46:55.222582 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 09:46:55.229494 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 09:46:55.229594 APIC: 00
1235 09:46:55.229661 APIC: 01
1236 09:46:55.232405 APIC: 05
1237 09:46:55.232529 APIC: 07
1238 09:46:55.232598 APIC: 02
1239 09:46:55.235886 APIC: 04
1240 09:46:55.235971 APIC: 06
1241 09:46:55.239561 APIC: 03
1242 09:46:55.246098 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 09:46:55.252684 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 09:46:55.255812 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 09:46:55.262316 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 09:46:55.268834 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 09:46:55.272784 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 09:46:55.275679 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 09:46:55.282320 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 09:46:55.292259 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 09:46:55.299063 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 09:46:55.305577 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 09:46:55.312086 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 09:46:55.318814 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 09:46:55.325549 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 09:46:55.335152 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 09:46:55.338682 DOMAIN: 0000: Resource ranges:
1258 09:46:55.341997 * Base: 1000, Size: 800, Tag: 100
1259 09:46:55.345639 * Base: 1900, Size: e700, Tag: 100
1260 09:46:55.348409 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 09:46:55.355211 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 09:46:55.365436 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 09:46:55.371744 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 09:46:55.378636 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 09:46:55.388593 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 09:46:55.395213 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 09:46:55.402145 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 09:46:55.408235 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 09:46:55.418137 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 09:46:55.424855 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 09:46:55.431267 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 09:46:55.441322 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 09:46:55.448359 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 09:46:55.454613 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 09:46:55.464665 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 09:46:55.471550 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 09:46:55.478007 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 09:46:55.487859 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 09:46:55.494547 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 09:46:55.501119 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 09:46:55.510914 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 09:46:55.517654 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 09:46:55.524519 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 09:46:55.534238 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 09:46:55.537324 DOMAIN: 0000: Resource ranges:
1286 09:46:55.540679 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 09:46:55.544336 * Base: d0000000, Size: 28000000, Tag: 200
1288 09:46:55.551003 * Base: fa000000, Size: 1000000, Tag: 200
1289 09:46:55.554006 * Base: fb001000, Size: 2fff000, Tag: 200
1290 09:46:55.557522 * Base: fe010000, Size: 2e000, Tag: 200
1291 09:46:55.561097 * Base: fe03f000, Size: d41000, Tag: 200
1292 09:46:55.567466 * Base: fed88000, Size: 8000, Tag: 200
1293 09:46:55.570894 * Base: fed93000, Size: d000, Tag: 200
1294 09:46:55.573886 * Base: feda2000, Size: 1e000, Tag: 200
1295 09:46:55.577430 * Base: fede0000, Size: 1220000, Tag: 200
1296 09:46:55.584118 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 09:46:55.590697 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 09:46:55.597162 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 09:46:55.603908 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 09:46:55.610583 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 09:46:55.617043 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 09:46:55.623900 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 09:46:55.630316 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 09:46:55.637434 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 09:46:55.644102 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 09:46:55.650536 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 09:46:55.657276 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 09:46:55.663704 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 09:46:55.670700 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 09:46:55.677221 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 09:46:55.683497 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 09:46:55.689998 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 09:46:55.696831 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 09:46:55.703359 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 09:46:55.709919 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 09:46:55.716654 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 09:46:55.723236 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 09:46:55.730130 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 09:46:55.736710 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 09:46:55.746717 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 09:46:55.750122 PCI: 00:1d.0: Resource ranges:
1322 09:46:55.753171 * Base: 7fc00000, Size: 100000, Tag: 200
1323 09:46:55.759949 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 09:46:55.766502 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 09:46:55.772914 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 09:46:55.779889 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 09:46:55.789738 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 09:46:55.793240 Root Device assign_resources, bus 0 link: 0
1329 09:46:55.796292 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 09:46:55.806224 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 09:46:55.812977 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 09:46:55.822643 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 09:46:55.829440 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 09:46:55.836034 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 09:46:55.839491 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 09:46:55.848947 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 09:46:55.855729 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 09:46:55.865913 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 09:46:55.868914 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 09:46:55.872419 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 09:46:55.882383 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 09:46:55.885603 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 09:46:55.892031 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 09:46:55.898821 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 09:46:55.905558 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 09:46:55.915847 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 09:46:55.918932 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 09:46:55.925734 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 09:46:55.932308 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 09:46:55.939019 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 09:46:55.942103 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 09:46:55.948596 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 09:46:55.955135 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 09:46:55.958641 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 09:46:55.968611 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 09:46:55.975079 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 09:46:55.985058 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 09:46:55.991428 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 09:46:55.998077 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 09:46:56.001476 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 09:46:56.011141 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 09:46:56.021014 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 09:46:56.027705 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 09:46:56.034431 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 09:46:56.041487 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 09:46:56.048058 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 09:46:56.057713 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 09:46:56.061178 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 09:46:56.071117 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 09:46:56.074262 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 09:46:56.080881 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 09:46:56.087456 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 09:46:56.091227 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 09:46:56.097633 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 09:46:56.100891 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 09:46:56.107506 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 09:46:56.110828 LPC: Trying to open IO window from 800 size 1ff
1378 09:46:56.120779 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 09:46:56.127258 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 09:46:56.137273 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 09:46:56.140726 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 09:46:56.144136 Root Device assign_resources, bus 0 link: 0
1383 09:46:56.147029 Done setting resources.
1384 09:46:56.154031 Show resources in subtree (Root Device)...After assigning values.
1385 09:46:56.157141 Root Device child on link 0 DOMAIN: 0000
1386 09:46:56.163640 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 09:46:56.173743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 09:46:56.183475 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 09:46:56.183579 PCI: 00:00.0
1390 09:46:56.193423 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 09:46:56.203555 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 09:46:56.213527 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 09:46:56.220152 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 09:46:56.230184 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 09:46:56.239939 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 09:46:56.250327 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 09:46:56.259901 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 09:46:56.269974 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 09:46:56.276418 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 09:46:56.286585 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 09:46:56.296515 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 09:46:56.306480 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 09:46:56.316286 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 09:46:56.323291 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 09:46:56.332860 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 09:46:56.342918 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 09:46:56.352692 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 09:46:56.362716 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 09:46:56.372411 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 09:46:56.372523 PCI: 00:02.0
1411 09:46:56.385833 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 09:46:56.395889 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 09:46:56.405619 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 09:46:56.409063 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 09:46:56.419139 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 09:46:56.422350 GENERIC: 0.0
1417 09:46:56.422440 PCI: 00:05.0
1418 09:46:56.432480 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 09:46:56.439136 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 09:46:56.439226 GENERIC: 0.0
1421 09:46:56.442662 PCI: 00:08.0
1422 09:46:56.452285 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 09:46:56.452375 PCI: 00:0a.0
1424 09:46:56.458672 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 09:46:56.468877 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 09:46:56.472145 USB0 port 0 child on link 0 USB3 port 0
1427 09:46:56.475581 USB3 port 0
1428 09:46:56.475668 USB3 port 1
1429 09:46:56.478612 USB3 port 2
1430 09:46:56.478698 USB3 port 3
1431 09:46:56.485630 PCI: 00:14.0 child on link 0 USB0 port 0
1432 09:46:56.495646 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 09:46:56.498870 USB0 port 0 child on link 0 USB2 port 0
1434 09:46:56.502453 USB2 port 0
1435 09:46:56.502565 USB2 port 1
1436 09:46:56.505356 USB2 port 2
1437 09:46:56.505466 USB2 port 3
1438 09:46:56.508584 USB2 port 4
1439 09:46:56.508694 USB2 port 5
1440 09:46:56.512374 USB2 port 6
1441 09:46:56.512521 USB2 port 7
1442 09:46:56.515520 USB2 port 8
1443 09:46:56.515630 USB2 port 9
1444 09:46:56.518622 USB3 port 0
1445 09:46:56.518734 USB3 port 1
1446 09:46:56.521852 USB3 port 2
1447 09:46:56.521961 USB3 port 3
1448 09:46:56.525426 PCI: 00:14.2
1449 09:46:56.535213 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 09:46:56.545528 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 09:46:56.548514 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 09:46:56.562018 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 09:46:56.562107 GENERIC: 0.0
1454 09:46:56.565076 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 09:46:56.578305 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 09:46:56.578408 I2C: 00:1a
1457 09:46:56.581733 I2C: 00:31
1458 09:46:56.581818 I2C: 00:32
1459 09:46:56.585286 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 09:46:56.594972 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 09:46:56.598344 I2C: 00:10
1462 09:46:56.598431 PCI: 00:15.2
1463 09:46:56.611447 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 09:46:56.611535 PCI: 00:15.3
1465 09:46:56.621685 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 09:46:56.624832 PCI: 00:16.0
1467 09:46:56.635345 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 09:46:56.635435 PCI: 00:19.0
1469 09:46:56.641512 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 09:46:56.651301 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 09:46:56.651389 I2C: 00:15
1472 09:46:56.654888 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 09:46:56.664449 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 09:46:56.677734 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 09:46:56.687740 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 09:46:56.687830 GENERIC: 0.0
1477 09:46:56.691194 PCI: 01:00.0
1478 09:46:56.701034 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 09:46:56.711034 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 09:46:56.720939 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 09:46:56.724318 PCI: 00:1e.0
1482 09:46:56.734131 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 09:46:56.741335 PCI: 00:1e.2 child on link 0 SPI: 00
1484 09:46:56.750879 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 09:46:56.750969 SPI: 00
1486 09:46:56.754452 PCI: 00:1e.3 child on link 0 SPI: 00
1487 09:46:56.764054 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 09:46:56.767705 SPI: 00
1489 09:46:56.771080 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 09:46:56.780910 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 09:46:56.780999 PNP: 0c09.0
1492 09:46:56.790784 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 09:46:56.793891 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 09:46:56.803799 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 09:46:56.814100 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 09:46:56.817509 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 09:46:56.820689 GENERIC: 0.0
1498 09:46:56.820775 GENERIC: 1.0
1499 09:46:56.824026 PCI: 00:1f.3
1500 09:46:56.834207 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 09:46:56.843574 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 09:46:56.847024 PCI: 00:1f.5
1503 09:46:56.857387 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 09:46:56.860208 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 09:46:56.860293 APIC: 00
1506 09:46:56.863762 APIC: 01
1507 09:46:56.863847 APIC: 05
1508 09:46:56.867117 APIC: 07
1509 09:46:56.867202 APIC: 02
1510 09:46:56.867268 APIC: 04
1511 09:46:56.870460 APIC: 06
1512 09:46:56.870545 APIC: 03
1513 09:46:56.873915 Done allocating resources.
1514 09:46:56.880311 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 09:46:56.886927 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 09:46:56.890255 Configure GPIOs for I2S audio on UP4.
1517 09:46:56.896779 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 09:46:56.900253 Enabling resources...
1519 09:46:56.903321 PCI: 00:00.0 subsystem <- 8086/9a12
1520 09:46:56.903406 PCI: 00:00.0 cmd <- 06
1521 09:46:56.910305 PCI: 00:02.0 subsystem <- 8086/9a40
1522 09:46:56.910390 PCI: 00:02.0 cmd <- 03
1523 09:46:56.913883 PCI: 00:04.0 subsystem <- 8086/9a03
1524 09:46:56.916931 PCI: 00:04.0 cmd <- 02
1525 09:46:56.919960 PCI: 00:05.0 subsystem <- 8086/9a19
1526 09:46:56.923415 PCI: 00:05.0 cmd <- 02
1527 09:46:56.926684 PCI: 00:08.0 subsystem <- 8086/9a11
1528 09:46:56.930039 PCI: 00:08.0 cmd <- 06
1529 09:46:56.933270 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 09:46:56.936551 PCI: 00:0d.0 cmd <- 02
1531 09:46:56.940129 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 09:46:56.943493 PCI: 00:14.0 cmd <- 02
1533 09:46:56.946603 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 09:46:56.949926 PCI: 00:14.2 cmd <- 02
1535 09:46:56.953135 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 09:46:56.953221 PCI: 00:14.3 cmd <- 02
1537 09:46:56.959849 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 09:46:56.959934 PCI: 00:15.0 cmd <- 02
1539 09:46:56.963302 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 09:46:56.966733 PCI: 00:15.1 cmd <- 02
1541 09:46:56.969880 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 09:46:56.972890 PCI: 00:15.2 cmd <- 02
1543 09:46:56.976392 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 09:46:56.980083 PCI: 00:15.3 cmd <- 02
1545 09:46:56.983249 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 09:46:56.986231 PCI: 00:16.0 cmd <- 02
1547 09:46:56.989686 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 09:46:56.993036 PCI: 00:19.1 cmd <- 02
1549 09:46:56.996044 PCI: 00:1d.0 bridge ctrl <- 0013
1550 09:46:56.999604 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 09:46:57.002688 PCI: 00:1d.0 cmd <- 06
1552 09:46:57.006158 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 09:46:57.006245 PCI: 00:1e.0 cmd <- 06
1554 09:46:57.013024 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 09:46:57.013110 PCI: 00:1e.2 cmd <- 06
1556 09:46:57.016013 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 09:46:57.019486 PCI: 00:1e.3 cmd <- 02
1558 09:46:57.022917 PCI: 00:1f.0 subsystem <- 8086/a087
1559 09:46:57.026153 PCI: 00:1f.0 cmd <- 407
1560 09:46:57.029613 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 09:46:57.032942 PCI: 00:1f.3 cmd <- 02
1562 09:46:57.036242 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 09:46:57.039487 PCI: 00:1f.5 cmd <- 406
1564 09:46:57.043119 PCI: 01:00.0 cmd <- 02
1565 09:46:57.047670 done.
1566 09:46:57.050900 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 09:46:57.054172 Initializing devices...
1568 09:46:57.057855 Root Device init
1569 09:46:57.061140 Chrome EC: Set SMI mask to 0x0000000000000000
1570 09:46:57.067476 Chrome EC: clear events_b mask to 0x0000000000000000
1571 09:46:57.074326 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 09:46:57.077478 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 09:46:57.084390 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 09:46:57.090953 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 09:46:57.093844 fw_config match found: DB_USB=USB3_ACTIVE
1576 09:46:57.100856 Configure Right Type-C port orientation for retimer
1577 09:46:57.103771 Root Device init finished in 44 msecs
1578 09:46:57.107204 PCI: 00:00.0 init
1579 09:46:57.110566 CPU TDP = 9 Watts
1580 09:46:57.110652 CPU PL1 = 9 Watts
1581 09:46:57.114015 CPU PL2 = 40 Watts
1582 09:46:57.117087 CPU PL4 = 83 Watts
1583 09:46:57.120503 PCI: 00:00.0 init finished in 8 msecs
1584 09:46:57.120590 PCI: 00:02.0 init
1585 09:46:57.123848 GMA: Found VBT in CBFS
1586 09:46:57.127197 GMA: Found valid VBT in CBFS
1587 09:46:57.133713 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 09:46:57.140249 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 09:46:57.143557 PCI: 00:02.0 init finished in 18 msecs
1590 09:46:57.147379 PCI: 00:05.0 init
1591 09:46:57.150452 PCI: 00:05.0 init finished in 0 msecs
1592 09:46:57.153905 PCI: 00:08.0 init
1593 09:46:57.156866 PCI: 00:08.0 init finished in 0 msecs
1594 09:46:57.160424 PCI: 00:14.0 init
1595 09:46:57.163614 PCI: 00:14.0 init finished in 0 msecs
1596 09:46:57.167090 PCI: 00:14.2 init
1597 09:46:57.170530 PCI: 00:14.2 init finished in 0 msecs
1598 09:46:57.173755 PCI: 00:15.0 init
1599 09:46:57.173841 I2C bus 0 version 0x3230302a
1600 09:46:57.180299 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 09:46:57.183865 PCI: 00:15.0 init finished in 6 msecs
1602 09:46:57.183948 PCI: 00:15.1 init
1603 09:46:57.186847 I2C bus 1 version 0x3230302a
1604 09:46:57.190479 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 09:46:57.196589 PCI: 00:15.1 init finished in 6 msecs
1606 09:46:57.196680 PCI: 00:15.2 init
1607 09:46:57.200121 I2C bus 2 version 0x3230302a
1608 09:46:57.203273 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 09:46:57.206733 PCI: 00:15.2 init finished in 6 msecs
1610 09:46:57.210104 PCI: 00:15.3 init
1611 09:46:57.213445 I2C bus 3 version 0x3230302a
1612 09:46:57.216944 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 09:46:57.219857 PCI: 00:15.3 init finished in 6 msecs
1614 09:46:57.223277 PCI: 00:16.0 init
1615 09:46:57.226565 PCI: 00:16.0 init finished in 0 msecs
1616 09:46:57.229801 PCI: 00:19.1 init
1617 09:46:57.233117 I2C bus 5 version 0x3230302a
1618 09:46:57.236432 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 09:46:57.240214 PCI: 00:19.1 init finished in 6 msecs
1620 09:46:57.240299 PCI: 00:1d.0 init
1621 09:46:57.243069 Initializing PCH PCIe bridge.
1622 09:46:57.249821 PCI: 00:1d.0 init finished in 3 msecs
1623 09:46:57.249907 PCI: 00:1f.0 init
1624 09:46:57.256753 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 09:46:57.259939 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 09:46:57.263259 IOAPIC: ID = 0x02
1627 09:46:57.263343 IOAPIC: Dumping registers
1628 09:46:57.266928 reg 0x0000: 0x02000000
1629 09:46:57.269971 reg 0x0001: 0x00770020
1630 09:46:57.273253 reg 0x0002: 0x00000000
1631 09:46:57.276599 PCI: 00:1f.0 init finished in 21 msecs
1632 09:46:57.279687 PCI: 00:1f.2 init
1633 09:46:57.279774 Disabling ACPI via APMC.
1634 09:46:57.284541 APMC done.
1635 09:46:57.287698 PCI: 00:1f.2 init finished in 5 msecs
1636 09:46:57.300011 PCI: 01:00.0 init
1637 09:46:57.302998 PCI: 01:00.0 init finished in 0 msecs
1638 09:46:57.306627 PNP: 0c09.0 init
1639 09:46:57.309903 Google Chrome EC uptime: 8.357 seconds
1640 09:46:57.316303 Google Chrome AP resets since EC boot: 1
1641 09:46:57.319780 Google Chrome most recent AP reset causes:
1642 09:46:57.322910 0.347: 32775 shutdown: entering G3
1643 09:46:57.329780 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 09:46:57.332829 PNP: 0c09.0 init finished in 22 msecs
1645 09:46:57.338751 Devices initialized
1646 09:46:57.342059 Show all devs... After init.
1647 09:46:57.345497 Root Device: enabled 1
1648 09:46:57.345583 DOMAIN: 0000: enabled 1
1649 09:46:57.348783 CPU_CLUSTER: 0: enabled 1
1650 09:46:57.351909 PCI: 00:00.0: enabled 1
1651 09:46:57.355182 PCI: 00:02.0: enabled 1
1652 09:46:57.355266 PCI: 00:04.0: enabled 1
1653 09:46:57.358705 PCI: 00:05.0: enabled 1
1654 09:46:57.362201 PCI: 00:06.0: enabled 0
1655 09:46:57.365576 PCI: 00:07.0: enabled 0
1656 09:46:57.365660 PCI: 00:07.1: enabled 0
1657 09:46:57.368579 PCI: 00:07.2: enabled 0
1658 09:46:57.372170 PCI: 00:07.3: enabled 0
1659 09:46:57.375648 PCI: 00:08.0: enabled 1
1660 09:46:57.375733 PCI: 00:09.0: enabled 0
1661 09:46:57.378607 PCI: 00:0a.0: enabled 0
1662 09:46:57.381861 PCI: 00:0d.0: enabled 1
1663 09:46:57.381945 PCI: 00:0d.1: enabled 0
1664 09:46:57.385316 PCI: 00:0d.2: enabled 0
1665 09:46:57.388727 PCI: 00:0d.3: enabled 0
1666 09:46:57.391666 PCI: 00:0e.0: enabled 0
1667 09:46:57.391751 PCI: 00:10.2: enabled 1
1668 09:46:57.395176 PCI: 00:10.6: enabled 0
1669 09:46:57.398630 PCI: 00:10.7: enabled 0
1670 09:46:57.402054 PCI: 00:12.0: enabled 0
1671 09:46:57.402143 PCI: 00:12.6: enabled 0
1672 09:46:57.404999 PCI: 00:13.0: enabled 0
1673 09:46:57.408692 PCI: 00:14.0: enabled 1
1674 09:46:57.412046 PCI: 00:14.1: enabled 0
1675 09:46:57.412130 PCI: 00:14.2: enabled 1
1676 09:46:57.414948 PCI: 00:14.3: enabled 1
1677 09:46:57.418388 PCI: 00:15.0: enabled 1
1678 09:46:57.421846 PCI: 00:15.1: enabled 1
1679 09:46:57.421931 PCI: 00:15.2: enabled 1
1680 09:46:57.425277 PCI: 00:15.3: enabled 1
1681 09:46:57.428332 PCI: 00:16.0: enabled 1
1682 09:46:57.428420 PCI: 00:16.1: enabled 0
1683 09:46:57.431541 PCI: 00:16.2: enabled 0
1684 09:46:57.434954 PCI: 00:16.3: enabled 0
1685 09:46:57.438323 PCI: 00:16.4: enabled 0
1686 09:46:57.438408 PCI: 00:16.5: enabled 0
1687 09:46:57.441628 PCI: 00:17.0: enabled 0
1688 09:46:57.444955 PCI: 00:19.0: enabled 0
1689 09:46:57.448409 PCI: 00:19.1: enabled 1
1690 09:46:57.448515 PCI: 00:19.2: enabled 0
1691 09:46:57.451607 PCI: 00:1c.0: enabled 1
1692 09:46:57.454878 PCI: 00:1c.1: enabled 0
1693 09:46:57.458159 PCI: 00:1c.2: enabled 0
1694 09:46:57.458246 PCI: 00:1c.3: enabled 0
1695 09:46:57.461775 PCI: 00:1c.4: enabled 0
1696 09:46:57.464984 PCI: 00:1c.5: enabled 0
1697 09:46:57.465072 PCI: 00:1c.6: enabled 1
1698 09:46:57.468396 PCI: 00:1c.7: enabled 0
1699 09:46:57.471556 PCI: 00:1d.0: enabled 1
1700 09:46:57.475328 PCI: 00:1d.1: enabled 0
1701 09:46:57.475451 PCI: 00:1d.2: enabled 1
1702 09:46:57.478229 PCI: 00:1d.3: enabled 0
1703 09:46:57.481308 PCI: 00:1e.0: enabled 1
1704 09:46:57.484923 PCI: 00:1e.1: enabled 0
1705 09:46:57.485015 PCI: 00:1e.2: enabled 1
1706 09:46:57.488644 PCI: 00:1e.3: enabled 1
1707 09:46:57.491477 PCI: 00:1f.0: enabled 1
1708 09:46:57.494997 PCI: 00:1f.1: enabled 0
1709 09:46:57.495088 PCI: 00:1f.2: enabled 1
1710 09:46:57.498058 PCI: 00:1f.3: enabled 1
1711 09:46:57.501539 PCI: 00:1f.4: enabled 0
1712 09:46:57.504570 PCI: 00:1f.5: enabled 1
1713 09:46:57.504656 PCI: 00:1f.6: enabled 0
1714 09:46:57.508202 PCI: 00:1f.7: enabled 0
1715 09:46:57.511239 APIC: 00: enabled 1
1716 09:46:57.511326 GENERIC: 0.0: enabled 1
1717 09:46:57.514795 GENERIC: 0.0: enabled 1
1718 09:46:57.518183 GENERIC: 1.0: enabled 1
1719 09:46:57.521318 GENERIC: 0.0: enabled 1
1720 09:46:57.521405 GENERIC: 1.0: enabled 1
1721 09:46:57.524796 USB0 port 0: enabled 1
1722 09:46:57.527935 GENERIC: 0.0: enabled 1
1723 09:46:57.528021 USB0 port 0: enabled 1
1724 09:46:57.531237 GENERIC: 0.0: enabled 1
1725 09:46:57.534697 I2C: 00:1a: enabled 1
1726 09:46:57.537794 I2C: 00:31: enabled 1
1727 09:46:57.537880 I2C: 00:32: enabled 1
1728 09:46:57.541161 I2C: 00:10: enabled 1
1729 09:46:57.544720 I2C: 00:15: enabled 1
1730 09:46:57.544806 GENERIC: 0.0: enabled 0
1731 09:46:57.548182 GENERIC: 1.0: enabled 0
1732 09:46:57.551126 GENERIC: 0.0: enabled 1
1733 09:46:57.551212 SPI: 00: enabled 1
1734 09:46:57.554588 SPI: 00: enabled 1
1735 09:46:57.557797 PNP: 0c09.0: enabled 1
1736 09:46:57.557887 GENERIC: 0.0: enabled 1
1737 09:46:57.561222 USB3 port 0: enabled 1
1738 09:46:57.564725 USB3 port 1: enabled 1
1739 09:46:57.564809 USB3 port 2: enabled 0
1740 09:46:57.568140 USB3 port 3: enabled 0
1741 09:46:57.571195 USB2 port 0: enabled 0
1742 09:46:57.574776 USB2 port 1: enabled 1
1743 09:46:57.574861 USB2 port 2: enabled 1
1744 09:46:57.577811 USB2 port 3: enabled 0
1745 09:46:57.581336 USB2 port 4: enabled 1
1746 09:46:57.581421 USB2 port 5: enabled 0
1747 09:46:57.584396 USB2 port 6: enabled 0
1748 09:46:57.587923 USB2 port 7: enabled 0
1749 09:46:57.591183 USB2 port 8: enabled 0
1750 09:46:57.591269 USB2 port 9: enabled 0
1751 09:46:57.594562 USB3 port 0: enabled 0
1752 09:46:57.597595 USB3 port 1: enabled 1
1753 09:46:57.597681 USB3 port 2: enabled 0
1754 09:46:57.601239 USB3 port 3: enabled 0
1755 09:46:57.604273 GENERIC: 0.0: enabled 1
1756 09:46:57.607791 GENERIC: 1.0: enabled 1
1757 09:46:57.607875 APIC: 01: enabled 1
1758 09:46:57.610877 APIC: 05: enabled 1
1759 09:46:57.610962 APIC: 07: enabled 1
1760 09:46:57.614521 APIC: 02: enabled 1
1761 09:46:57.617478 APIC: 04: enabled 1
1762 09:46:57.617567 APIC: 06: enabled 1
1763 09:46:57.621055 APIC: 03: enabled 1
1764 09:46:57.624678 PCI: 01:00.0: enabled 1
1765 09:46:57.627716 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1766 09:46:57.634275 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 09:46:57.637602 ELOG: NV offset 0xf30000 size 0x1000
1768 09:46:57.644011 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 09:46:57.650820 ELOG: Event(17) added with size 13 at 2022-08-12 09:43:25 UTC
1770 09:46:57.657307 ELOG: Event(92) added with size 9 at 2022-08-12 09:43:25 UTC
1771 09:46:57.663949 ELOG: Event(93) added with size 9 at 2022-08-12 09:43:25 UTC
1772 09:46:57.670655 ELOG: Event(9E) added with size 10 at 2022-08-12 09:43:25 UTC
1773 09:46:57.676989 ELOG: Event(9F) added with size 14 at 2022-08-12 09:43:25 UTC
1774 09:46:57.683816 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 09:46:57.687316 ELOG: Event(A1) added with size 10 at 2022-08-12 09:43:25 UTC
1776 09:46:57.697282 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1777 09:46:57.703519 ELOG: Event(A0) added with size 9 at 2022-08-12 09:43:25 UTC
1778 09:46:57.707079 elog_add_boot_reason: Logged dev mode boot
1779 09:46:57.713791 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1780 09:46:57.713878 Finalize devices...
1781 09:46:57.716854 Devices finalized
1782 09:46:57.723711 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 09:46:57.726806 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 09:46:57.733547 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 09:46:57.737111 ME: HFSTS1 : 0x80030055
1786 09:46:57.743441 ME: HFSTS2 : 0x30280116
1787 09:46:57.746881 ME: HFSTS3 : 0x00000050
1788 09:46:57.749943 ME: HFSTS4 : 0x00004000
1789 09:46:57.756675 ME: HFSTS5 : 0x00000000
1790 09:46:57.760165 ME: HFSTS6 : 0x00400006
1791 09:46:57.763204 ME: Manufacturing Mode : YES
1792 09:46:57.766821 ME: SPI Protection Mode Enabled : NO
1793 09:46:57.769811 ME: FW Partition Table : OK
1794 09:46:57.776643 ME: Bringup Loader Failure : NO
1795 09:46:57.779784 ME: Firmware Init Complete : NO
1796 09:46:57.783476 ME: Boot Options Present : NO
1797 09:46:57.786654 ME: Update In Progress : NO
1798 09:46:57.789845 ME: D0i3 Support : YES
1799 09:46:57.793045 ME: Low Power State Enabled : NO
1800 09:46:57.796681 ME: CPU Replaced : YES
1801 09:46:57.799675 ME: CPU Replacement Valid : YES
1802 09:46:57.806430 ME: Current Working State : 5
1803 09:46:57.810101 ME: Current Operation State : 1
1804 09:46:57.813189 ME: Current Operation Mode : 3
1805 09:46:57.816812 ME: Error Code : 0
1806 09:46:57.820010 ME: Enhanced Debug Mode : NO
1807 09:46:57.823126 ME: CPU Debug Disabled : YES
1808 09:46:57.826876 ME: TXT Support : NO
1809 09:46:57.833093 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 09:46:57.839914 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1811 09:46:57.842860 CBFS: 'fallback/slic' not found.
1812 09:46:57.846440 ACPI: Writing ACPI tables at 76b01000.
1813 09:46:57.849552 ACPI: * FACS
1814 09:46:57.849639 ACPI: * DSDT
1815 09:46:57.856278 Ramoops buffer: 0x100000@0x76a00000.
1816 09:46:57.859445 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1817 09:46:57.862843 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1818 09:46:57.867106 Google Chrome EC: version:
1819 09:46:57.870129 ro: voema_v2.0.7540-147f8d37d1
1820 09:46:57.873734 rw: voema_v2.0.7540-147f8d37d1
1821 09:46:57.876736 running image: 2
1822 09:46:57.883612 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1823 09:46:57.886846 ACPI: * FADT
1824 09:46:57.886932 SCI is IRQ9
1825 09:46:57.889960 ACPI: added table 1/32, length now 40
1826 09:46:57.893666 ACPI: * SSDT
1827 09:46:57.896826 Found 1 CPU(s) with 8 core(s) each.
1828 09:46:57.899900 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1829 09:46:57.906720 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1830 09:46:57.909956 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1831 09:46:57.913558 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1832 09:46:57.920156 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1833 09:46:57.926839 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1834 09:46:57.929996 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1835 09:46:57.936535 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1836 09:46:57.943278 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1837 09:46:57.946369 \_SB.PCI0.RP09: Added StorageD3Enable property
1838 09:46:57.949947 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1839 09:46:57.956475 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1840 09:46:57.963359 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1841 09:46:57.966391 PS2K: Passing 80 keymaps to kernel
1842 09:46:57.973489 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1843 09:46:57.979678 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1844 09:46:57.986539 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1845 09:46:57.992816 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1846 09:46:58.000068 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1847 09:46:58.006535 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1848 09:46:58.012798 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1849 09:46:58.019735 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1850 09:46:58.022946 ACPI: added table 2/32, length now 44
1851 09:46:58.026098 ACPI: * MCFG
1852 09:46:58.029693 ACPI: added table 3/32, length now 48
1853 09:46:58.029794 ACPI: * TPM2
1854 09:46:58.032779 TPM2 log created at 0x769f0000
1855 09:46:58.036416 ACPI: added table 4/32, length now 52
1856 09:46:58.039802 ACPI: * MADT
1857 09:46:58.039887 SCI is IRQ9
1858 09:46:58.042602 ACPI: added table 5/32, length now 56
1859 09:46:58.046229 current = 76b09850
1860 09:46:58.046313 ACPI: * DMAR
1861 09:46:58.052785 ACPI: added table 6/32, length now 60
1862 09:46:58.055893 ACPI: added table 7/32, length now 64
1863 09:46:58.055978 ACPI: * HPET
1864 09:46:58.059561 ACPI: added table 8/32, length now 68
1865 09:46:58.062632 ACPI: done.
1866 09:46:58.066175 ACPI tables: 35216 bytes.
1867 09:46:58.066259 smbios_write_tables: 769ef000
1868 09:46:58.069796 EC returned error result code 3
1869 09:46:58.072658 Couldn't obtain OEM name from CBI
1870 09:46:58.076784 Create SMBIOS type 16
1871 09:46:58.079726 Create SMBIOS type 17
1872 09:46:58.082882 GENERIC: 0.0 (WIFI Device)
1873 09:46:58.086471 SMBIOS tables: 1750 bytes.
1874 09:46:58.089633 Writing table forward entry at 0x00000500
1875 09:46:58.096438 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1876 09:46:58.099620 Writing coreboot table at 0x76b25000
1877 09:46:58.106216 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1878 09:46:58.109807 1. 0000000000001000-000000000009ffff: RAM
1879 09:46:58.112956 2. 00000000000a0000-00000000000fffff: RESERVED
1880 09:46:58.119852 3. 0000000000100000-00000000769eefff: RAM
1881 09:46:58.122958 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1882 09:46:58.129662 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1883 09:46:58.136408 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1884 09:46:58.139514 7. 0000000077000000-000000007fbfffff: RESERVED
1885 09:46:58.146279 8. 00000000c0000000-00000000cfffffff: RESERVED
1886 09:46:58.149296 9. 00000000f8000000-00000000f9ffffff: RESERVED
1887 09:46:58.152872 10. 00000000fb000000-00000000fb000fff: RESERVED
1888 09:46:58.159675 11. 00000000fe000000-00000000fe00ffff: RESERVED
1889 09:46:58.162690 12. 00000000fed80000-00000000fed87fff: RESERVED
1890 09:46:58.169502 13. 00000000fed90000-00000000fed92fff: RESERVED
1891 09:46:58.172483 14. 00000000feda0000-00000000feda1fff: RESERVED
1892 09:46:58.179527 15. 00000000fedc0000-00000000feddffff: RESERVED
1893 09:46:58.182574 16. 0000000100000000-00000002803fffff: RAM
1894 09:46:58.185662 Passing 4 GPIOs to payload:
1895 09:46:58.188828 NAME | PORT | POLARITY | VALUE
1896 09:46:58.195646 lid | undefined | high | high
1897 09:46:58.202501 power | undefined | high | low
1898 09:46:58.205560 oprom | undefined | high | low
1899 09:46:58.212192 EC in RW | 0x000000e5 | high | high
1900 09:46:58.218957 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8b35
1901 09:46:58.222165 coreboot table: 1576 bytes.
1902 09:46:58.225346 IMD ROOT 0. 0x76fff000 0x00001000
1903 09:46:58.229019 IMD SMALL 1. 0x76ffe000 0x00001000
1904 09:46:58.232131 FSP MEMORY 2. 0x76c4e000 0x003b0000
1905 09:46:58.235672 VPD 3. 0x76c4d000 0x00000367
1906 09:46:58.238786 RO MCACHE 4. 0x76c4c000 0x00000fdc
1907 09:46:58.242292 CONSOLE 5. 0x76c2c000 0x00020000
1908 09:46:58.245525 FMAP 6. 0x76c2b000 0x00000578
1909 09:46:58.251695 TIME STAMP 7. 0x76c2a000 0x00000910
1910 09:46:58.255449 VBOOT WORK 8. 0x76c16000 0x00014000
1911 09:46:58.258498 ROMSTG STCK 9. 0x76c15000 0x00001000
1912 09:46:58.262093 AFTER CAR 10. 0x76c0a000 0x0000b000
1913 09:46:58.265096 RAMSTAGE 11. 0x76b97000 0x00073000
1914 09:46:58.268783 REFCODE 12. 0x76b42000 0x00055000
1915 09:46:58.271987 SMM BACKUP 13. 0x76b32000 0x00010000
1916 09:46:58.275322 4f444749 14. 0x76b30000 0x00002000
1917 09:46:58.278837 EXT VBT15. 0x76b2d000 0x0000219f
1918 09:46:58.285069 COREBOOT 16. 0x76b25000 0x00008000
1919 09:46:58.288752 ACPI 17. 0x76b01000 0x00024000
1920 09:46:58.291923 ACPI GNVS 18. 0x76b00000 0x00001000
1921 09:46:58.295126 RAMOOPS 19. 0x76a00000 0x00100000
1922 09:46:58.298300 TPM2 TCGLOG20. 0x769f0000 0x00010000
1923 09:46:58.301987 SMBIOS 21. 0x769ef000 0x00000800
1924 09:46:58.305103 IMD small region:
1925 09:46:58.308214 IMD ROOT 0. 0x76ffec00 0x00000400
1926 09:46:58.311830 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1927 09:46:58.315458 POWER STATE 2. 0x76ffeb80 0x00000044
1928 09:46:58.318654 ROMSTAGE 3. 0x76ffeb60 0x00000004
1929 09:46:58.324949 MEM INFO 4. 0x76ffe980 0x000001e0
1930 09:46:58.328614 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1931 09:46:58.331622 MTRR: Physical address space:
1932 09:46:58.338313 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1933 09:46:58.345152 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1934 09:46:58.351748 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1935 09:46:58.358424 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1936 09:46:58.365075 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1937 09:46:58.371778 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1938 09:46:58.375293 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1939 09:46:58.381997 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 09:46:58.385084 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 09:46:58.388263 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 09:46:58.391548 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 09:46:58.398448 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 09:46:58.401691 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 09:46:58.404776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 09:46:58.408399 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 09:46:58.415158 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 09:46:58.418294 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 09:46:58.421371 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 09:46:58.425074 call enable_fixed_mtrr()
1951 09:46:58.428213 CPU physical address size: 39 bits
1952 09:46:58.434932 MTRR: default type WB/UC MTRR counts: 6/6.
1953 09:46:58.438123 MTRR: UC selected as default type.
1954 09:46:58.441288 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1955 09:46:58.447902 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1956 09:46:58.454686 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1957 09:46:58.461515 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1958 09:46:58.468178 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1959 09:46:58.474337 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1960 09:46:58.474422
1961 09:46:58.478022 MTRR check
1962 09:46:58.478106 Fixed MTRRs : Enabled
1963 09:46:58.481089 Variable MTRRs: Enabled
1964 09:46:58.481191
1965 09:46:58.484725 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 09:46:58.491266 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 09:46:58.494365 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 09:46:58.497999 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 09:46:58.501219 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 09:46:58.507615 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 09:46:58.511152 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 09:46:58.514385 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 09:46:58.517473 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 09:46:58.524141 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 09:46:58.527889 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 09:46:58.534166 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1977 09:46:58.537750 call enable_fixed_mtrr()
1978 09:46:58.540897 Checking cr50 for pending updates
1979 09:46:58.544568 CPU physical address size: 39 bits
1980 09:46:58.547653 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 09:46:58.550785 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 09:46:58.554435 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 09:46:58.561048 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 09:46:58.564141 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 09:46:58.567727 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 09:46:58.570753 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 09:46:58.577515 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 09:46:58.580919 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 09:46:58.584276 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 09:46:58.587375 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 09:46:58.594082 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 09:46:58.597195 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 09:46:58.600847 call enable_fixed_mtrr()
1994 09:46:58.603996 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 09:46:58.607165 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 09:46:58.613953 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 09:46:58.617147 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 09:46:58.620786 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 09:46:58.623937 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 09:46:58.630596 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 09:46:58.633747 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 09:46:58.637435 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 09:46:58.640596 CPU physical address size: 39 bits
2004 09:46:58.644713 call enable_fixed_mtrr()
2005 09:46:58.648286 Reading cr50 TPM mode
2006 09:46:58.651880 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 09:46:58.655721 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 09:46:58.658608 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 09:46:58.665158 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 09:46:58.668722 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 09:46:58.671814 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 09:46:58.675538 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 09:46:58.681749 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 09:46:58.685154 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 09:46:58.688317 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 09:46:58.692062 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 09:46:58.698233 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 09:46:58.702029 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 09:46:58.705148 call enable_fixed_mtrr()
2020 09:46:58.708341 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 09:46:58.711575 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 09:46:58.718332 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 09:46:58.721356 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 09:46:58.725064 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 09:46:58.728174 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 09:46:58.731574 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 09:46:58.738331 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 09:46:58.741320 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 09:46:58.744513 CPU physical address size: 39 bits
2030 09:46:58.748740 call enable_fixed_mtrr()
2031 09:46:58.752258 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 09:46:58.758874 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 09:46:58.761978 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 09:46:58.765528 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 09:46:58.768600 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 09:46:58.775338 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 09:46:58.778933 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 09:46:58.781953 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 09:46:58.785472 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 09:46:58.792040 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 09:46:58.795205 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 09:46:58.798822 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 09:46:58.805130 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 09:46:58.808789 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 09:46:58.811967 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 09:46:58.815161 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 09:46:58.821893 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 09:46:58.824897 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 09:46:58.828623 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 09:46:58.831836 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 09:46:58.835010 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 09:46:58.841789 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 09:46:58.845356 call enable_fixed_mtrr()
2054 09:46:58.848539 call enable_fixed_mtrr()
2055 09:46:58.851609 CPU physical address size: 39 bits
2056 09:46:58.855255 CPU physical address size: 39 bits
2057 09:46:58.858365 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2058 09:46:58.865008 CPU physical address size: 39 bits
2059 09:46:58.867998 CPU physical address size: 39 bits
2060 09:46:58.874801 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2061 09:46:58.881547 Checking segment from ROM address 0xffc02b38
2062 09:46:58.884600 Checking segment from ROM address 0xffc02b54
2063 09:46:58.888029 Loading segment from ROM address 0xffc02b38
2064 09:46:58.891538 code (compression=0)
2065 09:46:58.901260 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 09:46:58.908143 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 09:46:58.911335 it's not compressed!
2068 09:46:59.049596 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 09:46:59.056197 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 09:46:59.063018 Loading segment from ROM address 0xffc02b54
2071 09:46:59.063106 Entry Point 0x30000000
2072 09:46:59.066101 Loaded segments
2073 09:46:59.072893 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2074 09:46:59.116006 Finalizing chipset.
2075 09:46:59.118891 Finalizing SMM.
2076 09:46:59.118977 APMC done.
2077 09:46:59.125649 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2078 09:46:59.129167 mp_park_aps done after 0 msecs.
2079 09:46:59.132240 Jumping to boot code at 0x30000000(0x76b25000)
2080 09:46:59.142178 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 09:46:59.142264
2082 09:46:59.145777 Starting depthcharge on Voema...
2083 09:46:59.146144 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2084 09:46:59.146252 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2085 09:46:59.146341 Setting prompt string to ['volteer:']
2086 09:46:59.146427 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2087 09:46:59.155737 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2088 09:46:59.162238 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 09:46:59.168934 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 09:46:59.172034 Failed to find eMMC card reader
2091 09:46:59.172120 Wipe memory regions:
2092 09:46:59.178678 [0x00000000001000, 0x000000000a0000)
2093 09:46:59.182150 [0x00000000100000, 0x00000030000000)
2094 09:46:59.210189 [0x00000032662db0, 0x000000769ef000)
2095 09:46:59.249149 [0x00000100000000, 0x00000280400000)
2096 09:46:59.453712 ec_init: CrosEC protocol v3 supported (256, 256)
2097 09:46:59.460418 update_port_state: port C0 state: usb enable 1 mux conn 0
2098 09:46:59.470232 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2099 09:46:59.477028 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2100 09:46:59.480142 send_conn_disc_msg: pmc_send_cmd succeeded
2101 09:46:59.911688 R8152: Initializing
2102 09:46:59.915141 Version 9 (ocp_data = 6010)
2103 09:46:59.918129 R8152: Done initializing
2104 09:46:59.921703 Adding net device
2105 09:47:00.226330 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2106 09:47:00.226464
2107 09:47:00.229593 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2109 09:47:00.330379 volteer: tftpboot 192.168.201.1 7022965/tftp-deploy-k8rmvax4/kernel/bzImage 7022965/tftp-deploy-k8rmvax4/kernel/cmdline 7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
2110 09:47:00.330516 Setting prompt string to 'Starting kernel'
2111 09:47:00.330672 Setting prompt string to ['Starting kernel']
2112 09:47:00.330741 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2113 09:47:00.330813 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:43)
2114 09:47:00.334923 tftpboot 192.168.201.1 7022965/tftp-deploy-k8rmvax4/kernel/bzImoy-k8rmvax4/kernel/cmdline 7022965/tftp-deploy-k8rmvax4/ramdisk/ramdisk.cpio.gz
2115 09:47:00.335014 Waiting for link
2116 09:47:00.538303 done.
2117 09:47:00.538435 MAC: 00:e0:4c:71:a6:42
2118 09:47:00.541581 Sending DHCP discover... done.
2119 09:47:00.544717 Waiting for reply... done.
2120 09:47:00.548220 Sending DHCP request... done.
2121 09:47:00.551465 Waiting for reply... done.
2122 09:47:00.555102 My ip is 192.168.201.13
2123 09:47:00.558260 The DHCP server ip is 192.168.201.1
2124 09:47:00.561846 TFTP server IP predefined by user: 192.168.201.1
2125 09:47:00.571301 Bootfile predefined by user: 7022965/tftp-deploy-k8rmvax4/kernel/bzImage
2126 09:47:00.574946 Sending tftp read request... done.
2127 09:47:00.578218 Waiting for the transfer...
2128 09:47:00.856734 00000000 ################################################################
2129 09:47:01.137081 00080000 ################################################################
2130 09:47:01.421051 00100000 ################################################################
2131 09:47:01.704258 00180000 ################################################################
2132 09:47:01.987214 00200000 ################################################################
2133 09:47:02.269027 00280000 ################################################################
2134 09:47:02.549953 00300000 ################################################################
2135 09:47:02.828596 00380000 ################################################################
2136 09:47:03.102003 00400000 ################################################################
2137 09:47:03.360309 00480000 ################################################################
2138 09:47:03.603227 00500000 ################################################################
2139 09:47:03.850137 00580000 ################################################################
2140 09:47:04.097857 00600000 ################################################################ done.
2141 09:47:04.101436 The bootfile was 6815632 bytes long.
2142 09:47:04.104491 Sending tftp read request... done.
2143 09:47:04.108121 Waiting for the transfer...
2144 09:47:04.341238 00000000 ################################################################
2145 09:47:04.574154 00080000 ################################################################
2146 09:47:04.805325 00100000 ################################################################
2147 09:47:05.036555 00180000 ################################################################
2148 09:47:05.272402 00200000 ################################################################
2149 09:47:05.502155 00280000 ################################################################
2150 09:47:05.732214 00300000 ################################################################
2151 09:47:05.962437 00380000 ################################################################
2152 09:47:06.198206 00400000 ################################################################
2153 09:47:06.430835 00480000 ################################################################
2154 09:47:06.664319 00500000 ################################################################
2155 09:47:06.894747 00580000 ################################################################
2156 09:47:07.128581 00600000 ################################################################
2157 09:47:07.363726 00680000 ################################################################
2158 09:47:07.604337 00700000 ################################################################
2159 09:47:07.838661 00780000 ################################################################
2160 09:47:07.912542 00800000 ##################### done.
2161 09:47:07.915560 Sending tftp read request... done.
2162 09:47:07.919078 Waiting for the transfer...
2163 09:47:07.922399 00000000 # done.
2164 09:47:07.928747 Command line loaded dynamically from TFTP file: 7022965/tftp-deploy-k8rmvax4/kernel/cmdline
2165 09:47:07.941900 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2166 09:47:07.950615 Shutting down all USB controllers.
2167 09:47:07.951182 Removing current net device
2168 09:47:07.953854 Finalizing coreboot
2169 09:47:07.960699 Exiting depthcharge with code 4 at timestamp: 17462690
2170 09:47:07.961310
2171 09:47:07.961815 Starting kernel ...
2172 09:47:07.962278
2173 09:47:07.962731
2174 09:47:07.963778 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2175 09:47:07.964389 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2176 09:47:07.964885 Setting prompt string to ['Linux version [0-9]']
2177 09:47:07.965382 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2178 09:47:07.965594 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2180 09:51:42.965355 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2182 09:51:42.966501 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2184 09:51:42.967365 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2187 09:51:42.968872 end: 2 depthcharge-action (duration 00:05:00) [common]
2189 09:51:42.969593 Cleaning after the job
2190 09:51:42.969676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/ramdisk
2191 09:51:42.970609 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/kernel
2192 09:51:42.971346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022965/tftp-deploy-k8rmvax4/modules
2193 09:51:42.971572 start: 5.1 power-off (timeout 00:00:30) [common]
2194 09:51:42.971725 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2195 09:51:42.991304 >> Command sent successfully.
2196 09:51:42.993539 Returned 0 in 0 seconds
2197 09:51:43.094348 end: 5.1 power-off (duration 00:00:00) [common]
2199 09:51:43.094690 start: 5.2 read-feedback (timeout 00:10:00) [common]
2200 09:51:43.095027 Listened to connection for namespace 'common' for up to 1s
2201 09:51:44.096737 Finalising connection for namespace 'common'
2202 09:51:44.097488 Disconnecting from shell: Finalise
2203 09:51:44.198991 end: 5.2 read-feedback (duration 00:00:01) [common]
2204 09:51:44.199643 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022965
2205 09:51:44.213791 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022965
2206 09:51:44.213915 JobError: Your job cannot terminate cleanly.