Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 03:27:02.398143 lava-dispatcher, installed at version: 2022.06
2 03:27:02.398352 start: 0 validate
3 03:27:02.398493 Start time: 2022-07-27 03:27:02.398484+00:00 (UTC)
4 03:27:02.398629 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:27:02.398769 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 03:27:02.693695 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:27:02.694442 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-585-gc99f2b257bde%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:27:02.990924 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:27:02.991643 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:27:03.290312 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:27:03.291020 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-585-gc99f2b257bde%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:27:03.587105 validate duration: 1.19
14 03:27:03.587680 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:27:03.587909 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:27:03.588112 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:27:03.588325 Not decompressing ramdisk as can be used compressed.
18 03:27:03.588520 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 03:27:03.588678 saving as /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/ramdisk/initrd.cpio.gz
20 03:27:03.588821 total size: 5411064 (5MB)
21 03:27:03.590231 progress 0% (0MB)
22 03:27:03.591954 progress 5% (0MB)
23 03:27:03.593456 progress 10% (0MB)
24 03:27:03.594951 progress 15% (0MB)
25 03:27:03.596539 progress 20% (1MB)
26 03:27:03.597965 progress 25% (1MB)
27 03:27:03.599376 progress 30% (1MB)
28 03:27:03.600792 progress 35% (1MB)
29 03:27:03.602489 progress 40% (2MB)
30 03:27:03.603948 progress 45% (2MB)
31 03:27:03.605404 progress 50% (2MB)
32 03:27:03.606820 progress 55% (2MB)
33 03:27:03.608396 progress 60% (3MB)
34 03:27:03.609878 progress 65% (3MB)
35 03:27:03.611345 progress 70% (3MB)
36 03:27:03.612810 progress 75% (3MB)
37 03:27:03.614427 progress 80% (4MB)
38 03:27:03.615854 progress 85% (4MB)
39 03:27:03.617372 progress 90% (4MB)
40 03:27:03.618791 progress 95% (4MB)
41 03:27:03.620382 progress 100% (5MB)
42 03:27:03.620580 5MB downloaded in 0.03s (162.51MB/s)
43 03:27:03.620823 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:27:03.621130 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:27:03.621252 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:27:03.621350 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:27:03.621462 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-585-gc99f2b257bde/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:27:03.621554 saving as /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/kernel/bzImage
50 03:27:03.621637 total size: 6815632 (6MB)
51 03:27:03.621734 No compression specified
52 03:27:06.626504 progress 0% (0MB)
53 03:27:06.628665 progress 5% (0MB)
54 03:27:06.630562 progress 10% (0MB)
55 03:27:06.632602 progress 15% (1MB)
56 03:27:06.634456 progress 20% (1MB)
57 03:27:06.636298 progress 25% (1MB)
58 03:27:06.638350 progress 30% (1MB)
59 03:27:06.640145 progress 35% (2MB)
60 03:27:06.642124 progress 40% (2MB)
61 03:27:06.643864 progress 45% (2MB)
62 03:27:06.645646 progress 50% (3MB)
63 03:27:06.647554 progress 55% (3MB)
64 03:27:06.649373 progress 60% (3MB)
65 03:27:06.651321 progress 65% (4MB)
66 03:27:06.653138 progress 70% (4MB)
67 03:27:06.654873 progress 75% (4MB)
68 03:27:06.656809 progress 80% (5MB)
69 03:27:06.658645 progress 85% (5MB)
70 03:27:06.660603 progress 90% (5MB)
71 03:27:06.662414 progress 95% (6MB)
72 03:27:06.664250 progress 100% (6MB)
73 03:27:06.664569 6MB downloaded in 3.04s (2.14MB/s)
74 03:27:06.664771 end: 1.2.1 http-download (duration 00:00:03) [common]
76 03:27:06.665034 end: 1.2 download-retry (duration 00:00:03) [common]
77 03:27:06.665174 start: 1.3 download-retry (timeout 00:09:57) [common]
78 03:27:06.665273 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 03:27:06.665413 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 03:27:06.665491 saving as /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/nfsrootfs/full.rootfs.tar
81 03:27:06.665562 total size: 122624016 (116MB)
82 03:27:06.665645 Using unxz to decompress xz
83 03:27:06.669291 progress 0% (0MB)
84 03:27:07.167768 progress 5% (5MB)
85 03:27:07.666456 progress 10% (11MB)
86 03:27:08.167246 progress 15% (17MB)
87 03:27:08.680768 progress 20% (23MB)
88 03:27:09.035315 progress 25% (29MB)
89 03:27:09.420945 progress 30% (35MB)
90 03:27:09.692559 progress 35% (40MB)
91 03:27:09.929788 progress 40% (46MB)
92 03:27:10.322282 progress 45% (52MB)
93 03:27:10.719278 progress 50% (58MB)
94 03:27:11.095079 progress 55% (64MB)
95 03:27:11.483721 progress 60% (70MB)
96 03:27:11.858692 progress 65% (76MB)
97 03:27:12.280981 progress 70% (81MB)
98 03:27:12.748262 progress 75% (87MB)
99 03:27:13.214467 progress 80% (93MB)
100 03:27:13.341000 progress 85% (99MB)
101 03:27:13.531903 progress 90% (105MB)
102 03:27:13.909118 progress 95% (111MB)
103 03:27:14.324771 progress 100% (116MB)
104 03:27:14.330382 116MB downloaded in 7.66s (15.26MB/s)
105 03:27:14.330673 end: 1.3.1 http-download (duration 00:00:08) [common]
107 03:27:14.330973 end: 1.3 download-retry (duration 00:00:08) [common]
108 03:27:14.331079 start: 1.4 download-retry (timeout 00:09:49) [common]
109 03:27:14.331180 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 03:27:14.331312 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-585-gc99f2b257bde/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:27:14.331396 saving as /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/modules/modules.tar
112 03:27:14.331469 total size: 51756 (0MB)
113 03:27:14.331541 Using unxz to decompress xz
114 03:27:14.613623 progress 63% (0MB)
115 03:27:14.614095 progress 100% (0MB)
116 03:27:14.617717 0MB downloaded in 0.29s (0.17MB/s)
117 03:27:14.617985 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:27:14.618285 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:27:14.618398 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 03:27:14.618510 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 03:27:16.496709 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6901567/extract-nfsrootfs-z6uvlwiz
123 03:27:16.496959 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:27:16.497153 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
125 03:27:16.497328 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98
126 03:27:16.497445 makedir: /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin
127 03:27:16.497542 makedir: /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/tests
128 03:27:16.497635 makedir: /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/results
129 03:27:16.497745 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-add-keys
130 03:27:16.497887 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-add-sources
131 03:27:16.498018 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-background-process-start
132 03:27:16.498145 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-background-process-stop
133 03:27:16.498269 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-common-functions
134 03:27:16.498392 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-echo-ipv4
135 03:27:16.498518 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-install-packages
136 03:27:16.498641 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-installed-packages
137 03:27:16.498762 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-os-build
138 03:27:16.498884 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-probe-channel
139 03:27:16.499006 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-probe-ip
140 03:27:16.499127 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-target-ip
141 03:27:16.499246 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-target-mac
142 03:27:16.499366 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-target-storage
143 03:27:16.499494 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-case
144 03:27:16.499636 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-event
145 03:27:16.499757 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-feedback
146 03:27:16.499880 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-raise
147 03:27:16.500001 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-reference
148 03:27:16.500123 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-runner
149 03:27:16.500244 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-set
150 03:27:16.500364 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-test-shell
151 03:27:16.500487 Updating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-install-packages (oe)
152 03:27:16.500614 Updating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/bin/lava-installed-packages (oe)
153 03:27:16.500722 Creating /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/environment
154 03:27:16.500820 LAVA metadata
155 03:27:16.500896 - LAVA_JOB_ID=6901567
156 03:27:16.500969 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:27:16.501086 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
158 03:27:16.501161 skipped lava-vland-overlay
159 03:27:16.501248 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:27:16.501343 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
161 03:27:16.501415 skipped lava-multinode-overlay
162 03:27:16.501500 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:27:16.501593 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
164 03:27:16.501676 Loading test definitions
165 03:27:16.501782 start: 1.5.2.3.1 git-repo-action (timeout 00:09:47) [common]
166 03:27:16.501866 Using /lava-6901567 at stage 0
167 03:27:16.501974 Fetching tests from https://github.com/kernelci/test-definitions
168 03:27:16.502065 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/0/tests/0_ltp-ipc'
169 03:27:21.052051 Running '/usr/bin/git checkout kernelci.org
170 03:27:21.120430 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 03:27:21.121242 uuid=6901567_1.5.2.3.1 testdef=None
172 03:27:21.121424 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 03:27:21.121707 start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
175 03:27:21.122596 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 03:27:21.122871 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
178 03:27:21.123959 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 03:27:21.124255 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
181 03:27:21.125297 runner path: /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/0/tests/0_ltp-ipc test_uuid 6901567_1.5.2.3.1
182 03:27:21.125403 SKIPFILE='skipfile-lkft.yaml'
183 03:27:21.125479 SKIP_INSTALL='true'
184 03:27:21.125549 TST_CMDFILES='ipc'
185 03:27:21.125700 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 03:27:21.125948 Creating lava-test-runner.conf files
188 03:27:21.126041 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6901567/lava-overlay-e5iffc98/lava-6901567/0 for stage 0
189 03:27:21.126137 - 0_ltp-ipc
190 03:27:21.126247 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 03:27:21.126349 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
192 03:27:29.179363 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 03:27:29.179532 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
194 03:27:29.179641 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 03:27:29.179758 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
196 03:27:29.179859 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
197 03:27:29.292950 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 03:27:29.293315 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
199 03:27:29.293440 extracting modules file /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6901567/extract-nfsrootfs-z6uvlwiz
200 03:27:29.298092 extracting modules file /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6901567/extract-overlay-ramdisk-ehe7ylbn/ramdisk
201 03:27:29.302391 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 03:27:29.302518 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
203 03:27:29.302614 [common] Applying overlay to NFS
204 03:27:29.302719 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6901567/compress-overlay-tpw3g6yl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6901567/extract-nfsrootfs-z6uvlwiz
205 03:27:29.795865 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 03:27:29.796040 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
207 03:27:29.796150 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 03:27:29.796253 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
209 03:27:29.796348 Building ramdisk /var/lib/lava/dispatcher/tmp/6901567/extract-overlay-ramdisk-ehe7ylbn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6901567/extract-overlay-ramdisk-ehe7ylbn/ramdisk
210 03:27:29.833225 >> 24431 blocks
211 03:27:30.348456 rename /var/lib/lava/dispatcher/tmp/6901567/extract-overlay-ramdisk-ehe7ylbn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
212 03:27:30.348888 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 03:27:30.349023 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
214 03:27:30.349152 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
215 03:27:30.349262 No mkimage arch provided, not using FIT.
216 03:27:30.349372 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 03:27:30.349471 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 03:27:30.349587 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
219 03:27:30.349698 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
220 03:27:30.349788 No LXC device requested
221 03:27:30.349883 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 03:27:30.349984 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
223 03:27:30.350075 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 03:27:30.350154 Checking files for TFTP limit of 4294967296 bytes.
225 03:27:30.350583 end: 1 tftp-deploy (duration 00:00:27) [common]
226 03:27:30.350705 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 03:27:30.350814 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 03:27:30.350963 substitutions:
229 03:27:30.351042 - {DTB}: None
230 03:27:30.351118 - {INITRD}: 6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
231 03:27:30.351189 - {KERNEL}: 6901567/tftp-deploy-cf92o5rm/kernel/bzImage
232 03:27:30.351262 - {LAVA_MAC}: None
233 03:27:30.351334 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6901567/extract-nfsrootfs-z6uvlwiz
234 03:27:30.351403 - {NFS_SERVER_IP}: 192.168.201.1
235 03:27:30.351469 - {PRESEED_CONFIG}: None
236 03:27:30.351533 - {PRESEED_LOCAL}: None
237 03:27:30.351597 - {RAMDISK}: 6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
238 03:27:30.351661 - {ROOT_PART}: None
239 03:27:30.351724 - {ROOT}: None
240 03:27:30.351787 - {SERVER_IP}: 192.168.201.1
241 03:27:30.351850 - {TEE}: None
242 03:27:30.351913 Parsed boot commands:
243 03:27:30.351975 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 03:27:30.352145 Parsed boot commands: tftpboot 192.168.201.1 6901567/tftp-deploy-cf92o5rm/kernel/bzImage 6901567/tftp-deploy-cf92o5rm/kernel/cmdline 6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
245 03:27:30.352249 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 03:27:30.352352 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 03:27:30.352459 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 03:27:30.352559 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 03:27:30.352638 Not connected, no need to disconnect.
250 03:27:30.352726 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 03:27:30.352818 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 03:27:30.352892 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 03:27:30.355909 Setting prompt string to ['lava-test: # ']
254 03:27:30.356240 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 03:27:30.356359 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 03:27:30.356471 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 03:27:30.356573 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 03:27:30.356778 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 03:27:30.377464 >> Command sent successfully.
260 03:27:30.379472 Returned 0 in 0 seconds
261 03:27:30.480284 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 03:27:30.480637 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 03:27:30.480749 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 03:27:30.480848 Setting prompt string to 'Starting depthcharge on Helios...'
266 03:27:30.480923 Changing prompt to 'Starting depthcharge on Helios...'
267 03:27:30.480999 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 03:27:30.481309 [Enter `^Ec?' for help]
269 03:27:30.481396 # ./run.sh: 29: cd: can't cd to functional
270 03:27:30.481470 # ./run.sh: 29: cd: can't cd to functional
271 03:27:30.481539 # ./run.sh: 29: cd: can't cd to functional
272 03:27:30.481604 # ./run.sh: 29: cd: can't cd to functional
273 03:27:30.481670 # ./run.sh: 29: cd: can't cd to functional
274 03:27:30.481733 # ./run.sh: 29: cd: can't cd to functional
275 03:27:30.481795 # ./run.sh: 29: cd: can't cd to functional
276 03:27:30.481857 # ./run.sh: 29: cd: can't cd to functional
277 03:27:30.481917 # ./run.sh: 29: ./run.sh: Stale file handle
278 03:27:37.593621
279 03:27:37.594177
280 03:27:37.603116 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
281 03:27:37.606427 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
282 03:27:37.613195 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
283 03:27:37.616469 CPU: AES supported, TXT NOT supported, VT supported
284 03:27:37.622857 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
285 03:27:37.626160 PCH: device id 0284 (rev 00) is Cometlake-U Premium
286 03:27:37.632962 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
287 03:27:37.636291 VBOOT: Loading verstage.
288 03:27:37.639851 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
289 03:27:37.646190 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
290 03:27:37.652877 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
291 03:27:37.653360 CBFS @ c08000 size 3f8000
292 03:27:37.659672 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
293 03:27:37.663043 CBFS: Locating 'fallback/verstage'
294 03:27:37.666345 CBFS: Found @ offset 10fb80 size 1072c
295 03:27:37.670126
296 03:27:37.670567
297 03:27:37.680392 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
298 03:27:37.694496 Probing TPM: . done!
299 03:27:37.698003 TPM ready after 0 ms
300 03:27:37.701258 Connected to device vid:did:rid of 1ae0:0028:00
301 03:27:37.711362 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
302 03:27:37.714598 Initialized TPM device CR50 revision 0
303 03:27:37.760025 tlcl_send_startup: Startup return code is 0
304 03:27:37.760191 TPM: setup succeeded
305 03:27:37.774149 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
306 03:27:37.777963 Chrome EC: UHEPI supported
307 03:27:37.781022 Phase 1
308 03:27:37.784537 FMAP: area GBB found @ c05000 (12288 bytes)
309 03:27:37.791303 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
310 03:27:37.794823 Phase 2
311 03:27:37.794924 Phase 3
312 03:27:37.797744 FMAP: area GBB found @ c05000 (12288 bytes)
313 03:27:37.804612 VB2:vb2_report_dev_firmware() This is developer signed firmware
314 03:27:37.811217 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 03:27:37.814477 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 03:27:37.821048 VB2:vb2_verify_keyblock() Checking keyblock signature...
317 03:27:37.836883 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
318 03:27:37.840281 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 03:27:37.846870 VB2:vb2_verify_fw_preamble() Verifying preamble.
320 03:27:37.850923 Phase 4
321 03:27:37.854294 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
322 03:27:37.860967 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
323 03:27:38.040535 VB2:vb2_rsa_verify_digest() Digest check failed!
324 03:27:38.047474 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
325 03:27:38.047959 Saving nvdata
326 03:27:38.050827 Reboot requested (10020007)
327 03:27:38.054248 board_reset() called!
328 03:27:38.054657 full_reset() called!
329 03:27:42.560233
330 03:27:42.560764
331 03:27:42.570294 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
332 03:27:42.573548 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
333 03:27:42.580512 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
334 03:27:42.583462 CPU: AES supported, TXT NOT supported, VT supported
335 03:27:42.589855 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
336 03:27:42.593472 PCH: device id 0284 (rev 00) is Cometlake-U Premium
337 03:27:42.600101 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
338 03:27:42.603461 VBOOT: Loading verstage.
339 03:27:42.607154 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
340 03:27:42.613158 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
341 03:27:42.619738 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 03:27:42.620195 CBFS @ c08000 size 3f8000
343 03:27:42.626336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 03:27:42.630211 CBFS: Locating 'fallback/verstage'
345 03:27:42.633180 CBFS: Found @ offset 10fb80 size 1072c
346 03:27:42.637283
347 03:27:42.637913
348 03:27:42.647111 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
349 03:27:42.661423 Probing TPM: . done!
350 03:27:42.665010 TPM ready after 0 ms
351 03:27:42.667863 Connected to device vid:did:rid of 1ae0:0028:00
352 03:27:42.678080 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
353 03:27:42.681788 Initialized TPM device CR50 revision 0
354 03:27:42.728127 tlcl_send_startup: Startup return code is 0
355 03:27:42.728615 TPM: setup succeeded
356 03:27:42.740391 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
357 03:27:42.744191 Chrome EC: UHEPI supported
358 03:27:42.747248 Phase 1
359 03:27:42.750973 FMAP: area GBB found @ c05000 (12288 bytes)
360 03:27:42.757458 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
361 03:27:42.763910 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
362 03:27:42.767426 Recovery requested (1009000e)
363 03:27:42.772911 Saving nvdata
364 03:27:42.779285 tlcl_extend: response is 0
365 03:27:42.787810 tlcl_extend: response is 0
366 03:27:42.795149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
367 03:27:42.797993 CBFS @ c08000 size 3f8000
368 03:27:42.805049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
369 03:27:42.808019 CBFS: Locating 'fallback/romstage'
370 03:27:42.811622 CBFS: Found @ offset 80 size 145fc
371 03:27:42.814912 Accumulated console time in verstage 98 ms
372 03:27:42.815340
373 03:27:42.815768
374 03:27:42.828273 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
375 03:27:42.834966 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
376 03:27:42.838388 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
377 03:27:42.841458 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
378 03:27:42.848107 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
379 03:27:42.851404 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
380 03:27:42.854829 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
381 03:27:42.858145 TCO_STS: 0000 0000
382 03:27:42.861798 GEN_PMCON: e0015238 00000200
383 03:27:42.864804 GBLRST_CAUSE: 00000000 00000000
384 03:27:42.865399 prev_sleep_state 5
385 03:27:42.868027 Boot Count incremented to 23643
386 03:27:42.875063 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
387 03:27:42.878026 CBFS @ c08000 size 3f8000
388 03:27:42.881384 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
389 03:27:42.885010 CBFS: Locating 'fspm.bin'
390 03:27:42.888498 CBFS: Found @ offset 5ffc0 size 71000
391 03:27:42.892388 Chrome EC: UHEPI supported
392 03:27:42.899400 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
393 03:27:42.904909 Probing TPM: done!
394 03:27:42.911274 Connected to device vid:did:rid of 1ae0:0028:00
395 03:27:42.920995 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
396 03:27:42.927891 Initialized TPM device CR50 revision 0
397 03:27:42.936924 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 03:27:42.944004 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
399 03:27:42.947658 MRC cache found, size 1948
400 03:27:42.950595 bootmode is set to: 2
401 03:27:42.954224 PRMRR disabled by config.
402 03:27:42.954678 SPD INDEX = 1
403 03:27:42.960356 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
404 03:27:42.963634 CBFS @ c08000 size 3f8000
405 03:27:42.967040 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
406 03:27:42.970580 CBFS: Locating 'spd.bin'
407 03:27:42.974125 CBFS: Found @ offset 5fb80 size 400
408 03:27:42.977247 SPD: module type is LPDDR3
409 03:27:42.980356 SPD: module part is
410 03:27:42.987229 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
411 03:27:42.990644 SPD: device width 4 bits, bus width 8 bits
412 03:27:42.993518 SPD: module size is 4096 MB (per channel)
413 03:27:42.996747 memory slot: 0 configuration done.
414 03:27:43.000291 memory slot: 2 configuration done.
415 03:27:43.051818 CBMEM:
416 03:27:43.055167 IMD: root @ 99fff000 254 entries.
417 03:27:43.058503 IMD: root @ 99ffec00 62 entries.
418 03:27:43.061921 External stage cache:
419 03:27:43.065631 IMD: root @ 9abff000 254 entries.
420 03:27:43.068758 IMD: root @ 9abfec00 62 entries.
421 03:27:43.071799 Chrome EC: clear events_b mask to 0x0000000020004000
422 03:27:43.088939 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 03:27:43.104094 tlcl_write: response is 0
424 03:27:43.113286 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
425 03:27:43.119929 MRC: TPM MRC hash updated successfully.
426 03:27:43.120372 2 DIMMs found
427 03:27:43.123282 SMM Memory Map
428 03:27:43.126729 SMRAM : 0x9a000000 0x1000000
429 03:27:43.130078 Subregion 0: 0x9a000000 0xa00000
430 03:27:43.133262 Subregion 1: 0x9aa00000 0x200000
431 03:27:43.136894 Subregion 2: 0x9ac00000 0x400000
432 03:27:43.139692 top_of_ram = 0x9a000000
433 03:27:43.143610 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
434 03:27:43.150159 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
435 03:27:43.153428 MTRR Range: Start=ff000000 End=0 (Size 1000000)
436 03:27:43.159960 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
437 03:27:43.163234 CBFS @ c08000 size 3f8000
438 03:27:43.166701 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
439 03:27:43.169610 CBFS: Locating 'fallback/postcar'
440 03:27:43.173181 CBFS: Found @ offset 107000 size 4b44
441 03:27:43.179934 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
442 03:27:43.191726 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
443 03:27:43.195165 Processing 180 relocs. Offset value of 0x97c0c000
444 03:27:43.203755 Accumulated console time in romstage 286 ms
445 03:27:43.204280
446 03:27:43.204692
447 03:27:43.213395 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
448 03:27:43.219843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 03:27:43.222930 CBFS @ c08000 size 3f8000
450 03:27:43.229867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 03:27:43.233710 CBFS: Locating 'fallback/ramstage'
452 03:27:43.236539 CBFS: Found @ offset 43380 size 1b9e8
453 03:27:43.243045 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
454 03:27:43.275304 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
455 03:27:43.278693 Processing 3976 relocs. Offset value of 0x98db0000
456 03:27:43.285215 Accumulated console time in postcar 52 ms
457 03:27:43.285698
458 03:27:43.286111
459 03:27:43.295503 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
460 03:27:43.301805 FMAP: area RO_VPD found @ c00000 (16384 bytes)
461 03:27:43.305351 WARNING: RO_VPD is uninitialized or empty.
462 03:27:43.308690 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 03:27:43.314984 FMAP: area RW_VPD found @ af8000 (8192 bytes)
464 03:27:43.315430 Normal boot.
465 03:27:43.322063 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
466 03:27:43.324872 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
467 03:27:43.328204 CBFS @ c08000 size 3f8000
468 03:27:43.334885 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
469 03:27:43.338270 CBFS: Locating 'cpu_microcode_blob.bin'
470 03:27:43.342008 CBFS: Found @ offset 14700 size 2ec00
471 03:27:43.344813 microcode: sig=0x806ec pf=0x4 revision=0xc9
472 03:27:43.348421 Skip microcode update
473 03:27:43.354612 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
474 03:27:43.355054 CBFS @ c08000 size 3f8000
475 03:27:43.361410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
476 03:27:43.364926 CBFS: Locating 'fsps.bin'
477 03:27:43.367831 CBFS: Found @ offset d1fc0 size 35000
478 03:27:43.394120 Detected 4 core, 8 thread CPU.
479 03:27:43.396779 Setting up SMI for CPU
480 03:27:43.400201 IED base = 0x9ac00000
481 03:27:43.400704 IED size = 0x00400000
482 03:27:43.403219 Will perform SMM setup.
483 03:27:43.409995 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
484 03:27:43.416531 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
485 03:27:43.419938 Processing 16 relocs. Offset value of 0x00030000
486 03:27:43.423971 Attempting to start 7 APs
487 03:27:43.426938 Waiting for 10ms after sending INIT.
488 03:27:43.443254 Waiting for 1st SIPI to complete...done.
489 03:27:43.443712 AP: slot 3 apic_id 1.
490 03:27:43.449614 Waiting for 2nd SIPI to complete...done.
491 03:27:43.450054 AP: slot 2 apic_id 4.
492 03:27:43.453018 AP: slot 5 apic_id 5.
493 03:27:43.456574 AP: slot 7 apic_id 7.
494 03:27:43.457122 AP: slot 6 apic_id 6.
495 03:27:43.459719 AP: slot 1 apic_id 3.
496 03:27:43.463225 AP: slot 4 apic_id 2.
497 03:27:43.469578 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
498 03:27:43.476252 Processing 13 relocs. Offset value of 0x00038000
499 03:27:43.479735 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
500 03:27:43.486511 Installing SMM handler to 0x9a000000
501 03:27:43.492984 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
502 03:27:43.496180 Processing 658 relocs. Offset value of 0x9a010000
503 03:27:43.506342 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
504 03:27:43.509722 Processing 13 relocs. Offset value of 0x9a008000
505 03:27:43.516339 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
506 03:27:43.522570 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
507 03:27:43.529202 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
508 03:27:43.532568 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
509 03:27:43.539544 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
510 03:27:43.545609 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
511 03:27:43.549351 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
512 03:27:43.555931 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
513 03:27:43.559180 Clearing SMI status registers
514 03:27:43.562473 SMI_STS: PM1
515 03:27:43.562919 PM1_STS: PWRBTN
516 03:27:43.565839 TCO_STS: SECOND_TO
517 03:27:43.569041 New SMBASE 0x9a000000
518 03:27:43.572476 In relocation handler: CPU 0
519 03:27:43.575846 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
520 03:27:43.579193 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 03:27:43.582560 Relocation complete.
522 03:27:43.585839 New SMBASE 0x99fff400
523 03:27:43.586287 In relocation handler: CPU 3
524 03:27:43.592726 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
525 03:27:43.596022 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 03:27:43.599143 Relocation complete.
527 03:27:43.602860 New SMBASE 0x99ffe400
528 03:27:43.603307 In relocation handler: CPU 7
529 03:27:43.608934 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
530 03:27:43.612706 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 03:27:43.615496 Relocation complete.
532 03:27:43.615936 New SMBASE 0x99ffe800
533 03:27:43.618957 In relocation handler: CPU 6
534 03:27:43.625821 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 03:27:43.628906 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 03:27:43.632274 Relocation complete.
537 03:27:43.632829 New SMBASE 0x99fff800
538 03:27:43.635340 In relocation handler: CPU 2
539 03:27:43.641967 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
540 03:27:43.645954 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 03:27:43.648823 Relocation complete.
542 03:27:43.649307 New SMBASE 0x99ffec00
543 03:27:43.652205 In relocation handler: CPU 5
544 03:27:43.655470 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
545 03:27:43.662375 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 03:27:43.665549 Relocation complete.
547 03:27:43.666039 New SMBASE 0x99fff000
548 03:27:43.668848 In relocation handler: CPU 4
549 03:27:43.671920 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
550 03:27:43.679066 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 03:27:43.682032 Relocation complete.
552 03:27:43.682506 New SMBASE 0x99fffc00
553 03:27:43.685006 In relocation handler: CPU 1
554 03:27:43.688615 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 03:27:43.695349 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 03:27:43.695790 Relocation complete.
557 03:27:43.698321 Initializing CPU #0
558 03:27:43.701784 CPU: vendor Intel device 806ec
559 03:27:43.705218 CPU: family 06, model 8e, stepping 0c
560 03:27:43.708857 Clearing out pending MCEs
561 03:27:43.712007 Setting up local APIC...
562 03:27:43.712471 apic_id: 0x00 done.
563 03:27:43.715501 Turbo is available but hidden
564 03:27:43.718570 Turbo is available and visible
565 03:27:43.721575 VMX status: enabled
566 03:27:43.725015 IA32_FEATURE_CONTROL status: locked
567 03:27:43.728600 Skip microcode update
568 03:27:43.729036 CPU #0 initialized
569 03:27:43.731971 Initializing CPU #3
570 03:27:43.735031 Initializing CPU #2
571 03:27:43.735461 Initializing CPU #5
572 03:27:43.738653 CPU: vendor Intel device 806ec
573 03:27:43.742061 CPU: family 06, model 8e, stepping 0c
574 03:27:43.745224 CPU: vendor Intel device 806ec
575 03:27:43.748755 CPU: family 06, model 8e, stepping 0c
576 03:27:43.751721 Clearing out pending MCEs
577 03:27:43.755042 Clearing out pending MCEs
578 03:27:43.757715 Setting up local APIC...
579 03:27:43.757810 Initializing CPU #1
580 03:27:43.761015 Initializing CPU #4
581 03:27:43.764756 CPU: vendor Intel device 806ec
582 03:27:43.767634 CPU: family 06, model 8e, stepping 0c
583 03:27:43.771047 CPU: vendor Intel device 806ec
584 03:27:43.774339 CPU: family 06, model 8e, stepping 0c
585 03:27:43.777793 Clearing out pending MCEs
586 03:27:43.781054 Clearing out pending MCEs
587 03:27:43.781156 Setting up local APIC...
588 03:27:43.784370 Initializing CPU #7
589 03:27:43.787495 Initializing CPU #6
590 03:27:43.790764 CPU: vendor Intel device 806ec
591 03:27:43.794220 CPU: family 06, model 8e, stepping 0c
592 03:27:43.797852 CPU: vendor Intel device 806ec
593 03:27:43.801239 CPU: family 06, model 8e, stepping 0c
594 03:27:43.804021 Clearing out pending MCEs
595 03:27:43.804116 Clearing out pending MCEs
596 03:27:43.807525 Setting up local APIC...
597 03:27:43.810667 CPU: vendor Intel device 806ec
598 03:27:43.814077 CPU: family 06, model 8e, stepping 0c
599 03:27:43.817325 Clearing out pending MCEs
600 03:27:43.820550 apic_id: 0x02 done.
601 03:27:43.820645 apic_id: 0x03 done.
602 03:27:43.824170 VMX status: enabled
603 03:27:43.827544 VMX status: enabled
604 03:27:43.830642 IA32_FEATURE_CONTROL status: locked
605 03:27:43.833768 IA32_FEATURE_CONTROL status: locked
606 03:27:43.837146 Skip microcode update
607 03:27:43.837241 Skip microcode update
608 03:27:43.840366 CPU #4 initialized
609 03:27:43.840462 CPU #1 initialized
610 03:27:43.843683 Setting up local APIC...
611 03:27:43.847556 Setting up local APIC...
612 03:27:43.850663 apic_id: 0x04 done.
613 03:27:43.850758 Setting up local APIC...
614 03:27:43.853737 apic_id: 0x07 done.
615 03:27:43.857302 Setting up local APIC...
616 03:27:43.857397 apic_id: 0x01 done.
617 03:27:43.860488 VMX status: enabled
618 03:27:43.863907 apic_id: 0x05 done.
619 03:27:43.864003 apic_id: 0x06 done.
620 03:27:43.867484 VMX status: enabled
621 03:27:43.870517 VMX status: enabled
622 03:27:43.874116 IA32_FEATURE_CONTROL status: locked
623 03:27:43.876920 IA32_FEATURE_CONTROL status: locked
624 03:27:43.877016 Skip microcode update
625 03:27:43.880225 Skip microcode update
626 03:27:43.883683 CPU #7 initialized
627 03:27:43.883778 CPU #6 initialized
628 03:27:43.886872 IA32_FEATURE_CONTROL status: locked
629 03:27:43.890293 VMX status: enabled
630 03:27:43.893399 Skip microcode update
631 03:27:43.896867 IA32_FEATURE_CONTROL status: locked
632 03:27:43.896963 CPU #2 initialized
633 03:27:43.900278 Skip microcode update
634 03:27:43.903328 VMX status: enabled
635 03:27:43.903423 CPU #5 initialized
636 03:27:43.906870 IA32_FEATURE_CONTROL status: locked
637 03:27:43.910248 Skip microcode update
638 03:27:43.913288 CPU #3 initialized
639 03:27:43.916672 bsp_do_flight_plan done after 466 msecs.
640 03:27:43.920032 CPU: frequency set to 4200 MHz
641 03:27:43.920128 Enabling SMIs.
642 03:27:43.923149 Locking SMM.
643 03:27:43.936726 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
644 03:27:43.940686 CBFS @ c08000 size 3f8000
645 03:27:43.947244 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
646 03:27:43.947342 CBFS: Locating 'vbt.bin'
647 03:27:43.950278 CBFS: Found @ offset 5f5c0 size 499
648 03:27:43.956875 Found a VBT of 4608 bytes after decompression
649 03:27:44.140516 Display FSP Version Info HOB
650 03:27:44.143966 Reference Code - CPU = 9.0.1e.30
651 03:27:44.147448 uCode Version = 0.0.0.ca
652 03:27:44.150948 TXT ACM version = ff.ff.ff.ffff
653 03:27:44.153840 Display FSP Version Info HOB
654 03:27:44.157019 Reference Code - ME = 9.0.1e.30
655 03:27:44.160843 MEBx version = 0.0.0.0
656 03:27:44.163802 ME Firmware Version = Consumer SKU
657 03:27:44.167274 Display FSP Version Info HOB
658 03:27:44.170640 Reference Code - CML PCH = 9.0.1e.30
659 03:27:44.173618 PCH-CRID Status = Disabled
660 03:27:44.176968 PCH-CRID Original Value = ff.ff.ff.ffff
661 03:27:44.180363 PCH-CRID New Value = ff.ff.ff.ffff
662 03:27:44.183632 OPROM - RST - RAID = ff.ff.ff.ffff
663 03:27:44.187035 ChipsetInit Base Version = ff.ff.ff.ffff
664 03:27:44.190546 ChipsetInit Oem Version = ff.ff.ff.ffff
665 03:27:44.193710 Display FSP Version Info HOB
666 03:27:44.200576 Reference Code - SA - System Agent = 9.0.1e.30
667 03:27:44.203387 Reference Code - MRC = 0.7.1.6c
668 03:27:44.203485 SA - PCIe Version = 9.0.1e.30
669 03:27:44.206925 SA-CRID Status = Disabled
670 03:27:44.210459 SA-CRID Original Value = 0.0.0.c
671 03:27:44.214001 SA-CRID New Value = 0.0.0.c
672 03:27:44.216823 OPROM - VBIOS = ff.ff.ff.ffff
673 03:27:44.220088 RTC Init
674 03:27:44.223444 Set power on after power failure.
675 03:27:44.223547 Disabling Deep S3
676 03:27:44.226687 Disabling Deep S3
677 03:27:44.226787 Disabling Deep S4
678 03:27:44.229764 Disabling Deep S4
679 03:27:44.233229 Disabling Deep S5
680 03:27:44.233328 Disabling Deep S5
681 03:27:44.239678 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
682 03:27:44.239791 Enumerating buses...
683 03:27:44.246223 Show all devs... Before device enumeration.
684 03:27:44.249644 Root Device: enabled 1
685 03:27:44.249741 CPU_CLUSTER: 0: enabled 1
686 03:27:44.252961 DOMAIN: 0000: enabled 1
687 03:27:44.256469 APIC: 00: enabled 1
688 03:27:44.256565 PCI: 00:00.0: enabled 1
689 03:27:44.259747 PCI: 00:02.0: enabled 1
690 03:27:44.263062 PCI: 00:04.0: enabled 0
691 03:27:44.266638 PCI: 00:05.0: enabled 0
692 03:27:44.266735 PCI: 00:12.0: enabled 1
693 03:27:44.269524 PCI: 00:12.5: enabled 0
694 03:27:44.272920 PCI: 00:12.6: enabled 0
695 03:27:44.276233 PCI: 00:14.0: enabled 1
696 03:27:44.276331 PCI: 00:14.1: enabled 0
697 03:27:44.279412 PCI: 00:14.3: enabled 1
698 03:27:44.282867 PCI: 00:14.5: enabled 0
699 03:27:44.282964 PCI: 00:15.0: enabled 1
700 03:27:44.286276 PCI: 00:15.1: enabled 1
701 03:27:44.289656 PCI: 00:15.2: enabled 0
702 03:27:44.292959 PCI: 00:15.3: enabled 0
703 03:27:44.293055 PCI: 00:16.0: enabled 1
704 03:27:44.295948 PCI: 00:16.1: enabled 0
705 03:27:44.299202 PCI: 00:16.2: enabled 0
706 03:27:44.302505 PCI: 00:16.3: enabled 0
707 03:27:44.302601 PCI: 00:16.4: enabled 0
708 03:27:44.305809 PCI: 00:16.5: enabled 0
709 03:27:44.309311 PCI: 00:17.0: enabled 1
710 03:27:44.312760 PCI: 00:19.0: enabled 1
711 03:27:44.312861 PCI: 00:19.1: enabled 0
712 03:27:44.316112 PCI: 00:19.2: enabled 0
713 03:27:44.319528 PCI: 00:1a.0: enabled 0
714 03:27:44.319623 PCI: 00:1c.0: enabled 0
715 03:27:44.322981 PCI: 00:1c.1: enabled 0
716 03:27:44.325865 PCI: 00:1c.2: enabled 0
717 03:27:44.329395 PCI: 00:1c.3: enabled 0
718 03:27:44.329499 PCI: 00:1c.4: enabled 0
719 03:27:44.332803 PCI: 00:1c.5: enabled 0
720 03:27:44.335723 PCI: 00:1c.6: enabled 0
721 03:27:44.339257 PCI: 00:1c.7: enabled 0
722 03:27:44.339381 PCI: 00:1d.0: enabled 1
723 03:27:44.342406 PCI: 00:1d.1: enabled 0
724 03:27:44.346049 PCI: 00:1d.2: enabled 0
725 03:27:44.349299 PCI: 00:1d.3: enabled 0
726 03:27:44.349452 PCI: 00:1d.4: enabled 0
727 03:27:44.352891 PCI: 00:1d.5: enabled 1
728 03:27:44.355851 PCI: 00:1e.0: enabled 1
729 03:27:44.359450 PCI: 00:1e.1: enabled 0
730 03:27:44.359892 PCI: 00:1e.2: enabled 1
731 03:27:44.362485 PCI: 00:1e.3: enabled 1
732 03:27:44.366303 PCI: 00:1f.0: enabled 1
733 03:27:44.366749 PCI: 00:1f.1: enabled 1
734 03:27:44.369475 PCI: 00:1f.2: enabled 1
735 03:27:44.372484 PCI: 00:1f.3: enabled 1
736 03:27:44.376096 PCI: 00:1f.4: enabled 1
737 03:27:44.376558 PCI: 00:1f.5: enabled 1
738 03:27:44.379361 PCI: 00:1f.6: enabled 0
739 03:27:44.382214 USB0 port 0: enabled 1
740 03:27:44.385507 I2C: 00:15: enabled 1
741 03:27:44.385913 I2C: 00:5d: enabled 1
742 03:27:44.389165 GENERIC: 0.0: enabled 1
743 03:27:44.392571 I2C: 00:1a: enabled 1
744 03:27:44.393053 I2C: 00:38: enabled 1
745 03:27:44.395631 I2C: 00:39: enabled 1
746 03:27:44.398895 I2C: 00:3a: enabled 1
747 03:27:44.399385 I2C: 00:3b: enabled 1
748 03:27:44.402753 PCI: 00:00.0: enabled 1
749 03:27:44.405724 SPI: 00: enabled 1
750 03:27:44.406204 SPI: 01: enabled 1
751 03:27:44.408694 PNP: 0c09.0: enabled 1
752 03:27:44.412096 USB2 port 0: enabled 1
753 03:27:44.412537 USB2 port 1: enabled 1
754 03:27:44.415594 USB2 port 2: enabled 0
755 03:27:44.418952 USB2 port 3: enabled 0
756 03:27:44.419393 USB2 port 5: enabled 0
757 03:27:44.422348 USB2 port 6: enabled 1
758 03:27:44.425669 USB2 port 9: enabled 1
759 03:27:44.428685 USB3 port 0: enabled 1
760 03:27:44.429154 USB3 port 1: enabled 1
761 03:27:44.432245 USB3 port 2: enabled 1
762 03:27:44.435602 USB3 port 3: enabled 1
763 03:27:44.436039 USB3 port 4: enabled 0
764 03:27:44.438849 APIC: 03: enabled 1
765 03:27:44.442454 APIC: 04: enabled 1
766 03:27:44.442892 APIC: 01: enabled 1
767 03:27:44.445471 APIC: 02: enabled 1
768 03:27:44.445930 APIC: 05: enabled 1
769 03:27:44.448933 APIC: 06: enabled 1
770 03:27:44.451985 APIC: 07: enabled 1
771 03:27:44.452421 Compare with tree...
772 03:27:44.455407 Root Device: enabled 1
773 03:27:44.458834 CPU_CLUSTER: 0: enabled 1
774 03:27:44.461867 APIC: 00: enabled 1
775 03:27:44.462305 APIC: 03: enabled 1
776 03:27:44.465533 APIC: 04: enabled 1
777 03:27:44.468942 APIC: 01: enabled 1
778 03:27:44.469424 APIC: 02: enabled 1
779 03:27:44.471755 APIC: 05: enabled 1
780 03:27:44.475136 APIC: 06: enabled 1
781 03:27:44.475576 APIC: 07: enabled 1
782 03:27:44.478666 DOMAIN: 0000: enabled 1
783 03:27:44.481809 PCI: 00:00.0: enabled 1
784 03:27:44.485448 PCI: 00:02.0: enabled 1
785 03:27:44.485930 PCI: 00:04.0: enabled 0
786 03:27:44.488338 PCI: 00:05.0: enabled 0
787 03:27:44.491878 PCI: 00:12.0: enabled 1
788 03:27:44.494782 PCI: 00:12.5: enabled 0
789 03:27:44.498598 PCI: 00:12.6: enabled 0
790 03:27:44.499044 PCI: 00:14.0: enabled 1
791 03:27:44.501458 USB0 port 0: enabled 1
792 03:27:44.505338 USB2 port 0: enabled 1
793 03:27:44.508487 USB2 port 1: enabled 1
794 03:27:44.511486 USB2 port 2: enabled 0
795 03:27:44.514880 USB2 port 3: enabled 0
796 03:27:44.515373 USB2 port 5: enabled 0
797 03:27:44.518392 USB2 port 6: enabled 1
798 03:27:44.521589 USB2 port 9: enabled 1
799 03:27:44.525032 USB3 port 0: enabled 1
800 03:27:44.528414 USB3 port 1: enabled 1
801 03:27:44.528831 USB3 port 2: enabled 1
802 03:27:44.531640 USB3 port 3: enabled 1
803 03:27:44.534672 USB3 port 4: enabled 0
804 03:27:44.538100 PCI: 00:14.1: enabled 0
805 03:27:44.541624 PCI: 00:14.3: enabled 1
806 03:27:44.542112 PCI: 00:14.5: enabled 0
807 03:27:44.544554 PCI: 00:15.0: enabled 1
808 03:27:44.548207 I2C: 00:15: enabled 1
809 03:27:44.551470 PCI: 00:15.1: enabled 1
810 03:27:44.554569 I2C: 00:5d: enabled 1
811 03:27:44.555029 GENERIC: 0.0: enabled 1
812 03:27:44.558363 PCI: 00:15.2: enabled 0
813 03:27:44.561580 PCI: 00:15.3: enabled 0
814 03:27:44.565043 PCI: 00:16.0: enabled 1
815 03:27:44.568069 PCI: 00:16.1: enabled 0
816 03:27:44.568547 PCI: 00:16.2: enabled 0
817 03:27:44.571414 PCI: 00:16.3: enabled 0
818 03:27:44.574464 PCI: 00:16.4: enabled 0
819 03:27:44.577932 PCI: 00:16.5: enabled 0
820 03:27:44.581126 PCI: 00:17.0: enabled 1
821 03:27:44.581612 PCI: 00:19.0: enabled 1
822 03:27:44.584880 I2C: 00:1a: enabled 1
823 03:27:44.587854 I2C: 00:38: enabled 1
824 03:27:44.591155 I2C: 00:39: enabled 1
825 03:27:44.591620 I2C: 00:3a: enabled 1
826 03:27:44.594487 I2C: 00:3b: enabled 1
827 03:27:44.597906 PCI: 00:19.1: enabled 0
828 03:27:44.600910 PCI: 00:19.2: enabled 0
829 03:27:44.604355 PCI: 00:1a.0: enabled 0
830 03:27:44.604791 PCI: 00:1c.0: enabled 0
831 03:27:44.607749 PCI: 00:1c.1: enabled 0
832 03:27:44.610994 PCI: 00:1c.2: enabled 0
833 03:27:44.614637 PCI: 00:1c.3: enabled 0
834 03:27:44.615077 PCI: 00:1c.4: enabled 0
835 03:27:44.617988 PCI: 00:1c.5: enabled 0
836 03:27:44.621117 PCI: 00:1c.6: enabled 0
837 03:27:44.624241 PCI: 00:1c.7: enabled 0
838 03:27:44.627631 PCI: 00:1d.0: enabled 1
839 03:27:44.628071 PCI: 00:1d.1: enabled 0
840 03:27:44.631180 PCI: 00:1d.2: enabled 0
841 03:27:44.634430 PCI: 00:1d.3: enabled 0
842 03:27:44.637670 PCI: 00:1d.4: enabled 0
843 03:27:44.640780 PCI: 00:1d.5: enabled 1
844 03:27:44.641367 PCI: 00:00.0: enabled 1
845 03:27:44.644352 PCI: 00:1e.0: enabled 1
846 03:27:44.647483 PCI: 00:1e.1: enabled 0
847 03:27:44.650778 PCI: 00:1e.2: enabled 1
848 03:27:44.651219 SPI: 00: enabled 1
849 03:27:44.654445 PCI: 00:1e.3: enabled 1
850 03:27:44.657519 SPI: 01: enabled 1
851 03:27:44.661096 PCI: 00:1f.0: enabled 1
852 03:27:44.664182 PNP: 0c09.0: enabled 1
853 03:27:44.664629 PCI: 00:1f.1: enabled 1
854 03:27:44.667115 PCI: 00:1f.2: enabled 1
855 03:27:44.670787 PCI: 00:1f.3: enabled 1
856 03:27:44.673746 PCI: 00:1f.4: enabled 1
857 03:27:44.677603 PCI: 00:1f.5: enabled 1
858 03:27:44.678051 PCI: 00:1f.6: enabled 0
859 03:27:44.680536 Root Device scanning...
860 03:27:44.683958 scan_static_bus for Root Device
861 03:27:44.687100 CPU_CLUSTER: 0 enabled
862 03:27:44.687543 DOMAIN: 0000 enabled
863 03:27:44.690375 DOMAIN: 0000 scanning...
864 03:27:44.693819 PCI: pci_scan_bus for bus 00
865 03:27:44.697189 PCI: 00:00.0 [8086/0000] ops
866 03:27:44.700570 PCI: 00:00.0 [8086/9b61] enabled
867 03:27:44.703944 PCI: 00:02.0 [8086/0000] bus ops
868 03:27:44.707152 PCI: 00:02.0 [8086/9b41] enabled
869 03:27:44.710915 PCI: 00:04.0 [8086/1903] disabled
870 03:27:44.714134 PCI: 00:08.0 [8086/1911] enabled
871 03:27:44.717247 PCI: 00:12.0 [8086/02f9] enabled
872 03:27:44.720537 PCI: 00:14.0 [8086/0000] bus ops
873 03:27:44.723563 PCI: 00:14.0 [8086/02ed] enabled
874 03:27:44.727044 PCI: 00:14.2 [8086/02ef] enabled
875 03:27:44.730090 PCI: 00:14.3 [8086/02f0] enabled
876 03:27:44.733577 PCI: 00:15.0 [8086/0000] bus ops
877 03:27:44.737031 PCI: 00:15.0 [8086/02e8] enabled
878 03:27:44.740391 PCI: 00:15.1 [8086/0000] bus ops
879 03:27:44.743414 PCI: 00:15.1 [8086/02e9] enabled
880 03:27:44.746974 PCI: 00:16.0 [8086/0000] ops
881 03:27:44.750484 PCI: 00:16.0 [8086/02e0] enabled
882 03:27:44.753358 PCI: 00:17.0 [8086/0000] ops
883 03:27:44.757331 PCI: 00:17.0 [8086/02d3] enabled
884 03:27:44.759883 PCI: 00:19.0 [8086/0000] bus ops
885 03:27:44.763604 PCI: 00:19.0 [8086/02c5] enabled
886 03:27:44.766962 PCI: 00:1d.0 [8086/0000] bus ops
887 03:27:44.770533 PCI: 00:1d.0 [8086/02b0] enabled
888 03:27:44.776424 PCI: Static device PCI: 00:1d.5 not found, disabling it.
889 03:27:44.779728 PCI: 00:1e.0 [8086/0000] ops
890 03:27:44.783111 PCI: 00:1e.0 [8086/02a8] enabled
891 03:27:44.786426 PCI: 00:1e.2 [8086/0000] bus ops
892 03:27:44.789800 PCI: 00:1e.2 [8086/02aa] enabled
893 03:27:44.792952 PCI: 00:1e.3 [8086/0000] bus ops
894 03:27:44.796528 PCI: 00:1e.3 [8086/02ab] enabled
895 03:27:44.799832 PCI: 00:1f.0 [8086/0000] bus ops
896 03:27:44.802966 PCI: 00:1f.0 [8086/0284] enabled
897 03:27:44.806063 PCI: Static device PCI: 00:1f.1 not found, disabling it.
898 03:27:44.812993 PCI: Static device PCI: 00:1f.2 not found, disabling it.
899 03:27:44.816485 PCI: 00:1f.3 [8086/0000] bus ops
900 03:27:44.819315 PCI: 00:1f.3 [8086/02c8] enabled
901 03:27:44.822926 PCI: 00:1f.4 [8086/0000] bus ops
902 03:27:44.826454 PCI: 00:1f.4 [8086/02a3] enabled
903 03:27:44.829231 PCI: 00:1f.5 [8086/0000] bus ops
904 03:27:44.832738 PCI: 00:1f.5 [8086/02a4] enabled
905 03:27:44.836264 PCI: Leftover static devices:
906 03:27:44.836361 PCI: 00:05.0
907 03:27:44.839471 PCI: 00:12.5
908 03:27:44.839568 PCI: 00:12.6
909 03:27:44.842491 PCI: 00:14.1
910 03:27:44.842587 PCI: 00:14.5
911 03:27:44.842662 PCI: 00:15.2
912 03:27:44.845928 PCI: 00:15.3
913 03:27:44.846024 PCI: 00:16.1
914 03:27:44.849381 PCI: 00:16.2
915 03:27:44.849477 PCI: 00:16.3
916 03:27:44.849552 PCI: 00:16.4
917 03:27:44.852777 PCI: 00:16.5
918 03:27:44.852874 PCI: 00:19.1
919 03:27:44.855898 PCI: 00:19.2
920 03:27:44.855995 PCI: 00:1a.0
921 03:27:44.859572 PCI: 00:1c.0
922 03:27:44.859669 PCI: 00:1c.1
923 03:27:44.859744 PCI: 00:1c.2
924 03:27:44.862907 PCI: 00:1c.3
925 03:27:44.863004 PCI: 00:1c.4
926 03:27:44.866235 PCI: 00:1c.5
927 03:27:44.866332 PCI: 00:1c.6
928 03:27:44.866406 PCI: 00:1c.7
929 03:27:44.869193 PCI: 00:1d.1
930 03:27:44.869289 PCI: 00:1d.2
931 03:27:44.872461 PCI: 00:1d.3
932 03:27:44.872557 PCI: 00:1d.4
933 03:27:44.872632 PCI: 00:1d.5
934 03:27:44.876027 PCI: 00:1e.1
935 03:27:44.876123 PCI: 00:1f.1
936 03:27:44.879059 PCI: 00:1f.2
937 03:27:44.879155 PCI: 00:1f.6
938 03:27:44.882305 PCI: Check your devicetree.cb.
939 03:27:44.885597 PCI: 00:02.0 scanning...
940 03:27:44.888993 scan_generic_bus for PCI: 00:02.0
941 03:27:44.892532 scan_generic_bus for PCI: 00:02.0 done
942 03:27:44.899277 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
943 03:27:44.902110 PCI: 00:14.0 scanning...
944 03:27:44.905360 scan_static_bus for PCI: 00:14.0
945 03:27:44.905455 USB0 port 0 enabled
946 03:27:44.908821 USB0 port 0 scanning...
947 03:27:44.912804 scan_static_bus for USB0 port 0
948 03:27:44.915575 USB2 port 0 enabled
949 03:27:44.915662 USB2 port 1 enabled
950 03:27:44.919024 USB2 port 2 disabled
951 03:27:44.921948 USB2 port 3 disabled
952 03:27:44.922034 USB2 port 5 disabled
953 03:27:44.925571 USB2 port 6 enabled
954 03:27:44.925654 USB2 port 9 enabled
955 03:27:44.928561 USB3 port 0 enabled
956 03:27:44.932222 USB3 port 1 enabled
957 03:27:44.932308 USB3 port 2 enabled
958 03:27:44.935181 USB3 port 3 enabled
959 03:27:44.938590 USB3 port 4 disabled
960 03:27:44.938677 USB2 port 0 scanning...
961 03:27:44.942193 scan_static_bus for USB2 port 0
962 03:27:44.945241 scan_static_bus for USB2 port 0 done
963 03:27:44.951861 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
964 03:27:44.955352 USB2 port 1 scanning...
965 03:27:44.958509 scan_static_bus for USB2 port 1
966 03:27:44.961990 scan_static_bus for USB2 port 1 done
967 03:27:44.968341 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
968 03:27:44.968427 USB2 port 6 scanning...
969 03:27:44.971785 scan_static_bus for USB2 port 6
970 03:27:44.978495 scan_static_bus for USB2 port 6 done
971 03:27:44.981912 scan_bus: scanning of bus USB2 port 6 took 9713 usecs
972 03:27:44.985332 USB2 port 9 scanning...
973 03:27:44.988629 scan_static_bus for USB2 port 9
974 03:27:44.991887 scan_static_bus for USB2 port 9 done
975 03:27:44.998612 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
976 03:27:44.998703 USB3 port 0 scanning...
977 03:27:45.001687 scan_static_bus for USB3 port 0
978 03:27:45.008430 scan_static_bus for USB3 port 0 done
979 03:27:45.012157 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
980 03:27:45.014851 USB3 port 1 scanning...
981 03:27:45.018495 scan_static_bus for USB3 port 1
982 03:27:45.021984 scan_static_bus for USB3 port 1 done
983 03:27:45.028269 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
984 03:27:45.028368 USB3 port 2 scanning...
985 03:27:45.031748 scan_static_bus for USB3 port 2
986 03:27:45.038797 scan_static_bus for USB3 port 2 done
987 03:27:45.041750 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
988 03:27:45.044858 USB3 port 3 scanning...
989 03:27:45.048738 scan_static_bus for USB3 port 3
990 03:27:45.051646 scan_static_bus for USB3 port 3 done
991 03:27:45.058085 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
992 03:27:45.061531 scan_static_bus for USB0 port 0 done
993 03:27:45.068402 scan_bus: scanning of bus USB0 port 0 took 155387 usecs
994 03:27:45.071600 scan_static_bus for PCI: 00:14.0 done
995 03:27:45.074820 scan_bus: scanning of bus PCI: 00:14.0 took 173006 usecs
996 03:27:45.077966 PCI: 00:15.0 scanning...
997 03:27:45.081476 scan_generic_bus for PCI: 00:15.0
998 03:27:45.084495 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
999 03:27:45.091320 scan_generic_bus for PCI: 00:15.0 done
1000 03:27:45.094541 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
1001 03:27:45.097697 PCI: 00:15.1 scanning...
1002 03:27:45.101241 scan_generic_bus for PCI: 00:15.1
1003 03:27:45.104604 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1004 03:27:45.111088 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1005 03:27:45.114512 scan_generic_bus for PCI: 00:15.1 done
1006 03:27:45.120936 scan_bus: scanning of bus PCI: 00:15.1 took 18596 usecs
1007 03:27:45.121034 PCI: 00:19.0 scanning...
1008 03:27:45.124633 scan_generic_bus for PCI: 00:19.0
1009 03:27:45.131112 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1010 03:27:45.134546 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1011 03:27:45.137914 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1012 03:27:45.141287 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1013 03:27:45.147573 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1014 03:27:45.150969 scan_generic_bus for PCI: 00:19.0 done
1015 03:27:45.158025 scan_bus: scanning of bus PCI: 00:19.0 took 30739 usecs
1016 03:27:45.158125 PCI: 00:1d.0 scanning...
1017 03:27:45.161174 do_pci_scan_bridge for PCI: 00:1d.0
1018 03:27:45.164144 PCI: pci_scan_bus for bus 01
1019 03:27:45.167749 PCI: 01:00.0 [1c5c/1327] enabled
1020 03:27:45.174279 Enabling Common Clock Configuration
1021 03:27:45.177420 L1 Sub-State supported from root port 29
1022 03:27:45.180530 L1 Sub-State Support = 0xf
1023 03:27:45.180627 CommonModeRestoreTime = 0x28
1024 03:27:45.187543 Power On Value = 0x16, Power On Scale = 0x0
1025 03:27:45.187640 ASPM: Enabled L1
1026 03:27:45.194212 scan_bus: scanning of bus PCI: 00:1d.0 took 32764 usecs
1027 03:27:45.197385 PCI: 00:1e.2 scanning...
1028 03:27:45.200786 scan_generic_bus for PCI: 00:1e.2
1029 03:27:45.204203 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1030 03:27:45.207388 scan_generic_bus for PCI: 00:1e.2 done
1031 03:27:45.214288 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1032 03:27:45.217495 PCI: 00:1e.3 scanning...
1033 03:27:45.220536 scan_generic_bus for PCI: 00:1e.3
1034 03:27:45.223665 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1035 03:27:45.227308 scan_generic_bus for PCI: 00:1e.3 done
1036 03:27:45.233988 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1037 03:27:45.237036 PCI: 00:1f.0 scanning...
1038 03:27:45.240418 scan_static_bus for PCI: 00:1f.0
1039 03:27:45.240515 PNP: 0c09.0 enabled
1040 03:27:45.243635 scan_static_bus for PCI: 00:1f.0 done
1041 03:27:45.250325 scan_bus: scanning of bus PCI: 00:1f.0 took 12038 usecs
1042 03:27:45.253846 PCI: 00:1f.3 scanning...
1043 03:27:45.260293 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1044 03:27:45.260396 PCI: 00:1f.4 scanning...
1045 03:27:45.263614 scan_generic_bus for PCI: 00:1f.4
1046 03:27:45.270050 scan_generic_bus for PCI: 00:1f.4 done
1047 03:27:45.273315 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1048 03:27:45.276675 PCI: 00:1f.5 scanning...
1049 03:27:45.280575 scan_generic_bus for PCI: 00:1f.5
1050 03:27:45.283710 scan_generic_bus for PCI: 00:1f.5 done
1051 03:27:45.290263 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1052 03:27:45.296792 scan_bus: scanning of bus DOMAIN: 0000 took 604939 usecs
1053 03:27:45.300308 scan_static_bus for Root Device done
1054 03:27:45.307014 scan_bus: scanning of bus Root Device took 624863 usecs
1055 03:27:45.307112 done
1056 03:27:45.309951 Chrome EC: UHEPI supported
1057 03:27:45.316638 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1058 03:27:45.320085 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1059 03:27:45.326603 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1060 03:27:45.333180 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1061 03:27:45.336592 SPI flash protection: WPSW=0 SRP0=0
1062 03:27:45.342987 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1063 03:27:45.346545 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1064 03:27:45.349796 found VGA at PCI: 00:02.0
1065 03:27:45.353308 Setting up VGA for PCI: 00:02.0
1066 03:27:45.359682 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1067 03:27:45.363340 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1068 03:27:45.366603 Allocating resources...
1069 03:27:45.369708 Reading resources...
1070 03:27:45.372928 Root Device read_resources bus 0 link: 0
1071 03:27:45.376723 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1072 03:27:45.382806 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1073 03:27:45.386444 DOMAIN: 0000 read_resources bus 0 link: 0
1074 03:27:45.393574 PCI: 00:14.0 read_resources bus 0 link: 0
1075 03:27:45.397224 USB0 port 0 read_resources bus 0 link: 0
1076 03:27:45.405401 USB0 port 0 read_resources bus 0 link: 0 done
1077 03:27:45.408220 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 03:27:45.415982 PCI: 00:15.0 read_resources bus 1 link: 0
1079 03:27:45.418979 PCI: 00:15.0 read_resources bus 1 link: 0 done
1080 03:27:45.425594 PCI: 00:15.1 read_resources bus 2 link: 0
1081 03:27:45.429047 PCI: 00:15.1 read_resources bus 2 link: 0 done
1082 03:27:45.436062 PCI: 00:19.0 read_resources bus 3 link: 0
1083 03:27:45.442569 PCI: 00:19.0 read_resources bus 3 link: 0 done
1084 03:27:45.446035 PCI: 00:1d.0 read_resources bus 1 link: 0
1085 03:27:45.453082 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1086 03:27:45.456059 PCI: 00:1e.2 read_resources bus 4 link: 0
1087 03:27:45.462596 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1088 03:27:45.466068 PCI: 00:1e.3 read_resources bus 5 link: 0
1089 03:27:45.472497 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1090 03:27:45.476131 PCI: 00:1f.0 read_resources bus 0 link: 0
1091 03:27:45.482704 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1092 03:27:45.489181 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 03:27:45.492514 Root Device read_resources bus 0 link: 0 done
1094 03:27:45.495987 Done reading resources.
1095 03:27:45.502285 Show resources in subtree (Root Device)...After reading.
1096 03:27:45.505592 Root Device child on link 0 CPU_CLUSTER: 0
1097 03:27:45.508908 CPU_CLUSTER: 0 child on link 0 APIC: 00
1098 03:27:45.512263 APIC: 00
1099 03:27:45.512359 APIC: 03
1100 03:27:45.512433 APIC: 04
1101 03:27:45.515692 APIC: 01
1102 03:27:45.515787 APIC: 02
1103 03:27:45.515861 APIC: 05
1104 03:27:45.519282 APIC: 06
1105 03:27:45.519378 APIC: 07
1106 03:27:45.525324 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1107 03:27:45.532360 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1108 03:27:45.582170 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1109 03:27:45.582277 PCI: 00:00.0
1110 03:27:45.582551 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1111 03:27:45.582628 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1112 03:27:45.582893 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1113 03:27:45.583496 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1114 03:27:45.631606 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1115 03:27:45.631909 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1116 03:27:45.632501 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1117 03:27:45.632803 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1118 03:27:45.633682 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1119 03:27:45.650057 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1120 03:27:45.650956 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1121 03:27:45.657057 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1122 03:27:45.666890 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1123 03:27:45.677071 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1124 03:27:45.686498 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1125 03:27:45.693239 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1126 03:27:45.696697 PCI: 00:02.0
1127 03:27:45.706374 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1128 03:27:45.716585 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1129 03:27:45.726373 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1130 03:27:45.726473 PCI: 00:04.0
1131 03:27:45.729712 PCI: 00:08.0
1132 03:27:45.739446 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 03:27:45.739544 PCI: 00:12.0
1134 03:27:45.749836 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 03:27:45.753003 PCI: 00:14.0 child on link 0 USB0 port 0
1136 03:27:45.762759 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1137 03:27:45.769272 USB0 port 0 child on link 0 USB2 port 0
1138 03:27:45.769369 USB2 port 0
1139 03:27:45.772594 USB2 port 1
1140 03:27:45.772698 USB2 port 2
1141 03:27:45.775733 USB2 port 3
1142 03:27:45.775830 USB2 port 5
1143 03:27:45.779572 USB2 port 6
1144 03:27:45.782591 USB2 port 9
1145 03:27:45.782688 USB3 port 0
1146 03:27:45.785932 USB3 port 1
1147 03:27:45.786030 USB3 port 2
1148 03:27:45.789424 USB3 port 3
1149 03:27:45.789520 USB3 port 4
1150 03:27:45.792765 PCI: 00:14.2
1151 03:27:45.802416 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1152 03:27:45.812764 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1153 03:27:45.812863 PCI: 00:14.3
1154 03:27:45.822584 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1155 03:27:45.825614 PCI: 00:15.0 child on link 0 I2C: 01:15
1156 03:27:45.835390 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 03:27:45.838690 I2C: 01:15
1158 03:27:45.842235 PCI: 00:15.1 child on link 0 I2C: 02:5d
1159 03:27:45.851971 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 03:27:45.855374 I2C: 02:5d
1161 03:27:45.855471 GENERIC: 0.0
1162 03:27:45.858725 PCI: 00:16.0
1163 03:27:45.868450 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:27:45.868548 PCI: 00:17.0
1165 03:27:45.878651 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1166 03:27:45.888640 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1167 03:27:45.895437 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1168 03:27:45.905091 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1169 03:27:45.911488 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1170 03:27:45.921466 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1171 03:27:45.925005 PCI: 00:19.0 child on link 0 I2C: 03:1a
1172 03:27:45.934768 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 03:27:45.937958 I2C: 03:1a
1174 03:27:45.938054 I2C: 03:38
1175 03:27:45.941690 I2C: 03:39
1176 03:27:45.941786 I2C: 03:3a
1177 03:27:45.944509 I2C: 03:3b
1178 03:27:45.948083 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1179 03:27:45.958151 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1180 03:27:45.967729 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1181 03:27:45.974806 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1182 03:27:45.978198 PCI: 01:00.0
1183 03:27:45.987922 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1184 03:27:45.988064 PCI: 00:1e.0
1185 03:27:46.001010 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1186 03:27:46.011031 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1187 03:27:46.014347 PCI: 00:1e.2 child on link 0 SPI: 00
1188 03:27:46.024391 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 03:27:46.024551 SPI: 00
1190 03:27:46.027952 PCI: 00:1e.3 child on link 0 SPI: 01
1191 03:27:46.037549 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 03:27:46.040912 SPI: 01
1193 03:27:46.044303 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1194 03:27:46.054513 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1195 03:27:46.061153 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1196 03:27:46.064321 PNP: 0c09.0
1197 03:27:46.074048 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1198 03:27:46.074494 PCI: 00:1f.3
1199 03:27:46.084042 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1200 03:27:46.094314 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1201 03:27:46.097116 PCI: 00:1f.4
1202 03:27:46.104005 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1203 03:27:46.113642 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1204 03:27:46.117330 PCI: 00:1f.5
1205 03:27:46.127122 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1206 03:27:46.133851 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1207 03:27:46.136792 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1208 03:27:46.147218 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1209 03:27:46.150030 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1210 03:27:46.153545 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1211 03:27:46.156937 PCI: 00:17.0 18 * [0x60 - 0x67] io
1212 03:27:46.160294 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1213 03:27:46.167248 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1214 03:27:46.173547 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1215 03:27:46.180058 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1216 03:27:46.190132 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1217 03:27:46.196415 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1218 03:27:46.199727 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1219 03:27:46.209620 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1220 03:27:46.213166 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1221 03:27:46.216303 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1222 03:27:46.223175 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1223 03:27:46.226496 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1224 03:27:46.232775 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1225 03:27:46.236522 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1226 03:27:46.242875 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1227 03:27:46.246258 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1228 03:27:46.252708 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1229 03:27:46.256053 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1230 03:27:46.262420 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1231 03:27:46.265718 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1232 03:27:46.272531 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1233 03:27:46.275954 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1234 03:27:46.279600 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1235 03:27:46.286009 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1236 03:27:46.288947 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1237 03:27:46.295979 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1238 03:27:46.299202 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1239 03:27:46.305508 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1240 03:27:46.308956 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1241 03:27:46.315822 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1242 03:27:46.318861 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1243 03:27:46.329043 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1244 03:27:46.331924 avoid_fixed_resources: DOMAIN: 0000
1245 03:27:46.338952 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1246 03:27:46.341873 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1247 03:27:46.352147 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1248 03:27:46.358517 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1249 03:27:46.365438 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1250 03:27:46.375470 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1251 03:27:46.381846 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1252 03:27:46.388498 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 03:27:46.397887 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1254 03:27:46.404866 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1255 03:27:46.411286 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1256 03:27:46.417862 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1257 03:27:46.421861 Setting resources...
1258 03:27:46.428060 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1259 03:27:46.431374 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1260 03:27:46.434596 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1261 03:27:46.441111 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1262 03:27:46.444940 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1263 03:27:46.450995 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1264 03:27:46.454380 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1265 03:27:46.461495 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1266 03:27:46.470988 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1267 03:27:46.474482 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1268 03:27:46.480910 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1269 03:27:46.484565 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1270 03:27:46.490873 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1271 03:27:46.494185 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1272 03:27:46.500512 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1273 03:27:46.504399 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1274 03:27:46.510946 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1275 03:27:46.513836 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1276 03:27:46.520899 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1277 03:27:46.524198 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1278 03:27:46.527392 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1279 03:27:46.533754 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1280 03:27:46.537200 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1281 03:27:46.543702 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1282 03:27:46.547063 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1283 03:27:46.554173 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1284 03:27:46.557195 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1285 03:27:46.563804 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1286 03:27:46.567548 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1287 03:27:46.573716 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1288 03:27:46.576800 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1289 03:27:46.583264 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1290 03:27:46.590186 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1291 03:27:46.596703 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1292 03:27:46.603509 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1293 03:27:46.613328 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1294 03:27:46.616754 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1295 03:27:46.623398 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1296 03:27:46.629569 Root Device assign_resources, bus 0 link: 0
1297 03:27:46.633257 DOMAIN: 0000 assign_resources, bus 0 link: 0
1298 03:27:46.643345 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1299 03:27:46.649709 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1300 03:27:46.659560 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1301 03:27:46.666150 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1302 03:27:46.676067 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1303 03:27:46.682537 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1304 03:27:46.686009 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 03:27:46.693129 PCI: 00:14.0 assign_resources, bus 0 link: 0
1306 03:27:46.699338 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1307 03:27:46.708967 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1308 03:27:46.716049 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1309 03:27:46.725787 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1310 03:27:46.729229 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 03:27:46.735684 PCI: 00:15.0 assign_resources, bus 1 link: 0
1312 03:27:46.742234 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1313 03:27:46.745349 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 03:27:46.752302 PCI: 00:15.1 assign_resources, bus 2 link: 0
1315 03:27:46.759015 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1316 03:27:46.768965 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1317 03:27:46.775728 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1318 03:27:46.782276 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1319 03:27:46.791862 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1320 03:27:46.798830 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1321 03:27:46.804973 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1322 03:27:46.815183 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1323 03:27:46.818841 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 03:27:46.825172 PCI: 00:19.0 assign_resources, bus 3 link: 0
1325 03:27:46.831699 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1326 03:27:46.841636 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1327 03:27:46.851461 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1328 03:27:46.855289 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 03:27:46.861493 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1330 03:27:46.868312 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1331 03:27:46.874640 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1332 03:27:46.884668 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1333 03:27:46.888685 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 03:27:46.894718 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1335 03:27:46.901448 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1336 03:27:46.907978 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 03:27:46.910910 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1338 03:27:46.914110 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 03:27:46.921535 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1340 03:27:46.924891 LPC: Trying to open IO window from 800 size 1ff
1341 03:27:46.934777 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1342 03:27:46.941533 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1343 03:27:46.951507 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1344 03:27:46.957486 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1345 03:27:46.964657 DOMAIN: 0000 assign_resources, bus 0 link: 0
1346 03:27:46.968142 Root Device assign_resources, bus 0 link: 0
1347 03:27:46.971329 Done setting resources.
1348 03:27:46.977426 Show resources in subtree (Root Device)...After assigning values.
1349 03:27:46.980956 Root Device child on link 0 CPU_CLUSTER: 0
1350 03:27:46.984286 CPU_CLUSTER: 0 child on link 0 APIC: 00
1351 03:27:46.987268 APIC: 00
1352 03:27:46.987752 APIC: 03
1353 03:27:46.988149 APIC: 04
1354 03:27:46.991011 APIC: 01
1355 03:27:46.991449 APIC: 02
1356 03:27:46.993991 APIC: 05
1357 03:27:46.994553 APIC: 06
1358 03:27:46.994907 APIC: 07
1359 03:27:47.000802 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1360 03:27:47.010929 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1361 03:27:47.020876 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1362 03:27:47.021351 PCI: 00:00.0
1363 03:27:47.030376 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1364 03:27:47.040532 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1365 03:27:47.050280 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1366 03:27:47.060530 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1367 03:27:47.070477 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1368 03:27:47.080288 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1369 03:27:47.087056 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1370 03:27:47.096705 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1371 03:27:47.106684 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1372 03:27:47.116461 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1373 03:27:47.126361 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1374 03:27:47.133035 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1375 03:27:47.142812 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1376 03:27:47.152647 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1377 03:27:47.162950 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1378 03:27:47.172744 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1379 03:27:47.173414 PCI: 00:02.0
1380 03:27:47.185782 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1381 03:27:47.196188 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1382 03:27:47.205488 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1383 03:27:47.205950 PCI: 00:04.0
1384 03:27:47.208920 PCI: 00:08.0
1385 03:27:47.218829 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1386 03:27:47.219321 PCI: 00:12.0
1387 03:27:47.228784 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1388 03:27:47.235219 PCI: 00:14.0 child on link 0 USB0 port 0
1389 03:27:47.245577 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1390 03:27:47.248472 USB0 port 0 child on link 0 USB2 port 0
1391 03:27:47.251802 USB2 port 0
1392 03:27:47.252243 USB2 port 1
1393 03:27:47.255285 USB2 port 2
1394 03:27:47.255727 USB2 port 3
1395 03:27:47.258643 USB2 port 5
1396 03:27:47.259083 USB2 port 6
1397 03:27:47.262091 USB2 port 9
1398 03:27:47.262697 USB3 port 0
1399 03:27:47.265603 USB3 port 1
1400 03:27:47.266139 USB3 port 2
1401 03:27:47.268597 USB3 port 3
1402 03:27:47.271918 USB3 port 4
1403 03:27:47.272387 PCI: 00:14.2
1404 03:27:47.281401 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1405 03:27:47.291700 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1406 03:27:47.295262 PCI: 00:14.3
1407 03:27:47.304713 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1408 03:27:47.308025 PCI: 00:15.0 child on link 0 I2C: 01:15
1409 03:27:47.318078 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1410 03:27:47.321296 I2C: 01:15
1411 03:27:47.324669 PCI: 00:15.1 child on link 0 I2C: 02:5d
1412 03:27:47.334257 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1413 03:27:47.337717 I2C: 02:5d
1414 03:27:47.338185 GENERIC: 0.0
1415 03:27:47.340862 PCI: 00:16.0
1416 03:27:47.350957 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1417 03:27:47.351454 PCI: 00:17.0
1418 03:27:47.361536 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1419 03:27:47.374033 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1420 03:27:47.380731 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1421 03:27:47.390496 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1422 03:27:47.400456 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1423 03:27:47.410526 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1424 03:27:47.413650 PCI: 00:19.0 child on link 0 I2C: 03:1a
1425 03:27:47.423697 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1426 03:27:47.426792 I2C: 03:1a
1427 03:27:47.427233 I2C: 03:38
1428 03:27:47.430659 I2C: 03:39
1429 03:27:47.431201 I2C: 03:3a
1430 03:27:47.433291 I2C: 03:3b
1431 03:27:47.436840 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1432 03:27:47.446606 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1433 03:27:47.456814 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1434 03:27:47.466589 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1435 03:27:47.469787 PCI: 01:00.0
1436 03:27:47.479669 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1437 03:27:47.480120 PCI: 00:1e.0
1438 03:27:47.492814 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1439 03:27:47.502896 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1440 03:27:47.505942 PCI: 00:1e.2 child on link 0 SPI: 00
1441 03:27:47.516085 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1442 03:27:47.516608 SPI: 00
1443 03:27:47.522522 PCI: 00:1e.3 child on link 0 SPI: 01
1444 03:27:47.532680 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1445 03:27:47.533235 SPI: 01
1446 03:27:47.535588 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1447 03:27:47.545782 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1448 03:27:47.555447 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1449 03:27:47.555958 PNP: 0c09.0
1450 03:27:47.565611 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1451 03:27:47.566067 PCI: 00:1f.3
1452 03:27:47.575439 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1453 03:27:47.588825 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1454 03:27:47.589311 PCI: 00:1f.4
1455 03:27:47.598647 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1456 03:27:47.608548 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1457 03:27:47.609000 PCI: 00:1f.5
1458 03:27:47.621790 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1459 03:27:47.622245 Done allocating resources.
1460 03:27:47.628145 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1461 03:27:47.631455 Enabling resources...
1462 03:27:47.634740 PCI: 00:00.0 subsystem <- 8086/9b61
1463 03:27:47.637972 PCI: 00:00.0 cmd <- 06
1464 03:27:47.641639 PCI: 00:02.0 subsystem <- 8086/9b41
1465 03:27:47.644714 PCI: 00:02.0 cmd <- 03
1466 03:27:47.648362 PCI: 00:08.0 cmd <- 06
1467 03:27:47.651331 PCI: 00:12.0 subsystem <- 8086/02f9
1468 03:27:47.654601 PCI: 00:12.0 cmd <- 02
1469 03:27:47.657872 PCI: 00:14.0 subsystem <- 8086/02ed
1470 03:27:47.661452 PCI: 00:14.0 cmd <- 02
1471 03:27:47.661938 PCI: 00:14.2 cmd <- 02
1472 03:27:47.667606 PCI: 00:14.3 subsystem <- 8086/02f0
1473 03:27:47.668077 PCI: 00:14.3 cmd <- 02
1474 03:27:47.674707 PCI: 00:15.0 subsystem <- 8086/02e8
1475 03:27:47.675183 PCI: 00:15.0 cmd <- 02
1476 03:27:47.677692 PCI: 00:15.1 subsystem <- 8086/02e9
1477 03:27:47.680607 PCI: 00:15.1 cmd <- 02
1478 03:27:47.684119 PCI: 00:16.0 subsystem <- 8086/02e0
1479 03:27:47.687241 PCI: 00:16.0 cmd <- 02
1480 03:27:47.690312 PCI: 00:17.0 subsystem <- 8086/02d3
1481 03:27:47.694014 PCI: 00:17.0 cmd <- 03
1482 03:27:47.697189 PCI: 00:19.0 subsystem <- 8086/02c5
1483 03:27:47.701843 PCI: 00:19.0 cmd <- 02
1484 03:27:47.703675 PCI: 00:1d.0 bridge ctrl <- 0013
1485 03:27:47.706961 PCI: 00:1d.0 subsystem <- 8086/02b0
1486 03:27:47.710543 PCI: 00:1d.0 cmd <- 06
1487 03:27:47.714040 PCI: 00:1e.0 subsystem <- 8086/02a8
1488 03:27:47.716892 PCI: 00:1e.0 cmd <- 06
1489 03:27:47.720510 PCI: 00:1e.2 subsystem <- 8086/02aa
1490 03:27:47.723564 PCI: 00:1e.2 cmd <- 06
1491 03:27:47.726567 PCI: 00:1e.3 subsystem <- 8086/02ab
1492 03:27:47.727024 PCI: 00:1e.3 cmd <- 02
1493 03:27:47.733551 PCI: 00:1f.0 subsystem <- 8086/0284
1494 03:27:47.734030 PCI: 00:1f.0 cmd <- 407
1495 03:27:47.739879 PCI: 00:1f.3 subsystem <- 8086/02c8
1496 03:27:47.740419 PCI: 00:1f.3 cmd <- 02
1497 03:27:47.743514 PCI: 00:1f.4 subsystem <- 8086/02a3
1498 03:27:47.746738 PCI: 00:1f.4 cmd <- 03
1499 03:27:47.750077 PCI: 00:1f.5 subsystem <- 8086/02a4
1500 03:27:47.753018 PCI: 00:1f.5 cmd <- 406
1501 03:27:47.762384 PCI: 01:00.0 cmd <- 02
1502 03:27:47.767496 done.
1503 03:27:47.780797 ME: Version: 14.0.39.1367
1504 03:27:47.787541 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1505 03:27:47.790847 Initializing devices...
1506 03:27:47.791303 Root Device init ...
1507 03:27:47.797600 Chrome EC: Set SMI mask to 0x0000000000000000
1508 03:27:47.800846 Chrome EC: clear events_b mask to 0x0000000000000000
1509 03:27:47.807707 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1510 03:27:47.814435 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1511 03:27:47.821035 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1512 03:27:47.823967 Chrome EC: Set WAKE mask to 0x0000000000000000
1513 03:27:47.827118 Root Device init finished in 35277 usecs
1514 03:27:47.831024 CPU_CLUSTER: 0 init ...
1515 03:27:47.837557 CPU_CLUSTER: 0 init finished in 2448 usecs
1516 03:27:47.842037 PCI: 00:00.0 init ...
1517 03:27:47.845005 CPU TDP: 15 Watts
1518 03:27:47.848205 CPU PL2 = 64 Watts
1519 03:27:47.851392 PCI: 00:00.0 init finished in 7072 usecs
1520 03:27:47.855125 PCI: 00:02.0 init ...
1521 03:27:47.858322 PCI: 00:02.0 init finished in 2253 usecs
1522 03:27:47.861430 PCI: 00:08.0 init ...
1523 03:27:47.864663 PCI: 00:08.0 init finished in 2251 usecs
1524 03:27:47.868151 PCI: 00:12.0 init ...
1525 03:27:47.871456 PCI: 00:12.0 init finished in 2252 usecs
1526 03:27:47.874852 PCI: 00:14.0 init ...
1527 03:27:47.878403 PCI: 00:14.0 init finished in 2251 usecs
1528 03:27:47.881151 PCI: 00:14.2 init ...
1529 03:27:47.885046 PCI: 00:14.2 init finished in 2253 usecs
1530 03:27:47.888017 PCI: 00:14.3 init ...
1531 03:27:47.891364 PCI: 00:14.3 init finished in 2271 usecs
1532 03:27:47.894797 PCI: 00:15.0 init ...
1533 03:27:47.898164 DW I2C bus 0 at 0xd121f000 (400 KHz)
1534 03:27:47.901029 PCI: 00:15.0 init finished in 5977 usecs
1535 03:27:47.904307 PCI: 00:15.1 init ...
1536 03:27:47.907847 DW I2C bus 1 at 0xd1220000 (400 KHz)
1537 03:27:47.914374 PCI: 00:15.1 init finished in 5977 usecs
1538 03:27:47.914817 PCI: 00:16.0 init ...
1539 03:27:47.921259 PCI: 00:16.0 init finished in 2253 usecs
1540 03:27:47.924736 PCI: 00:19.0 init ...
1541 03:27:47.927849 DW I2C bus 4 at 0xd1222000 (400 KHz)
1542 03:27:47.930747 PCI: 00:19.0 init finished in 5976 usecs
1543 03:27:47.934017 PCI: 00:1d.0 init ...
1544 03:27:47.937492 Initializing PCH PCIe bridge.
1545 03:27:47.940702 PCI: 00:1d.0 init finished in 5285 usecs
1546 03:27:47.944318 PCI: 00:1f.0 init ...
1547 03:27:47.947531 IOAPIC: Initializing IOAPIC at 0xfec00000
1548 03:27:47.953915 IOAPIC: Bootstrap Processor Local APIC = 0x00
1549 03:27:47.954359 IOAPIC: ID = 0x02
1550 03:27:47.957568 IOAPIC: Dumping registers
1551 03:27:47.960937 reg 0x0000: 0x02000000
1552 03:27:47.963858 reg 0x0001: 0x00770020
1553 03:27:47.964297 reg 0x0002: 0x00000000
1554 03:27:47.970318 PCI: 00:1f.0 init finished in 23535 usecs
1555 03:27:47.974199 PCI: 00:1f.4 init ...
1556 03:27:47.977017 PCI: 00:1f.4 init finished in 2262 usecs
1557 03:27:47.987551 PCI: 01:00.0 init ...
1558 03:27:47.990949 PCI: 01:00.0 init finished in 2251 usecs
1559 03:27:47.995435 PNP: 0c09.0 init ...
1560 03:27:47.998576 Google Chrome EC uptime: 11.106 seconds
1561 03:27:48.004928 Google Chrome AP resets since EC boot: 0
1562 03:27:48.008539 Google Chrome most recent AP reset causes:
1563 03:27:48.015341 Google Chrome EC reset flags at last EC boot: reset-pin
1564 03:27:48.018505 PNP: 0c09.0 init finished in 20567 usecs
1565 03:27:48.021761 Devices initialized
1566 03:27:48.022204 Show all devs... After init.
1567 03:27:48.025115 Root Device: enabled 1
1568 03:27:48.028249 CPU_CLUSTER: 0: enabled 1
1569 03:27:48.031571 DOMAIN: 0000: enabled 1
1570 03:27:48.032010 APIC: 00: enabled 1
1571 03:27:48.035336 PCI: 00:00.0: enabled 1
1572 03:27:48.038422 PCI: 00:02.0: enabled 1
1573 03:27:48.041644 PCI: 00:04.0: enabled 0
1574 03:27:48.042082 PCI: 00:05.0: enabled 0
1575 03:27:48.044841 PCI: 00:12.0: enabled 1
1576 03:27:48.048083 PCI: 00:12.5: enabled 0
1577 03:27:48.048522 PCI: 00:12.6: enabled 0
1578 03:27:48.051532 PCI: 00:14.0: enabled 1
1579 03:27:48.054770 PCI: 00:14.1: enabled 0
1580 03:27:48.058140 PCI: 00:14.3: enabled 1
1581 03:27:48.058580 PCI: 00:14.5: enabled 0
1582 03:27:48.061512 PCI: 00:15.0: enabled 1
1583 03:27:48.064868 PCI: 00:15.1: enabled 1
1584 03:27:48.068547 PCI: 00:15.2: enabled 0
1585 03:27:48.068990 PCI: 00:15.3: enabled 0
1586 03:27:48.071437 PCI: 00:16.0: enabled 1
1587 03:27:48.074812 PCI: 00:16.1: enabled 0
1588 03:27:48.078213 PCI: 00:16.2: enabled 0
1589 03:27:48.078652 PCI: 00:16.3: enabled 0
1590 03:27:48.081158 PCI: 00:16.4: enabled 0
1591 03:27:48.084732 PCI: 00:16.5: enabled 0
1592 03:27:48.087688 PCI: 00:17.0: enabled 1
1593 03:27:48.088171 PCI: 00:19.0: enabled 1
1594 03:27:48.091172 PCI: 00:19.1: enabled 0
1595 03:27:48.094727 PCI: 00:19.2: enabled 0
1596 03:27:48.095176 PCI: 00:1a.0: enabled 0
1597 03:27:48.098208 PCI: 00:1c.0: enabled 0
1598 03:27:48.101213 PCI: 00:1c.1: enabled 0
1599 03:27:48.104522 PCI: 00:1c.2: enabled 0
1600 03:27:48.104989 PCI: 00:1c.3: enabled 0
1601 03:27:48.107894 PCI: 00:1c.4: enabled 0
1602 03:27:48.111111 PCI: 00:1c.5: enabled 0
1603 03:27:48.114661 PCI: 00:1c.6: enabled 0
1604 03:27:48.115121 PCI: 00:1c.7: enabled 0
1605 03:27:48.117672 PCI: 00:1d.0: enabled 1
1606 03:27:48.121046 PCI: 00:1d.1: enabled 0
1607 03:27:48.124438 PCI: 00:1d.2: enabled 0
1608 03:27:48.124882 PCI: 00:1d.3: enabled 0
1609 03:27:48.127515 PCI: 00:1d.4: enabled 0
1610 03:27:48.131030 PCI: 00:1d.5: enabled 0
1611 03:27:48.131472 PCI: 00:1e.0: enabled 1
1612 03:27:48.134578 PCI: 00:1e.1: enabled 0
1613 03:27:48.137843 PCI: 00:1e.2: enabled 1
1614 03:27:48.141249 PCI: 00:1e.3: enabled 1
1615 03:27:48.141694 PCI: 00:1f.0: enabled 1
1616 03:27:48.144012 PCI: 00:1f.1: enabled 0
1617 03:27:48.147698 PCI: 00:1f.2: enabled 0
1618 03:27:48.150951 PCI: 00:1f.3: enabled 1
1619 03:27:48.151397 PCI: 00:1f.4: enabled 1
1620 03:27:48.154402 PCI: 00:1f.5: enabled 1
1621 03:27:48.157357 PCI: 00:1f.6: enabled 0
1622 03:27:48.160682 USB0 port 0: enabled 1
1623 03:27:48.161163 I2C: 01:15: enabled 1
1624 03:27:48.164666 I2C: 02:5d: enabled 1
1625 03:27:48.167628 GENERIC: 0.0: enabled 1
1626 03:27:48.168080 I2C: 03:1a: enabled 1
1627 03:27:48.170941 I2C: 03:38: enabled 1
1628 03:27:48.174342 I2C: 03:39: enabled 1
1629 03:27:48.174795 I2C: 03:3a: enabled 1
1630 03:27:48.177228 I2C: 03:3b: enabled 1
1631 03:27:48.180802 PCI: 00:00.0: enabled 1
1632 03:27:48.181423 SPI: 00: enabled 1
1633 03:27:48.184009 SPI: 01: enabled 1
1634 03:27:48.187180 PNP: 0c09.0: enabled 1
1635 03:27:48.187645 USB2 port 0: enabled 1
1636 03:27:48.190522 USB2 port 1: enabled 1
1637 03:27:48.193864 USB2 port 2: enabled 0
1638 03:27:48.194331 USB2 port 3: enabled 0
1639 03:27:48.197162 USB2 port 5: enabled 0
1640 03:27:48.200605 USB2 port 6: enabled 1
1641 03:27:48.203507 USB2 port 9: enabled 1
1642 03:27:48.203946 USB3 port 0: enabled 1
1643 03:27:48.206895 USB3 port 1: enabled 1
1644 03:27:48.210472 USB3 port 2: enabled 1
1645 03:27:48.210907 USB3 port 3: enabled 1
1646 03:27:48.213491 USB3 port 4: enabled 0
1647 03:27:48.216697 APIC: 03: enabled 1
1648 03:27:48.217241 APIC: 04: enabled 1
1649 03:27:48.220433 APIC: 01: enabled 1
1650 03:27:48.224008 APIC: 02: enabled 1
1651 03:27:48.224560 APIC: 05: enabled 1
1652 03:27:48.226628 APIC: 06: enabled 1
1653 03:27:48.227067 APIC: 07: enabled 1
1654 03:27:48.230428 PCI: 00:08.0: enabled 1
1655 03:27:48.233720 PCI: 00:14.2: enabled 1
1656 03:27:48.236535 PCI: 01:00.0: enabled 1
1657 03:27:48.239991 Disabling ACPI via APMC:
1658 03:27:48.243269 done.
1659 03:27:48.247287 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1660 03:27:48.250098 ELOG: NV offset 0xaf0000 size 0x4000
1661 03:27:48.256795 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1662 03:27:48.263415 ELOG: Event(17) added with size 13 at 2022-07-27 03:27:47 UTC
1663 03:27:48.270026 ELOG: Event(92) added with size 9 at 2022-07-27 03:27:47 UTC
1664 03:27:48.276540 ELOG: Event(93) added with size 9 at 2022-07-27 03:27:47 UTC
1665 03:27:48.283452 ELOG: Event(9A) added with size 9 at 2022-07-27 03:27:47 UTC
1666 03:27:48.289890 ELOG: Event(9E) added with size 10 at 2022-07-27 03:27:47 UTC
1667 03:27:48.296740 ELOG: Event(9F) added with size 14 at 2022-07-27 03:27:47 UTC
1668 03:27:48.299558 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1669 03:27:48.307139 ELOG: Event(A1) added with size 10 at 2022-07-27 03:27:47 UTC
1670 03:27:48.317258 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1671 03:27:48.323749 ELOG: Event(A0) added with size 9 at 2022-07-27 03:27:47 UTC
1672 03:27:48.327287 elog_add_boot_reason: Logged dev mode boot
1673 03:27:48.330516 Finalize devices...
1674 03:27:48.330961 PCI: 00:17.0 final
1675 03:27:48.333847 Devices finalized
1676 03:27:48.337121 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1677 03:27:48.343368 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1678 03:27:48.347189 ME: HFSTS1 : 0x90000245
1679 03:27:48.349865 ME: HFSTS2 : 0x3B850126
1680 03:27:48.356713 ME: HFSTS3 : 0x00000020
1681 03:27:48.360202 ME: HFSTS4 : 0x00004800
1682 03:27:48.363483 ME: HFSTS5 : 0x00000000
1683 03:27:48.366385 ME: HFSTS6 : 0x40400006
1684 03:27:48.370097 ME: Manufacturing Mode : NO
1685 03:27:48.373199 ME: FW Partition Table : OK
1686 03:27:48.376629 ME: Bringup Loader Failure : NO
1687 03:27:48.380204 ME: Firmware Init Complete : YES
1688 03:27:48.382969 ME: Boot Options Present : NO
1689 03:27:48.386345 ME: Update In Progress : NO
1690 03:27:48.389897 ME: D0i3 Support : YES
1691 03:27:48.393333 ME: Low Power State Enabled : NO
1692 03:27:48.396236 ME: CPU Replaced : NO
1693 03:27:48.399821 ME: CPU Replacement Valid : YES
1694 03:27:48.403074 ME: Current Working State : 5
1695 03:27:48.406593 ME: Current Operation State : 1
1696 03:27:48.409613 ME: Current Operation Mode : 0
1697 03:27:48.412902 ME: Error Code : 0
1698 03:27:48.416068 ME: CPU Debug Disabled : YES
1699 03:27:48.419615 ME: TXT Support : NO
1700 03:27:48.426470 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1701 03:27:48.432702 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1702 03:27:48.433285 CBFS @ c08000 size 3f8000
1703 03:27:48.439074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1704 03:27:48.442463 CBFS: Locating 'fallback/dsdt.aml'
1705 03:27:48.446091 CBFS: Found @ offset 10bb80 size 3fa5
1706 03:27:48.452513 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 03:27:48.455807 CBFS @ c08000 size 3f8000
1708 03:27:48.462302 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 03:27:48.462866 CBFS: Locating 'fallback/slic'
1710 03:27:48.467685 CBFS: 'fallback/slic' not found.
1711 03:27:48.474634 ACPI: Writing ACPI tables at 99b3e000.
1712 03:27:48.475131 ACPI: * FACS
1713 03:27:48.477453 ACPI: * DSDT
1714 03:27:48.481058 Ramoops buffer: 0x100000@0x99a3d000.
1715 03:27:48.484523 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1716 03:27:48.490873 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1717 03:27:48.494100 Google Chrome EC: version:
1718 03:27:48.497508 ro: helios_v2.0.2659-56403530b
1719 03:27:48.500413 rw: helios_v2.0.2849-c41de27e7d
1720 03:27:48.500853 running image: 1
1721 03:27:48.504868 ACPI: * FADT
1722 03:27:48.505365 SCI is IRQ9
1723 03:27:48.511529 ACPI: added table 1/32, length now 40
1724 03:27:48.511976 ACPI: * SSDT
1725 03:27:48.514886 Found 1 CPU(s) with 8 core(s) each.
1726 03:27:48.518445 Error: Could not locate 'wifi_sar' in VPD.
1727 03:27:48.524868 Checking CBFS for default SAR values
1728 03:27:48.528429 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1729 03:27:48.531865 CBFS @ c08000 size 3f8000
1730 03:27:48.538092 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 03:27:48.541326 CBFS: Locating 'wifi_sar_defaults.hex'
1732 03:27:48.544865 CBFS: Found @ offset 5fac0 size 77
1733 03:27:48.548365 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1734 03:27:48.554760 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1735 03:27:48.558075 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1736 03:27:48.564736 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1737 03:27:48.568207 failed to find key in VPD: dsm_calib_r0_0
1738 03:27:48.577896 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1739 03:27:48.581173 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1740 03:27:48.584294 failed to find key in VPD: dsm_calib_r0_1
1741 03:27:48.594178 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1742 03:27:48.600854 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1743 03:27:48.604191 failed to find key in VPD: dsm_calib_r0_2
1744 03:27:48.613975 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1745 03:27:48.617636 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1746 03:27:48.624353 failed to find key in VPD: dsm_calib_r0_3
1747 03:27:48.630629 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1748 03:27:48.637106 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1749 03:27:48.640374 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1750 03:27:48.647356 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1751 03:27:48.650330 EC returned error result code 1
1752 03:27:48.654123 EC returned error result code 1
1753 03:27:48.657412 EC returned error result code 1
1754 03:27:48.660642 PS2K: Bad resp from EC. Vivaldi disabled!
1755 03:27:48.667550 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1756 03:27:48.674093 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1757 03:27:48.677481 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1758 03:27:48.683902 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 03:27:48.687265 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 03:27:48.693999 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1761 03:27:48.700579 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 03:27:48.706808 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1763 03:27:48.710474 ACPI: added table 2/32, length now 44
1764 03:27:48.711058 ACPI: * MCFG
1765 03:27:48.717286 ACPI: added table 3/32, length now 48
1766 03:27:48.717869 ACPI: * TPM2
1767 03:27:48.720424 TPM2 log created at 99a2d000
1768 03:27:48.723642 ACPI: added table 4/32, length now 52
1769 03:27:48.727030 ACPI: * MADT
1770 03:27:48.727555 SCI is IRQ9
1771 03:27:48.730284 ACPI: added table 5/32, length now 56
1772 03:27:48.733560 current = 99b43ac0
1773 03:27:48.734051 ACPI: * DMAR
1774 03:27:48.737120 ACPI: added table 6/32, length now 60
1775 03:27:48.740405 ACPI: * IGD OpRegion
1776 03:27:48.743310 GMA: Found VBT in CBFS
1777 03:27:48.746661 GMA: Found valid VBT in CBFS
1778 03:27:48.750059 ACPI: added table 7/32, length now 64
1779 03:27:48.750513 ACPI: * HPET
1780 03:27:48.753555 ACPI: added table 8/32, length now 68
1781 03:27:48.756437 ACPI: done.
1782 03:27:48.760309 ACPI tables: 31744 bytes.
1783 03:27:48.763515 smbios_write_tables: 99a2c000
1784 03:27:48.766761 EC returned error result code 3
1785 03:27:48.769583 Couldn't obtain OEM name from CBI
1786 03:27:48.773360 Create SMBIOS type 17
1787 03:27:48.776193 PCI: 00:00.0 (Intel Cannonlake)
1788 03:27:48.776636 PCI: 00:14.3 (Intel WiFi)
1789 03:27:48.780130 SMBIOS tables: 939 bytes.
1790 03:27:48.782775 Writing table forward entry at 0x00000500
1791 03:27:48.789503 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1792 03:27:48.792820 Writing coreboot table at 0x99b62000
1793 03:27:48.799224 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1794 03:27:48.806204 1. 0000000000001000-000000000009ffff: RAM
1795 03:27:48.809170 2. 00000000000a0000-00000000000fffff: RESERVED
1796 03:27:48.812657 3. 0000000000100000-0000000099a2bfff: RAM
1797 03:27:48.819409 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1798 03:27:48.822815 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1799 03:27:48.828953 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1800 03:27:48.835511 7. 000000009a000000-000000009f7fffff: RESERVED
1801 03:27:48.838904 8. 00000000e0000000-00000000efffffff: RESERVED
1802 03:27:48.845695 9. 00000000fc000000-00000000fc000fff: RESERVED
1803 03:27:48.848976 10. 00000000fe000000-00000000fe00ffff: RESERVED
1804 03:27:48.855296 11. 00000000fed10000-00000000fed17fff: RESERVED
1805 03:27:48.858796 12. 00000000fed80000-00000000fed83fff: RESERVED
1806 03:27:48.861968 13. 00000000fed90000-00000000fed91fff: RESERVED
1807 03:27:48.868695 14. 00000000feda0000-00000000feda1fff: RESERVED
1808 03:27:48.871932 15. 0000000100000000-000000045e7fffff: RAM
1809 03:27:48.875272 Graphics framebuffer located at 0xc0000000
1810 03:27:48.878639 Passing 5 GPIOs to payload:
1811 03:27:48.885321 NAME | PORT | POLARITY | VALUE
1812 03:27:48.891793 write protect | undefined | high | low
1813 03:27:48.894827 lid | undefined | high | high
1814 03:27:48.901865 power | undefined | high | low
1815 03:27:48.904897 oprom | undefined | high | low
1816 03:27:48.911340 EC in RW | 0x000000cb | high | low
1817 03:27:48.911790 Board ID: 4
1818 03:27:48.918374 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1819 03:27:48.921763 CBFS @ c08000 size 3f8000
1820 03:27:48.924538 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1821 03:27:48.931018 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6244
1822 03:27:48.934681 coreboot table: 1492 bytes.
1823 03:27:48.938069 IMD ROOT 0. 99fff000 00001000
1824 03:27:48.941367 IMD SMALL 1. 99ffe000 00001000
1825 03:27:48.944388 FSP MEMORY 2. 99c4e000 003b0000
1826 03:27:48.947907 CONSOLE 3. 99c2e000 00020000
1827 03:27:48.950871 FMAP 4. 99c2d000 0000054e
1828 03:27:48.954350 TIME STAMP 5. 99c2c000 00000910
1829 03:27:48.958063 VBOOT WORK 6. 99c18000 00014000
1830 03:27:48.961187 MRC DATA 7. 99c16000 00001958
1831 03:27:48.964209 ROMSTG STCK 8. 99c15000 00001000
1832 03:27:48.967881 AFTER CAR 9. 99c0b000 0000a000
1833 03:27:48.970786 RAMSTAGE 10. 99baf000 0005c000
1834 03:27:48.974318 REFCODE 11. 99b7a000 00035000
1835 03:27:48.977490 SMM BACKUP 12. 99b6a000 00010000
1836 03:27:48.981013 COREBOOT 13. 99b62000 00008000
1837 03:27:48.984218 ACPI 14. 99b3e000 00024000
1838 03:27:48.988027 ACPI GNVS 15. 99b3d000 00001000
1839 03:27:48.990999 RAMOOPS 16. 99a3d000 00100000
1840 03:27:48.994023 TPM2 TCGLOG17. 99a2d000 00010000
1841 03:27:48.997362 SMBIOS 18. 99a2c000 00000800
1842 03:27:49.000774 IMD small region:
1843 03:27:49.004058 IMD ROOT 0. 99ffec00 00000400
1844 03:27:49.007350 FSP RUNTIME 1. 99ffebe0 00000004
1845 03:27:49.010749 EC HOSTEVENT 2. 99ffebc0 00000008
1846 03:27:49.014237 POWER STATE 3. 99ffeb80 00000040
1847 03:27:49.017355 ROMSTAGE 4. 99ffeb60 00000004
1848 03:27:49.020697 MEM INFO 5. 99ffe9a0 000001b9
1849 03:27:49.024213 VPD 6. 99ffe940 0000004c
1850 03:27:49.027555 MTRR: Physical address space:
1851 03:27:49.033980 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 03:27:49.040751 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 03:27:49.047219 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1854 03:27:49.053411 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1855 03:27:49.059860 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 03:27:49.066714 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 03:27:49.069843 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1858 03:27:49.076388 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 03:27:49.079899 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 03:27:49.083144 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 03:27:49.086264 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 03:27:49.093018 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 03:27:49.096078 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 03:27:49.099430 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 03:27:49.102809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 03:27:49.109567 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 03:27:49.113017 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 03:27:49.116087 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 03:27:49.119141 call enable_fixed_mtrr()
1870 03:27:49.122534 CPU physical address size: 39 bits
1871 03:27:49.126249 MTRR: default type WB/UC MTRR counts: 6/8.
1872 03:27:49.132546 MTRR: WB selected as default type.
1873 03:27:49.135946 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1874 03:27:49.142678 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1875 03:27:49.149156 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1876 03:27:49.155497 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1877 03:27:49.162337 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1878 03:27:49.168645 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1879 03:27:49.172201 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 03:27:49.178863 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 03:27:49.182557 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 03:27:49.185131 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 03:27:49.188823 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 03:27:49.195187 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 03:27:49.198447 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 03:27:49.201770 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 03:27:49.205114 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 03:27:49.212107 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 03:27:49.215228 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 03:27:49.215676
1891 03:27:49.216117 MTRR check
1892 03:27:49.218096 Fixed MTRRs : Enabled
1893 03:27:49.221532 Variable MTRRs: Enabled
1894 03:27:49.221983
1895 03:27:49.224924 call enable_fixed_mtrr()
1896 03:27:49.228524 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1897 03:27:49.231579 CPU physical address size: 39 bits
1898 03:27:49.238368 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1899 03:27:49.241789 CBFS @ c08000 size 3f8000
1900 03:27:49.244976 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1901 03:27:49.248524 CBFS: Locating 'fallback/payload'
1902 03:27:49.254745 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 03:27:49.258271 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 03:27:49.261710 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 03:27:49.265008 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 03:27:49.271343 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 03:27:49.274661 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 03:27:49.278041 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 03:27:49.281466 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 03:27:49.288166 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 03:27:49.291370 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 03:27:49.294390 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 03:27:49.297660 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 03:27:49.304506 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 03:27:49.307916 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 03:27:49.311172 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 03:27:49.314174 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 03:27:49.320827 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 03:27:49.324356 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 03:27:49.327753 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 03:27:49.330862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 03:27:49.337574 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 03:27:49.340884 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 03:27:49.344015 call enable_fixed_mtrr()
1925 03:27:49.344550 call enable_fixed_mtrr()
1926 03:27:49.347397 CPU physical address size: 39 bits
1927 03:27:49.354030 CBFS: Found @ offset 1c96c0 size 3f798
1928 03:27:49.357520 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 03:27:49.360859 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 03:27:49.363914 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 03:27:49.370500 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 03:27:49.374010 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 03:27:49.377184 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 03:27:49.380293 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 03:27:49.387031 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 03:27:49.390276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 03:27:49.393611 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 03:27:49.396829 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 03:27:49.400239 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 03:27:49.406906 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 03:27:49.409911 call enable_fixed_mtrr()
1942 03:27:49.413388 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 03:27:49.416819 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 03:27:49.419799 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 03:27:49.426679 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 03:27:49.429889 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 03:27:49.433580 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 03:27:49.436774 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 03:27:49.443255 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 03:27:49.446192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 03:27:49.449534 CPU physical address size: 39 bits
1952 03:27:49.453548 call enable_fixed_mtrr()
1953 03:27:49.456359 CPU physical address size: 39 bits
1954 03:27:49.459301 CPU physical address size: 39 bits
1955 03:27:49.463055 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 03:27:49.466001 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 03:27:49.473344 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 03:27:49.476283 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 03:27:49.479420 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 03:27:49.483193 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 03:27:49.489640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 03:27:49.492417 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 03:27:49.495930 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 03:27:49.499062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 03:27:49.506139 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 03:27:49.508864 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 03:27:49.512365 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 03:27:49.515731 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 03:27:49.522701 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 03:27:49.525482 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 03:27:49.529165 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 03:27:49.531977 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 03:27:49.539207 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 03:27:49.542046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 03:27:49.545673 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 03:27:49.548728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 03:27:49.552136 call enable_fixed_mtrr()
1978 03:27:49.555492 call enable_fixed_mtrr()
1979 03:27:49.558748 Checking segment from ROM address 0xffdd16f8
1980 03:27:49.562109 CPU physical address size: 39 bits
1981 03:27:49.565551 CPU physical address size: 39 bits
1982 03:27:49.572166 Checking segment from ROM address 0xffdd1714
1983 03:27:49.575395 Loading segment from ROM address 0xffdd16f8
1984 03:27:49.578760 code (compression=0)
1985 03:27:49.585654 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 03:27:49.595383 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 03:27:49.598584 it's not compressed!
1988 03:27:49.689184 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 03:27:49.695795 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 03:27:49.698850 Loading segment from ROM address 0xffdd1714
1991 03:27:49.702127 Entry Point 0x30000000
1992 03:27:49.705553 Loaded segments
1993 03:27:49.711442 Finalizing chipset.
1994 03:27:49.714530 Finalizing SMM.
1995 03:27:49.717678 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1996 03:27:49.721157 mp_park_aps done after 0 msecs.
1997 03:27:49.727620 Jumping to boot code at 30000000(99b62000)
1998 03:27:49.734544 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1999 03:27:49.734995
2000 03:27:49.737464 Starting depthcharge on Helios...
2001 03:27:49.738524 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2002 03:27:49.739043 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2003 03:27:49.739469 Setting prompt string to ['hatch:']
2004 03:27:49.739869 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2005 03:27:49.747370 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 03:27:49.753935 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2007 03:27:49.760806 board_setup: Info: eMMC controller not present; skipping
2008 03:27:49.764444 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 03:27:49.770460 board_setup: Info: SDHCI controller not present; skipping
2010 03:27:49.777424 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2011 03:27:49.777870 Wipe memory regions:
2012 03:27:49.780516 [0x00000000001000, 0x000000000a0000)
2013 03:27:49.784070 [0x00000000100000, 0x00000030000000)
2014 03:27:49.853389 [0x00000030657430, 0x00000099a2c000)
2015 03:27:50.003354 [0x00000100000000, 0x0000045e800000)
2016 03:27:51.458952 R8152: Initializing
2017 03:27:51.461883 Version 9 (ocp_data = 6010)
2018 03:27:51.466200 R8152: Done initializing
2019 03:27:51.469580 Adding net device
2020 03:27:51.844522 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 03:27:51.844685
2022 03:27:51.844981 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2024 03:27:51.945724 hatch: tftpboot 192.168.201.1 6901567/tftp-deploy-cf92o5rm/kernel/bzImage 6901567/tftp-deploy-cf92o5rm/kernel/cmdline 6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
2025 03:27:51.945923 Setting prompt string to 'Starting kernel'
2026 03:27:51.946013 Setting prompt string to ['Starting kernel']
2027 03:27:51.946090 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2028 03:27:51.946174 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
2029 03:27:51.950491 tftpboot 192.168.201.1 6901567/tftp-deploy-cf92o5rm/kernel/bzImaoy-cf92o5rm/kernel/cmdline 6901567/tftp-deploy-cf92o5rm/ramdisk/ramdisk.cpio.gz
2030 03:27:51.950600 Waiting for link
2031 03:27:52.151369 done.
2032 03:27:52.151506 MAC: f4:f5:e8:50:e3:ec
2033 03:27:52.154881 Sending DHCP discover... done.
2034 03:27:52.157676 Waiting for reply... done.
2035 03:27:52.160948 Sending DHCP request... done.
2036 03:27:52.164435 Waiting for reply... done.
2037 03:27:52.167989 My ip is 192.168.201.10
2038 03:27:52.171118 The DHCP server ip is 192.168.201.1
2039 03:27:52.174744 TFTP server IP predefined by user: 192.168.201.1
2040 03:27:52.181038 Bootfile predefined by user: 6901567/tftp-deploy-cf92o5rm/kernel/bzImage
2041 03:27:52.184599 Sending tftp read request... done.
2042 03:27:52.187323 Waiting for the transfer...
2043 03:27:52.436284 00000000 ################################################################
2044 03:27:52.679241 00080000 ################################################################
2045 03:27:52.920645 00100000 ################################################################
2046 03:27:53.167891 00180000 ################################################################
2047 03:27:53.407932 00200000 ################################################################
2048 03:27:53.646250 00280000 ################################################################
2049 03:27:53.892499 00300000 ################################################################
2050 03:27:54.131452 00380000 ################################################################
2051 03:27:54.377917 00400000 ################################################################
2052 03:27:54.617482 00480000 ################################################################
2053 03:27:54.856635 00500000 ################################################################
2054 03:27:55.096981 00580000 ################################################################
2055 03:27:55.340610 00600000 ################################################################ done.
2056 03:27:55.343877 The bootfile was 6815632 bytes long.
2057 03:27:55.347226 Sending tftp read request... done.
2058 03:27:55.350333 Waiting for the transfer...
2059 03:27:55.597784 00000000 ################################################################
2060 03:27:55.846558 00080000 ################################################################
2061 03:27:56.085790 00100000 ################################################################
2062 03:27:56.324168 00180000 ################################################################
2063 03:27:56.567647 00200000 ################################################################
2064 03:27:56.806009 00280000 ################################################################
2065 03:27:57.043151 00300000 ################################################################
2066 03:27:57.286265 00380000 ################################################################
2067 03:27:57.530472 00400000 ################################################################
2068 03:27:57.770481 00480000 ################################################################
2069 03:27:57.877882 00500000 ############################# done.
2070 03:27:57.881459 Sending tftp read request... done.
2071 03:27:57.884874 Waiting for the transfer...
2072 03:27:57.884970 00000000 # done.
2073 03:27:57.894672 Command line loaded dynamically from TFTP file: 6901567/tftp-deploy-cf92o5rm/kernel/cmdline
2074 03:27:57.917374 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6901567/extract-nfsrootfs-z6uvlwiz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2075 03:27:57.920930 ec_init(0): CrosEC protocol v3 supported (256, 256)
2076 03:27:57.930687 Shutting down all USB controllers.
2077 03:27:57.930783 Removing current net device
2078 03:27:57.934257 Finalizing coreboot
2079 03:27:57.940690 Exiting depthcharge with code 4 at timestamp: 15482055
2080 03:27:57.940789
2081 03:27:57.940876 Starting kernel ...
2082 03:27:57.940947
2083 03:27:57.941257 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2084 03:27:57.941368 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2085 03:27:57.941454 Setting prompt string to ['Linux version [0-9]']
2086 03:27:57.941531 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2087 03:27:57.941608 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2088 03:27:57.943546
2090 03:32:29.942337 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2092 03:32:29.943423 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2094 03:32:29.944197 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2097 03:32:29.945692 end: 2 depthcharge-action (duration 00:05:00) [common]
2099 03:32:29.946561 Cleaning after the job
2100 03:32:29.946650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/ramdisk
2101 03:32:29.947134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/kernel
2102 03:32:29.947660 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/nfsrootfs
2103 03:32:30.000176 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6901567/tftp-deploy-cf92o5rm/modules
2104 03:32:30.000517 start: 4.1 power-off (timeout 00:00:30) [common]
2105 03:32:30.000703 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2106 03:32:30.021551 >> Command sent successfully.
2107 03:32:30.023623 Returned 0 in 0 seconds
2108 03:32:30.124761 end: 4.1 power-off (duration 00:00:00) [common]
2110 03:32:30.126266 start: 4.2 read-feedback (timeout 00:10:00) [common]
2111 03:32:30.127356 Listened to connection for namespace 'common' for up to 1s
2112 03:32:31.129361 Finalising connection for namespace 'common'
2113 03:32:31.130000 Disconnecting from shell: Finalise
2114 03:32:31.231506 end: 4.2 read-feedback (duration 00:00:01) [common]
2115 03:32:31.232148 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6901567
2116 03:32:31.404429 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6901567
2117 03:32:31.404700 JobError: Your job cannot terminate cleanly.