Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:57:17.166007 lava-dispatcher, installed at version: 2022.06
2 14:57:17.166189 start: 0 validate
3 14:57:17.166319 Start time: 2022-07-26 14:57:17.166314+00:00 (UTC)
4 14:57:17.166436 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:57:17.166558 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 14:57:17.461437 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:57:17.462132 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:57:17.752301 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:57:17.752940 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:57:18.042314 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:57:18.042963 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:57:18.337525 validate duration: 1.17
14 14:57:18.337790 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:57:18.337895 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:57:18.337995 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:57:18.338089 Not decompressing ramdisk as can be used compressed.
18 14:57:18.338173 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 14:57:18.338237 saving as /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/ramdisk/initrd.cpio.gz
20 14:57:18.338298 total size: 5411064 (5MB)
21 14:57:18.339385 progress 0% (0MB)
22 14:57:18.340784 progress 5% (0MB)
23 14:57:18.342136 progress 10% (0MB)
24 14:57:18.343467 progress 15% (0MB)
25 14:57:18.344884 progress 20% (1MB)
26 14:57:18.346180 progress 25% (1MB)
27 14:57:18.347439 progress 30% (1MB)
28 14:57:18.348691 progress 35% (1MB)
29 14:57:18.350127 progress 40% (2MB)
30 14:57:18.351378 progress 45% (2MB)
31 14:57:18.352630 progress 50% (2MB)
32 14:57:18.353889 progress 55% (2MB)
33 14:57:18.355287 progress 60% (3MB)
34 14:57:18.356536 progress 65% (3MB)
35 14:57:18.357826 progress 70% (3MB)
36 14:57:18.359076 progress 75% (3MB)
37 14:57:18.360472 progress 80% (4MB)
38 14:57:18.361824 progress 85% (4MB)
39 14:57:18.363078 progress 90% (4MB)
40 14:57:18.364328 progress 95% (4MB)
41 14:57:18.365746 progress 100% (5MB)
42 14:57:18.365905 5MB downloaded in 0.03s (186.94MB/s)
43 14:57:18.366046 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:57:18.366280 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:57:18.366368 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:57:18.366454 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:57:18.366551 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:57:18.366619 saving as /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/kernel/bzImage
50 14:57:18.366681 total size: 6815632 (6MB)
51 14:57:18.366741 No compression specified
52 14:57:18.367707 progress 0% (0MB)
53 14:57:18.369453 progress 5% (0MB)
54 14:57:18.371085 progress 10% (0MB)
55 14:57:18.372824 progress 15% (1MB)
56 14:57:18.374469 progress 20% (1MB)
57 14:57:18.376084 progress 25% (1MB)
58 14:57:18.377949 progress 30% (1MB)
59 14:57:18.379567 progress 35% (2MB)
60 14:57:18.381344 progress 40% (2MB)
61 14:57:18.382910 progress 45% (2MB)
62 14:57:18.384475 progress 50% (3MB)
63 14:57:18.386253 progress 55% (3MB)
64 14:57:18.387800 progress 60% (3MB)
65 14:57:18.389558 progress 65% (4MB)
66 14:57:18.391109 progress 70% (4MB)
67 14:57:18.392664 progress 75% (4MB)
68 14:57:18.394429 progress 80% (5MB)
69 14:57:18.395977 progress 85% (5MB)
70 14:57:18.397717 progress 90% (5MB)
71 14:57:18.399272 progress 95% (6MB)
72 14:57:18.400836 progress 100% (6MB)
73 14:57:18.401109 6MB downloaded in 0.03s (188.82MB/s)
74 14:57:18.401252 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:57:18.401543 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:57:18.401633 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:57:18.401718 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:57:18.401822 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 14:57:18.401889 saving as /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/nfsrootfs/full.rootfs.tar
81 14:57:18.401951 total size: 122624016 (116MB)
82 14:57:18.402011 Using unxz to decompress xz
83 14:57:18.405301 progress 0% (0MB)
84 14:57:18.831062 progress 5% (5MB)
85 14:57:19.265972 progress 10% (11MB)
86 14:57:19.702484 progress 15% (17MB)
87 14:57:20.145022 progress 20% (23MB)
88 14:57:20.450093 progress 25% (29MB)
89 14:57:20.774945 progress 30% (35MB)
90 14:57:21.007549 progress 35% (40MB)
91 14:57:21.208173 progress 40% (46MB)
92 14:57:21.541567 progress 45% (52MB)
93 14:57:21.885919 progress 50% (58MB)
94 14:57:22.207180 progress 55% (64MB)
95 14:57:22.541121 progress 60% (70MB)
96 14:57:22.857683 progress 65% (76MB)
97 14:57:23.219134 progress 70% (81MB)
98 14:57:23.611303 progress 75% (87MB)
99 14:57:24.002915 progress 80% (93MB)
100 14:57:24.111846 progress 85% (99MB)
101 14:57:24.270209 progress 90% (105MB)
102 14:57:24.585665 progress 95% (111MB)
103 14:57:24.937349 progress 100% (116MB)
104 14:57:24.942270 116MB downloaded in 6.54s (17.88MB/s)
105 14:57:24.942532 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:57:24.942794 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:57:24.942887 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:57:24.942976 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:57:24.943091 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:57:24.943164 saving as /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/modules/modules.tar
112 14:57:24.943227 total size: 51868 (0MB)
113 14:57:24.943292 Using unxz to decompress xz
114 14:57:24.946480 progress 63% (0MB)
115 14:57:24.946892 progress 100% (0MB)
116 14:57:24.950177 0MB downloaded in 0.01s (7.12MB/s)
117 14:57:24.950388 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:57:24.950640 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:57:24.950737 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 14:57:24.950881 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 14:57:26.573747 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6895655/extract-nfsrootfs-5oq_147n
123 14:57:26.573948 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 14:57:26.574055 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 14:57:26.574190 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098
126 14:57:26.574291 makedir: /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin
127 14:57:26.574378 makedir: /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/tests
128 14:57:26.574460 makedir: /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/results
129 14:57:26.574556 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-add-keys
130 14:57:26.574682 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-add-sources
131 14:57:26.574798 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-background-process-start
132 14:57:26.574911 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-background-process-stop
133 14:57:26.575023 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-common-functions
134 14:57:26.575134 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-echo-ipv4
135 14:57:26.575244 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-install-packages
136 14:57:26.575353 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-installed-packages
137 14:57:26.575462 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-os-build
138 14:57:26.575570 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-probe-channel
139 14:57:26.575679 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-probe-ip
140 14:57:26.575787 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-target-ip
141 14:57:26.575895 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-target-mac
142 14:57:26.576003 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-target-storage
143 14:57:26.576112 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-case
144 14:57:26.576223 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-event
145 14:57:26.576331 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-feedback
146 14:57:26.576442 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-raise
147 14:57:26.576551 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-reference
148 14:57:26.576659 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-runner
149 14:57:26.576767 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-set
150 14:57:26.576878 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-test-shell
151 14:57:26.576986 Updating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-install-packages (oe)
152 14:57:26.577099 Updating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/bin/lava-installed-packages (oe)
153 14:57:26.577196 Creating /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/environment
154 14:57:26.577471 LAVA metadata
155 14:57:26.577543 - LAVA_JOB_ID=6895655
156 14:57:26.577608 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:57:26.577707 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 14:57:26.577773 skipped lava-vland-overlay
159 14:57:26.577850 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:57:26.577931 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 14:57:26.577994 skipped lava-multinode-overlay
162 14:57:26.578069 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:57:26.578152 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 14:57:26.578226 Loading test definitions
165 14:57:26.578316 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 14:57:26.578386 Using /lava-6895655 at stage 0
167 14:57:26.578480 Fetching tests from https://github.com/kernelci/test-definitions
168 14:57:26.578559 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/0/tests/0_ltp-mm'
169 14:57:30.093867 Running '/usr/bin/git checkout kernelci.org
170 14:57:30.179990 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 14:57:30.180698 uuid=6895655_1.5.2.3.1 testdef=None
172 14:57:30.180853 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 14:57:30.181094 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 14:57:30.181891 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 14:57:30.182128 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 14:57:30.183057 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 14:57:30.183303 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 14:57:30.184199 runner path: /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/0/tests/0_ltp-mm test_uuid 6895655_1.5.2.3.1
182 14:57:30.184290 SKIPFILE='skipfile-lkft.yaml'
183 14:57:30.184355 SKIP_INSTALL='true'
184 14:57:30.184414 TST_CMDFILES='mm'
185 14:57:30.184550 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 14:57:30.184761 Creating lava-test-runner.conf files
188 14:57:30.184826 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895655/lava-overlay-la_08098/lava-6895655/0 for stage 0
189 14:57:30.184910 - 0_ltp-mm
190 14:57:30.185010 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 14:57:30.185101 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 14:57:37.162595 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 14:57:37.162757 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
194 14:57:37.162855 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 14:57:37.162955 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 14:57:37.163050 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
197 14:57:37.263201 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 14:57:37.263537 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
199 14:57:37.263647 extracting modules file /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895655/extract-nfsrootfs-5oq_147n
200 14:57:37.267720 extracting modules file /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895655/extract-overlay-ramdisk-eigvsvzx/ramdisk
201 14:57:37.271418 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 14:57:37.271525 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
203 14:57:37.271611 [common] Applying overlay to NFS
204 14:57:37.271682 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895655/compress-overlay-w8y70k46/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6895655/extract-nfsrootfs-5oq_147n
205 14:57:37.706247 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 14:57:37.706409 start: 1.5.6 configure-preseed-file (timeout 00:09:41) [common]
207 14:57:37.706507 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 14:57:37.706597 start: 1.5.7 compress-ramdisk (timeout 00:09:41) [common]
209 14:57:37.706681 Building ramdisk /var/lib/lava/dispatcher/tmp/6895655/extract-overlay-ramdisk-eigvsvzx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6895655/extract-overlay-ramdisk-eigvsvzx/ramdisk
210 14:57:37.739843 >> 24431 blocks
211 14:57:38.205498 rename /var/lib/lava/dispatcher/tmp/6895655/extract-overlay-ramdisk-eigvsvzx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
212 14:57:38.205895 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 14:57:38.206020 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
214 14:57:38.206126 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
215 14:57:38.206224 No mkimage arch provided, not using FIT.
216 14:57:38.206317 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 14:57:38.206399 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 14:57:38.206497 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
219 14:57:38.206592 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
220 14:57:38.206671 No LXC device requested
221 14:57:38.206754 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 14:57:38.206840 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
223 14:57:38.206921 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 14:57:38.206994 Checking files for TFTP limit of 4294967296 bytes.
225 14:57:38.207392 end: 1 tftp-deploy (duration 00:00:20) [common]
226 14:57:38.207514 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 14:57:38.207607 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 14:57:38.207731 substitutions:
229 14:57:38.207799 - {DTB}: None
230 14:57:38.207864 - {INITRD}: 6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
231 14:57:38.207926 - {KERNEL}: 6895655/tftp-deploy-6w3f2zh4/kernel/bzImage
232 14:57:38.207985 - {LAVA_MAC}: None
233 14:57:38.208043 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6895655/extract-nfsrootfs-5oq_147n
234 14:57:38.208103 - {NFS_SERVER_IP}: 192.168.201.1
235 14:57:38.208159 - {PRESEED_CONFIG}: None
236 14:57:38.208215 - {PRESEED_LOCAL}: None
237 14:57:38.208271 - {RAMDISK}: 6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
238 14:57:38.208326 - {ROOT_PART}: None
239 14:57:38.208382 - {ROOT}: None
240 14:57:38.208437 - {SERVER_IP}: 192.168.201.1
241 14:57:38.208492 - {TEE}: None
242 14:57:38.208546 Parsed boot commands:
243 14:57:38.208601 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 14:57:38.208753 Parsed boot commands: tftpboot 192.168.201.1 6895655/tftp-deploy-6w3f2zh4/kernel/bzImage 6895655/tftp-deploy-6w3f2zh4/kernel/cmdline 6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
245 14:57:38.208846 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 14:57:38.208934 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 14:57:38.209025 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 14:57:38.209143 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 14:57:38.209213 Not connected, no need to disconnect.
250 14:57:38.209332 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 14:57:38.209428 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 14:57:38.209495 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
253 14:57:38.212185 Setting prompt string to ['lava-test: # ']
254 14:57:38.212465 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 14:57:38.212572 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 14:57:38.212669 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 14:57:38.212760 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 14:57:38.212969 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
259 14:57:38.232049 >> Command sent successfully.
260 14:57:38.233950 Returned 0 in 0 seconds
261 14:57:38.335047 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 14:57:38.336449 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 14:57:38.337139 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 14:57:38.337635 Setting prompt string to 'Starting depthcharge on Helios...'
266 14:57:38.337983 Changing prompt to 'Starting depthcharge on Helios...'
267 14:57:38.338338 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 14:57:38.339532 [Enter `^Ec?' for help]
269 14:57:44.995302
270 14:57:44.995897
271 14:57:45.004793 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 14:57:45.008060 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 14:57:45.014969 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 14:57:45.017756 CPU: AES supported, TXT NOT supported, VT supported
275 14:57:45.024766 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 14:57:45.031125 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 14:57:45.034203 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 14:57:45.037857 VBOOT: Loading verstage.
279 14:57:45.044204 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 14:57:45.047598 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 14:57:45.054324 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 14:57:45.057642 CBFS @ c08000 size 3f8000
283 14:57:45.060463 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 14:57:45.063959 CBFS: Locating 'fallback/verstage'
285 14:57:45.070240 CBFS: Found @ offset 10fb80 size 1072c
286 14:57:45.070765
287 14:57:45.071117
288 14:57:45.080271 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 14:57:45.096510 Probing TPM: . done!
290 14:57:45.099715 TPM ready after 0 ms
291 14:57:45.103244 Connected to device vid:did:rid of 1ae0:0028:00
292 14:57:45.112715 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 14:57:45.116517 Initialized TPM device CR50 revision 0
294 14:57:45.150452 tlcl_send_startup: Startup return code is 0
295 14:57:45.150971 TPM: setup succeeded
296 14:57:45.163583 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 14:57:45.166906 Chrome EC: UHEPI supported
298 14:57:45.170753 Phase 1
299 14:57:45.174198 FMAP: area GBB found @ c05000 (12288 bytes)
300 14:57:45.180458 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 14:57:45.184040 Phase 2
302 14:57:45.184587 Phase 3
303 14:57:45.186649 FMAP: area GBB found @ c05000 (12288 bytes)
304 14:57:45.193447 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 14:57:45.200104 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 14:57:45.203336 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 14:57:45.210134 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 14:57:45.226089 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 14:57:45.229204 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 14:57:45.235971 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 14:57:45.240207 Phase 4
312 14:57:45.243357 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 14:57:45.250027 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 14:57:45.429792 VB2:vb2_rsa_verify_digest() Digest check failed!
315 14:57:45.435931 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 14:57:45.436464 Saving nvdata
317 14:57:45.439639 Reboot requested (10020007)
318 14:57:45.442762 board_reset() called!
319 14:57:45.443296 full_reset() called!
320 14:57:49.962675
321 14:57:49.963218
322 14:57:49.972230 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 14:57:49.975282 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 14:57:49.981812 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 14:57:49.985571 CPU: AES supported, TXT NOT supported, VT supported
326 14:57:49.992121 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 14:57:49.998535 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 14:57:50.001927 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 14:57:50.005068 VBOOT: Loading verstage.
330 14:57:50.012024 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 14:57:50.014694 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 14:57:50.021936 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 14:57:50.022462 CBFS @ c08000 size 3f8000
334 14:57:50.028065 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 14:57:50.031692 CBFS: Locating 'fallback/verstage'
336 14:57:50.038153 CBFS: Found @ offset 10fb80 size 1072c
337 14:57:50.038691
338 14:57:50.039067
339 14:57:50.047624 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 14:57:50.063503 Probing TPM: . done!
341 14:57:50.066888 TPM ready after 0 ms
342 14:57:50.070371 Connected to device vid:did:rid of 1ae0:0028:00
343 14:57:50.080466 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 14:57:50.083686 Initialized TPM device CR50 revision 0
345 14:57:50.117915 tlcl_send_startup: Startup return code is 0
346 14:57:50.118441 TPM: setup succeeded
347 14:57:50.130600 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 14:57:50.134534 Chrome EC: UHEPI supported
349 14:57:50.137942 Phase 1
350 14:57:50.141067 FMAP: area GBB found @ c05000 (12288 bytes)
351 14:57:50.147413 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 14:57:50.153975 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 14:57:50.157590 Recovery requested (1009000e)
354 14:57:50.163636 Saving nvdata
355 14:57:50.169635 tlcl_extend: response is 0
356 14:57:50.178370 tlcl_extend: response is 0
357 14:57:50.185427 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 14:57:50.188652 CBFS @ c08000 size 3f8000
359 14:57:50.195183 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 14:57:50.198261 CBFS: Locating 'fallback/romstage'
361 14:57:50.201295 CBFS: Found @ offset 80 size 145fc
362 14:57:50.205100 Accumulated console time in verstage 98 ms
363 14:57:50.205676
364 14:57:50.208194
365 14:57:50.218080 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 14:57:50.225076 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 14:57:50.227738 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 14:57:50.230975 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 14:57:50.237980 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 14:57:50.240744 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 14:57:50.244531 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 14:57:50.247659 TCO_STS: 0000 0000
373 14:57:50.250730 GEN_PMCON: e0015238 00000200
374 14:57:50.254076 GBLRST_CAUSE: 00000000 00000000
375 14:57:50.254515 prev_sleep_state 5
376 14:57:50.258089 Boot Count incremented to 26887
377 14:57:50.264848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 14:57:50.268425 CBFS @ c08000 size 3f8000
379 14:57:50.275007 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 14:57:50.275541 CBFS: Locating 'fspm.bin'
381 14:57:50.281470 CBFS: Found @ offset 5ffc0 size 71000
382 14:57:50.284371 Chrome EC: UHEPI supported
383 14:57:50.291485 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 14:57:50.294966 Probing TPM: done!
385 14:57:50.301547 Connected to device vid:did:rid of 1ae0:0028:00
386 14:57:50.311304 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 14:57:50.317339 Initialized TPM device CR50 revision 0
388 14:57:50.326410 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 14:57:50.336432 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 14:57:50.336981 MRC cache found, size 1948
391 14:57:50.339712 bootmode is set to: 2
392 14:57:50.342980 PRMRR disabled by config.
393 14:57:50.346191 SPD INDEX = 1
394 14:57:50.349184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 14:57:50.352825 CBFS @ c08000 size 3f8000
396 14:57:50.359502 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 14:57:50.360033 CBFS: Locating 'spd.bin'
398 14:57:50.362301 CBFS: Found @ offset 5fb80 size 400
399 14:57:50.366190 SPD: module type is LPDDR3
400 14:57:50.369349 SPD: module part is
401 14:57:50.376020 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 14:57:50.378682 SPD: device width 4 bits, bus width 8 bits
403 14:57:50.382169 SPD: module size is 4096 MB (per channel)
404 14:57:50.385674 memory slot: 0 configuration done.
405 14:57:50.392350 memory slot: 2 configuration done.
406 14:57:50.440408 CBMEM:
407 14:57:50.443764 IMD: root @ 99fff000 254 entries.
408 14:57:50.446788 IMD: root @ 99ffec00 62 entries.
409 14:57:50.450111 External stage cache:
410 14:57:50.453906 IMD: root @ 9abff000 254 entries.
411 14:57:50.456719 IMD: root @ 9abfec00 62 entries.
412 14:57:50.463633 Chrome EC: clear events_b mask to 0x0000000020004000
413 14:57:50.476249 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 14:57:50.489419 tlcl_write: response is 0
415 14:57:50.498305 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 14:57:50.505172 MRC: TPM MRC hash updated successfully.
417 14:57:50.505744 2 DIMMs found
418 14:57:50.508243 SMM Memory Map
419 14:57:50.511715 SMRAM : 0x9a000000 0x1000000
420 14:57:50.514482 Subregion 0: 0x9a000000 0xa00000
421 14:57:50.517665 Subregion 1: 0x9aa00000 0x200000
422 14:57:50.521047 Subregion 2: 0x9ac00000 0x400000
423 14:57:50.524510 top_of_ram = 0x9a000000
424 14:57:50.527432 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 14:57:50.534390 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 14:57:50.537478 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 14:57:50.544532 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 14:57:50.547533 CBFS @ c08000 size 3f8000
429 14:57:50.551050 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 14:57:50.557468 CBFS: Locating 'fallback/postcar'
431 14:57:50.560695 CBFS: Found @ offset 107000 size 4b44
432 14:57:50.567260 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 14:57:50.577449 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 14:57:50.580410 Processing 180 relocs. Offset value of 0x97c0c000
435 14:57:50.589082 Accumulated console time in romstage 286 ms
436 14:57:50.589649
437 14:57:50.590000
438 14:57:50.599022 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 14:57:50.605631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 14:57:50.608987 CBFS @ c08000 size 3f8000
441 14:57:50.615420 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 14:57:50.618853 CBFS: Locating 'fallback/ramstage'
443 14:57:50.622202 CBFS: Found @ offset 43380 size 1b9e8
444 14:57:50.628406 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 14:57:50.660715 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 14:57:50.667146 Processing 3976 relocs. Offset value of 0x98db0000
447 14:57:50.670956 Accumulated console time in postcar 52 ms
448 14:57:50.671486
449 14:57:50.671831
450 14:57:50.680278 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 14:57:50.687350 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 14:57:50.689934 WARNING: RO_VPD is uninitialized or empty.
453 14:57:50.693362 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 14:57:50.700311 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 14:57:50.700849 Normal boot.
456 14:57:50.706782 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 14:57:50.709918 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 14:57:50.713163 CBFS @ c08000 size 3f8000
459 14:57:50.720176 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 14:57:50.723185 CBFS: Locating 'cpu_microcode_blob.bin'
461 14:57:50.726432 CBFS: Found @ offset 14700 size 2ec00
462 14:57:50.732949 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 14:57:50.733518 Skip microcode update
464 14:57:50.739597 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 14:57:50.742831 CBFS @ c08000 size 3f8000
466 14:57:50.746268 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 14:57:50.749458 CBFS: Locating 'fsps.bin'
468 14:57:50.752951 CBFS: Found @ offset d1fc0 size 35000
469 14:57:50.779119 Detected 4 core, 8 thread CPU.
470 14:57:50.782196 Setting up SMI for CPU
471 14:57:50.785535 IED base = 0x9ac00000
472 14:57:50.788626 IED size = 0x00400000
473 14:57:50.789062 Will perform SMM setup.
474 14:57:50.795271 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 14:57:50.801868 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 14:57:50.808676 Processing 16 relocs. Offset value of 0x00030000
477 14:57:50.811483 Attempting to start 7 APs
478 14:57:50.815073 Waiting for 10ms after sending INIT.
479 14:57:50.828536 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
480 14:57:50.829081 done.
481 14:57:50.832132 AP: slot 2 apic_id 3.
482 14:57:50.835575 AP: slot 3 apic_id 2.
483 14:57:50.836123 AP: slot 7 apic_id 6.
484 14:57:50.838555 AP: slot 6 apic_id 7.
485 14:57:50.841637 AP: slot 4 apic_id 5.
486 14:57:50.842073 AP: slot 5 apic_id 4.
487 14:57:50.848662 Waiting for 2nd SIPI to complete...done.
488 14:57:50.855171 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 14:57:50.861673 Processing 13 relocs. Offset value of 0x00038000
490 14:57:50.867843 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 14:57:50.870930 Installing SMM handler to 0x9a000000
492 14:57:50.878260 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 14:57:50.884409 Processing 658 relocs. Offset value of 0x9a010000
494 14:57:50.891225 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 14:57:50.897788 Processing 13 relocs. Offset value of 0x9a008000
496 14:57:50.901056 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 14:57:50.907639 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 14:57:50.914031 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 14:57:50.917779 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 14:57:50.924516 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 14:57:50.930976 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 14:57:50.937392 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 14:57:50.943464 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 14:57:50.946940 Clearing SMI status registers
505 14:57:50.947487 SMI_STS: PM1
506 14:57:50.950750 PM1_STS: PWRBTN
507 14:57:50.951291 TCO_STS: SECOND_TO
508 14:57:50.953587 New SMBASE 0x9a000000
509 14:57:50.957372 In relocation handler: CPU 0
510 14:57:50.960119 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 14:57:50.966381 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 14:57:50.966830 Relocation complete.
513 14:57:50.969797 New SMBASE 0x99fffc00
514 14:57:50.973442 In relocation handler: CPU 1
515 14:57:50.976551 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
516 14:57:50.983122 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 14:57:50.983732 Relocation complete.
518 14:57:50.986781 New SMBASE 0x99fff400
519 14:57:50.990054 In relocation handler: CPU 3
520 14:57:50.993235 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
521 14:57:50.999381 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 14:57:50.999931 Relocation complete.
523 14:57:51.002848 New SMBASE 0x99fff800
524 14:57:51.006012 In relocation handler: CPU 2
525 14:57:51.009400 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
526 14:57:51.016048 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 14:57:51.016592 Relocation complete.
528 14:57:51.019238 New SMBASE 0x99ffe800
529 14:57:51.022482 In relocation handler: CPU 6
530 14:57:51.025736 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
531 14:57:51.032523 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 14:57:51.033129 Relocation complete.
533 14:57:51.035740 New SMBASE 0x99ffe400
534 14:57:51.039066 In relocation handler: CPU 7
535 14:57:51.042237 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
536 14:57:51.048844 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 14:57:51.049437 Relocation complete.
538 14:57:51.052104 New SMBASE 0x99fff000
539 14:57:51.055277 In relocation handler: CPU 4
540 14:57:51.058375 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
541 14:57:51.065026 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 14:57:51.065590 Relocation complete.
543 14:57:51.068504 New SMBASE 0x99ffec00
544 14:57:51.071941 In relocation handler: CPU 5
545 14:57:51.075418 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
546 14:57:51.081247 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 14:57:51.081826 Relocation complete.
548 14:57:51.085057 Initializing CPU #0
549 14:57:51.088586 CPU: vendor Intel device 806ec
550 14:57:51.091528 CPU: family 06, model 8e, stepping 0c
551 14:57:51.094886 Clearing out pending MCEs
552 14:57:51.098340 Setting up local APIC...
553 14:57:51.098875 apic_id: 0x00 done.
554 14:57:51.101222 Turbo is available but hidden
555 14:57:51.104609 Turbo is available and visible
556 14:57:51.108168 VMX status: enabled
557 14:57:51.111531 IA32_FEATURE_CONTROL status: locked
558 14:57:51.114212 Skip microcode update
559 14:57:51.114697 CPU #0 initialized
560 14:57:51.117954 Initializing CPU #1
561 14:57:51.118494 Initializing CPU #5
562 14:57:51.121323 Initializing CPU #4
563 14:57:51.124312 CPU: vendor Intel device 806ec
564 14:57:51.127557 CPU: family 06, model 8e, stepping 0c
565 14:57:51.130974 CPU: vendor Intel device 806ec
566 14:57:51.134578 CPU: family 06, model 8e, stepping 0c
567 14:57:51.137509 Clearing out pending MCEs
568 14:57:51.140832 Clearing out pending MCEs
569 14:57:51.143656 Setting up local APIC...
570 14:57:51.144097 Initializing CPU #6
571 14:57:51.147631 Initializing CPU #7
572 14:57:51.150770 CPU: vendor Intel device 806ec
573 14:57:51.153937 CPU: family 06, model 8e, stepping 0c
574 14:57:51.157592 Initializing CPU #3
575 14:57:51.158152 Initializing CPU #2
576 14:57:51.160363 CPU: vendor Intel device 806ec
577 14:57:51.164254 CPU: family 06, model 8e, stepping 0c
578 14:57:51.167422 CPU: vendor Intel device 806ec
579 14:57:51.170247 CPU: family 06, model 8e, stepping 0c
580 14:57:51.173792 Clearing out pending MCEs
581 14:57:51.176929 Clearing out pending MCEs
582 14:57:51.180649 Setting up local APIC...
583 14:57:51.183701 CPU: vendor Intel device 806ec
584 14:57:51.186982 CPU: family 06, model 8e, stepping 0c
585 14:57:51.190317 Clearing out pending MCEs
586 14:57:51.193867 CPU: vendor Intel device 806ec
587 14:57:51.197168 CPU: family 06, model 8e, stepping 0c
588 14:57:51.200422 Clearing out pending MCEs
589 14:57:51.200962 Clearing out pending MCEs
590 14:57:51.203436 Setting up local APIC...
591 14:57:51.206634 Setting up local APIC...
592 14:57:51.209803 apic_id: 0x04 done.
593 14:57:51.210341 Setting up local APIC...
594 14:57:51.213403 apic_id: 0x06 done.
595 14:57:51.216849 Setting up local APIC...
596 14:57:51.217421 VMX status: enabled
597 14:57:51.220130 apic_id: 0x05 done.
598 14:57:51.223460 IA32_FEATURE_CONTROL status: locked
599 14:57:51.226405 VMX status: enabled
600 14:57:51.226958 Skip microcode update
601 14:57:51.230161 IA32_FEATURE_CONTROL status: locked
602 14:57:51.233087 CPU #5 initialized
603 14:57:51.236522 Skip microcode update
604 14:57:51.237064 VMX status: enabled
605 14:57:51.240094 apic_id: 0x07 done.
606 14:57:51.243035 IA32_FEATURE_CONTROL status: locked
607 14:57:51.246007 VMX status: enabled
608 14:57:51.246441 Skip microcode update
609 14:57:51.249520 IA32_FEATURE_CONTROL status: locked
610 14:57:51.252955 CPU #7 initialized
611 14:57:51.256161 Skip microcode update
612 14:57:51.256703 CPU #4 initialized
613 14:57:51.259356 CPU #6 initialized
614 14:57:51.262842 apic_id: 0x02 done.
615 14:57:51.263379 apic_id: 0x03 done.
616 14:57:51.266068 VMX status: enabled
617 14:57:51.266503 VMX status: enabled
618 14:57:51.272442 IA32_FEATURE_CONTROL status: locked
619 14:57:51.276060 IA32_FEATURE_CONTROL status: locked
620 14:57:51.276613 Skip microcode update
621 14:57:51.279148 Skip microcode update
622 14:57:51.282224 CPU #3 initialized
623 14:57:51.282662 CPU #2 initialized
624 14:57:51.285621 Setting up local APIC...
625 14:57:51.289048 apic_id: 0x01 done.
626 14:57:51.289512 VMX status: enabled
627 14:57:51.292639 IA32_FEATURE_CONTROL status: locked
628 14:57:51.295771 Skip microcode update
629 14:57:51.298840 CPU #1 initialized
630 14:57:51.302404 bsp_do_flight_plan done after 452 msecs.
631 14:57:51.305367 CPU: frequency set to 4200 MHz
632 14:57:51.305909 Enabling SMIs.
633 14:57:51.308730 Locking SMM.
634 14:57:51.323123 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 14:57:51.326189 CBFS @ c08000 size 3f8000
636 14:57:51.333225 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 14:57:51.333868 CBFS: Locating 'vbt.bin'
638 14:57:51.336480 CBFS: Found @ offset 5f5c0 size 499
639 14:57:51.342864 Found a VBT of 4608 bytes after decompression
640 14:57:51.528827 Display FSP Version Info HOB
641 14:57:51.531886 Reference Code - CPU = 9.0.1e.30
642 14:57:51.535748 uCode Version = 0.0.0.ca
643 14:57:51.538626 TXT ACM version = ff.ff.ff.ffff
644 14:57:51.541900 Display FSP Version Info HOB
645 14:57:51.545059 Reference Code - ME = 9.0.1e.30
646 14:57:51.548482 MEBx version = 0.0.0.0
647 14:57:51.551233 ME Firmware Version = Consumer SKU
648 14:57:51.554838 Display FSP Version Info HOB
649 14:57:51.558188 Reference Code - CML PCH = 9.0.1e.30
650 14:57:51.560946 PCH-CRID Status = Disabled
651 14:57:51.564664 PCH-CRID Original Value = ff.ff.ff.ffff
652 14:57:51.567545 PCH-CRID New Value = ff.ff.ff.ffff
653 14:57:51.571038 OPROM - RST - RAID = ff.ff.ff.ffff
654 14:57:51.574588 ChipsetInit Base Version = ff.ff.ff.ffff
655 14:57:51.580926 ChipsetInit Oem Version = ff.ff.ff.ffff
656 14:57:51.581488 Display FSP Version Info HOB
657 14:57:51.587211 Reference Code - SA - System Agent = 9.0.1e.30
658 14:57:51.590470 Reference Code - MRC = 0.7.1.6c
659 14:57:51.593876 SA - PCIe Version = 9.0.1e.30
660 14:57:51.597524 SA-CRID Status = Disabled
661 14:57:51.600432 SA-CRID Original Value = 0.0.0.c
662 14:57:51.600875 SA-CRID New Value = 0.0.0.c
663 14:57:51.603813 OPROM - VBIOS = ff.ff.ff.ffff
664 14:57:51.607630 RTC Init
665 14:57:51.610884 Set power on after power failure.
666 14:57:51.611416 Disabling Deep S3
667 14:57:51.614212 Disabling Deep S3
668 14:57:51.617449 Disabling Deep S4
669 14:57:51.617981 Disabling Deep S4
670 14:57:51.620838 Disabling Deep S5
671 14:57:51.621428 Disabling Deep S5
672 14:57:51.626750 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
673 14:57:51.630614 Enumerating buses...
674 14:57:51.633725 Show all devs... Before device enumeration.
675 14:57:51.637141 Root Device: enabled 1
676 14:57:51.640375 CPU_CLUSTER: 0: enabled 1
677 14:57:51.640905 DOMAIN: 0000: enabled 1
678 14:57:51.643595 APIC: 00: enabled 1
679 14:57:51.646570 PCI: 00:00.0: enabled 1
680 14:57:51.649637 PCI: 00:02.0: enabled 1
681 14:57:51.650065 PCI: 00:04.0: enabled 0
682 14:57:51.652900 PCI: 00:05.0: enabled 0
683 14:57:51.655954 PCI: 00:12.0: enabled 1
684 14:57:51.659188 PCI: 00:12.5: enabled 0
685 14:57:51.659617 PCI: 00:12.6: enabled 0
686 14:57:51.662718 PCI: 00:14.0: enabled 1
687 14:57:51.666146 PCI: 00:14.1: enabled 0
688 14:57:51.666574 PCI: 00:14.3: enabled 1
689 14:57:51.669417 PCI: 00:14.5: enabled 0
690 14:57:51.672293 PCI: 00:15.0: enabled 1
691 14:57:51.676081 PCI: 00:15.1: enabled 1
692 14:57:51.676615 PCI: 00:15.2: enabled 0
693 14:57:51.679401 PCI: 00:15.3: enabled 0
694 14:57:51.682364 PCI: 00:16.0: enabled 1
695 14:57:51.685381 PCI: 00:16.1: enabled 0
696 14:57:51.685811 PCI: 00:16.2: enabled 0
697 14:57:51.688723 PCI: 00:16.3: enabled 0
698 14:57:51.691892 PCI: 00:16.4: enabled 0
699 14:57:51.695463 PCI: 00:16.5: enabled 0
700 14:57:51.696027 PCI: 00:17.0: enabled 1
701 14:57:51.698874 PCI: 00:19.0: enabled 1
702 14:57:51.701872 PCI: 00:19.1: enabled 0
703 14:57:51.705384 PCI: 00:19.2: enabled 0
704 14:57:51.705922 PCI: 00:1a.0: enabled 0
705 14:57:51.709026 PCI: 00:1c.0: enabled 0
706 14:57:51.712037 PCI: 00:1c.1: enabled 0
707 14:57:51.715135 PCI: 00:1c.2: enabled 0
708 14:57:51.715565 PCI: 00:1c.3: enabled 0
709 14:57:51.718506 PCI: 00:1c.4: enabled 0
710 14:57:51.721868 PCI: 00:1c.5: enabled 0
711 14:57:51.725029 PCI: 00:1c.6: enabled 0
712 14:57:51.725581 PCI: 00:1c.7: enabled 0
713 14:57:51.728397 PCI: 00:1d.0: enabled 1
714 14:57:51.731662 PCI: 00:1d.1: enabled 0
715 14:57:51.735009 PCI: 00:1d.2: enabled 0
716 14:57:51.735530 PCI: 00:1d.3: enabled 0
717 14:57:51.737926 PCI: 00:1d.4: enabled 0
718 14:57:51.741535 PCI: 00:1d.5: enabled 1
719 14:57:51.744264 PCI: 00:1e.0: enabled 1
720 14:57:51.744688 PCI: 00:1e.1: enabled 0
721 14:57:51.747538 PCI: 00:1e.2: enabled 1
722 14:57:51.751517 PCI: 00:1e.3: enabled 1
723 14:57:51.754057 PCI: 00:1f.0: enabled 1
724 14:57:51.754489 PCI: 00:1f.1: enabled 1
725 14:57:51.757709 PCI: 00:1f.2: enabled 1
726 14:57:51.760810 PCI: 00:1f.3: enabled 1
727 14:57:51.764036 PCI: 00:1f.4: enabled 1
728 14:57:51.764468 PCI: 00:1f.5: enabled 1
729 14:57:51.767218 PCI: 00:1f.6: enabled 0
730 14:57:51.770780 USB0 port 0: enabled 1
731 14:57:51.771313 I2C: 00:15: enabled 1
732 14:57:51.773939 I2C: 00:5d: enabled 1
733 14:57:51.777165 GENERIC: 0.0: enabled 1
734 14:57:51.780699 I2C: 00:1a: enabled 1
735 14:57:51.781237 I2C: 00:38: enabled 1
736 14:57:51.783587 I2C: 00:39: enabled 1
737 14:57:51.786929 I2C: 00:3a: enabled 1
738 14:57:51.787367 I2C: 00:3b: enabled 1
739 14:57:51.790398 PCI: 00:00.0: enabled 1
740 14:57:51.793360 SPI: 00: enabled 1
741 14:57:51.793794 SPI: 01: enabled 1
742 14:57:51.796761 PNP: 0c09.0: enabled 1
743 14:57:51.799953 USB2 port 0: enabled 1
744 14:57:51.800499 USB2 port 1: enabled 1
745 14:57:51.803493 USB2 port 2: enabled 0
746 14:57:51.807276 USB2 port 3: enabled 0
747 14:57:51.807821 USB2 port 5: enabled 0
748 14:57:51.809778 USB2 port 6: enabled 1
749 14:57:51.813321 USB2 port 9: enabled 1
750 14:57:51.816631 USB3 port 0: enabled 1
751 14:57:51.817170 USB3 port 1: enabled 1
752 14:57:51.819490 USB3 port 2: enabled 1
753 14:57:51.823100 USB3 port 3: enabled 1
754 14:57:51.823640 USB3 port 4: enabled 0
755 14:57:51.826182 APIC: 01: enabled 1
756 14:57:51.829859 APIC: 03: enabled 1
757 14:57:51.830406 APIC: 02: enabled 1
758 14:57:51.832887 APIC: 05: enabled 1
759 14:57:51.835793 APIC: 04: enabled 1
760 14:57:51.836229 APIC: 07: enabled 1
761 14:57:51.839327 APIC: 06: enabled 1
762 14:57:51.842594 Compare with tree...
763 14:57:51.843121 Root Device: enabled 1
764 14:57:51.846187 CPU_CLUSTER: 0: enabled 1
765 14:57:51.849100 APIC: 00: enabled 1
766 14:57:51.849559 APIC: 01: enabled 1
767 14:57:51.852223 APIC: 03: enabled 1
768 14:57:51.855569 APIC: 02: enabled 1
769 14:57:51.858609 APIC: 05: enabled 1
770 14:57:51.859137 APIC: 04: enabled 1
771 14:57:51.861770 APIC: 07: enabled 1
772 14:57:51.865657 APIC: 06: enabled 1
773 14:57:51.866224 DOMAIN: 0000: enabled 1
774 14:57:51.868689 PCI: 00:00.0: enabled 1
775 14:57:51.871706 PCI: 00:02.0: enabled 1
776 14:57:51.875361 PCI: 00:04.0: enabled 0
777 14:57:51.878909 PCI: 00:05.0: enabled 0
778 14:57:51.879442 PCI: 00:12.0: enabled 1
779 14:57:51.881540 PCI: 00:12.5: enabled 0
780 14:57:51.884818 PCI: 00:12.6: enabled 0
781 14:57:51.888273 PCI: 00:14.0: enabled 1
782 14:57:51.891566 USB0 port 0: enabled 1
783 14:57:51.892129 USB2 port 0: enabled 1
784 14:57:51.894997 USB2 port 1: enabled 1
785 14:57:51.897985 USB2 port 2: enabled 0
786 14:57:51.901240 USB2 port 3: enabled 0
787 14:57:51.905012 USB2 port 5: enabled 0
788 14:57:51.907812 USB2 port 6: enabled 1
789 14:57:51.908352 USB2 port 9: enabled 1
790 14:57:51.911323 USB3 port 0: enabled 1
791 14:57:51.914515 USB3 port 1: enabled 1
792 14:57:51.917774 USB3 port 2: enabled 1
793 14:57:51.920848 USB3 port 3: enabled 1
794 14:57:51.924387 USB3 port 4: enabled 0
795 14:57:51.924942 PCI: 00:14.1: enabled 0
796 14:57:51.927266 PCI: 00:14.3: enabled 1
797 14:57:51.930938 PCI: 00:14.5: enabled 0
798 14:57:51.934175 PCI: 00:15.0: enabled 1
799 14:57:51.937415 I2C: 00:15: enabled 1
800 14:57:51.937958 PCI: 00:15.1: enabled 1
801 14:57:51.941063 I2C: 00:5d: enabled 1
802 14:57:51.943815 GENERIC: 0.0: enabled 1
803 14:57:51.947311 PCI: 00:15.2: enabled 0
804 14:57:51.950607 PCI: 00:15.3: enabled 0
805 14:57:51.951154 PCI: 00:16.0: enabled 1
806 14:57:51.953773 PCI: 00:16.1: enabled 0
807 14:57:51.956682 PCI: 00:16.2: enabled 0
808 14:57:51.960261 PCI: 00:16.3: enabled 0
809 14:57:51.963549 PCI: 00:16.4: enabled 0
810 14:57:51.964097 PCI: 00:16.5: enabled 0
811 14:57:51.966431 PCI: 00:17.0: enabled 1
812 14:57:51.970270 PCI: 00:19.0: enabled 1
813 14:57:51.973184 I2C: 00:1a: enabled 1
814 14:57:51.976598 I2C: 00:38: enabled 1
815 14:57:51.977134 I2C: 00:39: enabled 1
816 14:57:51.980116 I2C: 00:3a: enabled 1
817 14:57:51.983193 I2C: 00:3b: enabled 1
818 14:57:51.985998 PCI: 00:19.1: enabled 0
819 14:57:51.986437 PCI: 00:19.2: enabled 0
820 14:57:51.989319 PCI: 00:1a.0: enabled 0
821 14:57:51.992696 PCI: 00:1c.0: enabled 0
822 14:57:51.996258 PCI: 00:1c.1: enabled 0
823 14:57:51.999194 PCI: 00:1c.2: enabled 0
824 14:57:52.002817 PCI: 00:1c.3: enabled 0
825 14:57:52.003356 PCI: 00:1c.4: enabled 0
826 14:57:52.006236 PCI: 00:1c.5: enabled 0
827 14:57:52.009640 PCI: 00:1c.6: enabled 0
828 14:57:52.012670 PCI: 00:1c.7: enabled 0
829 14:57:52.015986 PCI: 00:1d.0: enabled 1
830 14:57:52.016557 PCI: 00:1d.1: enabled 0
831 14:57:52.018941 PCI: 00:1d.2: enabled 0
832 14:57:52.022221 PCI: 00:1d.3: enabled 0
833 14:57:52.025530 PCI: 00:1d.4: enabled 0
834 14:57:52.028792 PCI: 00:1d.5: enabled 1
835 14:57:52.029229 PCI: 00:00.0: enabled 1
836 14:57:52.032533 PCI: 00:1e.0: enabled 1
837 14:57:52.035665 PCI: 00:1e.1: enabled 0
838 14:57:52.038767 PCI: 00:1e.2: enabled 1
839 14:57:52.039309 SPI: 00: enabled 1
840 14:57:52.042163 PCI: 00:1e.3: enabled 1
841 14:57:52.045048 SPI: 01: enabled 1
842 14:57:52.048555 PCI: 00:1f.0: enabled 1
843 14:57:52.051862 PNP: 0c09.0: enabled 1
844 14:57:52.052400 PCI: 00:1f.1: enabled 1
845 14:57:52.054932 PCI: 00:1f.2: enabled 1
846 14:57:52.058717 PCI: 00:1f.3: enabled 1
847 14:57:52.061706 PCI: 00:1f.4: enabled 1
848 14:57:52.064975 PCI: 00:1f.5: enabled 1
849 14:57:52.065552 PCI: 00:1f.6: enabled 0
850 14:57:52.068233 Root Device scanning...
851 14:57:52.071521 scan_static_bus for Root Device
852 14:57:52.074514 CPU_CLUSTER: 0 enabled
853 14:57:52.078156 DOMAIN: 0000 enabled
854 14:57:52.078703 DOMAIN: 0000 scanning...
855 14:57:52.081348 PCI: pci_scan_bus for bus 00
856 14:57:52.084542 PCI: 00:00.0 [8086/0000] ops
857 14:57:52.087515 PCI: 00:00.0 [8086/9b61] enabled
858 14:57:52.091253 PCI: 00:02.0 [8086/0000] bus ops
859 14:57:52.094156 PCI: 00:02.0 [8086/9b41] enabled
860 14:57:52.097239 PCI: 00:04.0 [8086/1903] disabled
861 14:57:52.100688 PCI: 00:08.0 [8086/1911] enabled
862 14:57:52.103903 PCI: 00:12.0 [8086/02f9] enabled
863 14:57:52.107392 PCI: 00:14.0 [8086/0000] bus ops
864 14:57:52.110856 PCI: 00:14.0 [8086/02ed] enabled
865 14:57:52.114179 PCI: 00:14.2 [8086/02ef] enabled
866 14:57:52.117300 PCI: 00:14.3 [8086/02f0] enabled
867 14:57:52.120728 PCI: 00:15.0 [8086/0000] bus ops
868 14:57:52.123817 PCI: 00:15.0 [8086/02e8] enabled
869 14:57:52.126962 PCI: 00:15.1 [8086/0000] bus ops
870 14:57:52.133713 PCI: 00:15.1 [8086/02e9] enabled
871 14:57:52.134255 PCI: 00:16.0 [8086/0000] ops
872 14:57:52.136767 PCI: 00:16.0 [8086/02e0] enabled
873 14:57:52.139774 PCI: 00:17.0 [8086/0000] ops
874 14:57:52.143203 PCI: 00:17.0 [8086/02d3] enabled
875 14:57:52.146322 PCI: 00:19.0 [8086/0000] bus ops
876 14:57:52.149765 PCI: 00:19.0 [8086/02c5] enabled
877 14:57:52.153421 PCI: 00:1d.0 [8086/0000] bus ops
878 14:57:52.156358 PCI: 00:1d.0 [8086/02b0] enabled
879 14:57:52.162865 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 14:57:52.166391 PCI: 00:1e.0 [8086/0000] ops
881 14:57:52.169366 PCI: 00:1e.0 [8086/02a8] enabled
882 14:57:52.172938 PCI: 00:1e.2 [8086/0000] bus ops
883 14:57:52.176500 PCI: 00:1e.2 [8086/02aa] enabled
884 14:57:52.179244 PCI: 00:1e.3 [8086/0000] bus ops
885 14:57:52.182719 PCI: 00:1e.3 [8086/02ab] enabled
886 14:57:52.185974 PCI: 00:1f.0 [8086/0000] bus ops
887 14:57:52.189365 PCI: 00:1f.0 [8086/0284] enabled
888 14:57:52.195873 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 14:57:52.202263 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 14:57:52.205925 PCI: 00:1f.3 [8086/0000] bus ops
891 14:57:52.208860 PCI: 00:1f.3 [8086/02c8] enabled
892 14:57:52.212083 PCI: 00:1f.4 [8086/0000] bus ops
893 14:57:52.215449 PCI: 00:1f.4 [8086/02a3] enabled
894 14:57:52.218656 PCI: 00:1f.5 [8086/0000] bus ops
895 14:57:52.221853 PCI: 00:1f.5 [8086/02a4] enabled
896 14:57:52.225226 PCI: Leftover static devices:
897 14:57:52.225789 PCI: 00:05.0
898 14:57:52.226137 PCI: 00:12.5
899 14:57:52.228350 PCI: 00:12.6
900 14:57:52.228787 PCI: 00:14.1
901 14:57:52.231507 PCI: 00:14.5
902 14:57:52.231940 PCI: 00:15.2
903 14:57:52.235021 PCI: 00:15.3
904 14:57:52.235551 PCI: 00:16.1
905 14:57:52.235897 PCI: 00:16.2
906 14:57:52.238052 PCI: 00:16.3
907 14:57:52.238488 PCI: 00:16.4
908 14:57:52.241649 PCI: 00:16.5
909 14:57:52.242183 PCI: 00:19.1
910 14:57:52.242534 PCI: 00:19.2
911 14:57:52.244689 PCI: 00:1a.0
912 14:57:52.245126 PCI: 00:1c.0
913 14:57:52.248343 PCI: 00:1c.1
914 14:57:52.248872 PCI: 00:1c.2
915 14:57:52.251240 PCI: 00:1c.3
916 14:57:52.251775 PCI: 00:1c.4
917 14:57:52.252123 PCI: 00:1c.5
918 14:57:52.254802 PCI: 00:1c.6
919 14:57:52.255333 PCI: 00:1c.7
920 14:57:52.258018 PCI: 00:1d.1
921 14:57:52.258550 PCI: 00:1d.2
922 14:57:52.258898 PCI: 00:1d.3
923 14:57:52.260919 PCI: 00:1d.4
924 14:57:52.261463 PCI: 00:1d.5
925 14:57:52.264512 PCI: 00:1e.1
926 14:57:52.265040 PCI: 00:1f.1
927 14:57:52.267294 PCI: 00:1f.2
928 14:57:52.267729 PCI: 00:1f.6
929 14:57:52.271004 PCI: Check your devicetree.cb.
930 14:57:52.273713 PCI: 00:02.0 scanning...
931 14:57:52.277359 scan_generic_bus for PCI: 00:02.0
932 14:57:52.280329 scan_generic_bus for PCI: 00:02.0 done
933 14:57:52.287112 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
934 14:57:52.289889 PCI: 00:14.0 scanning...
935 14:57:52.293546 scan_static_bus for PCI: 00:14.0
936 14:57:52.294080 USB0 port 0 enabled
937 14:57:52.296905 USB0 port 0 scanning...
938 14:57:52.300009 scan_static_bus for USB0 port 0
939 14:57:52.303118 USB2 port 0 enabled
940 14:57:52.303554 USB2 port 1 enabled
941 14:57:52.306561 USB2 port 2 disabled
942 14:57:52.309945 USB2 port 3 disabled
943 14:57:52.310378 USB2 port 5 disabled
944 14:57:52.312890 USB2 port 6 enabled
945 14:57:52.316601 USB2 port 9 enabled
946 14:57:52.317134 USB3 port 0 enabled
947 14:57:52.319805 USB3 port 1 enabled
948 14:57:52.320344 USB3 port 2 enabled
949 14:57:52.323285 USB3 port 3 enabled
950 14:57:52.325919 USB3 port 4 disabled
951 14:57:52.326356 USB2 port 0 scanning...
952 14:57:52.329990 scan_static_bus for USB2 port 0
953 14:57:52.336302 scan_static_bus for USB2 port 0 done
954 14:57:52.339693 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
955 14:57:52.342883 USB2 port 1 scanning...
956 14:57:52.345972 scan_static_bus for USB2 port 1
957 14:57:52.349430 scan_static_bus for USB2 port 1 done
958 14:57:52.356058 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
959 14:57:52.359365 USB2 port 6 scanning...
960 14:57:52.362504 scan_static_bus for USB2 port 6
961 14:57:52.366030 scan_static_bus for USB2 port 6 done
962 14:57:52.369132 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
963 14:57:52.372024 USB2 port 9 scanning...
964 14:57:52.375833 scan_static_bus for USB2 port 9
965 14:57:52.379112 scan_static_bus for USB2 port 9 done
966 14:57:52.385514 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
967 14:57:52.388534 USB3 port 0 scanning...
968 14:57:52.392208 scan_static_bus for USB3 port 0
969 14:57:52.394834 scan_static_bus for USB3 port 0 done
970 14:57:52.401550 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
971 14:57:52.401993 USB3 port 1 scanning...
972 14:57:52.404782 scan_static_bus for USB3 port 1
973 14:57:52.411447 scan_static_bus for USB3 port 1 done
974 14:57:52.414697 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
975 14:57:52.417853 USB3 port 2 scanning...
976 14:57:52.421435 scan_static_bus for USB3 port 2
977 14:57:52.424685 scan_static_bus for USB3 port 2 done
978 14:57:52.431213 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
979 14:57:52.434307 USB3 port 3 scanning...
980 14:57:52.437313 scan_static_bus for USB3 port 3
981 14:57:52.440789 scan_static_bus for USB3 port 3 done
982 14:57:52.443948 scan_bus: scanning of bus USB3 port 3 took 9689 usecs
983 14:57:52.450709 scan_static_bus for USB0 port 0 done
984 14:57:52.453903 scan_bus: scanning of bus USB0 port 0 took 155406 usecs
985 14:57:52.457050 scan_static_bus for PCI: 00:14.0 done
986 14:57:52.463209 scan_bus: scanning of bus PCI: 00:14.0 took 173023 usecs
987 14:57:52.466733 PCI: 00:15.0 scanning...
988 14:57:52.469841 scan_generic_bus for PCI: 00:15.0
989 14:57:52.473233 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 14:57:52.479477 scan_generic_bus for PCI: 00:15.0 done
991 14:57:52.483099 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
992 14:57:52.486240 PCI: 00:15.1 scanning...
993 14:57:52.489149 scan_generic_bus for PCI: 00:15.1
994 14:57:52.492846 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 14:57:52.499344 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 14:57:52.502429 scan_generic_bus for PCI: 00:15.1 done
997 14:57:52.508867 scan_bus: scanning of bus PCI: 00:15.1 took 18620 usecs
998 14:57:52.509323 PCI: 00:19.0 scanning...
999 14:57:52.515923 scan_generic_bus for PCI: 00:19.0
1000 14:57:52.519261 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 14:57:52.522088 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 14:57:52.525806 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 14:57:52.532195 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 14:57:52.535515 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 14:57:52.538741 scan_generic_bus for PCI: 00:19.0 done
1006 14:57:52.544935 scan_bus: scanning of bus PCI: 00:19.0 took 30740 usecs
1007 14:57:52.545487 PCI: 00:1d.0 scanning...
1008 14:57:52.551612 do_pci_scan_bridge for PCI: 00:1d.0
1009 14:57:52.552132 PCI: pci_scan_bus for bus 01
1010 14:57:52.555368 PCI: 01:00.0 [1c5c/1327] enabled
1011 14:57:52.561745 Enabling Common Clock Configuration
1012 14:57:52.565236 L1 Sub-State supported from root port 29
1013 14:57:52.568207 L1 Sub-State Support = 0xf
1014 14:57:52.571643 CommonModeRestoreTime = 0x28
1015 14:57:52.575312 Power On Value = 0x16, Power On Scale = 0x0
1016 14:57:52.575843 ASPM: Enabled L1
1017 14:57:52.581589 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
1018 14:57:52.584620 PCI: 00:1e.2 scanning...
1019 14:57:52.587955 scan_generic_bus for PCI: 00:1e.2
1020 14:57:52.591319 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 14:57:52.594852 scan_generic_bus for PCI: 00:1e.2 done
1022 14:57:52.601343 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1023 14:57:52.604292 PCI: 00:1e.3 scanning...
1024 14:57:52.607318 scan_generic_bus for PCI: 00:1e.3
1025 14:57:52.610877 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 14:57:52.613898 scan_generic_bus for PCI: 00:1e.3 done
1027 14:57:52.620497 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1028 14:57:52.623990 PCI: 00:1f.0 scanning...
1029 14:57:52.627450 scan_static_bus for PCI: 00:1f.0
1030 14:57:52.630847 PNP: 0c09.0 enabled
1031 14:57:52.634101 scan_static_bus for PCI: 00:1f.0 done
1032 14:57:52.637186 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1033 14:57:52.640688 PCI: 00:1f.3 scanning...
1034 14:57:52.646918 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1035 14:57:52.649689 PCI: 00:1f.4 scanning...
1036 14:57:52.652859 scan_generic_bus for PCI: 00:1f.4
1037 14:57:52.656450 scan_generic_bus for PCI: 00:1f.4 done
1038 14:57:52.663363 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1039 14:57:52.666547 PCI: 00:1f.5 scanning...
1040 14:57:52.669925 scan_generic_bus for PCI: 00:1f.5
1041 14:57:52.672799 scan_generic_bus for PCI: 00:1f.5 done
1042 14:57:52.679130 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1043 14:57:52.682863 scan_bus: scanning of bus DOMAIN: 0000 took 605100 usecs
1044 14:57:52.689182 scan_static_bus for Root Device done
1045 14:57:52.692202 scan_bus: scanning of bus Root Device took 624987 usecs
1046 14:57:52.695684 done
1047 14:57:52.696181 Chrome EC: UHEPI supported
1048 14:57:52.702153 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 14:57:52.709371 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 14:57:52.715562 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 14:57:52.721813 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 14:57:52.725524 SPI flash protection: WPSW=0 SRP0=1
1053 14:57:52.731896 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 14:57:52.735334 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 14:57:52.738526 found VGA at PCI: 00:02.0
1056 14:57:52.741319 Setting up VGA for PCI: 00:02.0
1057 14:57:52.748189 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 14:57:52.751398 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 14:57:52.754527 Allocating resources...
1060 14:57:52.758055 Reading resources...
1061 14:57:52.761456 Root Device read_resources bus 0 link: 0
1062 14:57:52.764773 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 14:57:52.771114 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 14:57:52.774266 DOMAIN: 0000 read_resources bus 0 link: 0
1065 14:57:52.782145 PCI: 00:14.0 read_resources bus 0 link: 0
1066 14:57:52.784726 USB0 port 0 read_resources bus 0 link: 0
1067 14:57:52.793055 USB0 port 0 read_resources bus 0 link: 0 done
1068 14:57:52.796582 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 14:57:52.804065 PCI: 00:15.0 read_resources bus 1 link: 0
1070 14:57:52.807459 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 14:57:52.813587 PCI: 00:15.1 read_resources bus 2 link: 0
1072 14:57:52.816843 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 14:57:52.824920 PCI: 00:19.0 read_resources bus 3 link: 0
1074 14:57:52.831275 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 14:57:52.834509 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 14:57:52.840991 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 14:57:52.843766 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 14:57:52.850947 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 14:57:52.853808 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 14:57:52.860790 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 14:57:52.863727 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 14:57:52.870667 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 14:57:52.877342 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 14:57:52.880178 Root Device read_resources bus 0 link: 0 done
1085 14:57:52.883607 Done reading resources.
1086 14:57:52.889925 Show resources in subtree (Root Device)...After reading.
1087 14:57:52.893241 Root Device child on link 0 CPU_CLUSTER: 0
1088 14:57:52.897008 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 14:57:52.899806 APIC: 00
1090 14:57:52.900342 APIC: 01
1091 14:57:52.900684 APIC: 03
1092 14:57:52.903560 APIC: 02
1093 14:57:52.904094 APIC: 05
1094 14:57:52.906903 APIC: 04
1095 14:57:52.907439 APIC: 07
1096 14:57:52.907785 APIC: 06
1097 14:57:52.913150 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 14:57:52.923083 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 14:57:52.973038 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 14:57:52.973585 PCI: 00:00.0
1101 14:57:52.973936 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 14:57:52.974621 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 14:57:52.974968 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 14:57:52.975359 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 14:57:53.022237 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 14:57:53.022790 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 14:57:53.023519 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 14:57:53.023876 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 14:57:53.024195 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 14:57:53.048358 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 14:57:53.048888 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 14:57:53.049605 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 14:57:53.055012 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 14:57:53.065157 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 14:57:53.074938 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 14:57:53.081518 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 14:57:53.085154 PCI: 00:02.0
1118 14:57:53.094585 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 14:57:53.104562 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 14:57:53.114233 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 14:57:53.114780 PCI: 00:04.0
1122 14:57:53.117637 PCI: 00:08.0
1123 14:57:53.127257 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 14:57:53.127795 PCI: 00:12.0
1125 14:57:53.137397 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 14:57:53.143752 PCI: 00:14.0 child on link 0 USB0 port 0
1127 14:57:53.153180 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 14:57:53.156694 USB0 port 0 child on link 0 USB2 port 0
1129 14:57:53.159840 USB2 port 0
1130 14:57:53.160381 USB2 port 1
1131 14:57:53.163653 USB2 port 2
1132 14:57:53.164193 USB2 port 3
1133 14:57:53.166595 USB2 port 5
1134 14:57:53.167138 USB2 port 6
1135 14:57:53.169588 USB2 port 9
1136 14:57:53.170020 USB3 port 0
1137 14:57:53.173195 USB3 port 1
1138 14:57:53.176037 USB3 port 2
1139 14:57:53.176471 USB3 port 3
1140 14:57:53.179693 USB3 port 4
1141 14:57:53.180231 PCI: 00:14.2
1142 14:57:53.189412 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 14:57:53.199356 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 14:57:53.202373 PCI: 00:14.3
1145 14:57:53.212702 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 14:57:53.215806 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 14:57:53.225152 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 14:57:53.228367 I2C: 01:15
1149 14:57:53.232001 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 14:57:53.242151 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 14:57:53.242698 I2C: 02:5d
1152 14:57:53.245170 GENERIC: 0.0
1153 14:57:53.245784 PCI: 00:16.0
1154 14:57:53.254383 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 14:57:53.257895 PCI: 00:17.0
1156 14:57:53.267860 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 14:57:53.277880 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 14:57:53.284013 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 14:57:53.293638 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 14:57:53.300458 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 14:57:53.310339 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 14:57:53.313347 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 14:57:53.323011 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 14:57:53.326430 I2C: 03:1a
1165 14:57:53.326990 I2C: 03:38
1166 14:57:53.329698 I2C: 03:39
1167 14:57:53.330126 I2C: 03:3a
1168 14:57:53.333016 I2C: 03:3b
1169 14:57:53.336192 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 14:57:53.346143 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 14:57:53.355686 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 14:57:53.362188 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 14:57:53.365586 PCI: 01:00.0
1174 14:57:53.375506 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 14:57:53.378783 PCI: 00:1e.0
1176 14:57:53.388718 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 14:57:53.398576 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 14:57:53.401461 PCI: 00:1e.2 child on link 0 SPI: 00
1179 14:57:53.411513 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 14:57:53.414402 SPI: 00
1181 14:57:53.418172 PCI: 00:1e.3 child on link 0 SPI: 01
1182 14:57:53.427599 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:57:53.428237 SPI: 01
1184 14:57:53.434257 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 14:57:53.441150 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 14:57:53.450461 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 14:57:53.453971 PNP: 0c09.0
1188 14:57:53.460208 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 14:57:53.463434 PCI: 00:1f.3
1190 14:57:53.473291 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 14:57:53.483287 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 14:57:53.483828 PCI: 00:1f.4
1193 14:57:53.492876 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 14:57:53.502365 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 14:57:53.505675 PCI: 00:1f.5
1196 14:57:53.512598 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 14:57:53.519606 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 14:57:53.525740 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 14:57:53.531989 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 14:57:53.538672 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 14:57:53.542194 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 14:57:53.545495 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 14:57:53.548381 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 14:57:53.554838 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 14:57:53.561366 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 14:57:53.567847 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 14:57:53.577479 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 14:57:53.584183 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 14:57:53.587541 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 14:57:53.597150 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 14:57:53.600619 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 14:57:53.607326 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 14:57:53.610231 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 14:57:53.617241 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 14:57:53.620167 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 14:57:53.626311 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 14:57:53.629817 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 14:57:53.636545 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 14:57:53.639558 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 14:57:53.646255 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 14:57:53.649294 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 14:57:53.656089 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 14:57:53.659858 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 14:57:53.662514 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 14:57:53.669154 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 14:57:53.672521 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 14:57:53.679123 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 14:57:53.682215 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 14:57:53.688879 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 14:57:53.692099 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 14:57:53.698275 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 14:57:53.701502 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 14:57:53.708379 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 14:57:53.718020 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 14:57:53.721398 avoid_fixed_resources: DOMAIN: 0000
1236 14:57:53.724720 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 14:57:53.731093 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 14:57:53.740571 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 14:57:53.746880 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 14:57:53.753824 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 14:57:53.763518 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 14:57:53.769781 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 14:57:53.776867 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 14:57:53.786568 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 14:57:53.793425 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 14:57:53.799643 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 14:57:53.809432 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 14:57:53.809969 Setting resources...
1249 14:57:53.815402 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 14:57:53.819330 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 14:57:53.825580 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 14:57:53.828850 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 14:57:53.831900 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 14:57:53.838516 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 14:57:53.844764 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 14:57:53.852025 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 14:57:53.858123 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 14:57:53.864539 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 14:57:53.868174 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 14:57:53.874248 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 14:57:53.877473 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 14:57:53.884292 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 14:57:53.887742 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 14:57:53.894191 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 14:57:53.897418 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 14:57:53.903920 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 14:57:53.907269 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 14:57:53.913891 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 14:57:53.916823 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 14:57:53.923747 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 14:57:53.926794 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 14:57:53.933430 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 14:57:53.936305 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 14:57:53.942913 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 14:57:53.946121 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 14:57:53.949768 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 14:57:53.956321 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 14:57:53.959430 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 14:57:53.966050 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 14:57:53.968885 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 14:57:53.979100 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 14:57:53.986038 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 14:57:53.992010 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 14:57:54.002183 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 14:57:54.005192 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 14:57:54.011427 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 14:57:54.017941 Root Device assign_resources, bus 0 link: 0
1288 14:57:54.021499 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 14:57:54.031327 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 14:57:54.037437 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 14:57:54.047142 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 14:57:54.054217 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 14:57:54.063711 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 14:57:54.069955 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 14:57:54.076659 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 14:57:54.080196 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 14:57:54.089823 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 14:57:54.096284 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 14:57:54.105996 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 14:57:54.112436 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 14:57:54.119344 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 14:57:54.122257 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 14:57:54.132238 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 14:57:54.135314 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 14:57:54.139016 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 14:57:54.148942 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 14:57:54.155429 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 14:57:54.165369 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 14:57:54.171500 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 14:57:54.177982 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 14:57:54.188233 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 14:57:54.194774 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 14:57:54.204455 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 14:57:54.207804 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 14:57:54.214194 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 14:57:54.221088 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 14:57:54.230486 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 14:57:54.240834 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 14:57:54.243486 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 14:57:54.250040 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 14:57:54.256465 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 14:57:54.262937 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 14:57:54.272807 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 14:57:54.276636 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 14:57:54.283005 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 14:57:54.289307 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 14:57:54.295541 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 14:57:54.299410 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 14:57:54.305644 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 14:57:54.308663 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 14:57:54.315670 LPC: Trying to open IO window from 800 size 1ff
1332 14:57:54.321915 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 14:57:54.331681 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 14:57:54.338379 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 14:57:54.347979 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 14:57:54.351706 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 14:57:54.357916 Root Device assign_resources, bus 0 link: 0
1338 14:57:54.358443 Done setting resources.
1339 14:57:54.364678 Show resources in subtree (Root Device)...After assigning values.
1340 14:57:54.371020 Root Device child on link 0 CPU_CLUSTER: 0
1341 14:57:54.374080 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 14:57:54.374507 APIC: 00
1343 14:57:54.377584 APIC: 01
1344 14:57:54.378010 APIC: 03
1345 14:57:54.378358 APIC: 02
1346 14:57:54.380688 APIC: 05
1347 14:57:54.381113 APIC: 04
1348 14:57:54.383986 APIC: 07
1349 14:57:54.384409 APIC: 06
1350 14:57:54.387431 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 14:57:54.397248 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 14:57:54.410178 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 14:57:54.410715 PCI: 00:00.0
1354 14:57:54.420376 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 14:57:54.429783 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 14:57:54.439728 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 14:57:54.449692 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 14:57:54.459266 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 14:57:54.468795 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 14:57:54.475414 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 14:57:54.485758 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 14:57:54.495712 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 14:57:54.505194 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 14:57:54.514693 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 14:57:54.524590 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 14:57:54.534090 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 14:57:54.543874 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 14:57:54.550390 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 14:57:54.559975 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 14:57:54.563326 PCI: 00:02.0
1371 14:57:54.573347 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 14:57:54.583118 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 14:57:54.593009 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 14:57:54.596538 PCI: 00:04.0
1375 14:57:54.597066 PCI: 00:08.0
1376 14:57:54.606199 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 14:57:54.609435 PCI: 00:12.0
1378 14:57:54.619077 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 14:57:54.622140 PCI: 00:14.0 child on link 0 USB0 port 0
1380 14:57:54.632266 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 14:57:54.638912 USB0 port 0 child on link 0 USB2 port 0
1382 14:57:54.639446 USB2 port 0
1383 14:57:54.642217 USB2 port 1
1384 14:57:54.642772 USB2 port 2
1385 14:57:54.645182 USB2 port 3
1386 14:57:54.645734 USB2 port 5
1387 14:57:54.648273 USB2 port 6
1388 14:57:54.651527 USB2 port 9
1389 14:57:54.651990 USB3 port 0
1390 14:57:54.654738 USB3 port 1
1391 14:57:54.655168 USB3 port 2
1392 14:57:54.658106 USB3 port 3
1393 14:57:54.658533 USB3 port 4
1394 14:57:54.661176 PCI: 00:14.2
1395 14:57:54.671352 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 14:57:54.681220 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 14:57:54.684982 PCI: 00:14.3
1398 14:57:54.693933 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 14:57:54.697683 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 14:57:54.707238 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 14:57:54.710640 I2C: 01:15
1402 14:57:54.713857 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 14:57:54.723503 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 14:57:54.726999 I2C: 02:5d
1405 14:57:54.727544 GENERIC: 0.0
1406 14:57:54.730169 PCI: 00:16.0
1407 14:57:54.740116 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 14:57:54.740667 PCI: 00:17.0
1409 14:57:54.749250 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 14:57:54.762864 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 14:57:54.769509 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 14:57:54.779062 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 14:57:54.788452 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 14:57:54.798217 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 14:57:54.801686 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 14:57:54.814594 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 14:57:54.815134 I2C: 03:1a
1418 14:57:54.818184 I2C: 03:38
1419 14:57:54.818723 I2C: 03:39
1420 14:57:54.819068 I2C: 03:3a
1421 14:57:54.820935 I2C: 03:3b
1422 14:57:54.824606 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 14:57:54.834429 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 14:57:54.844128 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 14:57:54.854023 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 14:57:54.857221 PCI: 01:00.0
1427 14:57:54.866858 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 14:57:54.870293 PCI: 00:1e.0
1429 14:57:54.880212 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 14:57:54.889794 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 14:57:54.893364 PCI: 00:1e.2 child on link 0 SPI: 00
1432 14:57:54.906209 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 14:57:54.906753 SPI: 00
1434 14:57:54.909381 PCI: 00:1e.3 child on link 0 SPI: 01
1435 14:57:54.919824 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 14:57:54.923075 SPI: 01
1437 14:57:54.926028 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 14:57:54.935590 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 14:57:54.942618 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 14:57:54.945822 PNP: 0c09.0
1441 14:57:54.955800 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 14:57:54.956345 PCI: 00:1f.3
1443 14:57:54.965152 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 14:57:54.975033 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 14:57:54.978553 PCI: 00:1f.4
1446 14:57:54.988119 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 14:57:54.998015 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 14:57:54.998548 PCI: 00:1f.5
1449 14:57:55.010983 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 14:57:55.011520 Done allocating resources.
1451 14:57:55.017446 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 14:57:55.020935 Enabling resources...
1453 14:57:55.024014 PCI: 00:00.0 subsystem <- 8086/9b61
1454 14:57:55.027177 PCI: 00:00.0 cmd <- 06
1455 14:57:55.030752 PCI: 00:02.0 subsystem <- 8086/9b41
1456 14:57:55.033552 PCI: 00:02.0 cmd <- 03
1457 14:57:55.037143 PCI: 00:08.0 cmd <- 06
1458 14:57:55.040285 PCI: 00:12.0 subsystem <- 8086/02f9
1459 14:57:55.043281 PCI: 00:12.0 cmd <- 02
1460 14:57:55.046624 PCI: 00:14.0 subsystem <- 8086/02ed
1461 14:57:55.049531 PCI: 00:14.0 cmd <- 02
1462 14:57:55.049966 PCI: 00:14.2 cmd <- 02
1463 14:57:55.056867 PCI: 00:14.3 subsystem <- 8086/02f0
1464 14:57:55.057430 PCI: 00:14.3 cmd <- 02
1465 14:57:55.063465 PCI: 00:15.0 subsystem <- 8086/02e8
1466 14:57:55.063993 PCI: 00:15.0 cmd <- 02
1467 14:57:55.066321 PCI: 00:15.1 subsystem <- 8086/02e9
1468 14:57:55.069486 PCI: 00:15.1 cmd <- 02
1469 14:57:55.072630 PCI: 00:16.0 subsystem <- 8086/02e0
1470 14:57:55.076171 PCI: 00:16.0 cmd <- 02
1471 14:57:55.079377 PCI: 00:17.0 subsystem <- 8086/02d3
1472 14:57:55.082998 PCI: 00:17.0 cmd <- 03
1473 14:57:55.086209 PCI: 00:19.0 subsystem <- 8086/02c5
1474 14:57:55.089311 PCI: 00:19.0 cmd <- 02
1475 14:57:55.092447 PCI: 00:1d.0 bridge ctrl <- 0013
1476 14:57:55.095789 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 14:57:55.098808 PCI: 00:1d.0 cmd <- 06
1478 14:57:55.102023 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 14:57:55.105747 PCI: 00:1e.0 cmd <- 06
1480 14:57:55.108830 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 14:57:55.112433 PCI: 00:1e.2 cmd <- 06
1482 14:57:55.115857 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 14:57:55.118779 PCI: 00:1e.3 cmd <- 02
1484 14:57:55.122206 PCI: 00:1f.0 subsystem <- 8086/0284
1485 14:57:55.122739 PCI: 00:1f.0 cmd <- 407
1486 14:57:55.129399 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 14:57:55.129939 PCI: 00:1f.3 cmd <- 02
1488 14:57:55.135566 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 14:57:55.136097 PCI: 00:1f.4 cmd <- 03
1490 14:57:55.138464 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 14:57:55.142098 PCI: 00:1f.5 cmd <- 406
1492 14:57:55.151132 PCI: 01:00.0 cmd <- 02
1493 14:57:55.156360 done.
1494 14:57:55.167562 ME: Version: 14.0.39.1367
1495 14:57:55.174076 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 10
1496 14:57:55.177572 Initializing devices...
1497 14:57:55.178100 Root Device init ...
1498 14:57:55.183854 Chrome EC: Set SMI mask to 0x0000000000000000
1499 14:57:55.190551 Chrome EC: clear events_b mask to 0x0000000000000000
1500 14:57:55.193714 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 14:57:55.200313 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 14:57:55.206464 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 14:57:55.210110 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 14:57:55.216747 Root Device init finished in 35205 usecs
1505 14:57:55.220212 CPU_CLUSTER: 0 init ...
1506 14:57:55.223405 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 14:57:55.228570 PCI: 00:00.0 init ...
1508 14:57:55.231840 CPU TDP: 15 Watts
1509 14:57:55.234837 CPU PL2 = 64 Watts
1510 14:57:55.238263 PCI: 00:00.0 init finished in 7082 usecs
1511 14:57:55.241501 PCI: 00:02.0 init ...
1512 14:57:55.245029 PCI: 00:02.0 init finished in 2255 usecs
1513 14:57:55.248234 PCI: 00:08.0 init ...
1514 14:57:55.251280 PCI: 00:08.0 init finished in 2252 usecs
1515 14:57:55.254784 PCI: 00:12.0 init ...
1516 14:57:55.257910 PCI: 00:12.0 init finished in 2252 usecs
1517 14:57:55.260820 PCI: 00:14.0 init ...
1518 14:57:55.264336 PCI: 00:14.0 init finished in 2243 usecs
1519 14:57:55.267572 PCI: 00:14.2 init ...
1520 14:57:55.270727 PCI: 00:14.2 init finished in 2252 usecs
1521 14:57:55.273732 PCI: 00:14.3 init ...
1522 14:57:55.277469 PCI: 00:14.3 init finished in 2269 usecs
1523 14:57:55.280590 PCI: 00:15.0 init ...
1524 14:57:55.284130 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 14:57:55.290575 PCI: 00:15.0 init finished in 5977 usecs
1526 14:57:55.291105 PCI: 00:15.1 init ...
1527 14:57:55.297150 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 14:57:55.300679 PCI: 00:15.1 init finished in 5978 usecs
1529 14:57:55.303401 PCI: 00:16.0 init ...
1530 14:57:55.306687 PCI: 00:16.0 init finished in 2252 usecs
1531 14:57:55.309931 PCI: 00:19.0 init ...
1532 14:57:55.313632 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 14:57:55.316624 PCI: 00:19.0 init finished in 5980 usecs
1534 14:57:55.320023 PCI: 00:1d.0 init ...
1535 14:57:55.323332 Initializing PCH PCIe bridge.
1536 14:57:55.326110 PCI: 00:1d.0 init finished in 5288 usecs
1537 14:57:55.330080 PCI: 00:1f.0 init ...
1538 14:57:55.333229 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 14:57:55.340095 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 14:57:55.340620 IOAPIC: ID = 0x02
1541 14:57:55.343199 IOAPIC: Dumping registers
1542 14:57:55.346523 reg 0x0000: 0x02000000
1543 14:57:55.349541 reg 0x0001: 0x00770020
1544 14:57:55.352741 reg 0x0002: 0x00000000
1545 14:57:55.356245 PCI: 00:1f.0 init finished in 23547 usecs
1546 14:57:55.359810 PCI: 00:1f.4 init ...
1547 14:57:55.362943 PCI: 00:1f.4 init finished in 2262 usecs
1548 14:57:55.374540 PCI: 01:00.0 init ...
1549 14:57:55.378148 PCI: 01:00.0 init finished in 2253 usecs
1550 14:57:55.381571 PNP: 0c09.0 init ...
1551 14:57:55.385104 Google Chrome EC uptime: 11.084 seconds
1552 14:57:55.391981 Google Chrome AP resets since EC boot: 0
1553 14:57:55.395275 Google Chrome most recent AP reset causes:
1554 14:57:55.401559 Google Chrome EC reset flags at last EC boot: reset-pin
1555 14:57:55.404717 PNP: 0c09.0 init finished in 20563 usecs
1556 14:57:55.407961 Devices initialized
1557 14:57:55.411592 Show all devs... After init.
1558 14:57:55.412121 Root Device: enabled 1
1559 14:57:55.414381 CPU_CLUSTER: 0: enabled 1
1560 14:57:55.417815 DOMAIN: 0000: enabled 1
1561 14:57:55.421295 APIC: 00: enabled 1
1562 14:57:55.421832 PCI: 00:00.0: enabled 1
1563 14:57:55.424229 PCI: 00:02.0: enabled 1
1564 14:57:55.428071 PCI: 00:04.0: enabled 0
1565 14:57:55.431286 PCI: 00:05.0: enabled 0
1566 14:57:55.431814 PCI: 00:12.0: enabled 1
1567 14:57:55.433808 PCI: 00:12.5: enabled 0
1568 14:57:55.437394 PCI: 00:12.6: enabled 0
1569 14:57:55.437926 PCI: 00:14.0: enabled 1
1570 14:57:55.440673 PCI: 00:14.1: enabled 0
1571 14:57:55.444041 PCI: 00:14.3: enabled 1
1572 14:57:55.447343 PCI: 00:14.5: enabled 0
1573 14:57:55.447933 PCI: 00:15.0: enabled 1
1574 14:57:55.450265 PCI: 00:15.1: enabled 1
1575 14:57:55.453818 PCI: 00:15.2: enabled 0
1576 14:57:55.456798 PCI: 00:15.3: enabled 0
1577 14:57:55.457363 PCI: 00:16.0: enabled 1
1578 14:57:55.460286 PCI: 00:16.1: enabled 0
1579 14:57:55.463308 PCI: 00:16.2: enabled 0
1580 14:57:55.466624 PCI: 00:16.3: enabled 0
1581 14:57:55.467053 PCI: 00:16.4: enabled 0
1582 14:57:55.469933 PCI: 00:16.5: enabled 0
1583 14:57:55.473049 PCI: 00:17.0: enabled 1
1584 14:57:55.476733 PCI: 00:19.0: enabled 1
1585 14:57:55.477161 PCI: 00:19.1: enabled 0
1586 14:57:55.480008 PCI: 00:19.2: enabled 0
1587 14:57:55.482747 PCI: 00:1a.0: enabled 0
1588 14:57:55.486059 PCI: 00:1c.0: enabled 0
1589 14:57:55.486486 PCI: 00:1c.1: enabled 0
1590 14:57:55.489586 PCI: 00:1c.2: enabled 0
1591 14:57:55.493054 PCI: 00:1c.3: enabled 0
1592 14:57:55.496550 PCI: 00:1c.4: enabled 0
1593 14:57:55.497082 PCI: 00:1c.5: enabled 0
1594 14:57:55.499496 PCI: 00:1c.6: enabled 0
1595 14:57:55.502721 PCI: 00:1c.7: enabled 0
1596 14:57:55.505644 PCI: 00:1d.0: enabled 1
1597 14:57:55.506076 PCI: 00:1d.1: enabled 0
1598 14:57:55.509447 PCI: 00:1d.2: enabled 0
1599 14:57:55.512618 PCI: 00:1d.3: enabled 0
1600 14:57:55.516122 PCI: 00:1d.4: enabled 0
1601 14:57:55.516670 PCI: 00:1d.5: enabled 0
1602 14:57:55.518872 PCI: 00:1e.0: enabled 1
1603 14:57:55.522174 PCI: 00:1e.1: enabled 0
1604 14:57:55.525653 PCI: 00:1e.2: enabled 1
1605 14:57:55.526191 PCI: 00:1e.3: enabled 1
1606 14:57:55.529144 PCI: 00:1f.0: enabled 1
1607 14:57:55.532154 PCI: 00:1f.1: enabled 0
1608 14:57:55.535051 PCI: 00:1f.2: enabled 0
1609 14:57:55.535489 PCI: 00:1f.3: enabled 1
1610 14:57:55.538612 PCI: 00:1f.4: enabled 1
1611 14:57:55.542171 PCI: 00:1f.5: enabled 1
1612 14:57:55.545258 PCI: 00:1f.6: enabled 0
1613 14:57:55.545821 USB0 port 0: enabled 1
1614 14:57:55.548721 I2C: 01:15: enabled 1
1615 14:57:55.551502 I2C: 02:5d: enabled 1
1616 14:57:55.551987 GENERIC: 0.0: enabled 1
1617 14:57:55.555111 I2C: 03:1a: enabled 1
1618 14:57:55.558209 I2C: 03:38: enabled 1
1619 14:57:55.558741 I2C: 03:39: enabled 1
1620 14:57:55.561468 I2C: 03:3a: enabled 1
1621 14:57:55.564797 I2C: 03:3b: enabled 1
1622 14:57:55.567655 PCI: 00:00.0: enabled 1
1623 14:57:55.568112 SPI: 00: enabled 1
1624 14:57:55.571318 SPI: 01: enabled 1
1625 14:57:55.571843 PNP: 0c09.0: enabled 1
1626 14:57:55.574104 USB2 port 0: enabled 1
1627 14:57:55.577610 USB2 port 1: enabled 1
1628 14:57:55.580827 USB2 port 2: enabled 0
1629 14:57:55.581423 USB2 port 3: enabled 0
1630 14:57:55.584176 USB2 port 5: enabled 0
1631 14:57:55.587433 USB2 port 6: enabled 1
1632 14:57:55.587967 USB2 port 9: enabled 1
1633 14:57:55.590468 USB3 port 0: enabled 1
1634 14:57:55.593775 USB3 port 1: enabled 1
1635 14:57:55.597371 USB3 port 2: enabled 1
1636 14:57:55.597901 USB3 port 3: enabled 1
1637 14:57:55.600750 USB3 port 4: enabled 0
1638 14:57:55.603818 APIC: 01: enabled 1
1639 14:57:55.604254 APIC: 03: enabled 1
1640 14:57:55.606781 APIC: 02: enabled 1
1641 14:57:55.610167 APIC: 05: enabled 1
1642 14:57:55.610596 APIC: 04: enabled 1
1643 14:57:55.613354 APIC: 07: enabled 1
1644 14:57:55.613788 APIC: 06: enabled 1
1645 14:57:55.616943 PCI: 00:08.0: enabled 1
1646 14:57:55.620228 PCI: 00:14.2: enabled 1
1647 14:57:55.623384 PCI: 01:00.0: enabled 1
1648 14:57:55.626906 Disabling ACPI via APMC:
1649 14:57:55.630078 done.
1650 14:57:55.633368 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 14:57:55.636728 ELOG: NV offset 0xaf0000 size 0x4000
1652 14:57:55.643548 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 14:57:55.650098 ELOG: Event(17) added with size 13 at 2022-07-26 14:57:41 UTC
1654 14:57:55.656587 POST: Unexpected post code in previous boot: 0x73
1655 14:57:55.663342 ELOG: Event(A3) added with size 11 at 2022-07-26 14:57:41 UTC
1656 14:57:55.669332 ELOG: Event(A6) added with size 13 at 2022-07-26 14:57:41 UTC
1657 14:57:55.676291 ELOG: Event(92) added with size 9 at 2022-07-26 14:57:41 UTC
1658 14:57:55.682337 ELOG: Event(93) added with size 9 at 2022-07-26 14:57:41 UTC
1659 14:57:55.688987 ELOG: Event(9A) added with size 9 at 2022-07-26 14:57:41 UTC
1660 14:57:55.695623 ELOG: Event(9E) added with size 10 at 2022-07-26 14:57:41 UTC
1661 14:57:55.699120 ELOG: Event(9F) added with size 14 at 2022-07-26 14:57:41 UTC
1662 14:57:55.705247 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1663 14:57:55.712027 ELOG: Event(A1) added with size 10 at 2022-07-26 14:57:41 UTC
1664 14:57:55.721750 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 14:57:55.728218 ELOG: Event(A0) added with size 9 at 2022-07-26 14:57:41 UTC
1666 14:57:55.731538 elog_add_boot_reason: Logged dev mode boot
1667 14:57:55.734764 Finalize devices...
1668 14:57:55.735228 PCI: 00:17.0 final
1669 14:57:55.738103 Devices finalized
1670 14:57:55.741334 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 14:57:55.747995 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 14:57:55.750929 ME: HFSTS1 : 0x90000245
1673 14:57:55.754042 ME: HFSTS2 : 0x3B850126
1674 14:57:55.760993 ME: HFSTS3 : 0x00000020
1675 14:57:55.764008 ME: HFSTS4 : 0x00004800
1676 14:57:55.767305 ME: HFSTS5 : 0x00000000
1677 14:57:55.770228 ME: HFSTS6 : 0x40400006
1678 14:57:55.773789 ME: Manufacturing Mode : NO
1679 14:57:55.777334 ME: FW Partition Table : OK
1680 14:57:55.780501 ME: Bringup Loader Failure : NO
1681 14:57:55.783322 ME: Firmware Init Complete : YES
1682 14:57:55.790247 ME: Boot Options Present : NO
1683 14:57:55.793451 ME: Update In Progress : NO
1684 14:57:55.796624 ME: D0i3 Support : YES
1685 14:57:55.800061 ME: Low Power State Enabled : NO
1686 14:57:55.803502 ME: CPU Replaced : NO
1687 14:57:55.806479 ME: CPU Replacement Valid : YES
1688 14:57:55.810047 ME: Current Working State : 5
1689 14:57:55.813068 ME: Current Operation State : 1
1690 14:57:55.816222 ME: Current Operation Mode : 0
1691 14:57:55.819406 ME: Error Code : 0
1692 14:57:55.822882 ME: CPU Debug Disabled : YES
1693 14:57:55.826215 ME: TXT Support : NO
1694 14:57:55.829718 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 14:57:55.835429 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 14:57:55.839332 CBFS @ c08000 size 3f8000
1697 14:57:55.842840 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 14:57:55.849072 CBFS: Locating 'fallback/dsdt.aml'
1699 14:57:55.852551 CBFS: Found @ offset 10bb80 size 3fa5
1700 14:57:55.855505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 14:57:55.858842 CBFS @ c08000 size 3f8000
1702 14:57:55.865098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 14:57:55.868692 CBFS: Locating 'fallback/slic'
1704 14:57:55.875683 CBFS: 'fallback/slic' not found.
1705 14:57:55.878538 ACPI: Writing ACPI tables at 99b3e000.
1706 14:57:55.879080 ACPI: * FACS
1707 14:57:55.882223 ACPI: * DSDT
1708 14:57:55.885163 Ramoops buffer: 0x100000@0x99a3d000.
1709 14:57:55.888509 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 14:57:55.894619 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 14:57:55.898313 Google Chrome EC: version:
1712 14:57:55.901308 ro: helios_v2.0.2659-56403530b
1713 14:57:55.904409 rw: helios_v2.0.2849-c41de27e7d
1714 14:57:55.904839 running image: 1
1715 14:57:55.909287 ACPI: * FADT
1716 14:57:55.909724 SCI is IRQ9
1717 14:57:55.915938 ACPI: added table 1/32, length now 40
1718 14:57:55.916372 ACPI: * SSDT
1719 14:57:55.918690 Found 1 CPU(s) with 8 core(s) each.
1720 14:57:55.925023 Error: Could not locate 'wifi_sar' in VPD.
1721 14:57:55.928558 Checking CBFS for default SAR values
1722 14:57:55.931636 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 14:57:55.934930 CBFS @ c08000 size 3f8000
1724 14:57:55.941584 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 14:57:55.944641 CBFS: Locating 'wifi_sar_defaults.hex'
1726 14:57:55.947898 CBFS: Found @ offset 5fac0 size 77
1727 14:57:55.951368 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 14:57:55.957809 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 14:57:55.961037 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 14:57:55.967726 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 14:57:55.970864 failed to find key in VPD: dsm_calib_r0_0
1732 14:57:55.980821 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 14:57:55.987219 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 14:57:55.990459 failed to find key in VPD: dsm_calib_r0_1
1735 14:57:56.000064 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 14:57:56.003507 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 14:57:56.006747 failed to find key in VPD: dsm_calib_r0_2
1738 14:57:56.016604 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 14:57:56.022952 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 14:57:56.026235 failed to find key in VPD: dsm_calib_r0_3
1741 14:57:56.035917 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 14:57:56.039583 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 14:57:56.046047 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 14:57:56.049585 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 14:57:56.052896 EC returned error result code 1
1746 14:57:56.055862 EC returned error result code 1
1747 14:57:56.059608 EC returned error result code 1
1748 14:57:56.065980 PS2K: Bad resp from EC. Vivaldi disabled!
1749 14:57:56.072712 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 14:57:56.075886 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 14:57:56.082390 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 14:57:56.085844 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 14:57:56.091980 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 14:57:56.098804 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 14:57:56.105452 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 14:57:56.112111 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 14:57:56.115423 ACPI: added table 2/32, length now 44
1758 14:57:56.115862 ACPI: * MCFG
1759 14:57:56.118727 ACPI: added table 3/32, length now 48
1760 14:57:56.121625 ACPI: * TPM2
1761 14:57:56.124759 TPM2 log created at 99a2d000
1762 14:57:56.128622 ACPI: added table 4/32, length now 52
1763 14:57:56.131590 ACPI: * MADT
1764 14:57:56.132126 SCI is IRQ9
1765 14:57:56.135078 ACPI: added table 5/32, length now 56
1766 14:57:56.137799 current = 99b43ac0
1767 14:57:56.138232 ACPI: * DMAR
1768 14:57:56.141641 ACPI: added table 6/32, length now 60
1769 14:57:56.144786 ACPI: * IGD OpRegion
1770 14:57:56.147833 GMA: Found VBT in CBFS
1771 14:57:56.151330 GMA: Found valid VBT in CBFS
1772 14:57:56.154250 ACPI: added table 7/32, length now 64
1773 14:57:56.154685 ACPI: * HPET
1774 14:57:56.161302 ACPI: added table 8/32, length now 68
1775 14:57:56.161840 ACPI: done.
1776 14:57:56.164378 ACPI tables: 31744 bytes.
1777 14:57:56.167218 smbios_write_tables: 99a2c000
1778 14:57:56.170556 EC returned error result code 3
1779 14:57:56.173738 Couldn't obtain OEM name from CBI
1780 14:57:56.177634 Create SMBIOS type 17
1781 14:57:56.180499 PCI: 00:00.0 (Intel Cannonlake)
1782 14:57:56.181033 PCI: 00:14.3 (Intel WiFi)
1783 14:57:56.183625 SMBIOS tables: 939 bytes.
1784 14:57:56.190108 Writing table forward entry at 0x00000500
1785 14:57:56.193661 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 14:57:56.200027 Writing coreboot table at 0x99b62000
1787 14:57:56.203356 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 14:57:56.209712 1. 0000000000001000-000000000009ffff: RAM
1789 14:57:56.212648 2. 00000000000a0000-00000000000fffff: RESERVED
1790 14:57:56.216307 3. 0000000000100000-0000000099a2bfff: RAM
1791 14:57:56.223030 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 14:57:56.229697 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 14:57:56.235907 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 14:57:56.239331 7. 000000009a000000-000000009f7fffff: RESERVED
1795 14:57:56.245865 8. 00000000e0000000-00000000efffffff: RESERVED
1796 14:57:56.249299 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 14:57:56.251923 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 14:57:56.258391 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 14:57:56.261989 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 14:57:56.268360 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 14:57:56.271285 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 14:57:56.277827 15. 0000000100000000-000000045e7fffff: RAM
1803 14:57:56.281729 Graphics framebuffer located at 0xc0000000
1804 14:57:56.284931 Passing 5 GPIOs to payload:
1805 14:57:56.287877 NAME | PORT | POLARITY | VALUE
1806 14:57:56.294221 write protect | undefined | high | low
1807 14:57:56.300959 lid | undefined | high | high
1808 14:57:56.304332 power | undefined | high | low
1809 14:57:56.311182 oprom | undefined | high | low
1810 14:57:56.313836 EC in RW | 0x000000cb | high | low
1811 14:57:56.317349 Board ID: 4
1812 14:57:56.320714 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 14:57:56.323938 CBFS @ c08000 size 3f8000
1814 14:57:56.330324 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 14:57:56.336622 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d3d
1816 14:57:56.340146 coreboot table: 1492 bytes.
1817 14:57:56.343549 IMD ROOT 0. 99fff000 00001000
1818 14:57:56.346783 IMD SMALL 1. 99ffe000 00001000
1819 14:57:56.350213 FSP MEMORY 2. 99c4e000 003b0000
1820 14:57:56.353385 CONSOLE 3. 99c2e000 00020000
1821 14:57:56.356315 FMAP 4. 99c2d000 0000054e
1822 14:57:56.359990 TIME STAMP 5. 99c2c000 00000910
1823 14:57:56.363111 VBOOT WORK 6. 99c18000 00014000
1824 14:57:56.366209 MRC DATA 7. 99c16000 00001958
1825 14:57:56.369244 ROMSTG STCK 8. 99c15000 00001000
1826 14:57:56.372409 AFTER CAR 9. 99c0b000 0000a000
1827 14:57:56.375655 RAMSTAGE 10. 99baf000 0005c000
1828 14:57:56.379030 REFCODE 11. 99b7a000 00035000
1829 14:57:56.382367 SMM BACKUP 12. 99b6a000 00010000
1830 14:57:56.385739 COREBOOT 13. 99b62000 00008000
1831 14:57:56.389406 ACPI 14. 99b3e000 00024000
1832 14:57:56.392435 ACPI GNVS 15. 99b3d000 00001000
1833 14:57:56.395583 RAMOOPS 16. 99a3d000 00100000
1834 14:57:56.398363 TPM2 TCGLOG17. 99a2d000 00010000
1835 14:57:56.401797 SMBIOS 18. 99a2c000 00000800
1836 14:57:56.404965 IMD small region:
1837 14:57:56.408252 IMD ROOT 0. 99ffec00 00000400
1838 14:57:56.411776 FSP RUNTIME 1. 99ffebe0 00000004
1839 14:57:56.415422 EC HOSTEVENT 2. 99ffebc0 00000008
1840 14:57:56.418691 POWER STATE 3. 99ffeb80 00000040
1841 14:57:56.421531 ROMSTAGE 4. 99ffeb60 00000004
1842 14:57:56.425120 MEM INFO 5. 99ffe9a0 000001b9
1843 14:57:56.428201 VPD 6. 99ffe960 00000036
1844 14:57:56.431342 MTRR: Physical address space:
1845 14:57:56.437848 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 14:57:56.444551 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 14:57:56.450796 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 14:57:56.457754 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 14:57:56.464031 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 14:57:56.470235 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 14:57:56.477316 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 14:57:56.480046 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 14:57:56.483535 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 14:57:56.487361 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 14:57:56.493859 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 14:57:56.496527 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 14:57:56.499957 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 14:57:56.502957 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 14:57:56.509319 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 14:57:56.512886 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 14:57:56.516085 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 14:57:56.519489 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 14:57:56.523456 call enable_fixed_mtrr()
1864 14:57:56.526682 CPU physical address size: 39 bits
1865 14:57:56.533262 MTRR: default type WB/UC MTRR counts: 6/8.
1866 14:57:56.536485 MTRR: WB selected as default type.
1867 14:57:56.542777 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 14:57:56.549813 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 14:57:56.552435 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 14:57:56.559553 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 14:57:56.565622 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 14:57:56.572513 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 14:57:56.578552 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 14:57:56.581795 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 14:57:56.585347 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 14:57:56.591812 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 14:57:56.594703 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 14:57:56.598245 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 14:57:56.601643 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 14:57:56.607871 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 14:57:56.611130 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 14:57:56.614397 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 14:57:56.617609 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 14:57:56.618156
1885 14:57:56.621435 MTRR check
1886 14:57:56.624532 Fixed MTRRs : Enabled
1887 14:57:56.625076 Variable MTRRs: Enabled
1888 14:57:56.625472
1889 14:57:56.627932 call enable_fixed_mtrr()
1890 14:57:56.634140 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1891 14:57:56.637417 CPU physical address size: 39 bits
1892 14:57:56.641068 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1893 14:57:56.646975 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 14:57:56.650612 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 14:57:56.653595 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 14:57:56.656597 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 14:57:56.663674 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 14:57:56.667057 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 14:57:56.670298 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 14:57:56.676492 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 14:57:56.680216 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 14:57:56.682977 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 14:57:56.686119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 14:57:56.692856 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 14:57:56.696036 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 14:57:56.699782 call enable_fixed_mtrr()
1907 14:57:56.702559 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 14:57:56.705863 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 14:57:56.708831 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 14:57:56.715608 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 14:57:56.719145 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 14:57:56.722139 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 14:57:56.725927 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 14:57:56.732322 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 14:57:56.735490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 14:57:56.738740 CPU physical address size: 39 bits
1917 14:57:56.742220 call enable_fixed_mtrr()
1918 14:57:56.745095 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:57:56.748826 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 14:57:56.754895 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 14:57:56.758832 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 14:57:56.761714 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 14:57:56.764594 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 14:57:56.771157 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 14:57:56.774738 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 14:57:56.778034 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 14:57:56.780830 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 14:57:56.787615 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 14:57:56.790899 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 14:57:56.793989 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 14:57:56.797438 call enable_fixed_mtrr()
1932 14:57:56.800732 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 14:57:56.807477 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 14:57:56.810215 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 14:57:56.813365 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 14:57:56.816944 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 14:57:56.823478 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 14:57:56.826375 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 14:57:56.830195 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 14:57:56.833532 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 14:57:56.839633 CPU physical address size: 39 bits
1942 14:57:56.840202 call enable_fixed_mtrr()
1943 14:57:56.846210 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:57:56.849186 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:57:56.852723 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:57:56.856238 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:57:56.862643 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:57:56.865631 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:57:56.869220 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:57:56.871982 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:57:56.878888 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:57:56.881824 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:57:56.885053 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:57:56.891547 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:57:56.894646 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 14:57:56.897885 call enable_fixed_mtrr()
1957 14:57:56.901101 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 14:57:56.904617 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 14:57:56.908016 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 14:57:56.914120 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 14:57:56.917261 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 14:57:56.920640 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 14:57:56.923752 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 14:57:56.930870 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 14:57:56.934002 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 14:57:56.937134 CPU physical address size: 39 bits
1967 14:57:56.940357 call enable_fixed_mtrr()
1968 14:57:56.943821 CPU physical address size: 39 bits
1969 14:57:56.946827 CPU physical address size: 39 bits
1970 14:57:56.950066 CPU physical address size: 39 bits
1971 14:57:56.953864 CBFS @ c08000 size 3f8000
1972 14:57:56.960410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1973 14:57:56.963679 CBFS: Locating 'fallback/payload'
1974 14:57:56.966509 CBFS: Found @ offset 1c96c0 size 3f798
1975 14:57:56.973182 Checking segment from ROM address 0xffdd16f8
1976 14:57:56.976522 Checking segment from ROM address 0xffdd1714
1977 14:57:56.979951 Loading segment from ROM address 0xffdd16f8
1978 14:57:56.982819 code (compression=0)
1979 14:57:56.992566 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 14:57:56.999346 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 14:57:57.002448 it's not compressed!
1982 14:57:57.094901 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 14:57:57.101472 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 14:57:57.108124 Loading segment from ROM address 0xffdd1714
1985 14:57:57.108683 Entry Point 0x30000000
1986 14:57:57.111398 Loaded segments
1987 14:57:57.116943 Finalizing chipset.
1988 14:57:57.119978 Finalizing SMM.
1989 14:57:57.123387 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1990 14:57:57.126792 mp_park_aps done after 0 msecs.
1991 14:57:57.133341 Jumping to boot code at 30000000(99b62000)
1992 14:57:57.139880 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 14:57:57.140424
1994 14:57:57.143211 Starting depthcharge on Helios...
1995 14:57:57.144511 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1996 14:57:57.145048 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1997 14:57:57.145535 Setting prompt string to ['hatch:']
1998 14:57:57.146008 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1999 14:57:57.152777 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2000 14:57:57.159292 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2001 14:57:57.165923 board_setup: Info: eMMC controller not present; skipping
2002 14:57:57.169204 New NVMe Controller 0x30053ac0 @ 00:1d:00
2003 14:57:57.175897 board_setup: Info: SDHCI controller not present; skipping
2004 14:57:57.182192 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2005 14:57:57.182723 Wipe memory regions:
2006 14:57:57.188956 [0x00000000001000, 0x000000000a0000)
2007 14:57:57.192111 [0x00000000100000, 0x00000030000000)
2008 14:57:57.259625 [0x00000030657430, 0x00000099a2c000)
2009 14:57:57.399695 [0x00000100000000, 0x0000045e800000)
2010 14:57:58.782939 R8152: Initializing
2011 14:57:58.786118 Version 9 (ocp_data = 6010)
2012 14:57:58.790141 R8152: Done initializing
2013 14:57:58.793420 Adding net device
2014 14:57:59.168111 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 14:57:59.168626
2016 14:57:59.169387 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2018 14:57:59.271255 hatch: tftpboot 192.168.201.1 6895655/tftp-deploy-6w3f2zh4/kernel/bzImage 6895655/tftp-deploy-6w3f2zh4/kernel/cmdline 6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
2019 14:57:59.271875 Setting prompt string to 'Starting kernel'
2020 14:57:59.272276 Setting prompt string to ['Starting kernel']
2021 14:57:59.272677 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2022 14:57:59.273036 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2023 14:57:59.276593 tftpboot 192.168.201.1 6895655/tftp-deploy-6w3f2zh4/kernel/bzImoy-6w3f2zh4/kernel/cmdline 6895655/tftp-deploy-6w3f2zh4/ramdisk/ramdisk.cpio.gz
2024 14:57:59.277018 Waiting for link
2025 14:57:59.477786 done.
2026 14:57:59.478323 MAC: f4:f5:e8:50:e5:3a
2027 14:57:59.480640 Sending DHCP discover... done.
2028 14:57:59.484296 Waiting for reply... done.
2029 14:57:59.487483 Sending DHCP request... done.
2030 14:57:59.490470 Waiting for reply... done.
2031 14:57:59.493918 My ip is 192.168.201.10
2032 14:57:59.497253 The DHCP server ip is 192.168.201.1
2033 14:57:59.503825 TFTP server IP predefined by user: 192.168.201.1
2034 14:57:59.510212 Bootfile predefined by user: 6895655/tftp-deploy-6w3f2zh4/kernel/bzImage
2035 14:57:59.513474 Sending tftp read request... done.
2036 14:57:59.516883 Waiting for the transfer...
2037 14:57:59.915198 00000000 ################################################################
2038 14:58:00.298466 00080000 ################################################################
2039 14:58:00.657233 00100000 ################################################################
2040 14:58:00.979437 00180000 ################################################################
2041 14:58:01.302503 00200000 ################################################################
2042 14:58:01.628042 00280000 ################################################################
2043 14:58:01.952399 00300000 ################################################################
2044 14:58:02.275886 00380000 ################################################################
2045 14:58:02.673372 00400000 ################################################################
2046 14:58:03.104155 00480000 ################################################################
2047 14:58:03.495920 00500000 ################################################################
2048 14:58:03.947694 00580000 ################################################################
2049 14:58:04.353365 00600000 ################################################################ done.
2050 14:58:04.356211 The bootfile was 6815632 bytes long.
2051 14:58:04.359639 Sending tftp read request... done.
2052 14:58:04.362987 Waiting for the transfer...
2053 14:58:04.755914 00000000 ################################################################
2054 14:58:05.194545 00080000 ################################################################
2055 14:58:05.653718 00100000 ################################################################
2056 14:58:06.108363 00180000 ################################################################
2057 14:58:06.519231 00200000 ################################################################
2058 14:58:06.931318 00280000 ################################################################
2059 14:58:07.208265 00300000 ################################################################
2060 14:58:07.459474 00380000 ################################################################
2061 14:58:07.719305 00400000 ################################################################
2062 14:58:07.968694 00480000 ################################################################
2063 14:58:08.085512 00500000 ############################# done.
2064 14:58:08.088893 Sending tftp read request... done.
2065 14:58:08.092251 Waiting for the transfer...
2066 14:58:08.092421 00000000 # done.
2067 14:58:08.102759 Command line loaded dynamically from TFTP file: 6895655/tftp-deploy-6w3f2zh4/kernel/cmdline
2068 14:58:08.128804 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6895655/extract-nfsrootfs-5oq_147n,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2069 14:58:08.135133 ec_init(0): CrosEC protocol v3 supported (256, 256)
2070 14:58:08.141929 Shutting down all USB controllers.
2071 14:58:08.142266 Removing current net device
2072 14:58:08.145901 Finalizing coreboot
2073 14:58:08.152180 Exiting depthcharge with code 4 at timestamp: 18307320
2074 14:58:08.152610
2075 14:58:08.152990 Starting kernel ...
2076 14:58:08.153380
2077 14:58:08.153731
2078 14:58:08.154586 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2079 14:58:08.155118 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2080 14:58:08.155564 Setting prompt string to ['Linux version [0-9]']
2081 14:58:08.155965 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2082 14:58:08.156347 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2084 15:02:38.155339 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2086 15:02:38.155549 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2088 15:02:38.155710 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2091 15:02:38.155972 end: 2 depthcharge-action (duration 00:05:00) [common]
2093 15:02:38.156168 Cleaning after the job
2094 15:02:38.156252 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/ramdisk
2095 15:02:38.156744 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/kernel
2096 15:02:38.157262 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/nfsrootfs
2097 15:02:38.204064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895655/tftp-deploy-6w3f2zh4/modules
2098 15:02:38.204356 start: 4.1 power-off (timeout 00:00:30) [common]
2099 15:02:38.204520 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2100 15:02:38.223905 >> Command sent successfully.
2101 15:02:38.225821 Returned 0 in 0 seconds
2102 15:02:38.326597 end: 4.1 power-off (duration 00:00:00) [common]
2104 15:02:38.326915 start: 4.2 read-feedback (timeout 00:10:00) [common]
2105 15:02:38.327153 Listened to connection for namespace 'common' for up to 1s
2106 15:02:39.330766 Finalising connection for namespace 'common'
2107 15:02:39.330934 Disconnecting from shell: Finalise
2108 15:02:39.431668 end: 4.2 read-feedback (duration 00:00:01) [common]
2109 15:02:39.431825 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6895655
2110 15:02:39.584094 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6895655
2111 15:02:39.584273 JobError: Your job cannot terminate cleanly.