Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:56:45.119428 lava-dispatcher, installed at version: 2022.10
2 10:56:45.119656 start: 0 validate
3 10:56:45.119806 Start time: 2022-11-22 10:56:45.119797+00:00 (UTC)
4 10:56:45.119942 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:56:45.120078 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 10:56:45.128269 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:56:45.128399 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:56:45.134710 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:56:45.134827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:56:45.136221 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:56:45.136338 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:56:45.145874 validate duration: 0.03
14 10:56:45.146138 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:56:45.146291 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:56:45.146384 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:56:45.146481 Not decompressing ramdisk as can be used compressed.
18 10:56:45.146567 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
19 10:56:45.146633 saving as /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/ramdisk/initrd.cpio.gz
20 10:56:45.146696 total size: 5431606 (5MB)
21 10:56:45.155055 progress 0% (0MB)
22 10:56:45.181218 progress 5% (0MB)
23 10:56:45.197241 progress 10% (0MB)
24 10:56:45.210544 progress 15% (0MB)
25 10:56:45.227360 progress 20% (1MB)
26 10:56:45.240348 progress 25% (1MB)
27 10:56:45.251445 progress 30% (1MB)
28 10:56:45.267194 progress 35% (1MB)
29 10:56:45.279717 progress 40% (2MB)
30 10:56:45.294149 progress 45% (2MB)
31 10:56:45.307257 progress 50% (2MB)
32 10:56:45.320483 progress 55% (2MB)
33 10:56:45.336329 progress 60% (3MB)
34 10:56:45.347036 progress 65% (3MB)
35 10:56:45.363205 progress 70% (3MB)
36 10:56:45.378442 progress 75% (3MB)
37 10:56:45.390716 progress 80% (4MB)
38 10:56:45.404305 progress 85% (4MB)
39 10:56:45.418388 progress 90% (4MB)
40 10:56:45.434263 progress 95% (4MB)
41 10:56:45.445133 progress 100% (5MB)
42 10:56:45.445451 5MB downloaded in 0.30s (17.34MB/s)
43 10:56:45.445617 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:56:45.445869 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:56:45.445962 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:56:45.446053 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:56:45.446158 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:56:45.446245 saving as /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/kernel/bzImage
50 10:56:45.446321 total size: 7126928 (6MB)
51 10:56:45.446382 No compression specified
52 10:56:45.466558 progress 0% (0MB)
53 10:56:45.493390 progress 5% (0MB)
54 10:56:45.516191 progress 10% (0MB)
55 10:56:45.542469 progress 15% (1MB)
56 10:56:45.570773 progress 20% (1MB)
57 10:56:45.590303 progress 25% (1MB)
58 10:56:45.618671 progress 30% (2MB)
59 10:56:45.645469 progress 35% (2MB)
60 10:56:45.672834 progress 40% (2MB)
61 10:56:45.698691 progress 45% (3MB)
62 10:56:45.721470 progress 50% (3MB)
63 10:56:45.753408 progress 55% (3MB)
64 10:56:45.789235 progress 60% (4MB)
65 10:56:45.808795 progress 65% (4MB)
66 10:56:45.837076 progress 70% (4MB)
67 10:56:45.865263 progress 75% (5MB)
68 10:56:45.891031 progress 80% (5MB)
69 10:56:45.916716 progress 85% (5MB)
70 10:56:45.944459 progress 90% (6MB)
71 10:56:45.977777 progress 95% (6MB)
72 10:56:46.011188 progress 100% (6MB)
73 10:56:46.011473 6MB downloaded in 0.57s (12.03MB/s)
74 10:56:46.011641 end: 1.2.1 http-download (duration 00:00:01) [common]
76 10:56:46.011908 end: 1.2 download-retry (duration 00:00:01) [common]
77 10:56:46.012002 start: 1.3 download-retry (timeout 00:09:59) [common]
78 10:56:46.012102 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 10:56:46.012215 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
80 10:56:46.012293 saving as /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/nfsrootfs/full.rootfs.tar
81 10:56:46.012358 total size: 133303528 (127MB)
82 10:56:46.012421 Using unxz to decompress xz
83 10:56:46.026880 progress 0% (0MB)
84 10:56:46.458343 progress 5% (6MB)
85 10:56:46.823653 progress 10% (12MB)
86 10:56:47.117128 progress 15% (19MB)
87 10:56:47.334498 progress 20% (25MB)
88 10:56:47.604643 progress 25% (31MB)
89 10:56:47.975645 progress 30% (38MB)
90 10:56:48.343413 progress 35% (44MB)
91 10:56:48.758768 progress 40% (50MB)
92 10:56:49.182277 progress 45% (57MB)
93 10:56:49.572705 progress 50% (63MB)
94 10:56:49.971081 progress 55% (69MB)
95 10:56:50.365954 progress 60% (76MB)
96 10:56:50.751742 progress 65% (82MB)
97 10:56:51.123602 progress 70% (89MB)
98 10:56:51.501921 progress 75% (95MB)
99 10:56:51.952391 progress 80% (101MB)
100 10:56:52.410780 progress 85% (108MB)
101 10:56:52.692437 progress 90% (114MB)
102 10:56:53.045569 progress 95% (120MB)
103 10:56:53.449621 progress 100% (127MB)
104 10:56:53.454641 127MB downloaded in 7.44s (17.08MB/s)
105 10:56:53.454925 end: 1.3.1 http-download (duration 00:00:07) [common]
107 10:56:53.455201 end: 1.3 download-retry (duration 00:00:07) [common]
108 10:56:53.455301 start: 1.4 download-retry (timeout 00:09:52) [common]
109 10:56:53.455392 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 10:56:53.455514 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:56:53.455590 saving as /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/modules/modules.tar
112 10:56:53.455654 total size: 52028 (0MB)
113 10:56:53.455720 Using unxz to decompress xz
114 10:56:53.460400 progress 62% (0MB)
115 10:56:53.460790 progress 100% (0MB)
116 10:56:53.464106 0MB downloaded in 0.01s (5.88MB/s)
117 10:56:53.464347 end: 1.4.1 http-download (duration 00:00:00) [common]
119 10:56:53.464638 end: 1.4 download-retry (duration 00:00:00) [common]
120 10:56:53.464743 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 10:56:53.464851 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 10:56:54.784739 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8077826/extract-nfsrootfs-0haewfnk
123 10:56:54.784953 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 10:56:54.785073 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 10:56:54.785234 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb
126 10:56:54.785353 makedir: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin
127 10:56:54.785452 makedir: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/tests
128 10:56:54.785551 makedir: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/results
129 10:56:54.785673 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-add-keys
130 10:56:54.785836 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-add-sources
131 10:56:54.786000 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-background-process-start
132 10:56:54.786162 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-background-process-stop
133 10:56:54.786317 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-common-functions
134 10:56:54.786476 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-echo-ipv4
135 10:56:54.786636 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-install-packages
136 10:56:54.786790 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-installed-packages
137 10:56:54.786930 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-os-build
138 10:56:54.787082 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-probe-channel
139 10:56:54.787241 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-probe-ip
140 10:56:54.787397 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-target-ip
141 10:56:54.787516 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-target-mac
142 10:56:54.787629 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-target-storage
143 10:56:54.787758 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-case
144 10:56:54.787890 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-event
145 10:56:54.788018 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-feedback
146 10:56:54.788148 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-raise
147 10:56:54.788276 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-reference
148 10:56:54.788404 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-runner
149 10:56:54.788556 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-set
150 10:56:54.788714 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-test-shell
151 10:56:54.788872 Updating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-install-packages (oe)
152 10:56:54.789028 Updating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/bin/lava-installed-packages (oe)
153 10:56:54.789165 Creating /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/environment
154 10:56:54.789293 LAVA metadata
155 10:56:54.789390 - LAVA_JOB_ID=8077826
156 10:56:54.789486 - LAVA_DISPATCHER_IP=192.168.201.1
157 10:56:54.789602 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 10:56:54.789673 skipped lava-vland-overlay
159 10:56:54.789783 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 10:56:54.789906 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 10:56:54.790003 skipped lava-multinode-overlay
162 10:56:54.790119 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 10:56:54.790253 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 10:56:54.790336 Loading test definitions
165 10:56:54.790434 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 10:56:54.790509 Using /lava-8077826 at stage 0
167 10:56:54.790782 uuid=8077826_1.5.2.3.1 testdef=None
168 10:56:54.790876 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 10:56:54.790968 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 10:56:54.791453 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 10:56:54.791728 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 10:56:54.792518 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 10:56:54.792884 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 10:56:54.793599 runner path: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/0/tests/0_dmesg test_uuid 8077826_1.5.2.3.1
177 10:56:54.793755 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 10:56:54.793998 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 10:56:54.794074 Using /lava-8077826 at stage 1
181 10:56:54.794339 uuid=8077826_1.5.2.3.5 testdef=None
182 10:56:54.794441 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 10:56:54.794533 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 10:56:54.795102 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 10:56:54.795385 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 10:56:54.796058 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 10:56:54.796306 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 10:56:54.797108 runner path: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/1/tests/1_bootrr test_uuid 8077826_1.5.2.3.5
191 10:56:54.797289 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 10:56:54.797509 Creating lava-test-runner.conf files
194 10:56:54.797576 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/0 for stage 0
195 10:56:54.797659 - 0_dmesg
196 10:56:54.797735 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077826/lava-overlay-i4li0qfb/lava-8077826/1 for stage 1
197 10:56:54.797818 - 1_bootrr
198 10:56:54.797946 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 10:56:54.798069 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 10:56:54.804733 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 10:56:54.804901 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 10:56:54.805032 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 10:56:54.805160 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 10:56:54.805291 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 10:56:54.909518 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 10:56:54.909955 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
207 10:56:54.910105 extracting modules file /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077826/extract-nfsrootfs-0haewfnk
208 10:56:54.915114 extracting modules file /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077826/extract-overlay-ramdisk-bhctzny8/ramdisk
209 10:56:54.920578 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 10:56:54.920763 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
211 10:56:54.920892 [common] Applying overlay to NFS
212 10:56:54.920997 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077826/compress-overlay-9m8ui4p2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077826/extract-nfsrootfs-0haewfnk
213 10:56:54.926628 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 10:56:54.926796 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
215 10:56:54.926932 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 10:56:54.927063 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
217 10:56:54.927183 Building ramdisk /var/lib/lava/dispatcher/tmp/8077826/extract-overlay-ramdisk-bhctzny8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077826/extract-overlay-ramdisk-bhctzny8/ramdisk
218 10:56:54.961113 >> 24546 blocks
219 10:56:55.434325 rename /var/lib/lava/dispatcher/tmp/8077826/extract-overlay-ramdisk-bhctzny8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
220 10:56:55.434758 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 10:56:55.434932 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 10:56:55.435082 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 10:56:55.435225 No mkimage arch provided, not using FIT.
224 10:56:55.435354 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 10:56:55.435478 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 10:56:55.435614 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 10:56:55.435751 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 10:56:55.435866 No LXC device requested
229 10:56:55.435985 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 10:56:55.436116 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 10:56:55.436239 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 10:56:55.436346 Checking files for TFTP limit of 4294967296 bytes.
233 10:56:55.436886 end: 1 tftp-deploy (duration 00:00:10) [common]
234 10:56:55.436995 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 10:56:55.437088 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 10:56:55.437212 substitutions:
237 10:56:55.437280 - {DTB}: None
238 10:56:55.437343 - {INITRD}: 8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
239 10:56:55.437403 - {KERNEL}: 8077826/tftp-deploy-6knr9min/kernel/bzImage
240 10:56:55.437463 - {LAVA_MAC}: None
241 10:56:55.437519 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8077826/extract-nfsrootfs-0haewfnk
242 10:56:55.437575 - {NFS_SERVER_IP}: 192.168.201.1
243 10:56:55.437630 - {PRESEED_CONFIG}: None
244 10:56:55.437684 - {PRESEED_LOCAL}: None
245 10:56:55.437739 - {RAMDISK}: 8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
246 10:56:55.437794 - {ROOT_PART}: None
247 10:56:55.437848 - {ROOT}: None
248 10:56:55.437902 - {SERVER_IP}: 192.168.201.1
249 10:56:55.437955 - {TEE}: None
250 10:56:55.438009 Parsed boot commands:
251 10:56:55.438062 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 10:56:55.438221 Parsed boot commands: tftpboot 192.168.201.1 8077826/tftp-deploy-6knr9min/kernel/bzImage 8077826/tftp-deploy-6knr9min/kernel/cmdline 8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
253 10:56:55.438346 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 10:56:55.438436 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 10:56:55.438528 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 10:56:55.438616 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 10:56:55.438685 Not connected, no need to disconnect.
258 10:56:55.438761 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 10:56:55.438842 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 10:56:55.438908 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
261 10:56:55.441644 Setting prompt string to ['lava-test: # ']
262 10:56:55.441923 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 10:56:55.442030 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 10:56:55.442130 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 10:56:55.442282 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 10:56:55.442460 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
267 10:56:55.461958 >> Command sent successfully.
268 10:56:55.463963 Returned 0 in 0 seconds
269 10:56:55.564760 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 10:56:55.565079 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 10:56:55.565180 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 10:56:55.565271 Setting prompt string to 'Starting depthcharge on Voema...'
274 10:56:55.565337 Changing prompt to 'Starting depthcharge on Voema...'
275 10:56:55.565405 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 10:56:55.565676 [Enter `^Ec?' for help]
277 10:57:03.202157
278 10:57:03.202523
279 10:57:03.212210 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 10:57:03.218858 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 10:57:03.222165 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 10:57:03.225542 CPU: AES supported, TXT NOT supported, VT supported
283 10:57:03.232280 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 10:57:03.238335 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 10:57:03.241925 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 10:57:03.245307 VBOOT: Loading verstage.
287 10:57:03.252155 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 10:57:03.255540 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 10:57:03.258569 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 10:57:03.262114
291 10:57:03.268334 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 10:57:03.275200 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 10:57:03.278752
294 10:57:03.279283
295 10:57:03.288298 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 10:57:03.303453 Probing TPM: . done!
297 10:57:03.306587 TPM ready after 0 ms
298 10:57:03.309524 Connected to device vid:did:rid of 1ae0:0028:00
299 10:57:03.321017 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
300 10:57:03.327791 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 10:57:03.331202 Initialized TPM device CR50 revision 0
302 10:57:03.421061 tlcl_send_startup: Startup return code is 0
303 10:57:03.421197 TPM: setup succeeded
304 10:57:03.436600 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 10:57:03.451034 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 10:57:03.463737 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 10:57:03.473742 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 10:57:03.477015 Chrome EC: UHEPI supported
309 10:57:03.480482 Phase 1
310 10:57:03.483987 FMAP: area GBB found @ 1805000 (458752 bytes)
311 10:57:03.493455 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 10:57:03.500188 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 10:57:03.506615 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 10:57:03.513369 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 10:57:03.516902 Recovery requested (1009000e)
316 10:57:03.520134 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 10:57:03.532060 tlcl_extend: response is 0
318 10:57:03.538221 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 10:57:03.548668 tlcl_extend: response is 0
320 10:57:03.554913 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 10:57:03.561870 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 10:57:03.568484 BS: verstage times (exec / console): total (unknown) / 142 ms
323 10:57:03.568938
324 10:57:03.569287
325 10:57:03.581608 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 10:57:03.588601 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 10:57:03.591457 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 10:57:03.594926 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 10:57:03.601638 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 10:57:03.604831 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 10:57:03.608328 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 10:57:03.611481 TCO_STS: 0000 0000
333 10:57:03.614987 GEN_PMCON: d0015038 00002200
334 10:57:03.618367 GBLRST_CAUSE: 00000000 00000000
335 10:57:03.621486 HPR_CAUSE0: 00000000
336 10:57:03.621922 prev_sleep_state 5
337 10:57:03.624952 Boot Count incremented to 13375
338 10:57:03.631036 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
339 10:57:03.638002 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 10:57:03.648252 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 10:57:03.651821 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
342 10:57:03.658843 Chrome EC: UHEPI supported
343 10:57:03.665059 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
344 10:57:03.678315 Probing TPM: done!
345 10:57:03.684507 Connected to device vid:did:rid of 1ae0:0028:00
346 10:57:03.694428 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
347 10:57:03.697928 Initialized TPM device CR50 revision 0
348 10:57:03.712868 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
349 10:57:03.715974
350 10:57:03.719535 MRC: Hash idx 0x100b comparison successful.
351 10:57:03.723004 MRC cache found, size faa8
352 10:57:03.723441 bootmode is set to: 2
353 10:57:03.726356 SPD index = 0
354 10:57:03.732665 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 10:57:03.735947 SPD: module type is LPDDR4X
356 10:57:03.742666 SPD: module part number is MT53E512M64D4NW-046
357 10:57:03.746344 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
358 10:57:03.752569 SPD: device width 16 bits, bus width 16 bits
359 10:57:03.755794 SPD: module size is 1024 MB (per channel)
360 10:57:04.187826 CBMEM:
361 10:57:04.191303 IMD: root @ 0x76fff000 254 entries.
362 10:57:04.194606 IMD: root @ 0x76ffec00 62 entries.
363 10:57:04.197695 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 10:57:04.204593 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 10:57:04.207535 External stage cache:
366 10:57:04.210925 IMD: root @ 0x7b3ff000 254 entries.
367 10:57:04.213916 IMD: root @ 0x7b3fec00 62 entries.
368 10:57:04.230173 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 10:57:04.237047 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 10:57:04.243336 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 10:57:04.256887 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 10:57:04.263733 cse_lite: Skip switching to RW in the recovery path
373 10:57:04.263881 8 DIMMs found
374 10:57:04.263969 SMM Memory Map
375 10:57:04.266417
376 10:57:04.269939 SMRAM : 0x7b000000 0x800000
377 10:57:04.273262 Subregion 0: 0x7b000000 0x200000
378 10:57:04.276747 Subregion 1: 0x7b200000 0x200000
379 10:57:04.280181 Subregion 2: 0x7b400000 0x400000
380 10:57:04.280286 top_of_ram = 0x77000000
381 10:57:04.286488 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 10:57:04.293323 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 10:57:04.296349 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 10:57:04.303197 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 10:57:04.309549 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 10:57:04.316550 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
387 10:57:04.326737 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
388 10:57:04.330108 Processing 211 relocs. Offset value of 0x74c0b000
389 10:57:04.333031
390 10:57:04.339920 BS: romstage times (exec / console): total (unknown) / 277 ms
391 10:57:04.345652
392 10:57:04.345738
393 10:57:04.356012 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 10:57:04.358815 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 10:57:04.369168 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 10:57:04.375516 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 10:57:04.382435 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 10:57:04.388735 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 10:57:04.436535 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 10:57:04.439900 Processing 5008 relocs. Offset value of 0x75d98000
401 10:57:04.446344 BS: postcar times (exec / console): total (unknown) / 59 ms
402 10:57:04.446504
403 10:57:04.446640
404 10:57:04.459898 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 10:57:04.460366 Normal boot
406 10:57:04.463229 FW_CONFIG value is 0x804c02
407 10:57:04.466679 PCI: 00:07.0 disabled by fw_config
408 10:57:04.470104 PCI: 00:07.1 disabled by fw_config
409 10:57:04.473581 PCI: 00:0d.2 disabled by fw_config
410 10:57:04.476607 PCI: 00:1c.7 disabled by fw_config
411 10:57:04.482890 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 10:57:04.489886 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 10:57:04.492811 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 10:57:04.496219 GENERIC: 0.0 disabled by fw_config
415 10:57:04.499517 GENERIC: 1.0 disabled by fw_config
416 10:57:04.506316 fw_config match found: DB_USB=USB3_ACTIVE
417 10:57:04.509498 fw_config match found: DB_USB=USB3_ACTIVE
418 10:57:04.513127 fw_config match found: DB_USB=USB3_ACTIVE
419 10:57:04.516012 fw_config match found: DB_USB=USB3_ACTIVE
420 10:57:04.522892 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 10:57:04.529530 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 10:57:04.539715 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 10:57:04.545960 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 10:57:04.549253 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 10:57:04.556140 microcode: Update skipped, already up-to-date
426 10:57:04.562275 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 10:57:04.590017 Detected 4 core, 8 thread CPU.
428 10:57:04.592913 Setting up SMI for CPU
429 10:57:04.596275 IED base = 0x7b400000
430 10:57:04.596709 IED size = 0x00400000
431 10:57:04.599443 Will perform SMM setup.
432 10:57:04.606377 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 10:57:04.612792 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 10:57:04.619680 Processing 16 relocs. Offset value of 0x00030000
435 10:57:04.623050 Attempting to start 7 APs
436 10:57:04.625933 Waiting for 10ms after sending INIT.
437 10:57:04.642169 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 10:57:04.642703 done.
439 10:57:04.645001 AP: slot 3 apic_id 6.
440 10:57:04.648619 AP: slot 5 apic_id 5.
441 10:57:04.651902 Waiting for 2nd SIPI to complete...done.
442 10:57:04.655297 AP: slot 4 apic_id 4.
443 10:57:04.655795 AP: slot 6 apic_id 2.
444 10:57:04.658606 AP: slot 2 apic_id 3.
445 10:57:04.661856 AP: slot 7 apic_id 7.
446 10:57:04.668158 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 10:57:04.675051 Processing 13 relocs. Offset value of 0x00038000
448 10:57:04.675484 Unable to locate Global NVS
449 10:57:04.678524
450 10:57:04.684575 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 10:57:04.688198 Installing permanent SMM handler to 0x7b000000
452 10:57:04.697912 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 10:57:04.701320 Processing 794 relocs. Offset value of 0x7b010000
454 10:57:04.711081 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 10:57:04.714576 Processing 13 relocs. Offset value of 0x7b008000
456 10:57:04.721194 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 10:57:04.727895 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 10:57:04.731194 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 10:57:04.737971 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 10:57:04.744558 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 10:57:04.751326 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 10:57:04.758000 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 10:57:04.758499 Unable to locate Global NVS
464 10:57:04.767542 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 10:57:04.770867 Clearing SMI status registers
466 10:57:04.771303 SMI_STS: PM1
467 10:57:04.774273 PM1_STS: PWRBTN
468 10:57:04.780995 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 10:57:04.784471 In relocation handler: CPU 0
470 10:57:04.787781 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 10:57:04.794153 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 10:57:04.794626 Relocation complete.
473 10:57:04.804623 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 10:57:04.805161 In relocation handler: CPU 1
475 10:57:04.807393
476 10:57:04.810842 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 10:57:04.811279 Relocation complete.
478 10:57:04.820779 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
479 10:57:04.821276 In relocation handler: CPU 3
480 10:57:04.827586 New SMBASE=0x7afff400 IEDBASE=0x7b400000
481 10:57:04.830488 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 10:57:04.833925 Relocation complete.
483 10:57:04.840391 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
484 10:57:04.844245 In relocation handler: CPU 7
485 10:57:04.847063 New SMBASE=0x7affe400 IEDBASE=0x7b400000
486 10:57:04.850269 Relocation complete.
487 10:57:04.857263 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 10:57:04.860893 In relocation handler: CPU 2
489 10:57:04.863998 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 10:57:04.867348 Relocation complete.
491 10:57:04.874067 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
492 10:57:04.877433 In relocation handler: CPU 6
493 10:57:04.880430 New SMBASE=0x7affe800 IEDBASE=0x7b400000
494 10:57:04.887161 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 10:57:04.887690 Relocation complete.
496 10:57:04.893512 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 10:57:04.897239 In relocation handler: CPU 5
498 10:57:04.900619 New SMBASE=0x7affec00 IEDBASE=0x7b400000
499 10:57:04.903993 Relocation complete.
500 10:57:04.911335 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
501 10:57:04.914915 In relocation handler: CPU 4
502 10:57:04.917935 New SMBASE=0x7afff000 IEDBASE=0x7b400000
503 10:57:04.924892 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 10:57:04.925322 Relocation complete.
505 10:57:04.928087 Initializing CPU #0
506 10:57:04.931119 CPU: vendor Intel device 806c1
507 10:57:04.934497 CPU: family 06, model 8c, stepping 01
508 10:57:04.937790 Clearing out pending MCEs
509 10:57:04.941030 Setting up local APIC...
510 10:57:04.941459 apic_id: 0x00 done.
511 10:57:04.944547 Turbo is available but hidden
512 10:57:04.947984 Turbo is available and visible
513 10:57:04.954140 microcode: Update skipped, already up-to-date
514 10:57:04.954710 CPU #0 initialized
515 10:57:04.957768 Initializing CPU #4
516 10:57:04.961078 Initializing CPU #5
517 10:57:04.961514 CPU: vendor Intel device 806c1
518 10:57:04.967895 CPU: family 06, model 8c, stepping 01
519 10:57:04.971348 CPU: vendor Intel device 806c1
520 10:57:04.974126 CPU: family 06, model 8c, stepping 01
521 10:57:04.974630 Clearing out pending MCEs
522 10:57:04.977398
523 10:57:04.977834 Clearing out pending MCEs
524 10:57:04.981021 Setting up local APIC...
525 10:57:04.984543 Initializing CPU #3
526 10:57:04.984979 Initializing CPU #7
527 10:57:04.987330 CPU: vendor Intel device 806c1
528 10:57:04.990587 CPU: family 06, model 8c, stepping 01
529 10:57:04.993962 CPU: vendor Intel device 806c1
530 10:57:04.997508 CPU: family 06, model 8c, stepping 01
531 10:57:05.000328
532 10:57:05.000525 Clearing out pending MCEs
533 10:57:05.003783 Clearing out pending MCEs
534 10:57:05.007215 Setting up local APIC...
535 10:57:05.007373 Initializing CPU #6
536 10:57:05.010540 Initializing CPU #1
537 10:57:05.013834 Setting up local APIC...
538 10:57:05.013957 Initializing CPU #2
539 10:57:05.017287 CPU: vendor Intel device 806c1
540 10:57:05.023777 CPU: family 06, model 8c, stepping 01
541 10:57:05.023876 CPU: vendor Intel device 806c1
542 10:57:05.026622
543 10:57:05.030548 CPU: family 06, model 8c, stepping 01
544 10:57:05.030636 apic_id: 0x06 done.
545 10:57:05.033374 Setting up local APIC...
546 10:57:05.036878 apic_id: 0x04 done.
547 10:57:05.036964 apic_id: 0x05 done.
548 10:57:05.043502 microcode: Update skipped, already up-to-date
549 10:57:05.046880 microcode: Update skipped, already up-to-date
550 10:57:05.050366 CPU #4 initialized
551 10:57:05.050454 CPU #5 initialized
552 10:57:05.053191 Clearing out pending MCEs
553 10:57:05.056700 Clearing out pending MCEs
554 10:57:05.060161 Setting up local APIC...
555 10:57:05.063499 CPU: vendor Intel device 806c1
556 10:57:05.066378 CPU: family 06, model 8c, stepping 01
557 10:57:05.069714 microcode: Update skipped, already up-to-date
558 10:57:05.073070 apic_id: 0x07 done.
559 10:57:05.073155 CPU #3 initialized
560 10:57:05.079875 microcode: Update skipped, already up-to-date
561 10:57:05.083335 Setting up local APIC...
562 10:57:05.083427 apic_id: 0x03 done.
563 10:57:05.086705 apic_id: 0x02 done.
564 10:57:05.089810 microcode: Update skipped, already up-to-date
565 10:57:05.096645 microcode: Update skipped, already up-to-date
566 10:57:05.096756 CPU #2 initialized
567 10:57:05.099545 CPU #6 initialized
568 10:57:05.099635 CPU #7 initialized
569 10:57:05.102864 Clearing out pending MCEs
570 10:57:05.106561 Setting up local APIC...
571 10:57:05.109754 apic_id: 0x01 done.
572 10:57:05.112700 microcode: Update skipped, already up-to-date
573 10:57:05.116234 CPU #1 initialized
574 10:57:05.119613 bsp_do_flight_plan done after 464 msecs.
575 10:57:05.123079 CPU: frequency set to 4000 MHz
576 10:57:05.123172 Enabling SMIs.
577 10:57:05.129324 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
578 10:57:05.146360 SATAXPCIE1 indicates PCIe NVMe is present
579 10:57:05.150162 Probing TPM: done!
580 10:57:05.153680 Connected to device vid:did:rid of 1ae0:0028:00
581 10:57:05.164039 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
582 10:57:05.167401 Initialized TPM device CR50 revision 0
583 10:57:05.170670 Enabling S0i3.4
584 10:57:05.177129 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
585 10:57:05.180490 Found a VBT of 8704 bytes after decompression
586 10:57:05.187282 cse_lite: CSE RO boot. HybridStorageMode disabled
587 10:57:05.193840 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
588 10:57:05.269994 FSPS returned 0
589 10:57:05.273238 Executing Phase 1 of FspMultiPhaseSiInit
590 10:57:05.282658 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
591 10:57:05.285886 port C0 DISC req: usage 1 usb3 1 usb2 5
592 10:57:05.289270 Raw Buffer output 0 00000511
593 10:57:05.292574 Raw Buffer output 1 00000000
594 10:57:05.296503 pmc_send_ipc_cmd succeeded
595 10:57:05.299773 port C1 DISC req: usage 1 usb3 2 usb2 3
596 10:57:05.303338
597 10:57:05.303478 Raw Buffer output 0 00000321
598 10:57:05.306060 Raw Buffer output 1 00000000
599 10:57:05.310629 pmc_send_ipc_cmd succeeded
600 10:57:05.315787 Detected 4 core, 8 thread CPU.
601 10:57:05.318624 Detected 4 core, 8 thread CPU.
602 10:57:05.553385 Display FSP Version Info HOB
603 10:57:05.556191 Reference Code - CPU = a.0.4c.31
604 10:57:05.559608 uCode Version = 0.0.0.86
605 10:57:05.563191 TXT ACM version = ff.ff.ff.ffff
606 10:57:05.566499 Reference Code - ME = a.0.4c.31
607 10:57:05.569442 MEBx version = 0.0.0.0
608 10:57:05.572801 ME Firmware Version = Consumer SKU
609 10:57:05.576298 Reference Code - PCH = a.0.4c.31
610 10:57:05.579618 PCH-CRID Status = Disabled
611 10:57:05.582944 PCH-CRID Original Value = ff.ff.ff.ffff
612 10:57:05.586337 PCH-CRID New Value = ff.ff.ff.ffff
613 10:57:05.589569 OPROM - RST - RAID = ff.ff.ff.ffff
614 10:57:05.592996 PCH Hsio Version = 4.0.0.0
615 10:57:05.596531 Reference Code - SA - System Agent = a.0.4c.31
616 10:57:05.599874 Reference Code - MRC = 2.0.0.1
617 10:57:05.602812 SA - PCIe Version = a.0.4c.31
618 10:57:05.606093 SA-CRID Status = Disabled
619 10:57:05.609552 SA-CRID Original Value = 0.0.0.1
620 10:57:05.613012 SA-CRID New Value = 0.0.0.1
621 10:57:05.615913 OPROM - VBIOS = ff.ff.ff.ffff
622 10:57:05.619323 IO Manageability Engine FW Version = 11.1.4.0
623 10:57:05.622814 PHY Build Version = 0.0.0.e0
624 10:57:05.626157 Thunderbolt(TM) FW Version = 0.0.0.0
625 10:57:05.632449 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
626 10:57:05.635702 ITSS IRQ Polarities Before:
627 10:57:05.635813 IPC0: 0xffffffff
628 10:57:05.639265 IPC1: 0xffffffff
629 10:57:05.639489 IPC2: 0xffffffff
630 10:57:05.642752 IPC3: 0xffffffff
631 10:57:05.645692 ITSS IRQ Polarities After:
632 10:57:05.645787 IPC0: 0xffffffff
633 10:57:05.649155 IPC1: 0xffffffff
634 10:57:05.649256 IPC2: 0xffffffff
635 10:57:05.652575 IPC3: 0xffffffff
636 10:57:05.655974 Found PCIe Root Port #9 at PCI: 00:1d.0.
637 10:57:05.669003 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
638 10:57:05.678862 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
639 10:57:05.692098 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
640 10:57:05.698791 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
641 10:57:05.702159 Enumerating buses...
642 10:57:05.705223 Show all devs... Before device enumeration.
643 10:57:05.708603 Root Device: enabled 1
644 10:57:05.708692 DOMAIN: 0000: enabled 1
645 10:57:05.712027 CPU_CLUSTER: 0: enabled 1
646 10:57:05.715448 PCI: 00:00.0: enabled 1
647 10:57:05.718349 PCI: 00:02.0: enabled 1
648 10:57:05.718434 PCI: 00:04.0: enabled 1
649 10:57:05.721814 PCI: 00:05.0: enabled 1
650 10:57:05.725135 PCI: 00:06.0: enabled 0
651 10:57:05.728665 PCI: 00:07.0: enabled 0
652 10:57:05.728750 PCI: 00:07.1: enabled 0
653 10:57:05.732047 PCI: 00:07.2: enabled 0
654 10:57:05.734897 PCI: 00:07.3: enabled 0
655 10:57:05.738435 PCI: 00:08.0: enabled 1
656 10:57:05.738519 PCI: 00:09.0: enabled 0
657 10:57:05.741915 PCI: 00:0a.0: enabled 0
658 10:57:05.745367 PCI: 00:0d.0: enabled 1
659 10:57:05.748166 PCI: 00:0d.1: enabled 0
660 10:57:05.748249 PCI: 00:0d.2: enabled 0
661 10:57:05.751614 PCI: 00:0d.3: enabled 0
662 10:57:05.754997 PCI: 00:0e.0: enabled 0
663 10:57:05.755079 PCI: 00:10.2: enabled 1
664 10:57:05.758198
665 10:57:05.758320 PCI: 00:10.6: enabled 0
666 10:57:05.761589 PCI: 00:10.7: enabled 0
667 10:57:05.764961 PCI: 00:12.0: enabled 0
668 10:57:05.765044 PCI: 00:12.6: enabled 0
669 10:57:05.768460 PCI: 00:13.0: enabled 0
670 10:57:05.771395 PCI: 00:14.0: enabled 1
671 10:57:05.774852 PCI: 00:14.1: enabled 0
672 10:57:05.774934 PCI: 00:14.2: enabled 1
673 10:57:05.778425 PCI: 00:14.3: enabled 1
674 10:57:05.781691 PCI: 00:15.0: enabled 1
675 10:57:05.784484 PCI: 00:15.1: enabled 1
676 10:57:05.784566 PCI: 00:15.2: enabled 1
677 10:57:05.787962 PCI: 00:15.3: enabled 1
678 10:57:05.791544 PCI: 00:16.0: enabled 1
679 10:57:05.794814 PCI: 00:16.1: enabled 0
680 10:57:05.794896 PCI: 00:16.2: enabled 0
681 10:57:05.798112 PCI: 00:16.3: enabled 0
682 10:57:05.801619 PCI: 00:16.4: enabled 0
683 10:57:05.804567 PCI: 00:16.5: enabled 0
684 10:57:05.804653 PCI: 00:17.0: enabled 1
685 10:57:05.807906 PCI: 00:19.0: enabled 0
686 10:57:05.811261 PCI: 00:19.1: enabled 1
687 10:57:05.811344 PCI: 00:19.2: enabled 0
688 10:57:05.814786 PCI: 00:1c.0: enabled 1
689 10:57:05.817646 PCI: 00:1c.1: enabled 0
690 10:57:05.821208 PCI: 00:1c.2: enabled 0
691 10:57:05.821323 PCI: 00:1c.3: enabled 0
692 10:57:05.824660 PCI: 00:1c.4: enabled 0
693 10:57:05.828057 PCI: 00:1c.5: enabled 0
694 10:57:05.830897 PCI: 00:1c.6: enabled 1
695 10:57:05.830980 PCI: 00:1c.7: enabled 0
696 10:57:05.834249 PCI: 00:1d.0: enabled 1
697 10:57:05.837670 PCI: 00:1d.1: enabled 0
698 10:57:05.841108 PCI: 00:1d.2: enabled 1
699 10:57:05.841192 PCI: 00:1d.3: enabled 0
700 10:57:05.844654 PCI: 00:1e.0: enabled 1
701 10:57:05.847581 PCI: 00:1e.1: enabled 0
702 10:57:05.850918 PCI: 00:1e.2: enabled 1
703 10:57:05.851001 PCI: 00:1e.3: enabled 1
704 10:57:05.854215 PCI: 00:1f.0: enabled 1
705 10:57:05.857773 PCI: 00:1f.1: enabled 0
706 10:57:05.861008 PCI: 00:1f.2: enabled 1
707 10:57:05.861093 PCI: 00:1f.3: enabled 1
708 10:57:05.864493 PCI: 00:1f.4: enabled 0
709 10:57:05.867264 PCI: 00:1f.5: enabled 1
710 10:57:05.867348 PCI: 00:1f.6: enabled 0
711 10:57:05.870823 PCI: 00:1f.7: enabled 0
712 10:57:05.874105 APIC: 00: enabled 1
713 10:57:05.877714 GENERIC: 0.0: enabled 1
714 10:57:05.877791 GENERIC: 0.0: enabled 1
715 10:57:05.880551 GENERIC: 1.0: enabled 1
716 10:57:05.883879 GENERIC: 0.0: enabled 1
717 10:57:05.887088 GENERIC: 1.0: enabled 1
718 10:57:05.887178 USB0 port 0: enabled 1
719 10:57:05.890565 GENERIC: 0.0: enabled 1
720 10:57:05.894088 USB0 port 0: enabled 1
721 10:57:05.894172 GENERIC: 0.0: enabled 1
722 10:57:05.897411 I2C: 00:1a: enabled 1
723 10:57:05.900853 I2C: 00:31: enabled 1
724 10:57:05.900930 I2C: 00:32: enabled 1
725 10:57:05.903714 I2C: 00:10: enabled 1
726 10:57:05.907339 I2C: 00:15: enabled 1
727 10:57:05.910533 GENERIC: 0.0: enabled 0
728 10:57:05.910611 GENERIC: 1.0: enabled 0
729 10:57:05.913951 GENERIC: 0.0: enabled 1
730 10:57:05.917347 SPI: 00: enabled 1
731 10:57:05.917419 SPI: 00: enabled 1
732 10:57:05.920294 PNP: 0c09.0: enabled 1
733 10:57:05.923739 GENERIC: 0.0: enabled 1
734 10:57:05.923811 USB3 port 0: enabled 1
735 10:57:05.927075 USB3 port 1: enabled 1
736 10:57:05.930641 USB3 port 2: enabled 0
737 10:57:05.930713 USB3 port 3: enabled 0
738 10:57:05.933441
739 10:57:05.933524 USB2 port 0: enabled 0
740 10:57:05.936916 USB2 port 1: enabled 1
741 10:57:05.940378 USB2 port 2: enabled 1
742 10:57:05.940449 USB2 port 3: enabled 0
743 10:57:05.943862 USB2 port 4: enabled 1
744 10:57:05.946677 USB2 port 5: enabled 0
745 10:57:05.946747 USB2 port 6: enabled 0
746 10:57:05.950085 USB2 port 7: enabled 0
747 10:57:05.953566 USB2 port 8: enabled 0
748 10:57:05.956921 USB2 port 9: enabled 0
749 10:57:05.956992 USB3 port 0: enabled 0
750 10:57:05.959894 USB3 port 1: enabled 1
751 10:57:05.963076 USB3 port 2: enabled 0
752 10:57:05.963150 USB3 port 3: enabled 0
753 10:57:05.966592 GENERIC: 0.0: enabled 1
754 10:57:05.970047 GENERIC: 1.0: enabled 1
755 10:57:05.973490 APIC: 01: enabled 1
756 10:57:05.973559 APIC: 03: enabled 1
757 10:57:05.976853 APIC: 06: enabled 1
758 10:57:05.976920 APIC: 04: enabled 1
759 10:57:05.979743 APIC: 05: enabled 1
760 10:57:05.983190 APIC: 02: enabled 1
761 10:57:05.983257 APIC: 07: enabled 1
762 10:57:05.986515 Compare with tree...
763 10:57:05.989814 Root Device: enabled 1
764 10:57:05.989888 DOMAIN: 0000: enabled 1
765 10:57:05.993047 PCI: 00:00.0: enabled 1
766 10:57:05.996383 PCI: 00:02.0: enabled 1
767 10:57:05.999826 PCI: 00:04.0: enabled 1
768 10:57:06.003213 GENERIC: 0.0: enabled 1
769 10:57:06.003285 PCI: 00:05.0: enabled 1
770 10:57:06.006727 PCI: 00:06.0: enabled 0
771 10:57:06.010144 PCI: 00:07.0: enabled 0
772 10:57:06.012925 GENERIC: 0.0: enabled 1
773 10:57:06.016336 PCI: 00:07.1: enabled 0
774 10:57:06.016417 GENERIC: 1.0: enabled 1
775 10:57:06.019975 PCI: 00:07.2: enabled 0
776 10:57:06.023212 GENERIC: 0.0: enabled 1
777 10:57:06.026093 PCI: 00:07.3: enabled 0
778 10:57:06.029771 GENERIC: 1.0: enabled 1
779 10:57:06.029854 PCI: 00:08.0: enabled 1
780 10:57:06.033196 PCI: 00:09.0: enabled 0
781 10:57:06.036709 PCI: 00:0a.0: enabled 0
782 10:57:06.039623 PCI: 00:0d.0: enabled 1
783 10:57:06.043143 USB0 port 0: enabled 1
784 10:57:06.043224 USB3 port 0: enabled 1
785 10:57:06.046561 USB3 port 1: enabled 1
786 10:57:06.049484 USB3 port 2: enabled 0
787 10:57:06.052975 USB3 port 3: enabled 0
788 10:57:06.056566 PCI: 00:0d.1: enabled 0
789 10:57:06.059835 PCI: 00:0d.2: enabled 0
790 10:57:06.059916 GENERIC: 0.0: enabled 1
791 10:57:06.062722 PCI: 00:0d.3: enabled 0
792 10:57:06.066045 PCI: 00:0e.0: enabled 0
793 10:57:06.069304 PCI: 00:10.2: enabled 1
794 10:57:06.072891 PCI: 00:10.6: enabled 0
795 10:57:06.072972 PCI: 00:10.7: enabled 0
796 10:57:06.076270 PCI: 00:12.0: enabled 0
797 10:57:06.079735 PCI: 00:12.6: enabled 0
798 10:57:06.082646 PCI: 00:13.0: enabled 0
799 10:57:06.085994 PCI: 00:14.0: enabled 1
800 10:57:06.086078 USB0 port 0: enabled 1
801 10:57:06.089327 USB2 port 0: enabled 0
802 10:57:06.092643 USB2 port 1: enabled 1
803 10:57:06.095869 USB2 port 2: enabled 1
804 10:57:06.099225 USB2 port 3: enabled 0
805 10:57:06.099307 USB2 port 4: enabled 1
806 10:57:06.102675 USB2 port 5: enabled 0
807 10:57:06.106097 USB2 port 6: enabled 0
808 10:57:06.109488 USB2 port 7: enabled 0
809 10:57:06.112263 USB2 port 8: enabled 0
810 10:57:06.115763 USB2 port 9: enabled 0
811 10:57:06.115844 USB3 port 0: enabled 0
812 10:57:06.119045 USB3 port 1: enabled 1
813 10:57:06.122016 USB3 port 2: enabled 0
814 10:57:06.125509 USB3 port 3: enabled 0
815 10:57:06.128874 PCI: 00:14.1: enabled 0
816 10:57:06.132366 PCI: 00:14.2: enabled 1
817 10:57:06.132448 PCI: 00:14.3: enabled 1
818 10:57:06.135861 GENERIC: 0.0: enabled 1
819 10:57:06.138838 PCI: 00:15.0: enabled 1
820 10:57:06.142343 I2C: 00:1a: enabled 1
821 10:57:06.142424 I2C: 00:31: enabled 1
822 10:57:06.145397 I2C: 00:32: enabled 1
823 10:57:06.148690 PCI: 00:15.1: enabled 1
824 10:57:06.152055 I2C: 00:10: enabled 1
825 10:57:06.202032 PCI: 00:15.2: enabled 1
826 10:57:06.202188 PCI: 00:15.3: enabled 1
827 10:57:06.202324 PCI: 00:16.0: enabled 1
828 10:57:06.202398 PCI: 00:16.1: enabled 0
829 10:57:06.202458 PCI: 00:16.2: enabled 0
830 10:57:06.202712 PCI: 00:16.3: enabled 0
831 10:57:06.202776 PCI: 00:16.4: enabled 0
832 10:57:06.202833 PCI: 00:16.5: enabled 0
833 10:57:06.202889 PCI: 00:17.0: enabled 1
834 10:57:06.202970 PCI: 00:19.0: enabled 0
835 10:57:06.203026 PCI: 00:19.1: enabled 1
836 10:57:06.203080 I2C: 00:15: enabled 1
837 10:57:06.203159 PCI: 00:19.2: enabled 0
838 10:57:06.203213 PCI: 00:1d.0: enabled 1
839 10:57:06.203270 GENERIC: 0.0: enabled 1
840 10:57:06.203510 PCI: 00:1e.0: enabled 1
841 10:57:06.203568 PCI: 00:1e.1: enabled 0
842 10:57:06.203622 PCI: 00:1e.2: enabled 1
843 10:57:06.203674 SPI: 00: enabled 1
844 10:57:06.251788 PCI: 00:1e.3: enabled 1
845 10:57:06.251948 SPI: 00: enabled 1
846 10:57:06.252150 PCI: 00:1f.0: enabled 1
847 10:57:06.252222 PNP: 0c09.0: enabled 1
848 10:57:06.252337 PCI: 00:1f.1: enabled 0
849 10:57:06.252593 PCI: 00:1f.2: enabled 1
850 10:57:06.252685 GENERIC: 0.0: enabled 1
851 10:57:06.252760 GENERIC: 0.0: enabled 1
852 10:57:06.252850 GENERIC: 1.0: enabled 1
853 10:57:06.252925 PCI: 00:1f.3: enabled 1
854 10:57:06.253007 PCI: 00:1f.4: enabled 0
855 10:57:06.253066 PCI: 00:1f.5: enabled 1
856 10:57:06.253126 PCI: 00:1f.6: enabled 0
857 10:57:06.253181 PCI: 00:1f.7: enabled 0
858 10:57:06.253254 CPU_CLUSTER: 0: enabled 1
859 10:57:06.253309 APIC: 00: enabled 1
860 10:57:06.253362 APIC: 01: enabled 1
861 10:57:06.253447 APIC: 03: enabled 1
862 10:57:06.253500 APIC: 06: enabled 1
863 10:57:06.253553 APIC: 04: enabled 1
864 10:57:06.259405 APIC: 05: enabled 1
865 10:57:06.259488 APIC: 02: enabled 1
866 10:57:06.259555 APIC: 07: enabled 1
867 10:57:06.265633 Root Device scanning...
868 10:57:06.265715 scan_static_bus for Root Device
869 10:57:06.268994 DOMAIN: 0000 enabled
870 10:57:06.272357 CPU_CLUSTER: 0 enabled
871 10:57:06.272440 DOMAIN: 0000 scanning...
872 10:57:06.275852 PCI: pci_scan_bus for bus 00
873 10:57:06.278761 PCI: 00:00.0 [8086/0000] ops
874 10:57:06.282247 PCI: 00:00.0 [8086/9a12] enabled
875 10:57:06.285249 PCI: 00:02.0 [8086/0000] bus ops
876 10:57:06.288677 PCI: 00:02.0 [8086/9a40] enabled
877 10:57:06.292020 PCI: 00:04.0 [8086/0000] bus ops
878 10:57:06.295183 PCI: 00:04.0 [8086/9a03] enabled
879 10:57:06.298725 PCI: 00:05.0 [8086/9a19] enabled
880 10:57:06.301626 PCI: 00:07.0 [0000/0000] hidden
881 10:57:06.304990 PCI: 00:08.0 [8086/9a11] enabled
882 10:57:06.308532 PCI: 00:0a.0 [8086/9a0d] disabled
883 10:57:06.311926 PCI: 00:0d.0 [8086/0000] bus ops
884 10:57:06.314796 PCI: 00:0d.0 [8086/9a13] enabled
885 10:57:06.318071 PCI: 00:14.0 [8086/0000] bus ops
886 10:57:06.321500 PCI: 00:14.0 [8086/a0ed] enabled
887 10:57:06.325057 PCI: 00:14.2 [8086/a0ef] enabled
888 10:57:06.328472 PCI: 00:14.3 [8086/0000] bus ops
889 10:57:06.331349 PCI: 00:14.3 [8086/a0f0] enabled
890 10:57:06.334704 PCI: 00:15.0 [8086/0000] bus ops
891 10:57:06.338347 PCI: 00:15.0 [8086/a0e8] enabled
892 10:57:06.341248 PCI: 00:15.1 [8086/0000] bus ops
893 10:57:06.344587 PCI: 00:15.1 [8086/a0e9] enabled
894 10:57:06.347994 PCI: 00:15.2 [8086/0000] bus ops
895 10:57:06.351362 PCI: 00:15.2 [8086/a0ea] enabled
896 10:57:06.354858 PCI: 00:15.3 [8086/0000] bus ops
897 10:57:06.357780 PCI: 00:15.3 [8086/a0eb] enabled
898 10:57:06.361237 PCI: 00:16.0 [8086/0000] ops
899 10:57:06.364654 PCI: 00:16.0 [8086/a0e0] enabled
900 10:57:06.371240 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 10:57:06.374575 PCI: 00:19.0 [8086/0000] bus ops
902 10:57:06.377759 PCI: 00:19.0 [8086/a0c5] disabled
903 10:57:06.381175 PCI: 00:19.1 [8086/0000] bus ops
904 10:57:06.384567 PCI: 00:19.1 [8086/a0c6] enabled
905 10:57:06.387528 PCI: 00:1d.0 [8086/0000] bus ops
906 10:57:06.390963 PCI: 00:1d.0 [8086/a0b0] enabled
907 10:57:06.394189 PCI: 00:1e.0 [8086/0000] ops
908 10:57:06.397521 PCI: 00:1e.0 [8086/a0a8] enabled
909 10:57:06.400863 PCI: 00:1e.2 [8086/0000] bus ops
910 10:57:06.404397 PCI: 00:1e.2 [8086/a0aa] enabled
911 10:57:06.407826 PCI: 00:1e.3 [8086/0000] bus ops
912 10:57:06.411315 PCI: 00:1e.3 [8086/a0ab] enabled
913 10:57:06.414720 PCI: 00:1f.0 [8086/0000] bus ops
914 10:57:06.417531 PCI: 00:1f.0 [8086/a087] enabled
915 10:57:06.417637 RTC Init
916 10:57:06.420953 Set power on after power failure.
917 10:57:06.424279 Disabling Deep S3
918 10:57:06.427761 Disabling Deep S3
919 10:57:06.427851 Disabling Deep S4
920 10:57:06.431190 Disabling Deep S4
921 10:57:06.431276 Disabling Deep S5
922 10:57:06.434618 Disabling Deep S5
923 10:57:06.437492 PCI: 00:1f.2 [0000/0000] hidden
924 10:57:06.440828 PCI: 00:1f.3 [8086/0000] bus ops
925 10:57:06.444380 PCI: 00:1f.3 [8086/a0c8] enabled
926 10:57:06.447868 PCI: 00:1f.5 [8086/0000] bus ops
927 10:57:06.450697 PCI: 00:1f.5 [8086/a0a4] enabled
928 10:57:06.454112 PCI: Leftover static devices:
929 10:57:06.454199 PCI: 00:10.2
930 10:57:06.457585 PCI: 00:10.6
931 10:57:06.457693 PCI: 00:10.7
932 10:57:06.457826 PCI: 00:06.0
933 10:57:06.461151 PCI: 00:07.1
934 10:57:06.461254 PCI: 00:07.2
935 10:57:06.463920 PCI: 00:07.3
936 10:57:06.464013 PCI: 00:09.0
937 10:57:06.467436 PCI: 00:0d.1
938 10:57:06.467546 PCI: 00:0d.2
939 10:57:06.467647 PCI: 00:0d.3
940 10:57:06.470694 PCI: 00:0e.0
941 10:57:06.470816 PCI: 00:12.0
942 10:57:06.474079 PCI: 00:12.6
943 10:57:06.474234 PCI: 00:13.0
944 10:57:06.474323 PCI: 00:14.1
945 10:57:06.477270 PCI: 00:16.1
946 10:57:06.477388 PCI: 00:16.2
947 10:57:06.480479 PCI: 00:16.3
948 10:57:06.480582 PCI: 00:16.4
949 10:57:06.480651 PCI: 00:16.5
950 10:57:06.483944
951 10:57:06.484040 PCI: 00:17.0
952 10:57:06.484126 PCI: 00:19.2
953 10:57:06.487421 PCI: 00:1e.1
954 10:57:06.487528 PCI: 00:1f.1
955 10:57:06.490804 PCI: 00:1f.4
956 10:57:06.490950 PCI: 00:1f.6
957 10:57:06.491022 PCI: 00:1f.7
958 10:57:06.493974 PCI: Check your devicetree.cb.
959 10:57:06.497401 PCI: 00:02.0 scanning...
960 10:57:06.500322 scan_generic_bus for PCI: 00:02.0
961 10:57:06.503878 scan_generic_bus for PCI: 00:02.0 done
962 10:57:06.510885 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 10:57:06.513820 PCI: 00:04.0 scanning...
964 10:57:06.517376 scan_generic_bus for PCI: 00:04.0
965 10:57:06.517463 GENERIC: 0.0 enabled
966 10:57:06.523772 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 10:57:06.530096 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 10:57:06.530275 PCI: 00:0d.0 scanning...
969 10:57:06.533653 scan_static_bus for PCI: 00:0d.0
970 10:57:06.536714 USB0 port 0 enabled
971 10:57:06.540068 USB0 port 0 scanning...
972 10:57:06.543542 scan_static_bus for USB0 port 0
973 10:57:06.543684 USB3 port 0 enabled
974 10:57:06.546593 USB3 port 1 enabled
975 10:57:06.550096 USB3 port 2 disabled
976 10:57:06.550248 USB3 port 3 disabled
977 10:57:06.553562 USB3 port 0 scanning...
978 10:57:06.556515 scan_static_bus for USB3 port 0
979 10:57:06.560014 scan_static_bus for USB3 port 0 done
980 10:57:06.566431 scan_bus: bus USB3 port 0 finished in 6 msecs
981 10:57:06.566609 USB3 port 1 scanning...
982 10:57:06.569900 scan_static_bus for USB3 port 1
983 10:57:06.576664 scan_static_bus for USB3 port 1 done
984 10:57:06.580109 scan_bus: bus USB3 port 1 finished in 6 msecs
985 10:57:06.583123 scan_static_bus for USB0 port 0 done
986 10:57:06.586639 scan_bus: bus USB0 port 0 finished in 43 msecs
987 10:57:06.593058 scan_static_bus for PCI: 00:0d.0 done
988 10:57:06.596602 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 10:57:06.599962 PCI: 00:14.0 scanning...
990 10:57:06.602936 scan_static_bus for PCI: 00:14.0
991 10:57:06.606353 USB0 port 0 enabled
992 10:57:06.606475 USB0 port 0 scanning...
993 10:57:06.609746 scan_static_bus for USB0 port 0
994 10:57:06.612788 USB2 port 0 disabled
995 10:57:06.616326 USB2 port 1 enabled
996 10:57:06.616448 USB2 port 2 enabled
997 10:57:06.619904 USB2 port 3 disabled
998 10:57:06.620018 USB2 port 4 enabled
999 10:57:06.622800 USB2 port 5 disabled
1000 10:57:06.626522 USB2 port 6 disabled
1001 10:57:06.626636 USB2 port 7 disabled
1002 10:57:06.630323 USB2 port 8 disabled
1003 10:57:06.632758 USB2 port 9 disabled
1004 10:57:06.632871 USB3 port 0 disabled
1005 10:57:06.636286 USB3 port 1 enabled
1006 10:57:06.639914 USB3 port 2 disabled
1007 10:57:06.640021 USB3 port 3 disabled
1008 10:57:06.642808 USB2 port 1 scanning...
1009 10:57:06.646255 scan_static_bus for USB2 port 1
1010 10:57:06.649866 scan_static_bus for USB2 port 1 done
1011 10:57:06.656189 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 10:57:06.656316 USB2 port 2 scanning...
1013 10:57:06.659841 scan_static_bus for USB2 port 2
1014 10:57:06.662871 scan_static_bus for USB2 port 2 done
1015 10:57:06.669287 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 10:57:06.672728 USB2 port 4 scanning...
1017 10:57:06.676271 scan_static_bus for USB2 port 4
1018 10:57:06.679625 scan_static_bus for USB2 port 4 done
1019 10:57:06.682413 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 10:57:06.686000 USB3 port 1 scanning...
1021 10:57:06.688991 scan_static_bus for USB3 port 1
1022 10:57:06.692491 scan_static_bus for USB3 port 1 done
1023 10:57:06.696081 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 10:57:06.702462 scan_static_bus for USB0 port 0 done
1025 10:57:06.705970 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 10:57:06.709636 scan_static_bus for PCI: 00:14.0 done
1027 10:57:06.715674 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1028 10:57:06.715795 PCI: 00:14.3 scanning...
1029 10:57:06.719219 scan_static_bus for PCI: 00:14.3
1030 10:57:06.722249 GENERIC: 0.0 enabled
1031 10:57:06.725785 scan_static_bus for PCI: 00:14.3 done
1032 10:57:06.732333 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 10:57:06.732428 PCI: 00:15.0 scanning...
1034 10:57:06.736000 scan_static_bus for PCI: 00:15.0
1035 10:57:06.739659 I2C: 00:1a enabled
1036 10:57:06.739758 I2C: 00:31 enabled
1037 10:57:06.742661
1038 10:57:06.742746 I2C: 00:32 enabled
1039 10:57:06.746185 scan_static_bus for PCI: 00:15.0 done
1040 10:57:06.752765 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1041 10:57:06.752856 PCI: 00:15.1 scanning...
1042 10:57:06.756395 scan_static_bus for PCI: 00:15.1
1043 10:57:06.759281 I2C: 00:10 enabled
1044 10:57:06.762961 scan_static_bus for PCI: 00:15.1 done
1045 10:57:06.769596 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1046 10:57:06.769683 PCI: 00:15.2 scanning...
1047 10:57:06.773045 scan_static_bus for PCI: 00:15.2
1048 10:57:06.779473 scan_static_bus for PCI: 00:15.2 done
1049 10:57:06.782921 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1050 10:57:06.786328 PCI: 00:15.3 scanning...
1051 10:57:06.789526 scan_static_bus for PCI: 00:15.3
1052 10:57:06.793039 scan_static_bus for PCI: 00:15.3 done
1053 10:57:06.796030 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1054 10:57:06.799125 PCI: 00:19.1 scanning...
1055 10:57:06.802602 scan_static_bus for PCI: 00:19.1
1056 10:57:06.805595 I2C: 00:15 enabled
1057 10:57:06.809188 scan_static_bus for PCI: 00:19.1 done
1058 10:57:06.812650 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1059 10:57:06.815581 PCI: 00:1d.0 scanning...
1060 10:57:06.819025 do_pci_scan_bridge for PCI: 00:1d.0
1061 10:57:06.822710 PCI: pci_scan_bus for bus 01
1062 10:57:06.825617 PCI: 01:00.0 [1c5c/174a] enabled
1063 10:57:06.829270 GENERIC: 0.0 enabled
1064 10:57:06.832227 Enabling Common Clock Configuration
1065 10:57:06.835917 L1 Sub-State supported from root port 29
1066 10:57:06.838864 L1 Sub-State Support = 0xf
1067 10:57:06.842366 CommonModeRestoreTime = 0x28
1068 10:57:06.845372 Power On Value = 0x16, Power On Scale = 0x0
1069 10:57:06.848994 ASPM: Enabled L1
1070 10:57:06.852003 PCIe: Max_Payload_Size adjusted to 128
1071 10:57:06.858662 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1072 10:57:06.858745 PCI: 00:1e.2 scanning...
1073 10:57:06.862248 scan_generic_bus for PCI: 00:1e.2
1074 10:57:06.865193
1075 10:57:06.865275 SPI: 00 enabled
1076 10:57:06.872314 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1077 10:57:06.875264 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1078 10:57:06.878730 PCI: 00:1e.3 scanning...
1079 10:57:06.881681 scan_generic_bus for PCI: 00:1e.3
1080 10:57:06.885164 SPI: 00 enabled
1081 10:57:06.888806 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1082 10:57:06.891805
1083 10:57:06.894859 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1084 10:57:06.898362 PCI: 00:1f.0 scanning...
1085 10:57:06.901365 scan_static_bus for PCI: 00:1f.0
1086 10:57:06.901477 PNP: 0c09.0 enabled
1087 10:57:06.904977 PNP: 0c09.0 scanning...
1088 10:57:06.908420 scan_static_bus for PNP: 0c09.0
1089 10:57:06.911417 scan_static_bus for PNP: 0c09.0 done
1090 10:57:06.917927 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1091 10:57:06.921378 scan_static_bus for PCI: 00:1f.0 done
1092 10:57:06.925048 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1093 10:57:06.927956 PCI: 00:1f.2 scanning...
1094 10:57:06.931544 scan_static_bus for PCI: 00:1f.2
1095 10:57:06.934549 GENERIC: 0.0 enabled
1096 10:57:06.938065 GENERIC: 0.0 scanning...
1097 10:57:06.940983 scan_static_bus for GENERIC: 0.0
1098 10:57:06.941071 GENERIC: 0.0 enabled
1099 10:57:06.944608 GENERIC: 1.0 enabled
1100 10:57:06.948167 scan_static_bus for GENERIC: 0.0 done
1101 10:57:06.954672 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1102 10:57:06.957577 scan_static_bus for PCI: 00:1f.2 done
1103 10:57:06.961264 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1104 10:57:06.964251 PCI: 00:1f.3 scanning...
1105 10:57:06.967800 scan_static_bus for PCI: 00:1f.3
1106 10:57:06.970858 scan_static_bus for PCI: 00:1f.3 done
1107 10:57:06.977905 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1108 10:57:06.977994 PCI: 00:1f.5 scanning...
1109 10:57:06.980744 scan_generic_bus for PCI: 00:1f.5
1110 10:57:06.984280
1111 10:57:06.987904 scan_generic_bus for PCI: 00:1f.5 done
1112 10:57:06.990703 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1113 10:57:06.997579 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1114 10:57:07.000609 scan_static_bus for Root Device done
1115 10:57:07.004193 scan_bus: bus Root Device finished in 737 msecs
1116 10:57:07.004285 done
1117 10:57:07.010746 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1118 10:57:07.014126 Chrome EC: UHEPI supported
1119 10:57:07.020638 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1120 10:57:07.027297 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1121 10:57:07.030188 SPI flash protection: WPSW=0 SRP0=0
1122 10:57:07.037256 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1123 10:57:07.040248 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1124 10:57:07.043834 found VGA at PCI: 00:02.0
1125 10:57:07.046733 Setting up VGA for PCI: 00:02.0
1126 10:57:07.053843 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1127 10:57:07.056889 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1128 10:57:07.060454 Allocating resources...
1129 10:57:07.063518 Reading resources...
1130 10:57:07.066927 Root Device read_resources bus 0 link: 0
1131 10:57:07.070442 DOMAIN: 0000 read_resources bus 0 link: 0
1132 10:57:07.077089 PCI: 00:04.0 read_resources bus 1 link: 0
1133 10:57:07.079997 PCI: 00:04.0 read_resources bus 1 link: 0 done
1134 10:57:07.086542 PCI: 00:0d.0 read_resources bus 0 link: 0
1135 10:57:07.090010 USB0 port 0 read_resources bus 0 link: 0
1136 10:57:07.096523 USB0 port 0 read_resources bus 0 link: 0 done
1137 10:57:07.100160 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1138 10:57:07.106639 PCI: 00:14.0 read_resources bus 0 link: 0
1139 10:57:07.109571 USB0 port 0 read_resources bus 0 link: 0
1140 10:57:07.115933 USB0 port 0 read_resources bus 0 link: 0 done
1141 10:57:07.119582 PCI: 00:14.0 read_resources bus 0 link: 0 done
1142 10:57:07.125958 PCI: 00:14.3 read_resources bus 0 link: 0
1143 10:57:07.129590 PCI: 00:14.3 read_resources bus 0 link: 0 done
1144 10:57:07.132565 PCI: 00:15.0 read_resources bus 0 link: 0
1145 10:57:07.136144
1146 10:57:07.139664 PCI: 00:15.0 read_resources bus 0 link: 0 done
1147 10:57:07.145909 PCI: 00:15.1 read_resources bus 0 link: 0
1148 10:57:07.149021 PCI: 00:15.1 read_resources bus 0 link: 0 done
1149 10:57:07.156093 PCI: 00:19.1 read_resources bus 0 link: 0
1150 10:57:07.159162 PCI: 00:19.1 read_resources bus 0 link: 0 done
1151 10:57:07.165828 PCI: 00:1d.0 read_resources bus 1 link: 0
1152 10:57:07.169351 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1153 10:57:07.175820 PCI: 00:1e.2 read_resources bus 2 link: 0
1154 10:57:07.179517 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1155 10:57:07.186069 PCI: 00:1e.3 read_resources bus 3 link: 0
1156 10:57:07.189041 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1157 10:57:07.195993 PCI: 00:1f.0 read_resources bus 0 link: 0
1158 10:57:07.199022 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1159 10:57:07.205642 PCI: 00:1f.2 read_resources bus 0 link: 0
1160 10:57:07.209197 GENERIC: 0.0 read_resources bus 0 link: 0
1161 10:57:07.215775 GENERIC: 0.0 read_resources bus 0 link: 0 done
1162 10:57:07.218590 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1163 10:57:07.225138 DOMAIN: 0000 read_resources bus 0 link: 0 done
1164 10:57:07.228714 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1165 10:57:07.235147 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1166 10:57:07.238770 Root Device read_resources bus 0 link: 0 done
1167 10:57:07.241704 Done reading resources.
1168 10:57:07.248342 Show resources in subtree (Root Device)...After reading.
1169 10:57:07.251996 Root Device child on link 0 DOMAIN: 0000
1170 10:57:07.255416 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1171 10:57:07.265078 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1172 10:57:07.275273 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1173 10:57:07.275368 PCI: 00:00.0
1174 10:57:07.285303 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1175 10:57:07.295043 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1176 10:57:07.305199 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1177 10:57:07.314802 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1178 10:57:07.324607 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1179 10:57:07.334787 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1180 10:57:07.341252 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1181 10:57:07.351451 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1182 10:57:07.361482 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1183 10:57:07.371055 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1184 10:57:07.381132 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1185 10:57:07.387643 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1186 10:57:07.391071
1187 10:57:07.398154 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1188 10:57:07.407625 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1189 10:57:07.417799 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1190 10:57:07.427752 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1191 10:57:07.437432 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1192 10:57:07.447675 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1193 10:57:07.454300 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1194 10:57:07.463869 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1195 10:57:07.467726 PCI: 00:02.0
1196 10:57:07.477066 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1197 10:57:07.487200 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1198 10:57:07.497192 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1199 10:57:07.500656 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1200 10:57:07.510185 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1201 10:57:07.510351 GENERIC: 0.0
1202 10:57:07.513838 PCI: 00:05.0
1203 10:57:07.523914 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1204 10:57:07.526791 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1205 10:57:07.530224 GENERIC: 0.0
1206 10:57:07.530310 PCI: 00:08.0
1207 10:57:07.533809
1208 10:57:07.540536 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 10:57:07.543475
1210 10:57:07.543565 PCI: 00:0a.0
1211 10:57:07.546970 PCI: 00:0d.0 child on link 0 USB0 port 0
1212 10:57:07.556553 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1213 10:57:07.563556 USB0 port 0 child on link 0 USB3 port 0
1214 10:57:07.563645 USB3 port 0
1215 10:57:07.566512 USB3 port 1
1216 10:57:07.566600 USB3 port 2
1217 10:57:07.570286 USB3 port 3
1218 10:57:07.573274 PCI: 00:14.0 child on link 0 USB0 port 0
1219 10:57:07.583377 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1220 10:57:07.589785 USB0 port 0 child on link 0 USB2 port 0
1221 10:57:07.589877 USB2 port 0
1222 10:57:07.592739 USB2 port 1
1223 10:57:07.592830 USB2 port 2
1224 10:57:07.596220 USB2 port 3
1225 10:57:07.596309 USB2 port 4
1226 10:57:07.599650 USB2 port 5
1227 10:57:07.599737 USB2 port 6
1228 10:57:07.603008 USB2 port 7
1229 10:57:07.603094 USB2 port 8
1230 10:57:07.606050 USB2 port 9
1231 10:57:07.606136 USB3 port 0
1232 10:57:07.609570 USB3 port 1
1233 10:57:07.609655 USB3 port 2
1234 10:57:07.612742
1235 10:57:07.612827 USB3 port 3
1236 10:57:07.616133 PCI: 00:14.2
1237 10:57:07.625860 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1238 10:57:07.635819 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1239 10:57:07.639586 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1240 10:57:07.649188 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1241 10:57:07.649278 GENERIC: 0.0
1242 10:57:07.655760 PCI: 00:15.0 child on link 0 I2C: 00:1a
1243 10:57:07.665888 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 10:57:07.665980 I2C: 00:1a
1245 10:57:07.668875 I2C: 00:31
1246 10:57:07.668961 I2C: 00:32
1247 10:57:07.672562 PCI: 00:15.1 child on link 0 I2C: 00:10
1248 10:57:07.675542
1249 10:57:07.682485 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 10:57:07.685516
1251 10:57:07.685602 I2C: 00:10
1252 10:57:07.685671 PCI: 00:15.2
1253 10:57:07.695685 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 10:57:07.698726 PCI: 00:15.3
1255 10:57:07.709141 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 10:57:07.709233 PCI: 00:16.0
1257 10:57:07.718798 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 10:57:07.722218
1259 10:57:07.722305 PCI: 00:19.0
1260 10:57:07.725155 PCI: 00:19.1 child on link 0 I2C: 00:15
1261 10:57:07.735024 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 10:57:07.738683 I2C: 00:15
1263 10:57:07.741727 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1264 10:57:07.751896 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1265 10:57:07.762142 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1266 10:57:07.768611 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1267 10:57:07.771703 GENERIC: 0.0
1268 10:57:07.775199 PCI: 01:00.0
1269 10:57:07.784830 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1270 10:57:07.791367 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1271 10:57:07.801246 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1272 10:57:07.804780 PCI: 00:1e.0
1273 10:57:07.814686 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1274 10:57:07.818166 PCI: 00:1e.2 child on link 0 SPI: 00
1275 10:57:07.827770 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1276 10:57:07.831227 SPI: 00
1277 10:57:07.834667 PCI: 00:1e.3 child on link 0 SPI: 00
1278 10:57:07.844788 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1279 10:57:07.844876 SPI: 00
1280 10:57:07.851401 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1281 10:57:07.857963 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1282 10:57:07.860777 PNP: 0c09.0
1283 10:57:07.867812 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1284 10:57:07.874459 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1285 10:57:07.884340 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1286 10:57:07.890908 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1287 10:57:07.897390 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1288 10:57:07.897487 GENERIC: 0.0
1289 10:57:07.900893 GENERIC: 1.0
1290 10:57:07.900971 PCI: 00:1f.3
1291 10:57:07.910881 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1292 10:57:07.920634 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1293 10:57:07.923668 PCI: 00:1f.5
1294 10:57:07.933663 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1295 10:57:07.937213 CPU_CLUSTER: 0 child on link 0 APIC: 00
1296 10:57:07.937295 APIC: 00
1297 10:57:07.940113 APIC: 01
1298 10:57:07.940188 APIC: 03
1299 10:57:07.943833 APIC: 06
1300 10:57:07.943917 APIC: 04
1301 10:57:07.943986 APIC: 05
1302 10:57:07.946788 APIC: 02
1303 10:57:07.946869 APIC: 07
1304 10:57:07.953319 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1305 10:57:07.959817 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1306 10:57:07.966900 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1307 10:57:07.973381 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1308 10:57:07.976468 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1309 10:57:07.979904 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1310 10:57:07.986506 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1311 10:57:07.993247 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1312 10:57:07.999617 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1313 10:57:08.006702 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1314 10:57:08.016092 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1315 10:57:08.019633 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1316 10:57:08.029757 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1317 10:57:08.036159 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1318 10:57:08.042676 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1319 10:57:08.046192 DOMAIN: 0000: Resource ranges:
1320 10:57:08.049115 * Base: 1000, Size: 800, Tag: 100
1321 10:57:08.052804 * Base: 1900, Size: e700, Tag: 100
1322 10:57:08.059481 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1323 10:57:08.065913 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1324 10:57:08.072414 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1325 10:57:08.079588 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1326 10:57:08.088942 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1327 10:57:08.095499 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1328 10:57:08.102675 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1329 10:57:08.112070 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1330 10:57:08.118673 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1331 10:57:08.125300 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1332 10:57:08.135289 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1333 10:57:08.142169 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1334 10:57:08.148833 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1335 10:57:08.158983 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1336 10:57:08.165564 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1337 10:57:08.171949 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1338 10:57:08.181528 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1339 10:57:08.188711 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1340 10:57:08.195142 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1341 10:57:08.205067 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1342 10:57:08.211680 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1343 10:57:08.217837 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1344 10:57:08.221576
1345 10:57:08.228033 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1346 10:57:08.234520 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1347 10:57:08.241439 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1348 10:57:08.244458 DOMAIN: 0000: Resource ranges:
1349 10:57:08.251047 * Base: 7fc00000, Size: 40400000, Tag: 200
1350 10:57:08.254536 * Base: d0000000, Size: 28000000, Tag: 200
1351 10:57:08.257540 * Base: fa000000, Size: 1000000, Tag: 200
1352 10:57:08.264761 * Base: fb001000, Size: 2fff000, Tag: 200
1353 10:57:08.267690 * Base: fe010000, Size: 2e000, Tag: 200
1354 10:57:08.270867 * Base: fe03f000, Size: d41000, Tag: 200
1355 10:57:08.274351 * Base: fed88000, Size: 8000, Tag: 200
1356 10:57:08.280834 * Base: fed93000, Size: d000, Tag: 200
1357 10:57:08.284346 * Base: feda2000, Size: 1e000, Tag: 200
1358 10:57:08.287342 * Base: fede0000, Size: 1220000, Tag: 200
1359 10:57:08.294247 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1360 10:57:08.300861 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1361 10:57:08.307358 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1362 10:57:08.313747 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1363 10:57:08.320666 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1364 10:57:08.327329 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1365 10:57:08.333763 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1366 10:57:08.340421 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1367 10:57:08.347372 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1368 10:57:08.353932 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1369 10:57:08.360469 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1370 10:57:08.366862 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1371 10:57:08.373478 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1372 10:57:08.379965 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1373 10:57:08.386518 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1374 10:57:08.393614 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1375 10:57:08.399828 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1376 10:57:08.406373 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1377 10:57:08.413634 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1378 10:57:08.419978 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1379 10:57:08.426347 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1380 10:57:08.432896 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1381 10:57:08.439388 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1382 10:57:08.446457 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1383 10:57:08.455981 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1384 10:57:08.456069 PCI: 00:1d.0: Resource ranges:
1385 10:57:08.459835
1386 10:57:08.462632 * Base: 7fc00000, Size: 100000, Tag: 200
1387 10:57:08.469727 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1388 10:57:08.476219 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1389 10:57:08.482595 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1390 10:57:08.489244 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1391 10:57:08.495695 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1392 10:57:08.499282
1393 10:57:08.502783 Root Device assign_resources, bus 0 link: 0
1394 10:57:08.505802 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 10:57:08.515946 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1396 10:57:08.522393 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1397 10:57:08.532470 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1398 10:57:08.538913 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1399 10:57:08.545509 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 10:57:08.549012 PCI: 00:04.0 assign_resources, bus 1 link: 0
1401 10:57:08.555572 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1402 10:57:08.558636
1403 10:57:08.565312 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1404 10:57:08.571927 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1405 10:57:08.574821
1406 10:57:08.578443 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1407 10:57:08.581455 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1408 10:57:08.591597 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1409 10:57:08.595185 PCI: 00:14.0 assign_resources, bus 0 link: 0
1410 10:57:08.601707 PCI: 00:14.0 assign_resources, bus 0 link: 0
1411 10:57:08.608297 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1412 10:57:08.614811 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1413 10:57:08.617939
1414 10:57:08.624440 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1415 10:57:08.627965 PCI: 00:14.3 assign_resources, bus 0 link: 0
1416 10:57:08.634562 PCI: 00:14.3 assign_resources, bus 0 link: 0
1417 10:57:08.641248 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1418 10:57:08.647623 PCI: 00:15.0 assign_resources, bus 0 link: 0
1419 10:57:08.651074 PCI: 00:15.0 assign_resources, bus 0 link: 0
1420 10:57:08.661271 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1421 10:57:08.664181 PCI: 00:15.1 assign_resources, bus 0 link: 0
1422 10:57:08.667731 PCI: 00:15.1 assign_resources, bus 0 link: 0
1423 10:57:08.677411 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1424 10:57:08.683874 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1425 10:57:08.693982 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1426 10:57:08.700510 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1427 10:57:08.707065 PCI: 00:19.1 assign_resources, bus 0 link: 0
1428 10:57:08.710633 PCI: 00:19.1 assign_resources, bus 0 link: 0
1429 10:57:08.720176 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1430 10:57:08.730636 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1431 10:57:08.737197 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1432 10:57:08.743821 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 10:57:08.750171 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1434 10:57:08.760433 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1435 10:57:08.766986 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1436 10:57:08.769898 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1437 10:57:08.779969 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1438 10:57:08.783421 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1439 10:57:08.790051 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1440 10:57:08.796522 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1441 10:57:08.803067 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1442 10:57:08.806548 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1443 10:57:08.809635 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1444 10:57:08.816689 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1445 10:57:08.820091 LPC: Trying to open IO window from 800 size 1ff
1446 10:57:08.830057 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1447 10:57:08.836473 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1448 10:57:08.846588 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1449 10:57:08.849433 DOMAIN: 0000 assign_resources, bus 0 link: 0
1450 10:57:08.856540 Root Device assign_resources, bus 0 link: 0
1451 10:57:08.856678 Done setting resources.
1452 10:57:08.863132 Show resources in subtree (Root Device)...After assigning values.
1453 10:57:08.869609 Root Device child on link 0 DOMAIN: 0000
1454 10:57:08.872544 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1455 10:57:08.882556 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1456 10:57:08.892543 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1457 10:57:08.892628 PCI: 00:00.0
1458 10:57:08.902529 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1459 10:57:08.912558 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1460 10:57:08.922561 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1461 10:57:08.932656 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1462 10:57:08.938949 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1463 10:57:08.949072 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1464 10:57:08.958635 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1465 10:57:08.968857 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1466 10:57:08.978966 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1467 10:57:08.988644 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1468 10:57:08.995269 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1469 10:57:09.005358 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1470 10:57:09.015030 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1471 10:57:09.025100 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1472 10:57:09.034972 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1473 10:57:09.042029 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1474 10:57:09.051522 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1475 10:57:09.054980
1476 10:57:09.061488 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1477 10:57:09.071663 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1478 10:57:09.081687 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1479 10:57:09.084685 PCI: 00:02.0
1480 10:57:09.094937 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1481 10:57:09.104579 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1482 10:57:09.114802 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1483 10:57:09.117824 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1484 10:57:09.127908 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1485 10:57:09.131472 GENERIC: 0.0
1486 10:57:09.131557 PCI: 00:05.0
1487 10:57:09.141085 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1488 10:57:09.144649
1489 10:57:09.147582 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1490 10:57:09.147737 GENERIC: 0.0
1491 10:57:09.151092 PCI: 00:08.0
1492 10:57:09.160731 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1493 10:57:09.164403 PCI: 00:0a.0
1494 10:57:09.167895 PCI: 00:0d.0 child on link 0 USB0 port 0
1495 10:57:09.177455 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1496 10:57:09.181032 USB0 port 0 child on link 0 USB3 port 0
1497 10:57:09.183951 USB3 port 0
1498 10:57:09.184049 USB3 port 1
1499 10:57:09.187714 USB3 port 2
1500 10:57:09.187793 USB3 port 3
1501 10:57:09.194059 PCI: 00:14.0 child on link 0 USB0 port 0
1502 10:57:09.203936 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1503 10:57:09.207518 USB0 port 0 child on link 0 USB2 port 0
1504 10:57:09.210510 USB2 port 0
1505 10:57:09.210595 USB2 port 1
1506 10:57:09.214107 USB2 port 2
1507 10:57:09.214209 USB2 port 3
1508 10:57:09.217078 USB2 port 4
1509 10:57:09.217155 USB2 port 5
1510 10:57:09.220552 USB2 port 6
1511 10:57:09.224062 USB2 port 7
1512 10:57:09.224142 USB2 port 8
1513 10:57:09.226992 USB2 port 9
1514 10:57:09.227080 USB3 port 0
1515 10:57:09.230519 USB3 port 1
1516 10:57:09.230601 USB3 port 2
1517 10:57:09.233901 USB3 port 3
1518 10:57:09.233986 PCI: 00:14.2
1519 10:57:09.244098 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1520 10:57:09.253616 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1521 10:57:09.260112 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1522 10:57:09.270194 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1523 10:57:09.270321 GENERIC: 0.0
1524 10:57:09.273795
1525 10:57:09.276915 PCI: 00:15.0 child on link 0 I2C: 00:1a
1526 10:57:09.286848 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1527 10:57:09.286935 I2C: 00:1a
1528 10:57:09.289840 I2C: 00:31
1529 10:57:09.289923 I2C: 00:32
1530 10:57:09.296552 PCI: 00:15.1 child on link 0 I2C: 00:10
1531 10:57:09.306579 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1532 10:57:09.306667 I2C: 00:10
1533 10:57:09.310122 PCI: 00:15.2
1534 10:57:09.319718 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1535 10:57:09.319820 PCI: 00:15.3
1536 10:57:09.329900 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1537 10:57:09.333558 PCI: 00:16.0
1538 10:57:09.343224 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1539 10:57:09.346162 PCI: 00:19.0
1540 10:57:09.349867 PCI: 00:19.1 child on link 0 I2C: 00:15
1541 10:57:09.359798 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1542 10:57:09.359903 I2C: 00:15
1543 10:57:09.362767
1544 10:57:09.366158 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1545 10:57:09.375958 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1546 10:57:09.386091 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1547 10:57:09.396363 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1548 10:57:09.399356 GENERIC: 0.0
1549 10:57:09.399444 PCI: 01:00.0
1550 10:57:09.412446 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1551 10:57:09.422727 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1552 10:57:09.432759 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1553 10:57:09.432856 PCI: 00:1e.0
1554 10:57:09.445691 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1555 10:57:09.449159 PCI: 00:1e.2 child on link 0 SPI: 00
1556 10:57:09.458742 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1557 10:57:09.458832 SPI: 00
1558 10:57:09.465789 PCI: 00:1e.3 child on link 0 SPI: 00
1559 10:57:09.475451 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1560 10:57:09.475578 SPI: 00
1561 10:57:09.479006 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1562 10:57:09.489086 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1563 10:57:09.492154 PNP: 0c09.0
1564 10:57:09.498737 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1565 10:57:09.505338 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1566 10:57:09.511810 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1567 10:57:09.515291
1568 10:57:09.521858 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1569 10:57:09.528449 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1570 10:57:09.528536 GENERIC: 0.0
1571 10:57:09.531813 GENERIC: 1.0
1572 10:57:09.531899 PCI: 00:1f.3
1573 10:57:09.541719 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1574 10:57:09.554787 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1575 10:57:09.554877 PCI: 00:1f.5
1576 10:57:09.564654 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1577 10:57:09.571207 CPU_CLUSTER: 0 child on link 0 APIC: 00
1578 10:57:09.571296 APIC: 00
1579 10:57:09.571363 APIC: 01
1580 10:57:09.574861 APIC: 03
1581 10:57:09.574947 APIC: 06
1582 10:57:09.575015 APIC: 04
1583 10:57:09.577763 APIC: 05
1584 10:57:09.577853 APIC: 02
1585 10:57:09.581381 APIC: 07
1586 10:57:09.581467 Done allocating resources.
1587 10:57:09.587969 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1588 10:57:09.594532 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1589 10:57:09.597579 Configure GPIOs for I2S audio on UP4.
1590 10:57:09.605484 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1591 10:57:09.608374 Enabling resources...
1592 10:57:09.611812 PCI: 00:00.0 subsystem <- 8086/9a12
1593 10:57:09.614873 PCI: 00:00.0 cmd <- 06
1594 10:57:09.618418 PCI: 00:02.0 subsystem <- 8086/9a40
1595 10:57:09.621462 PCI: 00:02.0 cmd <- 03
1596 10:57:09.625047 PCI: 00:04.0 subsystem <- 8086/9a03
1597 10:57:09.627971 PCI: 00:04.0 cmd <- 02
1598 10:57:09.631629 PCI: 00:05.0 subsystem <- 8086/9a19
1599 10:57:09.631715 PCI: 00:05.0 cmd <- 02
1600 10:57:09.638100 PCI: 00:08.0 subsystem <- 8086/9a11
1601 10:57:09.638189 PCI: 00:08.0 cmd <- 06
1602 10:57:09.641604 PCI: 00:0d.0 subsystem <- 8086/9a13
1603 10:57:09.645071 PCI: 00:0d.0 cmd <- 02
1604 10:57:09.647883 PCI: 00:14.0 subsystem <- 8086/a0ed
1605 10:57:09.651544 PCI: 00:14.0 cmd <- 02
1606 10:57:09.655033 PCI: 00:14.2 subsystem <- 8086/a0ef
1607 10:57:09.658092 PCI: 00:14.2 cmd <- 02
1608 10:57:09.661731 PCI: 00:14.3 subsystem <- 8086/a0f0
1609 10:57:09.664720 PCI: 00:14.3 cmd <- 02
1610 10:57:09.668371 PCI: 00:15.0 subsystem <- 8086/a0e8
1611 10:57:09.671070 PCI: 00:15.0 cmd <- 02
1612 10:57:09.674600 PCI: 00:15.1 subsystem <- 8086/a0e9
1613 10:57:09.677574 PCI: 00:15.1 cmd <- 02
1614 10:57:09.681069 PCI: 00:15.2 subsystem <- 8086/a0ea
1615 10:57:09.681149 PCI: 00:15.2 cmd <- 02
1616 10:57:09.688155 PCI: 00:15.3 subsystem <- 8086/a0eb
1617 10:57:09.688236 PCI: 00:15.3 cmd <- 02
1618 10:57:09.690946 PCI: 00:16.0 subsystem <- 8086/a0e0
1619 10:57:09.694459 PCI: 00:16.0 cmd <- 02
1620 10:57:09.698120 PCI: 00:19.1 subsystem <- 8086/a0c6
1621 10:57:09.701233 PCI: 00:19.1 cmd <- 02
1622 10:57:09.704406 PCI: 00:1d.0 bridge ctrl <- 0013
1623 10:57:09.707993 PCI: 00:1d.0 subsystem <- 8086/a0b0
1624 10:57:09.710850 PCI: 00:1d.0 cmd <- 06
1625 10:57:09.714507 PCI: 00:1e.0 subsystem <- 8086/a0a8
1626 10:57:09.717447 PCI: 00:1e.0 cmd <- 06
1627 10:57:09.721053 PCI: 00:1e.2 subsystem <- 8086/a0aa
1628 10:57:09.724019 PCI: 00:1e.2 cmd <- 06
1629 10:57:09.727574 PCI: 00:1e.3 subsystem <- 8086/a0ab
1630 10:57:09.730622 PCI: 00:1e.3 cmd <- 02
1631 10:57:09.734177 PCI: 00:1f.0 subsystem <- 8086/a087
1632 10:57:09.734282 PCI: 00:1f.0 cmd <- 407
1633 10:57:09.741278 PCI: 00:1f.3 subsystem <- 8086/a0c8
1634 10:57:09.741365 PCI: 00:1f.3 cmd <- 02
1635 10:57:09.744165 PCI: 00:1f.5 subsystem <- 8086/a0a4
1636 10:57:09.747643 PCI: 00:1f.5 cmd <- 406
1637 10:57:09.752388 PCI: 01:00.0 cmd <- 02
1638 10:57:09.757098 done.
1639 10:57:09.760089 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1640 10:57:09.763601 Initializing devices...
1641 10:57:09.767063 Root Device init
1642 10:57:09.770097 Chrome EC: Set SMI mask to 0x0000000000000000
1643 10:57:09.776627 Chrome EC: clear events_b mask to 0x0000000000000000
1644 10:57:09.783522 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1645 10:57:09.790552 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1646 10:57:09.796467 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1647 10:57:09.803135 Chrome EC: Set WAKE mask to 0x0000000000000000
1648 10:57:09.806536 fw_config match found: DB_USB=USB3_ACTIVE
1649 10:57:09.812990 Configure Right Type-C port orientation for retimer
1650 10:57:09.816702 Root Device init finished in 46 msecs
1651 10:57:09.819559 PCI: 00:00.0 init
1652 10:57:09.823075 CPU TDP = 9 Watts
1653 10:57:09.823160 CPU PL1 = 9 Watts
1654 10:57:09.825989 CPU PL2 = 40 Watts
1655 10:57:09.826072 CPU PL4 = 83 Watts
1656 10:57:09.832656 PCI: 00:00.0 init finished in 8 msecs
1657 10:57:09.832738 PCI: 00:02.0 init
1658 10:57:09.836140 GMA: Found VBT in CBFS
1659 10:57:09.839622 GMA: Found valid VBT in CBFS
1660 10:57:09.846136 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1661 10:57:09.852656 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1662 10:57:09.856203 PCI: 00:02.0 init finished in 18 msecs
1663 10:57:09.859101 PCI: 00:05.0 init
1664 10:57:09.862649 PCI: 00:05.0 init finished in 0 msecs
1665 10:57:09.866133 PCI: 00:08.0 init
1666 10:57:09.869222 PCI: 00:08.0 init finished in 0 msecs
1667 10:57:09.872696 PCI: 00:14.0 init
1668 10:57:09.875585 PCI: 00:14.0 init finished in 0 msecs
1669 10:57:09.879051 PCI: 00:14.2 init
1670 10:57:09.882183 PCI: 00:14.2 init finished in 0 msecs
1671 10:57:09.882280 PCI: 00:15.0 init
1672 10:57:09.885742 I2C bus 0 version 0x3230302a
1673 10:57:09.888832 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1674 10:57:09.895470 PCI: 00:15.0 init finished in 6 msecs
1675 10:57:09.895549 PCI: 00:15.1 init
1676 10:57:09.898895 I2C bus 1 version 0x3230302a
1677 10:57:09.901913 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1678 10:57:09.905487 PCI: 00:15.1 init finished in 6 msecs
1679 10:57:09.909100 PCI: 00:15.2 init
1680 10:57:09.912092 I2C bus 2 version 0x3230302a
1681 10:57:09.915658 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1682 10:57:09.918725 PCI: 00:15.2 init finished in 6 msecs
1683 10:57:09.922248 PCI: 00:15.3 init
1684 10:57:09.925436 I2C bus 3 version 0x3230302a
1685 10:57:09.928830 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1686 10:57:09.931893 PCI: 00:15.3 init finished in 6 msecs
1687 10:57:09.935421 PCI: 00:16.0 init
1688 10:57:09.938460 PCI: 00:16.0 init finished in 0 msecs
1689 10:57:09.942049 PCI: 00:19.1 init
1690 10:57:09.942132 I2C bus 5 version 0x3230302a
1691 10:57:09.945636
1692 10:57:09.948514 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1693 10:57:09.951841 PCI: 00:19.1 init finished in 6 msecs
1694 10:57:09.951926 PCI: 00:1d.0 init
1695 10:57:09.955462 Initializing PCH PCIe bridge.
1696 10:57:09.958230 PCI: 00:1d.0 init finished in 3 msecs
1697 10:57:09.961887
1698 10:57:09.961969 PCI: 00:1f.0 init
1699 10:57:09.968376 IOAPIC: Initializing IOAPIC at 0xfec00000
1700 10:57:09.971969 IOAPIC: Bootstrap Processor Local APIC = 0x00
1701 10:57:09.974841 IOAPIC: ID = 0x02
1702 10:57:09.974922 IOAPIC: Dumping registers
1703 10:57:09.978319 reg 0x0000: 0x02000000
1704 10:57:09.981902 reg 0x0001: 0x00770020
1705 10:57:09.984936 reg 0x0002: 0x00000000
1706 10:57:09.987907 PCI: 00:1f.0 init finished in 21 msecs
1707 10:57:09.991629 PCI: 00:1f.2 init
1708 10:57:09.991715 Disabling ACPI via APMC.
1709 10:57:09.995123
1710 10:57:09.995207 APMC done.
1711 10:57:09.998593 PCI: 00:1f.2 init finished in 5 msecs
1712 10:57:10.011871 PCI: 01:00.0 init
1713 10:57:10.014765 PCI: 01:00.0 init finished in 0 msecs
1714 10:57:10.018189 PNP: 0c09.0 init
1715 10:57:10.021864 Google Chrome EC uptime: 8.403 seconds
1716 10:57:10.027866 Google Chrome AP resets since EC boot: 1
1717 10:57:10.031485 Google Chrome most recent AP reset causes:
1718 10:57:10.034533 0.346: 32775 shutdown: entering G3
1719 10:57:10.041520 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1720 10:57:10.044463 PNP: 0c09.0 init finished in 22 msecs
1721 10:57:10.050491 Devices initialized
1722 10:57:10.053855 Show all devs... After init.
1723 10:57:10.056695 Root Device: enabled 1
1724 10:57:10.056774 DOMAIN: 0000: enabled 1
1725 10:57:10.060557 CPU_CLUSTER: 0: enabled 1
1726 10:57:10.063572 PCI: 00:00.0: enabled 1
1727 10:57:10.067094 PCI: 00:02.0: enabled 1
1728 10:57:10.067182 PCI: 00:04.0: enabled 1
1729 10:57:10.070023 PCI: 00:05.0: enabled 1
1730 10:57:10.073551 PCI: 00:06.0: enabled 0
1731 10:57:10.076423 PCI: 00:07.0: enabled 0
1732 10:57:10.076501 PCI: 00:07.1: enabled 0
1733 10:57:10.080054 PCI: 00:07.2: enabled 0
1734 10:57:10.083618 PCI: 00:07.3: enabled 0
1735 10:57:10.086663 PCI: 00:08.0: enabled 1
1736 10:57:10.086739 PCI: 00:09.0: enabled 0
1737 10:57:10.090241 PCI: 00:0a.0: enabled 0
1738 10:57:10.093216 PCI: 00:0d.0: enabled 1
1739 10:57:10.096217 PCI: 00:0d.1: enabled 0
1740 10:57:10.096305 PCI: 00:0d.2: enabled 0
1741 10:57:10.099719 PCI: 00:0d.3: enabled 0
1742 10:57:10.103212 PCI: 00:0e.0: enabled 0
1743 10:57:10.106196 PCI: 00:10.2: enabled 1
1744 10:57:10.106293 PCI: 00:10.6: enabled 0
1745 10:57:10.109816 PCI: 00:10.7: enabled 0
1746 10:57:10.113355 PCI: 00:12.0: enabled 0
1747 10:57:10.113437 PCI: 00:12.6: enabled 0
1748 10:57:10.116284
1749 10:57:10.116359 PCI: 00:13.0: enabled 0
1750 10:57:10.119915 PCI: 00:14.0: enabled 1
1751 10:57:10.122797 PCI: 00:14.1: enabled 0
1752 10:57:10.122873 PCI: 00:14.2: enabled 1
1753 10:57:10.126358 PCI: 00:14.3: enabled 1
1754 10:57:10.129376 PCI: 00:15.0: enabled 1
1755 10:57:10.132859 PCI: 00:15.1: enabled 1
1756 10:57:10.132935 PCI: 00:15.2: enabled 1
1757 10:57:10.135915 PCI: 00:15.3: enabled 1
1758 10:57:10.139550 PCI: 00:16.0: enabled 1
1759 10:57:10.142531 PCI: 00:16.1: enabled 0
1760 10:57:10.142612 PCI: 00:16.2: enabled 0
1761 10:57:10.146085 PCI: 00:16.3: enabled 0
1762 10:57:10.149736 PCI: 00:16.4: enabled 0
1763 10:57:10.152587 PCI: 00:16.5: enabled 0
1764 10:57:10.152663 PCI: 00:17.0: enabled 0
1765 10:57:10.156083 PCI: 00:19.0: enabled 0
1766 10:57:10.158880 PCI: 00:19.1: enabled 1
1767 10:57:10.162588 PCI: 00:19.2: enabled 0
1768 10:57:10.162669 PCI: 00:1c.0: enabled 1
1769 10:57:10.165598 PCI: 00:1c.1: enabled 0
1770 10:57:10.169048 PCI: 00:1c.2: enabled 0
1771 10:57:10.172630 PCI: 00:1c.3: enabled 0
1772 10:57:10.172706 PCI: 00:1c.4: enabled 0
1773 10:57:10.175677 PCI: 00:1c.5: enabled 0
1774 10:57:10.179083 PCI: 00:1c.6: enabled 1
1775 10:57:10.179169 PCI: 00:1c.7: enabled 0
1776 10:57:10.182690 PCI: 00:1d.0: enabled 1
1777 10:57:10.185636 PCI: 00:1d.1: enabled 0
1778 10:57:10.188766 PCI: 00:1d.2: enabled 1
1779 10:57:10.188846 PCI: 00:1d.3: enabled 0
1780 10:57:10.192404 PCI: 00:1e.0: enabled 1
1781 10:57:10.195389 PCI: 00:1e.1: enabled 0
1782 10:57:10.198599 PCI: 00:1e.2: enabled 1
1783 10:57:10.198680 PCI: 00:1e.3: enabled 1
1784 10:57:10.202057 PCI: 00:1f.0: enabled 1
1785 10:57:10.205443 PCI: 00:1f.1: enabled 0
1786 10:57:10.208570 PCI: 00:1f.2: enabled 1
1787 10:57:10.208647 PCI: 00:1f.3: enabled 1
1788 10:57:10.212109 PCI: 00:1f.4: enabled 0
1789 10:57:10.215563 PCI: 00:1f.5: enabled 1
1790 10:57:10.218437 PCI: 00:1f.6: enabled 0
1791 10:57:10.218515 PCI: 00:1f.7: enabled 0
1792 10:57:10.221953 APIC: 00: enabled 1
1793 10:57:10.225019 GENERIC: 0.0: enabled 1
1794 10:57:10.225102 GENERIC: 0.0: enabled 1
1795 10:57:10.228565 GENERIC: 1.0: enabled 1
1796 10:57:10.231590 GENERIC: 0.0: enabled 1
1797 10:57:10.235174 GENERIC: 1.0: enabled 1
1798 10:57:10.235253 USB0 port 0: enabled 1
1799 10:57:10.238185 GENERIC: 0.0: enabled 1
1800 10:57:10.241687 USB0 port 0: enabled 1
1801 10:57:10.241764 GENERIC: 0.0: enabled 1
1802 10:57:10.245243
1803 10:57:10.245324 I2C: 00:1a: enabled 1
1804 10:57:10.248276 I2C: 00:31: enabled 1
1805 10:57:10.251878 I2C: 00:32: enabled 1
1806 10:57:10.251965 I2C: 00:10: enabled 1
1807 10:57:10.254866 I2C: 00:15: enabled 1
1808 10:57:10.258449 GENERIC: 0.0: enabled 0
1809 10:57:10.258538 GENERIC: 1.0: enabled 0
1810 10:57:10.261872 GENERIC: 0.0: enabled 1
1811 10:57:10.264813 SPI: 00: enabled 1
1812 10:57:10.264891 SPI: 00: enabled 1
1813 10:57:10.268475 PNP: 0c09.0: enabled 1
1814 10:57:10.271465 GENERIC: 0.0: enabled 1
1815 10:57:10.271545 USB3 port 0: enabled 1
1816 10:57:10.275085 USB3 port 1: enabled 1
1817 10:57:10.278571 USB3 port 2: enabled 0
1818 10:57:10.281524 USB3 port 3: enabled 0
1819 10:57:10.281603 USB2 port 0: enabled 0
1820 10:57:10.285031 USB2 port 1: enabled 1
1821 10:57:10.287975 USB2 port 2: enabled 1
1822 10:57:10.288053 USB2 port 3: enabled 0
1823 10:57:10.291584 USB2 port 4: enabled 1
1824 10:57:10.295114 USB2 port 5: enabled 0
1825 10:57:10.295197 USB2 port 6: enabled 0
1826 10:57:10.298107 USB2 port 7: enabled 0
1827 10:57:10.301736 USB2 port 8: enabled 0
1828 10:57:10.304705 USB2 port 9: enabled 0
1829 10:57:10.304787 USB3 port 0: enabled 0
1830 10:57:10.308348 USB3 port 1: enabled 1
1831 10:57:10.311350 USB3 port 2: enabled 0
1832 10:57:10.311428 USB3 port 3: enabled 0
1833 10:57:10.315034 GENERIC: 0.0: enabled 1
1834 10:57:10.317888 GENERIC: 1.0: enabled 1
1835 10:57:10.317967 APIC: 01: enabled 1
1836 10:57:10.321360
1837 10:57:10.321441 APIC: 03: enabled 1
1838 10:57:10.324926 APIC: 06: enabled 1
1839 10:57:10.325011 APIC: 04: enabled 1
1840 10:57:10.327859 APIC: 05: enabled 1
1841 10:57:10.331531 APIC: 02: enabled 1
1842 10:57:10.331613 APIC: 07: enabled 1
1843 10:57:10.334927 PCI: 01:00.0: enabled 1
1844 10:57:10.341532 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1845 10:57:10.344562 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1846 10:57:10.348067 ELOG: NV offset 0xf30000 size 0x1000
1847 10:57:10.355808 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1848 10:57:10.362170 ELOG: Event(17) added with size 13 at 2022-11-22 10:57:09 UTC
1849 10:57:10.368927 ELOG: Event(92) added with size 9 at 2022-11-22 10:57:09 UTC
1850 10:57:10.375490 ELOG: Event(93) added with size 9 at 2022-11-22 10:57:09 UTC
1851 10:57:10.382020 ELOG: Event(9E) added with size 10 at 2022-11-22 10:57:09 UTC
1852 10:57:10.388548 ELOG: Event(9F) added with size 14 at 2022-11-22 10:57:09 UTC
1853 10:57:10.394987 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1854 10:57:10.398560 ELOG: Event(A1) added with size 10 at 2022-11-22 10:57:09 UTC
1855 10:57:10.408393 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1856 10:57:10.415078 ELOG: Event(A0) added with size 9 at 2022-11-22 10:57:09 UTC
1857 10:57:10.418744 elog_add_boot_reason: Logged dev mode boot
1858 10:57:10.425290 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1859 10:57:10.425376 Finalize devices...
1860 10:57:10.428288 Devices finalized
1861 10:57:10.435347 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1862 10:57:10.438425 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1863 10:57:10.444990 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1864 10:57:10.448633 ME: HFSTS1 : 0x80030055
1865 10:57:10.455114 ME: HFSTS2 : 0x30280116
1866 10:57:10.458113 ME: HFSTS3 : 0x00000050
1867 10:57:10.461554 ME: HFSTS4 : 0x00004000
1868 10:57:10.468579 ME: HFSTS5 : 0x00000000
1869 10:57:10.471491 ME: HFSTS6 : 0x00400006
1870 10:57:10.475106 ME: Manufacturing Mode : YES
1871 10:57:10.477872 ME: SPI Protection Mode Enabled : NO
1872 10:57:10.481410 ME: FW Partition Table : OK
1873 10:57:10.487956 ME: Bringup Loader Failure : NO
1874 10:57:10.491614 ME: Firmware Init Complete : NO
1875 10:57:10.494594 ME: Boot Options Present : NO
1876 10:57:10.498224 ME: Update In Progress : NO
1877 10:57:10.501204 ME: D0i3 Support : YES
1878 10:57:10.504825 ME: Low Power State Enabled : NO
1879 10:57:10.507888 ME: CPU Replaced : YES
1880 10:57:10.511521 ME: CPU Replacement Valid : YES
1881 10:57:10.514383
1882 10:57:10.518025 ME: Current Working State : 5
1883 10:57:10.521507 ME: Current Operation State : 1
1884 10:57:10.524466 ME: Current Operation Mode : 3
1885 10:57:10.527892 ME: Error Code : 0
1886 10:57:10.531011 ME: Enhanced Debug Mode : NO
1887 10:57:10.534672 ME: CPU Debug Disabled : YES
1888 10:57:10.537694 ME: TXT Support : NO
1889 10:57:10.544384 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1890 10:57:10.550949 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1891 10:57:10.554476 CBFS: 'fallback/slic' not found.
1892 10:57:10.561026 ACPI: Writing ACPI tables at 76b01000.
1893 10:57:10.561124 ACPI: * FACS
1894 10:57:10.564515 ACPI: * DSDT
1895 10:57:10.567346 Ramoops buffer: 0x100000@0x76a00000.
1896 10:57:10.570875 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1897 10:57:10.577237 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1898 10:57:10.580805 Google Chrome EC: version:
1899 10:57:10.584394 ro: voema_v2.0.7540-147f8d37d1
1900 10:57:10.587314 rw: voema_v2.0.7540-147f8d37d1
1901 10:57:10.587388 running image: 2
1902 10:57:10.593704 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1903 10:57:10.597992 ACPI: * FADT
1904 10:57:10.598101 SCI is IRQ9
1905 10:57:10.601626 ACPI: added table 1/32, length now 40
1906 10:57:10.604664
1907 10:57:10.604755 ACPI: * SSDT
1908 10:57:10.608103 Found 1 CPU(s) with 8 core(s) each.
1909 10:57:10.614785 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1910 10:57:10.618402 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1911 10:57:10.621401 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1912 10:57:10.624927 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1913 10:57:10.631478 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1914 10:57:10.637927 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1915 10:57:10.641531 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1916 10:57:10.648075 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1917 10:57:10.654605 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1918 10:57:10.658132 \_SB.PCI0.RP09: Added StorageD3Enable property
1919 10:57:10.664497 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1920 10:57:10.667973 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1921 10:57:10.674681 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1922 10:57:10.677685 PS2K: Passing 80 keymaps to kernel
1923 10:57:10.684188 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1924 10:57:10.691275 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1925 10:57:10.697915 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1926 10:57:10.704399 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1927 10:57:10.711156 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1928 10:57:10.717621 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1929 10:57:10.724312 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1930 10:57:10.731011 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1931 10:57:10.733935 ACPI: added table 2/32, length now 44
1932 10:57:10.734027 ACPI: * MCFG
1933 10:57:10.737498 ACPI: added table 3/32, length now 48
1934 10:57:10.740511
1935 10:57:10.740598 ACPI: * TPM2
1936 10:57:10.743985 TPM2 log created at 0x769f0000
1937 10:57:10.747672 ACPI: added table 4/32, length now 52
1938 10:57:10.750531 ACPI: * MADT
1939 10:57:10.750618 SCI is IRQ9
1940 10:57:10.754102 ACPI: added table 5/32, length now 56
1941 10:57:10.757049 current = 76b09850
1942 10:57:10.757135 ACPI: * DMAR
1943 10:57:10.760646 ACPI: added table 6/32, length now 60
1944 10:57:10.767103 ACPI: added table 7/32, length now 64
1945 10:57:10.767193 ACPI: * HPET
1946 10:57:10.770532 ACPI: added table 8/32, length now 68
1947 10:57:10.773725 ACPI: done.
1948 10:57:10.773811 ACPI tables: 35216 bytes.
1949 10:57:10.777244 smbios_write_tables: 769ef000
1950 10:57:10.780745 EC returned error result code 3
1951 10:57:10.783840 Couldn't obtain OEM name from CBI
1952 10:57:10.787966 Create SMBIOS type 16
1953 10:57:10.791413 Create SMBIOS type 17
1954 10:57:10.794385 GENERIC: 0.0 (WIFI Device)
1955 10:57:10.794472 SMBIOS tables: 1750 bytes.
1956 10:57:10.801538 Writing table forward entry at 0x00000500
1957 10:57:10.808026 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1958 10:57:10.811121 Writing coreboot table at 0x76b25000
1959 10:57:10.817693 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1960 10:57:10.821219 1. 0000000000001000-000000000009ffff: RAM
1961 10:57:10.824292 2. 00000000000a0000-00000000000fffff: RESERVED
1962 10:57:10.830872 3. 0000000000100000-00000000769eefff: RAM
1963 10:57:10.834453 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1964 10:57:10.841048 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1965 10:57:10.847635 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1966 10:57:10.850771 7. 0000000077000000-000000007fbfffff: RESERVED
1967 10:57:10.854156 8. 00000000c0000000-00000000cfffffff: RESERVED
1968 10:57:10.860952 9. 00000000f8000000-00000000f9ffffff: RESERVED
1969 10:57:10.864359 10. 00000000fb000000-00000000fb000fff: RESERVED
1970 10:57:10.871236 11. 00000000fe000000-00000000fe00ffff: RESERVED
1971 10:57:10.874106 12. 00000000fed80000-00000000fed87fff: RESERVED
1972 10:57:10.880723 13. 00000000fed90000-00000000fed92fff: RESERVED
1973 10:57:10.884263 14. 00000000feda0000-00000000feda1fff: RESERVED
1974 10:57:10.890762 15. 00000000fedc0000-00000000feddffff: RESERVED
1975 10:57:10.893782 16. 0000000100000000-00000002803fffff: RAM
1976 10:57:10.897401 Passing 4 GPIOs to payload:
1977 10:57:10.900370 NAME | PORT | POLARITY | VALUE
1978 10:57:10.906848 lid | undefined | high | high
1979 10:57:10.913997 power | undefined | high | low
1980 10:57:10.916995 oprom | undefined | high | low
1981 10:57:10.923977 EC in RW | 0x000000e5 | high | high
1982 10:57:10.930627 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum bb1
1983 10:57:10.930723 coreboot table: 1576 bytes.
1984 10:57:10.937147 IMD ROOT 0. 0x76fff000 0x00001000
1985 10:57:10.940160 IMD SMALL 1. 0x76ffe000 0x00001000
1986 10:57:10.943817 FSP MEMORY 2. 0x76c4e000 0x003b0000
1987 10:57:10.946761 VPD 3. 0x76c4d000 0x00000367
1988 10:57:10.950474 RO MCACHE 4. 0x76c4c000 0x00000fdc
1989 10:57:10.953365 CONSOLE 5. 0x76c2c000 0x00020000
1990 10:57:10.956967 FMAP 6. 0x76c2b000 0x00000578
1991 10:57:10.963366 TIME STAMP 7. 0x76c2a000 0x00000910
1992 10:57:10.966407 VBOOT WORK 8. 0x76c16000 0x00014000
1993 10:57:10.969874 ROMSTG STCK 9. 0x76c15000 0x00001000
1994 10:57:10.972894 AFTER CAR 10. 0x76c0a000 0x0000b000
1995 10:57:10.976413 RAMSTAGE 11. 0x76b97000 0x00073000
1996 10:57:10.979434 REFCODE 12. 0x76b42000 0x00055000
1997 10:57:10.982896 SMM BACKUP 13. 0x76b32000 0x00010000
1998 10:57:10.986577 4f444749 14. 0x76b30000 0x00002000
1999 10:57:10.989595 EXT VBT15. 0x76b2d000 0x0000219f
2000 10:57:10.996541 COREBOOT 16. 0x76b25000 0x00008000
2001 10:57:10.999554 ACPI 17. 0x76b01000 0x00024000
2002 10:57:11.003053 ACPI GNVS 18. 0x76b00000 0x00001000
2003 10:57:11.006140 RAMOOPS 19. 0x76a00000 0x00100000
2004 10:57:11.009860 TPM2 TCGLOG20. 0x769f0000 0x00010000
2005 10:57:11.012866 SMBIOS 21. 0x769ef000 0x00000800
2006 10:57:11.015830 IMD small region:
2007 10:57:11.019354 IMD ROOT 0. 0x76ffec00 0x00000400
2008 10:57:11.022973 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2009 10:57:11.025915 POWER STATE 2. 0x76ffeb80 0x00000044
2010 10:57:11.032427 ROMSTAGE 3. 0x76ffeb60 0x00000004
2011 10:57:11.035969 MEM INFO 4. 0x76ffe980 0x000001e0
2012 10:57:11.039008 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2013 10:57:11.042645
2014 10:57:11.042733 MTRR: Physical address space:
2015 10:57:11.049176 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2016 10:57:11.055889 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2017 10:57:11.062323 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2018 10:57:11.069002 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2019 10:57:11.075836 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2020 10:57:11.082219 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2021 10:57:11.089074 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2022 10:57:11.092129 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 10:57:11.095593 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 10:57:11.099083 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 10:57:11.105570 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 10:57:11.108656 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 10:57:11.112153 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 10:57:11.115123 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 10:57:11.121744 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 10:57:11.125339 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 10:57:11.128856 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 10:57:11.131918 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 10:57:11.135986 call enable_fixed_mtrr()
2034 10:57:11.139012 CPU physical address size: 39 bits
2035 10:57:11.145555 MTRR: default type WB/UC MTRR counts: 6/6.
2036 10:57:11.149229 MTRR: UC selected as default type.
2037 10:57:11.155884 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2038 10:57:11.158847 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2039 10:57:11.165485 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2040 10:57:11.172541 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2041 10:57:11.178998 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2042 10:57:11.185475 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2043 10:57:11.185631
2044 10:57:11.188518 MTRR check
2045 10:57:11.192085 Fixed MTRRs : Enabled
2046 10:57:11.192224 Variable MTRRs: Enabled
2047 10:57:11.192344
2048 10:57:11.198448 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 10:57:11.202188 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 10:57:11.204996 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 10:57:11.208473 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 10:57:11.214987 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 10:57:11.218612 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 10:57:11.222081 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 10:57:11.225153 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 10:57:11.228726 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 10:57:11.235320 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 10:57:11.238267 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 10:57:11.245335 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2060 10:57:11.248362 call enable_fixed_mtrr()
2061 10:57:11.252051 Checking cr50 for pending updates
2062 10:57:11.255764 CPU physical address size: 39 bits
2063 10:57:11.259300 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 10:57:11.262921 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 10:57:11.265932 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 10:57:11.272194 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 10:57:11.275711 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 10:57:11.279241 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 10:57:11.282141 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 10:57:11.289384 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 10:57:11.292233 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 10:57:11.295807 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 10:57:11.298822 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 10:57:11.302449 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 10:57:11.305867
2076 10:57:11.308846 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 10:57:11.312508 call enable_fixed_mtrr()
2078 10:57:11.315786 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 10:57:11.318878 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 10:57:11.325568 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 10:57:11.328594 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 10:57:11.332119 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 10:57:11.335756 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 10:57:11.338751 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 10:57:11.345531 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 10:57:11.348435 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 10:57:11.351966 CPU physical address size: 39 bits
2088 10:57:11.356067 call enable_fixed_mtrr()
2089 10:57:11.359707 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 10:57:11.366163 MTRR: Fixed MSR 0x250 0x0606060606060606
2091 10:57:11.369737 MTRR: Fixed MSR 0x258 0x0606060606060606
2092 10:57:11.372729 MTRR: Fixed MSR 0x259 0x0000000000000000
2093 10:57:11.376202 MTRR: Fixed MSR 0x268 0x0606060606060606
2094 10:57:11.382674 MTRR: Fixed MSR 0x269 0x0606060606060606
2095 10:57:11.385630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2096 10:57:11.389327 MTRR: Fixed MSR 0x26b 0x0606060606060606
2097 10:57:11.392068 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 10:57:11.399214 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 10:57:11.402243 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 10:57:11.405773 MTRR: Fixed MSR 0x26f 0x0606060606060606
2101 10:57:11.412370 MTRR: Fixed MSR 0x258 0x0606060606060606
2102 10:57:11.412464 call enable_fixed_mtrr()
2103 10:57:11.418906 MTRR: Fixed MSR 0x259 0x0000000000000000
2104 10:57:11.421939 MTRR: Fixed MSR 0x268 0x0606060606060606
2105 10:57:11.425619 MTRR: Fixed MSR 0x269 0x0606060606060606
2106 10:57:11.429567 MTRR: Fixed MSR 0x26a 0x0606060606060606
2107 10:57:11.435469 MTRR: Fixed MSR 0x26b 0x0606060606060606
2108 10:57:11.438921 MTRR: Fixed MSR 0x26c 0x0606060606060606
2109 10:57:11.441840 MTRR: Fixed MSR 0x26d 0x0606060606060606
2110 10:57:11.445426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2111 10:57:11.452029 MTRR: Fixed MSR 0x26f 0x0606060606060606
2112 10:57:11.455017 CPU physical address size: 39 bits
2113 10:57:11.458677 call enable_fixed_mtrr()
2114 10:57:11.461542 CPU physical address size: 39 bits
2115 10:57:11.465113 Reading cr50 TPM mode
2116 10:57:11.468829 MTRR: Fixed MSR 0x250 0x0606060606060606
2117 10:57:11.472359 MTRR: Fixed MSR 0x250 0x0606060606060606
2118 10:57:11.475227 MTRR: Fixed MSR 0x258 0x0606060606060606
2119 10:57:11.481738 MTRR: Fixed MSR 0x259 0x0000000000000000
2120 10:57:11.485367 MTRR: Fixed MSR 0x268 0x0606060606060606
2121 10:57:11.488433 MTRR: Fixed MSR 0x269 0x0606060606060606
2122 10:57:11.491721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2123 10:57:11.498300 MTRR: Fixed MSR 0x26b 0x0606060606060606
2124 10:57:11.501995 MTRR: Fixed MSR 0x26c 0x0606060606060606
2125 10:57:11.504897 MTRR: Fixed MSR 0x26d 0x0606060606060606
2126 10:57:11.508393 MTRR: Fixed MSR 0x26e 0x0606060606060606
2127 10:57:11.514861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2128 10:57:11.518362 MTRR: Fixed MSR 0x258 0x0606060606060606
2129 10:57:11.521792 MTRR: Fixed MSR 0x259 0x0000000000000000
2130 10:57:11.528397 MTRR: Fixed MSR 0x268 0x0606060606060606
2131 10:57:11.531903 MTRR: Fixed MSR 0x269 0x0606060606060606
2132 10:57:11.534833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2133 10:57:11.538507 MTRR: Fixed MSR 0x26b 0x0606060606060606
2134 10:57:11.544915 MTRR: Fixed MSR 0x26c 0x0606060606060606
2135 10:57:11.548077 MTRR: Fixed MSR 0x26d 0x0606060606060606
2136 10:57:11.551521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2137 10:57:11.554579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2138 10:57:11.558753 call enable_fixed_mtrr()
2139 10:57:11.561632 call enable_fixed_mtrr()
2140 10:57:11.565334 CPU physical address size: 39 bits
2141 10:57:11.568448 CPU physical address size: 39 bits
2142 10:57:11.571859 CPU physical address size: 39 bits
2143 10:57:11.578477 BS: BS_PAYLOAD_LOAD entry times (exec / console): 218 / 6 ms
2144 10:57:11.588518 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2145 10:57:11.591618 Checking segment from ROM address 0xffc02b38
2146 10:57:11.595103 Checking segment from ROM address 0xffc02b54
2147 10:57:11.601688 Loading segment from ROM address 0xffc02b38
2148 10:57:11.601791 code (compression=0)
2149 10:57:11.611725 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2150 10:57:11.618376 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2151 10:57:11.621337
2152 10:57:11.621431 it's not compressed!
2153 10:57:11.761070 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2154 10:57:11.767637 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2155 10:57:11.774311 Loading segment from ROM address 0xffc02b54
2156 10:57:11.774416 Entry Point 0x30000000
2157 10:57:11.777234
2158 10:57:11.777325 Loaded segments
2159 10:57:11.783812 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2160 10:57:11.827958 Finalizing chipset.
2161 10:57:11.830829 Finalizing SMM.
2162 10:57:11.830928 APMC done.
2163 10:57:11.837472 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2164 10:57:11.841069 mp_park_aps done after 0 msecs.
2165 10:57:11.843985 Jumping to boot code at 0x30000000(0x76b25000)
2166 10:57:11.854083 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2167 10:57:11.854198
2168 10:57:11.854301
2169 10:57:11.854386
2170 10:57:11.857576 Starting depthcharge on Voema...
2171 10:57:11.857686
2172 10:57:11.858080 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2173 10:57:11.858202 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2174 10:57:11.858311 Setting prompt string to ['volteer:']
2175 10:57:11.858406 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2176 10:57:11.867378 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2177 10:57:11.867487
2178 10:57:11.873843 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2179 10:57:11.873935
2180 10:57:11.880444 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2181 10:57:11.880539
2182 10:57:11.883932 Failed to find eMMC card reader
2183 10:57:11.884023
2184 10:57:11.886920 Wipe memory regions:
2185 10:57:11.887018
2186 10:57:11.890455 [0x00000000001000, 0x000000000a0000)
2187 10:57:11.890556
2188 10:57:11.893815 [0x00000000100000, 0x00000030000000)
2189 10:57:11.893904
2190 10:57:11.922303 [0x00000032662db0, 0x000000769ef000)
2191 10:57:11.922443
2192 10:57:11.961840 [0x00000100000000, 0x00000280400000)
2193 10:57:11.961972
2194 10:57:12.165075 ec_init: CrosEC protocol v3 supported (256, 256)
2195 10:57:12.165214
2196 10:57:12.172117 update_port_state: port C0 state: usb enable 1 mux conn 0
2197 10:57:12.172205
2198 10:57:12.181687 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2199 10:57:12.181777
2200 10:57:12.188201 pmc_check_ipc_sts: STS_BUSY done after 2162 us
2201 10:57:12.188289
2202 10:57:12.191841 send_conn_disc_msg: pmc_send_cmd succeeded
2203 10:57:12.191928
2204 10:57:12.624921 R8152: Initializing
2205 10:57:12.625062
2206 10:57:12.627808 Version 6 (ocp_data = 5c30)
2207 10:57:12.627902
2208 10:57:12.631169 R8152: Done initializing
2209 10:57:12.631263
2210 10:57:12.634717 Adding net device
2211 10:57:12.634816
2212 10:57:12.939490 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2213 10:57:12.939627
2214 10:57:12.939713
2215 10:57:12.939812
2216 10:57:12.943161 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2218 10:57:13.043951 volteer: tftpboot 192.168.201.1 8077826/tftp-deploy-6knr9min/kernel/bzImage 8077826/tftp-deploy-6knr9min/kernel/cmdline 8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
2219 10:57:13.044104 Setting prompt string to 'Starting kernel'
2220 10:57:13.044237 Setting prompt string to ['Starting kernel']
2221 10:57:13.044305 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2222 10:57:13.044380 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2223 10:57:13.048525 tftpboot 192.168.201.1 8077826/tftp-deploy-6knr9min/kernel/bzImoy-6knr9min/kernel/cmdline 8077826/tftp-deploy-6knr9min/ramdisk/ramdisk.cpio.gz
2224 10:57:13.048614
2225 10:57:13.048680 Waiting for link
2226 10:57:13.048740
2227 10:57:13.252376 done.
2228 10:57:13.252514
2229 10:57:13.252603 MAC: 00:24:32:30:79:06
2230 10:57:13.252698
2231 10:57:13.255427 Sending DHCP discover... done.
2232 10:57:13.255513
2233 10:57:13.258904 Waiting for reply... done.
2234 10:57:13.258989
2235 10:57:13.262003 Sending DHCP request... done.
2236 10:57:13.262088
2237 10:57:13.265120 Waiting for reply... done.
2238 10:57:13.265204
2239 10:57:13.268664 My ip is 192.168.201.23
2240 10:57:13.268748
2241 10:57:13.271708 The DHCP server ip is 192.168.201.1
2242 10:57:13.271792
2243 10:57:13.275377 TFTP server IP predefined by user: 192.168.201.1
2244 10:57:13.275462
2245 10:57:13.281910 Bootfile predefined by user: 8077826/tftp-deploy-6knr9min/kernel/bzImage
2246 10:57:13.281995
2247 10:57:13.288533 Sending tftp read request... done.
2248 10:57:13.288619
2249 10:57:13.291903 Waiting for the transfer...
2250 10:57:13.291994
2251 10:57:13.809263 00000000 ################################################################
2252 10:57:13.809400
2253 10:57:14.349179 00080000 ################################################################
2254 10:57:14.349325
2255 10:57:14.875427 00100000 ################################################################
2256 10:57:14.875566
2257 10:57:15.399315 00180000 ################################################################
2258 10:57:15.399450
2259 10:57:15.931055 00200000 ################################################################
2260 10:57:15.931195
2261 10:57:16.458381 00280000 ################################################################
2262 10:57:16.458528
2263 10:57:16.980329 00300000 ################################################################
2264 10:57:16.980468
2265 10:57:17.503870 00380000 ################################################################
2266 10:57:17.504010
2267 10:57:18.030092 00400000 ################################################################
2268 10:57:18.030282
2269 10:57:18.544438 00480000 ################################################################
2270 10:57:18.544579
2271 10:57:19.072462 00500000 ################################################################
2272 10:57:19.072598
2273 10:57:19.589305 00580000 ################################################################
2274 10:57:19.589437
2275 10:57:20.116475 00600000 ################################################################
2276 10:57:20.116611
2277 10:57:20.459398 00680000 ###################################### done.
2278 10:57:20.459843
2279 10:57:20.463157 The bootfile was 7126928 bytes long.
2280 10:57:20.463560
2281 10:57:20.466166 Sending tftp read request... done.
2282 10:57:20.466568
2283 10:57:20.469254 Waiting for the transfer...
2284 10:57:20.469625
2285 10:57:21.109705 00000000 ################################################################
2286 10:57:21.110263
2287 10:57:21.698954 00080000 ################################################################
2288 10:57:21.699142
2289 10:57:22.290402 00100000 ################################################################
2290 10:57:22.290908
2291 10:57:22.864829 00180000 ################################################################
2292 10:57:22.864970
2293 10:57:23.414591 00200000 ################################################################
2294 10:57:23.414724
2295 10:57:23.957333 00280000 ################################################################
2296 10:57:23.957463
2297 10:57:24.535069 00300000 ################################################################
2298 10:57:24.535201
2299 10:57:25.080033 00380000 ################################################################
2300 10:57:25.080189
2301 10:57:25.624403 00400000 ################################################################
2302 10:57:25.624552
2303 10:57:26.164045 00480000 ################################################################
2304 10:57:26.164185
2305 10:57:26.418985 00500000 ################################ done.
2306 10:57:26.419130
2307 10:57:26.422650 Sending tftp read request... done.
2308 10:57:26.422761
2309 10:57:26.425690 Waiting for the transfer...
2310 10:57:26.425804
2311 10:57:26.425889 00000000 # done.
2312 10:57:26.425955
2313 10:57:26.435656 Command line loaded dynamically from TFTP file: 8077826/tftp-deploy-6knr9min/kernel/cmdline
2314 10:57:26.435762
2315 10:57:26.458560 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8077826/extract-nfsrootfs-0haewfnk,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2316 10:57:26.458692
2317 10:57:26.466039 Shutting down all USB controllers.
2318 10:57:26.466133
2319 10:57:26.466251 Removing current net device
2320 10:57:26.466316
2321 10:57:26.469304 Finalizing coreboot
2322 10:57:26.469395
2323 10:57:26.475745 Exiting depthcharge with code 4 at timestamp: 23310585
2324 10:57:26.475847
2325 10:57:26.475916
2326 10:57:26.475978 Starting kernel ...
2327 10:57:26.476043
2328 10:57:26.476134
2329 10:57:26.476230
2330 10:57:26.476590 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2331 10:57:26.476690 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2332 10:57:26.476766 Setting prompt string to ['Linux version [0-9]']
2333 10:57:26.476835 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2334 10:57:26.476904 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2336 11:01:55.477674 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2338 11:01:55.478864 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2340 11:01:55.479782 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2343 11:01:55.481239 end: 2 depthcharge-action (duration 00:05:00) [common]
2345 11:01:55.482461 Cleaning after the job
2346 11:01:55.482931 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/ramdisk
2347 11:01:55.485469 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/kernel
2348 11:01:55.488208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/nfsrootfs
2349 11:01:55.549812 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077826/tftp-deploy-6knr9min/modules
2350 11:01:55.550131 start: 5.1 power-off (timeout 00:00:30) [common]
2351 11:01:55.550378 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2352 11:01:55.569142 >> Command sent successfully.
2353 11:01:55.570980 Returned 0 in 0 seconds
2354 11:01:55.672308 end: 5.1 power-off (duration 00:00:00) [common]
2356 11:01:55.673892 start: 5.2 read-feedback (timeout 00:10:00) [common]
2357 11:01:55.675116 Listened to connection for namespace 'common' for up to 1s
2358 11:01:56.678518 Finalising connection for namespace 'common'
2359 11:01:56.679197 Disconnecting from shell: Finalise
2360 11:01:56.780664 end: 5.2 read-feedback (duration 00:00:01) [common]
2361 11:01:56.781323 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077826
2362 11:01:56.912808 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077826
2363 11:01:56.913011 JobError: Your job cannot terminate cleanly.