Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:00:24.894732 lava-dispatcher, installed at version: 2022.06
2 15:00:24.894937 start: 0 validate
3 15:00:24.895066 Start time: 2022-09-30 15:00:24.895057+00:00 (UTC)
4 15:00:24.895198 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:00:24.895321 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Finitrd.cpio.gz exists
6 15:00:25.190369 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:00:25.190543 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:00:25.482235 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:00:25.482399 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:00:25.774349 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:00:25.774509 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:00:26.068216 validate duration: 1.17
14 15:00:26.068493 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:00:26.068593 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:00:26.068681 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:00:26.068782 Not decompressing ramdisk as can be used compressed.
18 15:00:26.068867 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/initrd.cpio.gz
19 15:00:26.068931 saving as /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/ramdisk/initrd.cpio.gz
20 15:00:26.069007 total size: 5431599 (5MB)
21 15:00:26.071897 progress 0% (0MB)
22 15:00:26.074543 progress 5% (0MB)
23 15:00:26.076793 progress 10% (0MB)
24 15:00:26.079077 progress 15% (0MB)
25 15:00:26.081403 progress 20% (1MB)
26 15:00:26.083726 progress 25% (1MB)
27 15:00:26.085808 progress 30% (1MB)
28 15:00:26.088352 progress 35% (1MB)
29 15:00:26.090602 progress 40% (2MB)
30 15:00:26.092950 progress 45% (2MB)
31 15:00:26.095059 progress 50% (2MB)
32 15:00:26.097561 progress 55% (2MB)
33 15:00:26.099976 progress 60% (3MB)
34 15:00:26.102194 progress 65% (3MB)
35 15:00:26.104730 progress 70% (3MB)
36 15:00:26.106901 progress 75% (3MB)
37 15:00:26.109204 progress 80% (4MB)
38 15:00:26.111489 progress 85% (4MB)
39 15:00:26.113972 progress 90% (4MB)
40 15:00:26.116052 progress 95% (4MB)
41 15:00:26.118393 progress 100% (5MB)
42 15:00:26.118657 5MB downloaded in 0.05s (104.31MB/s)
43 15:00:26.118810 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:00:26.119104 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:00:26.119194 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:00:26.119297 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:00:26.119417 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:00:26.119485 saving as /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/kernel/bzImage
50 15:00:26.119548 total size: 7126928 (6MB)
51 15:00:26.119609 No compression specified
52 15:00:26.121734 progress 0% (0MB)
53 15:00:26.125224 progress 5% (0MB)
54 15:00:26.127862 progress 10% (0MB)
55 15:00:26.131103 progress 15% (1MB)
56 15:00:26.134367 progress 20% (1MB)
57 15:00:26.137246 progress 25% (1MB)
58 15:00:26.140361 progress 30% (2MB)
59 15:00:26.143419 progress 35% (2MB)
60 15:00:26.146081 progress 40% (2MB)
61 15:00:26.149166 progress 45% (3MB)
62 15:00:26.152259 progress 50% (3MB)
63 15:00:26.155310 progress 55% (3MB)
64 15:00:26.158381 progress 60% (4MB)
65 15:00:26.161480 progress 65% (4MB)
66 15:00:26.164513 progress 70% (4MB)
67 15:00:26.167582 progress 75% (5MB)
68 15:00:26.170486 progress 80% (5MB)
69 15:00:26.173533 progress 85% (5MB)
70 15:00:26.176832 progress 90% (6MB)
71 15:00:26.179681 progress 95% (6MB)
72 15:00:26.182750 progress 100% (6MB)
73 15:00:26.182997 6MB downloaded in 0.06s (107.13MB/s)
74 15:00:26.183145 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:00:26.183381 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:00:26.183469 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:00:26.183561 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:00:26.183668 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/full.rootfs.tar.xz
80 15:00:26.183735 saving as /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/nfsrootfs/full.rootfs.tar
81 15:00:26.183812 total size: 133274540 (127MB)
82 15:00:26.183904 Using unxz to decompress xz
83 15:00:26.188203 progress 0% (0MB)
84 15:00:26.526518 progress 5% (6MB)
85 15:00:26.889680 progress 10% (12MB)
86 15:00:27.176792 progress 15% (19MB)
87 15:00:27.372130 progress 20% (25MB)
88 15:00:27.629241 progress 25% (31MB)
89 15:00:27.973290 progress 30% (38MB)
90 15:00:28.329627 progress 35% (44MB)
91 15:00:28.728365 progress 40% (50MB)
92 15:00:29.114638 progress 45% (57MB)
93 15:00:29.473616 progress 50% (63MB)
94 15:00:29.845667 progress 55% (69MB)
95 15:00:30.207776 progress 60% (76MB)
96 15:00:30.568143 progress 65% (82MB)
97 15:00:30.929970 progress 70% (89MB)
98 15:00:31.291940 progress 75% (95MB)
99 15:00:31.727430 progress 80% (101MB)
100 15:00:32.167987 progress 85% (108MB)
101 15:00:32.435115 progress 90% (114MB)
102 15:00:32.777569 progress 95% (120MB)
103 15:00:33.170960 progress 100% (127MB)
104 15:00:33.176030 127MB downloaded in 6.99s (18.18MB/s)
105 15:00:33.176303 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:00:33.176594 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:00:33.176737 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:00:33.176914 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:00:33.177056 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:00:33.177138 saving as /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/modules/modules.tar
112 15:00:33.177220 total size: 52080 (0MB)
113 15:00:33.177301 Using unxz to decompress xz
114 15:00:33.181715 progress 62% (0MB)
115 15:00:33.182096 progress 100% (0MB)
116 15:00:33.185355 0MB downloaded in 0.01s (6.11MB/s)
117 15:00:33.185582 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:00:33.185868 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:00:33.185984 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:00:33.186099 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:00:34.441220 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7462833/extract-nfsrootfs-btcnggtx
123 15:00:34.441430 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 15:00:34.441539 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 15:00:34.441675 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v
126 15:00:34.441777 makedir: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin
127 15:00:34.441862 makedir: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/tests
128 15:00:34.441944 makedir: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/results
129 15:00:34.442041 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-add-keys
130 15:00:34.442169 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-add-sources
131 15:00:34.442285 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-background-process-start
132 15:00:34.442400 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-background-process-stop
133 15:00:34.442513 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-common-functions
134 15:00:34.442625 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-echo-ipv4
135 15:00:34.442737 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-install-packages
136 15:00:34.442848 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-installed-packages
137 15:00:34.442960 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-os-build
138 15:00:34.443070 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-probe-channel
139 15:00:34.443180 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-probe-ip
140 15:00:34.443291 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-target-ip
141 15:00:34.443401 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-target-mac
142 15:00:34.443511 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-target-storage
143 15:00:34.443623 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-case
144 15:00:34.443754 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-event
145 15:00:34.443883 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-feedback
146 15:00:34.443999 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-raise
147 15:00:34.444109 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-reference
148 15:00:34.444220 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-runner
149 15:00:34.444330 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-set
150 15:00:34.444439 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-test-shell
151 15:00:34.444550 Updating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-install-packages (oe)
152 15:00:34.444665 Updating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/bin/lava-installed-packages (oe)
153 15:00:34.444763 Creating /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/environment
154 15:00:34.444848 LAVA metadata
155 15:00:34.444916 - LAVA_JOB_ID=7462833
156 15:00:34.444981 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:00:34.445079 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 15:00:34.445144 skipped lava-vland-overlay
159 15:00:34.445221 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:00:34.445303 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 15:00:34.445366 skipped lava-multinode-overlay
162 15:00:34.445441 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:00:34.445521 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 15:00:34.445611 Loading test definitions
165 15:00:34.445716 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 15:00:34.445791 Using /lava-7462833 at stage 0
167 15:00:34.446047 uuid=7462833_1.5.2.3.1 testdef=None
168 15:00:34.446139 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 15:00:34.446227 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 15:00:34.446694 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 15:00:34.446923 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 15:00:34.447486 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 15:00:34.447725 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 15:00:34.448405 runner path: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/0/tests/0_dmesg test_uuid 7462833_1.5.2.3.1
177 15:00:34.448577 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 15:00:34.448826 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 15:00:34.448900 Using /lava-7462833 at stage 1
181 15:00:34.449137 uuid=7462833_1.5.2.3.5 testdef=None
182 15:00:34.449228 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 15:00:34.449316 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 15:00:34.449753 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 15:00:34.449978 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 15:00:34.450547 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 15:00:34.450785 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 15:00:34.451329 runner path: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/1/tests/1_bootrr test_uuid 7462833_1.5.2.3.5
191 15:00:34.451471 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 15:00:34.451685 Creating lava-test-runner.conf files
194 15:00:34.451750 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/0 for stage 0
195 15:00:34.451832 - 0_dmesg
196 15:00:34.451944 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462833/lava-overlay-qunqqq3v/lava-7462833/1 for stage 1
197 15:00:34.452027 - 1_bootrr
198 15:00:34.452119 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 15:00:34.452203 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 15:00:34.457655 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 15:00:34.457759 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 15:00:34.457847 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 15:00:34.457934 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 15:00:34.458020 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 15:00:34.560012 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 15:00:34.560368 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
207 15:00:34.560484 extracting modules file /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462833/extract-nfsrootfs-btcnggtx
208 15:00:34.564682 extracting modules file /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462833/extract-overlay-ramdisk-dmnuzt9r/ramdisk
209 15:00:34.568588 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 15:00:34.568706 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 15:00:34.568793 [common] Applying overlay to NFS
212 15:00:34.568865 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462833/compress-overlay-y2t_w1qt/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462833/extract-nfsrootfs-btcnggtx
213 15:00:34.572886 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 15:00:34.572997 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 15:00:34.573088 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 15:00:34.573186 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 15:00:34.573266 Building ramdisk /var/lib/lava/dispatcher/tmp/7462833/extract-overlay-ramdisk-dmnuzt9r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462833/extract-overlay-ramdisk-dmnuzt9r/ramdisk
218 15:00:34.606187 >> 24546 blocks
219 15:00:35.077526 rename /var/lib/lava/dispatcher/tmp/7462833/extract-overlay-ramdisk-dmnuzt9r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
220 15:00:35.077911 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 15:00:35.078034 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 15:00:35.078139 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 15:00:35.078233 No mkimage arch provided, not using FIT.
224 15:00:35.078325 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 15:00:35.078408 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 15:00:35.078505 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 15:00:35.078599 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 15:00:35.078678 No LXC device requested
229 15:00:35.078759 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 15:00:35.078848 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 15:00:35.078936 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 15:00:35.079005 Checking files for TFTP limit of 4294967296 bytes.
233 15:00:35.079373 end: 1 tftp-deploy (duration 00:00:09) [common]
234 15:00:35.079473 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 15:00:35.079566 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 15:00:35.079696 substitutions:
237 15:00:35.079769 - {DTB}: None
238 15:00:35.079846 - {INITRD}: 7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
239 15:00:35.079943 - {KERNEL}: 7462833/tftp-deploy-eu29tg36/kernel/bzImage
240 15:00:35.080003 - {LAVA_MAC}: None
241 15:00:35.080062 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7462833/extract-nfsrootfs-btcnggtx
242 15:00:35.080121 - {NFS_SERVER_IP}: 192.168.201.1
243 15:00:35.080178 - {PRESEED_CONFIG}: None
244 15:00:35.080234 - {PRESEED_LOCAL}: None
245 15:00:35.080289 - {RAMDISK}: 7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
246 15:00:35.080346 - {ROOT_PART}: None
247 15:00:35.080401 - {ROOT}: None
248 15:00:35.080457 - {SERVER_IP}: 192.168.201.1
249 15:00:35.080511 - {TEE}: None
250 15:00:35.080566 Parsed boot commands:
251 15:00:35.080620 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 15:00:35.080773 Parsed boot commands: tftpboot 192.168.201.1 7462833/tftp-deploy-eu29tg36/kernel/bzImage 7462833/tftp-deploy-eu29tg36/kernel/cmdline 7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
253 15:00:35.080867 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 15:00:35.080955 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 15:00:35.081048 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 15:00:35.081136 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 15:00:35.081205 Not connected, no need to disconnect.
258 15:00:35.081281 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 15:00:35.081365 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 15:00:35.081431 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
261 15:00:35.083988 Setting prompt string to ['lava-test: # ']
262 15:00:35.084271 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 15:00:35.084375 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 15:00:35.084472 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 15:00:35.084565 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 15:00:35.084738 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
267 15:00:35.103937 >> Command sent successfully.
268 15:00:35.105805 Returned 0 in 0 seconds
269 15:00:35.206747 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 15:00:35.207532 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 15:00:35.207821 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 15:00:35.208116 Setting prompt string to 'Starting depthcharge on Helios...'
274 15:00:35.208310 Changing prompt to 'Starting depthcharge on Helios...'
275 15:00:35.208512 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 15:00:35.209197 [Enter `^Ec?' for help]
277 15:00:42.761094
278 15:00:42.761724
279 15:00:42.770770 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 15:00:42.773929 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 15:00:42.781100 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 15:00:42.783781 CPU: AES supported, TXT NOT supported, VT supported
283 15:00:42.790733 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 15:00:42.793993 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 15:00:42.800703 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 15:00:42.804292 VBOOT: Loading verstage.
287 15:00:42.807725 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 15:00:42.814061 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 15:00:42.820456 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 15:00:42.820952 CBFS @ c08000 size 3f8000
291 15:00:42.827407 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 15:00:42.830446 CBFS: Locating 'fallback/verstage'
293 15:00:42.833981 CBFS: Found @ offset 10fb80 size 1072c
294 15:00:42.837747
295 15:00:42.838327
296 15:00:42.848004 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 15:00:42.861998 Probing TPM: . done!
298 15:00:42.865375 TPM ready after 0 ms
299 15:00:42.868825 Connected to device vid:did:rid of 1ae0:0028:00
300 15:00:42.879357 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
301 15:00:42.882508 Initialized TPM device CR50 revision 0
302 15:00:42.918614 tlcl_send_startup: Startup return code is 0
303 15:00:42.919234 TPM: setup succeeded
304 15:00:42.931081 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 15:00:42.934714 Chrome EC: UHEPI supported
306 15:00:42.937701 Phase 1
307 15:00:42.941441 FMAP: area GBB found @ c05000 (12288 bytes)
308 15:00:42.947950 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 15:00:42.948643 Phase 2
310 15:00:42.951397 Phase 3
311 15:00:42.954659 FMAP: area GBB found @ c05000 (12288 bytes)
312 15:00:42.961340 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 15:00:42.967482 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
314 15:00:42.971171 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 15:00:42.977509 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 15:00:42.993389 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
317 15:00:42.996578 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
318 15:00:43.002999 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 15:00:43.007958 Phase 4
320 15:00:43.010553 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
321 15:00:43.017415 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 15:00:43.197126 VB2:vb2_rsa_verify_digest() Digest check failed!
323 15:00:43.203438 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 15:00:43.203950 Saving nvdata
325 15:00:43.207023 Reboot requested (10020007)
326 15:00:43.210402 board_reset() called!
327 15:00:43.210990 full_reset() called!
328 15:00:47.728436
329 15:00:47.729016
330 15:00:47.738088 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 15:00:47.741461 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 15:00:47.747870 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 15:00:47.751397 CPU: AES supported, TXT NOT supported, VT supported
334 15:00:47.758291 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 15:00:47.761329 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 15:00:47.767628 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 15:00:47.770787 VBOOT: Loading verstage.
338 15:00:47.777302 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 15:00:47.780954 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 15:00:47.787610 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 15:00:47.788145 CBFS @ c08000 size 3f8000
342 15:00:47.793994 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 15:00:47.797369 CBFS: Locating 'fallback/verstage'
344 15:00:47.800511 CBFS: Found @ offset 10fb80 size 1072c
345 15:00:47.805096
346 15:00:47.805585
347 15:00:47.814859 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 15:00:47.828916 Probing TPM: . done!
349 15:00:47.832292 TPM ready after 0 ms
350 15:00:47.835584 Connected to device vid:did:rid of 1ae0:0028:00
351 15:00:47.845861 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
352 15:00:47.849344 Initialized TPM device CR50 revision 0
353 15:00:47.885042 tlcl_send_startup: Startup return code is 0
354 15:00:47.885563 TPM: setup succeeded
355 15:00:47.897405 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 15:00:47.901409 Chrome EC: UHEPI supported
357 15:00:47.905111 Phase 1
358 15:00:47.908166 FMAP: area GBB found @ c05000 (12288 bytes)
359 15:00:47.914819 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 15:00:47.921210 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 15:00:47.924634 Recovery requested (1009000e)
362 15:00:47.930429 Saving nvdata
363 15:00:47.936616 tlcl_extend: response is 0
364 15:00:47.945693 tlcl_extend: response is 0
365 15:00:47.951704 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 15:00:47.955273 CBFS @ c08000 size 3f8000
367 15:00:47.961777 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 15:00:47.965194 CBFS: Locating 'fallback/romstage'
369 15:00:47.968807 CBFS: Found @ offset 80 size 145fc
370 15:00:47.971767 Accumulated console time in verstage 98 ms
371 15:00:47.971889
372 15:00:47.971958
373 15:00:47.985015 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 15:00:47.991676 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 15:00:47.995086 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 15:00:47.998148 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 15:00:48.005248 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 15:00:48.008217 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 15:00:48.011227 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
380 15:00:48.014676 TCO_STS: 0000 0000
381 15:00:48.018232 GEN_PMCON: e0015238 00000200
382 15:00:48.021160 GBLRST_CAUSE: 00000000 00000000
383 15:00:48.021247 prev_sleep_state 5
384 15:00:48.025106 Boot Count incremented to 40097
385 15:00:48.031704 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 15:00:48.035223 CBFS @ c08000 size 3f8000
387 15:00:48.041668 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 15:00:48.041757 CBFS: Locating 'fspm.bin'
389 15:00:48.048178 CBFS: Found @ offset 5ffc0 size 71000
390 15:00:48.051827 Chrome EC: UHEPI supported
391 15:00:48.058178 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 15:00:48.061608 Probing TPM: done!
393 15:00:48.068529 Connected to device vid:did:rid of 1ae0:0028:00
394 15:00:48.078231 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
395 15:00:48.084877 Initialized TPM device CR50 revision 0
396 15:00:48.093337 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 15:00:48.099774 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 15:00:48.103270 MRC cache found, size 1948
399 15:00:48.106637 bootmode is set to: 2
400 15:00:48.109963 PRMRR disabled by config.
401 15:00:48.113083 SPD INDEX = 1
402 15:00:48.116540 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 15:00:48.119713 CBFS @ c08000 size 3f8000
404 15:00:48.126041 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 15:00:48.126134 CBFS: Locating 'spd.bin'
406 15:00:48.129636 CBFS: Found @ offset 5fb80 size 400
407 15:00:48.132722 SPD: module type is LPDDR3
408 15:00:48.136063 SPD: module part is
409 15:00:48.142659 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 15:00:48.146263 SPD: device width 4 bits, bus width 8 bits
411 15:00:48.149314 SPD: module size is 4096 MB (per channel)
412 15:00:48.152797 memory slot: 0 configuration done.
413 15:00:48.156023 memory slot: 2 configuration done.
414 15:00:48.207736 CBMEM:
415 15:00:48.211078 IMD: root @ 99fff000 254 entries.
416 15:00:48.214690 IMD: root @ 99ffec00 62 entries.
417 15:00:48.217787 External stage cache:
418 15:00:48.221069 IMD: root @ 9abff000 254 entries.
419 15:00:48.224494 IMD: root @ 9abfec00 62 entries.
420 15:00:48.227572 Chrome EC: clear events_b mask to 0x0000000020004000
421 15:00:48.243762 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 15:00:48.257130 tlcl_write: response is 0
423 15:00:48.266328 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 15:00:48.272811 MRC: TPM MRC hash updated successfully.
425 15:00:48.272898 2 DIMMs found
426 15:00:48.276662 SMM Memory Map
427 15:00:48.279294 SMRAM : 0x9a000000 0x1000000
428 15:00:48.282659 Subregion 0: 0x9a000000 0xa00000
429 15:00:48.286333 Subregion 1: 0x9aa00000 0x200000
430 15:00:48.289281 Subregion 2: 0x9ac00000 0x400000
431 15:00:48.292757 top_of_ram = 0x9a000000
432 15:00:48.295809 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 15:00:48.302614 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 15:00:48.306197 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 15:00:48.312470 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 15:00:48.315661 CBFS @ c08000 size 3f8000
437 15:00:48.319460 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 15:00:48.322639 CBFS: Locating 'fallback/postcar'
439 15:00:48.328933 CBFS: Found @ offset 107000 size 4b44
440 15:00:48.332135 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 15:00:48.345422 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 15:00:48.348146 Processing 180 relocs. Offset value of 0x97c0c000
443 15:00:48.357147 Accumulated console time in romstage 286 ms
444 15:00:48.357234
445 15:00:48.357303
446 15:00:48.367198 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 15:00:48.374070 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 15:00:48.377201 CBFS @ c08000 size 3f8000
449 15:00:48.381101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 15:00:48.383536 CBFS: Locating 'fallback/ramstage'
451 15:00:48.390903 CBFS: Found @ offset 43380 size 1b9e8
452 15:00:48.397247 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 15:00:48.428888 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 15:00:48.432146 Processing 3976 relocs. Offset value of 0x98db0000
455 15:00:48.439461 Accumulated console time in postcar 52 ms
456 15:00:48.440070
457 15:00:48.440463
458 15:00:48.449153 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 15:00:48.455560 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 15:00:48.458979 WARNING: RO_VPD is uninitialized or empty.
461 15:00:48.462209 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 15:00:48.469387 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 15:00:48.469903 Normal boot.
464 15:00:48.476216 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 15:00:48.478856 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 15:00:48.482012 CBFS @ c08000 size 3f8000
467 15:00:48.489167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 15:00:48.492001 CBFS: Locating 'cpu_microcode_blob.bin'
469 15:00:48.495428 CBFS: Found @ offset 14700 size 2ec00
470 15:00:48.498604 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 15:00:48.501925 Skip microcode update
472 15:00:48.508671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 15:00:48.509113 CBFS @ c08000 size 3f8000
474 15:00:48.515073 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 15:00:48.518372 CBFS: Locating 'fsps.bin'
476 15:00:48.522039 CBFS: Found @ offset d1fc0 size 35000
477 15:00:48.547355 Detected 4 core, 8 thread CPU.
478 15:00:48.550656 Setting up SMI for CPU
479 15:00:48.553932 IED base = 0x9ac00000
480 15:00:48.554370 IED size = 0x00400000
481 15:00:48.556809 Will perform SMM setup.
482 15:00:48.563421 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 15:00:48.570313 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 15:00:48.573828 Processing 16 relocs. Offset value of 0x00030000
485 15:00:48.577029 Attempting to start 7 APs
486 15:00:48.580283 Waiting for 10ms after sending INIT.
487 15:00:48.597193 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
488 15:00:48.597638 done.
489 15:00:48.599948 AP: slot 1 apic_id 3.
490 15:00:48.603705 AP: slot 4 apic_id 2.
491 15:00:48.604227 AP: slot 6 apic_id 6.
492 15:00:48.606815 AP: slot 3 apic_id 7.
493 15:00:48.610404 AP: slot 5 apic_id 5.
494 15:00:48.610840 AP: slot 7 apic_id 4.
495 15:00:48.616758 Waiting for 2nd SIPI to complete...done.
496 15:00:48.623366 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 15:00:48.630108 Processing 13 relocs. Offset value of 0x00038000
498 15:00:48.633197 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 15:00:48.640049 Installing SMM handler to 0x9a000000
500 15:00:48.646784 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 15:00:48.650511 Processing 658 relocs. Offset value of 0x9a010000
502 15:00:48.660190 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 15:00:48.663253 Processing 13 relocs. Offset value of 0x9a008000
504 15:00:48.669459 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 15:00:48.676647 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 15:00:48.682897 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 15:00:48.686215 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 15:00:48.692843 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 15:00:48.699941 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 15:00:48.702599 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 15:00:48.709266 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 15:00:48.712882 Clearing SMI status registers
513 15:00:48.716334 SMI_STS: PM1
514 15:00:48.716866 PM1_STS: PWRBTN
515 15:00:48.719684 TCO_STS: SECOND_TO
516 15:00:48.723216 New SMBASE 0x9a000000
517 15:00:48.726406 In relocation handler: CPU 0
518 15:00:48.729543 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 15:00:48.732975 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 15:00:48.736294 Relocation complete.
521 15:00:48.739552 New SMBASE 0x99fff800
522 15:00:48.742543 In relocation handler: CPU 2
523 15:00:48.745849 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
524 15:00:48.749578 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 15:00:48.752563 Relocation complete.
526 15:00:48.756132 New SMBASE 0x99fff000
527 15:00:48.756695 In relocation handler: CPU 4
528 15:00:48.762542 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
529 15:00:48.766049 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 15:00:48.768925 Relocation complete.
531 15:00:48.772370 New SMBASE 0x99fffc00
532 15:00:48.772643 In relocation handler: CPU 1
533 15:00:48.778925 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
534 15:00:48.782181 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 15:00:48.785735 Relocation complete.
536 15:00:48.785821 New SMBASE 0x99ffe400
537 15:00:48.788995 In relocation handler: CPU 7
538 15:00:48.796304 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
539 15:00:48.799118 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 15:00:48.802362 Relocation complete.
541 15:00:48.802836 New SMBASE 0x99ffec00
542 15:00:48.805701 In relocation handler: CPU 5
543 15:00:48.809286 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
544 15:00:48.815500 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 15:00:48.819193 Relocation complete.
546 15:00:48.819631 New SMBASE 0x99fff400
547 15:00:48.822268 In relocation handler: CPU 3
548 15:00:48.825679 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 15:00:48.832341 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 15:00:48.835486 Relocation complete.
551 15:00:48.836089 New SMBASE 0x99ffe800
552 15:00:48.838731 In relocation handler: CPU 6
553 15:00:48.842501 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 15:00:48.848891 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 15:00:48.849338 Relocation complete.
556 15:00:48.852289 Initializing CPU #0
557 15:00:48.855463 CPU: vendor Intel device 806ec
558 15:00:48.859035 CPU: family 06, model 8e, stepping 0c
559 15:00:48.862192 Clearing out pending MCEs
560 15:00:48.865204 Setting up local APIC...
561 15:00:48.865320 apic_id: 0x00 done.
562 15:00:48.868991 Turbo is available but hidden
563 15:00:48.872147 Turbo is available and visible
564 15:00:48.875654 VMX status: enabled
565 15:00:48.878598 IA32_FEATURE_CONTROL status: locked
566 15:00:48.882121 Skip microcode update
567 15:00:48.882199 CPU #0 initialized
568 15:00:48.885243 Initializing CPU #2
569 15:00:48.888699 Initializing CPU #4
570 15:00:48.888774 Initializing CPU #1
571 15:00:48.891702 CPU: vendor Intel device 806ec
572 15:00:48.895386 CPU: family 06, model 8e, stepping 0c
573 15:00:48.898782 Clearing out pending MCEs
574 15:00:48.902228 Initializing CPU #7
575 15:00:48.905016 CPU: vendor Intel device 806ec
576 15:00:48.908544 CPU: family 06, model 8e, stepping 0c
577 15:00:48.911566 CPU: vendor Intel device 806ec
578 15:00:48.915011 CPU: family 06, model 8e, stepping 0c
579 15:00:48.918505 Clearing out pending MCEs
580 15:00:48.918603 Clearing out pending MCEs
581 15:00:48.921462 Setting up local APIC...
582 15:00:48.925103 Initializing CPU #3
583 15:00:48.925199 Initializing CPU #6
584 15:00:48.928303 CPU: vendor Intel device 806ec
585 15:00:48.935049 CPU: family 06, model 8e, stepping 0c
586 15:00:48.935137 Setting up local APIC...
587 15:00:48.938148 Initializing CPU #5
588 15:00:48.941480 CPU: vendor Intel device 806ec
589 15:00:48.945178 CPU: family 06, model 8e, stepping 0c
590 15:00:48.947837 apic_id: 0x01 done.
591 15:00:48.947934 Clearing out pending MCEs
592 15:00:48.951448 CPU: vendor Intel device 806ec
593 15:00:48.958014 CPU: family 06, model 8e, stepping 0c
594 15:00:48.958092 Setting up local APIC...
595 15:00:48.961650 VMX status: enabled
596 15:00:48.964824 apic_id: 0x07 done.
597 15:00:48.964900 Clearing out pending MCEs
598 15:00:48.967857 VMX status: enabled
599 15:00:48.971787 Setting up local APIC...
600 15:00:48.974792 Clearing out pending MCEs
601 15:00:48.974865 CPU: vendor Intel device 806ec
602 15:00:48.981624 CPU: family 06, model 8e, stepping 0c
603 15:00:48.981720 Clearing out pending MCEs
604 15:00:48.984809 Setting up local APIC...
605 15:00:48.987746 IA32_FEATURE_CONTROL status: locked
606 15:00:48.991128 apic_id: 0x06 done.
607 15:00:48.994594 Skip microcode update
608 15:00:48.994681 VMX status: enabled
609 15:00:48.997974 CPU #3 initialized
610 15:00:49.001383 IA32_FEATURE_CONTROL status: locked
611 15:00:49.004312 apic_id: 0x03 done.
612 15:00:49.004403 Setting up local APIC...
613 15:00:49.007794 Skip microcode update
614 15:00:49.011217 VMX status: enabled
615 15:00:49.011686 apic_id: 0x02 done.
616 15:00:49.014524 IA32_FEATURE_CONTROL status: locked
617 15:00:49.018024 VMX status: enabled
618 15:00:49.020954 Skip microcode update
619 15:00:49.024772 IA32_FEATURE_CONTROL status: locked
620 15:00:49.025218 CPU #1 initialized
621 15:00:49.027950 Skip microcode update
622 15:00:49.031194 IA32_FEATURE_CONTROL status: locked
623 15:00:49.034321 CPU #6 initialized
624 15:00:49.034755 apic_id: 0x04 done.
625 15:00:49.037627 Setting up local APIC...
626 15:00:49.041217 Skip microcode update
627 15:00:49.041668 CPU #4 initialized
628 15:00:49.044409 VMX status: enabled
629 15:00:49.048113 apic_id: 0x05 done.
630 15:00:49.051461 IA32_FEATURE_CONTROL status: locked
631 15:00:49.051995 VMX status: enabled
632 15:00:49.054186 Skip microcode update
633 15:00:49.058372 IA32_FEATURE_CONTROL status: locked
634 15:00:49.060806 CPU #7 initialized
635 15:00:49.061291 Skip microcode update
636 15:00:49.064142 CPU #2 initialized
637 15:00:49.064615 CPU #5 initialized
638 15:00:49.071687 bsp_do_flight_plan done after 452 msecs.
639 15:00:49.074354 CPU: frequency set to 4200 MHz
640 15:00:49.074875 Enabling SMIs.
641 15:00:49.077464 Locking SMM.
642 15:00:49.091004 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 15:00:49.094215 CBFS @ c08000 size 3f8000
644 15:00:49.101646 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 15:00:49.102086 CBFS: Locating 'vbt.bin'
646 15:00:49.104119 CBFS: Found @ offset 5f5c0 size 499
647 15:00:49.110912 Found a VBT of 4608 bytes after decompression
648 15:00:49.290224 Display FSP Version Info HOB
649 15:00:49.293631 Reference Code - CPU = 9.0.1e.30
650 15:00:49.296938 uCode Version = 0.0.0.ca
651 15:00:49.299820 TXT ACM version = ff.ff.ff.ffff
652 15:00:49.303614 Display FSP Version Info HOB
653 15:00:49.306854 Reference Code - ME = 9.0.1e.30
654 15:00:49.310395 MEBx version = 0.0.0.0
655 15:00:49.313355 ME Firmware Version = Consumer SKU
656 15:00:49.316369 Display FSP Version Info HOB
657 15:00:49.319724 Reference Code - CML PCH = 9.0.1e.30
658 15:00:49.323198 PCH-CRID Status = Disabled
659 15:00:49.327015 PCH-CRID Original Value = ff.ff.ff.ffff
660 15:00:49.330302 PCH-CRID New Value = ff.ff.ff.ffff
661 15:00:49.333668 OPROM - RST - RAID = ff.ff.ff.ffff
662 15:00:49.336503 ChipsetInit Base Version = ff.ff.ff.ffff
663 15:00:49.339982 ChipsetInit Oem Version = ff.ff.ff.ffff
664 15:00:49.343201 Display FSP Version Info HOB
665 15:00:49.350197 Reference Code - SA - System Agent = 9.0.1e.30
666 15:00:49.353229 Reference Code - MRC = 0.7.1.6c
667 15:00:49.353315 SA - PCIe Version = 9.0.1e.30
668 15:00:49.356268 SA-CRID Status = Disabled
669 15:00:49.360410 SA-CRID Original Value = 0.0.0.c
670 15:00:49.363104 SA-CRID New Value = 0.0.0.c
671 15:00:49.366385 OPROM - VBIOS = ff.ff.ff.ffff
672 15:00:49.369747 RTC Init
673 15:00:49.372841 Set power on after power failure.
674 15:00:49.372932 Disabling Deep S3
675 15:00:49.376064 Disabling Deep S3
676 15:00:49.376148 Disabling Deep S4
677 15:00:49.379385 Disabling Deep S4
678 15:00:49.379470 Disabling Deep S5
679 15:00:49.383200 Disabling Deep S5
680 15:00:49.389887 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
681 15:00:49.389972 Enumerating buses...
682 15:00:49.396408 Show all devs... Before device enumeration.
683 15:00:49.396493 Root Device: enabled 1
684 15:00:49.400302 CPU_CLUSTER: 0: enabled 1
685 15:00:49.402761 DOMAIN: 0000: enabled 1
686 15:00:49.405982 APIC: 00: enabled 1
687 15:00:49.406073 PCI: 00:00.0: enabled 1
688 15:00:49.409407 PCI: 00:02.0: enabled 1
689 15:00:49.412543 PCI: 00:04.0: enabled 0
690 15:00:49.416276 PCI: 00:05.0: enabled 0
691 15:00:49.416382 PCI: 00:12.0: enabled 1
692 15:00:49.419822 PCI: 00:12.5: enabled 0
693 15:00:49.422601 PCI: 00:12.6: enabled 0
694 15:00:49.422710 PCI: 00:14.0: enabled 1
695 15:00:49.426003 PCI: 00:14.1: enabled 0
696 15:00:49.429418 PCI: 00:14.3: enabled 1
697 15:00:49.432746 PCI: 00:14.5: enabled 0
698 15:00:49.432851 PCI: 00:15.0: enabled 1
699 15:00:49.435671 PCI: 00:15.1: enabled 1
700 15:00:49.439413 PCI: 00:15.2: enabled 0
701 15:00:49.442527 PCI: 00:15.3: enabled 0
702 15:00:49.442633 PCI: 00:16.0: enabled 1
703 15:00:49.445636 PCI: 00:16.1: enabled 0
704 15:00:49.449179 PCI: 00:16.2: enabled 0
705 15:00:49.452880 PCI: 00:16.3: enabled 0
706 15:00:49.452986 PCI: 00:16.4: enabled 0
707 15:00:49.455840 PCI: 00:16.5: enabled 0
708 15:00:49.459011 PCI: 00:17.0: enabled 1
709 15:00:49.462410 PCI: 00:19.0: enabled 1
710 15:00:49.462495 PCI: 00:19.1: enabled 0
711 15:00:49.466003 PCI: 00:19.2: enabled 0
712 15:00:49.469061 PCI: 00:1a.0: enabled 0
713 15:00:49.469146 PCI: 00:1c.0: enabled 0
714 15:00:49.472235 PCI: 00:1c.1: enabled 0
715 15:00:49.475874 PCI: 00:1c.2: enabled 0
716 15:00:49.478972 PCI: 00:1c.3: enabled 0
717 15:00:49.479072 PCI: 00:1c.4: enabled 0
718 15:00:49.482500 PCI: 00:1c.5: enabled 0
719 15:00:49.485501 PCI: 00:1c.6: enabled 0
720 15:00:49.488765 PCI: 00:1c.7: enabled 0
721 15:00:49.488850 PCI: 00:1d.0: enabled 1
722 15:00:49.492173 PCI: 00:1d.1: enabled 0
723 15:00:49.495707 PCI: 00:1d.2: enabled 0
724 15:00:49.498609 PCI: 00:1d.3: enabled 0
725 15:00:49.498694 PCI: 00:1d.4: enabled 0
726 15:00:49.502380 PCI: 00:1d.5: enabled 1
727 15:00:49.505663 PCI: 00:1e.0: enabled 1
728 15:00:49.505750 PCI: 00:1e.1: enabled 0
729 15:00:49.508895 PCI: 00:1e.2: enabled 1
730 15:00:49.512377 PCI: 00:1e.3: enabled 1
731 15:00:49.515273 PCI: 00:1f.0: enabled 1
732 15:00:49.515358 PCI: 00:1f.1: enabled 1
733 15:00:49.519048 PCI: 00:1f.2: enabled 1
734 15:00:49.521984 PCI: 00:1f.3: enabled 1
735 15:00:49.525859 PCI: 00:1f.4: enabled 1
736 15:00:49.525945 PCI: 00:1f.5: enabled 1
737 15:00:49.528695 PCI: 00:1f.6: enabled 0
738 15:00:49.532201 USB0 port 0: enabled 1
739 15:00:49.532286 I2C: 00:15: enabled 1
740 15:00:49.535199 I2C: 00:5d: enabled 1
741 15:00:49.538595 GENERIC: 0.0: enabled 1
742 15:00:49.542142 I2C: 00:1a: enabled 1
743 15:00:49.542227 I2C: 00:38: enabled 1
744 15:00:49.545573 I2C: 00:39: enabled 1
745 15:00:49.548745 I2C: 00:3a: enabled 1
746 15:00:49.548830 I2C: 00:3b: enabled 1
747 15:00:49.551991 PCI: 00:00.0: enabled 1
748 15:00:49.555678 SPI: 00: enabled 1
749 15:00:49.555762 SPI: 01: enabled 1
750 15:00:49.558440 PNP: 0c09.0: enabled 1
751 15:00:49.561712 USB2 port 0: enabled 1
752 15:00:49.561797 USB2 port 1: enabled 1
753 15:00:49.565155 USB2 port 2: enabled 0
754 15:00:49.568323 USB2 port 3: enabled 0
755 15:00:49.568408 USB2 port 5: enabled 0
756 15:00:49.571535 USB2 port 6: enabled 1
757 15:00:49.575337 USB2 port 9: enabled 1
758 15:00:49.575421 USB3 port 0: enabled 1
759 15:00:49.578817 USB3 port 1: enabled 1
760 15:00:49.582251 USB3 port 2: enabled 1
761 15:00:49.585149 USB3 port 3: enabled 1
762 15:00:49.585234 USB3 port 4: enabled 0
763 15:00:49.588336 APIC: 03: enabled 1
764 15:00:49.591617 APIC: 01: enabled 1
765 15:00:49.591703 APIC: 07: enabled 1
766 15:00:49.595083 APIC: 02: enabled 1
767 15:00:49.595168 APIC: 05: enabled 1
768 15:00:49.598581 APIC: 06: enabled 1
769 15:00:49.601610 APIC: 04: enabled 1
770 15:00:49.601695 Compare with tree...
771 15:00:49.604986 Root Device: enabled 1
772 15:00:49.608334 CPU_CLUSTER: 0: enabled 1
773 15:00:49.608425 APIC: 00: enabled 1
774 15:00:49.611650 APIC: 03: enabled 1
775 15:00:49.614844 APIC: 01: enabled 1
776 15:00:49.614942 APIC: 07: enabled 1
777 15:00:49.618319 APIC: 02: enabled 1
778 15:00:49.621585 APIC: 05: enabled 1
779 15:00:49.624725 APIC: 06: enabled 1
780 15:00:49.624841 APIC: 04: enabled 1
781 15:00:49.628260 DOMAIN: 0000: enabled 1
782 15:00:49.631826 PCI: 00:00.0: enabled 1
783 15:00:49.634759 PCI: 00:02.0: enabled 1
784 15:00:49.634897 PCI: 00:04.0: enabled 0
785 15:00:49.638126 PCI: 00:05.0: enabled 0
786 15:00:49.641619 PCI: 00:12.0: enabled 1
787 15:00:49.644946 PCI: 00:12.5: enabled 0
788 15:00:49.645126 PCI: 00:12.6: enabled 0
789 15:00:49.648191 PCI: 00:14.0: enabled 1
790 15:00:49.651446 USB0 port 0: enabled 1
791 15:00:49.655015 USB2 port 0: enabled 1
792 15:00:49.658169 USB2 port 1: enabled 1
793 15:00:49.661856 USB2 port 2: enabled 0
794 15:00:49.662187 USB2 port 3: enabled 0
795 15:00:49.664670 USB2 port 5: enabled 0
796 15:00:49.668136 USB2 port 6: enabled 1
797 15:00:49.672130 USB2 port 9: enabled 1
798 15:00:49.674870 USB3 port 0: enabled 1
799 15:00:49.675353 USB3 port 1: enabled 1
800 15:00:49.678677 USB3 port 2: enabled 1
801 15:00:49.682101 USB3 port 3: enabled 1
802 15:00:49.685001 USB3 port 4: enabled 0
803 15:00:49.688531 PCI: 00:14.1: enabled 0
804 15:00:49.691350 PCI: 00:14.3: enabled 1
805 15:00:49.691904 PCI: 00:14.5: enabled 0
806 15:00:49.694548 PCI: 00:15.0: enabled 1
807 15:00:49.697537 I2C: 00:15: enabled 1
808 15:00:49.700847 PCI: 00:15.1: enabled 1
809 15:00:49.700923 I2C: 00:5d: enabled 1
810 15:00:49.704315 GENERIC: 0.0: enabled 1
811 15:00:49.708536 PCI: 00:15.2: enabled 0
812 15:00:49.711506 PCI: 00:15.3: enabled 0
813 15:00:49.714160 PCI: 00:16.0: enabled 1
814 15:00:49.714243 PCI: 00:16.1: enabled 0
815 15:00:49.717495 PCI: 00:16.2: enabled 0
816 15:00:49.721495 PCI: 00:16.3: enabled 0
817 15:00:49.724813 PCI: 00:16.4: enabled 0
818 15:00:49.727618 PCI: 00:16.5: enabled 0
819 15:00:49.727725 PCI: 00:17.0: enabled 1
820 15:00:49.731297 PCI: 00:19.0: enabled 1
821 15:00:49.734625 I2C: 00:1a: enabled 1
822 15:00:49.738157 I2C: 00:38: enabled 1
823 15:00:49.738566 I2C: 00:39: enabled 1
824 15:00:49.741088 I2C: 00:3a: enabled 1
825 15:00:49.745262 I2C: 00:3b: enabled 1
826 15:00:49.748287 PCI: 00:19.1: enabled 0
827 15:00:49.751326 PCI: 00:19.2: enabled 0
828 15:00:49.751897 PCI: 00:1a.0: enabled 0
829 15:00:49.754692 PCI: 00:1c.0: enabled 0
830 15:00:49.757856 PCI: 00:1c.1: enabled 0
831 15:00:49.761159 PCI: 00:1c.2: enabled 0
832 15:00:49.761259 PCI: 00:1c.3: enabled 0
833 15:00:49.764183 PCI: 00:1c.4: enabled 0
834 15:00:49.767318 PCI: 00:1c.5: enabled 0
835 15:00:49.771039 PCI: 00:1c.6: enabled 0
836 15:00:49.774138 PCI: 00:1c.7: enabled 0
837 15:00:49.774224 PCI: 00:1d.0: enabled 1
838 15:00:49.777889 PCI: 00:1d.1: enabled 0
839 15:00:49.780913 PCI: 00:1d.2: enabled 0
840 15:00:49.784085 PCI: 00:1d.3: enabled 0
841 15:00:49.787358 PCI: 00:1d.4: enabled 0
842 15:00:49.787466 PCI: 00:1d.5: enabled 1
843 15:00:49.791361 PCI: 00:00.0: enabled 1
844 15:00:49.794073 PCI: 00:1e.0: enabled 1
845 15:00:49.797636 PCI: 00:1e.1: enabled 0
846 15:00:49.801050 PCI: 00:1e.2: enabled 1
847 15:00:49.801235 SPI: 00: enabled 1
848 15:00:49.804578 PCI: 00:1e.3: enabled 1
849 15:00:49.807771 SPI: 01: enabled 1
850 15:00:49.811071 PCI: 00:1f.0: enabled 1
851 15:00:49.811297 PNP: 0c09.0: enabled 1
852 15:00:49.814283 PCI: 00:1f.1: enabled 1
853 15:00:49.817569 PCI: 00:1f.2: enabled 1
854 15:00:49.820708 PCI: 00:1f.3: enabled 1
855 15:00:49.820963 PCI: 00:1f.4: enabled 1
856 15:00:49.824408 PCI: 00:1f.5: enabled 1
857 15:00:49.827476 PCI: 00:1f.6: enabled 0
858 15:00:49.830888 Root Device scanning...
859 15:00:49.833675 scan_static_bus for Root Device
860 15:00:49.837370 CPU_CLUSTER: 0 enabled
861 15:00:49.837459 DOMAIN: 0000 enabled
862 15:00:49.840762 DOMAIN: 0000 scanning...
863 15:00:49.844239 PCI: pci_scan_bus for bus 00
864 15:00:49.847468 PCI: 00:00.0 [8086/0000] ops
865 15:00:49.850449 PCI: 00:00.0 [8086/9b61] enabled
866 15:00:49.853911 PCI: 00:02.0 [8086/0000] bus ops
867 15:00:49.857179 PCI: 00:02.0 [8086/9b41] enabled
868 15:00:49.860448 PCI: 00:04.0 [8086/1903] disabled
869 15:00:49.863937 PCI: 00:08.0 [8086/1911] enabled
870 15:00:49.867122 PCI: 00:12.0 [8086/02f9] enabled
871 15:00:49.870584 PCI: 00:14.0 [8086/0000] bus ops
872 15:00:49.873958 PCI: 00:14.0 [8086/02ed] enabled
873 15:00:49.877056 PCI: 00:14.2 [8086/02ef] enabled
874 15:00:49.880530 PCI: 00:14.3 [8086/02f0] enabled
875 15:00:49.884100 PCI: 00:15.0 [8086/0000] bus ops
876 15:00:49.887153 PCI: 00:15.0 [8086/02e8] enabled
877 15:00:49.890274 PCI: 00:15.1 [8086/0000] bus ops
878 15:00:49.893767 PCI: 00:15.1 [8086/02e9] enabled
879 15:00:49.897005 PCI: 00:16.0 [8086/0000] ops
880 15:00:49.900911 PCI: 00:16.0 [8086/02e0] enabled
881 15:00:49.903954 PCI: 00:17.0 [8086/0000] ops
882 15:00:49.906847 PCI: 00:17.0 [8086/02d3] enabled
883 15:00:49.910273 PCI: 00:19.0 [8086/0000] bus ops
884 15:00:49.913828 PCI: 00:19.0 [8086/02c5] enabled
885 15:00:49.917224 PCI: 00:1d.0 [8086/0000] bus ops
886 15:00:49.920833 PCI: 00:1d.0 [8086/02b0] enabled
887 15:00:49.923846 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 15:00:49.927143 PCI: 00:1e.0 [8086/0000] ops
889 15:00:49.930382 PCI: 00:1e.0 [8086/02a8] enabled
890 15:00:49.933589 PCI: 00:1e.2 [8086/0000] bus ops
891 15:00:49.937513 PCI: 00:1e.2 [8086/02aa] enabled
892 15:00:49.940179 PCI: 00:1e.3 [8086/0000] bus ops
893 15:00:49.943602 PCI: 00:1e.3 [8086/02ab] enabled
894 15:00:49.947207 PCI: 00:1f.0 [8086/0000] bus ops
895 15:00:49.950000 PCI: 00:1f.0 [8086/0284] enabled
896 15:00:49.956635 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 15:00:49.963283 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 15:00:49.966577 PCI: 00:1f.3 [8086/0000] bus ops
899 15:00:49.969882 PCI: 00:1f.3 [8086/02c8] enabled
900 15:00:49.973310 PCI: 00:1f.4 [8086/0000] bus ops
901 15:00:49.976746 PCI: 00:1f.4 [8086/02a3] enabled
902 15:00:49.980435 PCI: 00:1f.5 [8086/0000] bus ops
903 15:00:49.983220 PCI: 00:1f.5 [8086/02a4] enabled
904 15:00:49.986596 PCI: Leftover static devices:
905 15:00:49.986680 PCI: 00:05.0
906 15:00:49.986760 PCI: 00:12.5
907 15:00:49.990027 PCI: 00:12.6
908 15:00:49.990112 PCI: 00:14.1
909 15:00:49.993773 PCI: 00:14.5
910 15:00:49.993858 PCI: 00:15.2
911 15:00:49.993925 PCI: 00:15.3
912 15:00:49.996447 PCI: 00:16.1
913 15:00:49.996519 PCI: 00:16.2
914 15:00:49.999755 PCI: 00:16.3
915 15:00:49.999863 PCI: 00:16.4
916 15:00:50.003475 PCI: 00:16.5
917 15:00:50.003560 PCI: 00:19.1
918 15:00:50.003627 PCI: 00:19.2
919 15:00:50.006640 PCI: 00:1a.0
920 15:00:50.006724 PCI: 00:1c.0
921 15:00:50.009740 PCI: 00:1c.1
922 15:00:50.009826 PCI: 00:1c.2
923 15:00:50.009895 PCI: 00:1c.3
924 15:00:50.013279 PCI: 00:1c.4
925 15:00:50.013364 PCI: 00:1c.5
926 15:00:50.016376 PCI: 00:1c.6
927 15:00:50.016461 PCI: 00:1c.7
928 15:00:50.016529 PCI: 00:1d.1
929 15:00:50.019750 PCI: 00:1d.2
930 15:00:50.019822 PCI: 00:1d.3
931 15:00:50.023161 PCI: 00:1d.4
932 15:00:50.023234 PCI: 00:1d.5
933 15:00:50.026468 PCI: 00:1e.1
934 15:00:50.026542 PCI: 00:1f.1
935 15:00:50.026603 PCI: 00:1f.2
936 15:00:50.029810 PCI: 00:1f.6
937 15:00:50.032830 PCI: Check your devicetree.cb.
938 15:00:50.032908 PCI: 00:02.0 scanning...
939 15:00:50.039487 scan_generic_bus for PCI: 00:02.0
940 15:00:50.043098 scan_generic_bus for PCI: 00:02.0 done
941 15:00:50.046410 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
942 15:00:50.049718 PCI: 00:14.0 scanning...
943 15:00:50.052729 scan_static_bus for PCI: 00:14.0
944 15:00:50.056199 USB0 port 0 enabled
945 15:00:50.059522 USB0 port 0 scanning...
946 15:00:50.062771 scan_static_bus for USB0 port 0
947 15:00:50.062845 USB2 port 0 enabled
948 15:00:50.066117 USB2 port 1 enabled
949 15:00:50.069704 USB2 port 2 disabled
950 15:00:50.069789 USB2 port 3 disabled
951 15:00:50.072897 USB2 port 5 disabled
952 15:00:50.072985 USB2 port 6 enabled
953 15:00:50.076683 USB2 port 9 enabled
954 15:00:50.079487 USB3 port 0 enabled
955 15:00:50.079591 USB3 port 1 enabled
956 15:00:50.082721 USB3 port 2 enabled
957 15:00:50.086074 USB3 port 3 enabled
958 15:00:50.086153 USB3 port 4 disabled
959 15:00:50.089561 USB2 port 0 scanning...
960 15:00:50.093161 scan_static_bus for USB2 port 0
961 15:00:50.095855 scan_static_bus for USB2 port 0 done
962 15:00:50.102470 scan_bus: scanning of bus USB2 port 0 took 9685 usecs
963 15:00:50.102551 USB2 port 1 scanning...
964 15:00:50.106490 scan_static_bus for USB2 port 1
965 15:00:50.112728 scan_static_bus for USB2 port 1 done
966 15:00:50.116079 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
967 15:00:50.119283 USB2 port 6 scanning...
968 15:00:50.123597 scan_static_bus for USB2 port 6
969 15:00:50.125846 scan_static_bus for USB2 port 6 done
970 15:00:50.132640 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
971 15:00:50.132725 USB2 port 9 scanning...
972 15:00:50.136559 scan_static_bus for USB2 port 9
973 15:00:50.143018 scan_static_bus for USB2 port 9 done
974 15:00:50.146541 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
975 15:00:50.149701 USB3 port 0 scanning...
976 15:00:50.153213 scan_static_bus for USB3 port 0
977 15:00:50.156822 scan_static_bus for USB3 port 0 done
978 15:00:50.162798 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
979 15:00:50.162883 USB3 port 1 scanning...
980 15:00:50.166243 scan_static_bus for USB3 port 1
981 15:00:50.173023 scan_static_bus for USB3 port 1 done
982 15:00:50.176224 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
983 15:00:50.179408 USB3 port 2 scanning...
984 15:00:50.182705 scan_static_bus for USB3 port 2
985 15:00:50.186174 scan_static_bus for USB3 port 2 done
986 15:00:50.192668 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
987 15:00:50.192753 USB3 port 3 scanning...
988 15:00:50.196305 scan_static_bus for USB3 port 3
989 15:00:50.202641 scan_static_bus for USB3 port 3 done
990 15:00:50.205886 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
991 15:00:50.209385 scan_static_bus for USB0 port 0 done
992 15:00:50.216443 scan_bus: scanning of bus USB0 port 0 took 155327 usecs
993 15:00:50.219564 scan_static_bus for PCI: 00:14.0 done
994 15:00:50.226209 scan_bus: scanning of bus PCI: 00:14.0 took 172946 usecs
995 15:00:50.229263 PCI: 00:15.0 scanning...
996 15:00:50.232761 scan_generic_bus for PCI: 00:15.0
997 15:00:50.235771 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 15:00:50.239381 scan_generic_bus for PCI: 00:15.0 done
999 15:00:50.246225 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
1000 15:00:50.249243 PCI: 00:15.1 scanning...
1001 15:00:50.253014 scan_generic_bus for PCI: 00:15.1
1002 15:00:50.255967 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 15:00:50.259258 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 15:00:50.262742 scan_generic_bus for PCI: 00:15.1 done
1005 15:00:50.269763 scan_bus: scanning of bus PCI: 00:15.1 took 18661 usecs
1006 15:00:50.272660 PCI: 00:19.0 scanning...
1007 15:00:50.276033 scan_generic_bus for PCI: 00:19.0
1008 15:00:50.279359 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 15:00:50.282382 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 15:00:50.289124 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 15:00:50.292261 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 15:00:50.295634 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 15:00:50.299279 scan_generic_bus for PCI: 00:19.0 done
1014 15:00:50.305749 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
1015 15:00:50.308926 PCI: 00:1d.0 scanning...
1016 15:00:50.312426 do_pci_scan_bridge for PCI: 00:1d.0
1017 15:00:50.315805 PCI: pci_scan_bus for bus 01
1018 15:00:50.318849 PCI: 01:00.0 [1c5c/1327] enabled
1019 15:00:50.322232 Enabling Common Clock Configuration
1020 15:00:50.325686 L1 Sub-State supported from root port 29
1021 15:00:50.328753 L1 Sub-State Support = 0xf
1022 15:00:50.332000 CommonModeRestoreTime = 0x28
1023 15:00:50.336018 Power On Value = 0x16, Power On Scale = 0x0
1024 15:00:50.338866 ASPM: Enabled L1
1025 15:00:50.342170 scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs
1026 15:00:50.345457 PCI: 00:1e.2 scanning...
1027 15:00:50.349287 scan_generic_bus for PCI: 00:1e.2
1028 15:00:50.352529 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 15:00:50.358829 scan_generic_bus for PCI: 00:1e.2 done
1030 15:00:50.361816 scan_bus: scanning of bus PCI: 00:1e.2 took 13992 usecs
1031 15:00:50.365465 PCI: 00:1e.3 scanning...
1032 15:00:50.369175 scan_generic_bus for PCI: 00:1e.3
1033 15:00:50.372467 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 15:00:50.378321 scan_generic_bus for PCI: 00:1e.3 done
1035 15:00:50.381920 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1036 15:00:50.385150 PCI: 00:1f.0 scanning...
1037 15:00:50.388560 scan_static_bus for PCI: 00:1f.0
1038 15:00:50.391951 PNP: 0c09.0 enabled
1039 15:00:50.395265 scan_static_bus for PCI: 00:1f.0 done
1040 15:00:50.398351 scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs
1041 15:00:50.401999 PCI: 00:1f.3 scanning...
1042 15:00:50.408206 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1043 15:00:50.411612 PCI: 00:1f.4 scanning...
1044 15:00:50.414852 scan_generic_bus for PCI: 00:1f.4
1045 15:00:50.418155 scan_generic_bus for PCI: 00:1f.4 done
1046 15:00:50.425004 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1047 15:00:50.425185 PCI: 00:1f.5 scanning...
1048 15:00:50.431977 scan_generic_bus for PCI: 00:1f.5
1049 15:00:50.435283 scan_generic_bus for PCI: 00:1f.5 done
1050 15:00:50.438603 scan_bus: scanning of bus PCI: 00:1f.5 took 10176 usecs
1051 15:00:50.445597 scan_bus: scanning of bus DOMAIN: 0000 took 604938 usecs
1052 15:00:50.448486 scan_static_bus for Root Device done
1053 15:00:50.455524 scan_bus: scanning of bus Root Device took 624802 usecs
1054 15:00:50.455725 done
1055 15:00:50.458390 Chrome EC: UHEPI supported
1056 15:00:50.465346 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 15:00:50.471750 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 15:00:50.474990 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 15:00:50.482985 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 15:00:50.486091 SPI flash protection: WPSW=0 SRP0=0
1061 15:00:50.493493 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 15:00:50.496142 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1063 15:00:50.499702 found VGA at PCI: 00:02.0
1064 15:00:50.503166 Setting up VGA for PCI: 00:02.0
1065 15:00:50.509671 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 15:00:50.512803 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 15:00:50.516095 Allocating resources...
1068 15:00:50.519490 Reading resources...
1069 15:00:50.522693 Root Device read_resources bus 0 link: 0
1070 15:00:50.526038 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 15:00:50.532752 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 15:00:50.535872 DOMAIN: 0000 read_resources bus 0 link: 0
1073 15:00:50.543401 PCI: 00:14.0 read_resources bus 0 link: 0
1074 15:00:50.546541 USB0 port 0 read_resources bus 0 link: 0
1075 15:00:50.554508 USB0 port 0 read_resources bus 0 link: 0 done
1076 15:00:50.557791 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 15:00:50.565190 PCI: 00:15.0 read_resources bus 1 link: 0
1078 15:00:50.568505 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 15:00:50.575289 PCI: 00:15.1 read_resources bus 2 link: 0
1080 15:00:50.578370 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 15:00:50.585951 PCI: 00:19.0 read_resources bus 3 link: 0
1082 15:00:50.592649 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 15:00:50.595914 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 15:00:50.602154 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 15:00:50.605469 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 15:00:50.612318 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 15:00:50.616161 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 15:00:50.622412 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 15:00:50.625633 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 15:00:50.632500 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 15:00:50.639350 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 15:00:50.642383 Root Device read_resources bus 0 link: 0 done
1093 15:00:50.645631 Done reading resources.
1094 15:00:50.649259 Show resources in subtree (Root Device)...After reading.
1095 15:00:50.655534 Root Device child on link 0 CPU_CLUSTER: 0
1096 15:00:50.658740 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 15:00:50.658827 APIC: 00
1098 15:00:50.662362 APIC: 03
1099 15:00:50.662448 APIC: 01
1100 15:00:50.665851 APIC: 07
1101 15:00:50.665937 APIC: 02
1102 15:00:50.666005 APIC: 05
1103 15:00:50.668955 APIC: 06
1104 15:00:50.669041 APIC: 04
1105 15:00:50.672334 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 15:00:50.682194 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 15:00:50.692397 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 15:00:50.695739 PCI: 00:00.0
1109 15:00:50.745449 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 15:00:50.746340 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 15:00:50.747213 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 15:00:50.747667 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 15:00:50.748423 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 15:00:50.795443 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 15:00:50.796533 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 15:00:50.797052 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 15:00:50.797918 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 15:00:50.798335 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 15:00:50.844379 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 15:00:50.844689 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 15:00:50.844977 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 15:00:50.845067 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 15:00:50.845341 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 15:00:50.845633 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 15:00:50.845706 PCI: 00:02.0
1126 15:00:50.894600 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 15:00:50.895198 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 15:00:50.895695 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 15:00:50.895885 PCI: 00:04.0
1130 15:00:50.896050 PCI: 00:08.0
1131 15:00:50.896216 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 15:00:50.896356 PCI: 00:12.0
1133 15:00:50.903855 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 15:00:50.907509 PCI: 00:14.0 child on link 0 USB0 port 0
1135 15:00:50.914007 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 15:00:50.917650 USB0 port 0 child on link 0 USB2 port 0
1137 15:00:50.920830 USB2 port 0
1138 15:00:50.921123 USB2 port 1
1139 15:00:50.924289 USB2 port 2
1140 15:00:50.924544 USB2 port 3
1141 15:00:50.927249 USB2 port 5
1142 15:00:50.927546 USB2 port 6
1143 15:00:50.930593 USB2 port 9
1144 15:00:50.933853 USB3 port 0
1145 15:00:50.934084 USB3 port 1
1146 15:00:50.937419 USB3 port 2
1147 15:00:50.937587 USB3 port 3
1148 15:00:50.940620 USB3 port 4
1149 15:00:50.940804 PCI: 00:14.2
1150 15:00:50.950511 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 15:00:50.960694 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 15:00:50.963550 PCI: 00:14.3
1153 15:00:50.973908 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 15:00:50.977100 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 15:00:50.987059 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 15:00:50.987560 I2C: 01:15
1157 15:00:50.993762 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 15:00:51.003615 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 15:00:51.004127 I2C: 02:5d
1160 15:00:51.007197 GENERIC: 0.0
1161 15:00:51.007718 PCI: 00:16.0
1162 15:00:51.016993 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 15:00:51.020164 PCI: 00:17.0
1164 15:00:51.026823 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 15:00:51.036775 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 15:00:51.046682 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 15:00:51.053628 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 15:00:51.064001 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 15:00:51.070300 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 15:00:51.076698 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 15:00:51.086373 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 15:00:51.086952 I2C: 03:1a
1173 15:00:51.090012 I2C: 03:38
1174 15:00:51.090499 I2C: 03:39
1175 15:00:51.093598 I2C: 03:3a
1176 15:00:51.094111 I2C: 03:3b
1177 15:00:51.096797 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 15:00:51.106638 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 15:00:51.116172 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 15:00:51.126558 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 15:00:51.127166 PCI: 01:00.0
1182 15:00:51.136371 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 15:00:51.139528 PCI: 00:1e.0
1184 15:00:51.149683 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 15:00:51.159468 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 15:00:51.163055 PCI: 00:1e.2 child on link 0 SPI: 00
1187 15:00:51.172860 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 15:00:51.176457 SPI: 00
1189 15:00:51.179712 PCI: 00:1e.3 child on link 0 SPI: 01
1190 15:00:51.189352 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:00:51.189855 SPI: 01
1192 15:00:51.196350 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 15:00:51.202875 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 15:00:51.212397 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 15:00:51.212887 PNP: 0c09.0
1196 15:00:51.222477 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 15:00:51.222969 PCI: 00:1f.3
1198 15:00:51.232577 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 15:00:51.245574 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 15:00:51.246170 PCI: 00:1f.4
1201 15:00:51.255826 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 15:00:51.265410 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 15:00:51.265913 PCI: 00:1f.5
1204 15:00:51.275469 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 15:00:51.282087 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 15:00:51.288562 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 15:00:51.295142 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 15:00:51.298823 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 15:00:51.302041 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 15:00:51.305202 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 15:00:51.308491 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 15:00:51.315329 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 15:00:51.321703 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 15:00:51.331731 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 15:00:51.338388 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 15:00:51.344807 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 15:00:51.348016 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 15:00:51.358256 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 15:00:51.361322 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 15:00:51.368009 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 15:00:51.371188 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 15:00:51.378387 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 15:00:51.380985 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 15:00:51.387907 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 15:00:51.390967 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 15:00:51.397464 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 15:00:51.401186 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 15:00:51.404615 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 15:00:51.410811 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 15:00:51.414571 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 15:00:51.421153 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 15:00:51.424130 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 15:00:51.431041 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 15:00:51.434046 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 15:00:51.441309 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 15:00:51.443964 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 15:00:51.450981 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 15:00:51.454097 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 15:00:51.460844 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 15:00:51.464404 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 15:00:51.467877 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 15:00:51.477350 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 15:00:51.480520 avoid_fixed_resources: DOMAIN: 0000
1244 15:00:51.487553 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 15:00:51.494270 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 15:00:51.501181 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 15:00:51.507451 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 15:00:51.516986 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 15:00:51.523892 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 15:00:51.530591 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 15:00:51.540531 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 15:00:51.546951 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 15:00:51.553553 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 15:00:51.560015 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 15:00:51.569883 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 15:00:51.570470 Setting resources...
1257 15:00:51.576986 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 15:00:51.580091 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 15:00:51.586608 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 15:00:51.590266 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 15:00:51.593238 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 15:00:51.599946 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 15:00:51.606381 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 15:00:51.613035 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 15:00:51.619736 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 15:00:51.626396 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 15:00:51.629585 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 15:00:51.636264 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 15:00:51.639226 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 15:00:51.642781 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 15:00:51.649489 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 15:00:51.653130 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 15:00:51.659201 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 15:00:51.662538 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 15:00:51.669192 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 15:00:51.672653 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 15:00:51.679206 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 15:00:51.682591 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 15:00:51.689169 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 15:00:51.692496 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 15:00:51.699202 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 15:00:51.702238 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 15:00:51.709121 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 15:00:51.712324 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 15:00:51.715461 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 15:00:51.722146 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 15:00:51.725541 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 15:00:51.732002 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 15:00:51.739128 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 15:00:51.745144 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 15:00:51.755364 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 15:00:51.761867 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 15:00:51.765532 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 15:00:51.775773 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 15:00:51.779013 Root Device assign_resources, bus 0 link: 0
1296 15:00:51.781733 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 15:00:51.792411 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 15:00:51.798839 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 15:00:51.808418 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 15:00:51.814722 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 15:00:51.825219 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 15:00:51.831386 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 15:00:51.838144 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 15:00:51.841130 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 15:00:51.851536 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 15:00:51.857698 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 15:00:51.864671 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 15:00:51.874769 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 15:00:51.877942 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 15:00:51.884387 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 15:00:51.891022 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 15:00:51.897734 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 15:00:51.901164 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 15:00:51.910867 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 15:00:51.917396 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 15:00:51.923893 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 15:00:51.934174 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 15:00:51.940637 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 15:00:51.946976 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 15:00:51.957575 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 15:00:51.963525 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 15:00:51.970498 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 15:00:51.973756 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 15:00:51.983404 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 15:00:51.990036 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 15:00:52.000118 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 15:00:52.003075 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 15:00:52.013231 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 15:00:52.016701 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 15:00:52.026410 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 15:00:52.033671 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 15:00:52.039269 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 15:00:52.043059 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 15:00:52.052794 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 15:00:52.055786 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 15:00:52.059692 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 15:00:52.066583 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 15:00:52.069359 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 15:00:52.075680 LPC: Trying to open IO window from 800 size 1ff
1340 15:00:52.082296 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 15:00:52.092025 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 15:00:52.098900 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 15:00:52.108801 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 15:00:52.111803 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 15:00:52.115410 Root Device assign_resources, bus 0 link: 0
1346 15:00:52.119044 Done setting resources.
1347 15:00:52.125707 Show resources in subtree (Root Device)...After assigning values.
1348 15:00:52.131649 Root Device child on link 0 CPU_CLUSTER: 0
1349 15:00:52.135073 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 15:00:52.135158 APIC: 00
1351 15:00:52.138546 APIC: 03
1352 15:00:52.138630 APIC: 01
1353 15:00:52.138696 APIC: 07
1354 15:00:52.141844 APIC: 02
1355 15:00:52.141928 APIC: 05
1356 15:00:52.141994 APIC: 06
1357 15:00:52.145484 APIC: 04
1358 15:00:52.148420 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 15:00:52.158203 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 15:00:52.168058 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 15:00:52.171774 PCI: 00:00.0
1362 15:00:52.181759 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 15:00:52.191633 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 15:00:52.201789 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 15:00:52.207996 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 15:00:52.218042 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 15:00:52.227906 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 15:00:52.237761 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 15:00:52.247493 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 15:00:52.257536 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 15:00:52.264453 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 15:00:52.273977 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 15:00:52.283575 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 15:00:52.294140 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 15:00:52.303598 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 15:00:52.313831 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 15:00:52.320563 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 15:00:52.323268 PCI: 00:02.0
1379 15:00:52.333275 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 15:00:52.343439 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 15:00:52.353217 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 15:00:52.356940 PCI: 00:04.0
1383 15:00:52.357374 PCI: 00:08.0
1384 15:00:52.366540 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 15:00:52.370175 PCI: 00:12.0
1386 15:00:52.379794 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 15:00:52.383307 PCI: 00:14.0 child on link 0 USB0 port 0
1388 15:00:52.393124 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 15:00:52.399376 USB0 port 0 child on link 0 USB2 port 0
1390 15:00:52.399809 USB2 port 0
1391 15:00:52.403711 USB2 port 1
1392 15:00:52.404182 USB2 port 2
1393 15:00:52.406242 USB2 port 3
1394 15:00:52.406673 USB2 port 5
1395 15:00:52.409449 USB2 port 6
1396 15:00:52.409882 USB2 port 9
1397 15:00:52.413229 USB3 port 0
1398 15:00:52.413663 USB3 port 1
1399 15:00:52.416612 USB3 port 2
1400 15:00:52.417046 USB3 port 3
1401 15:00:52.419455 USB3 port 4
1402 15:00:52.422883 PCI: 00:14.2
1403 15:00:52.432651 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 15:00:52.442775 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 15:00:52.443212 PCI: 00:14.3
1406 15:00:52.452359 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 15:00:52.460071 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 15:00:52.469197 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 15:00:52.469763 I2C: 01:15
1410 15:00:52.475933 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 15:00:52.485836 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 15:00:52.486325 I2C: 02:5d
1413 15:00:52.488967 GENERIC: 0.0
1414 15:00:52.489457 PCI: 00:16.0
1415 15:00:52.498766 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 15:00:52.502263 PCI: 00:17.0
1417 15:00:52.512782 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 15:00:52.522187 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 15:00:52.531914 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 15:00:52.538618 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 15:00:52.548667 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 15:00:52.558193 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 15:00:52.565718 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 15:00:52.575165 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 15:00:52.575772 I2C: 03:1a
1426 15:00:52.578265 I2C: 03:38
1427 15:00:52.578845 I2C: 03:39
1428 15:00:52.581612 I2C: 03:3a
1429 15:00:52.582186 I2C: 03:3b
1430 15:00:52.584935 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 15:00:52.594791 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 15:00:52.605353 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 15:00:52.614805 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 15:00:52.617762 PCI: 01:00.0
1435 15:00:52.627889 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 15:00:52.631199 PCI: 00:1e.0
1437 15:00:52.640927 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 15:00:52.650596 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 15:00:52.654097 PCI: 00:1e.2 child on link 0 SPI: 00
1440 15:00:52.663806 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 15:00:52.667288 SPI: 00
1442 15:00:52.670316 PCI: 00:1e.3 child on link 0 SPI: 01
1443 15:00:52.680308 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 15:00:52.680393 SPI: 01
1445 15:00:52.687221 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 15:00:52.693596 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 15:00:52.703289 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 15:00:52.706883 PNP: 0c09.0
1449 15:00:52.713182 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 15:00:52.716511 PCI: 00:1f.3
1451 15:00:52.726545 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 15:00:52.736466 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 15:00:52.739742 PCI: 00:1f.4
1454 15:00:52.746397 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 15:00:52.756323 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 15:00:52.759744 PCI: 00:1f.5
1457 15:00:52.769370 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 15:00:52.772704 Done allocating resources.
1459 15:00:52.776215 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 15:00:52.780272 Enabling resources...
1461 15:00:52.786237 PCI: 00:00.0 subsystem <- 8086/9b61
1462 15:00:52.786322 PCI: 00:00.0 cmd <- 06
1463 15:00:52.789759 PCI: 00:02.0 subsystem <- 8086/9b41
1464 15:00:52.793073 PCI: 00:02.0 cmd <- 03
1465 15:00:52.796406 PCI: 00:08.0 cmd <- 06
1466 15:00:52.800009 PCI: 00:12.0 subsystem <- 8086/02f9
1467 15:00:52.803070 PCI: 00:12.0 cmd <- 02
1468 15:00:52.806162 PCI: 00:14.0 subsystem <- 8086/02ed
1469 15:00:52.810014 PCI: 00:14.0 cmd <- 02
1470 15:00:52.812831 PCI: 00:14.2 cmd <- 02
1471 15:00:52.816077 PCI: 00:14.3 subsystem <- 8086/02f0
1472 15:00:52.816150 PCI: 00:14.3 cmd <- 02
1473 15:00:52.822783 PCI: 00:15.0 subsystem <- 8086/02e8
1474 15:00:52.822865 PCI: 00:15.0 cmd <- 02
1475 15:00:52.826413 PCI: 00:15.1 subsystem <- 8086/02e9
1476 15:00:52.829366 PCI: 00:15.1 cmd <- 02
1477 15:00:52.832843 PCI: 00:16.0 subsystem <- 8086/02e0
1478 15:00:52.836064 PCI: 00:16.0 cmd <- 02
1479 15:00:52.839437 PCI: 00:17.0 subsystem <- 8086/02d3
1480 15:00:52.842863 PCI: 00:17.0 cmd <- 03
1481 15:00:52.846740 PCI: 00:19.0 subsystem <- 8086/02c5
1482 15:00:52.850066 PCI: 00:19.0 cmd <- 02
1483 15:00:52.852649 PCI: 00:1d.0 bridge ctrl <- 0013
1484 15:00:52.856095 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 15:00:52.859058 PCI: 00:1d.0 cmd <- 06
1486 15:00:52.862689 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 15:00:52.865699 PCI: 00:1e.0 cmd <- 06
1488 15:00:52.869314 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 15:00:52.872721 PCI: 00:1e.2 cmd <- 06
1490 15:00:52.875657 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 15:00:52.875730 PCI: 00:1e.3 cmd <- 02
1492 15:00:52.882322 PCI: 00:1f.0 subsystem <- 8086/0284
1493 15:00:52.882399 PCI: 00:1f.0 cmd <- 407
1494 15:00:52.889024 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 15:00:52.889137 PCI: 00:1f.3 cmd <- 02
1496 15:00:52.892197 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 15:00:52.896341 PCI: 00:1f.4 cmd <- 03
1498 15:00:52.898761 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 15:00:52.902406 PCI: 00:1f.5 cmd <- 406
1500 15:00:52.911863 PCI: 01:00.0 cmd <- 02
1501 15:00:52.917165 done.
1502 15:00:52.931103 ME: Version: 14.0.39.1367
1503 15:00:52.937054 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1504 15:00:52.940562 Initializing devices...
1505 15:00:52.940827 Root Device init ...
1506 15:00:52.947092 Chrome EC: Set SMI mask to 0x0000000000000000
1507 15:00:52.950630 Chrome EC: clear events_b mask to 0x0000000000000000
1508 15:00:52.957432 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 15:00:52.963897 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 15:00:52.971008 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 15:00:52.973933 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 15:00:52.977175 Root Device init finished in 35217 usecs
1513 15:00:52.980747 CPU_CLUSTER: 0 init ...
1514 15:00:52.987013 CPU_CLUSTER: 0 init finished in 2441 usecs
1515 15:00:52.991606 PCI: 00:00.0 init ...
1516 15:00:52.994819 CPU TDP: 15 Watts
1517 15:00:52.998178 CPU PL2 = 64 Watts
1518 15:00:53.001295 PCI: 00:00.0 init finished in 7085 usecs
1519 15:00:53.004717 PCI: 00:02.0 init ...
1520 15:00:53.007904 PCI: 00:02.0 init finished in 2255 usecs
1521 15:00:53.011452 PCI: 00:08.0 init ...
1522 15:00:53.014794 PCI: 00:08.0 init finished in 2254 usecs
1523 15:00:53.017805 PCI: 00:12.0 init ...
1524 15:00:53.021622 PCI: 00:12.0 init finished in 2253 usecs
1525 15:00:53.024713 PCI: 00:14.0 init ...
1526 15:00:53.028076 PCI: 00:14.0 init finished in 2254 usecs
1527 15:00:53.031080 PCI: 00:14.2 init ...
1528 15:00:53.034570 PCI: 00:14.2 init finished in 2253 usecs
1529 15:00:53.037781 PCI: 00:14.3 init ...
1530 15:00:53.041325 PCI: 00:14.3 init finished in 2272 usecs
1531 15:00:53.044770 PCI: 00:15.0 init ...
1532 15:00:53.047684 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 15:00:53.051059 PCI: 00:15.0 init finished in 5981 usecs
1534 15:00:53.054604 PCI: 00:15.1 init ...
1535 15:00:53.058168 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 15:00:53.064428 PCI: 00:15.1 init finished in 5980 usecs
1537 15:00:53.064913 PCI: 00:16.0 init ...
1538 15:00:53.070692 PCI: 00:16.0 init finished in 2253 usecs
1539 15:00:53.074416 PCI: 00:19.0 init ...
1540 15:00:53.077439 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 15:00:53.080963 PCI: 00:19.0 init finished in 5981 usecs
1542 15:00:53.084092 PCI: 00:1d.0 init ...
1543 15:00:53.087394 Initializing PCH PCIe bridge.
1544 15:00:53.091111 PCI: 00:1d.0 init finished in 5287 usecs
1545 15:00:53.094345 PCI: 00:1f.0 init ...
1546 15:00:53.097488 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 15:00:53.103808 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 15:00:53.104281 IOAPIC: ID = 0x02
1549 15:00:53.107283 IOAPIC: Dumping registers
1550 15:00:53.110864 reg 0x0000: 0x02000000
1551 15:00:53.114055 reg 0x0001: 0x00770020
1552 15:00:53.114542 reg 0x0002: 0x00000000
1553 15:00:53.120846 PCI: 00:1f.0 init finished in 23540 usecs
1554 15:00:53.124543 PCI: 00:1f.4 init ...
1555 15:00:53.127182 PCI: 00:1f.4 init finished in 2264 usecs
1556 15:00:53.137650 PCI: 01:00.0 init ...
1557 15:00:53.141414 PCI: 01:00.0 init finished in 2255 usecs
1558 15:00:53.145250 PNP: 0c09.0 init ...
1559 15:00:53.148394 Google Chrome EC uptime: 11.080 seconds
1560 15:00:53.155349 Google Chrome AP resets since EC boot: 0
1561 15:00:53.158650 Google Chrome most recent AP reset causes:
1562 15:00:53.165062 Google Chrome EC reset flags at last EC boot: reset-pin
1563 15:00:53.168421 PNP: 0c09.0 init finished in 20584 usecs
1564 15:00:53.172018 Devices initialized
1565 15:00:53.175586 Show all devs... After init.
1566 15:00:53.176205 Root Device: enabled 1
1567 15:00:53.178417 CPU_CLUSTER: 0: enabled 1
1568 15:00:53.181815 DOMAIN: 0000: enabled 1
1569 15:00:53.182409 APIC: 00: enabled 1
1570 15:00:53.185267 PCI: 00:00.0: enabled 1
1571 15:00:53.188556 PCI: 00:02.0: enabled 1
1572 15:00:53.191795 PCI: 00:04.0: enabled 0
1573 15:00:53.192344 PCI: 00:05.0: enabled 0
1574 15:00:53.195101 PCI: 00:12.0: enabled 1
1575 15:00:53.198206 PCI: 00:12.5: enabled 0
1576 15:00:53.201476 PCI: 00:12.6: enabled 0
1577 15:00:53.201963 PCI: 00:14.0: enabled 1
1578 15:00:53.205610 PCI: 00:14.1: enabled 0
1579 15:00:53.208184 PCI: 00:14.3: enabled 1
1580 15:00:53.208675 PCI: 00:14.5: enabled 0
1581 15:00:53.211646 PCI: 00:15.0: enabled 1
1582 15:00:53.214994 PCI: 00:15.1: enabled 1
1583 15:00:53.218031 PCI: 00:15.2: enabled 0
1584 15:00:53.218519 PCI: 00:15.3: enabled 0
1585 15:00:53.221358 PCI: 00:16.0: enabled 1
1586 15:00:53.225061 PCI: 00:16.1: enabled 0
1587 15:00:53.228276 PCI: 00:16.2: enabled 0
1588 15:00:53.228885 PCI: 00:16.3: enabled 0
1589 15:00:53.231638 PCI: 00:16.4: enabled 0
1590 15:00:53.234886 PCI: 00:16.5: enabled 0
1591 15:00:53.238028 PCI: 00:17.0: enabled 1
1592 15:00:53.238516 PCI: 00:19.0: enabled 1
1593 15:00:53.241188 PCI: 00:19.1: enabled 0
1594 15:00:53.245045 PCI: 00:19.2: enabled 0
1595 15:00:53.245638 PCI: 00:1a.0: enabled 0
1596 15:00:53.247766 PCI: 00:1c.0: enabled 0
1597 15:00:53.251225 PCI: 00:1c.1: enabled 0
1598 15:00:53.254670 PCI: 00:1c.2: enabled 0
1599 15:00:53.255160 PCI: 00:1c.3: enabled 0
1600 15:00:53.258026 PCI: 00:1c.4: enabled 0
1601 15:00:53.261136 PCI: 00:1c.5: enabled 0
1602 15:00:53.264517 PCI: 00:1c.6: enabled 0
1603 15:00:53.265107 PCI: 00:1c.7: enabled 0
1604 15:00:53.267922 PCI: 00:1d.0: enabled 1
1605 15:00:53.270727 PCI: 00:1d.1: enabled 0
1606 15:00:53.274313 PCI: 00:1d.2: enabled 0
1607 15:00:53.274801 PCI: 00:1d.3: enabled 0
1608 15:00:53.277737 PCI: 00:1d.4: enabled 0
1609 15:00:53.280987 PCI: 00:1d.5: enabled 0
1610 15:00:53.284293 PCI: 00:1e.0: enabled 1
1611 15:00:53.284779 PCI: 00:1e.1: enabled 0
1612 15:00:53.288044 PCI: 00:1e.2: enabled 1
1613 15:00:53.291196 PCI: 00:1e.3: enabled 1
1614 15:00:53.291723 PCI: 00:1f.0: enabled 1
1615 15:00:53.293985 PCI: 00:1f.1: enabled 0
1616 15:00:53.297552 PCI: 00:1f.2: enabled 0
1617 15:00:53.300933 PCI: 00:1f.3: enabled 1
1618 15:00:53.301451 PCI: 00:1f.4: enabled 1
1619 15:00:53.304283 PCI: 00:1f.5: enabled 1
1620 15:00:53.307551 PCI: 00:1f.6: enabled 0
1621 15:00:53.310561 USB0 port 0: enabled 1
1622 15:00:53.311052 I2C: 01:15: enabled 1
1623 15:00:53.314695 I2C: 02:5d: enabled 1
1624 15:00:53.317240 GENERIC: 0.0: enabled 1
1625 15:00:53.317731 I2C: 03:1a: enabled 1
1626 15:00:53.320902 I2C: 03:38: enabled 1
1627 15:00:53.323823 I2C: 03:39: enabled 1
1628 15:00:53.324348 I2C: 03:3a: enabled 1
1629 15:00:53.327491 I2C: 03:3b: enabled 1
1630 15:00:53.331213 PCI: 00:00.0: enabled 1
1631 15:00:53.331811 SPI: 00: enabled 1
1632 15:00:53.334176 SPI: 01: enabled 1
1633 15:00:53.337870 PNP: 0c09.0: enabled 1
1634 15:00:53.338365 USB2 port 0: enabled 1
1635 15:00:53.341076 USB2 port 1: enabled 1
1636 15:00:53.344188 USB2 port 2: enabled 0
1637 15:00:53.344677 USB2 port 3: enabled 0
1638 15:00:53.347567 USB2 port 5: enabled 0
1639 15:00:53.350485 USB2 port 6: enabled 1
1640 15:00:53.353687 USB2 port 9: enabled 1
1641 15:00:53.354186 USB3 port 0: enabled 1
1642 15:00:53.357421 USB3 port 1: enabled 1
1643 15:00:53.360134 USB3 port 2: enabled 1
1644 15:00:53.360644 USB3 port 3: enabled 1
1645 15:00:53.363408 USB3 port 4: enabled 0
1646 15:00:53.366847 APIC: 03: enabled 1
1647 15:00:53.367338 APIC: 01: enabled 1
1648 15:00:53.370374 APIC: 07: enabled 1
1649 15:00:53.373694 APIC: 02: enabled 1
1650 15:00:53.374183 APIC: 05: enabled 1
1651 15:00:53.376773 APIC: 06: enabled 1
1652 15:00:53.377264 APIC: 04: enabled 1
1653 15:00:53.380340 PCI: 00:08.0: enabled 1
1654 15:00:53.383450 PCI: 00:14.2: enabled 1
1655 15:00:53.387150 PCI: 01:00.0: enabled 1
1656 15:00:53.390438 Disabling ACPI via APMC:
1657 15:00:53.390934 done.
1658 15:00:53.397139 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 15:00:53.400120 ELOG: NV offset 0xaf0000 size 0x4000
1660 15:00:53.407452 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 15:00:53.413791 ELOG: Event(17) added with size 13 at 2022-09-30 15:00:52 UTC
1662 15:00:53.420409 ELOG: Event(92) added with size 9 at 2022-09-30 15:00:52 UTC
1663 15:00:53.426932 ELOG: Event(93) added with size 9 at 2022-09-30 15:00:52 UTC
1664 15:00:53.434429 ELOG: Event(9A) added with size 9 at 2022-09-30 15:00:52 UTC
1665 15:00:53.440211 ELOG: Event(9E) added with size 10 at 2022-09-30 15:00:52 UTC
1666 15:00:53.447398 ELOG: Event(9F) added with size 14 at 2022-09-30 15:00:52 UTC
1667 15:00:53.450114 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1668 15:00:53.457584 ELOG: Event(A1) added with size 10 at 2022-09-30 15:00:52 UTC
1669 15:00:53.467686 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1670 15:00:53.474154 ELOG: Event(A0) added with size 9 at 2022-09-30 15:00:52 UTC
1671 15:00:53.477544 elog_add_boot_reason: Logged dev mode boot
1672 15:00:53.480489 Finalize devices...
1673 15:00:53.480989 PCI: 00:17.0 final
1674 15:00:53.484628 Devices finalized
1675 15:00:53.487445 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1676 15:00:53.493780 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1677 15:00:53.497055 ME: HFSTS1 : 0x90000245
1678 15:00:53.500701 ME: HFSTS2 : 0x3B850126
1679 15:00:53.507466 ME: HFSTS3 : 0x00000020
1680 15:00:53.510611 ME: HFSTS4 : 0x00004800
1681 15:00:53.514109 ME: HFSTS5 : 0x00000000
1682 15:00:53.517270 ME: HFSTS6 : 0x40400006
1683 15:00:53.520013 ME: Manufacturing Mode : NO
1684 15:00:53.523737 ME: FW Partition Table : OK
1685 15:00:53.527142 ME: Bringup Loader Failure : NO
1686 15:00:53.530066 ME: Firmware Init Complete : YES
1687 15:00:53.533433 ME: Boot Options Present : NO
1688 15:00:53.536668 ME: Update In Progress : NO
1689 15:00:53.540295 ME: D0i3 Support : YES
1690 15:00:53.543571 ME: Low Power State Enabled : NO
1691 15:00:53.546561 ME: CPU Replaced : NO
1692 15:00:53.549877 ME: CPU Replacement Valid : YES
1693 15:00:53.553120 ME: Current Working State : 5
1694 15:00:53.557233 ME: Current Operation State : 1
1695 15:00:53.560461 ME: Current Operation Mode : 0
1696 15:00:53.563255 ME: Error Code : 0
1697 15:00:53.567138 ME: CPU Debug Disabled : YES
1698 15:00:53.570240 ME: TXT Support : NO
1699 15:00:53.577033 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1700 15:00:53.583393 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 15:00:53.584039 CBFS @ c08000 size 3f8000
1702 15:00:53.589545 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 15:00:53.593317 CBFS: Locating 'fallback/dsdt.aml'
1704 15:00:53.596256 CBFS: Found @ offset 10bb80 size 3fa5
1705 15:00:53.603374 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 15:00:53.606442 CBFS @ c08000 size 3f8000
1707 15:00:53.613079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 15:00:53.613728 CBFS: Locating 'fallback/slic'
1709 15:00:53.617943 CBFS: 'fallback/slic' not found.
1710 15:00:53.624871 ACPI: Writing ACPI tables at 99b3e000.
1711 15:00:53.625361 ACPI: * FACS
1712 15:00:53.628104 ACPI: * DSDT
1713 15:00:53.631553 Ramoops buffer: 0x100000@0x99a3d000.
1714 15:00:53.634812 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1715 15:00:53.641398 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1716 15:00:53.644405 Google Chrome EC: version:
1717 15:00:53.648182 ro: helios_v2.0.2659-56403530b
1718 15:00:53.651113 rw: helios_v2.0.2849-c41de27e7d
1719 15:00:53.651712 running image: 1
1720 15:00:53.655294 ACPI: * FADT
1721 15:00:53.655777 SCI is IRQ9
1722 15:00:53.662458 ACPI: added table 1/32, length now 40
1723 15:00:53.663041 ACPI: * SSDT
1724 15:00:53.665303 Found 1 CPU(s) with 8 core(s) each.
1725 15:00:53.668614 Error: Could not locate 'wifi_sar' in VPD.
1726 15:00:53.675328 Checking CBFS for default SAR values
1727 15:00:53.678779 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 15:00:53.682274 CBFS @ c08000 size 3f8000
1729 15:00:53.688455 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 15:00:53.691938 CBFS: Locating 'wifi_sar_defaults.hex'
1731 15:00:53.695369 CBFS: Found @ offset 5fac0 size 77
1732 15:00:53.698578 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1733 15:00:53.705212 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1734 15:00:53.708508 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1735 15:00:53.715164 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1736 15:00:53.718419 failed to find key in VPD: dsm_calib_r0_0
1737 15:00:53.728448 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1738 15:00:53.731597 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1739 15:00:53.735138 failed to find key in VPD: dsm_calib_r0_1
1740 15:00:53.745190 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1741 15:00:53.751713 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1742 15:00:53.754824 failed to find key in VPD: dsm_calib_r0_2
1743 15:00:53.764886 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1744 15:00:53.768407 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1745 15:00:53.774558 failed to find key in VPD: dsm_calib_r0_3
1746 15:00:53.781470 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1747 15:00:53.788108 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1748 15:00:53.790947 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1749 15:00:53.794437 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1750 15:00:53.798965 EC returned error result code 1
1751 15:00:53.802096 EC returned error result code 1
1752 15:00:53.806016 EC returned error result code 1
1753 15:00:53.813066 PS2K: Bad resp from EC. Vivaldi disabled!
1754 15:00:53.815566 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1755 15:00:53.822189 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1756 15:00:53.829451 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1757 15:00:53.832352 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1758 15:00:53.839067 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1759 15:00:53.845559 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1760 15:00:53.851930 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1761 15:00:53.855296 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1762 15:00:53.862358 ACPI: added table 2/32, length now 44
1763 15:00:53.862952 ACPI: * MCFG
1764 15:00:53.865404 ACPI: added table 3/32, length now 48
1765 15:00:53.869151 ACPI: * TPM2
1766 15:00:53.872131 TPM2 log created at 99a2d000
1767 15:00:53.875423 ACPI: added table 4/32, length now 52
1768 15:00:53.876044 ACPI: * MADT
1769 15:00:53.878776 SCI is IRQ9
1770 15:00:53.881613 ACPI: added table 5/32, length now 56
1771 15:00:53.882103 current = 99b43ac0
1772 15:00:53.885214 ACPI: * DMAR
1773 15:00:53.888734 ACPI: added table 6/32, length now 60
1774 15:00:53.891356 ACPI: * IGD OpRegion
1775 15:00:53.894770 GMA: Found VBT in CBFS
1776 15:00:53.895256 GMA: Found valid VBT in CBFS
1777 15:00:53.901703 ACPI: added table 7/32, length now 64
1778 15:00:53.902285 ACPI: * HPET
1779 15:00:53.905067 ACPI: added table 8/32, length now 68
1780 15:00:53.907974 ACPI: done.
1781 15:00:53.908460 ACPI tables: 31744 bytes.
1782 15:00:53.911254 smbios_write_tables: 99a2c000
1783 15:00:53.914822 EC returned error result code 3
1784 15:00:53.918371 Couldn't obtain OEM name from CBI
1785 15:00:53.922181 Create SMBIOS type 17
1786 15:00:53.925357 PCI: 00:00.0 (Intel Cannonlake)
1787 15:00:53.928505 PCI: 00:14.3 (Intel WiFi)
1788 15:00:53.931705 SMBIOS tables: 939 bytes.
1789 15:00:53.935228 Writing table forward entry at 0x00000500
1790 15:00:53.941801 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1791 15:00:53.945558 Writing coreboot table at 0x99b62000
1792 15:00:53.951657 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1793 15:00:53.954739 1. 0000000000001000-000000000009ffff: RAM
1794 15:00:53.958466 2. 00000000000a0000-00000000000fffff: RESERVED
1795 15:00:53.964677 3. 0000000000100000-0000000099a2bfff: RAM
1796 15:00:53.971237 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1797 15:00:53.974998 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1798 15:00:53.981018 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1799 15:00:53.984929 7. 000000009a000000-000000009f7fffff: RESERVED
1800 15:00:53.991410 8. 00000000e0000000-00000000efffffff: RESERVED
1801 15:00:53.994577 9. 00000000fc000000-00000000fc000fff: RESERVED
1802 15:00:54.001142 10. 00000000fe000000-00000000fe00ffff: RESERVED
1803 15:00:54.004732 11. 00000000fed10000-00000000fed17fff: RESERVED
1804 15:00:54.008041 12. 00000000fed80000-00000000fed83fff: RESERVED
1805 15:00:54.014462 13. 00000000fed90000-00000000fed91fff: RESERVED
1806 15:00:54.017866 14. 00000000feda0000-00000000feda1fff: RESERVED
1807 15:00:54.024110 15. 0000000100000000-000000045e7fffff: RAM
1808 15:00:54.027309 Graphics framebuffer located at 0xc0000000
1809 15:00:54.030841 Passing 5 GPIOs to payload:
1810 15:00:54.034174 NAME | PORT | POLARITY | VALUE
1811 15:00:54.040678 write protect | undefined | high | low
1812 15:00:54.047749 lid | undefined | high | high
1813 15:00:54.050657 power | undefined | high | low
1814 15:00:54.057573 oprom | undefined | high | low
1815 15:00:54.060724 EC in RW | 0x000000cb | high | low
1816 15:00:54.064144 Board ID: 4
1817 15:00:54.067303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1818 15:00:54.070810 CBFS @ c08000 size 3f8000
1819 15:00:54.077358 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1820 15:00:54.083494 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1821 15:00:54.087118 coreboot table: 1492 bytes.
1822 15:00:54.090327 IMD ROOT 0. 99fff000 00001000
1823 15:00:54.093593 IMD SMALL 1. 99ffe000 00001000
1824 15:00:54.097144 FSP MEMORY 2. 99c4e000 003b0000
1825 15:00:54.100688 CONSOLE 3. 99c2e000 00020000
1826 15:00:54.103689 FMAP 4. 99c2d000 0000054e
1827 15:00:54.107051 TIME STAMP 5. 99c2c000 00000910
1828 15:00:54.110427 VBOOT WORK 6. 99c18000 00014000
1829 15:00:54.113848 MRC DATA 7. 99c16000 00001958
1830 15:00:54.117062 ROMSTG STCK 8. 99c15000 00001000
1831 15:00:54.120077 AFTER CAR 9. 99c0b000 0000a000
1832 15:00:54.123359 RAMSTAGE 10. 99baf000 0005c000
1833 15:00:54.126763 REFCODE 11. 99b7a000 00035000
1834 15:00:54.130164 SMM BACKUP 12. 99b6a000 00010000
1835 15:00:54.133511 COREBOOT 13. 99b62000 00008000
1836 15:00:54.136786 ACPI 14. 99b3e000 00024000
1837 15:00:54.140347 ACPI GNVS 15. 99b3d000 00001000
1838 15:00:54.143418 RAMOOPS 16. 99a3d000 00100000
1839 15:00:54.146511 TPM2 TCGLOG17. 99a2d000 00010000
1840 15:00:54.149991 SMBIOS 18. 99a2c000 00000800
1841 15:00:54.150520 IMD small region:
1842 15:00:54.153378 IMD ROOT 0. 99ffec00 00000400
1843 15:00:54.156494 FSP RUNTIME 1. 99ffebe0 00000004
1844 15:00:54.159747 EC HOSTEVENT 2. 99ffebc0 00000008
1845 15:00:54.166792 POWER STATE 3. 99ffeb80 00000040
1846 15:00:54.169716 ROMSTAGE 4. 99ffeb60 00000004
1847 15:00:54.173041 MEM INFO 5. 99ffe9a0 000001b9
1848 15:00:54.176278 VPD 6. 99ffe920 0000006c
1849 15:00:54.179580 MTRR: Physical address space:
1850 15:00:54.185940 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1851 15:00:54.189485 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1852 15:00:54.196290 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1853 15:00:54.202700 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1854 15:00:54.209176 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1855 15:00:54.216136 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1856 15:00:54.222201 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1857 15:00:54.225737 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 15:00:54.229148 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 15:00:54.235345 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 15:00:54.239661 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 15:00:54.242367 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 15:00:54.245516 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 15:00:54.252308 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 15:00:54.255980 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 15:00:54.258625 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 15:00:54.262056 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 15:00:54.265153 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 15:00:54.269451 call enable_fixed_mtrr()
1869 15:00:54.273294 CPU physical address size: 39 bits
1870 15:00:54.279313 MTRR: default type WB/UC MTRR counts: 6/8.
1871 15:00:54.282539 MTRR: WB selected as default type.
1872 15:00:54.289207 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1873 15:00:54.292684 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1874 15:00:54.299427 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1875 15:00:54.306525 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1876 15:00:54.312604 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1877 15:00:54.320310 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1878 15:00:54.323389 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 15:00:54.328769 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 15:00:54.332184 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 15:00:54.335505 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 15:00:54.339381 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 15:00:54.345674 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 15:00:54.349098 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 15:00:54.352608 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 15:00:54.355275 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 15:00:54.362341 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 15:00:54.366006 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 15:00:54.366506
1890 15:00:54.366999 MTRR check
1891 15:00:54.369170 call enable_fixed_mtrr()
1892 15:00:54.371826 Fixed MTRRs : Enabled
1893 15:00:54.375457 Variable MTRRs: Enabled
1894 15:00:54.376073
1895 15:00:54.378680 CPU physical address size: 39 bits
1896 15:00:54.381816 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1897 15:00:54.388739 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 15:00:54.391983 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 15:00:54.395237 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 15:00:54.398802 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 15:00:54.405111 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 15:00:54.408309 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 15:00:54.411772 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 15:00:54.414976 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 15:00:54.421768 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 15:00:54.424684 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 15:00:54.428259 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 15:00:54.431870 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 15:00:54.438305 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 15:00:54.438894 call enable_fixed_mtrr()
1911 15:00:54.445360 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 15:00:54.448204 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 15:00:54.451471 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 15:00:54.455042 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 15:00:54.461440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 15:00:54.464943 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 15:00:54.467898 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 15:00:54.471336 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 15:00:54.474931 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 15:00:54.481409 CPU physical address size: 39 bits
1921 15:00:54.484672 call enable_fixed_mtrr()
1922 15:00:54.488228 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1923 15:00:54.491523 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 15:00:54.498029 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 15:00:54.501124 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 15:00:54.504300 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 15:00:54.507664 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 15:00:54.511038 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 15:00:54.518079 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 15:00:54.521145 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 15:00:54.524369 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 15:00:54.527780 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 15:00:54.534488 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 15:00:54.537717 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 15:00:54.540721 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 15:00:54.544519 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 15:00:54.550918 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 15:00:54.554326 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 15:00:54.557564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 15:00:54.560827 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 15:00:54.567829 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 15:00:54.570693 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 15:00:54.573880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 15:00:54.577128 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 15:00:54.580665 call enable_fixed_mtrr()
1946 15:00:54.584300 call enable_fixed_mtrr()
1947 15:00:54.586857 CPU physical address size: 39 bits
1948 15:00:54.590478 CPU physical address size: 39 bits
1949 15:00:54.593966 CPU physical address size: 39 bits
1950 15:00:54.600682 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 15:00:54.603679 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 15:00:54.607273 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 15:00:54.610811 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 15:00:54.613468 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 15:00:54.619922 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 15:00:54.623629 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 15:00:54.626871 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 15:00:54.629873 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 15:00:54.636800 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 15:00:54.640057 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 15:00:54.643331 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 15:00:54.646557 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 15:00:54.649993 call enable_fixed_mtrr()
1964 15:00:54.653044 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 15:00:54.659737 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 15:00:54.662950 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 15:00:54.666238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 15:00:54.669856 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 15:00:54.676636 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 15:00:54.679503 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 15:00:54.683171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 15:00:54.686432 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 15:00:54.693082 CPU physical address size: 39 bits
1974 15:00:54.693679 call enable_fixed_mtrr()
1975 15:00:54.696229 CBFS @ c08000 size 3f8000
1976 15:00:54.702638 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1977 15:00:54.705933 CBFS: Locating 'fallback/payload'
1978 15:00:54.708989 CPU physical address size: 39 bits
1979 15:00:54.712292 CBFS: Found @ offset 1c96c0 size 3f798
1980 15:00:54.719127 Checking segment from ROM address 0xffdd16f8
1981 15:00:54.722913 Checking segment from ROM address 0xffdd1714
1982 15:00:54.725891 Loading segment from ROM address 0xffdd16f8
1983 15:00:54.729164 code (compression=0)
1984 15:00:54.738873 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1985 15:00:54.745269 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1986 15:00:54.748802 it's not compressed!
1987 15:00:54.840841 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1988 15:00:54.847222 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1989 15:00:54.850776 Loading segment from ROM address 0xffdd1714
1990 15:00:54.854023 Entry Point 0x30000000
1991 15:00:54.856973 Loaded segments
1992 15:00:54.862753 Finalizing chipset.
1993 15:00:54.865900 Finalizing SMM.
1994 15:00:54.869428 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1995 15:00:54.873106 mp_park_aps done after 0 msecs.
1996 15:00:54.879322 Jumping to boot code at 30000000(99b62000)
1997 15:00:54.886052 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1998 15:00:54.886647
1999 15:00:54.889588 Starting depthcharge on Helios...
2000 15:00:54.890945 end: 2.2.3 depthcharge-start (duration 00:00:20) [common]
2001 15:00:54.891541 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2002 15:00:54.892057 Setting prompt string to ['hatch:']
2003 15:00:54.892605 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2004 15:00:54.899015 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2005 15:00:54.905876 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2006 15:00:54.912044 board_setup: Info: eMMC controller not present; skipping
2007 15:00:54.915741 New NVMe Controller 0x30053ac0 @ 00:1d:00
2008 15:00:54.922456 board_setup: Info: SDHCI controller not present; skipping
2009 15:00:54.928881 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2010 15:00:54.929475 Wipe memory regions:
2011 15:00:54.932813 [0x00000000001000, 0x000000000a0000)
2012 15:00:54.935652 [0x00000000100000, 0x00000030000000)
2013 15:00:55.005035 [0x00000030657430, 0x00000099a2c000)
2014 15:00:55.145050 [0x00000100000000, 0x0000045e800000)
2015 15:00:56.527661 R8152: Initializing
2016 15:00:56.531125 Version 9 (ocp_data = 6010)
2017 15:00:56.535340 R8152: Done initializing
2018 15:00:56.538528 Adding net device
2019 15:00:57.035800 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2020 15:00:57.036411
2021 15:00:57.037214 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2023 15:00:57.139044 hatch: tftpboot 192.168.201.1 7462833/tftp-deploy-eu29tg36/kernel/bzImage 7462833/tftp-deploy-eu29tg36/kernel/cmdline 7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
2024 15:00:57.139717 Setting prompt string to 'Starting kernel'
2025 15:00:57.140246 Setting prompt string to ['Starting kernel']
2026 15:00:57.140646 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 15:00:57.141063 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2028 15:00:57.144753 tftpboot 192.168.201.1 7462833/tftp-deploy-eu29tg36/kernel/bzImay-eu29tg36/kernel/cmdline 7462833/tftp-deploy-eu29tg36/ramdisk/ramdisk.cpio.gz
2029 15:00:57.145223 Waiting for link
2030 15:00:57.345466 done.
2031 15:00:57.346039 MAC: f4:f5:e8:50:dc:f7
2032 15:00:57.348869 Sending DHCP discover... done.
2033 15:00:57.351972 Waiting for reply... done.
2034 15:00:57.355158 Sending DHCP request... done.
2035 15:00:57.362029 Waiting for reply... done.
2036 15:00:57.362514 My ip is 192.168.201.20
2037 15:00:57.365289 The DHCP server ip is 192.168.201.1
2038 15:00:57.372062 TFTP server IP predefined by user: 192.168.201.1
2039 15:00:57.378549 Bootfile predefined by user: 7462833/tftp-deploy-eu29tg36/kernel/bzImage
2040 15:00:57.381761 Sending tftp read request... done.
2041 15:00:57.385072 Waiting for the transfer...
2042 15:00:57.760521 00000000 ################################################################
2043 15:00:58.103472 00080000 ################################################################
2044 15:00:58.423724 00100000 ################################################################
2045 15:00:58.716943 00180000 ################################################################
2046 15:00:58.985471 00200000 ################################################################
2047 15:00:59.224684 00280000 ################################################################
2048 15:00:59.512771 00300000 ################################################################
2049 15:00:59.798791 00380000 ################################################################
2050 15:01:00.031324 00400000 ################################################################
2051 15:01:00.258879 00480000 ################################################################
2052 15:01:00.487121 00500000 ################################################################
2053 15:01:00.715956 00580000 ################################################################
2054 15:01:00.942909 00600000 ################################################################
2055 15:01:01.080744 00680000 ###################################### done.
2056 15:01:01.083936 The bootfile was 7126928 bytes long.
2057 15:01:01.087233 Sending tftp read request... done.
2058 15:01:01.090268 Waiting for the transfer...
2059 15:01:01.338622 00000000 ################################################################
2060 15:01:01.565837 00080000 ################################################################
2061 15:01:01.806561 00100000 ################################################################
2062 15:01:02.050014 00180000 ################################################################
2063 15:01:02.291530 00200000 ################################################################
2064 15:01:02.515792 00280000 ################################################################
2065 15:01:02.741625 00300000 ################################################################
2066 15:01:02.981457 00380000 ################################################################
2067 15:01:03.269993 00400000 ################################################################
2068 15:01:03.558067 00480000 ################################################################
2069 15:01:03.695089 00500000 ################################ done.
2070 15:01:03.698675 Sending tftp read request... done.
2071 15:01:03.702004 Waiting for the transfer...
2072 15:01:03.702105 00000000 # done.
2073 15:01:03.712093 Command line loaded dynamically from TFTP file: 7462833/tftp-deploy-eu29tg36/kernel/cmdline
2074 15:01:03.735358 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7462833/extract-nfsrootfs-btcnggtx,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2075 15:01:03.741683 ec_init(0): CrosEC protocol v3 supported (256, 256)
2076 15:01:03.748549 Shutting down all USB controllers.
2077 15:01:03.748874 Removing current net device
2078 15:01:03.752385 Finalizing coreboot
2079 15:01:03.759528 Exiting depthcharge with code 4 at timestamp: 16136006
2080 15:01:03.760055
2081 15:01:03.760449 Starting kernel ...
2082 15:01:03.760811
2083 15:01:03.762096 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2084 15:01:03.762644 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2085 15:01:03.763069 Setting prompt string to ['Linux version [0-9]']
2086 15:01:03.763490 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2087 15:01:03.763929 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2088 15:01:03.764899
2090 15:05:34.763783 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2092 15:05:34.765042 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2094 15:05:34.765944 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2097 15:05:34.767676 end: 2 depthcharge-action (duration 00:05:00) [common]
2099 15:05:34.768872 Cleaning after the job
2100 15:05:34.769362 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/ramdisk
2101 15:05:34.771601 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/kernel
2102 15:05:34.774473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/nfsrootfs
2103 15:05:34.835882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462833/tftp-deploy-eu29tg36/modules
2104 15:05:34.836199 start: 5.1 power-off (timeout 00:00:30) [common]
2105 15:05:34.836366 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2106 15:05:34.855268 >> Command sent successfully.
2107 15:05:34.857128 Returned 0 in 0 seconds
2108 15:05:34.958463 end: 5.1 power-off (duration 00:00:00) [common]
2110 15:05:34.960082 start: 5.2 read-feedback (timeout 00:10:00) [common]
2111 15:05:34.961284 Listened to connection for namespace 'common' for up to 1s
2112 15:05:35.637481 Listened to connection for namespace 'common' for up to 1s
2113 15:05:35.640415 Listened to connection for namespace 'common' for up to 1s
2114 15:05:35.644208 Listened to connection for namespace 'common' for up to 1s
2115 15:05:35.647713 Listened to connection for namespace 'common' for up to 1s
2116 15:05:35.650670 Listened to connection for namespace 'common' for up to 1s
2117 15:05:35.654347 Listened to connection for namespace 'common' for up to 1s
2118 15:05:35.657912 Listened to connection for namespace 'common' for up to 1s
2119 15:05:35.661376 Listened to connection for namespace 'common' for up to 1s
2120 15:05:35.664274 Listened to connection for namespace 'common' for up to 1s
2121 15:05:35.668003 Listened to connection for namespace 'common' for up to 1s
2122 15:05:35.670808 Listened to connection for namespace 'common' for up to 1s
2123 15:05:35.677225 Listened to connection for namespace 'common' for up to 1s
2124 15:05:35.680467 Listened to connection for namespace 'common' for up to 1s
2125 15:05:35.962424 Finalising connection for namespace 'common'
2126 15:05:35.963166 Disconnecting from shell: Finalise
2127 15:05:35.963708
2128 15:05:36.065001 end: 5.2 read-feedback (duration 00:00:01) [common]
2129 15:05:36.065178 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462833
2130 15:05:36.155025 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462833
2131 15:05:36.155236 JobError: Your job cannot terminate cleanly.