Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 14:47:13.348657 lava-dispatcher, installed at version: 2022.06
2 14:47:13.348841 start: 0 validate
3 14:47:13.348977 Start time: 2022-09-30 14:47:13.348969+00:00 (UTC)
4 14:47:13.349100 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:47:13.349228 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Finitrd.cpio.gz exists
6 14:47:13.639551 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:47:13.639716 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:47:13.925416 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:47:13.925610 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:47:14.214564 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:47:14.214722 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:47:14.506832 validate duration: 1.16
14 14:47:14.507117 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:47:14.507218 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:47:14.507307 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:47:14.507403 Not decompressing ramdisk as can be used compressed.
18 14:47:14.507488 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/initrd.cpio.gz
19 14:47:14.507554 saving as /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/ramdisk/initrd.cpio.gz
20 14:47:14.507616 total size: 5431599 (5MB)
21 14:47:14.508690 progress 0% (0MB)
22 14:47:14.510273 progress 5% (0MB)
23 14:47:14.511625 progress 10% (0MB)
24 14:47:14.512969 progress 15% (0MB)
25 14:47:14.514513 progress 20% (1MB)
26 14:47:14.515783 progress 25% (1MB)
27 14:47:14.517051 progress 30% (1MB)
28 14:47:14.518519 progress 35% (1MB)
29 14:47:14.519855 progress 40% (2MB)
30 14:47:14.521124 progress 45% (2MB)
31 14:47:14.522468 progress 50% (2MB)
32 14:47:14.523949 progress 55% (2MB)
33 14:47:14.525275 progress 60% (3MB)
34 14:47:14.526573 progress 65% (3MB)
35 14:47:14.528019 progress 70% (3MB)
36 14:47:14.529389 progress 75% (3MB)
37 14:47:14.530685 progress 80% (4MB)
38 14:47:14.531944 progress 85% (4MB)
39 14:47:14.533349 progress 90% (4MB)
40 14:47:14.534735 progress 95% (4MB)
41 14:47:14.536015 progress 100% (5MB)
42 14:47:14.536264 5MB downloaded in 0.03s (180.84MB/s)
43 14:47:14.536409 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:47:14.536651 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:47:14.536740 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:47:14.536843 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:47:14.536957 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:47:14.537024 saving as /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/kernel/bzImage
50 14:47:14.537086 total size: 7126928 (6MB)
51 14:47:14.537147 No compression specified
52 14:47:16.541558 progress 0% (0MB)
53 14:47:16.543475 progress 5% (0MB)
54 14:47:16.545255 progress 10% (0MB)
55 14:47:16.547127 progress 15% (1MB)
56 14:47:16.548903 progress 20% (1MB)
57 14:47:16.550859 progress 25% (1MB)
58 14:47:16.552705 progress 30% (2MB)
59 14:47:16.554543 progress 35% (2MB)
60 14:47:16.556106 progress 40% (2MB)
61 14:47:16.558045 progress 45% (3MB)
62 14:47:16.559787 progress 50% (3MB)
63 14:47:16.561575 progress 55% (3MB)
64 14:47:16.563367 progress 60% (4MB)
65 14:47:16.565112 progress 65% (4MB)
66 14:47:16.567022 progress 70% (4MB)
67 14:47:16.568796 progress 75% (5MB)
68 14:47:16.570496 progress 80% (5MB)
69 14:47:16.572312 progress 85% (5MB)
70 14:47:16.574055 progress 90% (6MB)
71 14:47:16.575864 progress 95% (6MB)
72 14:47:16.577644 progress 100% (6MB)
73 14:47:16.577909 6MB downloaded in 2.04s (3.33MB/s)
74 14:47:16.578054 end: 1.2.1 http-download (duration 00:00:02) [common]
76 14:47:16.578313 end: 1.2 download-retry (duration 00:00:02) [common]
77 14:47:16.578400 start: 1.3 download-retry (timeout 00:09:58) [common]
78 14:47:16.578485 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 14:47:16.578617 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/full.rootfs.tar.xz
80 14:47:16.578698 saving as /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/nfsrootfs/full.rootfs.tar
81 14:47:16.578773 total size: 133274540 (127MB)
82 14:47:16.578850 Using unxz to decompress xz
83 14:47:16.582341 progress 0% (0MB)
84 14:47:16.914605 progress 5% (6MB)
85 14:47:17.270280 progress 10% (12MB)
86 14:47:17.553005 progress 15% (19MB)
87 14:47:17.746281 progress 20% (25MB)
88 14:47:17.997744 progress 25% (31MB)
89 14:47:18.330632 progress 30% (38MB)
90 14:47:18.670741 progress 35% (44MB)
91 14:47:19.059964 progress 40% (50MB)
92 14:47:19.442298 progress 45% (57MB)
93 14:47:19.801592 progress 50% (63MB)
94 14:47:20.173949 progress 55% (69MB)
95 14:47:20.537221 progress 60% (76MB)
96 14:47:20.899019 progress 65% (82MB)
97 14:47:21.263233 progress 70% (89MB)
98 14:47:21.621868 progress 75% (95MB)
99 14:47:22.058453 progress 80% (101MB)
100 14:47:22.497500 progress 85% (108MB)
101 14:47:22.772916 progress 90% (114MB)
102 14:47:23.114190 progress 95% (120MB)
103 14:47:23.503782 progress 100% (127MB)
104 14:47:23.509166 127MB downloaded in 6.93s (18.34MB/s)
105 14:47:23.509426 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:47:23.509707 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:47:23.509840 start: 1.4 download-retry (timeout 00:09:51) [common]
109 14:47:23.509943 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 14:47:23.510063 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:47:23.510139 saving as /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/modules/modules.tar
112 14:47:23.510206 total size: 52080 (0MB)
113 14:47:23.510273 Using unxz to decompress xz
114 14:47:23.513454 progress 62% (0MB)
115 14:47:23.513873 progress 100% (0MB)
116 14:47:23.517660 0MB downloaded in 0.01s (6.67MB/s)
117 14:47:23.517957 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:47:23.518209 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:47:23.518308 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 14:47:23.518417 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 14:47:24.777739 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7462803/extract-nfsrootfs-jb54vdxg
123 14:47:24.777977 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 14:47:24.778088 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 14:47:24.778225 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d
126 14:47:24.778327 makedir: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin
127 14:47:24.778411 makedir: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/tests
128 14:47:24.778493 makedir: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/results
129 14:47:24.778592 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-add-keys
130 14:47:24.778720 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-add-sources
131 14:47:24.778845 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-background-process-start
132 14:47:24.778957 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-background-process-stop
133 14:47:24.779067 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-common-functions
134 14:47:24.779175 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-echo-ipv4
135 14:47:24.779284 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-install-packages
136 14:47:24.779401 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-installed-packages
137 14:47:24.779508 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-os-build
138 14:47:24.779625 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-probe-channel
139 14:47:24.779734 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-probe-ip
140 14:47:24.779840 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-target-ip
141 14:47:24.779946 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-target-mac
142 14:47:24.780065 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-target-storage
143 14:47:24.780193 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-case
144 14:47:24.780303 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-event
145 14:47:24.780419 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-feedback
146 14:47:24.780531 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-raise
147 14:47:24.780637 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-reference
148 14:47:24.780744 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-runner
149 14:47:24.780851 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-set
150 14:47:24.780958 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-test-shell
151 14:47:24.781073 Updating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-install-packages (oe)
152 14:47:24.781195 Updating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/bin/lava-installed-packages (oe)
153 14:47:24.781290 Creating /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/environment
154 14:47:24.781376 LAVA metadata
155 14:47:24.781442 - LAVA_JOB_ID=7462803
156 14:47:24.781504 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:47:24.781600 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 14:47:24.781665 skipped lava-vland-overlay
159 14:47:24.781750 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:47:24.781872 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 14:47:24.781935 skipped lava-multinode-overlay
162 14:47:24.782014 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:47:24.782153 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 14:47:24.782231 Loading test definitions
165 14:47:24.782333 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 14:47:24.782416 Using /lava-7462803 at stage 0
167 14:47:24.782663 uuid=7462803_1.5.2.3.1 testdef=None
168 14:47:24.782754 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 14:47:24.782850 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 14:47:24.783325 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 14:47:24.783555 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 14:47:24.784129 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 14:47:24.784368 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 14:47:24.784922 runner path: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/0/tests/0_dmesg test_uuid 7462803_1.5.2.3.1
177 14:47:24.785071 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 14:47:24.785303 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 14:47:24.785384 Using /lava-7462803 at stage 1
181 14:47:24.785627 uuid=7462803_1.5.2.3.5 testdef=None
182 14:47:24.785716 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 14:47:24.785951 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 14:47:24.786425 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 14:47:24.786649 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 14:47:24.787225 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 14:47:24.787460 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 14:47:24.788022 runner path: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/1/tests/1_bootrr test_uuid 7462803_1.5.2.3.5
191 14:47:24.788165 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 14:47:24.788375 Creating lava-test-runner.conf files
194 14:47:24.788440 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/0 for stage 0
195 14:47:24.788530 - 0_dmesg
196 14:47:24.788604 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462803/lava-overlay-hha3oi6d/lava-7462803/1 for stage 1
197 14:47:24.788695 - 1_bootrr
198 14:47:24.788784 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 14:47:24.788869 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 14:47:24.794593 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 14:47:24.794701 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 14:47:24.794789 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 14:47:24.794875 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 14:47:24.794961 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 14:47:24.896840 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 14:47:24.897187 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
207 14:47:24.897295 extracting modules file /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462803/extract-nfsrootfs-jb54vdxg
208 14:47:24.901336 extracting modules file /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462803/extract-overlay-ramdisk-ubrj9ma3/ramdisk
209 14:47:24.905144 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 14:47:24.905255 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
211 14:47:24.905338 [common] Applying overlay to NFS
212 14:47:24.905411 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462803/compress-overlay-3ap8n9iz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462803/extract-nfsrootfs-jb54vdxg
213 14:47:24.909249 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 14:47:24.909354 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
215 14:47:24.909445 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 14:47:24.909536 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
217 14:47:24.909613 Building ramdisk /var/lib/lava/dispatcher/tmp/7462803/extract-overlay-ramdisk-ubrj9ma3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462803/extract-overlay-ramdisk-ubrj9ma3/ramdisk
218 14:47:24.942065 >> 24546 blocks
219 14:47:25.414475 rename /var/lib/lava/dispatcher/tmp/7462803/extract-overlay-ramdisk-ubrj9ma3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
220 14:47:25.414892 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 14:47:25.415028 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 14:47:25.415137 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 14:47:25.415233 No mkimage arch provided, not using FIT.
224 14:47:25.415328 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 14:47:25.415416 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 14:47:25.415516 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 14:47:25.415606 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 14:47:25.415691 No LXC device requested
229 14:47:25.415773 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 14:47:25.415861 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 14:47:25.415941 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 14:47:25.416008 Checking files for TFTP limit of 4294967296 bytes.
233 14:47:25.416409 end: 1 tftp-deploy (duration 00:00:11) [common]
234 14:47:25.416519 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 14:47:25.416617 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 14:47:25.416744 substitutions:
237 14:47:25.416819 - {DTB}: None
238 14:47:25.416886 - {INITRD}: 7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
239 14:47:25.416947 - {KERNEL}: 7462803/tftp-deploy-h3bb3_is/kernel/bzImage
240 14:47:25.417009 - {LAVA_MAC}: None
241 14:47:25.417101 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7462803/extract-nfsrootfs-jb54vdxg
242 14:47:25.417180 - {NFS_SERVER_IP}: 192.168.201.1
243 14:47:25.417240 - {PRESEED_CONFIG}: None
244 14:47:25.417297 - {PRESEED_LOCAL}: None
245 14:47:25.417354 - {RAMDISK}: 7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
246 14:47:25.417416 - {ROOT_PART}: None
247 14:47:25.417473 - {ROOT}: None
248 14:47:25.417547 - {SERVER_IP}: 192.168.201.1
249 14:47:25.417605 - {TEE}: None
250 14:47:25.417661 Parsed boot commands:
251 14:47:25.417716 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 14:47:25.417905 Parsed boot commands: tftpboot 192.168.201.1 7462803/tftp-deploy-h3bb3_is/kernel/bzImage 7462803/tftp-deploy-h3bb3_is/kernel/cmdline 7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
253 14:47:25.418000 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 14:47:25.418096 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 14:47:25.418187 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 14:47:25.418273 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 14:47:25.418343 Not connected, no need to disconnect.
258 14:47:25.418420 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 14:47:25.418504 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 14:47:25.418579 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-3'
261 14:47:25.421138 Setting prompt string to ['lava-test: # ']
262 14:47:25.421428 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 14:47:25.421533 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 14:47:25.421633 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 14:47:25.421721 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 14:47:25.421944 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-3' '--port=1' '--command=reboot'
267 14:47:25.441192 >> Command sent successfully.
268 14:47:25.443125 Returned 0 in 0 seconds
269 14:47:25.543909 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 14:47:25.544284 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 14:47:25.544400 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 14:47:25.544496 Setting prompt string to 'Starting depthcharge on sarien...'
274 14:47:25.544564 Changing prompt to 'Starting depthcharge on sarien...'
275 14:47:25.544631 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
276 14:47:25.544917 [Enter `^Ec?' for help]
277 14:47:40.240871
278 14:47:40.241496
279 14:47:40.249892 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
280 14:47:40.254075 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
281 14:47:40.259321 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
282 14:47:40.264025 CPU: AES supported, TXT supported, VT supported
283 14:47:40.268594 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
284 14:47:40.273930 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
285 14:47:40.279389 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
286 14:47:40.282419 VBOOT: Loading verstage.
287 14:47:40.285048 CBFS @ 1d00000 size 300000
288 14:47:40.291467 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
289 14:47:40.295870 CBFS: Locating 'fallback/verstage'
290 14:47:40.299515 CBFS: Found @ offset 10f6c0 size 1435c
291 14:47:40.315629
292 14:47:40.316588
293 14:47:40.323751 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
294 14:47:40.331292 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
295 14:47:40.334258 done! DID_VID 0x00281ae0
296 14:47:40.335951 TPM ready after 0 ms
297 14:47:40.339825 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
298 14:47:40.417892 tlcl_send_startup: Startup return code is 0
299 14:47:40.419947 TPM: setup succeeded
300 14:47:40.438403 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
301 14:47:40.441840 Checking cr50 for recovery request
302 14:47:40.452030 Phase 1
303 14:47:40.456847 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
304 14:47:40.461374 FMAP: base = fe000000 size = 2000000 #areas = 37
305 14:47:40.466208 FMAP: area GBB found @ 1c11000 (978944 bytes)
306 14:47:40.472819 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 14:47:40.473603 Phase 2
308 14:47:40.474608 Phase 3
309 14:47:40.479469 FMAP: area GBB found @ 1c11000 (978944 bytes)
310 14:47:40.486572 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 14:47:40.491746 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
312 14:47:40.496578 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
313 14:47:40.502308 VB2:vb2_verify_keyblock() Checking key block signature...
314 14:47:40.517560 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
315 14:47:40.522482 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
316 14:47:40.527241 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 14:47:40.530405 Phase 4
318 14:47:40.535986 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
319 14:47:40.542570 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 14:47:40.713574 VB2:vb2_rsa_verify_digest() Digest check failed!
321 14:47:40.718593 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
322 14:47:40.719922 Saving nvdata
323 14:47:40.723179 Reboot requested (10020007)
324 14:47:40.725710 board_reset() called!
325 14:47:40.727977 full_reset() called!
326 14:47:45.271305
327 14:47:45.271510
328 14:47:45.279506 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
329 14:47:45.284531 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
330 14:47:45.288765 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
331 14:47:45.293994 CPU: AES supported, TXT supported, VT supported
332 14:47:45.298941 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
333 14:47:45.303999 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
334 14:47:45.309444 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
335 14:47:45.312844 VBOOT: Loading verstage.
336 14:47:45.315377 CBFS @ 1d00000 size 300000
337 14:47:45.321579 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
338 14:47:45.325194 CBFS: Locating 'fallback/verstage'
339 14:47:45.329479 CBFS: Found @ offset 10f6c0 size 1435c
340 14:47:45.344350
341 14:47:45.345056
342 14:47:45.352552 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
343 14:47:45.359565 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
344 14:47:45.482402 .done! DID_VID 0x00281ae0
345 14:47:45.484666 TPM ready after 0 ms
346 14:47:45.488522 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
347 14:47:45.566237 tlcl_send_startup: Startup return code is 0
348 14:47:45.568093 TPM: setup succeeded
349 14:47:45.586404 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
350 14:47:45.590299 Checking cr50 for recovery request
351 14:47:45.600126 Phase 1
352 14:47:45.605159 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
353 14:47:45.610222 FMAP: base = fe000000 size = 2000000 #areas = 37
354 14:47:45.614483 FMAP: area GBB found @ 1c11000 (978944 bytes)
355 14:47:45.621270 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
356 14:47:45.627673 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
357 14:47:45.630865 Recovery requested (1009000e)
358 14:47:45.632294 Saving nvdata
359 14:47:45.647809 tlcl_extend: response is 0
360 14:47:45.663029 tlcl_extend: response is 0
361 14:47:45.666873 CBFS @ 1d00000 size 300000
362 14:47:45.673116 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
363 14:47:45.676342 CBFS: Locating 'fallback/romstage'
364 14:47:45.680484 CBFS: Found @ offset 80 size 15b2c
365 14:47:45.681947
366 14:47:45.682170
367 14:47:45.689735 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
368 14:47:45.695003 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
369 14:47:45.699862 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 14:47:45.703613 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
371 14:47:45.707927 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 14:47:45.712377 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
373 14:47:45.714291 TCO_STS: 0000 0004
374 14:47:45.717578 GEN_PMCON: d0015209 00002200
375 14:47:45.720434 GBLRST_CAUSE: 00000000 00000000
376 14:47:45.722601 prev_sleep_state 5
377 14:47:45.726405 Boot Count incremented to 9920
378 14:47:45.729097 CBFS @ 1d00000 size 300000
379 14:47:45.735721 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
380 14:47:45.737907 CBFS: Locating 'fspm.bin'
381 14:47:45.742070 CBFS: Found @ offset 60fc0 size 70000
382 14:47:45.747390 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
383 14:47:45.752274 FMAP: base = fe000000 size = 2000000 #areas = 37
384 14:47:45.758234 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
385 14:47:45.764449 Probing TPM I2C: done! DID_VID 0x00281ae0
386 14:47:45.766896 Locality already claimed
387 14:47:45.770654 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
388 14:47:45.790147 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
389 14:47:45.796689 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 14:47:45.799244 MRC cache found, size 18e0
391 14:47:45.801448 bootmode is set to :2
392 14:47:45.895037 CBMEM:
393 14:47:45.898623 IMD: root @ 89fff000 254 entries.
394 14:47:45.901772 IMD: root @ 89ffec00 62 entries.
395 14:47:45.904255 External stage cache:
396 14:47:45.908027 IMD: root @ 8abff000 254 entries.
397 14:47:45.911529 IMD: root @ 8abfec00 62 entries.
398 14:47:45.917133 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
399 14:47:45.920692 creating vboot_handoff structure
400 14:47:45.941640 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
401 14:47:45.957193 tlcl_write: response is 0
402 14:47:45.976512 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
403 14:47:45.981036 MRC: TPM MRC hash updated successfully.
404 14:47:45.981817 1 DIMMs found
405 14:47:45.984886 top_of_ram = 0x8a000000
406 14:47:45.990274 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
407 14:47:45.995090 MTRR Range: Start=ff000000 End=0 (Size 1000000)
408 14:47:45.997334 CBFS @ 1d00000 size 300000
409 14:47:46.003587 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
410 14:47:46.006746 CBFS: Locating 'fallback/postcar'
411 14:47:46.010706 CBFS: Found @ offset 107000 size 41a4
412 14:47:46.016926 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
413 14:47:46.027496 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
414 14:47:46.032149 Processing 126 relocs. Offset value of 0x87cdd000
415 14:47:46.034982
416 14:47:46.035250
417 14:47:46.043668 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
418 14:47:46.046233 CBFS @ 1d00000 size 300000
419 14:47:46.052551 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
420 14:47:46.056100 CBFS: Locating 'fallback/ramstage'
421 14:47:46.060121 CBFS: Found @ offset 458c0 size 1a8a8
422 14:47:46.066499 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
423 14:47:46.095772 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
424 14:47:46.100998 Processing 3754 relocs. Offset value of 0x88e81000
425 14:47:46.107187
426 14:47:46.107665
427 14:47:46.115557 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
428 14:47:46.119726 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
429 14:47:46.124657 FMAP: base = fe000000 size = 2000000 #areas = 37
430 14:47:46.129679 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
431 14:47:46.133976 WARNING: RO_VPD is uninitialized or empty.
432 14:47:46.139105 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
433 14:47:46.143152 WARNING: RW_VPD is uninitialized or empty.
434 14:47:46.144412 Normal boot.
435 14:47:46.151476 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1160
436 14:47:46.154082 CBFS @ 1d00000 size 300000
437 14:47:46.159949 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
438 14:47:46.164023 CBFS: Locating 'cpu_microcode_blob.bin'
439 14:47:46.167921 CBFS: Found @ offset 15c40 size 2fc00
440 14:47:46.172469 microcode: sig=0x806ec pf=0x80 revision=0xb7
441 14:47:46.174561 Skip microcode update
442 14:47:46.177422 CBFS @ 1d00000 size 300000
443 14:47:46.183900 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
444 14:47:46.186771 CBFS: Locating 'fsps.bin'
445 14:47:46.190757 CBFS: Found @ offset d1fc0 size 35000
446 14:47:46.224925 Detected 4 core, 8 thread CPU.
447 14:47:46.227649 Setting up SMI for CPU
448 14:47:46.229434 IED base = 0x8ac00000
449 14:47:46.232206 IED size = 0x00400000
450 14:47:46.234776 Will perform SMM setup.
451 14:47:46.239993 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
452 14:47:46.247539 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 14:47:46.252383 Processing 16 relocs. Offset value of 0x00030000
454 14:47:46.255222 Attempting to start 7 APs
455 14:47:46.259027 Waiting for 10ms after sending INIT.
456 14:47:46.274555 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 14:47:46.275385 done.
458 14:47:46.277669 AP: slot 1 apic_id 3.
459 14:47:46.280120 AP: slot 4 apic_id 2.
460 14:47:46.281984 AP: slot 7 apic_id 6.
461 14:47:46.284509 AP: slot 2 apic_id 7.
462 14:47:46.288731 Waiting for 2nd SIPI to complete...done.
463 14:47:46.290724 AP: slot 5 apic_id 5.
464 14:47:46.292690 AP: slot 6 apic_id 4.
465 14:47:46.300878 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 14:47:46.305374 Processing 13 relocs. Offset value of 0x00038000
467 14:47:46.312382 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
468 14:47:46.316077 Installing SMM handler to 0x8a000000
469 14:47:46.323811 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
470 14:47:46.329589 Processing 867 relocs. Offset value of 0x8a010000
471 14:47:46.337705 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
472 14:47:46.342706 Processing 13 relocs. Offset value of 0x8a008000
473 14:47:46.347782 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
474 14:47:46.353552 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
475 14:47:46.359423 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
476 14:47:46.364973 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
477 14:47:46.370706 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
478 14:47:46.376878 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
479 14:47:46.382349 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
480 14:47:46.388674 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
481 14:47:46.391946 Clearing SMI status registers
482 14:47:46.393991 SMI_STS: PM1
483 14:47:46.395545 PM1_STS: WAK PWRBTN
484 14:47:46.398889 TCO_STS: BOOT SECOND_TO
485 14:47:46.400294 GPE0 STD STS: eSPI
486 14:47:46.402546 New SMBASE 0x8a000000
487 14:47:46.405590 In relocation handler: CPU 0
488 14:47:46.410051 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
489 14:47:46.414575 Writing SMRR. base = 0x8a000006, mask=0xff000800
490 14:47:46.416842 Relocation complete.
491 14:47:46.419469 New SMBASE 0x89fff400
492 14:47:46.421768 In relocation handler: CPU 3
493 14:47:46.426407 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
494 14:47:46.430686 Writing SMRR. base = 0x8a000006, mask=0xff000800
495 14:47:46.433597 Relocation complete.
496 14:47:46.435243 New SMBASE 0x89ffec00
497 14:47:46.438680 In relocation handler: CPU 5
498 14:47:46.442321 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
499 14:47:46.447020 Writing SMRR. base = 0x8a000006, mask=0xff000800
500 14:47:46.449981 Relocation complete.
501 14:47:46.451540 New SMBASE 0x89ffe800
502 14:47:46.454619 In relocation handler: CPU 6
503 14:47:46.458668 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
504 14:47:46.463922 Writing SMRR. base = 0x8a000006, mask=0xff000800
505 14:47:46.465543 Relocation complete.
506 14:47:46.468189 New SMBASE 0x89fff000
507 14:47:46.471000 In relocation handler: CPU 4
508 14:47:46.475130 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
509 14:47:46.480028 Writing SMRR. base = 0x8a000006, mask=0xff000800
510 14:47:46.481864 Relocation complete.
511 14:47:46.484490 New SMBASE 0x89fffc00
512 14:47:46.487000 In relocation handler: CPU 1
513 14:47:46.491553 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
514 14:47:46.496540 Writing SMRR. base = 0x8a000006, mask=0xff000800
515 14:47:46.498653 Relocation complete.
516 14:47:46.500499 New SMBASE 0x89ffe400
517 14:47:46.503440 In relocation handler: CPU 7
518 14:47:46.507366 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
519 14:47:46.512899 Writing SMRR. base = 0x8a000006, mask=0xff000800
520 14:47:46.514490 Relocation complete.
521 14:47:46.517085 New SMBASE 0x89fff800
522 14:47:46.519734 In relocation handler: CPU 2
523 14:47:46.524177 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
524 14:47:46.528855 Writing SMRR. base = 0x8a000006, mask=0xff000800
525 14:47:46.530972 Relocation complete.
526 14:47:46.533085 Initializing CPU #0
527 14:47:46.536348 CPU: vendor Intel device 806ec
528 14:47:46.540079 CPU: family 06, model 8e, stepping 0c
529 14:47:46.542601 Clearing out pending MCEs
530 14:47:46.546922 Setting up local APIC... apic_id: 0x00 done.
531 14:47:46.550205 Turbo is available but hidden
532 14:47:46.552428 Turbo has been enabled
533 14:47:46.554635 VMX status: enabled
534 14:47:46.558107 IA32_FEATURE_CONTROL status: locked
535 14:47:46.560770 Skip microcode update
536 14:47:46.562795 CPU #0 initialized
537 14:47:46.564823 Initializing CPU #3
538 14:47:46.566575 Initializing CPU #6
539 14:47:46.569174 Initializing CPU #5
540 14:47:46.571522 CPU: vendor Intel device 806ec
541 14:47:46.575779 CPU: family 06, model 8e, stepping 0c
542 14:47:46.579158 CPU: vendor Intel device 806ec
543 14:47:46.582302 CPU: family 06, model 8e, stepping 0c
544 14:47:46.584858 Clearing out pending MCEs
545 14:47:46.587734 Clearing out pending MCEs
546 14:47:46.593177 Setting up local APIC...CPU: vendor Intel device 806ec
547 14:47:46.597400 CPU: family 06, model 8e, stepping 0c
548 14:47:46.599985 Clearing out pending MCEs
549 14:47:46.601588 Initializing CPU #2
550 14:47:46.603651 Initializing CPU #7
551 14:47:46.607197 CPU: vendor Intel device 806ec
552 14:47:46.610855 CPU: family 06, model 8e, stepping 0c
553 14:47:46.613892 CPU: vendor Intel device 806ec
554 14:47:46.617797 CPU: family 06, model 8e, stepping 0c
555 14:47:46.620274 Clearing out pending MCEs
556 14:47:46.622728 Clearing out pending MCEs
557 14:47:46.629224 Setting up local APIC...Setting up local APIC...Initializing CPU #4
558 14:47:46.631562 Initializing CPU #1
559 14:47:46.634485 CPU: vendor Intel device 806ec
560 14:47:46.638239 CPU: family 06, model 8e, stepping 0c
561 14:47:46.641664 CPU: vendor Intel device 806ec
562 14:47:46.645517 CPU: family 06, model 8e, stepping 0c
563 14:47:46.647875 Clearing out pending MCEs
564 14:47:46.650884 Clearing out pending MCEs
565 14:47:46.657541 Setting up local APIC...Setting up local APIC... apic_id: 0x05 done.
566 14:47:46.659386 apic_id: 0x04 done.
567 14:47:46.661696 VMX status: enabled
568 14:47:46.663773 VMX status: enabled
569 14:47:46.667207 IA32_FEATURE_CONTROL status: locked
570 14:47:46.671071 IA32_FEATURE_CONTROL status: locked
571 14:47:46.673554 Skip microcode update
572 14:47:46.675056 Skip microcode update
573 14:47:46.677214 CPU #5 initialized
574 14:47:46.679246 CPU #6 initialized
575 14:47:46.681103 apic_id: 0x02 done.
576 14:47:46.685858 Setting up local APIC... apic_id: 0x07 done.
577 14:47:46.690736 Setting up local APIC... apic_id: 0x01 done.
578 14:47:46.692399 apic_id: 0x03 done.
579 14:47:46.694218 VMX status: enabled
580 14:47:46.696750 VMX status: enabled
581 14:47:46.700241 IA32_FEATURE_CONTROL status: locked
582 14:47:46.703576 IA32_FEATURE_CONTROL status: locked
583 14:47:46.706143 Skip microcode update
584 14:47:46.708762 Skip microcode update
585 14:47:46.709948 CPU #4 initialized
586 14:47:46.711794 CPU #1 initialized
587 14:47:46.714438 VMX status: enabled
588 14:47:46.716140 apic_id: 0x06 done.
589 14:47:46.719856 IA32_FEATURE_CONTROL status: locked
590 14:47:46.721966 VMX status: enabled
591 14:47:46.724104 Skip microcode update
592 14:47:46.727530 IA32_FEATURE_CONTROL status: locked
593 14:47:46.729539 CPU #2 initialized
594 14:47:46.731774 Skip microcode update
595 14:47:46.733557 VMX status: enabled
596 14:47:46.735903 CPU #7 initialized
597 14:47:46.739590 IA32_FEATURE_CONTROL status: locked
598 14:47:46.741446 Skip microcode update
599 14:47:46.743747 CPU #3 initialized
600 14:47:46.747742 bsp_do_flight_plan done after 455 msecs.
601 14:47:46.750922 CPU: frequency set to 4800 MHz
602 14:47:46.752864 Enabling SMIs.
603 14:47:46.753884 Locking SMM.
604 14:47:46.756673 CBFS @ 1d00000 size 300000
605 14:47:46.763649 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
606 14:47:46.765971 CBFS: Locating 'vbt.bin'
607 14:47:46.769706 CBFS: Found @ offset 60a40 size 4a0
608 14:47:46.774620 Found a VBT of 4608 bytes after decompression
609 14:47:46.787668 FMAP: area GBB found @ 1c11000 (978944 bytes)
610 14:47:46.848369 Detected 4 core, 8 thread CPU.
611 14:47:46.851525 Detected 4 core, 8 thread CPU.
612 14:47:47.078558 Display FSP Version Info HOB
613 14:47:47.081403 Reference Code - CPU = 7.0.5e.40
614 14:47:47.084196 uCode Version = 0.0.0.b8
615 14:47:47.087287 Display FSP Version Info HOB
616 14:47:47.090461 Reference Code - ME = 7.0.5e.40
617 14:47:47.092332 MEBx version = 0.0.0.0
618 14:47:47.096244 ME Firmware Version = Consumer SKU
619 14:47:47.099307 Display FSP Version Info HOB
620 14:47:47.102630 Reference Code - CNL PCH = 7.0.5e.40
621 14:47:47.105441 PCH-CRID Status = Disabled
622 14:47:47.109144 CNL PCH H A0 Hsio Version = 2.0.0.0
623 14:47:47.112968 CNL PCH H Ax Hsio Version = 9.0.0.0
624 14:47:47.116650 CNL PCH H Bx Hsio Version = a.0.0.0
625 14:47:47.120212 CNL PCH LP B0 Hsio Version = 7.0.0.0
626 14:47:47.123765 CNL PCH LP Bx Hsio Version = 6.0.0.0
627 14:47:47.127473 CNL PCH LP Dx Hsio Version = 7.0.0.0
628 14:47:47.130542 Display FSP Version Info HOB
629 14:47:47.134825 Reference Code - SA - System Agent = 7.0.5e.40
630 14:47:47.138005 Reference Code - MRC = 0.7.1.68
631 14:47:47.141040 SA - PCIe Version = 7.0.5e.40
632 14:47:47.143963 SA-CRID Status = Disabled
633 14:47:47.147275 SA-CRID Original Value = 0.0.0.c
634 14:47:47.149938 SA-CRID New Value = 0.0.0.c
635 14:47:47.168442 RTC Init
636 14:47:47.172570 Set power off after power failure.
637 14:47:47.173792 Disabling Deep S3
638 14:47:47.176485 Disabling Deep S3
639 14:47:47.178142 Disabling Deep S4
640 14:47:47.179478 Disabling Deep S4
641 14:47:47.181474 Disabling Deep S5
642 14:47:47.183608 Disabling Deep S5
643 14:47:47.190131 BS: BS_DEV_INIT_CHIPS times (us): entry 602626 run 413391 exit 16222
644 14:47:47.192861 Enumerating buses...
645 14:47:47.196824 Show all devs... Before device enumeration.
646 14:47:47.199567 Root Device: enabled 1
647 14:47:47.201768 CPU_CLUSTER: 0: enabled 1
648 14:47:47.204181 DOMAIN: 0000: enabled 1
649 14:47:47.206494 APIC: 00: enabled 1
650 14:47:47.208781 PCI: 00:00.0: enabled 1
651 14:47:47.211112 PCI: 00:02.0: enabled 1
652 14:47:47.213560 PCI: 00:04.0: enabled 1
653 14:47:47.216236 PCI: 00:12.0: enabled 1
654 14:47:47.218360 PCI: 00:12.5: enabled 0
655 14:47:47.220624 PCI: 00:12.6: enabled 0
656 14:47:47.223382 PCI: 00:13.0: enabled 0
657 14:47:47.225444 PCI: 00:14.0: enabled 1
658 14:47:47.228072 PCI: 00:14.1: enabled 0
659 14:47:47.230713 PCI: 00:14.3: enabled 1
660 14:47:47.232828 PCI: 00:14.5: enabled 0
661 14:47:47.235532 PCI: 00:15.0: enabled 1
662 14:47:47.237515 PCI: 00:15.1: enabled 1
663 14:47:47.240322 PCI: 00:15.2: enabled 0
664 14:47:47.242685 PCI: 00:15.3: enabled 0
665 14:47:47.244867 PCI: 00:16.0: enabled 1
666 14:47:47.247867 PCI: 00:16.1: enabled 0
667 14:47:47.250020 PCI: 00:16.2: enabled 0
668 14:47:47.252320 PCI: 00:16.3: enabled 0
669 14:47:47.254948 PCI: 00:16.4: enabled 0
670 14:47:47.257194 PCI: 00:16.5: enabled 0
671 14:47:47.259684 PCI: 00:17.0: enabled 1
672 14:47:47.262459 PCI: 00:19.0: enabled 1
673 14:47:47.264604 PCI: 00:19.1: enabled 0
674 14:47:47.267163 PCI: 00:19.2: enabled 1
675 14:47:47.269438 PCI: 00:1a.0: enabled 0
676 14:47:47.271723 PCI: 00:1c.0: enabled 1
677 14:47:47.274197 PCI: 00:1c.1: enabled 0
678 14:47:47.276754 PCI: 00:1c.2: enabled 0
679 14:47:47.279127 PCI: 00:1c.3: enabled 0
680 14:47:47.281762 PCI: 00:1c.4: enabled 0
681 14:47:47.284117 PCI: 00:1c.5: enabled 0
682 14:47:47.286149 PCI: 00:1c.6: enabled 0
683 14:47:47.289049 PCI: 00:1c.7: enabled 1
684 14:47:47.291247 PCI: 00:1d.0: enabled 1
685 14:47:47.293968 PCI: 00:1d.1: enabled 1
686 14:47:47.296481 PCI: 00:1d.2: enabled 0
687 14:47:47.298411 PCI: 00:1d.3: enabled 0
688 14:47:47.301313 PCI: 00:1d.4: enabled 1
689 14:47:47.303768 PCI: 00:1e.0: enabled 0
690 14:47:47.306118 PCI: 00:1e.1: enabled 0
691 14:47:47.308598 PCI: 00:1e.2: enabled 0
692 14:47:47.311078 PCI: 00:1e.3: enabled 0
693 14:47:47.313157 PCI: 00:1f.0: enabled 1
694 14:47:47.315711 PCI: 00:1f.1: enabled 1
695 14:47:47.318281 PCI: 00:1f.2: enabled 1
696 14:47:47.320288 PCI: 00:1f.3: enabled 1
697 14:47:47.322770 PCI: 00:1f.4: enabled 1
698 14:47:47.325034 PCI: 00:1f.5: enabled 1
699 14:47:47.327565 PCI: 00:1f.6: enabled 1
700 14:47:47.330468 USB0 port 0: enabled 1
701 14:47:47.332253 I2C: 00:10: enabled 1
702 14:47:47.334968 I2C: 00:10: enabled 1
703 14:47:47.336986 I2C: 00:34: enabled 1
704 14:47:47.339311 I2C: 00:2c: enabled 1
705 14:47:47.341143 I2C: 00:50: enabled 1
706 14:47:47.343647 PNP: 0c09.0: enabled 1
707 14:47:47.345751 USB2 port 0: enabled 1
708 14:47:47.348045 USB2 port 1: enabled 1
709 14:47:47.350891 USB2 port 2: enabled 1
710 14:47:47.353043 USB2 port 4: enabled 1
711 14:47:47.355137 USB2 port 5: enabled 1
712 14:47:47.357638 USB2 port 6: enabled 1
713 14:47:47.359923 USB2 port 7: enabled 1
714 14:47:47.362753 USB2 port 8: enabled 1
715 14:47:47.364897 USB2 port 9: enabled 1
716 14:47:47.366682 USB3 port 0: enabled 1
717 14:47:47.369360 USB3 port 1: enabled 1
718 14:47:47.371633 USB3 port 2: enabled 1
719 14:47:47.374055 USB3 port 3: enabled 1
720 14:47:47.376050 USB3 port 4: enabled 1
721 14:47:47.378062 APIC: 03: enabled 1
722 14:47:47.380089 APIC: 07: enabled 1
723 14:47:47.382159 APIC: 01: enabled 1
724 14:47:47.384706 APIC: 02: enabled 1
725 14:47:47.386761 APIC: 05: enabled 1
726 14:47:47.388638 APIC: 04: enabled 1
727 14:47:47.390596 APIC: 06: enabled 1
728 14:47:47.392703 Compare with tree...
729 14:47:47.395070 Root Device: enabled 1
730 14:47:47.397741 CPU_CLUSTER: 0: enabled 1
731 14:47:47.399938 APIC: 00: enabled 1
732 14:47:47.402284 APIC: 03: enabled 1
733 14:47:47.404449 APIC: 07: enabled 1
734 14:47:47.406344 APIC: 01: enabled 1
735 14:47:47.408901 APIC: 02: enabled 1
736 14:47:47.411395 APIC: 05: enabled 1
737 14:47:47.413362 APIC: 04: enabled 1
738 14:47:47.415842 APIC: 06: enabled 1
739 14:47:47.418497 DOMAIN: 0000: enabled 1
740 14:47:47.420945 PCI: 00:00.0: enabled 1
741 14:47:47.423366 PCI: 00:02.0: enabled 1
742 14:47:47.426642 PCI: 00:04.0: enabled 1
743 14:47:47.428445 PCI: 00:12.0: enabled 1
744 14:47:47.431487 PCI: 00:12.5: enabled 0
745 14:47:47.433965 PCI: 00:12.6: enabled 0
746 14:47:47.436428 PCI: 00:13.0: enabled 0
747 14:47:47.439361 PCI: 00:14.0: enabled 1
748 14:47:47.441873 USB0 port 0: enabled 1
749 14:47:47.444588 USB2 port 0: enabled 1
750 14:47:47.447032 USB2 port 1: enabled 1
751 14:47:47.450171 USB2 port 2: enabled 1
752 14:47:47.452920 USB2 port 4: enabled 1
753 14:47:47.455530 USB2 port 5: enabled 1
754 14:47:47.458272 USB2 port 6: enabled 1
755 14:47:47.461310 USB2 port 7: enabled 1
756 14:47:47.463712 USB2 port 8: enabled 1
757 14:47:47.466460 USB2 port 9: enabled 1
758 14:47:47.469003 USB3 port 0: enabled 1
759 14:47:47.472005 USB3 port 1: enabled 1
760 14:47:47.474715 USB3 port 2: enabled 1
761 14:47:47.476917 USB3 port 3: enabled 1
762 14:47:47.480096 USB3 port 4: enabled 1
763 14:47:47.482657 PCI: 00:14.1: enabled 0
764 14:47:47.485200 PCI: 00:14.3: enabled 1
765 14:47:47.487903 PCI: 00:14.5: enabled 0
766 14:47:47.490629 PCI: 00:15.0: enabled 1
767 14:47:47.492678 I2C: 00:10: enabled 1
768 14:47:47.495766 I2C: 00:10: enabled 1
769 14:47:47.498136 I2C: 00:34: enabled 1
770 14:47:47.500444 PCI: 00:15.1: enabled 1
771 14:47:47.503602 I2C: 00:2c: enabled 1
772 14:47:47.505686 PCI: 00:15.2: enabled 0
773 14:47:47.508527 PCI: 00:15.3: enabled 0
774 14:47:47.511110 PCI: 00:16.0: enabled 1
775 14:47:47.513422 PCI: 00:16.1: enabled 0
776 14:47:47.516537 PCI: 00:16.2: enabled 0
777 14:47:47.518485 PCI: 00:16.3: enabled 0
778 14:47:47.521701 PCI: 00:16.4: enabled 0
779 14:47:47.524293 PCI: 00:16.5: enabled 0
780 14:47:47.526594 PCI: 00:17.0: enabled 1
781 14:47:47.529052 PCI: 00:19.0: enabled 1
782 14:47:47.531681 I2C: 00:50: enabled 1
783 14:47:47.534363 PCI: 00:19.1: enabled 0
784 14:47:47.537548 PCI: 00:19.2: enabled 1
785 14:47:47.539511 PCI: 00:1a.0: enabled 0
786 14:47:47.542706 PCI: 00:1c.0: enabled 1
787 14:47:47.544729 PCI: 00:1c.1: enabled 0
788 14:47:47.547428 PCI: 00:1c.2: enabled 0
789 14:47:47.550688 PCI: 00:1c.3: enabled 0
790 14:47:47.552877 PCI: 00:1c.4: enabled 0
791 14:47:47.555432 PCI: 00:1c.5: enabled 0
792 14:47:47.558400 PCI: 00:1c.6: enabled 0
793 14:47:47.560903 PCI: 00:1c.7: enabled 1
794 14:47:47.563375 PCI: 00:1d.0: enabled 1
795 14:47:47.565834 PCI: 00:1d.1: enabled 1
796 14:47:47.568857 PCI: 00:1d.2: enabled 0
797 14:47:47.571463 PCI: 00:1d.3: enabled 0
798 14:47:47.573808 PCI: 00:1d.4: enabled 1
799 14:47:47.576423 PCI: 00:1e.0: enabled 0
800 14:47:47.579148 PCI: 00:1e.1: enabled 0
801 14:47:47.581576 PCI: 00:1e.2: enabled 0
802 14:47:47.584316 PCI: 00:1e.3: enabled 0
803 14:47:47.587020 PCI: 00:1f.0: enabled 1
804 14:47:47.590030 PNP: 0c09.0: enabled 1
805 14:47:47.592369 PCI: 00:1f.1: enabled 1
806 14:47:47.594818 PCI: 00:1f.2: enabled 1
807 14:47:47.597569 PCI: 00:1f.3: enabled 1
808 14:47:47.599810 PCI: 00:1f.4: enabled 1
809 14:47:47.602733 PCI: 00:1f.5: enabled 1
810 14:47:47.605154 PCI: 00:1f.6: enabled 1
811 14:47:47.607667 Root Device scanning...
812 14:47:47.611319 root_dev_scan_bus for Root Device
813 14:47:47.613676 CPU_CLUSTER: 0 enabled
814 14:47:47.616093 DOMAIN: 0000 enabled
815 14:47:47.618671 DOMAIN: 0000 scanning...
816 14:47:47.621571 PCI: pci_scan_bus for bus 00
817 14:47:47.624927 PCI: 00:00.0 [8086/0000] ops
818 14:47:47.627980 PCI: 00:00.0 [8086/3e34] enabled
819 14:47:47.630957 PCI: 00:02.0 [8086/0000] ops
820 14:47:47.634234 PCI: 00:02.0 [8086/3ea0] enabled
821 14:47:47.637704 PCI: 00:04.0 [8086/1903] enabled
822 14:47:47.640755 PCI: 00:08.0 [8086/1911] enabled
823 14:47:47.644347 PCI: 00:12.0 [8086/9df9] enabled
824 14:47:47.647374 PCI: 00:14.0 [8086/0000] bus ops
825 14:47:47.651041 PCI: 00:14.0 [8086/9ded] enabled
826 14:47:47.654120 PCI: 00:14.2 [8086/9def] enabled
827 14:47:47.657596 PCI: 00:14.3 [8086/9df0] enabled
828 14:47:47.660938 PCI: 00:15.0 [8086/0000] bus ops
829 14:47:47.664041 PCI: 00:15.0 [8086/9de8] enabled
830 14:47:47.667571 PCI: 00:15.1 [8086/0000] bus ops
831 14:47:47.670660 PCI: 00:15.1 [8086/9de9] enabled
832 14:47:47.674144 PCI: 00:16.0 [8086/0000] ops
833 14:47:47.677177 PCI: 00:16.0 [8086/9de0] enabled
834 14:47:47.680042 PCI: 00:17.0 [8086/0000] ops
835 14:47:47.683263 PCI: 00:17.0 [8086/9dd3] enabled
836 14:47:47.686813 PCI: 00:19.0 [8086/0000] bus ops
837 14:47:47.689959 PCI: 00:19.0 [8086/9dc5] enabled
838 14:47:47.693148 PCI: 00:19.2 [8086/0000] ops
839 14:47:47.696007 PCI: 00:19.2 [8086/9dc7] enabled
840 14:47:47.699708 PCI: 00:1c.0 [8086/0000] bus ops
841 14:47:47.703020 PCI: 00:1c.0 [8086/9dbf] enabled
842 14:47:47.708312 PCI: Static device PCI: 00:1c.7 not found, disabling it.
843 14:47:47.712157 PCI: 00:1d.0 [8086/0000] bus ops
844 14:47:47.715383 PCI: 00:1d.0 [8086/9db4] enabled
845 14:47:47.720582 PCI: Static device PCI: 00:1d.1 not found, disabling it.
846 14:47:47.726111 PCI: Static device PCI: 00:1d.4 not found, disabling it.
847 14:47:47.729754 PCI: 00:1f.0 [8086/0000] bus ops
848 14:47:47.732744 PCI: 00:1f.0 [8086/9d84] enabled
849 14:47:47.738706 PCI: Static device PCI: 00:1f.1 not found, disabling it.
850 14:47:47.744345 PCI: Static device PCI: 00:1f.2 not found, disabling it.
851 14:47:47.747474 PCI: 00:1f.3 [8086/0000] bus ops
852 14:47:47.750884 PCI: 00:1f.3 [8086/9dc8] enabled
853 14:47:47.754133 PCI: 00:1f.4 [8086/0000] bus ops
854 14:47:47.757350 PCI: 00:1f.4 [8086/9da3] enabled
855 14:47:47.760625 PCI: 00:1f.5 [8086/0000] bus ops
856 14:47:47.764349 PCI: 00:1f.5 [8086/9da4] enabled
857 14:47:47.767439 PCI: 00:1f.6 [8086/15be] enabled
858 14:47:47.770580 PCI: Leftover static devices:
859 14:47:47.771997 PCI: 00:12.5
860 14:47:47.773361 PCI: 00:12.6
861 14:47:47.774925 PCI: 00:13.0
862 14:47:47.775689 PCI: 00:14.1
863 14:47:47.777371 PCI: 00:14.5
864 14:47:47.778723 PCI: 00:15.2
865 14:47:47.780596 PCI: 00:15.3
866 14:47:47.781361 PCI: 00:16.1
867 14:47:47.782910 PCI: 00:16.2
868 14:47:47.784333 PCI: 00:16.3
869 14:47:47.785340 PCI: 00:16.4
870 14:47:47.787182 PCI: 00:16.5
871 14:47:47.788139 PCI: 00:19.1
872 14:47:47.789972 PCI: 00:1a.0
873 14:47:47.790669 PCI: 00:1c.1
874 14:47:47.792537 PCI: 00:1c.2
875 14:47:47.793823 PCI: 00:1c.3
876 14:47:47.795444 PCI: 00:1c.4
877 14:47:47.796521 PCI: 00:1c.5
878 14:47:47.797998 PCI: 00:1c.6
879 14:47:47.799235 PCI: 00:1c.7
880 14:47:47.800350 PCI: 00:1d.1
881 14:47:47.801662 PCI: 00:1d.2
882 14:47:47.803405 PCI: 00:1d.3
883 14:47:47.804505 PCI: 00:1d.4
884 14:47:47.806473 PCI: 00:1e.0
885 14:47:47.807630 PCI: 00:1e.1
886 14:47:47.808387 PCI: 00:1e.2
887 14:47:47.809992 PCI: 00:1e.3
888 14:47:47.811332 PCI: 00:1f.1
889 14:47:47.812804 PCI: 00:1f.2
890 14:47:47.816187 PCI: Check your devicetree.cb.
891 14:47:47.818873 PCI: 00:14.0 scanning...
892 14:47:47.821666 scan_usb_bus for PCI: 00:14.0
893 14:47:47.823945 USB0 port 0 enabled
894 14:47:47.826315 USB0 port 0 scanning...
895 14:47:47.829644 scan_usb_bus for USB0 port 0
896 14:47:47.831333 USB2 port 0 enabled
897 14:47:47.833426 USB2 port 1 enabled
898 14:47:47.835723 USB2 port 2 enabled
899 14:47:47.837490 USB2 port 4 enabled
900 14:47:47.839429 USB2 port 5 enabled
901 14:47:47.841715 USB2 port 6 enabled
902 14:47:47.843835 USB2 port 7 enabled
903 14:47:47.845716 USB2 port 8 enabled
904 14:47:47.847598 USB2 port 9 enabled
905 14:47:47.849634 USB3 port 0 enabled
906 14:47:47.851765 USB3 port 1 enabled
907 14:47:47.853652 USB3 port 2 enabled
908 14:47:47.856101 USB3 port 3 enabled
909 14:47:47.857867 USB3 port 4 enabled
910 14:47:47.860388 USB2 port 0 scanning...
911 14:47:47.863983 scan_usb_bus for USB2 port 0
912 14:47:47.867188 scan_usb_bus for USB2 port 0 done
913 14:47:47.872279 scan_bus: scanning of bus USB2 port 0 took 9058 usecs
914 14:47:47.875148 USB2 port 1 scanning...
915 14:47:47.878017 scan_usb_bus for USB2 port 1
916 14:47:47.881235 scan_usb_bus for USB2 port 1 done
917 14:47:47.887228 scan_bus: scanning of bus USB2 port 1 took 9058 usecs
918 14:47:47.888914 USB2 port 2 scanning...
919 14:47:47.892254 scan_usb_bus for USB2 port 2
920 14:47:47.895754 scan_usb_bus for USB2 port 2 done
921 14:47:47.901494 scan_bus: scanning of bus USB2 port 2 took 9056 usecs
922 14:47:47.903359 USB2 port 4 scanning...
923 14:47:47.906616 scan_usb_bus for USB2 port 4
924 14:47:47.910478 scan_usb_bus for USB2 port 4 done
925 14:47:47.915697 scan_bus: scanning of bus USB2 port 4 took 9058 usecs
926 14:47:47.918189 USB2 port 5 scanning...
927 14:47:47.921348 scan_usb_bus for USB2 port 5
928 14:47:47.924723 scan_usb_bus for USB2 port 5 done
929 14:47:47.929927 scan_bus: scanning of bus USB2 port 5 took 9055 usecs
930 14:47:47.932233 USB2 port 6 scanning...
931 14:47:47.936064 scan_usb_bus for USB2 port 6
932 14:47:47.938632 scan_usb_bus for USB2 port 6 done
933 14:47:47.944352 scan_bus: scanning of bus USB2 port 6 took 9057 usecs
934 14:47:47.946755 USB2 port 7 scanning...
935 14:47:47.950017 scan_usb_bus for USB2 port 7
936 14:47:47.953587 scan_usb_bus for USB2 port 7 done
937 14:47:47.958588 scan_bus: scanning of bus USB2 port 7 took 9057 usecs
938 14:47:47.960913 USB2 port 8 scanning...
939 14:47:47.964596 scan_usb_bus for USB2 port 8
940 14:47:47.967717 scan_usb_bus for USB2 port 8 done
941 14:47:47.973105 scan_bus: scanning of bus USB2 port 8 took 9057 usecs
942 14:47:47.975299 USB2 port 9 scanning...
943 14:47:47.979089 scan_usb_bus for USB2 port 9
944 14:47:47.981986 scan_usb_bus for USB2 port 9 done
945 14:47:47.987752 scan_bus: scanning of bus USB2 port 9 took 9056 usecs
946 14:47:47.990176 USB3 port 0 scanning...
947 14:47:47.993487 scan_usb_bus for USB3 port 0
948 14:47:47.996762 scan_usb_bus for USB3 port 0 done
949 14:47:48.002134 scan_bus: scanning of bus USB3 port 0 took 9056 usecs
950 14:47:48.004722 USB3 port 1 scanning...
951 14:47:48.007867 scan_usb_bus for USB3 port 1
952 14:47:48.011031 scan_usb_bus for USB3 port 1 done
953 14:47:48.016111 scan_bus: scanning of bus USB3 port 1 took 9056 usecs
954 14:47:48.018623 USB3 port 2 scanning...
955 14:47:48.021701 scan_usb_bus for USB3 port 2
956 14:47:48.025397 scan_usb_bus for USB3 port 2 done
957 14:47:48.030942 scan_bus: scanning of bus USB3 port 2 took 9056 usecs
958 14:47:48.033164 USB3 port 3 scanning...
959 14:47:48.036942 scan_usb_bus for USB3 port 3
960 14:47:48.040238 scan_usb_bus for USB3 port 3 done
961 14:47:48.045041 scan_bus: scanning of bus USB3 port 3 took 9057 usecs
962 14:47:48.047897 USB3 port 4 scanning...
963 14:47:48.051002 scan_usb_bus for USB3 port 4
964 14:47:48.054154 scan_usb_bus for USB3 port 4 done
965 14:47:48.059824 scan_bus: scanning of bus USB3 port 4 took 9056 usecs
966 14:47:48.063206 scan_usb_bus for USB0 port 0 done
967 14:47:48.068700 scan_bus: scanning of bus USB0 port 0 took 239197 usecs
968 14:47:48.072063 scan_usb_bus for PCI: 00:14.0 done
969 14:47:48.077529 scan_bus: scanning of bus PCI: 00:14.0 took 256120 usecs
970 14:47:48.080156 PCI: 00:15.0 scanning...
971 14:47:48.083669 scan_generic_bus for PCI: 00:15.0
972 14:47:48.088145 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
973 14:47:48.092130 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
974 14:47:48.096375 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
975 14:47:48.099714 scan_generic_bus for PCI: 00:15.0 done
976 14:47:48.105543 scan_bus: scanning of bus PCI: 00:15.0 took 22373 usecs
977 14:47:48.107879 PCI: 00:15.1 scanning...
978 14:47:48.112246 scan_generic_bus for PCI: 00:15.1
979 14:47:48.116025 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
980 14:47:48.119859 scan_generic_bus for PCI: 00:15.1 done
981 14:47:48.125454 scan_bus: scanning of bus PCI: 00:15.1 took 14207 usecs
982 14:47:48.127713 PCI: 00:19.0 scanning...
983 14:47:48.131443 scan_generic_bus for PCI: 00:19.0
984 14:47:48.135724 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
985 14:47:48.139496 scan_generic_bus for PCI: 00:19.0 done
986 14:47:48.145330 scan_bus: scanning of bus PCI: 00:19.0 took 14206 usecs
987 14:47:48.147759 PCI: 00:1c.0 scanning...
988 14:47:48.151570 do_pci_scan_bridge for PCI: 00:1c.0
989 14:47:48.154556 PCI: pci_scan_bus for bus 01
990 14:47:48.158038 PCI: 01:00.0 [10ec/525a] enabled
991 14:47:48.161098 Capability: type 0x01 @ 0x80
992 14:47:48.163934 Capability: type 0x05 @ 0x90
993 14:47:48.166683 Capability: type 0x10 @ 0xb0
994 14:47:48.169569 Capability: type 0x10 @ 0x40
995 14:47:48.173647 Enabling Common Clock Configuration
996 14:47:48.177455 L1 Sub-State supported from root port 28
997 14:47:48.180260 L1 Sub-State Support = 0xf
998 14:47:48.183566 CommonModeRestoreTime = 0x3c
999 14:47:48.187446 Power On Value = 0x6, Power On Scale = 0x1
1000 14:47:48.189681 ASPM: Enabled L0s and L1
1001 14:47:48.193098 Capability: type 0x01 @ 0x80
1002 14:47:48.195723 Capability: type 0x05 @ 0x90
1003 14:47:48.199004 Capability: type 0x10 @ 0xb0
1004 14:47:48.203942 scan_bus: scanning of bus PCI: 00:1c.0 took 53631 usecs
1005 14:47:48.206825 PCI: 00:1d.0 scanning...
1006 14:47:48.210947 do_pci_scan_bridge for PCI: 00:1d.0
1007 14:47:48.213719 PCI: pci_scan_bus for bus 02
1008 14:47:48.217074 PCI: 02:00.0 [1217/8620] enabled
1009 14:47:48.220498 Capability: type 0x01 @ 0x6c
1010 14:47:48.223341 Capability: type 0x05 @ 0x48
1011 14:47:48.226267 Capability: type 0x10 @ 0x80
1012 14:47:48.228873 Capability: type 0x10 @ 0x40
1013 14:47:48.233318 L1 Sub-State supported from root port 29
1014 14:47:48.235737 L1 Sub-State Support = 0xf
1015 14:47:48.239084 CommonModeRestoreTime = 0x78
1016 14:47:48.243073 Power On Value = 0x16, Power On Scale = 0x0
1017 14:47:48.244739 ASPM: Enabled L1
1018 14:47:48.249389 Capability: type 0x01 @ 0x6c
1019 14:47:48.254089 Capability: type 0x05 @ 0x48
1020 14:47:48.258686 Capability: type 0x10 @ 0x80
1021 14:47:48.266044 scan_bus: scanning of bus PCI: 00:1d.0 took 56015 usecs
1022 14:47:48.268475 PCI: 00:1f.0 scanning...
1023 14:47:48.271867 scan_lpc_bus for PCI: 00:1f.0
1024 14:47:48.273660 PNP: 0c09.0 enabled
1025 14:47:48.276959 scan_lpc_bus for PCI: 00:1f.0 done
1026 14:47:48.282697 scan_bus: scanning of bus PCI: 00:1f.0 took 11392 usecs
1027 14:47:48.284999 PCI: 00:1f.3 scanning...
1028 14:47:48.290722 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
1029 14:47:48.293700 PCI: 00:1f.4 scanning...
1030 14:47:48.297307 scan_generic_bus for PCI: 00:1f.4
1031 14:47:48.300975 scan_generic_bus for PCI: 00:1f.4 done
1032 14:47:48.306764 scan_bus: scanning of bus PCI: 00:1f.4 took 10126 usecs
1033 14:47:48.309538 PCI: 00:1f.5 scanning...
1034 14:47:48.312783 scan_generic_bus for PCI: 00:1f.5
1035 14:47:48.317065 scan_generic_bus for PCI: 00:1f.5 done
1036 14:47:48.322360 scan_bus: scanning of bus PCI: 00:1f.5 took 10126 usecs
1037 14:47:48.328037 scan_bus: scanning of bus DOMAIN: 0000 took 706462 usecs
1038 14:47:48.331703 root_dev_scan_bus for Root Device done
1039 14:47:48.337296 scan_bus: scanning of bus Root Device took 726594 usecs
1040 14:47:48.338463 done
1041 14:47:48.344041 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1042 14:47:48.350326 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1043 14:47:48.357830 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1044 14:47:48.364525 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1045 14:47:48.368826 SPI flash protection: WPSW=1 SRP0=1
1046 14:47:48.375367 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1047 14:47:48.380653 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1048 14:47:48.387176 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148131 exit 42566
1049 14:47:48.390213 found VGA at PCI: 00:02.0
1050 14:47:48.393477 Setting up VGA for PCI: 00:02.0
1051 14:47:48.398197 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1052 14:47:48.402947 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1053 14:47:48.405375 Allocating resources...
1054 14:47:48.407894 Reading resources...
1055 14:47:48.411463 Root Device read_resources bus 0 link: 0
1056 14:47:48.416548 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1057 14:47:48.421843 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1058 14:47:48.426304 DOMAIN: 0000 read_resources bus 0 link: 0
1059 14:47:48.432350 PCI: 00:14.0 read_resources bus 0 link: 0
1060 14:47:48.436594 USB0 port 0 read_resources bus 0 link: 0
1061 14:47:48.445969 USB0 port 0 read_resources bus 0 link: 0 done
1062 14:47:48.450890 PCI: 00:14.0 read_resources bus 0 link: 0 done
1063 14:47:48.456197 PCI: 00:15.0 read_resources bus 1 link: 0
1064 14:47:48.462205 PCI: 00:15.0 read_resources bus 1 link: 0 done
1065 14:47:48.466658 PCI: 00:15.1 read_resources bus 2 link: 0
1066 14:47:48.472259 PCI: 00:15.1 read_resources bus 2 link: 0 done
1067 14:47:48.477264 PCI: 00:19.0 read_resources bus 3 link: 0
1068 14:47:48.482761 PCI: 00:19.0 read_resources bus 3 link: 0 done
1069 14:47:48.487617 PCI: 00:1c.0 read_resources bus 1 link: 0
1070 14:47:48.492578 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1071 14:47:48.497370 PCI: 00:1d.0 read_resources bus 2 link: 0
1072 14:47:48.504497 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1073 14:47:48.508579 PCI: 00:1f.0 read_resources bus 0 link: 0
1074 14:47:48.514173 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1075 14:47:48.521140 DOMAIN: 0000 read_resources bus 0 link: 0 done
1076 14:47:48.525742 Root Device read_resources bus 0 link: 0 done
1077 14:47:48.527922 Done reading resources.
1078 14:47:48.534202 Show resources in subtree (Root Device)...After reading.
1079 14:47:48.537844 Root Device child on link 0 CPU_CLUSTER: 0
1080 14:47:48.542574 CPU_CLUSTER: 0 child on link 0 APIC: 00
1081 14:47:48.543303 APIC: 00
1082 14:47:48.544769 APIC: 03
1083 14:47:48.546015 APIC: 07
1084 14:47:48.547404 APIC: 01
1085 14:47:48.548410 APIC: 02
1086 14:47:48.549921 APIC: 05
1087 14:47:48.551177 APIC: 04
1088 14:47:48.552225 APIC: 06
1089 14:47:48.556606 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1090 14:47:48.566109 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1091 14:47:48.575869 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1092 14:47:48.577349 PCI: 00:00.0
1093 14:47:48.586797 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1094 14:47:48.596247 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1095 14:47:48.605700 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1096 14:47:48.614680 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1097 14:47:48.624351 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1098 14:47:48.633684 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1099 14:47:48.642868 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1100 14:47:48.651489 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1101 14:47:48.660926 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1102 14:47:48.670970 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1103 14:47:48.680717 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1104 14:47:48.690652 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1105 14:47:48.699514 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1106 14:47:48.708296 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1107 14:47:48.710542 PCI: 00:02.0
1108 14:47:48.720188 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1109 14:47:48.730801 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1110 14:47:48.739420 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1111 14:47:48.740892 PCI: 00:04.0
1112 14:47:48.750817 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1113 14:47:48.752188 PCI: 00:08.0
1114 14:47:48.762097 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 14:47:48.763699 PCI: 00:12.0
1116 14:47:48.773925 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1117 14:47:48.777922 PCI: 00:14.0 child on link 0 USB0 port 0
1118 14:47:48.788380 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1119 14:47:48.792496 USB0 port 0 child on link 0 USB2 port 0
1120 14:47:48.794347 USB2 port 0
1121 14:47:48.796064 USB2 port 1
1122 14:47:48.797600 USB2 port 2
1123 14:47:48.799866 USB2 port 4
1124 14:47:48.801467 USB2 port 5
1125 14:47:48.802959 USB2 port 6
1126 14:47:48.804784 USB2 port 7
1127 14:47:48.806550 USB2 port 8
1128 14:47:48.808119 USB2 port 9
1129 14:47:48.810269 USB3 port 0
1130 14:47:48.812058 USB3 port 1
1131 14:47:48.813704 USB3 port 2
1132 14:47:48.815179 USB3 port 3
1133 14:47:48.816785 USB3 port 4
1134 14:47:48.818830 PCI: 00:14.2
1135 14:47:48.828563 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1136 14:47:48.838455 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1137 14:47:48.840008 PCI: 00:14.3
1138 14:47:48.850415 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1139 14:47:48.854453 PCI: 00:15.0 child on link 0 I2C: 01:10
1140 14:47:48.864036 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 14:47:48.865704 I2C: 01:10
1142 14:47:48.867647 I2C: 01:10
1143 14:47:48.868720 I2C: 01:34
1144 14:47:48.872942 PCI: 00:15.1 child on link 0 I2C: 02:2c
1145 14:47:48.882818 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1146 14:47:48.885021 I2C: 02:2c
1147 14:47:48.886276 PCI: 00:16.0
1148 14:47:48.896045 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 14:47:48.897714 PCI: 00:17.0
1150 14:47:48.907488 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1151 14:47:48.916260 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1152 14:47:48.924475 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1153 14:47:48.932762 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1154 14:47:48.940990 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1155 14:47:48.950005 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1156 14:47:48.954074 PCI: 00:19.0 child on link 0 I2C: 03:50
1157 14:47:48.964020 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 14:47:48.974004 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1159 14:47:48.975937 I2C: 03:50
1160 14:47:48.977235 PCI: 00:19.2
1161 14:47:48.988310 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1162 14:47:48.998392 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1163 14:47:49.002860 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1164 14:47:49.011589 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1165 14:47:49.020895 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1166 14:47:49.030262 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1167 14:47:49.031987 PCI: 01:00.0
1168 14:47:49.041268 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1169 14:47:49.045888 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1170 14:47:49.054413 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 14:47:49.064369 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 14:47:49.073677 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 14:47:49.075422 PCI: 02:00.0
1174 14:47:49.084040 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1175 14:47:49.092991 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1176 14:47:49.097867 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1177 14:47:49.106498 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1178 14:47:49.115774 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1179 14:47:49.116903 PNP: 0c09.0
1180 14:47:49.125577 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1181 14:47:49.133724 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1182 14:47:49.142913 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1183 14:47:49.144713 PCI: 00:1f.3
1184 14:47:49.154099 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 14:47:49.164590 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1186 14:47:49.165938 PCI: 00:1f.4
1187 14:47:49.175059 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1188 14:47:49.184558 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1189 14:47:49.186724 PCI: 00:1f.5
1190 14:47:49.195654 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1191 14:47:49.197031 PCI: 00:1f.6
1192 14:47:49.206286 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1193 14:47:49.212822 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1194 14:47:49.218997 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1195 14:47:49.225726 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1196 14:47:49.232189 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1197 14:47:49.239200 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1198 14:47:49.242870 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1199 14:47:49.245898 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1200 14:47:49.249803 PCI: 00:17.0 18 * [0x60 - 0x67] io
1201 14:47:49.252954 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1202 14:47:49.260330 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1203 14:47:49.266953 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1204 14:47:49.274985 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1205 14:47:49.282918 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1206 14:47:49.290093 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1207 14:47:49.293800 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1208 14:47:49.301739 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1209 14:47:49.309391 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1210 14:47:49.318517 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1211 14:47:49.325206 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1212 14:47:49.328422 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1213 14:47:49.332730 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1214 14:47:49.340676 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1215 14:47:49.345072 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1216 14:47:49.350149 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1217 14:47:49.355026 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1218 14:47:49.359548 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1219 14:47:49.364938 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1220 14:47:49.369233 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1221 14:47:49.374337 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1222 14:47:49.378955 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1223 14:47:49.384277 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1224 14:47:49.388817 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1225 14:47:49.393945 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1226 14:47:49.398894 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1227 14:47:49.403607 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1228 14:47:49.408613 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1229 14:47:49.413560 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1230 14:47:49.418238 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1231 14:47:49.422680 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1232 14:47:49.428023 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1233 14:47:49.432673 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1234 14:47:49.437631 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1235 14:47:49.442456 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1236 14:47:49.447219 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1237 14:47:49.452233 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1238 14:47:49.457187 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1239 14:47:49.461985 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1240 14:47:49.470115 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1241 14:47:49.473924 avoid_fixed_resources: DOMAIN: 0000
1242 14:47:49.480064 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 14:47:49.485940 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 14:47:49.493318 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 14:47:49.501202 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1246 14:47:49.508694 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1247 14:47:49.516669 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1248 14:47:49.524041 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1249 14:47:49.531512 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 14:47:49.539067 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 14:47:49.546985 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 14:47:49.554409 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 14:47:49.561552 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 14:47:49.563931 Setting resources...
1255 14:47:49.569842 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 14:47:49.574325 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 14:47:49.577943 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 14:47:49.581825 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 14:47:49.585835 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 14:47:49.592334 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 14:47:49.598405 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 14:47:49.604930 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 14:47:49.610592 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 14:47:49.617026 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 14:47:49.624680 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1266 14:47:49.630115 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 14:47:49.634729 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 14:47:49.639770 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 14:47:49.644617 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1270 14:47:49.649443 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1271 14:47:49.654664 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1272 14:47:49.659028 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1273 14:47:49.664137 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1274 14:47:49.668681 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1275 14:47:49.674237 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1276 14:47:49.678815 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1277 14:47:49.683793 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1278 14:47:49.688037 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1279 14:47:49.693151 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1280 14:47:49.697973 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1281 14:47:49.702960 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1282 14:47:49.707993 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1283 14:47:49.712645 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1284 14:47:49.717955 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1285 14:47:49.722463 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1286 14:47:49.726948 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1287 14:47:49.732521 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1288 14:47:49.737070 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1289 14:47:49.741769 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1290 14:47:49.746764 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1291 14:47:49.754459 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1292 14:47:49.761703 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1293 14:47:49.768901 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1294 14:47:49.776566 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1295 14:47:49.781464 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1296 14:47:49.788815 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1297 14:47:49.796037 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1298 14:47:49.803120 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1299 14:47:49.810525 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1300 14:47:49.815958 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1301 14:47:49.820907 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1302 14:47:49.827723 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1303 14:47:49.832309 Root Device assign_resources, bus 0 link: 0
1304 14:47:49.837182 DOMAIN: 0000 assign_resources, bus 0 link: 0
1305 14:47:49.845311 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1306 14:47:49.854235 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1307 14:47:49.861944 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1308 14:47:49.870125 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1309 14:47:49.878090 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1310 14:47:49.887012 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1311 14:47:49.894946 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1312 14:47:49.899536 PCI: 00:14.0 assign_resources, bus 0 link: 0
1313 14:47:49.903855 PCI: 00:14.0 assign_resources, bus 0 link: 0
1314 14:47:49.912249 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1315 14:47:49.920409 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1316 14:47:49.928394 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1317 14:47:49.936566 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1318 14:47:49.941152 PCI: 00:15.0 assign_resources, bus 1 link: 0
1319 14:47:49.945978 PCI: 00:15.0 assign_resources, bus 1 link: 0
1320 14:47:49.954460 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1321 14:47:49.958987 PCI: 00:15.1 assign_resources, bus 2 link: 0
1322 14:47:49.963729 PCI: 00:15.1 assign_resources, bus 2 link: 0
1323 14:47:49.972092 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1324 14:47:49.980056 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1325 14:47:49.988078 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1326 14:47:49.995615 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1327 14:47:50.003309 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1328 14:47:50.010566 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1329 14:47:50.018512 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1330 14:47:50.026779 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1331 14:47:50.034697 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1332 14:47:50.039262 PCI: 00:19.0 assign_resources, bus 3 link: 0
1333 14:47:50.044127 PCI: 00:19.0 assign_resources, bus 3 link: 0
1334 14:47:50.052177 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1335 14:47:50.060965 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1336 14:47:50.069721 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1337 14:47:50.078381 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1338 14:47:50.083243 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1339 14:47:50.090822 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1340 14:47:50.095452 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1341 14:47:50.104665 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1342 14:47:50.113430 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1343 14:47:50.121472 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1344 14:47:50.126208 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1345 14:47:50.136151 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1346 14:47:50.145289 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1347 14:47:50.151622 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1348 14:47:50.156636 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1349 14:47:50.161657 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1350 14:47:50.166679 LPC: Trying to open IO window from 930 size 8
1351 14:47:50.171037 LPC: Trying to open IO window from 940 size 8
1352 14:47:50.175516 LPC: Trying to open IO window from 950 size 10
1353 14:47:50.183732 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1354 14:47:50.192036 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1355 14:47:50.200160 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1356 14:47:50.207923 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1357 14:47:50.216185 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1358 14:47:50.221012 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 14:47:50.225581 Root Device assign_resources, bus 0 link: 0
1360 14:47:50.227931 Done setting resources.
1361 14:47:50.234812 Show resources in subtree (Root Device)...After assigning values.
1362 14:47:50.239319 Root Device child on link 0 CPU_CLUSTER: 0
1363 14:47:50.243593 CPU_CLUSTER: 0 child on link 0 APIC: 00
1364 14:47:50.244269 APIC: 00
1365 14:47:50.245675 APIC: 03
1366 14:47:50.247268 APIC: 07
1367 14:47:50.248286 APIC: 01
1368 14:47:50.249567 APIC: 02
1369 14:47:50.250782 APIC: 05
1370 14:47:50.252263 APIC: 04
1371 14:47:50.253005 APIC: 06
1372 14:47:50.257822 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 14:47:50.267154 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1374 14:47:50.278286 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1375 14:47:50.280371 PCI: 00:00.0
1376 14:47:50.289660 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 14:47:50.298867 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 14:47:50.308470 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 14:47:50.318075 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 14:47:50.327299 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 14:47:50.336230 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 14:47:50.345875 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 14:47:50.354611 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1384 14:47:50.364251 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1385 14:47:50.373725 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1386 14:47:50.383006 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1387 14:47:50.393378 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1388 14:47:50.402348 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1389 14:47:50.411556 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1390 14:47:50.413177 PCI: 00:02.0
1391 14:47:50.423719 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1392 14:47:50.433942 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1393 14:47:50.443259 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1394 14:47:50.444940 PCI: 00:04.0
1395 14:47:50.455108 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1396 14:47:50.457222 PCI: 00:08.0
1397 14:47:50.467579 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1398 14:47:50.468854 PCI: 00:12.0
1399 14:47:50.479386 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1400 14:47:50.483486 PCI: 00:14.0 child on link 0 USB0 port 0
1401 14:47:50.494356 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1402 14:47:50.498764 USB0 port 0 child on link 0 USB2 port 0
1403 14:47:50.500395 USB2 port 0
1404 14:47:50.501896 USB2 port 1
1405 14:47:50.503952 USB2 port 2
1406 14:47:50.505735 USB2 port 4
1407 14:47:50.507595 USB2 port 5
1408 14:47:50.509062 USB2 port 6
1409 14:47:50.510734 USB2 port 7
1410 14:47:50.512060 USB2 port 8
1411 14:47:50.514372 USB2 port 9
1412 14:47:50.516189 USB3 port 0
1413 14:47:50.517747 USB3 port 1
1414 14:47:50.519376 USB3 port 2
1415 14:47:50.521316 USB3 port 3
1416 14:47:50.522969 USB3 port 4
1417 14:47:50.524790 PCI: 00:14.2
1418 14:47:50.534776 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1419 14:47:50.545370 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1420 14:47:50.546641 PCI: 00:14.3
1421 14:47:50.557267 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1422 14:47:50.561718 PCI: 00:15.0 child on link 0 I2C: 01:10
1423 14:47:50.571623 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1424 14:47:50.573370 I2C: 01:10
1425 14:47:50.574583 I2C: 01:10
1426 14:47:50.576366 I2C: 01:34
1427 14:47:50.580780 PCI: 00:15.1 child on link 0 I2C: 02:2c
1428 14:47:50.591481 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1429 14:47:50.592467 I2C: 02:2c
1430 14:47:50.594167 PCI: 00:16.0
1431 14:47:50.604252 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1432 14:47:50.606313 PCI: 00:17.0
1433 14:47:50.616655 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1434 14:47:50.626431 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1435 14:47:50.635408 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1436 14:47:50.644478 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1437 14:47:50.653779 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1438 14:47:50.664223 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1439 14:47:50.667984 PCI: 00:19.0 child on link 0 I2C: 03:50
1440 14:47:50.678346 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1441 14:47:50.688795 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1442 14:47:50.690137 I2C: 03:50
1443 14:47:50.691750 PCI: 00:19.2
1444 14:47:50.702907 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1445 14:47:50.713364 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1446 14:47:50.717694 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1447 14:47:50.727272 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1448 14:47:50.737505 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1449 14:47:50.747468 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1450 14:47:50.749164 PCI: 01:00.0
1451 14:47:50.759881 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1452 14:47:50.764393 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1453 14:47:50.773336 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1454 14:47:50.783636 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1455 14:47:50.793608 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1456 14:47:50.795801 PCI: 02:00.0
1457 14:47:50.805859 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1458 14:47:50.816463 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1459 14:47:50.820619 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1460 14:47:50.829196 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1461 14:47:50.838174 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1462 14:47:50.839852 PNP: 0c09.0
1463 14:47:50.848151 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1464 14:47:50.857273 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1465 14:47:50.865830 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1466 14:47:50.867335 PCI: 00:1f.3
1467 14:47:50.877258 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1468 14:47:50.888345 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1469 14:47:50.889996 PCI: 00:1f.4
1470 14:47:50.899213 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1471 14:47:50.909252 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1472 14:47:50.910698 PCI: 00:1f.5
1473 14:47:50.921509 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1474 14:47:50.922955 PCI: 00:1f.6
1475 14:47:50.933187 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1476 14:47:50.935819 Done allocating resources.
1477 14:47:50.941834 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548493 exit 14
1478 14:47:50.944560 Enabling resources...
1479 14:47:50.949276 PCI: 00:00.0 subsystem <- 1028/3e34
1480 14:47:50.951812 PCI: 00:00.0 cmd <- 06
1481 14:47:50.955672 PCI: 00:02.0 subsystem <- 1028/3ea0
1482 14:47:50.957934 PCI: 00:02.0 cmd <- 03
1483 14:47:50.961580 PCI: 00:04.0 subsystem <- 1028/1903
1484 14:47:50.963763 PCI: 00:04.0 cmd <- 02
1485 14:47:50.966830 PCI: 00:08.0 cmd <- 06
1486 14:47:50.970341 PCI: 00:12.0 subsystem <- 1028/9df9
1487 14:47:50.972834 PCI: 00:12.0 cmd <- 02
1488 14:47:50.976449 PCI: 00:14.0 subsystem <- 1028/9ded
1489 14:47:50.979143 PCI: 00:14.0 cmd <- 02
1490 14:47:50.981845 PCI: 00:14.2 cmd <- 02
1491 14:47:50.985458 PCI: 00:14.3 subsystem <- 1028/9df0
1492 14:47:50.987898 PCI: 00:14.3 cmd <- 02
1493 14:47:50.991673 PCI: 00:15.0 subsystem <- 1028/9de8
1494 14:47:50.994391 PCI: 00:15.0 cmd <- 02
1495 14:47:50.997837 PCI: 00:15.1 subsystem <- 1028/9de9
1496 14:47:51.000521 PCI: 00:15.1 cmd <- 02
1497 14:47:51.004296 PCI: 00:16.0 subsystem <- 1028/9de0
1498 14:47:51.006381 PCI: 00:16.0 cmd <- 02
1499 14:47:51.010588 PCI: 00:17.0 subsystem <- 1028/9dd3
1500 14:47:51.013111 PCI: 00:17.0 cmd <- 03
1501 14:47:51.017052 PCI: 00:19.0 subsystem <- 1028/9dc5
1502 14:47:51.018861 PCI: 00:19.0 cmd <- 06
1503 14:47:51.023297 PCI: 00:19.2 subsystem <- 1028/9dc7
1504 14:47:51.025562 PCI: 00:19.2 cmd <- 06
1505 14:47:51.029055 PCI: 00:1c.0 bridge ctrl <- 0003
1506 14:47:51.032881 PCI: 00:1c.0 subsystem <- 1028/9dbf
1507 14:47:51.035749 Capability: type 0x10 @ 0x40
1508 14:47:51.038366 Capability: type 0x05 @ 0x80
1509 14:47:51.041602 Capability: type 0x0d @ 0x90
1510 14:47:51.043632 PCI: 00:1c.0 cmd <- 06
1511 14:47:51.047519 PCI: 00:1d.0 bridge ctrl <- 0003
1512 14:47:51.051189 PCI: 00:1d.0 subsystem <- 1028/9db4
1513 14:47:51.053738 Capability: type 0x10 @ 0x40
1514 14:47:51.056491 Capability: type 0x05 @ 0x80
1515 14:47:51.059697 Capability: type 0x0d @ 0x90
1516 14:47:51.062245 PCI: 00:1d.0 cmd <- 06
1517 14:47:51.066084 PCI: 00:1f.0 subsystem <- 1028/9d84
1518 14:47:51.068658 PCI: 00:1f.0 cmd <- 407
1519 14:47:51.072442 PCI: 00:1f.3 subsystem <- 1028/9dc8
1520 14:47:51.074644 PCI: 00:1f.3 cmd <- 02
1521 14:47:51.079005 PCI: 00:1f.4 subsystem <- 1028/9da3
1522 14:47:51.080933 PCI: 00:1f.4 cmd <- 03
1523 14:47:51.084609 PCI: 00:1f.5 subsystem <- 1028/9da4
1524 14:47:51.087580 PCI: 00:1f.5 cmd <- 406
1525 14:47:51.090938 PCI: 00:1f.6 subsystem <- 1028/15be
1526 14:47:51.093457 PCI: 00:1f.6 cmd <- 02
1527 14:47:51.104559 PCI: 01:00.0 cmd <- 02
1528 14:47:51.108453 PCI: 02:00.0 cmd <- 06
1529 14:47:51.112989 done.
1530 14:47:51.118659 BS: BS_DEV_ENABLE times (us): entry 404 run 170536 exit 0
1531 14:47:51.121304 Initializing devices...
1532 14:47:51.123206 Root Device init ...
1533 14:47:51.127284 Root Device init finished in 2139 usecs
1534 14:47:51.129926 CPU_CLUSTER: 0 init ...
1535 14:47:51.133948 CPU_CLUSTER: 0 init finished in 2430 usecs
1536 14:47:51.140555 PCI: 00:00.0 init ...
1537 14:47:51.143709 CPU TDP: 15 Watts
1538 14:47:51.145226 CPU PL2 = 51 Watts
1539 14:47:51.149889 PCI: 00:00.0 init finished in 7037 usecs
1540 14:47:51.152458 PCI: 00:02.0 init ...
1541 14:47:51.156508 PCI: 00:02.0 init finished in 2238 usecs
1542 14:47:51.158870 PCI: 00:04.0 init ...
1543 14:47:51.163080 PCI: 00:04.0 init finished in 2237 usecs
1544 14:47:51.165468 PCI: 00:08.0 init ...
1545 14:47:51.169928 PCI: 00:08.0 init finished in 2236 usecs
1546 14:47:51.172043 PCI: 00:12.0 init ...
1547 14:47:51.176129 PCI: 00:12.0 init finished in 2228 usecs
1548 14:47:51.179065 PCI: 00:14.0 init ...
1549 14:47:51.183460 PCI: 00:14.0 init finished in 2237 usecs
1550 14:47:51.185648 PCI: 00:14.2 init ...
1551 14:47:51.190005 PCI: 00:14.2 init finished in 2237 usecs
1552 14:47:51.192379 PCI: 00:14.3 init ...
1553 14:47:51.196586 PCI: 00:14.3 init finished in 2241 usecs
1554 14:47:51.199144 PCI: 00:15.0 init ...
1555 14:47:51.203103 DW I2C bus 0 at 0xd1347000 (400 KHz)
1556 14:47:51.206720 PCI: 00:15.0 init finished in 5935 usecs
1557 14:47:51.209731 PCI: 00:15.1 init ...
1558 14:47:51.213092 DW I2C bus 1 at 0xd1348000 (400 KHz)
1559 14:47:51.217500 PCI: 00:15.1 init finished in 5935 usecs
1560 14:47:51.220012 PCI: 00:16.0 init ...
1561 14:47:51.223864 PCI: 00:16.0 init finished in 2236 usecs
1562 14:47:51.227063 PCI: 00:19.0 init ...
1563 14:47:51.231163 DW I2C bus 4 at 0xd134a000 (400 KHz)
1564 14:47:51.235242 PCI: 00:19.0 init finished in 5937 usecs
1565 14:47:51.238080 PCI: 00:1c.0 init ...
1566 14:47:51.240673 Initializing PCH PCIe bridge.
1567 14:47:51.245466 PCI: 00:1c.0 init finished in 5251 usecs
1568 14:47:51.247741 PCI: 00:1d.0 init ...
1569 14:47:51.250836 Initializing PCH PCIe bridge.
1570 14:47:51.254896 PCI: 00:1d.0 init finished in 5251 usecs
1571 14:47:51.257557 PCI: 00:1f.0 init ...
1572 14:47:51.261757 IOAPIC: Initializing IOAPIC at 0xfec00000
1573 14:47:51.266298 IOAPIC: Bootstrap Processor Local APIC = 0x00
1574 14:47:51.267788 IOAPIC: ID = 0x02
1575 14:47:51.270786 IOAPIC: Dumping registers
1576 14:47:51.273446 reg 0x0000: 0x02000000
1577 14:47:51.275999 reg 0x0001: 0x00770020
1578 14:47:51.278474 reg 0x0002: 0x00000000
1579 14:47:51.284660 PCI: 00:1f.0 init finished in 25028 usecs
1580 14:47:51.286987 PCI: 00:1f.3 init ...
1581 14:47:51.292285 HDA: codec_mask = 05
1582 14:47:51.295328 HDA: Initializing codec #2
1583 14:47:51.297701 HDA: codec viddid: 8086280b
1584 14:47:51.300731 HDA: No verb table entry found
1585 14:47:51.303455 HDA: Initializing codec #0
1586 14:47:51.306682 HDA: codec viddid: 10ec0236
1587 14:47:51.313363 HDA: verb loaded.
1588 14:47:51.317913 PCI: 00:1f.3 init finished in 28832 usecs
1589 14:47:51.320323 PCI: 00:1f.4 init ...
1590 14:47:51.324466 PCI: 00:1f.4 init finished in 2247 usecs
1591 14:47:51.327484 PCI: 00:1f.6 init ...
1592 14:47:51.331525 PCI: 00:1f.6 init finished in 2236 usecs
1593 14:47:51.342590 PCI: 01:00.0 init ...
1594 14:47:51.346202 PCI: 01:00.0 init finished in 2237 usecs
1595 14:47:51.349276 PCI: 02:00.0 init ...
1596 14:47:51.353129 PCI: 02:00.0 init finished in 2237 usecs
1597 14:47:51.356327 PNP: 0c09.0 init ...
1598 14:47:51.360069 EC Label : 00.00.20
1599 14:47:51.363628 EC Revision : 9ca674bba
1600 14:47:51.367006 EC Model Num : 08B9
1601 14:47:51.370785 EC Build Date : 05/10/19
1602 14:47:51.380098 PNP: 0c09.0 init finished in 21764 usecs
1603 14:47:51.382068 Devices initialized
1604 14:47:51.384742 Show all devs... After init.
1605 14:47:51.387360 Root Device: enabled 1
1606 14:47:51.389577 CPU_CLUSTER: 0: enabled 1
1607 14:47:51.392576 DOMAIN: 0000: enabled 1
1608 14:47:51.394898 APIC: 00: enabled 1
1609 14:47:51.396561 PCI: 00:00.0: enabled 1
1610 14:47:51.399334 PCI: 00:02.0: enabled 1
1611 14:47:51.401412 PCI: 00:04.0: enabled 1
1612 14:47:51.404298 PCI: 00:12.0: enabled 1
1613 14:47:51.406748 PCI: 00:12.5: enabled 0
1614 14:47:51.408829 PCI: 00:12.6: enabled 0
1615 14:47:51.411259 PCI: 00:13.0: enabled 0
1616 14:47:51.413879 PCI: 00:14.0: enabled 1
1617 14:47:51.416023 PCI: 00:14.1: enabled 0
1618 14:47:51.418839 PCI: 00:14.3: enabled 1
1619 14:47:51.421069 PCI: 00:14.5: enabled 0
1620 14:47:51.423291 PCI: 00:15.0: enabled 1
1621 14:47:51.425551 PCI: 00:15.1: enabled 1
1622 14:47:51.428606 PCI: 00:15.2: enabled 0
1623 14:47:51.430986 PCI: 00:15.3: enabled 0
1624 14:47:51.432975 PCI: 00:16.0: enabled 1
1625 14:47:51.435839 PCI: 00:16.1: enabled 0
1626 14:47:51.438210 PCI: 00:16.2: enabled 0
1627 14:47:51.440566 PCI: 00:16.3: enabled 0
1628 14:47:51.442823 PCI: 00:16.4: enabled 0
1629 14:47:51.445366 PCI: 00:16.5: enabled 0
1630 14:47:51.447905 PCI: 00:17.0: enabled 1
1631 14:47:51.450460 PCI: 00:19.0: enabled 1
1632 14:47:51.452561 PCI: 00:19.1: enabled 0
1633 14:47:51.455466 PCI: 00:19.2: enabled 1
1634 14:47:51.457895 PCI: 00:1a.0: enabled 0
1635 14:47:51.459975 PCI: 00:1c.0: enabled 1
1636 14:47:51.462703 PCI: 00:1c.1: enabled 0
1637 14:47:51.464990 PCI: 00:1c.2: enabled 0
1638 14:47:51.467393 PCI: 00:1c.3: enabled 0
1639 14:47:51.469758 PCI: 00:1c.4: enabled 0
1640 14:47:51.472447 PCI: 00:1c.5: enabled 0
1641 14:47:51.474781 PCI: 00:1c.6: enabled 0
1642 14:47:51.477153 PCI: 00:1c.7: enabled 0
1643 14:47:51.479281 PCI: 00:1d.0: enabled 1
1644 14:47:51.481933 PCI: 00:1d.1: enabled 0
1645 14:47:51.484178 PCI: 00:1d.2: enabled 0
1646 14:47:51.486858 PCI: 00:1d.3: enabled 0
1647 14:47:51.489262 PCI: 00:1d.4: enabled 0
1648 14:47:51.491551 PCI: 00:1e.0: enabled 0
1649 14:47:51.494222 PCI: 00:1e.1: enabled 0
1650 14:47:51.496606 PCI: 00:1e.2: enabled 0
1651 14:47:51.499300 PCI: 00:1e.3: enabled 0
1652 14:47:51.501492 PCI: 00:1f.0: enabled 1
1653 14:47:51.503805 PCI: 00:1f.1: enabled 0
1654 14:47:51.506374 PCI: 00:1f.2: enabled 0
1655 14:47:51.508741 PCI: 00:1f.3: enabled 1
1656 14:47:51.511297 PCI: 00:1f.4: enabled 1
1657 14:47:51.513233 PCI: 00:1f.5: enabled 1
1658 14:47:51.515671 PCI: 00:1f.6: enabled 1
1659 14:47:51.518121 USB0 port 0: enabled 1
1660 14:47:51.520738 I2C: 01:10: enabled 1
1661 14:47:51.523118 I2C: 01:10: enabled 1
1662 14:47:51.524745 I2C: 01:34: enabled 1
1663 14:47:51.527264 I2C: 02:2c: enabled 1
1664 14:47:51.529626 I2C: 03:50: enabled 1
1665 14:47:51.531817 PNP: 0c09.0: enabled 1
1666 14:47:51.534447 USB2 port 0: enabled 1
1667 14:47:51.536468 USB2 port 1: enabled 1
1668 14:47:51.538604 USB2 port 2: enabled 1
1669 14:47:51.541397 USB2 port 4: enabled 1
1670 14:47:51.543291 USB2 port 5: enabled 1
1671 14:47:51.545508 USB2 port 6: enabled 1
1672 14:47:51.548412 USB2 port 7: enabled 1
1673 14:47:51.550293 USB2 port 8: enabled 1
1674 14:47:51.552971 USB2 port 9: enabled 1
1675 14:47:51.554917 USB3 port 0: enabled 1
1676 14:47:51.557893 USB3 port 1: enabled 1
1677 14:47:51.560005 USB3 port 2: enabled 1
1678 14:47:51.562249 USB3 port 3: enabled 1
1679 14:47:51.564734 USB3 port 4: enabled 1
1680 14:47:51.566955 APIC: 03: enabled 1
1681 14:47:51.568619 APIC: 07: enabled 1
1682 14:47:51.570800 APIC: 01: enabled 1
1683 14:47:51.572724 APIC: 02: enabled 1
1684 14:47:51.574824 APIC: 05: enabled 1
1685 14:47:51.576373 APIC: 04: enabled 1
1686 14:47:51.578757 APIC: 06: enabled 1
1687 14:47:51.580975 PCI: 00:08.0: enabled 1
1688 14:47:51.583636 PCI: 00:14.2: enabled 1
1689 14:47:51.586423 PCI: 01:00.0: enabled 1
1690 14:47:51.588698 PCI: 02:00.0: enabled 1
1691 14:47:51.593307 Disabling ACPI via APMC:
1692 14:47:51.595534 done.
1693 14:47:51.600381 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1694 14:47:51.603786 ELOG: NV offset 0x1bf0000 size 0x4000
1695 14:47:51.611783 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1696 14:47:51.618756 ELOG: Event(17) added with size 13 at 2022-09-30 14:38:24 UTC
1697 14:47:51.623741 POST: Unexpected post code in previous boot: 0x73
1698 14:47:51.629742 ELOG: Event(A3) added with size 11 at 2022-09-30 14:38:24 UTC
1699 14:47:51.636172 ELOG: Event(A6) added with size 13 at 2022-09-30 14:38:24 UTC
1700 14:47:51.642532 ELOG: Event(92) added with size 9 at 2022-09-30 14:38:24 UTC
1701 14:47:51.648716 ELOG: Event(93) added with size 9 at 2022-09-30 14:38:24 UTC
1702 14:47:51.655020 ELOG: Event(9A) added with size 9 at 2022-09-30 14:38:24 UTC
1703 14:47:51.661276 ELOG: Event(9E) added with size 10 at 2022-09-30 14:38:24 UTC
1704 14:47:51.667255 ELOG: Event(9F) added with size 14 at 2022-09-30 14:38:24 UTC
1705 14:47:51.673424 BS: BS_DEV_INIT times (us): entry 0 run 469887 exit 78864
1706 14:47:51.679951 ELOG: Event(A1) added with size 10 at 2022-09-30 14:38:24 UTC
1707 14:47:51.687746 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1708 14:47:51.693916 ELOG: Event(A0) added with size 9 at 2022-09-30 14:38:24 UTC
1709 14:47:51.698615 elog_add_boot_reason: Logged dev mode boot
1710 14:47:51.700495 Finalize devices...
1711 14:47:51.702345 PCI: 00:17.0 final
1712 14:47:51.704305 Devices finalized
1713 14:47:51.709382 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1714 14:47:51.715386 BS: BS_POST_DEVICE times (us): entry 24783 run 5939 exit 5362
1715 14:47:51.721172 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1716 14:47:51.729618 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1717 14:47:51.734428 disable_unused_touchscreen: Disable ACPI0C50
1718 14:47:51.738636 disable_unused_touchscreen: Enable ELAN900C
1719 14:47:51.741709 CBFS @ 1d00000 size 300000
1720 14:47:51.747792 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1721 14:47:51.751103 CBFS: Locating 'fallback/dsdt.aml'
1722 14:47:51.755147 CBFS: Found @ offset 10b200 size 4448
1723 14:47:51.758366 CBFS @ 1d00000 size 300000
1724 14:47:51.764376 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1725 14:47:51.767583 CBFS: Locating 'fallback/slic'
1726 14:47:51.772984 CBFS: 'fallback/slic' not found.
1727 14:47:51.776601 ACPI: Writing ACPI tables at 89c0f000.
1728 14:47:51.778481 ACPI: * FACS
1729 14:47:51.779896 ACPI: * DSDT
1730 14:47:51.783915 Ramoops buffer: 0x100000@0x89b0e000.
1731 14:47:51.788296 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1732 14:47:51.793450 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1733 14:47:51.797089 ACPI: * FADT
1734 14:47:51.797923 SCI is IRQ9
1735 14:47:51.802152 ACPI: added table 1/32, length now 40
1736 14:47:51.803721 ACPI: * SSDT
1737 14:47:51.807022 Found 1 CPU(s) with 8 core(s) each.
1738 14:47:51.811678 Error: Could not locate 'wifi_sar' in VPD.
1739 14:47:51.815638 Error: failed from getting SAR limits!
1740 14:47:51.819151 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1741 14:47:51.823939 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1742 14:47:51.827517 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1743 14:47:51.831781 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1744 14:47:51.836620 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1745 14:47:51.842255 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1746 14:47:51.847100 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1747 14:47:51.851438 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1748 14:47:51.857116 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1749 14:47:51.863389 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1750 14:47:51.868962 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1751 14:47:51.874905 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1752 14:47:51.880005 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1753 14:47:51.884249 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1754 14:47:51.888702 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1755 14:47:51.894098 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1756 14:47:51.898738 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1757 14:47:51.904435 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1758 14:47:51.910862 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1759 14:47:51.916174 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1760 14:47:51.922720 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1761 14:47:51.927159 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1762 14:47:51.931013 ACPI: added table 2/32, length now 44
1763 14:47:51.932499 ACPI: * MCFG
1764 14:47:51.936243 ACPI: added table 3/32, length now 48
1765 14:47:51.937861 ACPI: * TPM2
1766 14:47:51.941190 TPM2 log created at 89afe000
1767 14:47:51.944422 ACPI: added table 4/32, length now 52
1768 14:47:51.946335 ACPI: * MADT
1769 14:47:51.947401 SCI is IRQ9
1770 14:47:51.951673 ACPI: added table 5/32, length now 56
1771 14:47:51.953392 current = 89c14bd0
1772 14:47:51.955490 ACPI: * IGD OpRegion
1773 14:47:51.958212 GMA: Found VBT in CBFS
1774 14:47:51.961388 GMA: Found valid VBT in CBFS
1775 14:47:51.964801 ACPI: added table 6/32, length now 60
1776 14:47:51.966611 ACPI: * HPET
1777 14:47:51.970272 ACPI: added table 7/32, length now 64
1778 14:47:51.971793 ACPI: done.
1779 14:47:51.974102 ACPI tables: 31872 bytes.
1780 14:47:51.977557 smbios_write_tables: 89afd000
1781 14:47:51.979626 recv_ec_data: 0x01
1782 14:47:51.981612 Create SMBIOS type 17
1783 14:47:51.984482 PCI: 00:14.3 (Intel WiFi)
1784 14:47:51.987007 SMBIOS tables: 708 bytes.
1785 14:47:51.991152 Writing table forward entry at 0x00000500
1786 14:47:51.996926 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1787 14:47:52.000800 Writing coreboot table at 0x89c33000
1788 14:47:52.007084 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1789 14:47:52.011342 1. 0000000000001000-000000000009ffff: RAM
1790 14:47:52.015963 2. 00000000000a0000-00000000000fffff: RESERVED
1791 14:47:52.020037 3. 0000000000100000-0000000089afcfff: RAM
1792 14:47:52.025923 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1793 14:47:52.030989 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1794 14:47:52.036775 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1795 14:47:52.041301 7. 000000008a000000-000000008f7fffff: RESERVED
1796 14:47:52.045956 8. 00000000e0000000-00000000efffffff: RESERVED
1797 14:47:52.051342 9. 00000000fc000000-00000000fc000fff: RESERVED
1798 14:47:52.055925 10. 00000000fe000000-00000000fe00ffff: RESERVED
1799 14:47:52.060420 11. 00000000fed10000-00000000fed17fff: RESERVED
1800 14:47:52.065095 12. 00000000fed80000-00000000fed83fff: RESERVED
1801 14:47:52.070161 13. 00000000feda0000-00000000feda1fff: RESERVED
1802 14:47:52.074330 14. 0000000100000000-000000026e7fffff: RAM
1803 14:47:52.078831 Graphics framebuffer located at 0xc0000000
1804 14:47:52.081351 Passing 6 GPIOs to payload:
1805 14:47:52.086663 NAME | PORT | POLARITY | VALUE
1806 14:47:52.091838 write protect | 0x000000dc | high | high
1807 14:47:52.097369 recovery | 0x000000d5 | low | high
1808 14:47:52.102687 lid | undefined | high | high
1809 14:47:52.107828 power | undefined | high | low
1810 14:47:52.112685 oprom | undefined | high | low
1811 14:47:52.118303 EC in RW | undefined | high | low
1812 14:47:52.120605 recv_ec_data: 0x01
1813 14:47:52.121570 SKU ID: 3
1814 14:47:52.124198 CBFS @ 1d00000 size 300000
1815 14:47:52.130373 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1816 14:47:52.136946 Wrote coreboot table at: 89c33000, 0x58c bytes, checksum a91f
1817 14:47:52.139911 coreboot table: 1444 bytes.
1818 14:47:52.142598 IMD ROOT 0. 89fff000 00001000
1819 14:47:52.145874 IMD SMALL 1. 89ffe000 00001000
1820 14:47:52.149602 FSP MEMORY 2. 89d0e000 002f0000
1821 14:47:52.152741 CONSOLE 3. 89cee000 00020000
1822 14:47:52.156424 TIME STAMP 4. 89ced000 00000910
1823 14:47:52.159343 VBOOT WORK 5. 89cea000 00003000
1824 14:47:52.162996 VBOOT 6. 89ce9000 00000c0c
1825 14:47:52.166092 MRC DATA 7. 89ce7000 000018f0
1826 14:47:52.169592 ROMSTG STCK 8. 89ce6000 00000400
1827 14:47:52.173447 AFTER CAR 9. 89cdc000 0000a000
1828 14:47:52.175957 RAMSTAGE 10. 89c80000 0005c000
1829 14:47:52.179527 REFCODE 11. 89c4b000 00035000
1830 14:47:52.182617 SMM BACKUP 12. 89c3b000 00010000
1831 14:47:52.185830 COREBOOT 13. 89c33000 00008000
1832 14:47:52.189214 ACPI 14. 89c0f000 00024000
1833 14:47:52.192298 ACPI GNVS 15. 89c0e000 00001000
1834 14:47:52.196139 RAMOOPS 16. 89b0e000 00100000
1835 14:47:52.199494 TPM2 TCGLOG17. 89afe000 00010000
1836 14:47:52.202269 SMBIOS 18. 89afd000 00000800
1837 14:47:52.204359 IMD small region:
1838 14:47:52.207670 IMD ROOT 0. 89ffec00 00000400
1839 14:47:52.211346 FSP RUNTIME 1. 89ffebe0 00000004
1840 14:47:52.215030 POWER STATE 2. 89ffeba0 00000040
1841 14:47:52.218710 ROMSTAGE 3. 89ffeb80 00000004
1842 14:47:52.221821 MEM INFO 4. 89ffe9c0 000001a9
1843 14:47:52.225200 COREBOOTFWD 5. 89ffe980 00000028
1844 14:47:52.228531 MTRR: Physical address space:
1845 14:47:52.234658 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 14:47:52.240913 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 14:47:52.247212 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1848 14:47:52.253539 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1849 14:47:52.259228 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 14:47:52.265637 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 14:47:52.272064 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1852 14:47:52.276425 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 14:47:52.280348 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 14:47:52.284576 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 14:47:52.288418 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 14:47:52.292601 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 14:47:52.296763 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 14:47:52.300688 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 14:47:52.304466 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 14:47:52.308950 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 14:47:52.313053 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 14:47:52.316941 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 14:47:52.320181 call enable_fixed_mtrr()
1864 14:47:52.323877 CPU physical address size: 39 bits
1865 14:47:52.328169 MTRR: default type WB/UC MTRR counts: 7/7.
1866 14:47:52.331649 MTRR: UC selected as default type.
1867 14:47:52.338029 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1868 14:47:52.344355 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1869 14:47:52.350575 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1870 14:47:52.356826 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1871 14:47:52.362796 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1872 14:47:52.369401 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1873 14:47:52.375074 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1874 14:47:52.376190
1875 14:47:52.377520 MTRR check
1876 14:47:52.380426 Fixed MTRRs : Enabled
1877 14:47:52.382232 Variable MTRRs: Enabled
1878 14:47:52.382521
1879 14:47:52.386589 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 14:47:52.390930 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 14:47:52.395039 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 14:47:52.399005 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 14:47:52.403125 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 14:47:52.406920 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 14:47:52.411404 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 14:47:52.415323 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 14:47:52.419526 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 14:47:52.423628 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 14:47:52.427431 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 14:47:52.434228 BS: BS_WRITE_TABLES times (us): entry 17204 run 486956 exit 157253
1891 14:47:52.436847 call enable_fixed_mtrr()
1892 14:47:52.439669 CBFS @ 1d00000 size 300000
1893 14:47:52.443084 CPU physical address size: 39 bits
1894 14:47:52.450264 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1895 14:47:52.453772 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 14:47:52.457884 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 14:47:52.462144 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 14:47:52.466237 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 14:47:52.470314 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 14:47:52.474598 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 14:47:52.478264 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 14:47:52.482675 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 14:47:52.486994 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 14:47:52.491101 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 14:47:52.494536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 14:47:52.499074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 14:47:52.503444 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 14:47:52.507258 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 14:47:52.511201 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 14:47:52.515458 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 14:47:52.519719 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 14:47:52.523585 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 14:47:52.528036 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 14:47:52.532005 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 14:47:52.536039 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 14:47:52.539959 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 14:47:52.542889 call enable_fixed_mtrr()
1918 14:47:52.545513 call enable_fixed_mtrr()
1919 14:47:52.548985 CPU physical address size: 39 bits
1920 14:47:52.553329 CPU physical address size: 39 bits
1921 14:47:52.557090 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 14:47:52.561198 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 14:47:52.564738 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 14:47:52.568991 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 14:47:52.573291 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 14:47:52.577461 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 14:47:52.581527 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 14:47:52.585175 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 14:47:52.589635 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 14:47:52.593614 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 14:47:52.597698 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 14:47:52.601722 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 14:47:52.606381 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 14:47:52.608536 call enable_fixed_mtrr()
1935 14:47:52.612728 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 14:47:52.616845 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 14:47:52.620881 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 14:47:52.625140 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 14:47:52.629276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 14:47:52.633359 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 14:47:52.637397 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 14:47:52.641353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 14:47:52.645443 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 14:47:52.649465 CPU physical address size: 39 bits
1945 14:47:52.652127 call enable_fixed_mtrr()
1946 14:47:52.656112 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 14:47:52.660180 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 14:47:52.664419 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 14:47:52.668756 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 14:47:52.672242 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 14:47:52.676521 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 14:47:52.680667 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 14:47:52.684636 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 14:47:52.688776 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 14:47:52.693277 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 14:47:52.697384 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 14:47:52.701297 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 14:47:52.705874 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 14:47:52.708049 call enable_fixed_mtrr()
1960 14:47:52.712528 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 14:47:52.716401 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 14:47:52.720496 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 14:47:52.724343 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 14:47:52.728521 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 14:47:52.733139 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 14:47:52.736781 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 14:47:52.741130 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 14:47:52.745193 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 14:47:52.748550 CPU physical address size: 39 bits
1970 14:47:52.751918 call enable_fixed_mtrr()
1971 14:47:52.755054 CBFS: Locating 'fallback/payload'
1972 14:47:52.758753 CPU physical address size: 39 bits
1973 14:47:52.761797 CPU physical address size: 39 bits
1974 14:47:52.766050 CBFS: Found @ offset 1cf4c0 size 3a954
1975 14:47:52.770168 Checking segment from ROM address 0xffecf4f8
1976 14:47:52.774993 Checking segment from ROM address 0xffecf514
1977 14:47:52.779194 Loading segment from ROM address 0xffecf4f8
1978 14:47:52.781607 code (compression=0)
1979 14:47:52.790352 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1980 14:47:52.798814 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1981 14:47:52.800884 it's not compressed!
1982 14:47:52.882580 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1983 14:47:52.889457 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1984 14:47:52.897094 Loading segment from ROM address 0xffecf514
1985 14:47:52.900284 Entry Point 0x30100018
1986 14:47:52.902048 Loaded segments
1987 14:47:52.911169 Finalizing chipset.
1988 14:47:52.913417 Finalizing SMM.
1989 14:47:52.919611 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467146 exit 11507
1990 14:47:52.922532 mp_park_aps done after 0 msecs.
1991 14:47:52.926779 Jumping to boot code at 30100018(89c33000)
1992 14:47:52.935234 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1993 14:47:52.935921
1994 14:47:52.939563 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
1995 14:47:52.939687 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1996 14:47:52.939782 Setting prompt string to ['sarien:']
1997 14:47:52.939869 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1998 14:47:52.940032 Starting depthcharge on sarien...
1999 14:47:52.946840 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2000 14:47:52.954761 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2001 14:47:52.962022 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2002 14:47:52.964028 BIOS MMAP details:
2003 14:47:52.966839 IFD Base Offset : 0x1000000
2004 14:47:52.969811 IFD End Offset : 0x2000000
2005 14:47:52.973076 MMAP Size : 0x1000000
2006 14:47:52.976239 MMAP Start : 0xff000000
2007 14:47:52.982874 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2008 14:47:52.990941 New NVMe Controller 0x3214e110 @ 00:1d:04
2009 14:47:52.995373 New NVMe Controller 0x3214e1d8 @ 00:1d:00
2010 14:47:53.001350 The GBB signature is at 0x30000014 and is: 24 47 42 42
2011 14:47:53.007612 Wipe memory regions:
2012 14:47:53.011197 [0x00000000001000, 0x000000000a0000)
2013 14:47:53.014658 [0x00000000100000, 0x00000030000000)
2014 14:47:53.100703 [0x00000032751910, 0x00000089afd000)
2015 14:47:53.254707 [0x00000100000000, 0x0000026e800000)
2016 14:47:54.265699 R8152: Initializing
2017 14:47:54.268494 Version 6 (ocp_data = 5c30)
2018 14:47:54.272089 R8152: Done initializing
2019 14:47:54.274123 Adding net device
2020 14:47:54.280549 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2021 14:47:54.280714
2022 14:47:54.281282 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2024 14:47:54.382166 sarien: tftpboot 192.168.201.1 7462803/tftp-deploy-h3bb3_is/kernel/bzImage 7462803/tftp-deploy-h3bb3_is/kernel/cmdline 7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
2025 14:47:54.382349 Setting prompt string to 'Starting kernel'
2026 14:47:54.382464 Setting prompt string to ['Starting kernel']
2027 14:47:54.382541 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 14:47:54.382618 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
2029 14:47:54.383756 tftpboot 192.168.201.1 7462803/tftp-deploy-h3bb3_is/kernel/bzImage 7462803/tftp-deploy-h3bb3_is/kernel/cmdline 7462803/tftp-deploy-h3bb3_is/ramdisk/ramdisk.cpio.gz
2030 14:47:54.385685 Waiting for link
2031 14:47:54.587566 done.
2032 14:47:54.588496 MAC: 00:24:32:30:7c:0c
2033 14:47:54.591454 Sending DHCP discover... done.
2034 14:47:54.594117 Waiting for reply... done.
2035 14:47:54.597244 Sending DHCP request... done.
2036 14:47:54.600087 Waiting for reply... done.
2037 14:47:54.602632 My ip is 192.168.201.184
2038 14:47:54.606211 The DHCP server ip is 192.168.201.1
2039 14:47:54.611425 TFTP server IP predefined by user: 192.168.201.1
2040 14:47:54.618534 Bootfile predefined by user: 7462803/tftp-deploy-h3bb3_is/kernel/bzImage
2041 14:47:54.621758 Sending tftp read request... done.
2042 14:47:54.625935 Waiting for the transfer...
2043 14:47:55.278487 00000000 ################################################################
2044 14:47:55.971258 00080000 ################################################################
2045 14:47:56.676822 00100000 ################################################################
2046 14:47:57.387584 00180000 ################################################################
2047 14:47:58.079342 00200000 ################################################################
2048 14:47:58.792747 00280000 ################################################################
2049 14:47:59.507774 00300000 ################################################################
2050 14:48:00.213373 00380000 ################################################################
2051 14:48:00.919968 00400000 ################################################################
2052 14:48:01.624253 00480000 ################################################################
2053 14:48:02.335933 00500000 ################################################################
2054 14:48:03.039031 00580000 ################################################################
2055 14:48:03.745378 00600000 ################################################################
2056 14:48:04.166158 00680000 ###################################### done.
2057 14:48:04.169314 The bootfile was 7126928 bytes long.
2058 14:48:04.172913 Sending tftp read request... done.
2059 14:48:04.176352 Waiting for the transfer...
2060 14:48:04.908870 00000000 ################################################################
2061 14:48:05.668668 00080000 ################################################################
2062 14:48:06.418291 00100000 ################################################################
2063 14:48:07.173735 00180000 ################################################################
2064 14:48:07.930066 00200000 ################################################################
2065 14:48:08.685003 00280000 ################################################################
2066 14:48:09.411999 00300000 ################################################################
2067 14:48:10.146898 00380000 ################################################################
2068 14:48:10.870604 00400000 ################################################################
2069 14:48:11.589972 00480000 ################################################################
2070 14:48:11.955654 00500000 ################################ done.
2071 14:48:11.959016 Sending tftp read request... done.
2072 14:48:11.961891 Waiting for the transfer...
2073 14:48:11.964267 00000000 # done.
2074 14:48:11.972939 Command line loaded dynamically from TFTP file: 7462803/tftp-deploy-h3bb3_is/kernel/cmdline
2075 14:48:11.999174 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7462803/extract-nfsrootfs-jb54vdxg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2076 14:48:12.005974 Shutting down all USB controllers.
2077 14:48:12.008229 Removing current net device
2078 14:48:12.011987 EC: exit firmware mode
2079 14:48:12.015231 Finalizing coreboot
2080 14:48:12.020828 Exiting depthcharge with code 4 at timestamp: 26769468
2081 14:48:12.021402
2082 14:48:12.022635 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2083 14:48:12.022848 start: 2.2.5 auto-login-action (timeout 00:04:13) [common]
2084 14:48:12.023010 Setting prompt string to ['Linux version [0-9]']
2085 14:48:12.023169 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2086 14:48:12.023324 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2087 14:48:12.023688 Starting kernel ...
2088 14:48:12.023825
2089 14:48:12.023971
2091 14:52:25.023842 end: 2.2.5 auto-login-action (duration 00:04:13) [common]
2093 14:52:25.025668 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 253 seconds'
2095 14:52:25.027069 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2098 14:52:25.029031 end: 2 depthcharge-action (duration 00:05:00) [common]
2100 14:52:25.030214 Cleaning after the job
2101 14:52:25.030656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/ramdisk
2102 14:52:25.033018 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/kernel
2103 14:52:25.035652 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/nfsrootfs
2104 14:52:25.072879 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462803/tftp-deploy-h3bb3_is/modules
2105 14:52:25.073176 start: 5.1 power-off (timeout 00:00:30) [common]
2106 14:52:25.073346 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-3' '--port=1' '--command=off'
2107 14:52:25.092122 >> Command sent successfully.
2108 14:52:25.093999 Returned 0 in 0 seconds
2109 14:52:25.195215 end: 5.1 power-off (duration 00:00:00) [common]
2111 14:52:25.197020 start: 5.2 read-feedback (timeout 00:10:00) [common]
2112 14:52:25.198260 Listened to connection for namespace 'common' for up to 1s
2113 14:52:26.202944 Finalising connection for namespace 'common'
2114 14:52:26.203644 Disconnecting from shell: Finalise
2115 14:52:26.305135 end: 5.2 read-feedback (duration 00:00:01) [common]
2116 14:52:26.305758 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462803
2117 14:52:26.400749 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462803
2118 14:52:26.400947 JobError: Your job cannot terminate cleanly.