Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 15:00:41.982538 lava-dispatcher, installed at version: 2022.06
2 15:00:41.982743 start: 0 validate
3 15:00:41.982895 Start time: 2022-09-30 15:00:41.982884+00:00 (UTC)
4 15:00:41.983038 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:00:41.983183 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 15:00:42.276942 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:00:42.277139 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:00:42.569151 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:00:42.569320 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:00:42.855568 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:00:42.855748 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:00:43.141586 validate duration: 1.16
14 15:00:43.141873 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:00:43.141977 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:00:43.142065 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:00:43.142164 Not decompressing ramdisk as can be used compressed.
18 15:00:43.142255 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 15:00:43.142328 saving as /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/ramdisk/initrd.cpio.gz
20 15:00:43.142392 total size: 5411075 (5MB)
21 15:00:43.145143 progress 0% (0MB)
22 15:00:43.147584 progress 5% (0MB)
23 15:00:43.150113 progress 10% (0MB)
24 15:00:43.152596 progress 15% (0MB)
25 15:00:43.155388 progress 20% (1MB)
26 15:00:43.157804 progress 25% (1MB)
27 15:00:43.160309 progress 30% (1MB)
28 15:00:43.163345 progress 35% (1MB)
29 15:00:43.165575 progress 40% (2MB)
30 15:00:43.167970 progress 45% (2MB)
31 15:00:43.170580 progress 50% (2MB)
32 15:00:43.172968 progress 55% (2MB)
33 15:00:43.175799 progress 60% (3MB)
34 15:00:43.178914 progress 65% (3MB)
35 15:00:43.180614 progress 70% (3MB)
36 15:00:43.183455 progress 75% (3MB)
37 15:00:43.188246 progress 80% (4MB)
38 15:00:43.189562 progress 85% (4MB)
39 15:00:43.190984 progress 90% (4MB)
40 15:00:43.193502 progress 95% (4MB)
41 15:00:43.196152 progress 100% (5MB)
42 15:00:43.196341 5MB downloaded in 0.05s (95.66MB/s)
43 15:00:43.196508 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:00:43.196762 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:00:43.196855 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:00:43.196941 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:00:43.197046 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:00:43.197117 saving as /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/kernel/bzImage
50 15:00:43.197178 total size: 7126928 (6MB)
51 15:00:43.197238 No compression specified
52 15:00:43.199128 progress 0% (0MB)
53 15:00:43.202385 progress 5% (0MB)
54 15:00:43.206415 progress 10% (0MB)
55 15:00:43.209299 progress 15% (1MB)
56 15:00:43.213367 progress 20% (1MB)
57 15:00:43.216250 progress 25% (1MB)
58 15:00:43.219813 progress 30% (2MB)
59 15:00:43.223321 progress 35% (2MB)
60 15:00:43.226376 progress 40% (2MB)
61 15:00:43.229502 progress 45% (3MB)
62 15:00:43.233334 progress 50% (3MB)
63 15:00:43.236505 progress 55% (3MB)
64 15:00:43.239763 progress 60% (4MB)
65 15:00:43.243086 progress 65% (4MB)
66 15:00:43.246455 progress 70% (4MB)
67 15:00:43.249974 progress 75% (5MB)
68 15:00:43.253465 progress 80% (5MB)
69 15:00:43.260835 progress 85% (5MB)
70 15:00:43.262617 progress 90% (6MB)
71 15:00:43.264352 progress 95% (6MB)
72 15:00:43.266734 progress 100% (6MB)
73 15:00:43.266961 6MB downloaded in 0.07s (97.41MB/s)
74 15:00:43.267115 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:00:43.267360 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:00:43.267451 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:00:43.267536 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:00:43.267647 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 15:00:43.267715 saving as /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/nfsrootfs/full.rootfs.tar
81 15:00:43.267776 total size: 122682368 (116MB)
82 15:00:43.267836 Using unxz to decompress xz
83 15:00:43.272304 progress 0% (0MB)
84 15:00:43.719552 progress 5% (5MB)
85 15:00:44.182921 progress 10% (11MB)
86 15:00:44.642064 progress 15% (17MB)
87 15:00:45.110819 progress 20% (23MB)
88 15:00:45.431775 progress 25% (29MB)
89 15:00:45.774519 progress 30% (35MB)
90 15:00:46.011659 progress 35% (40MB)
91 15:00:46.225756 progress 40% (46MB)
92 15:00:46.576518 progress 45% (52MB)
93 15:00:46.937288 progress 50% (58MB)
94 15:00:47.284389 progress 55% (64MB)
95 15:00:47.645023 progress 60% (70MB)
96 15:00:47.984168 progress 65% (76MB)
97 15:00:48.378871 progress 70% (81MB)
98 15:00:48.799056 progress 75% (87MB)
99 15:00:49.223957 progress 80% (93MB)
100 15:00:49.340006 progress 85% (99MB)
101 15:00:49.509127 progress 90% (105MB)
102 15:00:49.848312 progress 95% (111MB)
103 15:00:50.226685 progress 100% (116MB)
104 15:00:50.233611 116MB downloaded in 6.97s (16.80MB/s)
105 15:00:50.233872 end: 1.3.1 http-download (duration 00:00:07) [common]
107 15:00:50.234138 end: 1.3 download-retry (duration 00:00:07) [common]
108 15:00:50.234242 start: 1.4 download-retry (timeout 00:09:53) [common]
109 15:00:50.234340 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 15:00:50.234462 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:00:50.234535 saving as /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/modules/modules.tar
112 15:00:50.234598 total size: 52080 (0MB)
113 15:00:50.234663 Using unxz to decompress xz
114 15:00:50.238827 progress 62% (0MB)
115 15:00:50.239196 progress 100% (0MB)
116 15:00:50.242489 0MB downloaded in 0.01s (6.30MB/s)
117 15:00:50.242709 end: 1.4.1 http-download (duration 00:00:00) [common]
119 15:00:50.242967 end: 1.4 download-retry (duration 00:00:00) [common]
120 15:00:50.243064 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 15:00:50.243160 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 15:00:51.985537 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7462826/extract-nfsrootfs-rgannkh0
123 15:00:51.985751 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 15:00:51.985863 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 15:00:51.986009 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv
126 15:00:51.986111 makedir: /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin
127 15:00:51.986204 makedir: /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/tests
128 15:00:51.986287 makedir: /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/results
129 15:00:51.986391 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-add-keys
130 15:00:51.986522 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-add-sources
131 15:00:51.986644 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-background-process-start
132 15:00:51.986772 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-background-process-stop
133 15:00:51.986884 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-common-functions
134 15:00:51.987004 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-echo-ipv4
135 15:00:51.987113 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-install-packages
136 15:00:51.987235 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-installed-packages
137 15:00:51.987342 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-os-build
138 15:00:51.987466 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-probe-channel
139 15:00:51.987581 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-probe-ip
140 15:00:51.987693 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-target-ip
141 15:00:51.987808 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-target-mac
142 15:00:51.987914 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-target-storage
143 15:00:51.988035 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-case
144 15:00:51.988152 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-event
145 15:00:51.988261 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-feedback
146 15:00:51.988380 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-raise
147 15:00:51.988486 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-reference
148 15:00:51.988603 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-runner
149 15:00:51.988710 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-set
150 15:00:51.988893 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-test-shell
151 15:00:51.989012 Updating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-install-packages (oe)
152 15:00:51.989133 Updating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/bin/lava-installed-packages (oe)
153 15:00:51.989229 Creating /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/environment
154 15:00:51.989326 LAVA metadata
155 15:00:51.989394 - LAVA_JOB_ID=7462826
156 15:00:51.989457 - LAVA_DISPATCHER_IP=192.168.201.1
157 15:00:51.989565 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 15:00:51.989630 skipped lava-vland-overlay
159 15:00:51.989713 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 15:00:51.989823 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 15:00:51.989922 skipped lava-multinode-overlay
162 15:00:51.989995 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 15:00:51.990079 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 15:00:51.990151 Loading test definitions
165 15:00:51.990238 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 15:00:51.990324 Using /lava-7462826 at stage 0
167 15:00:51.990421 Fetching tests from https://github.com/kernelci/test-definitions
168 15:00:51.990507 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/0/tests/0_ltp-timers'
169 15:00:56.220961 Running '/usr/bin/git checkout kernelci.org
170 15:00:56.355669 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 15:00:56.356337 uuid=7462826_1.5.2.3.1 testdef=None
172 15:00:56.356494 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 15:00:56.356787 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 15:00:56.357466 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 15:00:56.357710 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 15:00:56.358502 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 15:00:56.358752 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 15:00:56.359523 runner path: /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/0/tests/0_ltp-timers test_uuid 7462826_1.5.2.3.1
182 15:00:56.359615 GRP_TEST='TMR'
183 15:00:56.359683 SKIPFILE='skipfile-lkft.yaml'
184 15:00:56.359746 SKIP_INSTALL='true'
185 15:00:56.359805 TST_CMDFILES=''
186 15:00:56.359941 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 15:00:56.360158 Creating lava-test-runner.conf files
189 15:00:56.360224 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462826/lava-overlay-wuhru8wv/lava-7462826/0 for stage 0
190 15:00:56.360310 - 0_ltp-timers
191 15:00:56.360407 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
192 15:00:56.360494 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
193 15:01:03.608615 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 15:01:03.608873 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
195 15:01:03.608970 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 15:01:03.609074 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
197 15:01:03.609167 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
198 15:01:03.711664 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 15:01:03.712025 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
200 15:01:03.712138 extracting modules file /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462826/extract-nfsrootfs-rgannkh0
201 15:01:03.716376 extracting modules file /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462826/extract-overlay-ramdisk-9f6_heb2/ramdisk
202 15:01:03.720180 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 15:01:03.720290 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
204 15:01:03.720413 [common] Applying overlay to NFS
205 15:01:03.720486 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462826/compress-overlay-u31uvej6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462826/extract-nfsrootfs-rgannkh0
206 15:01:04.166155 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 15:01:04.166324 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
208 15:01:04.166417 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 15:01:04.166507 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
210 15:01:04.166589 Building ramdisk /var/lib/lava/dispatcher/tmp/7462826/extract-overlay-ramdisk-9f6_heb2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462826/extract-overlay-ramdisk-9f6_heb2/ramdisk
211 15:01:04.200706 >> 24434 blocks
212 15:01:04.664569 rename /var/lib/lava/dispatcher/tmp/7462826/extract-overlay-ramdisk-9f6_heb2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
213 15:01:04.664980 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
214 15:01:04.665098 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
215 15:01:04.665205 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
216 15:01:04.665312 No mkimage arch provided, not using FIT.
217 15:01:04.665405 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 15:01:04.665495 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 15:01:04.665594 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
220 15:01:04.665683 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
221 15:01:04.665763 No LXC device requested
222 15:01:04.665847 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 15:01:04.665937 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
224 15:01:04.666020 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 15:01:04.666095 Checking files for TFTP limit of 4294967296 bytes.
226 15:01:04.666484 end: 1 tftp-deploy (duration 00:00:22) [common]
227 15:01:04.666588 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 15:01:04.666682 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 15:01:04.666810 substitutions:
230 15:01:04.666878 - {DTB}: None
231 15:01:04.666943 - {INITRD}: 7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
232 15:01:04.667005 - {KERNEL}: 7462826/tftp-deploy-4bftcplo/kernel/bzImage
233 15:01:04.667065 - {LAVA_MAC}: None
234 15:01:04.667124 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7462826/extract-nfsrootfs-rgannkh0
235 15:01:04.667181 - {NFS_SERVER_IP}: 192.168.201.1
236 15:01:04.667253 - {PRESEED_CONFIG}: None
237 15:01:04.667312 - {PRESEED_LOCAL}: None
238 15:01:04.667368 - {RAMDISK}: 7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
239 15:01:04.667424 - {ROOT_PART}: None
240 15:01:04.667480 - {ROOT}: None
241 15:01:04.667535 - {SERVER_IP}: 192.168.201.1
242 15:01:04.667590 - {TEE}: None
243 15:01:04.667645 Parsed boot commands:
244 15:01:04.667699 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 15:01:04.667853 Parsed boot commands: tftpboot 192.168.201.1 7462826/tftp-deploy-4bftcplo/kernel/bzImage 7462826/tftp-deploy-4bftcplo/kernel/cmdline 7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
246 15:01:04.667945 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 15:01:04.668032 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 15:01:04.668124 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 15:01:04.668210 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 15:01:04.668280 Not connected, no need to disconnect.
251 15:01:04.668368 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 15:01:04.668451 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 15:01:04.668518 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
254 15:01:04.671247 Setting prompt string to ['lava-test: # ']
255 15:01:04.671534 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 15:01:04.671639 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 15:01:04.671735 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 15:01:04.671824 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 15:01:04.672000 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
260 15:01:04.690850 >> Command sent successfully.
261 15:01:04.692915 Returned 0 in 0 seconds
262 15:01:04.793689 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 15:01:04.794008 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 15:01:04.794109 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 15:01:04.794193 Setting prompt string to 'Starting depthcharge on Helios...'
267 15:01:04.794260 Changing prompt to 'Starting depthcharge on Helios...'
268 15:01:04.794329 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 15:01:04.794590 [Enter `^Ec?' for help]
270 15:01:11.148262
271 15:01:11.148422
272 15:01:11.157938 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 15:01:11.161271 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 15:01:11.167731 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 15:01:11.171280 CPU: AES supported, TXT NOT supported, VT supported
276 15:01:11.177686 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 15:01:11.184554 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 15:01:11.187438 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 15:01:11.190931 VBOOT: Loading verstage.
280 15:01:11.197209 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 15:01:11.200691 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 15:01:11.207147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 15:01:11.210303 CBFS @ c08000 size 3f8000
284 15:01:11.213690 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 15:01:11.216997 CBFS: Locating 'fallback/verstage'
286 15:01:11.223961 CBFS: Found @ offset 10fb80 size 1072c
287 15:01:11.224042
288 15:01:11.224112
289 15:01:11.233600 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 15:01:11.249146 Probing TPM: . done!
291 15:01:11.252423 TPM ready after 0 ms
292 15:01:11.256051 Connected to device vid:did:rid of 1ae0:0028:00
293 15:01:11.265924 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
294 15:01:11.269244 Initialized TPM device CR50 revision 0
295 15:01:11.315243 tlcl_send_startup: Startup return code is 0
296 15:01:11.315366 TPM: setup succeeded
297 15:01:11.327787 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 15:01:11.331736 Chrome EC: UHEPI supported
299 15:01:11.335143 Phase 1
300 15:01:11.338779 FMAP: area GBB found @ c05000 (12288 bytes)
301 15:01:11.344919 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 15:01:11.348342 Phase 2
303 15:01:11.348428 Phase 3
304 15:01:11.351930 FMAP: area GBB found @ c05000 (12288 bytes)
305 15:01:11.357946 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 15:01:11.364780 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 15:01:11.367721 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 15:01:11.374740 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 15:01:11.390595 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 15:01:11.393550 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 15:01:11.400337 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 15:01:11.404459 Phase 4
313 15:01:11.407744 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 15:01:11.417803 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 15:01:11.593864 VB2:vb2_rsa_verify_digest() Digest check failed!
316 15:01:11.600241 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 15:01:11.600344 Saving nvdata
318 15:01:11.603591 Reboot requested (10020007)
319 15:01:11.607023 board_reset() called!
320 15:01:11.607101 full_reset() called!
321 15:01:16.115012
322 15:01:16.115161
323 15:01:16.125144 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 15:01:16.127994 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 15:01:16.134842 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 15:01:16.138155 CPU: AES supported, TXT NOT supported, VT supported
327 15:01:16.144329 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 15:01:16.151139 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 15:01:16.154069 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 15:01:16.157984 VBOOT: Loading verstage.
331 15:01:16.164096 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 15:01:16.167476 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 15:01:16.173981 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 15:01:16.174065 CBFS @ c08000 size 3f8000
335 15:01:16.180904 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 15:01:16.183898 CBFS: Locating 'fallback/verstage'
337 15:01:16.190656 CBFS: Found @ offset 10fb80 size 1072c
338 15:01:16.190740
339 15:01:16.190817
340 15:01:16.200308 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 15:01:16.216062 Probing TPM: . done!
342 15:01:16.219406 TPM ready after 0 ms
343 15:01:16.222544 Connected to device vid:did:rid of 1ae0:0028:00
344 15:01:16.233042 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 15:01:16.236542 Initialized TPM device CR50 revision 0
346 15:01:16.282197 tlcl_send_startup: Startup return code is 0
347 15:01:16.282320 TPM: setup succeeded
348 15:01:16.294621 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 15:01:16.298622 Chrome EC: UHEPI supported
350 15:01:16.302045 Phase 1
351 15:01:16.305502 FMAP: area GBB found @ c05000 (12288 bytes)
352 15:01:16.311771 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 15:01:16.318499 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 15:01:16.321893 Recovery requested (1009000e)
355 15:01:16.327981 Saving nvdata
356 15:01:16.333719 tlcl_extend: response is 0
357 15:01:16.342318 tlcl_extend: response is 0
358 15:01:16.349748 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 15:01:16.352552 CBFS @ c08000 size 3f8000
360 15:01:16.359326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 15:01:16.362862 CBFS: Locating 'fallback/romstage'
362 15:01:16.366167 CBFS: Found @ offset 80 size 145fc
363 15:01:16.369035 Accumulated console time in verstage 98 ms
364 15:01:16.369141
365 15:01:16.369208
366 15:01:16.382394 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 15:01:16.388849 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 15:01:16.392264 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 15:01:16.395551 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 15:01:16.401954 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 15:01:16.405446 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 15:01:16.408932 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 15:01:16.411910 TCO_STS: 0000 0000
374 15:01:16.415288 GEN_PMCON: e0015238 00000200
375 15:01:16.418770 GBLRST_CAUSE: 00000000 00000000
376 15:01:16.418843 prev_sleep_state 5
377 15:01:16.422474 Boot Count incremented to 32907
378 15:01:16.429098 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 15:01:16.432580 CBFS @ c08000 size 3f8000
380 15:01:16.438818 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 15:01:16.438899 CBFS: Locating 'fspm.bin'
382 15:01:16.445598 CBFS: Found @ offset 5ffc0 size 71000
383 15:01:16.448509 Chrome EC: UHEPI supported
384 15:01:16.455160 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 15:01:16.459072 Probing TPM: done!
386 15:01:16.465925 Connected to device vid:did:rid of 1ae0:0028:00
387 15:01:16.475795 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 15:01:16.482777 Initialized TPM device CR50 revision 0
389 15:01:16.492110 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 15:01:16.501586 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 15:01:16.501671 MRC cache found, size 1948
392 15:01:16.505013 bootmode is set to: 2
393 15:01:16.508387 PRMRR disabled by config.
394 15:01:16.511197 SPD INDEX = 1
395 15:01:16.514706 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 15:01:16.518216 CBFS @ c08000 size 3f8000
397 15:01:16.524612 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 15:01:16.524693 CBFS: Locating 'spd.bin'
399 15:01:16.527888 CBFS: Found @ offset 5fb80 size 400
400 15:01:16.531282 SPD: module type is LPDDR3
401 15:01:16.534776 SPD: module part is
402 15:01:16.541055 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 15:01:16.544379 SPD: device width 4 bits, bus width 8 bits
404 15:01:16.547760 SPD: module size is 4096 MB (per channel)
405 15:01:16.551134 memory slot: 0 configuration done.
406 15:01:16.557370 memory slot: 2 configuration done.
407 15:01:16.606552 CBMEM:
408 15:01:16.610095 IMD: root @ 99fff000 254 entries.
409 15:01:16.613523 IMD: root @ 99ffec00 62 entries.
410 15:01:16.616997 External stage cache:
411 15:01:16.619867 IMD: root @ 9abff000 254 entries.
412 15:01:16.623168 IMD: root @ 9abfec00 62 entries.
413 15:01:16.629836 Chrome EC: clear events_b mask to 0x0000000020004000
414 15:01:16.643639 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 15:01:16.658841 tlcl_write: response is 0
416 15:01:16.668031 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 15:01:16.674879 MRC: TPM MRC hash updated successfully.
418 15:01:16.674963 2 DIMMs found
419 15:01:16.677782 SMM Memory Map
420 15:01:16.681226 SMRAM : 0x9a000000 0x1000000
421 15:01:16.684655 Subregion 0: 0x9a000000 0xa00000
422 15:01:16.688233 Subregion 1: 0x9aa00000 0x200000
423 15:01:16.691008 Subregion 2: 0x9ac00000 0x400000
424 15:01:16.694518 top_of_ram = 0x9a000000
425 15:01:16.697901 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 15:01:16.704671 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 15:01:16.707436 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 15:01:16.714380 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 15:01:16.717811 CBFS @ c08000 size 3f8000
430 15:01:16.720600 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 15:01:16.727386 CBFS: Locating 'fallback/postcar'
432 15:01:16.730772 CBFS: Found @ offset 107000 size 4b44
433 15:01:16.737062 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 15:01:16.747347 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 15:01:16.750695 Processing 180 relocs. Offset value of 0x97c0c000
436 15:01:16.758185 Accumulated console time in romstage 286 ms
437 15:01:16.758267
438 15:01:16.758340
439 15:01:16.768316 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 15:01:16.775184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 15:01:16.778090 CBFS @ c08000 size 3f8000
442 15:01:16.781455 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 15:01:16.787942 CBFS: Locating 'fallback/ramstage'
444 15:01:16.791447 CBFS: Found @ offset 43380 size 1b9e8
445 15:01:16.797953 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 15:01:16.830398 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 15:01:16.836560 Processing 3976 relocs. Offset value of 0x98db0000
448 15:01:16.840015 Accumulated console time in postcar 52 ms
449 15:01:16.840097
450 15:01:16.840168
451 15:01:16.850175 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 15:01:16.856469 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 15:01:16.859972 WARNING: RO_VPD is uninitialized or empty.
454 15:01:16.862873 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 15:01:16.869797 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 15:01:16.869883 Normal boot.
457 15:01:16.876009 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 15:01:16.879468 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 15:01:16.883114 CBFS @ c08000 size 3f8000
460 15:01:16.889311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 15:01:16.892725 CBFS: Locating 'cpu_microcode_blob.bin'
462 15:01:16.895704 CBFS: Found @ offset 14700 size 2ec00
463 15:01:16.902263 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 15:01:16.902358 Skip microcode update
465 15:01:16.908883 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 15:01:16.912239 CBFS @ c08000 size 3f8000
467 15:01:16.915662 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 15:01:16.919096 CBFS: Locating 'fsps.bin'
469 15:01:16.921967 CBFS: Found @ offset d1fc0 size 35000
470 15:01:16.948363 Detected 4 core, 8 thread CPU.
471 15:01:16.951770 Setting up SMI for CPU
472 15:01:16.955181 IED base = 0x9ac00000
473 15:01:16.958497 IED size = 0x00400000
474 15:01:16.958583 Will perform SMM setup.
475 15:01:16.964840 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 15:01:16.971511 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 15:01:16.977966 Processing 16 relocs. Offset value of 0x00030000
478 15:01:16.978046 Attempting to start 7 APs
479 15:01:16.984807 Waiting for 10ms after sending INIT.
480 15:01:16.998044 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
481 15:01:16.998132 done.
482 15:01:17.001423 AP: slot 6 apic_id 6.
483 15:01:17.005000 Waiting for 2nd SIPI to complete...done.
484 15:01:17.008274 AP: slot 5 apic_id 4.
485 15:01:17.011166 AP: slot 4 apic_id 5.
486 15:01:17.011254 AP: slot 3 apic_id 2.
487 15:01:17.014647 AP: slot 1 apic_id 3.
488 15:01:17.018042 AP: slot 7 apic_id 7.
489 15:01:17.024278 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 15:01:17.031113 Processing 13 relocs. Offset value of 0x00038000
491 15:01:17.037797 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 15:01:17.041173 Installing SMM handler to 0x9a000000
493 15:01:17.047449 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 15:01:17.054412 Processing 658 relocs. Offset value of 0x9a010000
495 15:01:17.060552 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 15:01:17.064033 Processing 13 relocs. Offset value of 0x9a008000
497 15:01:17.070522 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 15:01:17.077372 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 15:01:17.083618 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 15:01:17.087107 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 15:01:17.093470 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 15:01:17.100470 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 15:01:17.106815 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 15:01:17.113627 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 15:01:17.117121 Clearing SMI status registers
506 15:01:17.117220 SMI_STS: PM1
507 15:01:17.119888 PM1_STS: PWRBTN
508 15:01:17.119964 TCO_STS: SECOND_TO
509 15:01:17.123351 New SMBASE 0x9a000000
510 15:01:17.126771 In relocation handler: CPU 0
511 15:01:17.129725 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 15:01:17.136469 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 15:01:17.136556 Relocation complete.
514 15:01:17.140024 New SMBASE 0x99fff800
515 15:01:17.142823 In relocation handler: CPU 2
516 15:01:17.146211 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
517 15:01:17.152551 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 15:01:17.152629 Relocation complete.
519 15:01:17.155804 New SMBASE 0x99ffe400
520 15:01:17.159165 In relocation handler: CPU 7
521 15:01:17.162520 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
522 15:01:17.169344 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 15:01:17.169425 Relocation complete.
524 15:01:17.172214 New SMBASE 0x99ffe800
525 15:01:17.175646 In relocation handler: CPU 6
526 15:01:17.179135 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
527 15:01:17.185405 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 15:01:17.185496 Relocation complete.
529 15:01:17.188836 New SMBASE 0x99fffc00
530 15:01:17.191802 In relocation handler: CPU 1
531 15:01:17.195158 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
532 15:01:17.201680 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 15:01:17.201758 Relocation complete.
534 15:01:17.205165 New SMBASE 0x99fff400
535 15:01:17.208535 In relocation handler: CPU 3
536 15:01:17.211838 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 15:01:17.218693 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 15:01:17.218777 Relocation complete.
539 15:01:17.221630 New SMBASE 0x99ffec00
540 15:01:17.225140 In relocation handler: CPU 5
541 15:01:17.228484 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
542 15:01:17.234835 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 15:01:17.234914 Relocation complete.
544 15:01:17.238027 New SMBASE 0x99fff000
545 15:01:17.241369 In relocation handler: CPU 4
546 15:01:17.244779 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 15:01:17.250965 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 15:01:17.251051 Relocation complete.
549 15:01:17.254454 Initializing CPU #0
550 15:01:17.258029 CPU: vendor Intel device 806ec
551 15:01:17.260821 CPU: family 06, model 8e, stepping 0c
552 15:01:17.264251 Clearing out pending MCEs
553 15:01:17.267608 Setting up local APIC...
554 15:01:17.267688 apic_id: 0x00 done.
555 15:01:17.270525 Turbo is available but hidden
556 15:01:17.273943 Turbo is available and visible
557 15:01:17.277457 VMX status: enabled
558 15:01:17.280373 IA32_FEATURE_CONTROL status: locked
559 15:01:17.283754 Skip microcode update
560 15:01:17.283844 CPU #0 initialized
561 15:01:17.287325 Initializing CPU #2
562 15:01:17.290197 Initializing CPU #7
563 15:01:17.290273 Initializing CPU #6
564 15:01:17.293680 CPU: vendor Intel device 806ec
565 15:01:17.297086 CPU: family 06, model 8e, stepping 0c
566 15:01:17.300063 CPU: vendor Intel device 806ec
567 15:01:17.303572 CPU: family 06, model 8e, stepping 0c
568 15:01:17.307033 Clearing out pending MCEs
569 15:01:17.310366 Clearing out pending MCEs
570 15:01:17.313346 Setting up local APIC...
571 15:01:17.313426 Initializing CPU #5
572 15:01:17.316746 Initializing CPU #4
573 15:01:17.320192 CPU: vendor Intel device 806ec
574 15:01:17.323571 CPU: family 06, model 8e, stepping 0c
575 15:01:17.326907 CPU: vendor Intel device 806ec
576 15:01:17.329880 CPU: family 06, model 8e, stepping 0c
577 15:01:17.333373 Clearing out pending MCEs
578 15:01:17.336737 Clearing out pending MCEs
579 15:01:17.336852 Setting up local APIC...
580 15:01:17.339563 apic_id: 0x07 done.
581 15:01:17.342870 Setting up local APIC...
582 15:01:17.346246 Initializing CPU #3
583 15:01:17.346321 Initializing CPU #1
584 15:01:17.349716 CPU: vendor Intel device 806ec
585 15:01:17.353185 CPU: family 06, model 8e, stepping 0c
586 15:01:17.356573 CPU: vendor Intel device 806ec
587 15:01:17.359543 CPU: family 06, model 8e, stepping 0c
588 15:01:17.362841 Clearing out pending MCEs
589 15:01:17.366179 Clearing out pending MCEs
590 15:01:17.369570 Setting up local APIC...
591 15:01:17.369651 apic_id: 0x04 done.
592 15:01:17.373014 Setting up local APIC...
593 15:01:17.375916 VMX status: enabled
594 15:01:17.376000 apic_id: 0x06 done.
595 15:01:17.379350 apic_id: 0x03 done.
596 15:01:17.382818 Setting up local APIC...
597 15:01:17.382902 VMX status: enabled
598 15:01:17.389132 IA32_FEATURE_CONTROL status: locked
599 15:01:17.392573 IA32_FEATURE_CONTROL status: locked
600 15:01:17.392651 Skip microcode update
601 15:01:17.395557 CPU: vendor Intel device 806ec
602 15:01:17.399165 CPU: family 06, model 8e, stepping 0c
603 15:01:17.402104 Clearing out pending MCEs
604 15:01:17.405497 apic_id: 0x05 done.
605 15:01:17.405575 VMX status: enabled
606 15:01:17.409080 VMX status: enabled
607 15:01:17.412403 IA32_FEATURE_CONTROL status: locked
608 15:01:17.415686 IA32_FEATURE_CONTROL status: locked
609 15:01:17.419015 Skip microcode update
610 15:01:17.422006 apic_id: 0x02 done.
611 15:01:17.422083 VMX status: enabled
612 15:01:17.425337 VMX status: enabled
613 15:01:17.428795 IA32_FEATURE_CONTROL status: locked
614 15:01:17.431897 IA32_FEATURE_CONTROL status: locked
615 15:01:17.435143 Skip microcode update
616 15:01:17.435221 Skip microcode update
617 15:01:17.438622 CPU #1 initialized
618 15:01:17.442017 CPU #3 initialized
619 15:01:17.442109 Skip microcode update
620 15:01:17.444848 CPU #7 initialized
621 15:01:17.444928 CPU #6 initialized
622 15:01:17.448157 Setting up local APIC...
623 15:01:17.451745 Skip microcode update
624 15:01:17.455099 CPU #5 initialized
625 15:01:17.455179 CPU #4 initialized
626 15:01:17.458115 apic_id: 0x01 done.
627 15:01:17.458200 VMX status: enabled
628 15:01:17.461577 IA32_FEATURE_CONTROL status: locked
629 15:01:17.464996 Skip microcode update
630 15:01:17.468390 CPU #2 initialized
631 15:01:17.471815 bsp_do_flight_plan done after 464 msecs.
632 15:01:17.474584 CPU: frequency set to 4200 MHz
633 15:01:17.474660 Enabling SMIs.
634 15:01:17.478171 Locking SMM.
635 15:01:17.492652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 15:01:17.496203 CBFS @ c08000 size 3f8000
637 15:01:17.502481 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 15:01:17.502578 CBFS: Locating 'vbt.bin'
639 15:01:17.505928 CBFS: Found @ offset 5f5c0 size 499
640 15:01:17.512352 Found a VBT of 4608 bytes after decompression
641 15:01:17.696209 Display FSP Version Info HOB
642 15:01:17.699558 Reference Code - CPU = 9.0.1e.30
643 15:01:17.702963 uCode Version = 0.0.0.ca
644 15:01:17.705958 TXT ACM version = ff.ff.ff.ffff
645 15:01:17.709404 Display FSP Version Info HOB
646 15:01:17.712944 Reference Code - ME = 9.0.1e.30
647 15:01:17.715754 MEBx version = 0.0.0.0
648 15:01:17.719140 ME Firmware Version = Consumer SKU
649 15:01:17.722366 Display FSP Version Info HOB
650 15:01:17.725832 Reference Code - CML PCH = 9.0.1e.30
651 15:01:17.729254 PCH-CRID Status = Disabled
652 15:01:17.732506 PCH-CRID Original Value = ff.ff.ff.ffff
653 15:01:17.735376 PCH-CRID New Value = ff.ff.ff.ffff
654 15:01:17.738884 OPROM - RST - RAID = ff.ff.ff.ffff
655 15:01:17.741891 ChipsetInit Base Version = ff.ff.ff.ffff
656 15:01:17.748572 ChipsetInit Oem Version = ff.ff.ff.ffff
657 15:01:17.748652 Display FSP Version Info HOB
658 15:01:17.754899 Reference Code - SA - System Agent = 9.0.1e.30
659 15:01:17.758386 Reference Code - MRC = 0.7.1.6c
660 15:01:17.761423 SA - PCIe Version = 9.0.1e.30
661 15:01:17.764716 SA-CRID Status = Disabled
662 15:01:17.768193 SA-CRID Original Value = 0.0.0.c
663 15:01:17.768284 SA-CRID New Value = 0.0.0.c
664 15:01:17.771404 OPROM - VBIOS = ff.ff.ff.ffff
665 15:01:17.775024 RTC Init
666 15:01:17.778436 Set power on after power failure.
667 15:01:17.778517 Disabling Deep S3
668 15:01:17.781385 Disabling Deep S3
669 15:01:17.784824 Disabling Deep S4
670 15:01:17.784919 Disabling Deep S4
671 15:01:17.788377 Disabling Deep S5
672 15:01:17.788451 Disabling Deep S5
673 15:01:17.794488 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 194 exit 1
674 15:01:17.798097 Enumerating buses...
675 15:01:17.801429 Show all devs... Before device enumeration.
676 15:01:17.804394 Root Device: enabled 1
677 15:01:17.807729 CPU_CLUSTER: 0: enabled 1
678 15:01:17.807807 DOMAIN: 0000: enabled 1
679 15:01:17.811231 APIC: 00: enabled 1
680 15:01:17.814068 PCI: 00:00.0: enabled 1
681 15:01:17.817631 PCI: 00:02.0: enabled 1
682 15:01:17.817717 PCI: 00:04.0: enabled 0
683 15:01:17.821082 PCI: 00:05.0: enabled 0
684 15:01:17.823761 PCI: 00:12.0: enabled 1
685 15:01:17.827047 PCI: 00:12.5: enabled 0
686 15:01:17.827132 PCI: 00:12.6: enabled 0
687 15:01:17.830389 PCI: 00:14.0: enabled 1
688 15:01:17.833742 PCI: 00:14.1: enabled 0
689 15:01:17.833827 PCI: 00:14.3: enabled 1
690 15:01:17.837226 PCI: 00:14.5: enabled 0
691 15:01:17.840598 PCI: 00:15.0: enabled 1
692 15:01:17.843433 PCI: 00:15.1: enabled 1
693 15:01:17.843512 PCI: 00:15.2: enabled 0
694 15:01:17.846867 PCI: 00:15.3: enabled 0
695 15:01:17.850343 PCI: 00:16.0: enabled 1
696 15:01:17.853138 PCI: 00:16.1: enabled 0
697 15:01:17.853224 PCI: 00:16.2: enabled 0
698 15:01:17.856506 PCI: 00:16.3: enabled 0
699 15:01:17.859954 PCI: 00:16.4: enabled 0
700 15:01:17.862904 PCI: 00:16.5: enabled 0
701 15:01:17.862990 PCI: 00:17.0: enabled 1
702 15:01:17.866315 PCI: 00:19.0: enabled 1
703 15:01:17.869737 PCI: 00:19.1: enabled 0
704 15:01:17.873115 PCI: 00:19.2: enabled 0
705 15:01:17.873205 PCI: 00:1a.0: enabled 0
706 15:01:17.876387 PCI: 00:1c.0: enabled 0
707 15:01:17.879716 PCI: 00:1c.1: enabled 0
708 15:01:17.882591 PCI: 00:1c.2: enabled 0
709 15:01:17.882670 PCI: 00:1c.3: enabled 0
710 15:01:17.886075 PCI: 00:1c.4: enabled 0
711 15:01:17.889602 PCI: 00:1c.5: enabled 0
712 15:01:17.892471 PCI: 00:1c.6: enabled 0
713 15:01:17.892547 PCI: 00:1c.7: enabled 0
714 15:01:17.895791 PCI: 00:1d.0: enabled 1
715 15:01:17.898807 PCI: 00:1d.1: enabled 0
716 15:01:17.902219 PCI: 00:1d.2: enabled 0
717 15:01:17.902295 PCI: 00:1d.3: enabled 0
718 15:01:17.905826 PCI: 00:1d.4: enabled 0
719 15:01:17.908594 PCI: 00:1d.5: enabled 1
720 15:01:17.912069 PCI: 00:1e.0: enabled 1
721 15:01:17.912148 PCI: 00:1e.1: enabled 0
722 15:01:17.915583 PCI: 00:1e.2: enabled 1
723 15:01:17.918516 PCI: 00:1e.3: enabled 1
724 15:01:17.921953 PCI: 00:1f.0: enabled 1
725 15:01:17.922033 PCI: 00:1f.1: enabled 1
726 15:01:17.925250 PCI: 00:1f.2: enabled 1
727 15:01:17.928633 PCI: 00:1f.3: enabled 1
728 15:01:17.931521 PCI: 00:1f.4: enabled 1
729 15:01:17.931604 PCI: 00:1f.5: enabled 1
730 15:01:17.934925 PCI: 00:1f.6: enabled 0
731 15:01:17.938338 USB0 port 0: enabled 1
732 15:01:17.938422 I2C: 00:15: enabled 1
733 15:01:17.941725 I2C: 00:5d: enabled 1
734 15:01:17.944501 GENERIC: 0.0: enabled 1
735 15:01:17.948074 I2C: 00:1a: enabled 1
736 15:01:17.948170 I2C: 00:38: enabled 1
737 15:01:17.950965 I2C: 00:39: enabled 1
738 15:01:17.954391 I2C: 00:3a: enabled 1
739 15:01:17.954497 I2C: 00:3b: enabled 1
740 15:01:17.957739 PCI: 00:00.0: enabled 1
741 15:01:17.961179 SPI: 00: enabled 1
742 15:01:17.961255 SPI: 01: enabled 1
743 15:01:17.964058 PNP: 0c09.0: enabled 1
744 15:01:17.967388 USB2 port 0: enabled 1
745 15:01:17.967469 USB2 port 1: enabled 1
746 15:01:17.971015 USB2 port 2: enabled 0
747 15:01:17.973901 USB2 port 3: enabled 0
748 15:01:17.977333 USB2 port 5: enabled 0
749 15:01:17.977415 USB2 port 6: enabled 1
750 15:01:17.980759 USB2 port 9: enabled 1
751 15:01:17.983753 USB3 port 0: enabled 1
752 15:01:17.983829 USB3 port 1: enabled 1
753 15:01:17.987188 USB3 port 2: enabled 1
754 15:01:17.990211 USB3 port 3: enabled 1
755 15:01:17.993594 USB3 port 4: enabled 0
756 15:01:17.993675 APIC: 03: enabled 1
757 15:01:17.996992 APIC: 01: enabled 1
758 15:01:17.997081 APIC: 02: enabled 1
759 15:01:18.000359 APIC: 05: enabled 1
760 15:01:18.003898 APIC: 04: enabled 1
761 15:01:18.003987 APIC: 06: enabled 1
762 15:01:18.006756 APIC: 07: enabled 1
763 15:01:18.010150 Compare with tree...
764 15:01:18.010228 Root Device: enabled 1
765 15:01:18.013086 CPU_CLUSTER: 0: enabled 1
766 15:01:18.016648 APIC: 00: enabled 1
767 15:01:18.016724 APIC: 03: enabled 1
768 15:01:18.019565 APIC: 01: enabled 1
769 15:01:18.023008 APIC: 02: enabled 1
770 15:01:18.026520 APIC: 05: enabled 1
771 15:01:18.026600 APIC: 04: enabled 1
772 15:01:18.029775 APIC: 06: enabled 1
773 15:01:18.032713 APIC: 07: enabled 1
774 15:01:18.032848 DOMAIN: 0000: enabled 1
775 15:01:18.036178 PCI: 00:00.0: enabled 1
776 15:01:18.039515 PCI: 00:02.0: enabled 1
777 15:01:18.042428 PCI: 00:04.0: enabled 0
778 15:01:18.045923 PCI: 00:05.0: enabled 0
779 15:01:18.046007 PCI: 00:12.0: enabled 1
780 15:01:18.049412 PCI: 00:12.5: enabled 0
781 15:01:18.052352 PCI: 00:12.6: enabled 0
782 15:01:18.055834 PCI: 00:14.0: enabled 1
783 15:01:18.059254 USB0 port 0: enabled 1
784 15:01:18.059334 USB2 port 0: enabled 1
785 15:01:18.062589 USB2 port 1: enabled 1
786 15:01:18.065551 USB2 port 2: enabled 0
787 15:01:18.068866 USB2 port 3: enabled 0
788 15:01:18.072392 USB2 port 5: enabled 0
789 15:01:18.075235 USB2 port 6: enabled 1
790 15:01:18.075310 USB2 port 9: enabled 1
791 15:01:18.078540 USB3 port 0: enabled 1
792 15:01:18.081911 USB3 port 1: enabled 1
793 15:01:18.084814 USB3 port 2: enabled 1
794 15:01:18.088312 USB3 port 3: enabled 1
795 15:01:18.091735 USB3 port 4: enabled 0
796 15:01:18.091809 PCI: 00:14.1: enabled 0
797 15:01:18.094633 PCI: 00:14.3: enabled 1
798 15:01:18.098093 PCI: 00:14.5: enabled 0
799 15:01:18.101536 PCI: 00:15.0: enabled 1
800 15:01:18.104455 I2C: 00:15: enabled 1
801 15:01:18.104531 PCI: 00:15.1: enabled 1
802 15:01:18.107970 I2C: 00:5d: enabled 1
803 15:01:18.111539 GENERIC: 0.0: enabled 1
804 15:01:18.114283 PCI: 00:15.2: enabled 0
805 15:01:18.117808 PCI: 00:15.3: enabled 0
806 15:01:18.117884 PCI: 00:16.0: enabled 1
807 15:01:18.121324 PCI: 00:16.1: enabled 0
808 15:01:18.124248 PCI: 00:16.2: enabled 0
809 15:01:18.127644 PCI: 00:16.3: enabled 0
810 15:01:18.130765 PCI: 00:16.4: enabled 0
811 15:01:18.130839 PCI: 00:16.5: enabled 0
812 15:01:18.134311 PCI: 00:17.0: enabled 1
813 15:01:18.137154 PCI: 00:19.0: enabled 1
814 15:01:18.140474 I2C: 00:1a: enabled 1
815 15:01:18.143894 I2C: 00:38: enabled 1
816 15:01:18.143978 I2C: 00:39: enabled 1
817 15:01:18.147279 I2C: 00:3a: enabled 1
818 15:01:18.150625 I2C: 00:3b: enabled 1
819 15:01:18.153635 PCI: 00:19.1: enabled 0
820 15:01:18.156893 PCI: 00:19.2: enabled 0
821 15:01:18.156973 PCI: 00:1a.0: enabled 0
822 15:01:18.160271 PCI: 00:1c.0: enabled 0
823 15:01:18.163656 PCI: 00:1c.1: enabled 0
824 15:01:18.166547 PCI: 00:1c.2: enabled 0
825 15:01:18.170138 PCI: 00:1c.3: enabled 0
826 15:01:18.170220 PCI: 00:1c.4: enabled 0
827 15:01:18.173529 PCI: 00:1c.5: enabled 0
828 15:01:18.176398 PCI: 00:1c.6: enabled 0
829 15:01:18.179787 PCI: 00:1c.7: enabled 0
830 15:01:18.183128 PCI: 00:1d.0: enabled 1
831 15:01:18.183205 PCI: 00:1d.1: enabled 0
832 15:01:18.186517 PCI: 00:1d.2: enabled 0
833 15:01:18.189448 PCI: 00:1d.3: enabled 0
834 15:01:18.192983 PCI: 00:1d.4: enabled 0
835 15:01:18.196341 PCI: 00:1d.5: enabled 1
836 15:01:18.196435 PCI: 00:00.0: enabled 1
837 15:01:18.199180 PCI: 00:1e.0: enabled 1
838 15:01:18.202514 PCI: 00:1e.1: enabled 0
839 15:01:18.205991 PCI: 00:1e.2: enabled 1
840 15:01:18.209405 SPI: 00: enabled 1
841 15:01:18.209482 PCI: 00:1e.3: enabled 1
842 15:01:18.212272 SPI: 01: enabled 1
843 15:01:18.215671 PCI: 00:1f.0: enabled 1
844 15:01:18.219133 PNP: 0c09.0: enabled 1
845 15:01:18.219214 PCI: 00:1f.1: enabled 1
846 15:01:18.222125 PCI: 00:1f.2: enabled 1
847 15:01:18.225505 PCI: 00:1f.3: enabled 1
848 15:01:18.229124 PCI: 00:1f.4: enabled 1
849 15:01:18.231841 PCI: 00:1f.5: enabled 1
850 15:01:18.235656 PCI: 00:1f.6: enabled 0
851 15:01:18.235745 Root Device scanning...
852 15:01:18.238462 scan_static_bus for Root Device
853 15:01:18.241897 CPU_CLUSTER: 0 enabled
854 15:01:18.244700 DOMAIN: 0000 enabled
855 15:01:18.248237 DOMAIN: 0000 scanning...
856 15:01:18.251770 PCI: pci_scan_bus for bus 00
857 15:01:18.251850 PCI: 00:00.0 [8086/0000] ops
858 15:01:18.254625 PCI: 00:00.0 [8086/9b61] enabled
859 15:01:18.261394 PCI: 00:02.0 [8086/0000] bus ops
860 15:01:18.264657 PCI: 00:02.0 [8086/9b41] enabled
861 15:01:18.267564 PCI: 00:04.0 [8086/1903] disabled
862 15:01:18.271390 PCI: 00:08.0 [8086/1911] enabled
863 15:01:18.274085 PCI: 00:12.0 [8086/02f9] enabled
864 15:01:18.277626 PCI: 00:14.0 [8086/0000] bus ops
865 15:01:18.280519 PCI: 00:14.0 [8086/02ed] enabled
866 15:01:18.283828 PCI: 00:14.2 [8086/02ef] enabled
867 15:01:18.287123 PCI: 00:14.3 [8086/02f0] enabled
868 15:01:18.290615 PCI: 00:15.0 [8086/0000] bus ops
869 15:01:18.293422 PCI: 00:15.0 [8086/02e8] enabled
870 15:01:18.296879 PCI: 00:15.1 [8086/0000] bus ops
871 15:01:18.300315 PCI: 00:15.1 [8086/02e9] enabled
872 15:01:18.303717 PCI: 00:16.0 [8086/0000] ops
873 15:01:18.306546 PCI: 00:16.0 [8086/02e0] enabled
874 15:01:18.310080 PCI: 00:17.0 [8086/0000] ops
875 15:01:18.313538 PCI: 00:17.0 [8086/02d3] enabled
876 15:01:18.316450 PCI: 00:19.0 [8086/0000] bus ops
877 15:01:18.319861 PCI: 00:19.0 [8086/02c5] enabled
878 15:01:18.323328 PCI: 00:1d.0 [8086/0000] bus ops
879 15:01:18.326749 PCI: 00:1d.0 [8086/02b0] enabled
880 15:01:18.329783 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 15:01:18.333005 PCI: 00:1e.0 [8086/0000] ops
882 15:01:18.336226 PCI: 00:1e.0 [8086/02a8] enabled
883 15:01:18.339693 PCI: 00:1e.2 [8086/0000] bus ops
884 15:01:18.342625 PCI: 00:1e.2 [8086/02aa] enabled
885 15:01:18.346180 PCI: 00:1e.3 [8086/0000] bus ops
886 15:01:18.349489 PCI: 00:1e.3 [8086/02ab] enabled
887 15:01:18.352971 PCI: 00:1f.0 [8086/0000] bus ops
888 15:01:18.355879 PCI: 00:1f.0 [8086/0284] enabled
889 15:01:18.362656 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 15:01:18.368837 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 15:01:18.372334 PCI: 00:1f.3 [8086/0000] bus ops
892 15:01:18.375556 PCI: 00:1f.3 [8086/02c8] enabled
893 15:01:18.378467 PCI: 00:1f.4 [8086/0000] bus ops
894 15:01:18.381852 PCI: 00:1f.4 [8086/02a3] enabled
895 15:01:18.385287 PCI: 00:1f.5 [8086/0000] bus ops
896 15:01:18.388665 PCI: 00:1f.5 [8086/02a4] enabled
897 15:01:18.391542 PCI: Leftover static devices:
898 15:01:18.391629 PCI: 00:05.0
899 15:01:18.395026 PCI: 00:12.5
900 15:01:18.395111 PCI: 00:12.6
901 15:01:18.398492 PCI: 00:14.1
902 15:01:18.398566 PCI: 00:14.5
903 15:01:18.401369 PCI: 00:15.2
904 15:01:18.401444 PCI: 00:15.3
905 15:01:18.401507 PCI: 00:16.1
906 15:01:18.404718 PCI: 00:16.2
907 15:01:18.404800 PCI: 00:16.3
908 15:01:18.408276 PCI: 00:16.4
909 15:01:18.408350 PCI: 00:16.5
910 15:01:18.408414 PCI: 00:19.1
911 15:01:18.411098 PCI: 00:19.2
912 15:01:18.411184 PCI: 00:1a.0
913 15:01:18.414484 PCI: 00:1c.0
914 15:01:18.414563 PCI: 00:1c.1
915 15:01:18.418008 PCI: 00:1c.2
916 15:01:18.418086 PCI: 00:1c.3
917 15:01:18.418150 PCI: 00:1c.4
918 15:01:18.420965 PCI: 00:1c.5
919 15:01:18.421046 PCI: 00:1c.6
920 15:01:18.424405 PCI: 00:1c.7
921 15:01:18.424483 PCI: 00:1d.1
922 15:01:18.424547 PCI: 00:1d.2
923 15:01:18.427260 PCI: 00:1d.3
924 15:01:18.427335 PCI: 00:1d.4
925 15:01:18.430779 PCI: 00:1d.5
926 15:01:18.430861 PCI: 00:1e.1
927 15:01:18.434358 PCI: 00:1f.1
928 15:01:18.434431 PCI: 00:1f.2
929 15:01:18.434503 PCI: 00:1f.6
930 15:01:18.437439 PCI: Check your devicetree.cb.
931 15:01:18.440398 PCI: 00:02.0 scanning...
932 15:01:18.443829 scan_generic_bus for PCI: 00:02.0
933 15:01:18.447272 scan_generic_bus for PCI: 00:02.0 done
934 15:01:18.453540 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
935 15:01:18.457080 PCI: 00:14.0 scanning...
936 15:01:18.459967 scan_static_bus for PCI: 00:14.0
937 15:01:18.463377 USB0 port 0 enabled
938 15:01:18.463462 USB0 port 0 scanning...
939 15:01:18.466611 scan_static_bus for USB0 port 0
940 15:01:18.470039 USB2 port 0 enabled
941 15:01:18.473467 USB2 port 1 enabled
942 15:01:18.473557 USB2 port 2 disabled
943 15:01:18.476411 USB2 port 3 disabled
944 15:01:18.479891 USB2 port 5 disabled
945 15:01:18.479969 USB2 port 6 enabled
946 15:01:18.482870 USB2 port 9 enabled
947 15:01:18.486206 USB3 port 0 enabled
948 15:01:18.486291 USB3 port 1 enabled
949 15:01:18.489692 USB3 port 2 enabled
950 15:01:18.489773 USB3 port 3 enabled
951 15:01:18.492846 USB3 port 4 disabled
952 15:01:18.496351 USB2 port 0 scanning...
953 15:01:18.499719 scan_static_bus for USB2 port 0
954 15:01:18.502606 scan_static_bus for USB2 port 0 done
955 15:01:18.509004 scan_bus: scanning of bus USB2 port 0 took 9712 usecs
956 15:01:18.509091 USB2 port 1 scanning...
957 15:01:18.512494 scan_static_bus for USB2 port 1
958 15:01:18.519450 scan_static_bus for USB2 port 1 done
959 15:01:18.522396 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
960 15:01:18.526061 USB2 port 6 scanning...
961 15:01:18.528857 scan_static_bus for USB2 port 6
962 15:01:18.532255 scan_static_bus for USB2 port 6 done
963 15:01:18.538561 scan_bus: scanning of bus USB2 port 6 took 9712 usecs
964 15:01:18.541822 USB2 port 9 scanning...
965 15:01:18.545380 scan_static_bus for USB2 port 9
966 15:01:18.548723 scan_static_bus for USB2 port 9 done
967 15:01:18.552060 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
968 15:01:18.554934 USB3 port 0 scanning...
969 15:01:18.558312 scan_static_bus for USB3 port 0
970 15:01:18.561873 scan_static_bus for USB3 port 0 done
971 15:01:18.568138 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
972 15:01:18.571453 USB3 port 1 scanning...
973 15:01:18.574890 scan_static_bus for USB3 port 1
974 15:01:18.577846 scan_static_bus for USB3 port 1 done
975 15:01:18.584663 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
976 15:01:18.584768 USB3 port 2 scanning...
977 15:01:18.588027 scan_static_bus for USB3 port 2
978 15:01:18.594350 scan_static_bus for USB3 port 2 done
979 15:01:18.597746 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
980 15:01:18.600615 USB3 port 3 scanning...
981 15:01:18.604103 scan_static_bus for USB3 port 3
982 15:01:18.607435 scan_static_bus for USB3 port 3 done
983 15:01:18.613838 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
984 15:01:18.616854 scan_static_bus for USB0 port 0 done
985 15:01:18.623824 scan_bus: scanning of bus USB0 port 0 took 155434 usecs
986 15:01:18.626674 scan_static_bus for PCI: 00:14.0 done
987 15:01:18.633548 scan_bus: scanning of bus PCI: 00:14.0 took 173063 usecs
988 15:01:18.633650 PCI: 00:15.0 scanning...
989 15:01:18.636553 scan_generic_bus for PCI: 00:15.0
990 15:01:18.643132 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 15:01:18.646479 scan_generic_bus for PCI: 00:15.0 done
992 15:01:18.653102 scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs
993 15:01:18.653201 PCI: 00:15.1 scanning...
994 15:01:18.659808 scan_generic_bus for PCI: 00:15.1
995 15:01:18.662793 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 15:01:18.666279 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 15:01:18.669606 scan_generic_bus for PCI: 00:15.1 done
998 15:01:18.675716 scan_bus: scanning of bus PCI: 00:15.1 took 18621 usecs
999 15:01:18.679234 PCI: 00:19.0 scanning...
1000 15:01:18.682730 scan_generic_bus for PCI: 00:19.0
1001 15:01:18.685554 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 15:01:18.689005 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 15:01:18.695713 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 15:01:18.698586 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 15:01:18.702108 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 15:01:18.705034 scan_generic_bus for PCI: 00:19.0 done
1007 15:01:18.711824 scan_bus: scanning of bus PCI: 00:19.0 took 30753 usecs
1008 15:01:18.715443 PCI: 00:1d.0 scanning...
1009 15:01:18.718833 do_pci_scan_bridge for PCI: 00:1d.0
1010 15:01:18.721705 PCI: pci_scan_bus for bus 01
1011 15:01:18.725292 PCI: 01:00.0 [1c5c/1327] enabled
1012 15:01:18.728015 Enabling Common Clock Configuration
1013 15:01:18.731472 L1 Sub-State supported from root port 29
1014 15:01:18.734918 L1 Sub-State Support = 0xf
1015 15:01:18.737868 CommonModeRestoreTime = 0x28
1016 15:01:18.741316 Power On Value = 0x16, Power On Scale = 0x0
1017 15:01:18.744585 ASPM: Enabled L1
1018 15:01:18.750889 scan_bus: scanning of bus PCI: 00:1d.0 took 32808 usecs
1019 15:01:18.750969 PCI: 00:1e.2 scanning...
1020 15:01:18.757790 scan_generic_bus for PCI: 00:1e.2
1021 15:01:18.761193 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 15:01:18.764548 scan_generic_bus for PCI: 00:1e.2 done
1023 15:01:18.770817 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
1024 15:01:18.770894 PCI: 00:1e.3 scanning...
1025 15:01:18.774126 scan_generic_bus for PCI: 00:1e.3
1026 15:01:18.780378 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 15:01:18.783897 scan_generic_bus for PCI: 00:1e.3 done
1028 15:01:18.790706 scan_bus: scanning of bus PCI: 00:1e.3 took 13995 usecs
1029 15:01:18.790793 PCI: 00:1f.0 scanning...
1030 15:01:18.793576 scan_static_bus for PCI: 00:1f.0
1031 15:01:18.796986 PNP: 0c09.0 enabled
1032 15:01:18.800334 scan_static_bus for PCI: 00:1f.0 done
1033 15:01:18.806621 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1034 15:01:18.810042 PCI: 00:1f.3 scanning...
1035 15:01:18.813435 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1036 15:01:18.816852 PCI: 00:1f.4 scanning...
1037 15:01:18.819928 scan_generic_bus for PCI: 00:1f.4
1038 15:01:18.826264 scan_generic_bus for PCI: 00:1f.4 done
1039 15:01:18.829618 scan_bus: scanning of bus PCI: 00:1f.4 took 10199 usecs
1040 15:01:18.832998 PCI: 00:1f.5 scanning...
1041 15:01:18.836453 scan_generic_bus for PCI: 00:1f.5
1042 15:01:18.839337 scan_generic_bus for PCI: 00:1f.5 done
1043 15:01:18.846141 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1044 15:01:18.852429 scan_bus: scanning of bus DOMAIN: 0000 took 605326 usecs
1045 15:01:18.855947 scan_static_bus for Root Device done
1046 15:01:18.862223 scan_bus: scanning of bus Root Device took 625206 usecs
1047 15:01:18.862308 done
1048 15:01:18.865658 Chrome EC: UHEPI supported
1049 15:01:18.872044 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 15:01:18.875871 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 15:01:18.882092 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 15:01:18.889551 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 15:01:18.892429 SPI flash protection: WPSW=0 SRP0=0
1054 15:01:18.899202 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 15:01:18.902633 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 15:01:18.906105 found VGA at PCI: 00:02.0
1057 15:01:18.909050 Setting up VGA for PCI: 00:02.0
1058 15:01:18.915916 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 15:01:18.918862 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 15:01:18.922250 Allocating resources...
1061 15:01:18.925806 Reading resources...
1062 15:01:18.928662 Root Device read_resources bus 0 link: 0
1063 15:01:18.932194 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 15:01:18.938487 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 15:01:18.941961 DOMAIN: 0000 read_resources bus 0 link: 0
1066 15:01:18.949778 PCI: 00:14.0 read_resources bus 0 link: 0
1067 15:01:18.953189 USB0 port 0 read_resources bus 0 link: 0
1068 15:01:18.961122 USB0 port 0 read_resources bus 0 link: 0 done
1069 15:01:18.964586 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 15:01:18.972018 PCI: 00:15.0 read_resources bus 1 link: 0
1071 15:01:18.974835 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 15:01:18.981501 PCI: 00:15.1 read_resources bus 2 link: 0
1073 15:01:18.985064 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 15:01:18.992446 PCI: 00:19.0 read_resources bus 3 link: 0
1075 15:01:18.999251 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 15:01:19.002702 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 15:01:19.009007 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 15:01:19.011892 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 15:01:19.018682 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 15:01:19.022266 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 15:01:19.028567 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 15:01:19.032041 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 15:01:19.038363 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 15:01:19.044891 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 15:01:19.048321 Root Device read_resources bus 0 link: 0 done
1086 15:01:19.051558 Done reading resources.
1087 15:01:19.057793 Show resources in subtree (Root Device)...After reading.
1088 15:01:19.061267 Root Device child on link 0 CPU_CLUSTER: 0
1089 15:01:19.064654 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 15:01:19.067565 APIC: 00
1091 15:01:19.067649 APIC: 03
1092 15:01:19.071046 APIC: 01
1093 15:01:19.071131 APIC: 02
1094 15:01:19.071196 APIC: 05
1095 15:01:19.120452 APIC: 04
1096 15:01:19.120554 APIC: 06
1097 15:01:19.120620 APIC: 07
1098 15:01:19.121019 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 15:01:19.121314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 15:01:19.121388 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 15:01:19.121477 PCI: 00:00.0
1102 15:01:19.121742 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 15:01:19.121811 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 15:01:19.170660 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 15:01:19.170757 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 15:01:19.171021 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 15:01:19.171585 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 15:01:19.172627 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 15:01:19.220380 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 15:01:19.221305 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 15:01:19.221580 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 15:01:19.221861 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 15:01:19.221931 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 15:01:19.240177 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 15:01:19.240727 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 15:01:19.243714 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 15:01:19.250245 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 15:01:19.253393 PCI: 00:02.0
1119 15:01:19.263540 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 15:01:19.273229 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 15:01:19.282962 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 15:01:19.283048 PCI: 00:04.0
1123 15:01:19.286273 PCI: 00:08.0
1124 15:01:19.296178 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 15:01:19.296263 PCI: 00:12.0
1126 15:01:19.305899 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 15:01:19.312043 PCI: 00:14.0 child on link 0 USB0 port 0
1128 15:01:19.321838 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 15:01:19.325256 USB0 port 0 child on link 0 USB2 port 0
1130 15:01:19.325332 USB2 port 0
1131 15:01:19.328715 USB2 port 1
1132 15:01:19.331590 USB2 port 2
1133 15:01:19.331675 USB2 port 3
1134 15:01:19.335125 USB2 port 5
1135 15:01:19.335210 USB2 port 6
1136 15:01:19.338540 USB2 port 9
1137 15:01:19.338624 USB3 port 0
1138 15:01:19.341486 USB3 port 1
1139 15:01:19.341570 USB3 port 2
1140 15:01:19.344833 USB3 port 3
1141 15:01:19.344916 USB3 port 4
1142 15:01:19.348378 PCI: 00:14.2
1143 15:01:19.357984 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 15:01:19.367604 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 15:01:19.367690 PCI: 00:14.3
1146 15:01:19.380591 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 15:01:19.383947 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 15:01:19.393801 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 15:01:19.393890 I2C: 01:15
1150 15:01:19.400560 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 15:01:19.410001 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 15:01:19.410087 I2C: 02:5d
1153 15:01:19.413432 GENERIC: 0.0
1154 15:01:19.413515 PCI: 00:16.0
1155 15:01:19.423155 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 15:01:19.426595 PCI: 00:17.0
1157 15:01:19.436347 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 15:01:19.442747 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 15:01:19.452572 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 15:01:19.459360 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 15:01:19.469105 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 15:01:19.479146 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 15:01:19.482069 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 15:01:19.491669 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:01:19.491762 I2C: 03:1a
1166 15:01:19.495226 I2C: 03:38
1167 15:01:19.495303 I2C: 03:39
1168 15:01:19.498654 I2C: 03:3a
1169 15:01:19.498731 I2C: 03:3b
1170 15:01:19.504937 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 15:01:19.511738 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 15:01:19.521433 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 15:01:19.531235 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 15:01:19.534625 PCI: 01:00.0
1175 15:01:19.543888 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 15:01:19.543975 PCI: 00:1e.0
1177 15:01:19.557348 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 15:01:19.566865 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 15:01:19.570372 PCI: 00:1e.2 child on link 0 SPI: 00
1180 15:01:19.580178 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:01:19.580267 SPI: 00
1182 15:01:19.586455 PCI: 00:1e.3 child on link 0 SPI: 01
1183 15:01:19.596450 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 15:01:19.596536 SPI: 01
1185 15:01:19.599426 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 15:01:19.609252 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 15:01:19.618913 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 15:01:19.619002 PNP: 0c09.0
1189 15:01:19.629249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 15:01:19.632074 PCI: 00:1f.3
1191 15:01:19.641773 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 15:01:19.651711 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 15:01:19.651811 PCI: 00:1f.4
1194 15:01:19.661580 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 15:01:19.671127 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 15:01:19.671214 PCI: 00:1f.5
1197 15:01:19.680928 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 15:01:19.687635 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 15:01:19.694371 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 15:01:19.700879 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 15:01:19.704160 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 15:01:19.706997 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 15:01:19.713767 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 15:01:19.717137 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 15:01:19.723455 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 15:01:19.729883 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 15:01:19.736551 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 15:01:19.746385 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 15:01:19.752687 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 15:01:19.756194 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 15:01:19.762424 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 15:01:19.769198 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 15:01:19.772569 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 15:01:19.778911 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 15:01:19.782462 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 15:01:19.788999 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 15:01:19.792344 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 15:01:19.798979 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 15:01:19.801894 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 15:01:19.808245 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 15:01:19.811551 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 15:01:19.818420 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 15:01:19.821449 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 15:01:19.828320 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 15:01:19.831674 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 15:01:19.838058 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 15:01:19.840988 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 15:01:19.847442 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 15:01:19.850976 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 15:01:19.857248 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 15:01:19.860713 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 15:01:19.867429 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 15:01:19.870813 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 15:01:19.877135 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 15:01:19.884035 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 15:01:19.886883 avoid_fixed_resources: DOMAIN: 0000
1237 15:01:19.893585 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 15:01:19.899655 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 15:01:19.906652 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 15:01:19.916429 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 15:01:19.922659 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 15:01:19.929570 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 15:01:19.939303 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 15:01:19.945560 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 15:01:19.952139 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 15:01:19.961908 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 15:01:19.968645 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 15:01:19.974955 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 15:01:19.978374 Setting resources...
1250 15:01:19.984611 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 15:01:19.988104 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 15:01:19.991670 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 15:01:19.994928 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 15:01:20.000990 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 15:01:20.004582 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 15:01:20.010873 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 15:01:20.017768 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 15:01:20.027269 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 15:01:20.030697 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 15:01:20.037025 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 15:01:20.040431 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 15:01:20.046743 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 15:01:20.050356 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 15:01:20.056710 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 15:01:20.059636 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 15:01:20.066432 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 15:01:20.069895 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 15:01:20.076126 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 15:01:20.079523 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 15:01:20.086050 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 15:01:20.088929 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 15:01:20.095982 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 15:01:20.099267 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 15:01:20.105471 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 15:01:20.109020 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 15:01:20.115339 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 15:01:20.118661 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 15:01:20.125001 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 15:01:20.128539 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 15:01:20.135298 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 15:01:20.138651 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 15:01:20.144893 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 15:01:20.154782 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 15:01:20.161163 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 15:01:20.167576 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 15:01:20.174277 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 15:01:20.180443 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 15:01:20.183956 Root Device assign_resources, bus 0 link: 0
1289 15:01:20.190258 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 15:01:20.197138 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 15:01:20.207144 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 15:01:20.213544 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 15:01:20.223089 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 15:01:20.229936 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 15:01:20.239577 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 15:01:20.242952 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 15:01:20.249216 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 15:01:20.256084 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 15:01:20.265387 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 15:01:20.272266 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 15:01:20.281964 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 15:01:20.285286 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 15:01:20.291478 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 15:01:20.298416 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 15:01:20.304419 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 15:01:20.307675 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 15:01:20.317529 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 15:01:20.323998 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 15:01:20.330787 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 15:01:20.340397 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 15:01:20.347295 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 15:01:20.356574 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 15:01:20.363313 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 15:01:20.369731 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 15:01:20.376056 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 15:01:20.379366 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 15:01:20.389944 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 15:01:20.398887 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 15:01:20.405769 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 15:01:20.411960 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 15:01:20.418853 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 15:01:20.425197 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 15:01:20.431912 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 15:01:20.441367 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 15:01:20.444859 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 15:01:20.448189 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 15:01:20.458707 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 15:01:20.461519 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 15:01:20.467882 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 15:01:20.471355 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 15:01:20.477822 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 15:01:20.481128 LPC: Trying to open IO window from 800 size 1ff
1333 15:01:20.490640 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 15:01:20.497505 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 15:01:20.507307 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 15:01:20.513948 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 15:01:20.520400 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 15:01:20.523275 Root Device assign_resources, bus 0 link: 0
1339 15:01:20.526707 Done setting resources.
1340 15:01:20.532989 Show resources in subtree (Root Device)...After assigning values.
1341 15:01:20.536414 Root Device child on link 0 CPU_CLUSTER: 0
1342 15:01:20.543210 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 15:01:20.543294 APIC: 00
1344 15:01:20.543360 APIC: 03
1345 15:01:20.546570 APIC: 01
1346 15:01:20.546645 APIC: 02
1347 15:01:20.549344 APIC: 05
1348 15:01:20.549424 APIC: 04
1349 15:01:20.549521 APIC: 06
1350 15:01:20.552793 APIC: 07
1351 15:01:20.556226 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 15:01:20.566130 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 15:01:20.576098 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 15:01:20.578902 PCI: 00:00.0
1355 15:01:20.588501 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 15:01:20.598314 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 15:01:20.607976 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 15:01:20.614767 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 15:01:20.624574 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 15:01:20.634181 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 15:01:20.643951 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 15:01:20.654210 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 15:01:20.664047 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 15:01:20.670405 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 15:01:20.680328 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 15:01:20.690163 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 15:01:20.699748 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 15:01:20.709507 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 15:01:20.719588 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 15:01:20.729401 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 15:01:20.729484 PCI: 00:02.0
1372 15:01:20.742425 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 15:01:20.752220 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 15:01:20.761854 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 15:01:20.761939 PCI: 00:04.0
1376 15:01:20.765265 PCI: 00:08.0
1377 15:01:20.774634 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 15:01:20.774720 PCI: 00:12.0
1379 15:01:20.787636 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 15:01:20.790702 PCI: 00:14.0 child on link 0 USB0 port 0
1381 15:01:20.801055 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 15:01:20.803817 USB0 port 0 child on link 0 USB2 port 0
1383 15:01:20.807294 USB2 port 0
1384 15:01:20.810750 USB2 port 1
1385 15:01:20.810883 USB2 port 2
1386 15:01:20.814131 USB2 port 3
1387 15:01:20.814248 USB2 port 5
1388 15:01:20.816925 USB2 port 6
1389 15:01:20.817058 USB2 port 9
1390 15:01:20.820383 USB3 port 0
1391 15:01:20.820527 USB3 port 1
1392 15:01:20.823889 USB3 port 2
1393 15:01:20.824050 USB3 port 3
1394 15:01:20.827286 USB3 port 4
1395 15:01:20.827462 PCI: 00:14.2
1396 15:01:20.840228 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 15:01:20.849982 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 15:01:20.850435 PCI: 00:14.3
1399 15:01:20.859684 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 15:01:20.866673 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 15:01:20.876498 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 15:01:20.877153 I2C: 01:15
1403 15:01:20.882830 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 15:01:20.892565 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 15:01:20.893090 I2C: 02:5d
1406 15:01:20.895936 GENERIC: 0.0
1407 15:01:20.896365 PCI: 00:16.0
1408 15:01:20.908644 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 15:01:20.909174 PCI: 00:17.0
1410 15:01:20.918291 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 15:01:20.928488 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 15:01:20.938051 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 15:01:20.947627 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 15:01:20.957170 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 15:01:20.967446 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 15:01:20.970391 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 15:01:20.980360 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 15:01:20.983728 I2C: 03:1a
1419 15:01:20.983963 I2C: 03:38
1420 15:01:20.986694 I2C: 03:39
1421 15:01:20.986929 I2C: 03:3a
1422 15:01:20.990048 I2C: 03:3b
1423 15:01:20.993579 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 15:01:21.003256 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 15:01:21.012995 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 15:01:21.022500 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 15:01:21.025929 PCI: 01:00.0
1428 15:01:21.035711 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 15:01:21.035964 PCI: 00:1e.0
1430 15:01:21.048788 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 15:01:21.058538 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 15:01:21.062039 PCI: 00:1e.2 child on link 0 SPI: 00
1433 15:01:21.071790 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 15:01:21.074686 SPI: 00
1435 15:01:21.078147 PCI: 00:1e.3 child on link 0 SPI: 01
1436 15:01:21.088030 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 15:01:21.088268 SPI: 01
1438 15:01:21.094759 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 15:01:21.101020 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 15:01:21.110672 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 15:01:21.114082 PNP: 0c09.0
1442 15:01:21.120699 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 15:01:21.124059 PCI: 00:1f.3
1444 15:01:21.133782 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 15:01:21.143605 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 15:01:21.146959 PCI: 00:1f.4
1447 15:01:21.156625 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 15:01:21.166318 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 15:01:21.166407 PCI: 00:1f.5
1450 15:01:21.175791 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 15:01:21.179205 Done allocating resources.
1452 15:01:21.185639 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 15:01:21.189136 Enabling resources...
1454 15:01:21.192541 PCI: 00:00.0 subsystem <- 8086/9b61
1455 15:01:21.195923 PCI: 00:00.0 cmd <- 06
1456 15:01:21.198705 PCI: 00:02.0 subsystem <- 8086/9b41
1457 15:01:21.202073 PCI: 00:02.0 cmd <- 03
1458 15:01:21.202158 PCI: 00:08.0 cmd <- 06
1459 15:01:21.209014 PCI: 00:12.0 subsystem <- 8086/02f9
1460 15:01:21.209100 PCI: 00:12.0 cmd <- 02
1461 15:01:21.212347 PCI: 00:14.0 subsystem <- 8086/02ed
1462 15:01:21.215779 PCI: 00:14.0 cmd <- 02
1463 15:01:21.218630 PCI: 00:14.2 cmd <- 02
1464 15:01:21.221997 PCI: 00:14.3 subsystem <- 8086/02f0
1465 15:01:21.225356 PCI: 00:14.3 cmd <- 02
1466 15:01:21.228596 PCI: 00:15.0 subsystem <- 8086/02e8
1467 15:01:21.231565 PCI: 00:15.0 cmd <- 02
1468 15:01:21.235119 PCI: 00:15.1 subsystem <- 8086/02e9
1469 15:01:21.238479 PCI: 00:15.1 cmd <- 02
1470 15:01:21.241416 PCI: 00:16.0 subsystem <- 8086/02e0
1471 15:01:21.244833 PCI: 00:16.0 cmd <- 02
1472 15:01:21.248221 PCI: 00:17.0 subsystem <- 8086/02d3
1473 15:01:21.251079 PCI: 00:17.0 cmd <- 03
1474 15:01:21.254461 PCI: 00:19.0 subsystem <- 8086/02c5
1475 15:01:21.257896 PCI: 00:19.0 cmd <- 02
1476 15:01:21.261401 PCI: 00:1d.0 bridge ctrl <- 0013
1477 15:01:21.264188 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 15:01:21.264275 PCI: 00:1d.0 cmd <- 06
1479 15:01:21.271248 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 15:01:21.271334 PCI: 00:1e.0 cmd <- 06
1481 15:01:21.277577 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 15:01:21.277664 PCI: 00:1e.2 cmd <- 06
1483 15:01:21.281108 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 15:01:21.284408 PCI: 00:1e.3 cmd <- 02
1485 15:01:21.287276 PCI: 00:1f.0 subsystem <- 8086/0284
1486 15:01:21.290794 PCI: 00:1f.0 cmd <- 407
1487 15:01:21.294231 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 15:01:21.297447 PCI: 00:1f.3 cmd <- 02
1489 15:01:21.300423 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 15:01:21.303856 PCI: 00:1f.4 cmd <- 03
1491 15:01:21.307217 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 15:01:21.310083 PCI: 00:1f.5 cmd <- 406
1493 15:01:21.318612 PCI: 01:00.0 cmd <- 02
1494 15:01:21.323756 done.
1495 15:01:21.335634 ME: Version: 14.0.39.1367
1496 15:01:21.341828 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1497 15:01:21.345355 Initializing devices...
1498 15:01:21.345442 Root Device init ...
1499 15:01:21.352130 Chrome EC: Set SMI mask to 0x0000000000000000
1500 15:01:21.358480 Chrome EC: clear events_b mask to 0x0000000000000000
1501 15:01:21.361907 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 15:01:21.368236 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 15:01:21.374532 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 15:01:21.377932 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 15:01:21.384319 Root Device init finished in 35167 usecs
1506 15:01:21.387809 CPU_CLUSTER: 0 init ...
1507 15:01:21.390786 CPU_CLUSTER: 0 init finished in 2447 usecs
1508 15:01:21.396470 PCI: 00:00.0 init ...
1509 15:01:21.399810 CPU TDP: 15 Watts
1510 15:01:21.402632 CPU PL2 = 64 Watts
1511 15:01:21.406053 PCI: 00:00.0 init finished in 7079 usecs
1512 15:01:21.409598 PCI: 00:02.0 init ...
1513 15:01:21.412903 PCI: 00:02.0 init finished in 2252 usecs
1514 15:01:21.415755 PCI: 00:08.0 init ...
1515 15:01:21.419100 PCI: 00:08.0 init finished in 2251 usecs
1516 15:01:21.422551 PCI: 00:12.0 init ...
1517 15:01:21.426082 PCI: 00:12.0 init finished in 2243 usecs
1518 15:01:21.429263 PCI: 00:14.0 init ...
1519 15:01:21.432572 PCI: 00:14.0 init finished in 2252 usecs
1520 15:01:21.435450 PCI: 00:14.2 init ...
1521 15:01:21.438903 PCI: 00:14.2 init finished in 2251 usecs
1522 15:01:21.441792 PCI: 00:14.3 init ...
1523 15:01:21.445200 PCI: 00:14.3 init finished in 2259 usecs
1524 15:01:21.448620 PCI: 00:15.0 init ...
1525 15:01:21.452057 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 15:01:21.458673 PCI: 00:15.0 init finished in 5976 usecs
1527 15:01:21.458760 PCI: 00:15.1 init ...
1528 15:01:21.464883 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 15:01:21.468249 PCI: 00:15.1 init finished in 5976 usecs
1530 15:01:21.471654 PCI: 00:16.0 init ...
1531 15:01:21.474600 PCI: 00:16.0 init finished in 2251 usecs
1532 15:01:21.478065 PCI: 00:19.0 init ...
1533 15:01:21.481507 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 15:01:21.484506 PCI: 00:19.0 init finished in 5972 usecs
1535 15:01:21.487884 PCI: 00:1d.0 init ...
1536 15:01:21.491328 Initializing PCH PCIe bridge.
1537 15:01:21.494306 PCI: 00:1d.0 init finished in 5284 usecs
1538 15:01:21.498334 PCI: 00:1f.0 init ...
1539 15:01:21.501551 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 15:01:21.507849 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 15:01:21.507935 IOAPIC: ID = 0x02
1542 15:01:21.511223 IOAPIC: Dumping registers
1543 15:01:21.514079 reg 0x0000: 0x02000000
1544 15:01:21.517666 reg 0x0001: 0x00770020
1545 15:01:21.521028 reg 0x0002: 0x00000000
1546 15:01:21.523952 PCI: 00:1f.0 init finished in 23525 usecs
1547 15:01:21.527319 PCI: 00:1f.4 init ...
1548 15:01:21.530709 PCI: 00:1f.4 init finished in 2260 usecs
1549 15:01:21.542534 PCI: 01:00.0 init ...
1550 15:01:21.545380 PCI: 01:00.0 init finished in 2250 usecs
1551 15:01:21.549938 PNP: 0c09.0 init ...
1552 15:01:21.553320 Google Chrome EC uptime: 11.052 seconds
1553 15:01:21.559551 Google Chrome AP resets since EC boot: 0
1554 15:01:21.563103 Google Chrome most recent AP reset causes:
1555 15:01:21.569392 Google Chrome EC reset flags at last EC boot: reset-pin
1556 15:01:21.572791 PNP: 0c09.0 init finished in 20561 usecs
1557 15:01:21.576267 Devices initialized
1558 15:01:21.579159 Show all devs... After init.
1559 15:01:21.579246 Root Device: enabled 1
1560 15:01:21.582590 CPU_CLUSTER: 0: enabled 1
1561 15:01:21.586063 DOMAIN: 0000: enabled 1
1562 15:01:21.586149 APIC: 00: enabled 1
1563 15:01:21.589408 PCI: 00:00.0: enabled 1
1564 15:01:21.592306 PCI: 00:02.0: enabled 1
1565 15:01:21.595852 PCI: 00:04.0: enabled 0
1566 15:01:21.595932 PCI: 00:05.0: enabled 0
1567 15:01:21.598797 PCI: 00:12.0: enabled 1
1568 15:01:21.602231 PCI: 00:12.5: enabled 0
1569 15:01:21.605672 PCI: 00:12.6: enabled 0
1570 15:01:21.606114 PCI: 00:14.0: enabled 1
1571 15:01:21.608781 PCI: 00:14.1: enabled 0
1572 15:01:21.612078 PCI: 00:14.3: enabled 1
1573 15:01:21.615676 PCI: 00:14.5: enabled 0
1574 15:01:21.616118 PCI: 00:15.0: enabled 1
1575 15:01:21.618467 PCI: 00:15.1: enabled 1
1576 15:01:21.621999 PCI: 00:15.2: enabled 0
1577 15:01:21.625474 PCI: 00:15.3: enabled 0
1578 15:01:21.626067 PCI: 00:16.0: enabled 1
1579 15:01:21.628240 PCI: 00:16.1: enabled 0
1580 15:01:21.631737 PCI: 00:16.2: enabled 0
1581 15:01:21.635083 PCI: 00:16.3: enabled 0
1582 15:01:21.635526 PCI: 00:16.4: enabled 0
1583 15:01:21.637915 PCI: 00:16.5: enabled 0
1584 15:01:21.641247 PCI: 00:17.0: enabled 1
1585 15:01:21.644705 PCI: 00:19.0: enabled 1
1586 15:01:21.645186 PCI: 00:19.1: enabled 0
1587 15:01:21.648272 PCI: 00:19.2: enabled 0
1588 15:01:21.651048 PCI: 00:1a.0: enabled 0
1589 15:01:21.654468 PCI: 00:1c.0: enabled 0
1590 15:01:21.654945 PCI: 00:1c.1: enabled 0
1591 15:01:21.657897 PCI: 00:1c.2: enabled 0
1592 15:01:21.661361 PCI: 00:1c.3: enabled 0
1593 15:01:21.664109 PCI: 00:1c.4: enabled 0
1594 15:01:21.664556 PCI: 00:1c.5: enabled 0
1595 15:01:21.667455 PCI: 00:1c.6: enabled 0
1596 15:01:21.670726 PCI: 00:1c.7: enabled 0
1597 15:01:21.674281 PCI: 00:1d.0: enabled 1
1598 15:01:21.674722 PCI: 00:1d.1: enabled 0
1599 15:01:21.677467 PCI: 00:1d.2: enabled 0
1600 15:01:21.680411 PCI: 00:1d.3: enabled 0
1601 15:01:21.683804 PCI: 00:1d.4: enabled 0
1602 15:01:21.684042 PCI: 00:1d.5: enabled 0
1603 15:01:21.687291 PCI: 00:1e.0: enabled 1
1604 15:01:21.690228 PCI: 00:1e.1: enabled 0
1605 15:01:21.693663 PCI: 00:1e.2: enabled 1
1606 15:01:21.693854 PCI: 00:1e.3: enabled 1
1607 15:01:21.697150 PCI: 00:1f.0: enabled 1
1608 15:01:21.700052 PCI: 00:1f.1: enabled 0
1609 15:01:21.703510 PCI: 00:1f.2: enabled 0
1610 15:01:21.703702 PCI: 00:1f.3: enabled 1
1611 15:01:21.706806 PCI: 00:1f.4: enabled 1
1612 15:01:21.709766 PCI: 00:1f.5: enabled 1
1613 15:01:21.709958 PCI: 00:1f.6: enabled 0
1614 15:01:21.713125 USB0 port 0: enabled 1
1615 15:01:21.716533 I2C: 01:15: enabled 1
1616 15:01:21.719886 I2C: 02:5d: enabled 1
1617 15:01:21.719972 GENERIC: 0.0: enabled 1
1618 15:01:21.722764 I2C: 03:1a: enabled 1
1619 15:01:21.726199 I2C: 03:38: enabled 1
1620 15:01:21.726285 I2C: 03:39: enabled 1
1621 15:01:21.729734 I2C: 03:3a: enabled 1
1622 15:01:21.732462 I2C: 03:3b: enabled 1
1623 15:01:21.735825 PCI: 00:00.0: enabled 1
1624 15:01:21.735911 SPI: 00: enabled 1
1625 15:01:21.739172 SPI: 01: enabled 1
1626 15:01:21.739259 PNP: 0c09.0: enabled 1
1627 15:01:21.742564 USB2 port 0: enabled 1
1628 15:01:21.745452 USB2 port 1: enabled 1
1629 15:01:21.748864 USB2 port 2: enabled 0
1630 15:01:21.748950 USB2 port 3: enabled 0
1631 15:01:21.752384 USB2 port 5: enabled 0
1632 15:01:21.755792 USB2 port 6: enabled 1
1633 15:01:21.755879 USB2 port 9: enabled 1
1634 15:01:21.758764 USB3 port 0: enabled 1
1635 15:01:21.762217 USB3 port 1: enabled 1
1636 15:01:21.765060 USB3 port 2: enabled 1
1637 15:01:21.765145 USB3 port 3: enabled 1
1638 15:01:21.768346 USB3 port 4: enabled 0
1639 15:01:21.771728 APIC: 03: enabled 1
1640 15:01:21.771815 APIC: 01: enabled 1
1641 15:01:21.775140 APIC: 02: enabled 1
1642 15:01:21.775228 APIC: 05: enabled 1
1643 15:01:21.778627 APIC: 04: enabled 1
1644 15:01:21.781521 APIC: 06: enabled 1
1645 15:01:21.781608 APIC: 07: enabled 1
1646 15:01:21.785008 PCI: 00:08.0: enabled 1
1647 15:01:21.788351 PCI: 00:14.2: enabled 1
1648 15:01:21.791240 PCI: 01:00.0: enabled 1
1649 15:01:21.794757 Disabling ACPI via APMC:
1650 15:01:21.794843 done.
1651 15:01:21.801161 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 15:01:21.804564 ELOG: NV offset 0xaf0000 size 0x4000
1653 15:01:21.811148 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 15:01:21.817815 ELOG: Event(17) added with size 13 at 2022-09-30 15:01:22 UTC
1655 15:01:21.824191 ELOG: Event(92) added with size 9 at 2022-09-30 15:01:22 UTC
1656 15:01:21.831088 ELOG: Event(93) added with size 9 at 2022-09-30 15:01:22 UTC
1657 15:01:21.837838 ELOG: Event(9A) added with size 9 at 2022-09-30 15:01:22 UTC
1658 15:01:21.843974 ELOG: Event(9E) added with size 10 at 2022-09-30 15:01:22 UTC
1659 15:01:21.850371 ELOG: Event(9F) added with size 14 at 2022-09-30 15:01:22 UTC
1660 15:01:21.857181 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1661 15:01:21.863435 ELOG: Event(A1) added with size 10 at 2022-09-30 15:01:22 UTC
1662 15:01:21.870320 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 15:01:21.876489 ELOG: Event(A0) added with size 9 at 2022-09-30 15:01:22 UTC
1664 15:01:21.879892 elog_add_boot_reason: Logged dev mode boot
1665 15:01:21.883342 Finalize devices...
1666 15:01:21.886316 PCI: 00:17.0 final
1667 15:01:21.886402 Devices finalized
1668 15:01:21.892615 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 15:01:21.895952 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 15:01:21.902962 ME: HFSTS1 : 0x90000245
1671 15:01:21.905776 ME: HFSTS2 : 0x3B850126
1672 15:01:21.909111 ME: HFSTS3 : 0x00000020
1673 15:01:21.912320 ME: HFSTS4 : 0x00004800
1674 15:01:21.919135 ME: HFSTS5 : 0x00000000
1675 15:01:21.922000 ME: HFSTS6 : 0x40400006
1676 15:01:21.925370 ME: Manufacturing Mode : NO
1677 15:01:21.928756 ME: FW Partition Table : OK
1678 15:01:21.931745 ME: Bringup Loader Failure : NO
1679 15:01:21.935176 ME: Firmware Init Complete : YES
1680 15:01:21.938541 ME: Boot Options Present : NO
1681 15:01:21.941392 ME: Update In Progress : NO
1682 15:01:21.944870 ME: D0i3 Support : YES
1683 15:01:21.948291 ME: Low Power State Enabled : NO
1684 15:01:21.951764 ME: CPU Replaced : NO
1685 15:01:21.954660 ME: CPU Replacement Valid : YES
1686 15:01:21.958070 ME: Current Working State : 5
1687 15:01:21.961452 ME: Current Operation State : 1
1688 15:01:21.964319 ME: Current Operation Mode : 0
1689 15:01:21.967747 ME: Error Code : 0
1690 15:01:21.971205 ME: CPU Debug Disabled : YES
1691 15:01:21.974622 ME: TXT Support : NO
1692 15:01:21.981034 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 15:01:21.987391 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 15:01:21.987472 CBFS @ c08000 size 3f8000
1695 15:01:21.993836 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 15:01:21.997276 CBFS: Locating 'fallback/dsdt.aml'
1697 15:01:22.000650 CBFS: Found @ offset 10bb80 size 3fa5
1698 15:01:22.007108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 15:01:22.009999 CBFS @ c08000 size 3f8000
1700 15:01:22.016861 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 15:01:22.019614 CBFS: Locating 'fallback/slic'
1702 15:01:22.023105 CBFS: 'fallback/slic' not found.
1703 15:01:22.026515 ACPI: Writing ACPI tables at 99b3e000.
1704 15:01:22.030057 ACPI: * FACS
1705 15:01:22.030135 ACPI: * DSDT
1706 15:01:22.036422 Ramoops buffer: 0x100000@0x99a3d000.
1707 15:01:22.039248 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 15:01:22.042579 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 15:01:22.046528 Google Chrome EC: version:
1710 15:01:22.049374 ro: helios_v2.0.2659-56403530b
1711 15:01:22.052702 rw: helios_v2.0.2849-c41de27e7d
1712 15:01:22.056195 running image: 1
1713 15:01:22.059488 ACPI: * FADT
1714 15:01:22.059585 SCI is IRQ9
1715 15:01:22.065803 ACPI: added table 1/32, length now 40
1716 15:01:22.065908 ACPI: * SSDT
1717 15:01:22.069231 Found 1 CPU(s) with 8 core(s) each.
1718 15:01:22.075590 Error: Could not locate 'wifi_sar' in VPD.
1719 15:01:22.079055 Checking CBFS for default SAR values
1720 15:01:22.081914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 15:01:22.085307 CBFS @ c08000 size 3f8000
1722 15:01:22.091739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 15:01:22.095262 CBFS: Locating 'wifi_sar_defaults.hex'
1724 15:01:22.098802 CBFS: Found @ offset 5fac0 size 77
1725 15:01:22.101752 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 15:01:22.108062 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 15:01:22.111446 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 15:01:22.118268 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 15:01:22.121125 failed to find key in VPD: dsm_calib_r0_0
1730 15:01:22.130739 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 15:01:22.137668 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 15:01:22.140518 failed to find key in VPD: dsm_calib_r0_1
1733 15:01:22.150807 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 15:01:22.153733 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 15:01:22.157151 failed to find key in VPD: dsm_calib_r0_2
1736 15:01:22.166827 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 15:01:22.173129 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 15:01:22.176492 failed to find key in VPD: dsm_calib_r0_3
1739 15:01:22.186546 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 15:01:22.189423 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 15:01:22.196360 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 15:01:22.199296 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 15:01:22.203235 EC returned error result code 1
1744 15:01:22.206168 EC returned error result code 1
1745 15:01:22.209699 EC returned error result code 1
1746 15:01:22.216004 PS2K: Bad resp from EC. Vivaldi disabled!
1747 15:01:22.222751 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 15:01:22.226090 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 15:01:22.232379 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 15:01:22.236045 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 15:01:22.242374 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 15:01:22.248913 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 15:01:22.255328 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 15:01:22.261693 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 15:01:22.265056 ACPI: added table 2/32, length now 44
1756 15:01:22.265141 ACPI: * MCFG
1757 15:01:22.268471 ACPI: added table 3/32, length now 48
1758 15:01:22.271365 ACPI: * TPM2
1759 15:01:22.274884 TPM2 log created at 99a2d000
1760 15:01:22.278214 ACPI: added table 4/32, length now 52
1761 15:01:22.278299 ACPI: * MADT
1762 15:01:22.281076 SCI is IRQ9
1763 15:01:22.284411 ACPI: added table 5/32, length now 56
1764 15:01:22.287874 current = 99b43ac0
1765 15:01:22.287958 ACPI: * DMAR
1766 15:01:22.291386 ACPI: added table 6/32, length now 60
1767 15:01:22.294469 ACPI: * IGD OpRegion
1768 15:01:22.297889 GMA: Found VBT in CBFS
1769 15:01:22.300801 GMA: Found valid VBT in CBFS
1770 15:01:22.304191 ACPI: added table 7/32, length now 64
1771 15:01:22.304269 ACPI: * HPET
1772 15:01:22.307627 ACPI: added table 8/32, length now 68
1773 15:01:22.310779 ACPI: done.
1774 15:01:22.314037 ACPI tables: 31744 bytes.
1775 15:01:22.317475 smbios_write_tables: 99a2c000
1776 15:01:22.320301 EC returned error result code 3
1777 15:01:22.323785 Couldn't obtain OEM name from CBI
1778 15:01:22.327235 Create SMBIOS type 17
1779 15:01:22.330025 PCI: 00:00.0 (Intel Cannonlake)
1780 15:01:22.330114 PCI: 00:14.3 (Intel WiFi)
1781 15:01:22.333450 SMBIOS tables: 939 bytes.
1782 15:01:22.340465 Writing table forward entry at 0x00000500
1783 15:01:22.343418 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 15:01:22.346775 Writing coreboot table at 0x99b62000
1785 15:01:22.353550 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 15:01:22.359683 1. 0000000000001000-000000000009ffff: RAM
1787 15:01:22.363140 2. 00000000000a0000-00000000000fffff: RESERVED
1788 15:01:22.366545 3. 0000000000100000-0000000099a2bfff: RAM
1789 15:01:22.372671 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 15:01:22.379352 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 15:01:22.382288 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 15:01:22.389318 7. 000000009a000000-000000009f7fffff: RESERVED
1793 15:01:22.392293 8. 00000000e0000000-00000000efffffff: RESERVED
1794 15:01:22.399182 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 15:01:22.402103 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 15:01:22.408986 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 15:01:22.411893 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 15:01:22.418777 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 15:01:22.421683 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 15:01:22.424904 15. 0000000100000000-000000045e7fffff: RAM
1801 15:01:22.431537 Graphics framebuffer located at 0xc0000000
1802 15:01:22.434953 Passing 5 GPIOs to payload:
1803 15:01:22.437927 NAME | PORT | POLARITY | VALUE
1804 15:01:22.444929 write protect | undefined | high | low
1805 15:01:22.447793 lid | undefined | high | high
1806 15:01:22.454338 power | undefined | high | low
1807 15:01:22.460855 oprom | undefined | high | low
1808 15:01:22.464374 EC in RW | 0x000000cb | high | low
1809 15:01:22.467329 Board ID: 4
1810 15:01:22.470547 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 15:01:22.473984 CBFS @ c08000 size 3f8000
1812 15:01:22.480650 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 15:01:22.486848 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1814 15:01:22.490291 coreboot table: 1492 bytes.
1815 15:01:22.493811 IMD ROOT 0. 99fff000 00001000
1816 15:01:22.497179 IMD SMALL 1. 99ffe000 00001000
1817 15:01:22.500053 FSP MEMORY 2. 99c4e000 003b0000
1818 15:01:22.503516 CONSOLE 3. 99c2e000 00020000
1819 15:01:22.506393 FMAP 4. 99c2d000 0000054e
1820 15:01:22.509743 TIME STAMP 5. 99c2c000 00000910
1821 15:01:22.513236 VBOOT WORK 6. 99c18000 00014000
1822 15:01:22.516235 MRC DATA 7. 99c16000 00001958
1823 15:01:22.519769 ROMSTG STCK 8. 99c15000 00001000
1824 15:01:22.523127 AFTER CAR 9. 99c0b000 0000a000
1825 15:01:22.525898 RAMSTAGE 10. 99baf000 0005c000
1826 15:01:22.529317 REFCODE 11. 99b7a000 00035000
1827 15:01:22.532658 SMM BACKUP 12. 99b6a000 00010000
1828 15:01:22.536079 COREBOOT 13. 99b62000 00008000
1829 15:01:22.539463 ACPI 14. 99b3e000 00024000
1830 15:01:22.542327 ACPI GNVS 15. 99b3d000 00001000
1831 15:01:22.545790 RAMOOPS 16. 99a3d000 00100000
1832 15:01:22.549132 TPM2 TCGLOG17. 99a2d000 00010000
1833 15:01:22.552502 SMBIOS 18. 99a2c000 00000800
1834 15:01:22.552588 IMD small region:
1835 15:01:22.558787 IMD ROOT 0. 99ffec00 00000400
1836 15:01:22.562142 FSP RUNTIME 1. 99ffebe0 00000004
1837 15:01:22.565087 EC HOSTEVENT 2. 99ffebc0 00000008
1838 15:01:22.568639 POWER STATE 3. 99ffeb80 00000040
1839 15:01:22.571986 ROMSTAGE 4. 99ffeb60 00000004
1840 15:01:22.575203 MEM INFO 5. 99ffe9a0 000001b9
1841 15:01:22.578102 VPD 6. 99ffe920 0000006c
1842 15:01:22.581507 MTRR: Physical address space:
1843 15:01:22.588296 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 15:01:22.594523 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 15:01:22.600810 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 15:01:22.607663 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 15:01:22.614150 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 15:01:22.617640 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 15:01:22.623998 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 15:01:22.630266 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 15:01:22.633719 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 15:01:22.637101 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 15:01:22.640451 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 15:01:22.646921 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 15:01:22.650297 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 15:01:22.653110 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 15:01:22.656361 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 15:01:22.663111 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 15:01:22.666475 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 15:01:22.669381 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 15:01:22.672877 call enable_fixed_mtrr()
1862 15:01:22.676327 CPU physical address size: 39 bits
1863 15:01:22.682407 MTRR: default type WB/UC MTRR counts: 6/8.
1864 15:01:22.685958 MTRR: WB selected as default type.
1865 15:01:22.692139 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 15:01:22.698912 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 15:01:22.702290 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 15:01:22.708640 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 15:01:22.715489 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 15:01:22.721795 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 15:01:22.728564 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 15:01:22.731445 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 15:01:22.734775 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 15:01:22.738280 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 15:01:22.744975 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 15:01:22.747805 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 15:01:22.751325 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 15:01:22.754774 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 15:01:22.760930 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 15:01:22.764431 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 15:01:22.767319 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 15:01:22.767405
1883 15:01:22.770761 MTRR check
1884 15:01:22.770848 Fixed MTRRs : Enabled
1885 15:01:22.774128 Variable MTRRs: Enabled
1886 15:01:22.774214
1887 15:01:22.777503 call enable_fixed_mtrr()
1888 15:01:22.783781 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1889 15:01:22.787207 CPU physical address size: 39 bits
1890 15:01:22.790692 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1891 15:01:22.796921 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 15:01:22.800361 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 15:01:22.803344 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 15:01:22.806788 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 15:01:22.813258 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 15:01:22.816572 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 15:01:22.819457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 15:01:22.823013 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 15:01:22.829447 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 15:01:22.832547 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 15:01:22.836077 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 15:01:22.839527 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 15:01:22.845971 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 15:01:22.849288 call enable_fixed_mtrr()
1905 15:01:22.852668 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 15:01:22.855589 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 15:01:22.859058 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 15:01:22.865825 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 15:01:22.868685 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 15:01:22.872169 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 15:01:22.875580 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 15:01:22.881955 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 15:01:22.885407 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 15:01:22.888761 CPU physical address size: 39 bits
1915 15:01:22.891733 call enable_fixed_mtrr()
1916 15:01:22.895034 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 15:01:22.898427 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 15:01:22.904970 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 15:01:22.908403 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 15:01:22.911363 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 15:01:22.914923 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 15:01:22.921261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 15:01:22.924717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 15:01:22.927521 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 15:01:22.930999 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 15:01:22.937748 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 15:01:22.940521 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 15:01:22.943862 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 15:01:22.947395 call enable_fixed_mtrr()
1930 15:01:22.950821 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 15:01:22.953630 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 15:01:22.960374 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 15:01:22.963690 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 15:01:22.967164 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 15:01:22.970050 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 15:01:22.976902 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 15:01:22.979860 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 15:01:22.983241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 15:01:22.986567 CPU physical address size: 39 bits
1940 15:01:22.989451 call enable_fixed_mtrr()
1941 15:01:22.992846 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 15:01:22.999561 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 15:01:23.003090 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 15:01:23.005928 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 15:01:23.009461 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 15:01:23.015762 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 15:01:23.019312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 15:01:23.022276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 15:01:23.025726 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 15:01:23.032185 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 15:01:23.035382 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 15:01:23.038826 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 15:01:23.045430 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 15:01:23.045519 call enable_fixed_mtrr()
1955 15:01:23.051788 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 15:01:23.055388 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 15:01:23.058876 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 15:01:23.061568 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 15:01:23.068366 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 15:01:23.071784 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 15:01:23.074699 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 15:01:23.078204 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 15:01:23.084998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 15:01:23.087862 CPU physical address size: 39 bits
1965 15:01:23.091490 call enable_fixed_mtrr()
1966 15:01:23.091579 CBFS @ c08000 size 3f8000
1967 15:01:23.097549 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1968 15:01:23.100846 CPU physical address size: 39 bits
1969 15:01:23.104189 CBFS: Locating 'fallback/payload'
1970 15:01:23.107631 CPU physical address size: 39 bits
1971 15:01:23.114042 CBFS: Found @ offset 1c96c0 size 3f798
1972 15:01:23.117559 CPU physical address size: 39 bits
1973 15:01:23.120482 Checking segment from ROM address 0xffdd16f8
1974 15:01:23.123968 Checking segment from ROM address 0xffdd1714
1975 15:01:23.130313 Loading segment from ROM address 0xffdd16f8
1976 15:01:23.130398 code (compression=0)
1977 15:01:23.140038 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 15:01:23.149785 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 15:01:23.149875 it's not compressed!
1980 15:01:23.243011 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 15:01:23.249816 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 15:01:23.256117 Loading segment from ROM address 0xffdd1714
1983 15:01:23.256203 Entry Point 0x30000000
1984 15:01:23.259577 Loaded segments
1985 15:01:23.265366 Finalizing chipset.
1986 15:01:23.268808 Finalizing SMM.
1987 15:01:23.271532 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1988 15:01:23.274990 mp_park_aps done after 0 msecs.
1989 15:01:23.281305 Jumping to boot code at 30000000(99b62000)
1990 15:01:23.287924 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 15:01:23.288011
1992 15:01:23.291415 Starting depthcharge on Helios...
1993 15:01:23.291761 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
1994 15:01:23.291870 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1995 15:01:23.291957 Setting prompt string to ['hatch:']
1996 15:01:23.292046 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1997 15:01:23.301061 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1998 15:01:23.307502 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1999 15:01:23.314280 board_setup: Info: eMMC controller not present; skipping
2000 15:01:23.317213 New NVMe Controller 0x30053ac0 @ 00:1d:00
2001 15:01:23.324063 board_setup: Info: SDHCI controller not present; skipping
2002 15:01:23.330342 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2003 15:01:23.330430 Wipe memory regions:
2004 15:01:23.336578 [0x00000000001000, 0x000000000a0000)
2005 15:01:23.340164 [0x00000000100000, 0x00000030000000)
2006 15:01:23.406109 [0x00000030657430, 0x00000099a2c000)
2007 15:01:23.546446 [0x00000100000000, 0x0000045e800000)
2008 15:01:24.928961 R8152: Initializing
2009 15:01:24.932274 Version 9 (ocp_data = 6010)
2010 15:01:24.936222 R8152: Done initializing
2011 15:01:24.939468 Adding net device
2012 15:01:25.436252 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2013 15:01:25.436406
2014 15:01:25.436696 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2016 15:01:25.537520 hatch: tftpboot 192.168.201.1 7462826/tftp-deploy-4bftcplo/kernel/bzImage 7462826/tftp-deploy-4bftcplo/kernel/cmdline 7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
2017 15:01:25.537696 Setting prompt string to 'Starting kernel'
2018 15:01:25.537771 Setting prompt string to ['Starting kernel']
2019 15:01:25.537841 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 15:01:25.537915 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2021 15:01:25.542109 tftpboot 192.168.201.1 7462826/tftp-deploy-4bftcplo/kernel/bzImoy-4bftcplo/kernel/cmdline 7462826/tftp-deploy-4bftcplo/ramdisk/ramdisk.cpio.gz
2022 15:01:25.542197 Waiting for link
2023 15:01:25.742646 done.
2024 15:01:25.742800 MAC: 88:54:1f:0f:6e:7d
2025 15:01:25.745884 Sending DHCP discover... done.
2026 15:01:25.749336 Waiting for reply... done.
2027 15:01:25.752750 Sending DHCP request... done.
2028 15:01:25.756120 Waiting for reply... done.
2029 15:01:25.759398 My ip is 192.168.201.15
2030 15:01:25.762347 The DHCP server ip is 192.168.201.1
2031 15:01:25.765894 TFTP server IP predefined by user: 192.168.201.1
2032 15:01:25.772359 Bootfile predefined by user: 7462826/tftp-deploy-4bftcplo/kernel/bzImage
2033 15:01:25.775643 Sending tftp read request... done.
2034 15:01:25.782019 Waiting for the transfer...
2035 15:01:26.115063 00000000 ################################################################
2036 15:01:26.451276 00080000 ################################################################
2037 15:01:26.777192 00100000 ################################################################
2038 15:01:27.106185 00180000 ################################################################
2039 15:01:27.424907 00200000 ################################################################
2040 15:01:27.746496 00280000 ################################################################
2041 15:01:28.067709 00300000 ################################################################
2042 15:01:28.396102 00380000 ################################################################
2043 15:01:28.723672 00400000 ################################################################
2044 15:01:29.048323 00480000 ################################################################
2045 15:01:29.379599 00500000 ################################################################
2046 15:01:29.705538 00580000 ################################################################
2047 15:01:30.040655 00600000 ################################################################
2048 15:01:30.239706 00680000 ###################################### done.
2049 15:01:30.242855 The bootfile was 7126928 bytes long.
2050 15:01:30.246687 Sending tftp read request... done.
2051 15:01:30.249491 Waiting for the transfer...
2052 15:01:30.589408 00000000 ################################################################
2053 15:01:30.917672 00080000 ################################################################
2054 15:01:31.233911 00100000 ################################################################
2055 15:01:31.551368 00180000 ################################################################
2056 15:01:31.876541 00200000 ################################################################
2057 15:01:32.212553 00280000 ################################################################
2058 15:01:32.531427 00300000 ################################################################
2059 15:01:32.865257 00380000 ################################################################
2060 15:01:33.196090 00400000 ################################################################
2061 15:01:33.527162 00480000 ################################################################
2062 15:01:33.676817 00500000 ############################# done.
2063 15:01:33.679679 Sending tftp read request... done.
2064 15:01:33.682909 Waiting for the transfer...
2065 15:01:33.682986 00000000 # done.
2066 15:01:33.692657 Command line loaded dynamically from TFTP file: 7462826/tftp-deploy-4bftcplo/kernel/cmdline
2067 15:01:33.715717 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7462826/extract-nfsrootfs-rgannkh0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2068 15:01:33.722526 ec_init(0): CrosEC protocol v3 supported (256, 256)
2069 15:01:33.728873 Shutting down all USB controllers.
2070 15:01:33.728959 Removing current net device
2071 15:01:33.737572 Finalizing coreboot
2072 15:01:33.743738 Exiting depthcharge with code 4 at timestamp: 17742849
2073 15:01:33.743817
2074 15:01:33.743896 Starting kernel ...
2075 15:01:33.743961
2076 15:01:33.744022
2077 15:01:33.744392 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2078 15:01:33.744506 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2079 15:01:33.744583 Setting prompt string to ['Linux version [0-9]']
2080 15:01:33.744666 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2081 15:01:33.744750 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2083 15:06:04.745613 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2085 15:06:04.746764 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2087 15:06:04.747656 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2090 15:06:04.749232 end: 2 depthcharge-action (duration 00:05:00) [common]
2092 15:06:04.750367 Cleaning after the job
2093 15:06:04.750795 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/ramdisk
2094 15:06:04.753076 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/kernel
2095 15:06:04.755689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/nfsrootfs
2096 15:06:04.809801 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462826/tftp-deploy-4bftcplo/modules
2097 15:06:04.810112 start: 4.1 power-off (timeout 00:00:30) [common]
2098 15:06:04.810270 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2099 15:06:04.829039 >> Command sent successfully.
2100 15:06:04.830753 Returned 0 in 0 seconds
2101 15:06:04.931880 end: 4.1 power-off (duration 00:00:00) [common]
2103 15:06:04.933545 start: 4.2 read-feedback (timeout 00:10:00) [common]
2104 15:06:04.934703 Listened to connection for namespace 'common' for up to 1s
2105 15:06:05.937014 Finalising connection for namespace 'common'
2106 15:06:05.937723 Disconnecting from shell: Finalise
2107 15:06:06.038950 end: 4.2 read-feedback (duration 00:00:01) [common]
2108 15:06:06.039118 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462826
2109 15:06:06.191557 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462826
2110 15:06:06.191764 JobError: Your job cannot terminate cleanly.