Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:01:05.337414 lava-dispatcher, installed at version: 2022.06
2 14:01:05.337614 start: 0 validate
3 14:01:05.337744 Start time: 2022-08-03 14:01:05.337737+00:00 (UTC)
4 14:01:05.337870 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:01:05.337997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
6 14:01:05.631583 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:01:05.631798 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:01:08.134141 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:01:08.134895 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:01:08.139636 validate duration: 2.80
12 14:01:08.139888 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:01:08.140010 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:01:08.140110 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:01:08.140210 Not decompressing ramdisk as can be used compressed.
16 14:01:08.140296 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
17 14:01:08.140365 saving as /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/ramdisk/rootfs.cpio.gz
18 14:01:08.140428 total size: 8416091 (8MB)
19 14:01:08.141447 progress 0% (0MB)
20 14:01:08.143582 progress 5% (0MB)
21 14:01:08.145806 progress 10% (0MB)
22 14:01:08.147977 progress 15% (1MB)
23 14:01:08.150182 progress 20% (1MB)
24 14:01:08.152350 progress 25% (2MB)
25 14:01:08.154515 progress 30% (2MB)
26 14:01:08.156508 progress 35% (2MB)
27 14:01:08.158682 progress 40% (3MB)
28 14:01:08.160832 progress 45% (3MB)
29 14:01:08.162975 progress 50% (4MB)
30 14:01:08.165083 progress 55% (4MB)
31 14:01:08.167069 progress 60% (4MB)
32 14:01:08.168912 progress 65% (5MB)
33 14:01:08.170904 progress 70% (5MB)
34 14:01:08.172886 progress 75% (6MB)
35 14:01:08.174914 progress 80% (6MB)
36 14:01:08.177211 progress 85% (6MB)
37 14:01:08.179330 progress 90% (7MB)
38 14:01:08.181319 progress 95% (7MB)
39 14:01:08.183452 progress 100% (8MB)
40 14:01:08.183795 8MB downloaded in 0.04s (185.09MB/s)
41 14:01:08.183949 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:01:08.184196 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:01:08.184285 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:01:08.184372 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:01:08.184474 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:01:08.184542 saving as /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/kernel/bzImage
48 14:01:08.184603 total size: 6815632 (6MB)
49 14:01:08.184663 No compression specified
50 14:01:08.185799 progress 0% (0MB)
51 14:01:08.187590 progress 5% (0MB)
52 14:01:08.189291 progress 10% (0MB)
53 14:01:08.191124 progress 15% (1MB)
54 14:01:08.192758 progress 20% (1MB)
55 14:01:08.194439 progress 25% (1MB)
56 14:01:08.196168 progress 30% (1MB)
57 14:01:08.197848 progress 35% (2MB)
58 14:01:08.199546 progress 40% (2MB)
59 14:01:08.201182 progress 45% (2MB)
60 14:01:08.202739 progress 50% (3MB)
61 14:01:08.204478 progress 55% (3MB)
62 14:01:08.206253 progress 60% (3MB)
63 14:01:08.208285 progress 65% (4MB)
64 14:01:08.210107 progress 70% (4MB)
65 14:01:08.211705 progress 75% (4MB)
66 14:01:08.213529 progress 80% (5MB)
67 14:01:08.215207 progress 85% (5MB)
68 14:01:08.217039 progress 90% (5MB)
69 14:01:08.218693 progress 95% (6MB)
70 14:01:08.220387 progress 100% (6MB)
71 14:01:08.220712 6MB downloaded in 0.04s (180.03MB/s)
72 14:01:08.220891 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:01:08.221192 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:01:08.221310 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:01:08.221425 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:01:08.221557 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:01:08.221653 saving as /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/modules/modules.tar
79 14:01:08.221716 total size: 54904 (0MB)
80 14:01:08.221779 Using unxz to decompress xz
81 14:01:08.225081 progress 59% (0MB)
82 14:01:08.225484 progress 100% (0MB)
83 14:01:08.229154 0MB downloaded in 0.01s (7.05MB/s)
84 14:01:08.229480 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:01:08.229815 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:01:08.229943 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 14:01:08.230072 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 14:01:08.230197 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:01:08.230320 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 14:01:08.230520 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd
92 14:01:08.230630 makedir: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin
93 14:01:08.230718 makedir: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/tests
94 14:01:08.230804 makedir: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/results
95 14:01:08.230912 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-add-keys
96 14:01:08.231046 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-add-sources
97 14:01:08.231165 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-background-process-start
98 14:01:08.231279 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-background-process-stop
99 14:01:08.231391 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-common-functions
100 14:01:08.231502 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-echo-ipv4
101 14:01:08.231613 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-install-packages
102 14:01:08.231724 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-installed-packages
103 14:01:08.231833 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-os-build
104 14:01:08.231944 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-probe-channel
105 14:01:08.232057 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-probe-ip
106 14:01:08.232167 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-target-ip
107 14:01:08.232279 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-target-mac
108 14:01:08.232389 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-target-storage
109 14:01:08.232503 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-case
110 14:01:08.232613 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-event
111 14:01:08.232723 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-feedback
112 14:01:08.232835 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-raise
113 14:01:08.232975 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-reference
114 14:01:08.233104 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-runner
115 14:01:08.233215 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-set
116 14:01:08.233326 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-test-shell
117 14:01:08.233443 Updating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-install-packages (oe)
118 14:01:08.233557 Updating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/bin/lava-installed-packages (oe)
119 14:01:08.233658 Creating /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/environment
120 14:01:08.233748 LAVA metadata
121 14:01:08.233820 - LAVA_JOB_ID=6961127
122 14:01:08.233888 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:01:08.233997 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 14:01:08.234064 skipped lava-vland-overlay
125 14:01:08.234142 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:01:08.234229 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 14:01:08.234311 skipped lava-multinode-overlay
128 14:01:08.234400 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:01:08.234503 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 14:01:08.234582 Loading test definitions
131 14:01:08.234697 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 14:01:08.234777 Using /lava-6961127 at stage 0
133 14:01:08.235058 uuid=6961127_1.4.2.3.1 testdef=None
134 14:01:08.235152 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:01:08.235244 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 14:01:08.235743 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:01:08.235976 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 14:01:08.236569 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:01:08.236812 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 14:01:08.237409 runner path: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/0/tests/0_dmesg test_uuid 6961127_1.4.2.3.1
143 14:01:08.237573 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:01:08.237822 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 14:01:08.237897 Using /lava-6961127 at stage 1
147 14:01:08.238141 uuid=6961127_1.4.2.3.5 testdef=None
148 14:01:08.238264 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:01:08.238356 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 14:01:08.238909 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:01:08.239366 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 14:01:08.240483 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:01:08.240966 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 14:01:08.241941 runner path: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/1/tests/1_bootrr test_uuid 6961127_1.4.2.3.5
157 14:01:08.242201 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:01:08.242583 Creating lava-test-runner.conf files
160 14:01:08.242724 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/0 for stage 0
161 14:01:08.242884 - 0_dmesg
162 14:01:08.243005 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961127/lava-overlay-pa9el6sd/lava-6961127/1 for stage 1
163 14:01:08.243259 - 1_bootrr
164 14:01:08.243403 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:01:08.243541 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 14:01:08.253209 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:01:08.253413 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 14:01:08.253578 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:01:08.253737 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:01:08.253890 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 14:01:08.446624 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:01:08.447119 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 14:01:08.447312 extracting modules file /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961127/extract-overlay-ramdisk-narqfxny/ramdisk
174 14:01:08.454390 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:01:08.454627 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 14:01:08.454806 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6961127/compress-overlay-xesw775f/overlay-1.4.2.4.tar.gz to ramdisk
177 14:01:08.454948 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6961127/compress-overlay-xesw775f/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6961127/extract-overlay-ramdisk-narqfxny/ramdisk
178 14:01:08.461242 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:01:08.461449 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 14:01:08.461624 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:01:08.461797 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 14:01:08.461952 Building ramdisk /var/lib/lava/dispatcher/tmp/6961127/extract-overlay-ramdisk-narqfxny/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6961127/extract-overlay-ramdisk-narqfxny/ramdisk
183 14:01:08.529697 >> 48044 blocks
184 14:01:09.310590 rename /var/lib/lava/dispatcher/tmp/6961127/extract-overlay-ramdisk-narqfxny/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
185 14:01:09.311156 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:01:09.311347 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 14:01:09.311521 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 14:01:09.311686 No mkimage arch provided, not using FIT.
189 14:01:09.311849 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:01:09.311975 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:01:09.312141 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:01:09.312299 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 14:01:09.312420 No LXC device requested
194 14:01:09.312549 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:01:09.312689 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 14:01:09.312819 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:01:09.312937 Checking files for TFTP limit of 4294967296 bytes.
198 14:01:09.313483 end: 1 tftp-deploy (duration 00:00:01) [common]
199 14:01:09.313642 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:01:09.313813 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:01:09.314044 substitutions:
202 14:01:09.314149 - {DTB}: None
203 14:01:09.314269 - {INITRD}: 6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
204 14:01:09.314397 - {KERNEL}: 6961127/tftp-deploy-drll2meh/kernel/bzImage
205 14:01:09.314507 - {LAVA_MAC}: None
206 14:01:09.314603 - {PRESEED_CONFIG}: None
207 14:01:09.314697 - {PRESEED_LOCAL}: None
208 14:01:09.314810 - {RAMDISK}: 6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
209 14:01:09.314919 - {ROOT_PART}: None
210 14:01:09.315013 - {ROOT}: None
211 14:01:09.315139 - {SERVER_IP}: 192.168.201.1
212 14:01:09.315234 - {TEE}: None
213 14:01:09.315328 Parsed boot commands:
214 14:01:09.315435 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:01:09.315696 Parsed boot commands: tftpboot 192.168.201.1 6961127/tftp-deploy-drll2meh/kernel/bzImage 6961127/tftp-deploy-drll2meh/kernel/cmdline 6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
216 14:01:09.315892 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:01:09.316025 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:01:09.316173 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:01:09.316323 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:01:09.316465 Not connected, no need to disconnect.
221 14:01:09.316643 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:01:09.316803 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:01:09.316914 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
224 14:01:09.320285 Setting prompt string to ['lava-test: # ']
225 14:01:09.320667 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:01:09.320822 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:01:09.320977 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:01:09.321117 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:01:09.321403 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
230 14:01:09.343051 >> Command sent successfully.
231 14:01:09.346061 Returned 0 in 0 seconds
232 14:01:09.446854 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:01:09.447442 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:01:09.447550 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:01:09.447645 Setting prompt string to 'Starting depthcharge on Voema...'
237 14:01:09.447715 Changing prompt to 'Starting depthcharge on Voema...'
238 14:01:09.447787 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 14:01:09.448066 [Enter `^Ec?' for help]
240 14:01:17.416259
241 14:01:17.416437
242 14:01:17.426043 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 14:01:17.429096 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 14:01:17.435914 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 14:01:17.438871 CPU: AES supported, TXT NOT supported, VT supported
246 14:01:17.445928 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 14:01:17.449209 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 14:01:17.456288 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 14:01:17.459318 VBOOT: Loading verstage.
250 14:01:17.462470 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 14:01:17.469071 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 14:01:17.472556 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:01:17.482608 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 14:01:17.489244 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 14:01:17.489335
256 14:01:17.489405
257 14:01:17.502535 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 14:01:17.516095 Probing TPM: . done!
259 14:01:17.519598 TPM ready after 0 ms
260 14:01:17.523082 Connected to device vid:did:rid of 1ae0:0028:00
261 14:01:17.534257 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 14:01:17.541308 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 14:01:17.544196 Initialized TPM device CR50 revision 0
264 14:01:17.597108 tlcl_send_startup: Startup return code is 0
265 14:01:17.597256 TPM: setup succeeded
266 14:01:17.611201 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 14:01:17.625862 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 14:01:17.638436 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 14:01:17.647964 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 14:01:17.652164 Chrome EC: UHEPI supported
271 14:01:17.654797 Phase 1
272 14:01:17.658479 FMAP: area GBB found @ 1805000 (458752 bytes)
273 14:01:17.668955 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 14:01:17.674781 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 14:01:17.681149 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 14:01:17.687999 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 14:01:17.691185 Recovery requested (1009000e)
278 14:01:17.695066 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 14:01:17.706255 tlcl_extend: response is 0
280 14:01:17.713258 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 14:01:17.722705 tlcl_extend: response is 0
282 14:01:17.729897 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 14:01:17.736209 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 14:01:17.742652 BS: verstage times (exec / console): total (unknown) / 142 ms
285 14:01:17.742742
286 14:01:17.742812
287 14:01:17.756091 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 14:01:17.762400 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 14:01:17.765545 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 14:01:17.769211 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 14:01:17.775750 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 14:01:17.779027 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 14:01:17.782494 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 14:01:17.785355 TCO_STS: 0000 0000
295 14:01:17.788999 GEN_PMCON: d0015038 00002200
296 14:01:17.792089 GBLRST_CAUSE: 00000000 00000000
297 14:01:17.795512 HPR_CAUSE0: 00000000
298 14:01:17.795613 prev_sleep_state 5
299 14:01:17.799359 Boot Count incremented to 6624
300 14:01:17.805991 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 14:01:17.812400 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 14:01:17.822086 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 14:01:17.828692 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 14:01:17.831699 Chrome EC: UHEPI supported
305 14:01:17.838445 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 14:01:17.849796 Probing TPM: done!
307 14:01:17.856429 Connected to device vid:did:rid of 1ae0:0028:00
308 14:01:17.866388 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 14:01:17.869399 Initialized TPM device CR50 revision 0
310 14:01:17.884161 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 14:01:17.891126 MRC: Hash idx 0x100b comparison successful.
312 14:01:17.894924 MRC cache found, size faa8
313 14:01:17.895019 bootmode is set to: 2
314 14:01:17.897718 SPD index = 2
315 14:01:17.904338 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 14:01:17.907369 SPD: module type is LPDDR4X
317 14:01:17.910954 SPD: module part number is MT53D1G64D4NW-046
318 14:01:17.917724 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 14:01:17.920923 SPD: device width 16 bits, bus width 16 bits
320 14:01:17.927503 SPD: module size is 2048 MB (per channel)
321 14:01:18.355234 CBMEM:
322 14:01:18.358327 IMD: root @ 0x76fff000 254 entries.
323 14:01:18.361785 IMD: root @ 0x76ffec00 62 entries.
324 14:01:18.365016 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 14:01:18.371385 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 14:01:18.375091 External stage cache:
327 14:01:18.377936 IMD: root @ 0x7b3ff000 254 entries.
328 14:01:18.381279 IMD: root @ 0x7b3fec00 62 entries.
329 14:01:18.396670 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 14:01:18.403122 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 14:01:18.409653 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 14:01:18.423185 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 14:01:18.429916 cse_lite: Skip switching to RW in the recovery path
334 14:01:18.430086 8 DIMMs found
335 14:01:18.430212 SMM Memory Map
336 14:01:18.436942 SMRAM : 0x7b000000 0x800000
337 14:01:18.439773 Subregion 0: 0x7b000000 0x200000
338 14:01:18.442962 Subregion 1: 0x7b200000 0x200000
339 14:01:18.446792 Subregion 2: 0x7b400000 0x400000
340 14:01:18.446928 top_of_ram = 0x77000000
341 14:01:18.453317 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 14:01:18.459600 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 14:01:18.463268 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 14:01:18.469540 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 14:01:18.475850 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 14:01:18.482499 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 14:01:18.493155 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 14:01:18.499679 Processing 211 relocs. Offset value of 0x74c0b000
349 14:01:18.506881 BS: romstage times (exec / console): total (unknown) / 276 ms
350 14:01:18.512327
351 14:01:18.512475
352 14:01:18.522975 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 14:01:18.526235 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 14:01:18.533371 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 14:01:18.539442 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 14:01:18.549561 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 14:01:18.556384 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 14:01:18.599225 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 14:01:18.605638 Processing 5008 relocs. Offset value of 0x75d98000
360 14:01:18.608497 BS: postcar times (exec / console): total (unknown) / 59 ms
361 14:01:18.612266
362 14:01:18.612380
363 14:01:18.621919 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 14:01:18.622086 Normal boot
365 14:01:18.625446 FW_CONFIG value is 0x804c02
366 14:01:18.628626 PCI: 00:07.0 disabled by fw_config
367 14:01:18.632011 PCI: 00:07.1 disabled by fw_config
368 14:01:18.635048 PCI: 00:0d.2 disabled by fw_config
369 14:01:18.641805 PCI: 00:1c.7 disabled by fw_config
370 14:01:18.644935 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 14:01:18.651882 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 14:01:18.654997 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 14:01:18.662153 GENERIC: 0.0 disabled by fw_config
374 14:01:18.664941 GENERIC: 1.0 disabled by fw_config
375 14:01:18.668128 fw_config match found: DB_USB=USB3_ACTIVE
376 14:01:18.671468 fw_config match found: DB_USB=USB3_ACTIVE
377 14:01:18.675515 fw_config match found: DB_USB=USB3_ACTIVE
378 14:01:18.681886 fw_config match found: DB_USB=USB3_ACTIVE
379 14:01:18.684910 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 14:01:18.694522 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 14:01:18.701407 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 14:01:18.707895 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 14:01:18.711662 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 14:01:18.717767 microcode: Update skipped, already up-to-date
385 14:01:18.724869 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 14:01:18.752842 Detected 4 core, 8 thread CPU.
387 14:01:18.755879 Setting up SMI for CPU
388 14:01:18.758913 IED base = 0x7b400000
389 14:01:18.759060 IED size = 0x00400000
390 14:01:18.762325 Will perform SMM setup.
391 14:01:18.768818 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 14:01:18.775440 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 14:01:18.781863 Processing 16 relocs. Offset value of 0x00030000
394 14:01:18.785245 Attempting to start 7 APs
395 14:01:18.788654 Waiting for 10ms after sending INIT.
396 14:01:18.804311 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 14:01:18.804458 done.
398 14:01:18.807683 AP: slot 6 apic_id 2.
399 14:01:18.810735 AP: slot 3 apic_id 7.
400 14:01:18.810845 AP: slot 7 apic_id 6.
401 14:01:18.817380 Waiting for 2nd SIPI to complete...done.
402 14:01:18.817474 AP: slot 4 apic_id 5.
403 14:01:18.821267 AP: slot 5 apic_id 4.
404 14:01:18.824074 AP: slot 2 apic_id 3.
405 14:01:18.831036 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 14:01:18.837251 Processing 13 relocs. Offset value of 0x00038000
407 14:01:18.840521 Unable to locate Global NVS
408 14:01:18.848255 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 14:01:18.850496 Installing permanent SMM handler to 0x7b000000
410 14:01:18.860711 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 14:01:18.864192 Processing 794 relocs. Offset value of 0x7b010000
412 14:01:18.873678 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 14:01:18.876935 Processing 13 relocs. Offset value of 0x7b008000
414 14:01:18.883796 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 14:01:18.890591 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 14:01:18.893792 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 14:01:18.900136 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 14:01:18.906775 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 14:01:18.913764 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 14:01:18.920725 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 14:01:18.923780 Unable to locate Global NVS
422 14:01:18.929894 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 14:01:18.933903 Clearing SMI status registers
424 14:01:18.934020 SMI_STS: PM1
425 14:01:18.936616 PM1_STS: PWRBTN
426 14:01:18.943497 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 14:01:18.946900 In relocation handler: CPU 0
428 14:01:18.949828 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 14:01:18.956288 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 14:01:18.959710 Relocation complete.
431 14:01:18.966385 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 14:01:18.969994 In relocation handler: CPU 1
433 14:01:18.972647 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 14:01:18.972779 Relocation complete.
435 14:01:18.983077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
436 14:01:18.986376 In relocation handler: CPU 4
437 14:01:18.989728 New SMBASE=0x7afff000 IEDBASE=0x7b400000
438 14:01:18.989864 Relocation complete.
439 14:01:18.999244 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 14:01:19.003075 In relocation handler: CPU 5
441 14:01:19.005850 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 14:01:19.009338 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 14:01:19.012534 Relocation complete.
444 14:01:19.019182 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
445 14:01:19.022625 In relocation handler: CPU 3
446 14:01:19.025943 New SMBASE=0x7afff400 IEDBASE=0x7b400000
447 14:01:19.029082 Relocation complete.
448 14:01:19.035784 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 14:01:19.039301 In relocation handler: CPU 7
450 14:01:19.042689 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 14:01:19.049280 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 14:01:19.049431 Relocation complete.
453 14:01:19.058544 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
454 14:01:19.058735 In relocation handler: CPU 2
455 14:01:19.065292 New SMBASE=0x7afff800 IEDBASE=0x7b400000
456 14:01:19.065478 Relocation complete.
457 14:01:19.075347 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
458 14:01:19.075504 In relocation handler: CPU 6
459 14:01:19.081633 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 14:01:19.084885 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 14:01:19.088835 Relocation complete.
462 14:01:19.091841 Initializing CPU #0
463 14:01:19.094936 CPU: vendor Intel device 806c1
464 14:01:19.098413 CPU: family 06, model 8c, stepping 01
465 14:01:19.098511 Clearing out pending MCEs
466 14:01:19.101316 Setting up local APIC...
467 14:01:19.104648 apic_id: 0x00 done.
468 14:01:19.108772 Turbo is available but hidden
469 14:01:19.112071 Turbo is available and visible
470 14:01:19.114699 microcode: Update skipped, already up-to-date
471 14:01:19.118447 CPU #0 initialized
472 14:01:19.118530 Initializing CPU #2
473 14:01:19.121234 Initializing CPU #6
474 14:01:19.124916 CPU: vendor Intel device 806c1
475 14:01:19.128071 CPU: family 06, model 8c, stepping 01
476 14:01:19.131713 CPU: vendor Intel device 806c1
477 14:01:19.135025 CPU: family 06, model 8c, stepping 01
478 14:01:19.137848 Clearing out pending MCEs
479 14:01:19.141400 Clearing out pending MCEs
480 14:01:19.144547 Setting up local APIC...
481 14:01:19.144671 Initializing CPU #5
482 14:01:19.147849 Initializing CPU #4
483 14:01:19.151393 CPU: vendor Intel device 806c1
484 14:01:19.154572 CPU: family 06, model 8c, stepping 01
485 14:01:19.157784 CPU: vendor Intel device 806c1
486 14:01:19.161259 CPU: family 06, model 8c, stepping 01
487 14:01:19.164579 Clearing out pending MCEs
488 14:01:19.168088 Clearing out pending MCEs
489 14:01:19.168187 apic_id: 0x03 done.
490 14:01:19.171117 Setting up local APIC...
491 14:01:19.174203 Initializing CPU #3
492 14:01:19.174292 Initializing CPU #7
493 14:01:19.177892 CPU: vendor Intel device 806c1
494 14:01:19.181045 CPU: family 06, model 8c, stepping 01
495 14:01:19.184355 CPU: vendor Intel device 806c1
496 14:01:19.188595 CPU: family 06, model 8c, stepping 01
497 14:01:19.191131 Clearing out pending MCEs
498 14:01:19.195256 Clearing out pending MCEs
499 14:01:19.197731 Setting up local APIC...
500 14:01:19.201141 Setting up local APIC...
501 14:01:19.201261 Initializing CPU #1
502 14:01:19.204574 Setting up local APIC...
503 14:01:19.208558 Setting up local APIC...
504 14:01:19.208695 apic_id: 0x06 done.
505 14:01:19.211323 apic_id: 0x07 done.
506 14:01:19.215124 microcode: Update skipped, already up-to-date
507 14:01:19.221467 microcode: Update skipped, already up-to-date
508 14:01:19.221606 CPU #7 initialized
509 14:01:19.224495 CPU #3 initialized
510 14:01:19.228477 apic_id: 0x04 done.
511 14:01:19.228567 apic_id: 0x05 done.
512 14:01:19.234366 microcode: Update skipped, already up-to-date
513 14:01:19.237783 microcode: Update skipped, already up-to-date
514 14:01:19.240685 CPU #5 initialized
515 14:01:19.240772 CPU #4 initialized
516 14:01:19.244212 CPU: vendor Intel device 806c1
517 14:01:19.247378 CPU: family 06, model 8c, stepping 01
518 14:01:19.253936 microcode: Update skipped, already up-to-date
519 14:01:19.254023 apic_id: 0x02 done.
520 14:01:19.257723 CPU #2 initialized
521 14:01:19.260876 microcode: Update skipped, already up-to-date
522 14:01:19.264040 Clearing out pending MCEs
523 14:01:19.267372 CPU #6 initialized
524 14:01:19.270690 Setting up local APIC...
525 14:01:19.270777 apic_id: 0x01 done.
526 14:01:19.277347 microcode: Update skipped, already up-to-date
527 14:01:19.277435 CPU #1 initialized
528 14:01:19.283673 bsp_do_flight_plan done after 461 msecs.
529 14:01:19.283765 CPU: frequency set to 4400 MHz
530 14:01:19.287672 Enabling SMIs.
531 14:01:19.293332 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 14:01:19.309338 SATAXPCIE1 indicates PCIe NVMe is present
533 14:01:19.312548 Probing TPM: done!
534 14:01:19.316096 Connected to device vid:did:rid of 1ae0:0028:00
535 14:01:19.326157 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 14:01:19.329558 Initialized TPM device CR50 revision 0
537 14:01:19.332938 Enabling S0i3.4
538 14:01:19.339764 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 14:01:19.343145 Found a VBT of 8704 bytes after decompression
540 14:01:19.349315 cse_lite: CSE RO boot. HybridStorageMode disabled
541 14:01:19.356260 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 14:01:19.431554 FSPS returned 0
543 14:01:19.434683 Executing Phase 1 of FspMultiPhaseSiInit
544 14:01:19.444912 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 14:01:19.448375 port C0 DISC req: usage 1 usb3 1 usb2 5
546 14:01:19.451606 Raw Buffer output 0 00000511
547 14:01:19.454845 Raw Buffer output 1 00000000
548 14:01:19.459115 pmc_send_ipc_cmd succeeded
549 14:01:19.465934 port C1 DISC req: usage 1 usb3 2 usb2 3
550 14:01:19.466527 Raw Buffer output 0 00000321
551 14:01:19.468870 Raw Buffer output 1 00000000
552 14:01:19.473118 pmc_send_ipc_cmd succeeded
553 14:01:19.478080 Detected 4 core, 8 thread CPU.
554 14:01:19.481972 Detected 4 core, 8 thread CPU.
555 14:01:19.681716 Display FSP Version Info HOB
556 14:01:19.684614 Reference Code - CPU = a.0.4c.31
557 14:01:19.688484 uCode Version = 0.0.0.86
558 14:01:19.691854 TXT ACM version = ff.ff.ff.ffff
559 14:01:19.694660 Reference Code - ME = a.0.4c.31
560 14:01:19.697966 MEBx version = 0.0.0.0
561 14:01:19.701491 ME Firmware Version = Consumer SKU
562 14:01:19.704457 Reference Code - PCH = a.0.4c.31
563 14:01:19.708163 PCH-CRID Status = Disabled
564 14:01:19.711224 PCH-CRID Original Value = ff.ff.ff.ffff
565 14:01:19.714140 PCH-CRID New Value = ff.ff.ff.ffff
566 14:01:19.718056 OPROM - RST - RAID = ff.ff.ff.ffff
567 14:01:19.721547 PCH Hsio Version = 4.0.0.0
568 14:01:19.724019 Reference Code - SA - System Agent = a.0.4c.31
569 14:01:19.727210 Reference Code - MRC = 2.0.0.1
570 14:01:19.730888 SA - PCIe Version = a.0.4c.31
571 14:01:19.734281 SA-CRID Status = Disabled
572 14:01:19.737305 SA-CRID Original Value = 0.0.0.1
573 14:01:19.741055 SA-CRID New Value = 0.0.0.1
574 14:01:19.744141 OPROM - VBIOS = ff.ff.ff.ffff
575 14:01:19.747165 IO Manageability Engine FW Version = 11.1.4.0
576 14:01:19.750456 PHY Build Version = 0.0.0.e0
577 14:01:19.753775 Thunderbolt(TM) FW Version = 0.0.0.0
578 14:01:19.760148 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 14:01:19.763449 ITSS IRQ Polarities Before:
580 14:01:19.763628 IPC0: 0xffffffff
581 14:01:19.767740 IPC1: 0xffffffff
582 14:01:19.767907 IPC2: 0xffffffff
583 14:01:19.771114 IPC3: 0xffffffff
584 14:01:19.774613 ITSS IRQ Polarities After:
585 14:01:19.774801 IPC0: 0xffffffff
586 14:01:19.777797 IPC1: 0xffffffff
587 14:01:19.777982 IPC2: 0xffffffff
588 14:01:19.781305 IPC3: 0xffffffff
589 14:01:19.784390 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 14:01:19.797829 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 14:01:19.807989 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 14:01:19.821209 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 14:01:19.827874 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 14:01:19.828058 Enumerating buses...
595 14:01:19.834399 Show all devs... Before device enumeration.
596 14:01:19.834625 Root Device: enabled 1
597 14:01:19.837662 DOMAIN: 0000: enabled 1
598 14:01:19.840972 CPU_CLUSTER: 0: enabled 1
599 14:01:19.844103 PCI: 00:00.0: enabled 1
600 14:01:19.844287 PCI: 00:02.0: enabled 1
601 14:01:19.847327 PCI: 00:04.0: enabled 1
602 14:01:19.851139 PCI: 00:05.0: enabled 1
603 14:01:19.854069 PCI: 00:06.0: enabled 0
604 14:01:19.854272 PCI: 00:07.0: enabled 0
605 14:01:19.857813 PCI: 00:07.1: enabled 0
606 14:01:19.860854 PCI: 00:07.2: enabled 0
607 14:01:19.864045 PCI: 00:07.3: enabled 0
608 14:01:19.864387 PCI: 00:08.0: enabled 1
609 14:01:19.867517 PCI: 00:09.0: enabled 0
610 14:01:19.870870 PCI: 00:0a.0: enabled 0
611 14:01:19.871233 PCI: 00:0d.0: enabled 1
612 14:01:19.874149 PCI: 00:0d.1: enabled 0
613 14:01:19.878081 PCI: 00:0d.2: enabled 0
614 14:01:19.880588 PCI: 00:0d.3: enabled 0
615 14:01:19.880839 PCI: 00:0e.0: enabled 0
616 14:01:19.884378 PCI: 00:10.2: enabled 1
617 14:01:19.887735 PCI: 00:10.6: enabled 0
618 14:01:19.891157 PCI: 00:10.7: enabled 0
619 14:01:19.891464 PCI: 00:12.0: enabled 0
620 14:01:19.894399 PCI: 00:12.6: enabled 0
621 14:01:19.898064 PCI: 00:13.0: enabled 0
622 14:01:19.900568 PCI: 00:14.0: enabled 1
623 14:01:19.900925 PCI: 00:14.1: enabled 0
624 14:01:19.903964 PCI: 00:14.2: enabled 1
625 14:01:19.907247 PCI: 00:14.3: enabled 1
626 14:01:19.910818 PCI: 00:15.0: enabled 1
627 14:01:19.911071 PCI: 00:15.1: enabled 1
628 14:01:19.913709 PCI: 00:15.2: enabled 1
629 14:01:19.917039 PCI: 00:15.3: enabled 1
630 14:01:19.920603 PCI: 00:16.0: enabled 1
631 14:01:19.920858 PCI: 00:16.1: enabled 0
632 14:01:19.923912 PCI: 00:16.2: enabled 0
633 14:01:19.927319 PCI: 00:16.3: enabled 0
634 14:01:19.927571 PCI: 00:16.4: enabled 0
635 14:01:19.930119 PCI: 00:16.5: enabled 0
636 14:01:19.934182 PCI: 00:17.0: enabled 1
637 14:01:19.936692 PCI: 00:19.0: enabled 0
638 14:01:19.937031 PCI: 00:19.1: enabled 1
639 14:01:19.940264 PCI: 00:19.2: enabled 0
640 14:01:19.943954 PCI: 00:1c.0: enabled 1
641 14:01:19.947220 PCI: 00:1c.1: enabled 0
642 14:01:19.947494 PCI: 00:1c.2: enabled 0
643 14:01:19.950266 PCI: 00:1c.3: enabled 0
644 14:01:19.953393 PCI: 00:1c.4: enabled 0
645 14:01:19.956855 PCI: 00:1c.5: enabled 0
646 14:01:19.957169 PCI: 00:1c.6: enabled 1
647 14:01:19.960202 PCI: 00:1c.7: enabled 0
648 14:01:19.963430 PCI: 00:1d.0: enabled 1
649 14:01:19.967017 PCI: 00:1d.1: enabled 0
650 14:01:19.967305 PCI: 00:1d.2: enabled 1
651 14:01:19.970425 PCI: 00:1d.3: enabled 0
652 14:01:19.973700 PCI: 00:1e.0: enabled 1
653 14:01:19.976346 PCI: 00:1e.1: enabled 0
654 14:01:19.976601 PCI: 00:1e.2: enabled 1
655 14:01:19.979855 PCI: 00:1e.3: enabled 1
656 14:01:19.983186 PCI: 00:1f.0: enabled 1
657 14:01:19.983489 PCI: 00:1f.1: enabled 0
658 14:01:19.986871 PCI: 00:1f.2: enabled 1
659 14:01:19.989999 PCI: 00:1f.3: enabled 1
660 14:01:19.993446 PCI: 00:1f.4: enabled 0
661 14:01:19.993699 PCI: 00:1f.5: enabled 1
662 14:01:19.996460 PCI: 00:1f.6: enabled 0
663 14:01:19.999791 PCI: 00:1f.7: enabled 0
664 14:01:20.002881 APIC: 00: enabled 1
665 14:01:20.003142 GENERIC: 0.0: enabled 1
666 14:01:20.006279 GENERIC: 0.0: enabled 1
667 14:01:20.009879 GENERIC: 1.0: enabled 1
668 14:01:20.010126 GENERIC: 0.0: enabled 1
669 14:01:20.012771 GENERIC: 1.0: enabled 1
670 14:01:20.016190 USB0 port 0: enabled 1
671 14:01:20.019473 GENERIC: 0.0: enabled 1
672 14:01:20.019726 USB0 port 0: enabled 1
673 14:01:20.022552 GENERIC: 0.0: enabled 1
674 14:01:20.026319 I2C: 00:1a: enabled 1
675 14:01:20.026545 I2C: 00:31: enabled 1
676 14:01:20.029476 I2C: 00:32: enabled 1
677 14:01:20.032718 I2C: 00:10: enabled 1
678 14:01:20.036007 I2C: 00:15: enabled 1
679 14:01:20.036260 GENERIC: 0.0: enabled 0
680 14:01:20.039449 GENERIC: 1.0: enabled 0
681 14:01:20.042338 GENERIC: 0.0: enabled 1
682 14:01:20.042416 SPI: 00: enabled 1
683 14:01:20.045758 SPI: 00: enabled 1
684 14:01:20.049156 PNP: 0c09.0: enabled 1
685 14:01:20.049235 GENERIC: 0.0: enabled 1
686 14:01:20.052631 USB3 port 0: enabled 1
687 14:01:20.055979 USB3 port 1: enabled 1
688 14:01:20.056058 USB3 port 2: enabled 0
689 14:01:20.059022 USB3 port 3: enabled 0
690 14:01:20.062266 USB2 port 0: enabled 0
691 14:01:20.066074 USB2 port 1: enabled 1
692 14:01:20.066519 USB2 port 2: enabled 1
693 14:01:20.069739 USB2 port 3: enabled 0
694 14:01:20.072599 USB2 port 4: enabled 1
695 14:01:20.073100 USB2 port 5: enabled 0
696 14:01:20.075760 USB2 port 6: enabled 0
697 14:01:20.079402 USB2 port 7: enabled 0
698 14:01:20.082795 USB2 port 8: enabled 0
699 14:01:20.083248 USB2 port 9: enabled 0
700 14:01:20.086035 USB3 port 0: enabled 0
701 14:01:20.089346 USB3 port 1: enabled 1
702 14:01:20.089803 USB3 port 2: enabled 0
703 14:01:20.092882 USB3 port 3: enabled 0
704 14:01:20.095704 GENERIC: 0.0: enabled 1
705 14:01:20.098846 GENERIC: 1.0: enabled 1
706 14:01:20.099347 APIC: 01: enabled 1
707 14:01:20.102402 APIC: 03: enabled 1
708 14:01:20.102911 APIC: 07: enabled 1
709 14:01:20.105767 APIC: 05: enabled 1
710 14:01:20.109436 APIC: 04: enabled 1
711 14:01:20.109902 APIC: 02: enabled 1
712 14:01:20.112425 APIC: 06: enabled 1
713 14:01:20.115815 Compare with tree...
714 14:01:20.116219 Root Device: enabled 1
715 14:01:20.119080 DOMAIN: 0000: enabled 1
716 14:01:20.121864 PCI: 00:00.0: enabled 1
717 14:01:20.125031 PCI: 00:02.0: enabled 1
718 14:01:20.125498 PCI: 00:04.0: enabled 1
719 14:01:20.129029 GENERIC: 0.0: enabled 1
720 14:01:20.132649 PCI: 00:05.0: enabled 1
721 14:01:20.135321 PCI: 00:06.0: enabled 0
722 14:01:20.138390 PCI: 00:07.0: enabled 0
723 14:01:20.141971 GENERIC: 0.0: enabled 1
724 14:01:20.142287 PCI: 00:07.1: enabled 0
725 14:01:20.145170 GENERIC: 1.0: enabled 1
726 14:01:20.148642 PCI: 00:07.2: enabled 0
727 14:01:20.152177 GENERIC: 0.0: enabled 1
728 14:01:20.155164 PCI: 00:07.3: enabled 0
729 14:01:20.155248 GENERIC: 1.0: enabled 1
730 14:01:20.158511 PCI: 00:08.0: enabled 1
731 14:01:20.161678 PCI: 00:09.0: enabled 0
732 14:01:20.164689 PCI: 00:0a.0: enabled 0
733 14:01:20.168094 PCI: 00:0d.0: enabled 1
734 14:01:20.168189 USB0 port 0: enabled 1
735 14:01:20.172132 USB3 port 0: enabled 1
736 14:01:20.175080 USB3 port 1: enabled 1
737 14:01:20.178651 USB3 port 2: enabled 0
738 14:01:20.181407 USB3 port 3: enabled 0
739 14:01:20.181488 PCI: 00:0d.1: enabled 0
740 14:01:20.184845 PCI: 00:0d.2: enabled 0
741 14:01:20.188195 GENERIC: 0.0: enabled 1
742 14:01:20.191683 PCI: 00:0d.3: enabled 0
743 14:01:20.194714 PCI: 00:0e.0: enabled 0
744 14:01:20.195123 PCI: 00:10.2: enabled 1
745 14:01:20.198331 PCI: 00:10.6: enabled 0
746 14:01:20.201500 PCI: 00:10.7: enabled 0
747 14:01:20.204844 PCI: 00:12.0: enabled 0
748 14:01:20.208274 PCI: 00:12.6: enabled 0
749 14:01:20.208712 PCI: 00:13.0: enabled 0
750 14:01:20.211815 PCI: 00:14.0: enabled 1
751 14:01:20.214621 USB0 port 0: enabled 1
752 14:01:20.218078 USB2 port 0: enabled 0
753 14:01:20.221296 USB2 port 1: enabled 1
754 14:01:20.224416 USB2 port 2: enabled 1
755 14:01:20.225099 USB2 port 3: enabled 0
756 14:01:20.227916 USB2 port 4: enabled 1
757 14:01:20.231094 USB2 port 5: enabled 0
758 14:01:20.234543 USB2 port 6: enabled 0
759 14:01:20.238088 USB2 port 7: enabled 0
760 14:01:20.241150 USB2 port 8: enabled 0
761 14:01:20.241627 USB2 port 9: enabled 0
762 14:01:20.244475 USB3 port 0: enabled 0
763 14:01:20.247925 USB3 port 1: enabled 1
764 14:01:20.250858 USB3 port 2: enabled 0
765 14:01:20.254310 USB3 port 3: enabled 0
766 14:01:20.254624 PCI: 00:14.1: enabled 0
767 14:01:20.258187 PCI: 00:14.2: enabled 1
768 14:01:20.260688 PCI: 00:14.3: enabled 1
769 14:01:20.264233 GENERIC: 0.0: enabled 1
770 14:01:20.267568 PCI: 00:15.0: enabled 1
771 14:01:20.267930 I2C: 00:1a: enabled 1
772 14:01:20.270862 I2C: 00:31: enabled 1
773 14:01:20.274311 I2C: 00:32: enabled 1
774 14:01:20.277324 PCI: 00:15.1: enabled 1
775 14:01:20.280563 I2C: 00:10: enabled 1
776 14:01:20.280883 PCI: 00:15.2: enabled 1
777 14:01:20.284531 PCI: 00:15.3: enabled 1
778 14:01:20.287429 PCI: 00:16.0: enabled 1
779 14:01:20.290743 PCI: 00:16.1: enabled 0
780 14:01:20.294539 PCI: 00:16.2: enabled 0
781 14:01:20.294931 PCI: 00:16.3: enabled 0
782 14:01:20.298065 PCI: 00:16.4: enabled 0
783 14:01:20.300317 PCI: 00:16.5: enabled 0
784 14:01:20.303910 PCI: 00:17.0: enabled 1
785 14:01:20.307351 PCI: 00:19.0: enabled 0
786 14:01:20.307661 PCI: 00:19.1: enabled 1
787 14:01:20.310883 I2C: 00:15: enabled 1
788 14:01:20.314096 PCI: 00:19.2: enabled 0
789 14:01:20.317032 PCI: 00:1d.0: enabled 1
790 14:01:20.317345 GENERIC: 0.0: enabled 1
791 14:01:20.320583 PCI: 00:1e.0: enabled 1
792 14:01:20.323476 PCI: 00:1e.1: enabled 0
793 14:01:20.327092 PCI: 00:1e.2: enabled 1
794 14:01:20.330844 SPI: 00: enabled 1
795 14:01:20.331156 PCI: 00:1e.3: enabled 1
796 14:01:20.334025 SPI: 00: enabled 1
797 14:01:20.336597 PCI: 00:1f.0: enabled 1
798 14:01:20.340366 PNP: 0c09.0: enabled 1
799 14:01:20.340678 PCI: 00:1f.1: enabled 0
800 14:01:20.343481 PCI: 00:1f.2: enabled 1
801 14:01:20.347245 GENERIC: 0.0: enabled 1
802 14:01:20.350342 GENERIC: 0.0: enabled 1
803 14:01:20.353983 GENERIC: 1.0: enabled 1
804 14:01:20.358038 PCI: 00:1f.3: enabled 1
805 14:01:20.358350 PCI: 00:1f.4: enabled 0
806 14:01:20.359870 PCI: 00:1f.5: enabled 1
807 14:01:20.363277 PCI: 00:1f.6: enabled 0
808 14:01:20.366747 PCI: 00:1f.7: enabled 0
809 14:01:20.418594 CPU_CLUSTER: 0: enabled 1
810 14:01:20.418960 APIC: 00: enabled 1
811 14:01:20.419211 APIC: 01: enabled 1
812 14:01:20.419735 APIC: 03: enabled 1
813 14:01:20.419984 APIC: 07: enabled 1
814 14:01:20.420210 APIC: 05: enabled 1
815 14:01:20.420722 APIC: 04: enabled 1
816 14:01:20.420987 APIC: 02: enabled 1
817 14:01:20.421217 APIC: 06: enabled 1
818 14:01:20.421430 Root Device scanning...
819 14:01:20.421640 scan_static_bus for Root Device
820 14:01:20.422142 DOMAIN: 0000 enabled
821 14:01:20.422375 CPU_CLUSTER: 0 enabled
822 14:01:20.422585 DOMAIN: 0000 scanning...
823 14:01:20.422795 PCI: pci_scan_bus for bus 00
824 14:01:20.422999 PCI: 00:00.0 [8086/0000] ops
825 14:01:20.423202 PCI: 00:00.0 [8086/9a12] enabled
826 14:01:20.423407 PCI: 00:02.0 [8086/0000] bus ops
827 14:01:20.423609 PCI: 00:02.0 [8086/9a40] enabled
828 14:01:20.468777 PCI: 00:04.0 [8086/0000] bus ops
829 14:01:20.469160 PCI: 00:04.0 [8086/9a03] enabled
830 14:01:20.469702 PCI: 00:05.0 [8086/9a19] enabled
831 14:01:20.469964 PCI: 00:07.0 [0000/0000] hidden
832 14:01:20.470198 PCI: 00:08.0 [8086/9a11] enabled
833 14:01:20.470425 PCI: 00:0a.0 [8086/9a0d] disabled
834 14:01:20.470930 PCI: 00:0d.0 [8086/0000] bus ops
835 14:01:20.471166 PCI: 00:0d.0 [8086/9a13] enabled
836 14:01:20.471385 PCI: 00:14.0 [8086/0000] bus ops
837 14:01:20.471599 PCI: 00:14.0 [8086/a0ed] enabled
838 14:01:20.471808 PCI: 00:14.2 [8086/a0ef] enabled
839 14:01:20.472013 PCI: 00:14.3 [8086/0000] bus ops
840 14:01:20.472218 PCI: 00:14.3 [8086/a0f0] enabled
841 14:01:20.472422 PCI: 00:15.0 [8086/0000] bus ops
842 14:01:20.472898 PCI: 00:15.0 [8086/a0e8] enabled
843 14:01:20.473142 PCI: 00:15.1 [8086/0000] bus ops
844 14:01:20.498352 PCI: 00:15.1 [8086/a0e9] enabled
845 14:01:20.499022 PCI: 00:15.2 [8086/0000] bus ops
846 14:01:20.499339 PCI: 00:15.2 [8086/a0ea] enabled
847 14:01:20.499594 PCI: 00:15.3 [8086/0000] bus ops
848 14:01:20.499825 PCI: 00:15.3 [8086/a0eb] enabled
849 14:01:20.500051 PCI: 00:16.0 [8086/0000] ops
850 14:01:20.500269 PCI: 00:16.0 [8086/a0e0] enabled
851 14:01:20.502243 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 14:01:20.505617 PCI: 00:19.0 [8086/0000] bus ops
853 14:01:20.505933 PCI: 00:19.0 [8086/a0c5] disabled
854 14:01:20.509020 PCI: 00:19.1 [8086/0000] bus ops
855 14:01:20.512157 PCI: 00:19.1 [8086/a0c6] enabled
856 14:01:20.515333 PCI: 00:1d.0 [8086/0000] bus ops
857 14:01:20.518394 PCI: 00:1d.0 [8086/a0b0] enabled
858 14:01:20.521817 PCI: 00:1e.0 [8086/0000] ops
859 14:01:20.525195 PCI: 00:1e.0 [8086/a0a8] enabled
860 14:01:20.528684 PCI: 00:1e.2 [8086/0000] bus ops
861 14:01:20.531703 PCI: 00:1e.2 [8086/a0aa] enabled
862 14:01:20.535283 PCI: 00:1e.3 [8086/0000] bus ops
863 14:01:20.538425 PCI: 00:1e.3 [8086/a0ab] enabled
864 14:01:20.542176 PCI: 00:1f.0 [8086/0000] bus ops
865 14:01:20.544928 PCI: 00:1f.0 [8086/a087] enabled
866 14:01:20.545264 RTC Init
867 14:01:20.551697 Set power on after power failure.
868 14:01:20.552016 Disabling Deep S3
869 14:01:20.554903 Disabling Deep S3
870 14:01:20.555245 Disabling Deep S4
871 14:01:20.558079 Disabling Deep S4
872 14:01:20.558408 Disabling Deep S5
873 14:01:20.561759 Disabling Deep S5
874 14:01:20.564605 PCI: 00:1f.2 [0000/0000] hidden
875 14:01:20.567937 PCI: 00:1f.3 [8086/0000] bus ops
876 14:01:20.571449 PCI: 00:1f.3 [8086/a0c8] enabled
877 14:01:20.574599 PCI: 00:1f.5 [8086/0000] bus ops
878 14:01:20.577922 PCI: 00:1f.5 [8086/a0a4] enabled
879 14:01:20.581286 PCI: Leftover static devices:
880 14:01:20.581374 PCI: 00:10.2
881 14:01:20.584691 PCI: 00:10.6
882 14:01:20.584781 PCI: 00:10.7
883 14:01:20.587790 PCI: 00:06.0
884 14:01:20.587871 PCI: 00:07.1
885 14:01:20.587957 PCI: 00:07.2
886 14:01:20.591249 PCI: 00:07.3
887 14:01:20.591331 PCI: 00:09.0
888 14:01:20.594591 PCI: 00:0d.1
889 14:01:20.594672 PCI: 00:0d.2
890 14:01:20.594758 PCI: 00:0d.3
891 14:01:20.597846 PCI: 00:0e.0
892 14:01:20.597946 PCI: 00:12.0
893 14:01:20.601549 PCI: 00:12.6
894 14:01:20.601646 PCI: 00:13.0
895 14:01:20.604303 PCI: 00:14.1
896 14:01:20.604407 PCI: 00:16.1
897 14:01:20.604517 PCI: 00:16.2
898 14:01:20.607569 PCI: 00:16.3
899 14:01:20.607672 PCI: 00:16.4
900 14:01:20.610967 PCI: 00:16.5
901 14:01:20.611080 PCI: 00:17.0
902 14:01:20.611191 PCI: 00:19.2
903 14:01:20.614157 PCI: 00:1e.1
904 14:01:20.614269 PCI: 00:1f.1
905 14:01:20.617821 PCI: 00:1f.4
906 14:01:20.617944 PCI: 00:1f.6
907 14:01:20.618065 PCI: 00:1f.7
908 14:01:20.620826 PCI: Check your devicetree.cb.
909 14:01:20.624558 PCI: 00:02.0 scanning...
910 14:01:20.627828 scan_generic_bus for PCI: 00:02.0
911 14:01:20.631362 scan_generic_bus for PCI: 00:02.0 done
912 14:01:20.637684 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 14:01:20.641137 PCI: 00:04.0 scanning...
914 14:01:20.644258 scan_generic_bus for PCI: 00:04.0
915 14:01:20.644503 GENERIC: 0.0 enabled
916 14:01:20.650862 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 14:01:20.657296 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 14:01:20.657663 PCI: 00:0d.0 scanning...
919 14:01:20.660928 scan_static_bus for PCI: 00:0d.0
920 14:01:20.663893 USB0 port 0 enabled
921 14:01:20.667490 USB0 port 0 scanning...
922 14:01:20.670897 scan_static_bus for USB0 port 0
923 14:01:20.674145 USB3 port 0 enabled
924 14:01:20.674485 USB3 port 1 enabled
925 14:01:20.677639 USB3 port 2 disabled
926 14:01:20.678004 USB3 port 3 disabled
927 14:01:20.680509 USB3 port 0 scanning...
928 14:01:20.684082 scan_static_bus for USB3 port 0
929 14:01:20.687334 scan_static_bus for USB3 port 0 done
930 14:01:20.694171 scan_bus: bus USB3 port 0 finished in 6 msecs
931 14:01:20.694537 USB3 port 1 scanning...
932 14:01:20.697656 scan_static_bus for USB3 port 1
933 14:01:20.703825 scan_static_bus for USB3 port 1 done
934 14:01:20.707497 scan_bus: bus USB3 port 1 finished in 6 msecs
935 14:01:20.710817 scan_static_bus for USB0 port 0 done
936 14:01:20.713893 scan_bus: bus USB0 port 0 finished in 43 msecs
937 14:01:20.720466 scan_static_bus for PCI: 00:0d.0 done
938 14:01:20.723780 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 14:01:20.727500 PCI: 00:14.0 scanning...
940 14:01:20.730689 scan_static_bus for PCI: 00:14.0
941 14:01:20.734510 USB0 port 0 enabled
942 14:01:20.734887 USB0 port 0 scanning...
943 14:01:20.737043 scan_static_bus for USB0 port 0
944 14:01:20.740179 USB2 port 0 disabled
945 14:01:20.743508 USB2 port 1 enabled
946 14:01:20.743595 USB2 port 2 enabled
947 14:01:20.746851 USB2 port 3 disabled
948 14:01:20.750264 USB2 port 4 enabled
949 14:01:20.750347 USB2 port 5 disabled
950 14:01:20.753289 USB2 port 6 disabled
951 14:01:20.753368 USB2 port 7 disabled
952 14:01:20.756570 USB2 port 8 disabled
953 14:01:20.759858 USB2 port 9 disabled
954 14:01:20.759935 USB3 port 0 disabled
955 14:01:20.763672 USB3 port 1 enabled
956 14:01:20.766389 USB3 port 2 disabled
957 14:01:20.766473 USB3 port 3 disabled
958 14:01:20.769642 USB2 port 1 scanning...
959 14:01:20.772891 scan_static_bus for USB2 port 1
960 14:01:20.776561 scan_static_bus for USB2 port 1 done
961 14:01:20.783063 scan_bus: bus USB2 port 1 finished in 6 msecs
962 14:01:20.783182 USB2 port 2 scanning...
963 14:01:20.786517 scan_static_bus for USB2 port 2
964 14:01:20.792960 scan_static_bus for USB2 port 2 done
965 14:01:20.796040 scan_bus: bus USB2 port 2 finished in 6 msecs
966 14:01:20.799462 USB2 port 4 scanning...
967 14:01:20.802926 scan_static_bus for USB2 port 4
968 14:01:20.805986 scan_static_bus for USB2 port 4 done
969 14:01:20.809347 scan_bus: bus USB2 port 4 finished in 6 msecs
970 14:01:20.813114 USB3 port 1 scanning...
971 14:01:20.816076 scan_static_bus for USB3 port 1
972 14:01:20.819522 scan_static_bus for USB3 port 1 done
973 14:01:20.826401 scan_bus: bus USB3 port 1 finished in 6 msecs
974 14:01:20.829703 scan_static_bus for USB0 port 0 done
975 14:01:20.832862 scan_bus: bus USB0 port 0 finished in 93 msecs
976 14:01:20.836067 scan_static_bus for PCI: 00:14.0 done
977 14:01:20.842861 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 14:01:20.846040 PCI: 00:14.3 scanning...
979 14:01:20.849174 scan_static_bus for PCI: 00:14.3
980 14:01:20.849607 GENERIC: 0.0 enabled
981 14:01:20.852729 scan_static_bus for PCI: 00:14.3 done
982 14:01:20.859141 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 14:01:20.862359 PCI: 00:15.0 scanning...
984 14:01:20.865715 scan_static_bus for PCI: 00:15.0
985 14:01:20.866124 I2C: 00:1a enabled
986 14:01:20.869057 I2C: 00:31 enabled
987 14:01:20.869484 I2C: 00:32 enabled
988 14:01:20.875751 scan_static_bus for PCI: 00:15.0 done
989 14:01:20.878839 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 14:01:20.882772 PCI: 00:15.1 scanning...
991 14:01:20.885767 scan_static_bus for PCI: 00:15.1
992 14:01:20.886059 I2C: 00:10 enabled
993 14:01:20.892888 scan_static_bus for PCI: 00:15.1 done
994 14:01:20.895839 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 14:01:20.898778 PCI: 00:15.2 scanning...
996 14:01:20.902216 scan_static_bus for PCI: 00:15.2
997 14:01:20.905767 scan_static_bus for PCI: 00:15.2 done
998 14:01:20.909113 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 14:01:20.911927 PCI: 00:15.3 scanning...
1000 14:01:20.915413 scan_static_bus for PCI: 00:15.3
1001 14:01:20.918818 scan_static_bus for PCI: 00:15.3 done
1002 14:01:20.925381 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 14:01:20.928335 PCI: 00:19.1 scanning...
1004 14:01:20.931875 scan_static_bus for PCI: 00:19.1
1005 14:01:20.932348 I2C: 00:15 enabled
1006 14:01:20.935860 scan_static_bus for PCI: 00:19.1 done
1007 14:01:20.942230 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 14:01:20.945430 PCI: 00:1d.0 scanning...
1009 14:01:20.949415 do_pci_scan_bridge for PCI: 00:1d.0
1010 14:01:20.951986 PCI: pci_scan_bus for bus 01
1011 14:01:20.955115 PCI: 01:00.0 [15b7/5009] enabled
1012 14:01:20.955560 GENERIC: 0.0 enabled
1013 14:01:20.961763 Enabling Common Clock Configuration
1014 14:01:20.964589 L1 Sub-State supported from root port 29
1015 14:01:20.968126 L1 Sub-State Support = 0x5
1016 14:01:20.971430 CommonModeRestoreTime = 0x28
1017 14:01:20.974640 Power On Value = 0x16, Power On Scale = 0x0
1018 14:01:20.974934 ASPM: Enabled L1
1019 14:01:20.981355 PCIe: Max_Payload_Size adjusted to 128
1020 14:01:20.984295 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 14:01:20.987800 PCI: 00:1e.2 scanning...
1022 14:01:20.990880 scan_generic_bus for PCI: 00:1e.2
1023 14:01:20.990964 SPI: 00 enabled
1024 14:01:20.997496 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 14:01:21.004069 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 14:01:21.004166 PCI: 00:1e.3 scanning...
1027 14:01:21.010955 scan_generic_bus for PCI: 00:1e.3
1028 14:01:21.011047 SPI: 00 enabled
1029 14:01:21.018169 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 14:01:21.021869 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 14:01:21.025531 PCI: 00:1f.0 scanning...
1032 14:01:21.028160 scan_static_bus for PCI: 00:1f.0
1033 14:01:21.031959 PNP: 0c09.0 enabled
1034 14:01:21.032040 PNP: 0c09.0 scanning...
1035 14:01:21.034956 scan_static_bus for PNP: 0c09.0
1036 14:01:21.038359 scan_static_bus for PNP: 0c09.0 done
1037 14:01:21.044768 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 14:01:21.048344 scan_static_bus for PCI: 00:1f.0 done
1039 14:01:21.051526 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 14:01:21.055022 PCI: 00:1f.2 scanning...
1041 14:01:21.058048 scan_static_bus for PCI: 00:1f.2
1042 14:01:21.061677 GENERIC: 0.0 enabled
1043 14:01:21.065114 GENERIC: 0.0 scanning...
1044 14:01:21.068107 scan_static_bus for GENERIC: 0.0
1045 14:01:21.068186 GENERIC: 0.0 enabled
1046 14:01:21.071749 GENERIC: 1.0 enabled
1047 14:01:21.074722 scan_static_bus for GENERIC: 0.0 done
1048 14:01:21.081412 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 14:01:21.084589 scan_static_bus for PCI: 00:1f.2 done
1050 14:01:21.088074 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 14:01:21.091223 PCI: 00:1f.3 scanning...
1052 14:01:21.094473 scan_static_bus for PCI: 00:1f.3
1053 14:01:21.097701 scan_static_bus for PCI: 00:1f.3 done
1054 14:01:21.104402 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 14:01:21.104537 PCI: 00:1f.5 scanning...
1056 14:01:21.111268 scan_generic_bus for PCI: 00:1f.5
1057 14:01:21.114858 scan_generic_bus for PCI: 00:1f.5 done
1058 14:01:21.117576 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 14:01:21.124895 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 14:01:21.127604 scan_static_bus for Root Device done
1061 14:01:21.130906 scan_bus: bus Root Device finished in 736 msecs
1062 14:01:21.131188 done
1063 14:01:21.137295 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 14:01:21.141079 Chrome EC: UHEPI supported
1065 14:01:21.147886 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 14:01:21.154139 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 14:01:21.157216 SPI flash protection: WPSW=0 SRP0=1
1068 14:01:21.163758 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 14:01:21.167773 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 14:01:21.170366 found VGA at PCI: 00:02.0
1071 14:01:21.173805 Setting up VGA for PCI: 00:02.0
1072 14:01:21.180363 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 14:01:21.184130 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 14:01:21.187069 Allocating resources...
1075 14:01:21.190771 Reading resources...
1076 14:01:21.194275 Root Device read_resources bus 0 link: 0
1077 14:01:21.196847 DOMAIN: 0000 read_resources bus 0 link: 0
1078 14:01:21.203405 PCI: 00:04.0 read_resources bus 1 link: 0
1079 14:01:21.206736 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 14:01:21.213899 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 14:01:21.216985 USB0 port 0 read_resources bus 0 link: 0
1082 14:01:21.223719 USB0 port 0 read_resources bus 0 link: 0 done
1083 14:01:21.227202 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 14:01:21.233197 PCI: 00:14.0 read_resources bus 0 link: 0
1085 14:01:21.236811 USB0 port 0 read_resources bus 0 link: 0
1086 14:01:21.243229 USB0 port 0 read_resources bus 0 link: 0 done
1087 14:01:21.246682 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 14:01:21.253248 PCI: 00:14.3 read_resources bus 0 link: 0
1089 14:01:21.256329 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 14:01:21.262925 PCI: 00:15.0 read_resources bus 0 link: 0
1091 14:01:21.266625 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 14:01:21.272903 PCI: 00:15.1 read_resources bus 0 link: 0
1093 14:01:21.276680 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 14:01:21.283231 PCI: 00:19.1 read_resources bus 0 link: 0
1095 14:01:21.286370 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 14:01:21.292786 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 14:01:21.296142 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 14:01:21.302797 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 14:01:21.306000 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 14:01:21.312785 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 14:01:21.316683 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 14:01:21.322553 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 14:01:21.326542 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 14:01:21.332560 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 14:01:21.335542 GENERIC: 0.0 read_resources bus 0 link: 0
1106 14:01:21.342204 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 14:01:21.345975 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 14:01:21.351924 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 14:01:21.355648 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 14:01:21.362459 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 14:01:21.365602 Root Device read_resources bus 0 link: 0 done
1112 14:01:21.368302 Done reading resources.
1113 14:01:21.375273 Show resources in subtree (Root Device)...After reading.
1114 14:01:21.378584 Root Device child on link 0 DOMAIN: 0000
1115 14:01:21.381724 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 14:01:21.391446 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 14:01:21.401370 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 14:01:21.404700 PCI: 00:00.0
1119 14:01:21.411955 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 14:01:21.421629 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 14:01:21.431587 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 14:01:21.441764 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 14:01:21.451562 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 14:01:21.461558 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 14:01:21.467861 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 14:01:21.478069 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 14:01:21.487605 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 14:01:21.497485 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 14:01:21.507950 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 14:01:21.517668 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 14:01:21.523920 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 14:01:21.534078 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 14:01:21.544412 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 14:01:21.554201 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 14:01:21.563961 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 14:01:21.573936 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 14:01:21.580627 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 14:01:21.590444 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 14:01:21.593702 PCI: 00:02.0
1140 14:01:21.603657 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 14:01:21.613672 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 14:01:21.623656 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 14:01:21.626860 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 14:01:21.636754 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 14:01:21.640496 GENERIC: 0.0
1146 14:01:21.640807 PCI: 00:05.0
1147 14:01:21.650126 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 14:01:21.656615 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 14:01:21.656929 GENERIC: 0.0
1150 14:01:21.659899 PCI: 00:08.0
1151 14:01:21.669930 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:01:21.670389 PCI: 00:0a.0
1153 14:01:21.673165 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 14:01:21.683954 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 14:01:21.689542 USB0 port 0 child on link 0 USB3 port 0
1156 14:01:21.689842 USB3 port 0
1157 14:01:21.693036 USB3 port 1
1158 14:01:21.693318 USB3 port 2
1159 14:01:21.696634 USB3 port 3
1160 14:01:21.699233 PCI: 00:14.0 child on link 0 USB0 port 0
1161 14:01:21.709692 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 14:01:21.716293 USB0 port 0 child on link 0 USB2 port 0
1163 14:01:21.716673 USB2 port 0
1164 14:01:21.719300 USB2 port 1
1165 14:01:21.719617 USB2 port 2
1166 14:01:21.722414 USB2 port 3
1167 14:01:21.722805 USB2 port 4
1168 14:01:21.726594 USB2 port 5
1169 14:01:21.726916 USB2 port 6
1170 14:01:21.729145 USB2 port 7
1171 14:01:21.729566 USB2 port 8
1172 14:01:21.732408 USB2 port 9
1173 14:01:21.735421 USB3 port 0
1174 14:01:21.735740 USB3 port 1
1175 14:01:21.739101 USB3 port 2
1176 14:01:21.739415 USB3 port 3
1177 14:01:21.742766 PCI: 00:14.2
1178 14:01:21.752401 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 14:01:21.762297 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 14:01:21.765478 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 14:01:21.775520 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 14:01:21.779126 GENERIC: 0.0
1183 14:01:21.782163 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 14:01:21.791703 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 14:01:21.792105 I2C: 00:1a
1186 14:01:21.795042 I2C: 00:31
1187 14:01:21.795482 I2C: 00:32
1188 14:01:21.801727 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 14:01:21.811619 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:01:21.811943 I2C: 00:10
1191 14:01:21.815082 PCI: 00:15.2
1192 14:01:21.825033 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 14:01:21.825461 PCI: 00:15.3
1194 14:01:21.834680 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:01:21.838800 PCI: 00:16.0
1196 14:01:21.848285 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 14:01:21.848690 PCI: 00:19.0
1198 14:01:21.851590 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 14:01:21.861337 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 14:01:21.864501 I2C: 00:15
1201 14:01:21.867826 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 14:01:21.877723 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 14:01:21.887409 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 14:01:21.897362 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 14:01:21.897697 GENERIC: 0.0
1206 14:01:21.901394 PCI: 01:00.0
1207 14:01:21.910633 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 14:01:21.920609 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 14:01:21.920936 PCI: 00:1e.0
1210 14:01:21.934236 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 14:01:21.936971 PCI: 00:1e.2 child on link 0 SPI: 00
1212 14:01:21.947312 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 14:01:21.947728 SPI: 00
1214 14:01:21.953638 PCI: 00:1e.3 child on link 0 SPI: 00
1215 14:01:21.963091 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 14:01:21.963444 SPI: 00
1217 14:01:21.967238 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 14:01:21.976580 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 14:01:21.976924 PNP: 0c09.0
1220 14:01:21.986529 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 14:01:21.989723 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 14:01:21.999793 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 14:01:22.009608 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 14:01:22.012788 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 14:01:22.016511 GENERIC: 0.0
1226 14:01:22.019421 GENERIC: 1.0
1227 14:01:22.019721 PCI: 00:1f.3
1228 14:01:22.029471 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 14:01:22.039541 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 14:01:22.042752 PCI: 00:1f.5
1231 14:01:22.048859 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 14:01:22.056058 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 14:01:22.056392 APIC: 00
1234 14:01:22.059003 APIC: 01
1235 14:01:22.059353 APIC: 03
1236 14:01:22.059726 APIC: 07
1237 14:01:22.062330 APIC: 05
1238 14:01:22.062419 APIC: 04
1239 14:01:22.062508 APIC: 02
1240 14:01:22.065438 APIC: 06
1241 14:01:22.071980 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 14:01:22.078513 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 14:01:22.085153 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 14:01:22.092234 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 14:01:22.095054 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 14:01:22.098260 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 14:01:22.105368 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 14:01:22.111489 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 14:01:22.121464 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 14:01:22.128453 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 14:01:22.135252 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 14:01:22.141489 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 14:01:22.148059 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 14:01:22.158354 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 14:01:22.161522 DOMAIN: 0000: Resource ranges:
1256 14:01:22.164571 * Base: 1000, Size: 800, Tag: 100
1257 14:01:22.168076 * Base: 1900, Size: e700, Tag: 100
1258 14:01:22.174596 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 14:01:22.181895 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 14:01:22.188159 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 14:01:22.194255 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 14:01:22.200688 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 14:01:22.210973 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 14:01:22.217477 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 14:01:22.224296 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 14:01:22.233942 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 14:01:22.240792 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 14:01:22.247435 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 14:01:22.257364 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 14:01:22.264238 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 14:01:22.270309 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 14:01:22.280598 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 14:01:22.287036 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 14:01:22.293258 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 14:01:22.304013 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 14:01:22.310366 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 14:01:22.316457 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 14:01:22.326839 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 14:01:22.333792 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 14:01:22.340052 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 14:01:22.349885 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 14:01:22.356657 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 14:01:22.360254 DOMAIN: 0000: Resource ranges:
1284 14:01:22.363531 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 14:01:22.369692 * Base: d0000000, Size: 28000000, Tag: 200
1286 14:01:22.373063 * Base: fa000000, Size: 1000000, Tag: 200
1287 14:01:22.376402 * Base: fb001000, Size: 2fff000, Tag: 200
1288 14:01:22.379600 * Base: fe010000, Size: 2e000, Tag: 200
1289 14:01:22.386508 * Base: fe03f000, Size: d41000, Tag: 200
1290 14:01:22.389494 * Base: fed88000, Size: 8000, Tag: 200
1291 14:01:22.393018 * Base: fed93000, Size: d000, Tag: 200
1292 14:01:22.396178 * Base: feda2000, Size: 1e000, Tag: 200
1293 14:01:22.403443 * Base: fede0000, Size: 1220000, Tag: 200
1294 14:01:22.406089 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 14:01:22.412980 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 14:01:22.419162 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 14:01:22.426205 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 14:01:22.433063 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 14:01:22.439156 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 14:01:22.445656 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 14:01:22.452294 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 14:01:22.458823 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 14:01:22.466304 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 14:01:22.472206 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 14:01:22.478944 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 14:01:22.485371 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 14:01:22.492037 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 14:01:22.498467 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 14:01:22.505556 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 14:01:22.511468 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 14:01:22.518050 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 14:01:22.524847 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 14:01:22.531288 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 14:01:22.537844 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 14:01:22.544659 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 14:01:22.550966 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 14:01:22.560844 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 14:01:22.567859 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 14:01:22.570978 PCI: 00:1d.0: Resource ranges:
1320 14:01:22.574976 * Base: 7fc00000, Size: 100000, Tag: 200
1321 14:01:22.581087 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 14:01:22.587668 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 14:01:22.597234 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 14:01:22.603911 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 14:01:22.607599 Root Device assign_resources, bus 0 link: 0
1326 14:01:22.614040 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 14:01:22.620481 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 14:01:22.630769 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 14:01:22.637281 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 14:01:22.647198 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 14:01:22.650456 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 14:01:22.653599 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 14:01:22.663923 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 14:01:22.670673 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 14:01:22.680316 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 14:01:22.683643 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 14:01:22.690086 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 14:01:22.696559 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 14:01:22.703590 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 14:01:22.706849 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 14:01:22.716779 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 14:01:22.723150 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 14:01:22.730107 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 14:01:22.735857 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 14:01:22.739459 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 14:01:22.749345 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 14:01:22.752223 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 14:01:22.759555 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 14:01:22.766097 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 14:01:22.768672 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 14:01:22.775446 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 14:01:22.782492 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 14:01:22.792256 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 14:01:22.798286 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 14:01:22.808434 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 14:01:22.811949 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 14:01:22.818210 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 14:01:22.824866 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 14:01:22.834877 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 14:01:22.844994 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 14:01:22.847901 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 14:01:22.858301 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 14:01:22.864612 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 14:01:22.870844 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 14:01:22.877643 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 14:01:22.880833 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 14:01:22.888015 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 14:01:22.894234 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 14:01:22.900928 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 14:01:22.904873 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 14:01:22.910817 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 14:01:22.914378 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 14:01:22.920921 LPC: Trying to open IO window from 800 size 1ff
1374 14:01:22.927595 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 14:01:22.937603 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 14:01:22.943793 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 14:01:22.947358 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 14:01:22.953743 Root Device assign_resources, bus 0 link: 0
1379 14:01:22.956712 Done setting resources.
1380 14:01:22.963866 Show resources in subtree (Root Device)...After assigning values.
1381 14:01:22.966886 Root Device child on link 0 DOMAIN: 0000
1382 14:01:22.970509 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 14:01:22.980245 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 14:01:22.990061 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 14:01:22.990497 PCI: 00:00.0
1386 14:01:22.999829 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 14:01:23.009650 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 14:01:23.019843 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 14:01:23.030230 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 14:01:23.039390 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 14:01:23.049783 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 14:01:23.056144 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 14:01:23.066195 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 14:01:23.075905 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 14:01:23.085974 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 14:01:23.096180 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 14:01:23.105777 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 14:01:23.112513 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 14:01:23.122383 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 14:01:23.132178 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 14:01:23.141876 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 14:01:23.151985 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 14:01:23.161789 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 14:01:23.168583 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 14:01:23.178342 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 14:01:23.181576 PCI: 00:02.0
1407 14:01:23.191223 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 14:01:23.201902 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 14:01:23.210899 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 14:01:23.218050 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 14:01:23.227736 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 14:01:23.227833 GENERIC: 0.0
1413 14:01:23.230927 PCI: 00:05.0
1414 14:01:23.240893 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 14:01:23.244236 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 14:01:23.247299 GENERIC: 0.0
1417 14:01:23.247386 PCI: 00:08.0
1418 14:01:23.257187 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 14:01:23.260786 PCI: 00:0a.0
1420 14:01:23.264290 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 14:01:23.274708 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 14:01:23.280847 USB0 port 0 child on link 0 USB3 port 0
1423 14:01:23.280933 USB3 port 0
1424 14:01:23.284092 USB3 port 1
1425 14:01:23.284176 USB3 port 2
1426 14:01:23.286980 USB3 port 3
1427 14:01:23.290321 PCI: 00:14.0 child on link 0 USB0 port 0
1428 14:01:23.300568 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 14:01:23.307293 USB0 port 0 child on link 0 USB2 port 0
1430 14:01:23.307387 USB2 port 0
1431 14:01:23.310737 USB2 port 1
1432 14:01:23.310842 USB2 port 2
1433 14:01:23.313588 USB2 port 3
1434 14:01:23.313699 USB2 port 4
1435 14:01:23.316758 USB2 port 5
1436 14:01:23.316866 USB2 port 6
1437 14:01:23.320876 USB2 port 7
1438 14:01:23.323686 USB2 port 8
1439 14:01:23.323803 USB2 port 9
1440 14:01:23.326819 USB3 port 0
1441 14:01:23.326940 USB3 port 1
1442 14:01:23.329860 USB3 port 2
1443 14:01:23.329955 USB3 port 3
1444 14:01:23.333671 PCI: 00:14.2
1445 14:01:23.343318 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 14:01:23.353161 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 14:01:23.357092 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 14:01:23.366962 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 14:01:23.370171 GENERIC: 0.0
1450 14:01:23.373411 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 14:01:23.382884 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 14:01:23.386621 I2C: 00:1a
1453 14:01:23.386706 I2C: 00:31
1454 14:01:23.389862 I2C: 00:32
1455 14:01:23.392595 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 14:01:23.403228 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 14:01:23.406320 I2C: 00:10
1458 14:01:23.406409 PCI: 00:15.2
1459 14:01:23.416219 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 14:01:23.419545 PCI: 00:15.3
1461 14:01:23.429397 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 14:01:23.429500 PCI: 00:16.0
1463 14:01:23.442797 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 14:01:23.442929 PCI: 00:19.0
1465 14:01:23.445576 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 14:01:23.458798 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 14:01:23.458989 I2C: 00:15
1468 14:01:23.462526 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 14:01:23.472507 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 14:01:23.485822 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 14:01:23.495541 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 14:01:23.495638 GENERIC: 0.0
1473 14:01:23.498788 PCI: 01:00.0
1474 14:01:23.508598 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 14:01:23.518536 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 14:01:23.521949 PCI: 00:1e.0
1477 14:01:23.531662 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 14:01:23.535052 PCI: 00:1e.2 child on link 0 SPI: 00
1479 14:01:23.544947 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 14:01:23.548090 SPI: 00
1481 14:01:23.551363 PCI: 00:1e.3 child on link 0 SPI: 00
1482 14:01:23.561475 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 14:01:23.564842 SPI: 00
1484 14:01:23.568506 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 14:01:23.577901 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 14:01:23.578043 PNP: 0c09.0
1487 14:01:23.588442 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 14:01:23.591622 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 14:01:23.601697 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 14:01:23.611384 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 14:01:23.614603 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 14:01:23.618208 GENERIC: 0.0
1493 14:01:23.618685 GENERIC: 1.0
1494 14:01:23.621622 PCI: 00:1f.3
1495 14:01:23.631184 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 14:01:23.641094 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 14:01:23.644089 PCI: 00:1f.5
1498 14:01:23.654136 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 14:01:23.657436 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 14:01:23.657881 APIC: 00
1501 14:01:23.660722 APIC: 01
1502 14:01:23.661399 APIC: 03
1503 14:01:23.661785 APIC: 07
1504 14:01:23.664229 APIC: 05
1505 14:01:23.664676 APIC: 04
1506 14:01:23.667637 APIC: 02
1507 14:01:23.668234 APIC: 06
1508 14:01:23.670714 Done allocating resources.
1509 14:01:23.677995 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1510 14:01:23.680908 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 14:01:23.687474 Configure GPIOs for I2S audio on UP4.
1512 14:01:23.694349 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 14:01:23.694795 Enabling resources...
1514 14:01:23.700712 PCI: 00:00.0 subsystem <- 8086/9a12
1515 14:01:23.701227 PCI: 00:00.0 cmd <- 06
1516 14:01:23.703933 PCI: 00:02.0 subsystem <- 8086/9a40
1517 14:01:23.707292 PCI: 00:02.0 cmd <- 03
1518 14:01:23.710435 PCI: 00:04.0 subsystem <- 8086/9a03
1519 14:01:23.713876 PCI: 00:04.0 cmd <- 02
1520 14:01:23.717474 PCI: 00:05.0 subsystem <- 8086/9a19
1521 14:01:23.720318 PCI: 00:05.0 cmd <- 02
1522 14:01:23.724075 PCI: 00:08.0 subsystem <- 8086/9a11
1523 14:01:23.727148 PCI: 00:08.0 cmd <- 06
1524 14:01:23.730510 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 14:01:23.733308 PCI: 00:0d.0 cmd <- 02
1526 14:01:23.736702 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 14:01:23.740039 PCI: 00:14.0 cmd <- 02
1528 14:01:23.743383 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 14:01:23.746670 PCI: 00:14.2 cmd <- 02
1530 14:01:23.749814 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 14:01:23.750308 PCI: 00:14.3 cmd <- 02
1532 14:01:23.756391 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 14:01:23.756828 PCI: 00:15.0 cmd <- 02
1534 14:01:23.760032 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 14:01:23.763377 PCI: 00:15.1 cmd <- 02
1536 14:01:23.766437 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 14:01:23.769287 PCI: 00:15.2 cmd <- 02
1538 14:01:23.772751 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 14:01:23.775917 PCI: 00:15.3 cmd <- 02
1540 14:01:23.779446 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 14:01:23.783253 PCI: 00:16.0 cmd <- 02
1542 14:01:23.785916 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 14:01:23.789854 PCI: 00:19.1 cmd <- 02
1544 14:01:23.792976 PCI: 00:1d.0 bridge ctrl <- 0013
1545 14:01:23.795706 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 14:01:23.799616 PCI: 00:1d.0 cmd <- 06
1547 14:01:23.802545 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 14:01:23.803019 PCI: 00:1e.0 cmd <- 06
1549 14:01:23.809057 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 14:01:23.809640 PCI: 00:1e.2 cmd <- 06
1551 14:01:23.812890 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 14:01:23.815877 PCI: 00:1e.3 cmd <- 02
1553 14:01:23.819463 PCI: 00:1f.0 subsystem <- 8086/a087
1554 14:01:23.822541 PCI: 00:1f.0 cmd <- 407
1555 14:01:23.825774 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 14:01:23.828903 PCI: 00:1f.3 cmd <- 02
1557 14:01:23.832062 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 14:01:23.835546 PCI: 00:1f.5 cmd <- 406
1559 14:01:23.839515 PCI: 01:00.0 cmd <- 02
1560 14:01:23.843723 done.
1561 14:01:23.846900 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 14:01:23.850465 Initializing devices...
1563 14:01:23.853456 Root Device init
1564 14:01:23.857247 Chrome EC: Set SMI mask to 0x0000000000000000
1565 14:01:23.863943 Chrome EC: clear events_b mask to 0x0000000000000000
1566 14:01:23.870540 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 14:01:23.873477 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 14:01:23.880210 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 14:01:23.886646 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 14:01:23.890315 fw_config match found: DB_USB=USB3_ACTIVE
1571 14:01:23.897071 Configure Right Type-C port orientation for retimer
1572 14:01:23.900113 Root Device init finished in 43 msecs
1573 14:01:23.903025 PCI: 00:00.0 init
1574 14:01:23.906687 CPU TDP = 9 Watts
1575 14:01:23.907221 CPU PL1 = 9 Watts
1576 14:01:23.910168 CPU PL2 = 40 Watts
1577 14:01:23.913171 CPU PL4 = 83 Watts
1578 14:01:23.916362 PCI: 00:00.0 init finished in 8 msecs
1579 14:01:23.916690 PCI: 00:02.0 init
1580 14:01:23.919567 GMA: Found VBT in CBFS
1581 14:01:23.923696 GMA: Found valid VBT in CBFS
1582 14:01:23.929717 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 14:01:23.936254 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 14:01:23.939237 PCI: 00:02.0 init finished in 18 msecs
1585 14:01:23.943347 PCI: 00:05.0 init
1586 14:01:23.946202 PCI: 00:05.0 init finished in 0 msecs
1587 14:01:23.949604 PCI: 00:08.0 init
1588 14:01:23.952445 PCI: 00:08.0 init finished in 0 msecs
1589 14:01:23.956013 PCI: 00:14.0 init
1590 14:01:23.959181 PCI: 00:14.0 init finished in 0 msecs
1591 14:01:23.962667 PCI: 00:14.2 init
1592 14:01:23.966041 PCI: 00:14.2 init finished in 0 msecs
1593 14:01:23.969191 PCI: 00:15.0 init
1594 14:01:23.969493 I2C bus 0 version 0x3230302a
1595 14:01:23.975734 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 14:01:23.979440 PCI: 00:15.0 init finished in 6 msecs
1597 14:01:23.979722 PCI: 00:15.1 init
1598 14:01:23.982251 I2C bus 1 version 0x3230302a
1599 14:01:23.985869 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 14:01:23.992575 PCI: 00:15.1 init finished in 6 msecs
1601 14:01:23.992877 PCI: 00:15.2 init
1602 14:01:23.995577 I2C bus 2 version 0x3230302a
1603 14:01:23.999006 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 14:01:24.001943 PCI: 00:15.2 init finished in 6 msecs
1605 14:01:24.005065 PCI: 00:15.3 init
1606 14:01:24.008653 I2C bus 3 version 0x3230302a
1607 14:01:24.011929 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 14:01:24.015096 PCI: 00:15.3 init finished in 6 msecs
1609 14:01:24.018435 PCI: 00:16.0 init
1610 14:01:24.021780 PCI: 00:16.0 init finished in 0 msecs
1611 14:01:24.025434 PCI: 00:19.1 init
1612 14:01:24.028300 I2C bus 5 version 0x3230302a
1613 14:01:24.031671 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 14:01:24.035675 PCI: 00:19.1 init finished in 6 msecs
1615 14:01:24.038579 PCI: 00:1d.0 init
1616 14:01:24.041564 Initializing PCH PCIe bridge.
1617 14:01:24.045084 PCI: 00:1d.0 init finished in 3 msecs
1618 14:01:24.048356 PCI: 00:1f.0 init
1619 14:01:24.051322 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 14:01:24.054934 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 14:01:24.058828 IOAPIC: ID = 0x02
1622 14:01:24.061457 IOAPIC: Dumping registers
1623 14:01:24.061779 reg 0x0000: 0x02000000
1624 14:01:24.064721 reg 0x0001: 0x00770020
1625 14:01:24.068412 reg 0x0002: 0x00000000
1626 14:01:24.071581 PCI: 00:1f.0 init finished in 21 msecs
1627 14:01:24.074423 PCI: 00:1f.2 init
1628 14:01:24.077749 Disabling ACPI via APMC.
1629 14:01:24.081431 APMC done.
1630 14:01:24.084471 PCI: 00:1f.2 init finished in 6 msecs
1631 14:01:24.095999 PCI: 01:00.0 init
1632 14:01:24.099862 PCI: 01:00.0 init finished in 0 msecs
1633 14:01:24.102872 PNP: 0c09.0 init
1634 14:01:24.106268 Google Chrome EC uptime: 8.280 seconds
1635 14:01:24.112904 Google Chrome AP resets since EC boot: 1
1636 14:01:24.115946 Google Chrome most recent AP reset causes:
1637 14:01:24.119115 0.482: 32775 shutdown: entering G3
1638 14:01:24.126034 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 14:01:24.128732 PNP: 0c09.0 init finished in 22 msecs
1640 14:01:24.135166 Devices initialized
1641 14:01:24.138535 Show all devs... After init.
1642 14:01:24.141925 Root Device: enabled 1
1643 14:01:24.142014 DOMAIN: 0000: enabled 1
1644 14:01:24.144750 CPU_CLUSTER: 0: enabled 1
1645 14:01:24.148346 PCI: 00:00.0: enabled 1
1646 14:01:24.151352 PCI: 00:02.0: enabled 1
1647 14:01:24.151461 PCI: 00:04.0: enabled 1
1648 14:01:24.154818 PCI: 00:05.0: enabled 1
1649 14:01:24.158325 PCI: 00:06.0: enabled 0
1650 14:01:24.161154 PCI: 00:07.0: enabled 0
1651 14:01:24.161287 PCI: 00:07.1: enabled 0
1652 14:01:24.164362 PCI: 00:07.2: enabled 0
1653 14:01:24.168240 PCI: 00:07.3: enabled 0
1654 14:01:24.171328 PCI: 00:08.0: enabled 1
1655 14:01:24.171500 PCI: 00:09.0: enabled 0
1656 14:01:24.174734 PCI: 00:0a.0: enabled 0
1657 14:01:24.177926 PCI: 00:0d.0: enabled 1
1658 14:01:24.181021 PCI: 00:0d.1: enabled 0
1659 14:01:24.181294 PCI: 00:0d.2: enabled 0
1660 14:01:24.184437 PCI: 00:0d.3: enabled 0
1661 14:01:24.188174 PCI: 00:0e.0: enabled 0
1662 14:01:24.191112 PCI: 00:10.2: enabled 1
1663 14:01:24.191555 PCI: 00:10.6: enabled 0
1664 14:01:24.194542 PCI: 00:10.7: enabled 0
1665 14:01:24.197998 PCI: 00:12.0: enabled 0
1666 14:01:24.200909 PCI: 00:12.6: enabled 0
1667 14:01:24.201403 PCI: 00:13.0: enabled 0
1668 14:01:24.204347 PCI: 00:14.0: enabled 1
1669 14:01:24.207755 PCI: 00:14.1: enabled 0
1670 14:01:24.208164 PCI: 00:14.2: enabled 1
1671 14:01:24.211593 PCI: 00:14.3: enabled 1
1672 14:01:24.214418 PCI: 00:15.0: enabled 1
1673 14:01:24.217610 PCI: 00:15.1: enabled 1
1674 14:01:24.218121 PCI: 00:15.2: enabled 1
1675 14:01:24.220754 PCI: 00:15.3: enabled 1
1676 14:01:24.224198 PCI: 00:16.0: enabled 1
1677 14:01:24.227431 PCI: 00:16.1: enabled 0
1678 14:01:24.227943 PCI: 00:16.2: enabled 0
1679 14:01:24.230468 PCI: 00:16.3: enabled 0
1680 14:01:24.234132 PCI: 00:16.4: enabled 0
1681 14:01:24.237114 PCI: 00:16.5: enabled 0
1682 14:01:24.237562 PCI: 00:17.0: enabled 0
1683 14:01:24.240819 PCI: 00:19.0: enabled 0
1684 14:01:24.243860 PCI: 00:19.1: enabled 1
1685 14:01:24.247137 PCI: 00:19.2: enabled 0
1686 14:01:24.247583 PCI: 00:1c.0: enabled 1
1687 14:01:24.250578 PCI: 00:1c.1: enabled 0
1688 14:01:24.253899 PCI: 00:1c.2: enabled 0
1689 14:01:24.257302 PCI: 00:1c.3: enabled 0
1690 14:01:24.257862 PCI: 00:1c.4: enabled 0
1691 14:01:24.260121 PCI: 00:1c.5: enabled 0
1692 14:01:24.264315 PCI: 00:1c.6: enabled 1
1693 14:01:24.267245 PCI: 00:1c.7: enabled 0
1694 14:01:24.267683 PCI: 00:1d.0: enabled 1
1695 14:01:24.270487 PCI: 00:1d.1: enabled 0
1696 14:01:24.273493 PCI: 00:1d.2: enabled 1
1697 14:01:24.273985 PCI: 00:1d.3: enabled 0
1698 14:01:24.276900 PCI: 00:1e.0: enabled 1
1699 14:01:24.280649 PCI: 00:1e.1: enabled 0
1700 14:01:24.284209 PCI: 00:1e.2: enabled 1
1701 14:01:24.284816 PCI: 00:1e.3: enabled 1
1702 14:01:24.286813 PCI: 00:1f.0: enabled 1
1703 14:01:24.290730 PCI: 00:1f.1: enabled 0
1704 14:01:24.293404 PCI: 00:1f.2: enabled 1
1705 14:01:24.293847 PCI: 00:1f.3: enabled 1
1706 14:01:24.296700 PCI: 00:1f.4: enabled 0
1707 14:01:24.300182 PCI: 00:1f.5: enabled 1
1708 14:01:24.303784 PCI: 00:1f.6: enabled 0
1709 14:01:24.304225 PCI: 00:1f.7: enabled 0
1710 14:01:24.306500 APIC: 00: enabled 1
1711 14:01:24.309745 GENERIC: 0.0: enabled 1
1712 14:01:24.310179 GENERIC: 0.0: enabled 1
1713 14:01:24.313501 GENERIC: 1.0: enabled 1
1714 14:01:24.316613 GENERIC: 0.0: enabled 1
1715 14:01:24.320061 GENERIC: 1.0: enabled 1
1716 14:01:24.320501 USB0 port 0: enabled 1
1717 14:01:24.323332 GENERIC: 0.0: enabled 1
1718 14:01:24.326938 USB0 port 0: enabled 1
1719 14:01:24.329835 GENERIC: 0.0: enabled 1
1720 14:01:24.330274 I2C: 00:1a: enabled 1
1721 14:01:24.333225 I2C: 00:31: enabled 1
1722 14:01:24.336170 I2C: 00:32: enabled 1
1723 14:01:24.336611 I2C: 00:10: enabled 1
1724 14:01:24.339944 I2C: 00:15: enabled 1
1725 14:01:24.343666 GENERIC: 0.0: enabled 0
1726 14:01:24.344127 GENERIC: 1.0: enabled 0
1727 14:01:24.346544 GENERIC: 0.0: enabled 1
1728 14:01:24.349499 SPI: 00: enabled 1
1729 14:01:24.349939 SPI: 00: enabled 1
1730 14:01:24.352912 PNP: 0c09.0: enabled 1
1731 14:01:24.356406 GENERIC: 0.0: enabled 1
1732 14:01:24.359846 USB3 port 0: enabled 1
1733 14:01:24.360286 USB3 port 1: enabled 1
1734 14:01:24.363115 USB3 port 2: enabled 0
1735 14:01:24.365850 USB3 port 3: enabled 0
1736 14:01:24.366292 USB2 port 0: enabled 0
1737 14:01:24.369200 USB2 port 1: enabled 1
1738 14:01:24.372689 USB2 port 2: enabled 1
1739 14:01:24.373152 USB2 port 3: enabled 0
1740 14:01:24.375741 USB2 port 4: enabled 1
1741 14:01:24.379211 USB2 port 5: enabled 0
1742 14:01:24.382740 USB2 port 6: enabled 0
1743 14:01:24.383313 USB2 port 7: enabled 0
1744 14:01:24.385997 USB2 port 8: enabled 0
1745 14:01:24.389358 USB2 port 9: enabled 0
1746 14:01:24.389797 USB3 port 0: enabled 0
1747 14:01:24.392462 USB3 port 1: enabled 1
1748 14:01:24.395715 USB3 port 2: enabled 0
1749 14:01:24.399255 USB3 port 3: enabled 0
1750 14:01:24.399758 GENERIC: 0.0: enabled 1
1751 14:01:24.402473 GENERIC: 1.0: enabled 1
1752 14:01:24.405803 APIC: 01: enabled 1
1753 14:01:24.406284 APIC: 03: enabled 1
1754 14:01:24.409359 APIC: 07: enabled 1
1755 14:01:24.412477 APIC: 05: enabled 1
1756 14:01:24.412938 APIC: 04: enabled 1
1757 14:01:24.416113 APIC: 02: enabled 1
1758 14:01:24.416605 APIC: 06: enabled 1
1759 14:01:24.418919 PCI: 01:00.0: enabled 1
1760 14:01:24.425516 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1761 14:01:24.429072 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 14:01:24.432380 ELOG: NV offset 0xf30000 size 0x1000
1763 14:01:24.440738 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 14:01:24.447128 ELOG: Event(17) added with size 13 at 2022-08-03 13:56:32 UTC
1765 14:01:24.453477 ELOG: Event(92) added with size 9 at 2022-08-03 13:56:32 UTC
1766 14:01:24.460241 ELOG: Event(93) added with size 9 at 2022-08-03 13:56:32 UTC
1767 14:01:24.467029 ELOG: Event(9E) added with size 10 at 2022-08-03 13:56:32 UTC
1768 14:01:24.473209 ELOG: Event(9F) added with size 14 at 2022-08-03 13:56:32 UTC
1769 14:01:24.479774 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 14:01:24.486337 ELOG: Event(A1) added with size 10 at 2022-08-03 13:56:32 UTC
1771 14:01:24.493090 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 14:01:24.500572 ELOG: Event(A0) added with size 9 at 2022-08-03 13:56:32 UTC
1773 14:01:24.502994 elog_add_boot_reason: Logged dev mode boot
1774 14:01:24.509187 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1775 14:01:24.513279 Finalize devices...
1776 14:01:24.513819 Devices finalized
1777 14:01:24.519251 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 14:01:24.523200 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 14:01:24.529478 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 14:01:24.532845 ME: HFSTS1 : 0x80030055
1781 14:01:24.539149 ME: HFSTS2 : 0x30280116
1782 14:01:24.542670 ME: HFSTS3 : 0x00000050
1783 14:01:24.549527 ME: HFSTS4 : 0x00004000
1784 14:01:24.552658 ME: HFSTS5 : 0x00000000
1785 14:01:24.556106 ME: HFSTS6 : 0x40400006
1786 14:01:24.559286 ME: Manufacturing Mode : YES
1787 14:01:24.562498 ME: SPI Protection Mode Enabled : NO
1788 14:01:24.568848 ME: FW Partition Table : OK
1789 14:01:24.572575 ME: Bringup Loader Failure : NO
1790 14:01:24.575872 ME: Firmware Init Complete : NO
1791 14:01:24.579056 ME: Boot Options Present : NO
1792 14:01:24.582460 ME: Update In Progress : NO
1793 14:01:24.585358 ME: D0i3 Support : YES
1794 14:01:24.588718 ME: Low Power State Enabled : NO
1795 14:01:24.595643 ME: CPU Replaced : YES
1796 14:01:24.598736 ME: CPU Replacement Valid : YES
1797 14:01:24.602513 ME: Current Working State : 5
1798 14:01:24.605303 ME: Current Operation State : 1
1799 14:01:24.609161 ME: Current Operation Mode : 3
1800 14:01:24.611913 ME: Error Code : 0
1801 14:01:24.615865 ME: Enhanced Debug Mode : NO
1802 14:01:24.618671 ME: CPU Debug Disabled : YES
1803 14:01:24.622354 ME: TXT Support : NO
1804 14:01:24.628562 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 14:01:24.638739 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 14:01:24.641680 CBFS: 'fallback/slic' not found.
1807 14:01:24.645036 ACPI: Writing ACPI tables at 76b01000.
1808 14:01:24.645525 ACPI: * FACS
1809 14:01:24.648479 ACPI: * DSDT
1810 14:01:24.651654 Ramoops buffer: 0x100000@0x76a00000.
1811 14:01:24.654842 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 14:01:24.661490 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 14:01:24.664816 Google Chrome EC: version:
1814 14:01:24.668176 ro: voema_v2.0.10114-a447f03e46
1815 14:01:24.671881 rw: voema_v2.0.10114-a447f03e46
1816 14:01:24.672322 running image: 2
1817 14:01:24.677964 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 14:01:24.683078 ACPI: * FADT
1819 14:01:24.683657 SCI is IRQ9
1820 14:01:24.689436 ACPI: added table 1/32, length now 40
1821 14:01:24.689992 ACPI: * SSDT
1822 14:01:24.692765 Found 1 CPU(s) with 8 core(s) each.
1823 14:01:24.699344 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 14:01:24.703009 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 14:01:24.706499 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 14:01:24.712774 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 14:01:24.716700 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 14:01:24.722307 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 14:01:24.725742 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 14:01:24.732072 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 14:01:24.739440 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 14:01:24.742368 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 14:01:24.748856 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 14:01:24.752417 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 14:01:24.758591 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 14:01:24.762336 PS2K: Passing 80 keymaps to kernel
1837 14:01:24.768835 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 14:01:24.775374 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 14:01:24.782590 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 14:01:24.788888 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 14:01:24.794963 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 14:01:24.802014 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 14:01:24.808767 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 14:01:24.815027 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 14:01:24.818676 ACPI: added table 2/32, length now 44
1846 14:01:24.819120 ACPI: * MCFG
1847 14:01:24.824757 ACPI: added table 3/32, length now 48
1848 14:01:24.825257 ACPI: * TPM2
1849 14:01:24.828287 TPM2 log created at 0x769f0000
1850 14:01:24.831596 ACPI: added table 4/32, length now 52
1851 14:01:24.834768 ACPI: * MADT
1852 14:01:24.835362 SCI is IRQ9
1853 14:01:24.838221 ACPI: added table 5/32, length now 56
1854 14:01:24.841057 current = 76b09850
1855 14:01:24.841500 ACPI: * DMAR
1856 14:01:24.848367 ACPI: added table 6/32, length now 60
1857 14:01:24.851339 ACPI: added table 7/32, length now 64
1858 14:01:24.851780 ACPI: * HPET
1859 14:01:24.854621 ACPI: added table 8/32, length now 68
1860 14:01:24.857417 ACPI: done.
1861 14:01:24.861225 ACPI tables: 35216 bytes.
1862 14:01:24.861665 smbios_write_tables: 769ef000
1863 14:01:24.864811 EC returned error result code 3
1864 14:01:24.867732 Couldn't obtain OEM name from CBI
1865 14:01:24.871831 Create SMBIOS type 16
1866 14:01:24.874864 Create SMBIOS type 17
1867 14:01:24.878240 GENERIC: 0.0 (WIFI Device)
1868 14:01:24.881901 SMBIOS tables: 1734 bytes.
1869 14:01:24.884813 Writing table forward entry at 0x00000500
1870 14:01:24.891835 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 14:01:24.895116 Writing coreboot table at 0x76b25000
1872 14:01:24.901455 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 14:01:24.905556 1. 0000000000001000-000000000009ffff: RAM
1874 14:01:24.908350 2. 00000000000a0000-00000000000fffff: RESERVED
1875 14:01:24.915395 3. 0000000000100000-00000000769eefff: RAM
1876 14:01:24.918188 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 14:01:24.924586 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 14:01:24.931152 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 14:01:24.934883 7. 0000000077000000-000000007fbfffff: RESERVED
1880 14:01:24.941244 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 14:01:24.944881 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 14:01:24.948133 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 14:01:24.954574 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 14:01:24.957606 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 14:01:24.964631 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 14:01:24.968019 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 14:01:24.974175 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 14:01:24.978145 16. 0000000100000000-00000004803fffff: RAM
1889 14:01:24.980724 Passing 4 GPIOs to payload:
1890 14:01:24.984259 NAME | PORT | POLARITY | VALUE
1891 14:01:24.991041 lid | undefined | high | high
1892 14:01:24.997627 power | undefined | high | low
1893 14:01:25.001068 oprom | undefined | high | low
1894 14:01:25.007461 EC in RW | 0x000000e5 | high | high
1895 14:01:25.014350 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1896 14:01:25.017733 coreboot table: 1576 bytes.
1897 14:01:25.020723 IMD ROOT 0. 0x76fff000 0x00001000
1898 14:01:25.023711 IMD SMALL 1. 0x76ffe000 0x00001000
1899 14:01:25.027611 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 14:01:25.030485 VPD 3. 0x76c4d000 0x00000367
1901 14:01:25.033947 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 14:01:25.037190 CONSOLE 5. 0x76c2c000 0x00020000
1903 14:01:25.040569 FMAP 6. 0x76c2b000 0x00000578
1904 14:01:25.046731 TIME STAMP 7. 0x76c2a000 0x00000910
1905 14:01:25.051059 VBOOT WORK 8. 0x76c16000 0x00014000
1906 14:01:25.053569 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 14:01:25.057003 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 14:01:25.060060 RAMSTAGE 11. 0x76b97000 0x00073000
1909 14:01:25.063463 REFCODE 12. 0x76b42000 0x00055000
1910 14:01:25.066726 SMM BACKUP 13. 0x76b32000 0x00010000
1911 14:01:25.073147 4f444749 14. 0x76b30000 0x00002000
1912 14:01:25.076744 EXT VBT15. 0x76b2d000 0x0000219f
1913 14:01:25.080029 COREBOOT 16. 0x76b25000 0x00008000
1914 14:01:25.083330 ACPI 17. 0x76b01000 0x00024000
1915 14:01:25.086461 ACPI GNVS 18. 0x76b00000 0x00001000
1916 14:01:25.089905 RAMOOPS 19. 0x76a00000 0x00100000
1917 14:01:25.093298 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 14:01:25.096717 SMBIOS 21. 0x769ef000 0x00000800
1919 14:01:25.099591 IMD small region:
1920 14:01:25.102906 IMD ROOT 0. 0x76ffec00 0x00000400
1921 14:01:25.106497 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 14:01:25.109671 POWER STATE 2. 0x76ffeb80 0x00000044
1923 14:01:25.116109 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 14:01:25.119328 MEM INFO 4. 0x76ffe980 0x000001e0
1925 14:01:25.125927 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1926 14:01:25.129333 MTRR: Physical address space:
1927 14:01:25.132478 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 14:01:25.139632 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 14:01:25.145612 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 14:01:25.152763 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 14:01:25.159238 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 14:01:25.166088 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 14:01:25.172145 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 14:01:25.175746 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 14:01:25.179142 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 14:01:25.185365 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 14:01:25.189104 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 14:01:25.192086 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 14:01:25.195092 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 14:01:25.198758 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 14:01:25.205325 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 14:01:25.208734 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 14:01:25.212052 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 14:01:25.215020 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 14:01:25.220397 call enable_fixed_mtrr()
1946 14:01:25.223681 CPU physical address size: 39 bits
1947 14:01:25.230590 MTRR: default type WB/UC MTRR counts: 6/7.
1948 14:01:25.233561 MTRR: WB selected as default type.
1949 14:01:25.240899 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 14:01:25.243878 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 14:01:25.250407 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 14:01:25.256969 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 14:01:25.263658 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 14:01:25.270327 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 14:01:25.277170 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 14:01:25.280875 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 14:01:25.283663 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 14:01:25.287203 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 14:01:25.293710 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 14:01:25.297158 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 14:01:25.300108 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 14:01:25.303733 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 14:01:25.310828 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 14:01:25.314011 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 14:01:25.316763 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 14:01:25.317300
1967 14:01:25.320782 MTRR check
1968 14:01:25.324132 call enable_fixed_mtrr()
1969 14:01:25.324770 Fixed MTRRs : Enabled
1970 14:01:25.327470 Variable MTRRs: Enabled
1971 14:01:25.327934
1972 14:01:25.330739 CPU physical address size: 39 bits
1973 14:01:25.338312 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
1974 14:01:25.341965 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 14:01:25.348001 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 14:01:25.351822 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 14:01:25.355105 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 14:01:25.358204 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 14:01:25.365247 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 14:01:25.368330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 14:01:25.371370 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 14:01:25.374953 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 14:01:25.381217 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 14:01:25.384751 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 14:01:25.387705 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 14:01:25.395012 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 14:01:25.395455 call enable_fixed_mtrr()
1988 14:01:25.402188 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 14:01:25.405007 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 14:01:25.409023 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 14:01:25.412023 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 14:01:25.418812 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 14:01:25.421858 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 14:01:25.425318 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 14:01:25.428456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 14:01:25.434944 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 14:01:25.438736 CPU physical address size: 39 bits
1998 14:01:25.442502 call enable_fixed_mtrr()
1999 14:01:25.445738 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 14:01:25.452555 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 14:01:25.456021 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 14:01:25.459255 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 14:01:25.462433 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 14:01:25.468810 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 14:01:25.472251 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 14:01:25.475713 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 14:01:25.478884 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 14:01:25.485684 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 14:01:25.488938 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 14:01:25.491962 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 14:01:25.499245 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 14:01:25.502346 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 14:01:25.506079 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 14:01:25.509388 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 14:01:25.515624 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 14:01:25.518944 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 14:01:25.522342 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 14:01:25.525585 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 14:01:25.532317 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 14:01:25.535391 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 14:01:25.538653 call enable_fixed_mtrr()
2022 14:01:25.542128 call enable_fixed_mtrr()
2023 14:01:25.545638 CPU physical address size: 39 bits
2024 14:01:25.548904 CPU physical address size: 39 bits
2025 14:01:25.552821 CPU physical address size: 39 bits
2026 14:01:25.559177 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 14:01:25.562265 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 14:01:25.565546 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 14:01:25.568844 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 14:01:25.575847 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 14:01:25.578956 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 14:01:25.581833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 14:01:25.585538 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 14:01:25.592213 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 14:01:25.595687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 14:01:25.598392 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 14:01:25.601670 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 14:01:25.610254 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 14:01:25.610786 call enable_fixed_mtrr()
2040 14:01:25.616769 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 14:01:25.620222 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 14:01:25.623228 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 14:01:25.626507 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 14:01:25.634379 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 14:01:25.636166 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 14:01:25.639753 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 14:01:25.643139 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 14:01:25.650150 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 14:01:25.653089 CPU physical address size: 39 bits
2050 14:01:25.658017 call enable_fixed_mtrr()
2051 14:01:25.661868 Checking cr50 for pending updates
2052 14:01:25.666056 CPU physical address size: 39 bits
2053 14:01:25.668378 Reading cr50 TPM mode
2054 14:01:25.679071 BS: BS_PAYLOAD_LOAD entry times (exec / console): 328 / 6 ms
2055 14:01:25.688802 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 14:01:25.692754 Checking segment from ROM address 0xffc02b38
2057 14:01:25.695192 Checking segment from ROM address 0xffc02b54
2058 14:01:25.701971 Loading segment from ROM address 0xffc02b38
2059 14:01:25.702420 code (compression=0)
2060 14:01:25.712100 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 14:01:25.721704 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 14:01:25.722180 it's not compressed!
2063 14:01:25.863070 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 14:01:25.869525 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 14:01:25.876093 Loading segment from ROM address 0xffc02b54
2066 14:01:25.880141 Entry Point 0x30000000
2067 14:01:25.880568 Loaded segments
2068 14:01:25.886334 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2069 14:01:25.931576 Finalizing chipset.
2070 14:01:25.934406 Finalizing SMM.
2071 14:01:25.934924 APMC done.
2072 14:01:25.941222 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2073 14:01:25.944400 mp_park_aps done after 0 msecs.
2074 14:01:25.947512 Jumping to boot code at 0x30000000(0x76b25000)
2075 14:01:25.958042 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 14:01:25.958686
2077 14:01:25.961138 Starting depthcharge on Voema...
2078 14:01:25.962384 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2079 14:01:25.963102 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2080 14:01:25.963692 Setting prompt string to ['volteer:']
2081 14:01:25.964112 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2082 14:01:25.970585 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 14:01:25.977430 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2084 14:01:25.983774 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 14:01:25.987667 Failed to find eMMC card reader
2086 14:01:25.987994 Wipe memory regions:
2087 14:01:25.993837 [0x00000000001000, 0x000000000a0000)
2088 14:01:25.997202 [0x00000000100000, 0x00000030000000)
2089 14:01:26.035028 [0x00000032662db0, 0x000000769ef000)
2090 14:01:26.085855 [0x00000100000000, 0x00000480400000)
2091 14:01:26.730001 ec_init: CrosEC protocol v3 supported (256, 256)
2092 14:01:27.162117 R8152: Initializing
2093 14:01:27.165676 Version 6 (ocp_data = 5c30)
2094 14:01:27.168828 R8152: Done initializing
2095 14:01:27.171742 Adding net device
2096 14:01:27.477510 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2097 14:01:27.477655
2098 14:01:27.480522 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2100 14:01:27.581337 volteer: tftpboot 192.168.201.1 6961127/tftp-deploy-drll2meh/kernel/bzImage 6961127/tftp-deploy-drll2meh/kernel/cmdline 6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
2101 14:01:27.581539 Setting prompt string to 'Starting kernel'
2102 14:01:27.581633 Setting prompt string to ['Starting kernel']
2103 14:01:27.581701 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2104 14:01:27.581789 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2105 14:01:27.586030 tftpboot 192.168.201.1 6961127/tftp-deploy-drll2meh/kernel/bzImoy-drll2meh/kernel/cmdline 6961127/tftp-deploy-drll2meh/ramdisk/ramdisk.cpio.gz
2106 14:01:27.586122 Waiting for link
2107 14:01:27.789093 done.
2108 14:01:27.789234 MAC: 00:24:32:30:7d:ab
2109 14:01:27.792304 Sending DHCP discover... done.
2110 14:01:27.795741 Waiting for reply... done.
2111 14:01:27.798801 Sending DHCP request... done.
2112 14:01:27.805152 Waiting for reply... done.
2113 14:01:27.805243 My ip is 192.168.201.22
2114 14:01:27.808725 The DHCP server ip is 192.168.201.1
2115 14:01:27.815322 TFTP server IP predefined by user: 192.168.201.1
2116 14:01:27.821695 Bootfile predefined by user: 6961127/tftp-deploy-drll2meh/kernel/bzImage
2117 14:01:27.825277 Sending tftp read request... done.
2118 14:01:27.828658 Waiting for the transfer...
2119 14:01:28.367025 00000000 ################################################################
2120 14:01:28.899601 00080000 ################################################################
2121 14:01:29.430701 00100000 ################################################################
2122 14:01:29.955352 00180000 ################################################################
2123 14:01:30.486121 00200000 ################################################################
2124 14:01:31.014335 00280000 ################################################################
2125 14:01:31.545082 00300000 ################################################################
2126 14:01:32.079168 00380000 ################################################################
2127 14:01:32.610615 00400000 ################################################################
2128 14:01:33.136259 00480000 ################################################################
2129 14:01:33.659364 00500000 ################################################################
2130 14:01:34.193641 00580000 ################################################################
2131 14:01:34.719278 00600000 ################################################################ done.
2132 14:01:34.722538 The bootfile was 6815632 bytes long.
2133 14:01:34.725966 Sending tftp read request... done.
2134 14:01:34.729042 Waiting for the transfer...
2135 14:01:35.254305 00000000 ################################################################
2136 14:01:35.775215 00080000 ################################################################
2137 14:01:36.308575 00100000 ################################################################
2138 14:01:36.867669 00180000 ################################################################
2139 14:01:37.420545 00200000 ################################################################
2140 14:01:37.949335 00280000 ################################################################
2141 14:01:38.474211 00300000 ################################################################
2142 14:01:39.002221 00380000 ################################################################
2143 14:01:39.524715 00400000 ################################################################
2144 14:01:40.068629 00480000 ################################################################
2145 14:01:40.651843 00500000 ################################################################
2146 14:01:41.179593 00580000 ################################################################
2147 14:01:41.732234 00600000 ################################################################
2148 14:01:42.313777 00680000 ################################################################
2149 14:01:42.869617 00700000 ################################################################
2150 14:01:43.395628 00780000 ################################################################
2151 14:01:43.559627 00800000 ##################### done.
2152 14:01:43.562763 Sending tftp read request... done.
2153 14:01:43.566187 Waiting for the transfer...
2154 14:01:43.566275 00000000 # done.
2155 14:01:43.575869 Command line loaded dynamically from TFTP file: 6961127/tftp-deploy-drll2meh/kernel/cmdline
2156 14:01:43.588872 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2157 14:01:43.596362 Shutting down all USB controllers.
2158 14:01:43.596449 Removing current net device
2159 14:01:43.599504 Finalizing coreboot
2160 14:01:43.606260 Exiting depthcharge with code 4 at timestamp: 26217430
2161 14:01:43.606356
2162 14:01:43.606444 Starting kernel ...
2163 14:01:43.606510
2164 14:01:43.606572
2165 14:01:43.606869 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2166 14:01:43.606966 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2167 14:01:43.607047 Setting prompt string to ['Linux version [0-9]']
2168 14:01:43.607118 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2169 14:01:43.607187 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2171 14:06:09.608039 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2173 14:06:09.609253 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2175 14:06:09.610160 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2178 14:06:09.611690 end: 2 depthcharge-action (duration 00:05:00) [common]
2180 14:06:09.612206 Cleaning after the job
2181 14:06:09.612287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/ramdisk
2182 14:06:09.612963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/kernel
2183 14:06:09.613517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961127/tftp-deploy-drll2meh/modules
2184 14:06:09.613708 start: 5.1 power-off (timeout 00:00:30) [common]
2185 14:06:09.613855 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2186 14:06:09.632896 >> Command sent successfully.
2187 14:06:09.634835 Returned 0 in 0 seconds
2188 14:06:09.736002 end: 5.1 power-off (duration 00:00:00) [common]
2190 14:06:09.737601 start: 5.2 read-feedback (timeout 00:10:00) [common]
2191 14:06:09.738798 Listened to connection for namespace 'common' for up to 1s
2192 14:06:10.743582 Finalising connection for namespace 'common'
2193 14:06:10.744415 Disconnecting from shell: Finalise
2194 14:06:10.846216 end: 5.2 read-feedback (duration 00:00:01) [common]
2195 14:06:10.846856 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6961127
2196 14:06:10.873292 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6961127
2197 14:06:10.873910 JobError: Your job cannot terminate cleanly.