Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:01:11.983004 lava-dispatcher, installed at version: 2022.06
2 14:01:11.983268 start: 0 validate
3 14:01:11.983444 Start time: 2022-08-03 14:01:11.983437+00:00 (UTC)
4 14:01:11.983612 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:01:11.983738 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 14:01:12.268011 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:01:12.268183 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:01:14.770776 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:01:14.771531 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:01:14.776822 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:01:14.777521 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:01:14.789838 validate duration: 2.81
14 14:01:14.791229 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:01:14.791803 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:01:14.792304 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:01:14.792878 Not decompressing ramdisk as can be used compressed.
18 14:01:14.793356 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 14:01:14.793722 saving as /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/ramdisk/initrd.cpio.gz
20 14:01:14.794069 total size: 5411064 (5MB)
21 14:01:14.799425 progress 0% (0MB)
22 14:01:14.805452 progress 5% (0MB)
23 14:01:14.809414 progress 10% (0MB)
24 14:01:14.812818 progress 15% (0MB)
25 14:01:14.816208 progress 20% (1MB)
26 14:01:14.818690 progress 25% (1MB)
27 14:01:14.821132 progress 30% (1MB)
28 14:01:14.823257 progress 35% (1MB)
29 14:01:14.825622 progress 40% (2MB)
30 14:01:14.827537 progress 45% (2MB)
31 14:01:14.829384 progress 50% (2MB)
32 14:01:14.831222 progress 55% (2MB)
33 14:01:14.833055 progress 60% (3MB)
34 14:01:14.834692 progress 65% (3MB)
35 14:01:14.836315 progress 70% (3MB)
36 14:01:14.837795 progress 75% (3MB)
37 14:01:14.839451 progress 80% (4MB)
38 14:01:14.840936 progress 85% (4MB)
39 14:01:14.842284 progress 90% (4MB)
40 14:01:14.843640 progress 95% (4MB)
41 14:01:14.845156 progress 100% (5MB)
42 14:01:14.845334 5MB downloaded in 0.05s (100.65MB/s)
43 14:01:14.845497 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:01:14.845757 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:01:14.845851 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:01:14.845955 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:01:14.846059 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:01:14.846127 saving as /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/kernel/bzImage
50 14:01:14.846189 total size: 6815632 (6MB)
51 14:01:14.846251 No compression specified
52 14:01:14.847227 progress 0% (0MB)
53 14:01:14.848973 progress 5% (0MB)
54 14:01:14.850657 progress 10% (0MB)
55 14:01:14.852493 progress 15% (1MB)
56 14:01:14.854130 progress 20% (1MB)
57 14:01:14.855795 progress 25% (1MB)
58 14:01:14.857572 progress 30% (1MB)
59 14:01:14.859231 progress 35% (2MB)
60 14:01:14.860973 progress 40% (2MB)
61 14:01:14.862597 progress 45% (2MB)
62 14:01:14.864247 progress 50% (3MB)
63 14:01:14.866002 progress 55% (3MB)
64 14:01:14.867604 progress 60% (3MB)
65 14:01:14.869349 progress 65% (4MB)
66 14:01:14.870940 progress 70% (4MB)
67 14:01:14.872564 progress 75% (4MB)
68 14:01:14.874307 progress 80% (5MB)
69 14:01:14.875931 progress 85% (5MB)
70 14:01:14.877672 progress 90% (5MB)
71 14:01:14.879317 progress 95% (6MB)
72 14:01:14.880934 progress 100% (6MB)
73 14:01:14.881215 6MB downloaded in 0.04s (185.60MB/s)
74 14:01:14.881362 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:01:14.881601 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:01:14.881691 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:01:14.881778 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:01:14.881883 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 14:01:14.881950 saving as /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/nfsrootfs/full.rootfs.tar
81 14:01:14.882011 total size: 122624016 (116MB)
82 14:01:14.882073 Using unxz to decompress xz
83 14:01:14.885354 progress 0% (0MB)
84 14:01:15.329128 progress 5% (5MB)
85 14:01:15.803415 progress 10% (11MB)
86 14:01:16.276192 progress 15% (17MB)
87 14:01:16.746539 progress 20% (23MB)
88 14:01:17.073892 progress 25% (29MB)
89 14:01:17.429239 progress 30% (35MB)
90 14:01:17.689643 progress 35% (40MB)
91 14:01:17.902708 progress 40% (46MB)
92 14:01:18.260919 progress 45% (52MB)
93 14:01:18.628881 progress 50% (58MB)
94 14:01:18.968692 progress 55% (64MB)
95 14:01:19.324782 progress 60% (70MB)
96 14:01:19.663660 progress 65% (76MB)
97 14:01:20.059447 progress 70% (81MB)
98 14:01:20.484865 progress 75% (87MB)
99 14:01:20.896867 progress 80% (93MB)
100 14:01:21.016797 progress 85% (99MB)
101 14:01:21.194527 progress 90% (105MB)
102 14:01:21.538681 progress 95% (111MB)
103 14:01:21.922990 progress 100% (116MB)
104 14:01:21.928504 116MB downloaded in 7.05s (16.60MB/s)
105 14:01:21.928830 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:01:21.929129 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:01:21.929223 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:01:21.929314 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:01:21.929434 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:01:21.929508 saving as /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/modules/modules.tar
112 14:01:21.929570 total size: 54904 (0MB)
113 14:01:21.929632 Using unxz to decompress xz
114 14:01:21.933103 progress 59% (0MB)
115 14:01:21.933508 progress 100% (0MB)
116 14:01:21.937124 0MB downloaded in 0.01s (6.94MB/s)
117 14:01:21.937368 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:01:21.937643 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:01:21.937739 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 14:01:21.937839 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 14:01:23.649010 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6961078/extract-nfsrootfs-j9p7nsza
123 14:01:23.649224 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 14:01:23.649329 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 14:01:23.649468 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650
126 14:01:23.649571 makedir: /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin
127 14:01:23.649656 makedir: /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/tests
128 14:01:23.649739 makedir: /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/results
129 14:01:23.649838 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-add-keys
130 14:01:23.649972 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-add-sources
131 14:01:23.650091 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-background-process-start
132 14:01:23.650206 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-background-process-stop
133 14:01:23.650319 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-common-functions
134 14:01:23.650431 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-echo-ipv4
135 14:01:23.650543 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-install-packages
136 14:01:23.650654 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-installed-packages
137 14:01:23.650767 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-os-build
138 14:01:23.650876 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-probe-channel
139 14:01:23.650988 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-probe-ip
140 14:01:23.651112 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-target-ip
141 14:01:23.651222 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-target-mac
142 14:01:23.651334 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-target-storage
143 14:01:23.651446 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-case
144 14:01:23.651558 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-event
145 14:01:23.651668 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-feedback
146 14:01:23.651777 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-raise
147 14:01:23.651886 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-reference
148 14:01:23.651995 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-runner
149 14:01:23.652104 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-set
150 14:01:23.652212 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-test-shell
151 14:01:23.652322 Updating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-install-packages (oe)
152 14:01:23.652435 Updating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/bin/lava-installed-packages (oe)
153 14:01:23.652531 Creating /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/environment
154 14:01:23.652615 LAVA metadata
155 14:01:23.652681 - LAVA_JOB_ID=6961078
156 14:01:23.652744 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:01:23.652845 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 14:01:23.652910 skipped lava-vland-overlay
159 14:01:23.652986 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:01:23.653067 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 14:01:23.653144 skipped lava-multinode-overlay
162 14:01:23.653220 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:01:23.653302 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 14:01:23.653374 Loading test definitions
165 14:01:23.653463 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 14:01:23.653537 Using /lava-6961078 at stage 0
167 14:01:23.653635 Fetching tests from https://github.com/kernelci/test-definitions
168 14:01:23.653714 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/0/tests/0_ltp-mm'
169 14:01:32.773212 Running '/usr/bin/git checkout kernelci.org
170 14:01:32.911766 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 14:01:32.912497 uuid=6961078_1.5.2.3.1 testdef=None
172 14:01:32.912657 end: 1.5.2.3.1 git-repo-action (duration 00:00:09) [common]
174 14:01:32.912903 start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
175 14:01:32.913663 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 14:01:32.913899 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
178 14:01:32.914891 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 14:01:32.915175 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
181 14:01:32.916124 runner path: /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/0/tests/0_ltp-mm test_uuid 6961078_1.5.2.3.1
182 14:01:32.916216 SKIPFILE='skipfile-lkft.yaml'
183 14:01:32.916282 SKIP_INSTALL='true'
184 14:01:32.916342 TST_CMDFILES='mm'
185 14:01:32.916477 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 14:01:32.916692 Creating lava-test-runner.conf files
188 14:01:32.916758 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961078/lava-overlay-bp7i7650/lava-6961078/0 for stage 0
189 14:01:32.916842 - 0_ltp-mm
190 14:01:32.916938 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
191 14:01:32.917027 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
192 14:01:40.214130 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 14:01:40.214298 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
194 14:01:40.214397 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 14:01:40.214502 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
196 14:01:40.214614 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
197 14:01:40.319307 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 14:01:40.319785 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
199 14:01:40.319954 extracting modules file /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961078/extract-nfsrootfs-j9p7nsza
200 14:01:40.325483 extracting modules file /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961078/extract-overlay-ramdisk-qvqrhuwf/ramdisk
201 14:01:40.329485 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 14:01:40.329607 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
203 14:01:40.329696 [common] Applying overlay to NFS
204 14:01:40.329767 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6961078/compress-overlay-8i8yk5xy/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6961078/extract-nfsrootfs-j9p7nsza
205 14:01:40.778591 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 14:01:40.778759 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
207 14:01:40.778874 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 14:01:40.778969 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
209 14:01:40.779073 Building ramdisk /var/lib/lava/dispatcher/tmp/6961078/extract-overlay-ramdisk-qvqrhuwf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6961078/extract-overlay-ramdisk-qvqrhuwf/ramdisk
210 14:01:40.813426 >> 24470 blocks
211 14:01:41.288608 rename /var/lib/lava/dispatcher/tmp/6961078/extract-overlay-ramdisk-qvqrhuwf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
212 14:01:41.289051 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 14:01:41.289175 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
214 14:01:41.289277 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
215 14:01:41.289374 No mkimage arch provided, not using FIT.
216 14:01:41.289463 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 14:01:41.289549 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 14:01:41.289650 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
219 14:01:41.289747 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
220 14:01:41.289825 No LXC device requested
221 14:01:41.289909 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 14:01:41.289998 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
223 14:01:41.290084 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 14:01:41.290156 Checking files for TFTP limit of 4294967296 bytes.
225 14:01:41.290531 end: 1 tftp-deploy (duration 00:00:26) [common]
226 14:01:41.290638 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 14:01:41.290735 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 14:01:41.290862 substitutions:
229 14:01:41.290931 - {DTB}: None
230 14:01:41.290996 - {INITRD}: 6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
231 14:01:41.291098 - {KERNEL}: 6961078/tftp-deploy-ehvcijsv/kernel/bzImage
232 14:01:41.291159 - {LAVA_MAC}: None
233 14:01:41.291217 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6961078/extract-nfsrootfs-j9p7nsza
234 14:01:41.291276 - {NFS_SERVER_IP}: 192.168.201.1
235 14:01:41.291333 - {PRESEED_CONFIG}: None
236 14:01:41.291415 - {PRESEED_LOCAL}: None
237 14:01:41.291504 - {RAMDISK}: 6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
238 14:01:41.291562 - {ROOT_PART}: None
239 14:01:41.291619 - {ROOT}: None
240 14:01:41.291675 - {SERVER_IP}: 192.168.201.1
241 14:01:41.291731 - {TEE}: None
242 14:01:41.291787 Parsed boot commands:
243 14:01:41.291842 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 14:01:41.292014 Parsed boot commands: tftpboot 192.168.201.1 6961078/tftp-deploy-ehvcijsv/kernel/bzImage 6961078/tftp-deploy-ehvcijsv/kernel/cmdline 6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
245 14:01:41.292109 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 14:01:41.292210 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 14:01:41.292301 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 14:01:41.292393 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 14:01:41.292464 Not connected, no need to disconnect.
250 14:01:41.292542 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 14:01:41.292626 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 14:01:41.292692 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
253 14:01:41.295561 Setting prompt string to ['lava-test: # ']
254 14:01:41.295876 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 14:01:41.295987 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 14:01:41.296088 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 14:01:41.296180 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 14:01:41.296357 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
259 14:01:41.316053 >> Command sent successfully.
260 14:01:41.318056 Returned 0 in 0 seconds
261 14:01:41.418825 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 14:01:41.419259 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 14:01:41.419362 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 14:01:41.419459 Setting prompt string to 'Starting depthcharge on Helios...'
266 14:01:41.419531 Changing prompt to 'Starting depthcharge on Helios...'
267 14:01:41.419608 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 14:01:41.419900 [Enter `^Ec?' for help]
269 14:01:48.071803
270 14:01:48.071971
271 14:01:48.081287 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 14:01:48.084481 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 14:01:48.091086 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 14:01:48.094299 CPU: AES supported, TXT NOT supported, VT supported
275 14:01:48.100993 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 14:01:48.107618 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 14:01:48.111020 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 14:01:48.114105 VBOOT: Loading verstage.
279 14:01:48.120859 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 14:01:48.124177 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 14:01:48.130813 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 14:01:48.130915 CBFS @ c08000 size 3f8000
283 14:01:48.137291 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 14:01:48.140658 CBFS: Locating 'fallback/verstage'
285 14:01:48.147089 CBFS: Found @ offset 10fb80 size 1072c
286 14:01:48.147196
287 14:01:48.147285
288 14:01:48.156978 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 14:01:48.172884 Probing TPM: . done!
290 14:01:48.176203 TPM ready after 0 ms
291 14:01:48.179225 Connected to device vid:did:rid of 1ae0:0028:00
292 14:01:48.189549 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 14:01:48.192783 Initialized TPM device CR50 revision 0
294 14:01:48.238563 tlcl_send_startup: Startup return code is 0
295 14:01:48.238752 TPM: setup succeeded
296 14:01:48.251277 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 14:01:48.255265 Chrome EC: UHEPI supported
298 14:01:48.258592 Phase 1
299 14:01:48.261863 FMAP: area GBB found @ c05000 (12288 bytes)
300 14:01:48.268268 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 14:01:48.271538 Phase 2
302 14:01:48.271694 Phase 3
303 14:01:48.274885 FMAP: area GBB found @ c05000 (12288 bytes)
304 14:01:48.281404 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 14:01:48.288124 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 14:01:48.291368 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 14:01:48.297886 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 14:01:48.313929 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 14:01:48.317041 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 14:01:48.323840 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 14:01:48.328016 Phase 4
312 14:01:48.331310 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 14:01:48.337770 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 14:01:48.517490 VB2:vb2_rsa_verify_digest() Digest check failed!
315 14:01:48.524076 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 14:01:48.524163 Saving nvdata
317 14:01:48.527402 Reboot requested (10020007)
318 14:01:48.530699 board_reset() called!
319 14:01:48.530779 full_reset() called!
320 14:01:53.038621
321 14:01:53.038757
322 14:01:53.048689 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 14:01:53.051858 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 14:01:53.058562 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 14:01:53.061772 CPU: AES supported, TXT NOT supported, VT supported
326 14:01:53.068425 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 14:01:53.075075 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 14:01:53.078216 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 14:01:53.081289 VBOOT: Loading verstage.
330 14:01:53.088116 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 14:01:53.091443 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 14:01:53.098130 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 14:01:53.098256 CBFS @ c08000 size 3f8000
334 14:01:53.104553 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 14:01:53.107913 CBFS: Locating 'fallback/verstage'
336 14:01:53.114170 CBFS: Found @ offset 10fb80 size 1072c
337 14:01:53.114252
338 14:01:53.114323
339 14:01:53.124008 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 14:01:53.139980 Probing TPM: . done!
341 14:01:53.143473 TPM ready after 0 ms
342 14:01:53.146550 Connected to device vid:did:rid of 1ae0:0028:00
343 14:01:53.156663 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 14:01:53.160006 Initialized TPM device CR50 revision 0
345 14:01:53.205808 tlcl_send_startup: Startup return code is 0
346 14:01:53.205928 TPM: setup succeeded
347 14:01:53.218898 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 14:01:53.222442 Chrome EC: UHEPI supported
349 14:01:53.225887 Phase 1
350 14:01:53.229190 FMAP: area GBB found @ c05000 (12288 bytes)
351 14:01:53.235872 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 14:01:53.242232 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 14:01:53.245518 Recovery requested (1009000e)
354 14:01:53.251630 Saving nvdata
355 14:01:53.257484 tlcl_extend: response is 0
356 14:01:53.266424 tlcl_extend: response is 0
357 14:01:53.273340 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 14:01:53.276777 CBFS @ c08000 size 3f8000
359 14:01:53.283225 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 14:01:53.286751 CBFS: Locating 'fallback/romstage'
361 14:01:53.289968 CBFS: Found @ offset 80 size 145fc
362 14:01:53.293005 Accumulated console time in verstage 98 ms
363 14:01:53.293090
364 14:01:53.293159
365 14:01:53.306111 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 14:01:53.312721 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 14:01:53.316022 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 14:01:53.319338 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 14:01:53.325957 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 14:01:53.329122 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 14:01:53.332589 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 14:01:53.335787 TCO_STS: 0000 0000
373 14:01:53.339116 GEN_PMCON: e0015238 00000200
374 14:01:53.342258 GBLRST_CAUSE: 00000000 00000000
375 14:01:53.342343 prev_sleep_state 5
376 14:01:53.346295 Boot Count incremented to 29213
377 14:01:53.352829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 14:01:53.356149 CBFS @ c08000 size 3f8000
379 14:01:53.362894 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 14:01:53.362981 CBFS: Locating 'fspm.bin'
381 14:01:53.369390 CBFS: Found @ offset 5ffc0 size 71000
382 14:01:53.372522 Chrome EC: UHEPI supported
383 14:01:53.379119 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 14:01:53.382800 Probing TPM: done!
385 14:01:53.389525 Connected to device vid:did:rid of 1ae0:0028:00
386 14:01:53.399337 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 14:01:53.406296 Initialized TPM device CR50 revision 0
388 14:01:53.415447 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 14:01:53.425671 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 14:01:53.425757 MRC cache found, size 1948
391 14:01:53.428837 bootmode is set to: 2
392 14:01:53.432009 PRMRR disabled by config.
393 14:01:53.435364 SPD INDEX = 1
394 14:01:53.438819 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 14:01:53.441920 CBFS @ c08000 size 3f8000
396 14:01:53.448420 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 14:01:53.448508 CBFS: Locating 'spd.bin'
398 14:01:53.451675 CBFS: Found @ offset 5fb80 size 400
399 14:01:53.455336 SPD: module type is LPDDR3
400 14:01:53.458379 SPD: module part is
401 14:01:53.464892 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 14:01:53.468127 SPD: device width 4 bits, bus width 8 bits
403 14:01:53.471693 SPD: module size is 4096 MB (per channel)
404 14:01:53.474797 memory slot: 0 configuration done.
405 14:01:53.481345 memory slot: 2 configuration done.
406 14:01:53.530260 CBMEM:
407 14:01:53.533530 IMD: root @ 99fff000 254 entries.
408 14:01:53.536953 IMD: root @ 99ffec00 62 entries.
409 14:01:53.540315 External stage cache:
410 14:01:53.543751 IMD: root @ 9abff000 254 entries.
411 14:01:53.546807 IMD: root @ 9abfec00 62 entries.
412 14:01:53.553146 Chrome EC: clear events_b mask to 0x0000000020004000
413 14:01:53.567342 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 14:01:53.582620 tlcl_write: response is 0
415 14:01:53.591692 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 14:01:53.598357 MRC: TPM MRC hash updated successfully.
417 14:01:53.598462 2 DIMMs found
418 14:01:53.601710 SMM Memory Map
419 14:01:53.604683 SMRAM : 0x9a000000 0x1000000
420 14:01:53.607959 Subregion 0: 0x9a000000 0xa00000
421 14:01:53.611481 Subregion 1: 0x9aa00000 0x200000
422 14:01:53.614859 Subregion 2: 0x9ac00000 0x400000
423 14:01:53.618292 top_of_ram = 0x9a000000
424 14:01:53.621363 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 14:01:53.628101 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 14:01:53.631150 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 14:01:53.637917 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 14:01:53.641045 CBFS @ c08000 size 3f8000
429 14:01:53.644599 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 14:01:53.647661 CBFS: Locating 'fallback/postcar'
431 14:01:53.654423 CBFS: Found @ offset 107000 size 4b44
432 14:01:53.660713 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 14:01:53.670938 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 14:01:53.674094 Processing 180 relocs. Offset value of 0x97c0c000
435 14:01:53.681896 Accumulated console time in romstage 286 ms
436 14:01:53.681983
437 14:01:53.682050
438 14:01:53.691740 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 14:01:53.698366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 14:01:53.701918 CBFS @ c08000 size 3f8000
441 14:01:53.708355 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 14:01:53.711546 CBFS: Locating 'fallback/ramstage'
443 14:01:53.714797 CBFS: Found @ offset 43380 size 1b9e8
444 14:01:53.721542 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 14:01:53.753809 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 14:01:53.760211 Processing 3976 relocs. Offset value of 0x98db0000
447 14:01:53.763689 Accumulated console time in postcar 52 ms
448 14:01:53.763770
449 14:01:53.763856
450 14:01:53.773347 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 14:01:53.779973 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 14:01:53.783272 WARNING: RO_VPD is uninitialized or empty.
453 14:01:53.786576 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 14:01:53.793073 WARNING: RW_VPD is uninitialized or empty.
455 14:01:53.793218 Normal boot.
456 14:01:53.799559 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 14:01:53.802935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 14:01:53.806222 CBFS @ c08000 size 3f8000
459 14:01:53.812742 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 14:01:53.815806 CBFS: Locating 'cpu_microcode_blob.bin'
461 14:01:53.819345 CBFS: Found @ offset 14700 size 2ec00
462 14:01:53.825681 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 14:01:53.825768 Skip microcode update
464 14:01:53.832473 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 14:01:53.835723 CBFS @ c08000 size 3f8000
466 14:01:53.839065 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 14:01:53.842458 CBFS: Locating 'fsps.bin'
468 14:01:53.845509 CBFS: Found @ offset d1fc0 size 35000
469 14:01:53.871843 Detected 4 core, 8 thread CPU.
470 14:01:53.875160 Setting up SMI for CPU
471 14:01:53.878384 IED base = 0x9ac00000
472 14:01:53.878470 IED size = 0x00400000
473 14:01:53.881589 Will perform SMM setup.
474 14:01:53.888320 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 14:01:53.894761 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 14:01:53.898012 Processing 16 relocs. Offset value of 0x00030000
477 14:01:53.901855 Attempting to start 7 APs
478 14:01:53.905269 Waiting for 10ms after sending INIT.
479 14:01:53.921554 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
480 14:01:53.921643 done.
481 14:01:53.924927 AP: slot 4 apic_id 2.
482 14:01:53.928030 AP: slot 1 apic_id 3.
483 14:01:53.931540 Waiting for 2nd SIPI to complete...done.
484 14:01:53.934581 AP: slot 3 apic_id 7.
485 14:01:53.934667 AP: slot 6 apic_id 6.
486 14:01:53.938122 AP: slot 5 apic_id 5.
487 14:01:53.941170 AP: slot 7 apic_id 4.
488 14:01:53.948111 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 14:01:53.954534 Processing 13 relocs. Offset value of 0x00038000
490 14:01:53.961128 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 14:01:53.964274 Installing SMM handler to 0x9a000000
492 14:01:53.971121 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 14:01:53.977347 Processing 658 relocs. Offset value of 0x9a010000
494 14:01:53.984250 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 14:01:53.987259 Processing 13 relocs. Offset value of 0x9a008000
496 14:01:53.994010 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 14:01:54.000684 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 14:01:54.007141 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 14:01:54.010441 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 14:01:54.016954 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 14:01:54.023765 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 14:01:54.030195 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 14:01:54.037009 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 14:01:54.040326 Clearing SMI status registers
505 14:01:54.040458 SMI_STS: PM1
506 14:01:54.043617 PM1_STS: PWRBTN
507 14:01:54.043710 TCO_STS: SECOND_TO
508 14:01:54.046864 New SMBASE 0x9a000000
509 14:01:54.050093 In relocation handler: CPU 0
510 14:01:54.053651 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 14:01:54.059924 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 14:01:54.060009 Relocation complete.
513 14:01:54.063394 New SMBASE 0x99fff800
514 14:01:54.066518 In relocation handler: CPU 2
515 14:01:54.070033 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 14:01:54.076366 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 14:01:54.076478 Relocation complete.
518 14:01:54.079659 New SMBASE 0x99fffc00
519 14:01:54.082979 In relocation handler: CPU 1
520 14:01:54.086349 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
521 14:01:54.092856 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 14:01:54.092943 Relocation complete.
523 14:01:54.096022 New SMBASE 0x99fff000
524 14:01:54.099267 In relocation handler: CPU 4
525 14:01:54.102443 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
526 14:01:54.109133 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 14:01:54.109219 Relocation complete.
528 14:01:54.112464 New SMBASE 0x99fff400
529 14:01:54.115613 In relocation handler: CPU 3
530 14:01:54.118945 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
531 14:01:54.125615 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 14:01:54.125702 Relocation complete.
533 14:01:54.129116 New SMBASE 0x99ffe800
534 14:01:54.132229 In relocation handler: CPU 6
535 14:01:54.135576 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 14:01:54.138928 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 14:01:54.142007 Relocation complete.
538 14:01:54.145437 New SMBASE 0x99ffec00
539 14:01:54.148735 In relocation handler: CPU 5
540 14:01:54.151811 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
541 14:01:54.155154 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 14:01:54.158380 Relocation complete.
543 14:01:54.161900 New SMBASE 0x99ffe400
544 14:01:54.164958 In relocation handler: CPU 7
545 14:01:54.168415 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 14:01:54.171577 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 14:01:54.174896 Relocation complete.
548 14:01:54.178048 Initializing CPU #0
549 14:01:54.181505 CPU: vendor Intel device 806ec
550 14:01:54.184984 CPU: family 06, model 8e, stepping 0c
551 14:01:54.188326 Clearing out pending MCEs
552 14:01:54.188403 Setting up local APIC...
553 14:01:54.191587 apic_id: 0x00 done.
554 14:01:54.194678 Turbo is available but hidden
555 14:01:54.198043 Turbo is available and visible
556 14:01:54.201417 VMX status: enabled
557 14:01:54.204635 IA32_FEATURE_CONTROL status: locked
558 14:01:54.204715 Skip microcode update
559 14:01:54.207898 CPU #0 initialized
560 14:01:54.211138 Initializing CPU #2
561 14:01:54.211217 Initializing CPU #3
562 14:01:54.214509 Initializing CPU #6
563 14:01:54.217811 CPU: vendor Intel device 806ec
564 14:01:54.221277 CPU: family 06, model 8e, stepping 0c
565 14:01:54.224578 Clearing out pending MCEs
566 14:01:54.224651 Initializing CPU #4
567 14:01:54.227859 Initializing CPU #1
568 14:01:54.230995 CPU: vendor Intel device 806ec
569 14:01:54.234307 CPU: family 06, model 8e, stepping 0c
570 14:01:54.237611 CPU: vendor Intel device 806ec
571 14:01:54.241061 CPU: family 06, model 8e, stepping 0c
572 14:01:54.244188 Clearing out pending MCEs
573 14:01:54.247503 Clearing out pending MCEs
574 14:01:54.247582 Setting up local APIC...
575 14:01:54.250889 CPU: vendor Intel device 806ec
576 14:01:54.257635 CPU: family 06, model 8e, stepping 0c
577 14:01:54.260938 CPU: vendor Intel device 806ec
578 14:01:54.264078 CPU: family 06, model 8e, stepping 0c
579 14:01:54.264157 Clearing out pending MCEs
580 14:01:54.267366 Clearing out pending MCEs
581 14:01:54.270869 Setting up local APIC...
582 14:01:54.274151 Initializing CPU #7
583 14:01:54.274238 Initializing CPU #5
584 14:01:54.277267 CPU: vendor Intel device 806ec
585 14:01:54.280521 CPU: family 06, model 8e, stepping 0c
586 14:01:54.283844 Setting up local APIC...
587 14:01:54.287271 Clearing out pending MCEs
588 14:01:54.290519 CPU: vendor Intel device 806ec
589 14:01:54.293709 CPU: family 06, model 8e, stepping 0c
590 14:01:54.297118 Setting up local APIC...
591 14:01:54.297208 apic_id: 0x02 done.
592 14:01:54.300219 apic_id: 0x03 done.
593 14:01:54.303670 VMX status: enabled
594 14:01:54.303750 VMX status: enabled
595 14:01:54.306785 IA32_FEATURE_CONTROL status: locked
596 14:01:54.313376 IA32_FEATURE_CONTROL status: locked
597 14:01:54.313463 Skip microcode update
598 14:01:54.316625 Skip microcode update
599 14:01:54.320071 CPU #4 initialized
600 14:01:54.320156 CPU #1 initialized
601 14:01:54.323131 apic_id: 0x06 done.
602 14:01:54.326591 Setting up local APIC...
603 14:01:54.326673 Setting up local APIC...
604 14:01:54.329945 Clearing out pending MCEs
605 14:01:54.333197 apic_id: 0x04 done.
606 14:01:54.336547 Setting up local APIC...
607 14:01:54.336628 apic_id: 0x07 done.
608 14:01:54.339610 VMX status: enabled
609 14:01:54.339695 VMX status: enabled
610 14:01:54.346303 IA32_FEATURE_CONTROL status: locked
611 14:01:54.349454 IA32_FEATURE_CONTROL status: locked
612 14:01:54.349535 apic_id: 0x05 done.
613 14:01:54.352739 Skip microcode update
614 14:01:54.355974 Skip microcode update
615 14:01:54.356050 CPU #3 initialized
616 14:01:54.359412 CPU #6 initialized
617 14:01:54.359491 VMX status: enabled
618 14:01:54.362770 VMX status: enabled
619 14:01:54.366147 IA32_FEATURE_CONTROL status: locked
620 14:01:54.369235 IA32_FEATURE_CONTROL status: locked
621 14:01:54.372742 Skip microcode update
622 14:01:54.375879 Skip microcode update
623 14:01:54.375965 CPU #5 initialized
624 14:01:54.379161 CPU #7 initialized
625 14:01:54.379247 apic_id: 0x01 done.
626 14:01:54.382338 VMX status: enabled
627 14:01:54.385910 IA32_FEATURE_CONTROL status: locked
628 14:01:54.389173 Skip microcode update
629 14:01:54.389259 CPU #2 initialized
630 14:01:54.395875 bsp_do_flight_plan done after 461 msecs.
631 14:01:54.398929 CPU: frequency set to 4200 MHz
632 14:01:54.399037 Enabling SMIs.
633 14:01:54.402277 Locking SMM.
634 14:01:54.415723 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 14:01:54.418802 CBFS @ c08000 size 3f8000
636 14:01:54.425447 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 14:01:54.425534 CBFS: Locating 'vbt.bin'
638 14:01:54.432213 CBFS: Found @ offset 5f5c0 size 499
639 14:01:54.435351 Found a VBT of 4608 bytes after decompression
640 14:01:54.619366 Display FSP Version Info HOB
641 14:01:54.622479 Reference Code - CPU = 9.0.1e.30
642 14:01:54.625904 uCode Version = 0.0.0.ca
643 14:01:54.629052 TXT ACM version = ff.ff.ff.ffff
644 14:01:54.632234 Display FSP Version Info HOB
645 14:01:54.635439 Reference Code - ME = 9.0.1e.30
646 14:01:54.638982 MEBx version = 0.0.0.0
647 14:01:54.642143 ME Firmware Version = Consumer SKU
648 14:01:54.645419 Display FSP Version Info HOB
649 14:01:54.648710 Reference Code - CML PCH = 9.0.1e.30
650 14:01:54.651904 PCH-CRID Status = Disabled
651 14:01:54.655439 PCH-CRID Original Value = ff.ff.ff.ffff
652 14:01:54.658520 PCH-CRID New Value = ff.ff.ff.ffff
653 14:01:54.661761 OPROM - RST - RAID = ff.ff.ff.ffff
654 14:01:54.665195 ChipsetInit Base Version = ff.ff.ff.ffff
655 14:01:54.668547 ChipsetInit Oem Version = ff.ff.ff.ffff
656 14:01:54.671735 Display FSP Version Info HOB
657 14:01:54.678333 Reference Code - SA - System Agent = 9.0.1e.30
658 14:01:54.681475 Reference Code - MRC = 0.7.1.6c
659 14:01:54.684777 SA - PCIe Version = 9.0.1e.30
660 14:01:54.688019 SA-CRID Status = Disabled
661 14:01:54.691216 SA-CRID Original Value = 0.0.0.c
662 14:01:54.691300 SA-CRID New Value = 0.0.0.c
663 14:01:54.694536 OPROM - VBIOS = ff.ff.ff.ffff
664 14:01:54.697957 RTC Init
665 14:01:54.701435 Set power on after power failure.
666 14:01:54.701520 Disabling Deep S3
667 14:01:54.704655 Disabling Deep S3
668 14:01:54.707850 Disabling Deep S4
669 14:01:54.707935 Disabling Deep S4
670 14:01:54.710943 Disabling Deep S5
671 14:01:54.711063 Disabling Deep S5
672 14:01:54.717573 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 194 exit 1
673 14:01:54.720796 Enumerating buses...
674 14:01:54.724136 Show all devs... Before device enumeration.
675 14:01:54.727518 Root Device: enabled 1
676 14:01:54.730761 CPU_CLUSTER: 0: enabled 1
677 14:01:54.730845 DOMAIN: 0000: enabled 1
678 14:01:54.734048 APIC: 00: enabled 1
679 14:01:54.737477 PCI: 00:00.0: enabled 1
680 14:01:54.737563 PCI: 00:02.0: enabled 1
681 14:01:54.740796 PCI: 00:04.0: enabled 0
682 14:01:54.743975 PCI: 00:05.0: enabled 0
683 14:01:54.747132 PCI: 00:12.0: enabled 1
684 14:01:54.747217 PCI: 00:12.5: enabled 0
685 14:01:54.750363 PCI: 00:12.6: enabled 0
686 14:01:54.753733 PCI: 00:14.0: enabled 1
687 14:01:54.757101 PCI: 00:14.1: enabled 0
688 14:01:54.757187 PCI: 00:14.3: enabled 1
689 14:01:54.760126 PCI: 00:14.5: enabled 0
690 14:01:54.763666 PCI: 00:15.0: enabled 1
691 14:01:54.766962 PCI: 00:15.1: enabled 1
692 14:01:54.767084 PCI: 00:15.2: enabled 0
693 14:01:54.769876 PCI: 00:15.3: enabled 0
694 14:01:54.773544 PCI: 00:16.0: enabled 1
695 14:01:54.776671 PCI: 00:16.1: enabled 0
696 14:01:54.776789 PCI: 00:16.2: enabled 0
697 14:01:54.779703 PCI: 00:16.3: enabled 0
698 14:01:54.783173 PCI: 00:16.4: enabled 0
699 14:01:54.786574 PCI: 00:16.5: enabled 0
700 14:01:54.786693 PCI: 00:17.0: enabled 1
701 14:01:54.789786 PCI: 00:19.0: enabled 1
702 14:01:54.793130 PCI: 00:19.1: enabled 0
703 14:01:54.796376 PCI: 00:19.2: enabled 0
704 14:01:54.796462 PCI: 00:1a.0: enabled 0
705 14:01:54.799622 PCI: 00:1c.0: enabled 0
706 14:01:54.802734 PCI: 00:1c.1: enabled 0
707 14:01:54.802820 PCI: 00:1c.2: enabled 0
708 14:01:54.806195 PCI: 00:1c.3: enabled 0
709 14:01:54.809361 PCI: 00:1c.4: enabled 0
710 14:01:54.812582 PCI: 00:1c.5: enabled 0
711 14:01:54.812662 PCI: 00:1c.6: enabled 0
712 14:01:54.815911 PCI: 00:1c.7: enabled 0
713 14:01:54.819225 PCI: 00:1d.0: enabled 1
714 14:01:54.822522 PCI: 00:1d.1: enabled 0
715 14:01:54.822608 PCI: 00:1d.2: enabled 0
716 14:01:54.825540 PCI: 00:1d.3: enabled 0
717 14:01:54.828869 PCI: 00:1d.4: enabled 0
718 14:01:54.832059 PCI: 00:1d.5: enabled 1
719 14:01:54.832144 PCI: 00:1e.0: enabled 1
720 14:01:54.835431 PCI: 00:1e.1: enabled 0
721 14:01:54.838949 PCI: 00:1e.2: enabled 1
722 14:01:54.842054 PCI: 00:1e.3: enabled 1
723 14:01:54.842140 PCI: 00:1f.0: enabled 1
724 14:01:54.845230 PCI: 00:1f.1: enabled 1
725 14:01:54.848723 PCI: 00:1f.2: enabled 1
726 14:01:54.851965 PCI: 00:1f.3: enabled 1
727 14:01:54.852051 PCI: 00:1f.4: enabled 1
728 14:01:54.855142 PCI: 00:1f.5: enabled 1
729 14:01:54.858472 PCI: 00:1f.6: enabled 0
730 14:01:54.861629 USB0 port 0: enabled 1
731 14:01:54.861714 I2C: 00:15: enabled 1
732 14:01:54.864874 I2C: 00:5d: enabled 1
733 14:01:54.868076 GENERIC: 0.0: enabled 1
734 14:01:54.868162 I2C: 00:1a: enabled 1
735 14:01:54.871455 I2C: 00:38: enabled 1
736 14:01:54.874498 I2C: 00:39: enabled 1
737 14:01:54.874583 I2C: 00:3a: enabled 1
738 14:01:54.878149 I2C: 00:3b: enabled 1
739 14:01:54.881173 PCI: 00:00.0: enabled 1
740 14:01:54.881258 SPI: 00: enabled 1
741 14:01:54.884529 SPI: 01: enabled 1
742 14:01:54.887603 PNP: 0c09.0: enabled 1
743 14:01:54.887688 USB2 port 0: enabled 1
744 14:01:54.890964 USB2 port 1: enabled 1
745 14:01:54.894417 USB2 port 2: enabled 0
746 14:01:54.897777 USB2 port 3: enabled 0
747 14:01:54.897861 USB2 port 5: enabled 0
748 14:01:54.900824 USB2 port 6: enabled 1
749 14:01:54.904196 USB2 port 9: enabled 1
750 14:01:54.904282 USB3 port 0: enabled 1
751 14:01:54.907417 USB3 port 1: enabled 1
752 14:01:54.910648 USB3 port 2: enabled 1
753 14:01:54.914179 USB3 port 3: enabled 1
754 14:01:54.914271 USB3 port 4: enabled 0
755 14:01:54.917208 APIC: 03: enabled 1
756 14:01:54.920457 APIC: 01: enabled 1
757 14:01:54.920542 APIC: 07: enabled 1
758 14:01:54.923937 APIC: 02: enabled 1
759 14:01:54.924079 APIC: 05: enabled 1
760 14:01:54.927067 APIC: 06: enabled 1
761 14:01:54.930348 APIC: 04: enabled 1
762 14:01:54.930434 Compare with tree...
763 14:01:54.933469 Root Device: enabled 1
764 14:01:54.936727 CPU_CLUSTER: 0: enabled 1
765 14:01:54.940182 APIC: 00: enabled 1
766 14:01:54.940268 APIC: 03: enabled 1
767 14:01:54.943220 APIC: 01: enabled 1
768 14:01:54.946809 APIC: 07: enabled 1
769 14:01:54.946894 APIC: 02: enabled 1
770 14:01:54.949801 APIC: 05: enabled 1
771 14:01:54.952964 APIC: 06: enabled 1
772 14:01:54.953051 APIC: 04: enabled 1
773 14:01:54.956291 DOMAIN: 0000: enabled 1
774 14:01:54.959776 PCI: 00:00.0: enabled 1
775 14:01:54.962798 PCI: 00:02.0: enabled 1
776 14:01:54.966186 PCI: 00:04.0: enabled 0
777 14:01:54.966262 PCI: 00:05.0: enabled 0
778 14:01:54.969311 PCI: 00:12.0: enabled 1
779 14:01:54.972760 PCI: 00:12.5: enabled 0
780 14:01:54.975817 PCI: 00:12.6: enabled 0
781 14:01:54.979211 PCI: 00:14.0: enabled 1
782 14:01:54.979286 USB0 port 0: enabled 1
783 14:01:54.982559 USB2 port 0: enabled 1
784 14:01:54.985637 USB2 port 1: enabled 1
785 14:01:54.989027 USB2 port 2: enabled 0
786 14:01:54.992374 USB2 port 3: enabled 0
787 14:01:54.995698 USB2 port 5: enabled 0
788 14:01:54.995776 USB2 port 6: enabled 1
789 14:01:54.998770 USB2 port 9: enabled 1
790 14:01:55.001979 USB3 port 0: enabled 1
791 14:01:55.005213 USB3 port 1: enabled 1
792 14:01:55.008777 USB3 port 2: enabled 1
793 14:01:55.012008 USB3 port 3: enabled 1
794 14:01:55.012088 USB3 port 4: enabled 0
795 14:01:55.015159 PCI: 00:14.1: enabled 0
796 14:01:55.018457 PCI: 00:14.3: enabled 1
797 14:01:55.021739 PCI: 00:14.5: enabled 0
798 14:01:55.024822 PCI: 00:15.0: enabled 1
799 14:01:55.024897 I2C: 00:15: enabled 1
800 14:01:55.028179 PCI: 00:15.1: enabled 1
801 14:01:55.031462 I2C: 00:5d: enabled 1
802 14:01:55.034866 GENERIC: 0.0: enabled 1
803 14:01:55.037961 PCI: 00:15.2: enabled 0
804 14:01:55.038039 PCI: 00:15.3: enabled 0
805 14:01:55.041278 PCI: 00:16.0: enabled 1
806 14:01:55.044741 PCI: 00:16.1: enabled 0
807 14:01:55.048060 PCI: 00:16.2: enabled 0
808 14:01:55.051190 PCI: 00:16.3: enabled 0
809 14:01:55.051269 PCI: 00:16.4: enabled 0
810 14:01:55.054321 PCI: 00:16.5: enabled 0
811 14:01:55.057567 PCI: 00:17.0: enabled 1
812 14:01:55.061154 PCI: 00:19.0: enabled 1
813 14:01:55.064410 I2C: 00:1a: enabled 1
814 14:01:55.064484 I2C: 00:38: enabled 1
815 14:01:55.067577 I2C: 00:39: enabled 1
816 14:01:55.070712 I2C: 00:3a: enabled 1
817 14:01:55.073915 I2C: 00:3b: enabled 1
818 14:01:55.073992 PCI: 00:19.1: enabled 0
819 14:01:55.077350 PCI: 00:19.2: enabled 0
820 14:01:55.080668 PCI: 00:1a.0: enabled 0
821 14:01:55.083918 PCI: 00:1c.0: enabled 0
822 14:01:55.087354 PCI: 00:1c.1: enabled 0
823 14:01:55.087438 PCI: 00:1c.2: enabled 0
824 14:01:55.090540 PCI: 00:1c.3: enabled 0
825 14:01:55.093547 PCI: 00:1c.4: enabled 0
826 14:01:55.097051 PCI: 00:1c.5: enabled 0
827 14:01:55.100176 PCI: 00:1c.6: enabled 0
828 14:01:55.103607 PCI: 00:1c.7: enabled 0
829 14:01:55.103682 PCI: 00:1d.0: enabled 1
830 14:01:55.106707 PCI: 00:1d.1: enabled 0
831 14:01:55.110021 PCI: 00:1d.2: enabled 0
832 14:01:55.113097 PCI: 00:1d.3: enabled 0
833 14:01:55.116794 PCI: 00:1d.4: enabled 0
834 14:01:55.116875 PCI: 00:1d.5: enabled 1
835 14:01:55.119883 PCI: 00:00.0: enabled 1
836 14:01:55.123201 PCI: 00:1e.0: enabled 1
837 14:01:55.126396 PCI: 00:1e.1: enabled 0
838 14:01:55.129473 PCI: 00:1e.2: enabled 1
839 14:01:55.129550 SPI: 00: enabled 1
840 14:01:55.132868 PCI: 00:1e.3: enabled 1
841 14:01:55.136040 SPI: 01: enabled 1
842 14:01:55.139186 PCI: 00:1f.0: enabled 1
843 14:01:55.139263 PNP: 0c09.0: enabled 1
844 14:01:55.142395 PCI: 00:1f.1: enabled 1
845 14:01:55.145913 PCI: 00:1f.2: enabled 1
846 14:01:55.149023 PCI: 00:1f.3: enabled 1
847 14:01:55.152439 PCI: 00:1f.4: enabled 1
848 14:01:55.152513 PCI: 00:1f.5: enabled 1
849 14:01:55.155663 PCI: 00:1f.6: enabled 0
850 14:01:55.159091 Root Device scanning...
851 14:01:55.162335 scan_static_bus for Root Device
852 14:01:55.165751 CPU_CLUSTER: 0 enabled
853 14:01:55.165828 DOMAIN: 0000 enabled
854 14:01:55.168753 DOMAIN: 0000 scanning...
855 14:01:55.172091 PCI: pci_scan_bus for bus 00
856 14:01:55.175402 PCI: 00:00.0 [8086/0000] ops
857 14:01:55.178905 PCI: 00:00.0 [8086/9b61] enabled
858 14:01:55.181883 PCI: 00:02.0 [8086/0000] bus ops
859 14:01:55.185245 PCI: 00:02.0 [8086/9b41] enabled
860 14:01:55.188324 PCI: 00:04.0 [8086/1903] disabled
861 14:01:55.191733 PCI: 00:08.0 [8086/1911] enabled
862 14:01:55.194803 PCI: 00:12.0 [8086/02f9] enabled
863 14:01:55.198192 PCI: 00:14.0 [8086/0000] bus ops
864 14:01:55.201503 PCI: 00:14.0 [8086/02ed] enabled
865 14:01:55.204567 PCI: 00:14.2 [8086/02ef] enabled
866 14:01:55.207981 PCI: 00:14.3 [8086/02f0] enabled
867 14:01:55.211329 PCI: 00:15.0 [8086/0000] bus ops
868 14:01:55.214400 PCI: 00:15.0 [8086/02e8] enabled
869 14:01:55.217703 PCI: 00:15.1 [8086/0000] bus ops
870 14:01:55.220885 PCI: 00:15.1 [8086/02e9] enabled
871 14:01:55.224221 PCI: 00:16.0 [8086/0000] ops
872 14:01:55.227563 PCI: 00:16.0 [8086/02e0] enabled
873 14:01:55.230943 PCI: 00:17.0 [8086/0000] ops
874 14:01:55.234280 PCI: 00:17.0 [8086/02d3] enabled
875 14:01:55.237512 PCI: 00:19.0 [8086/0000] bus ops
876 14:01:55.240845 PCI: 00:19.0 [8086/02c5] enabled
877 14:01:55.243834 PCI: 00:1d.0 [8086/0000] bus ops
878 14:01:55.247191 PCI: 00:1d.0 [8086/02b0] enabled
879 14:01:55.253998 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 14:01:55.257182 PCI: 00:1e.0 [8086/0000] ops
881 14:01:55.260360 PCI: 00:1e.0 [8086/02a8] enabled
882 14:01:55.263454 PCI: 00:1e.2 [8086/0000] bus ops
883 14:01:55.266851 PCI: 00:1e.2 [8086/02aa] enabled
884 14:01:55.270141 PCI: 00:1e.3 [8086/0000] bus ops
885 14:01:55.273466 PCI: 00:1e.3 [8086/02ab] enabled
886 14:01:55.276866 PCI: 00:1f.0 [8086/0000] bus ops
887 14:01:55.279912 PCI: 00:1f.0 [8086/0284] enabled
888 14:01:55.286423 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 14:01:55.289703 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 14:01:55.292971 PCI: 00:1f.3 [8086/0000] bus ops
891 14:01:55.299522 PCI: 00:1f.3 [8086/02c8] enabled
892 14:01:55.302804 PCI: 00:1f.4 [8086/0000] bus ops
893 14:01:55.305982 PCI: 00:1f.4 [8086/02a3] enabled
894 14:01:55.309234 PCI: 00:1f.5 [8086/0000] bus ops
895 14:01:55.312486 PCI: 00:1f.5 [8086/02a4] enabled
896 14:01:55.315751 PCI: Leftover static devices:
897 14:01:55.315842 PCI: 00:05.0
898 14:01:55.315907 PCI: 00:12.5
899 14:01:55.319111 PCI: 00:12.6
900 14:01:55.319182 PCI: 00:14.1
901 14:01:55.322342 PCI: 00:14.5
902 14:01:55.322430 PCI: 00:15.2
903 14:01:55.322493 PCI: 00:15.3
904 14:01:55.325687 PCI: 00:16.1
905 14:01:55.325760 PCI: 00:16.2
906 14:01:55.329128 PCI: 00:16.3
907 14:01:55.329202 PCI: 00:16.4
908 14:01:55.332161 PCI: 00:16.5
909 14:01:55.332247 PCI: 00:19.1
910 14:01:55.332310 PCI: 00:19.2
911 14:01:55.335647 PCI: 00:1a.0
912 14:01:55.335762 PCI: 00:1c.0
913 14:01:55.338948 PCI: 00:1c.1
914 14:01:55.339049 PCI: 00:1c.2
915 14:01:55.339113 PCI: 00:1c.3
916 14:01:55.341867 PCI: 00:1c.4
917 14:01:55.341940 PCI: 00:1c.5
918 14:01:55.345373 PCI: 00:1c.6
919 14:01:55.345447 PCI: 00:1c.7
920 14:01:55.348752 PCI: 00:1d.1
921 14:01:55.348824 PCI: 00:1d.2
922 14:01:55.348888 PCI: 00:1d.3
923 14:01:55.351823 PCI: 00:1d.4
924 14:01:55.351896 PCI: 00:1d.5
925 14:01:55.354990 PCI: 00:1e.1
926 14:01:55.355113 PCI: 00:1f.1
927 14:01:55.355175 PCI: 00:1f.2
928 14:01:55.358330 PCI: 00:1f.6
929 14:01:55.361845 PCI: Check your devicetree.cb.
930 14:01:55.365021 PCI: 00:02.0 scanning...
931 14:01:55.368120 scan_generic_bus for PCI: 00:02.0
932 14:01:55.371499 scan_generic_bus for PCI: 00:02.0 done
933 14:01:55.377860 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
934 14:01:55.377937 PCI: 00:14.0 scanning...
935 14:01:55.381229 scan_static_bus for PCI: 00:14.0
936 14:01:55.384417 USB0 port 0 enabled
937 14:01:55.387787 USB0 port 0 scanning...
938 14:01:55.391098 scan_static_bus for USB0 port 0
939 14:01:55.394138 USB2 port 0 enabled
940 14:01:55.394210 USB2 port 1 enabled
941 14:01:55.397435 USB2 port 2 disabled
942 14:01:55.397511 USB2 port 3 disabled
943 14:01:55.400825 USB2 port 5 disabled
944 14:01:55.404138 USB2 port 6 enabled
945 14:01:55.404216 USB2 port 9 enabled
946 14:01:55.407367 USB3 port 0 enabled
947 14:01:55.410894 USB3 port 1 enabled
948 14:01:55.410970 USB3 port 2 enabled
949 14:01:55.413989 USB3 port 3 enabled
950 14:01:55.417318 USB3 port 4 disabled
951 14:01:55.417393 USB2 port 0 scanning...
952 14:01:55.420644 scan_static_bus for USB2 port 0
953 14:01:55.423757 scan_static_bus for USB2 port 0 done
954 14:01:55.430165 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
955 14:01:55.433367 USB2 port 1 scanning...
956 14:01:55.436716 scan_static_bus for USB2 port 1
957 14:01:55.440100 scan_static_bus for USB2 port 1 done
958 14:01:55.446505 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
959 14:01:55.446587 USB2 port 6 scanning...
960 14:01:55.450150 scan_static_bus for USB2 port 6
961 14:01:55.456590 scan_static_bus for USB2 port 6 done
962 14:01:55.459999 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
963 14:01:55.463128 USB2 port 9 scanning...
964 14:01:55.466793 scan_static_bus for USB2 port 9
965 14:01:55.469770 scan_static_bus for USB2 port 9 done
966 14:01:55.476282 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
967 14:01:55.479691 USB3 port 0 scanning...
968 14:01:55.482905 scan_static_bus for USB3 port 0
969 14:01:55.486182 scan_static_bus for USB3 port 0 done
970 14:01:55.489491 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
971 14:01:55.492832 USB3 port 1 scanning...
972 14:01:55.495822 scan_static_bus for USB3 port 1
973 14:01:55.499223 scan_static_bus for USB3 port 1 done
974 14:01:55.505858 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
975 14:01:55.508821 USB3 port 2 scanning...
976 14:01:55.512306 scan_static_bus for USB3 port 2
977 14:01:55.515740 scan_static_bus for USB3 port 2 done
978 14:01:55.521988 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
979 14:01:55.522068 USB3 port 3 scanning...
980 14:01:55.525502 scan_static_bus for USB3 port 3
981 14:01:55.531951 scan_static_bus for USB3 port 3 done
982 14:01:55.535054 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
983 14:01:55.538566 scan_static_bus for USB0 port 0 done
984 14:01:55.544898 scan_bus: scanning of bus USB0 port 0 took 155312 usecs
985 14:01:55.548186 scan_static_bus for PCI: 00:14.0 done
986 14:01:55.554779 scan_bus: scanning of bus PCI: 00:14.0 took 172926 usecs
987 14:01:55.558140 PCI: 00:15.0 scanning...
988 14:01:55.561238 scan_generic_bus for PCI: 00:15.0
989 14:01:55.564458 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 14:01:55.567785 scan_generic_bus for PCI: 00:15.0 done
991 14:01:55.574555 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
992 14:01:55.577672 PCI: 00:15.1 scanning...
993 14:01:55.581045 scan_generic_bus for PCI: 00:15.1
994 14:01:55.584136 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 14:01:55.587741 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 14:01:55.593828 scan_generic_bus for PCI: 00:15.1 done
997 14:01:55.597140 scan_bus: scanning of bus PCI: 00:15.1 took 18594 usecs
998 14:01:55.600432 PCI: 00:19.0 scanning...
999 14:01:55.603746 scan_generic_bus for PCI: 00:19.0
1000 14:01:55.606983 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 14:01:55.613747 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 14:01:55.616819 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 14:01:55.620249 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 14:01:55.623378 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 14:01:55.629940 scan_generic_bus for PCI: 00:19.0 done
1006 14:01:55.633263 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1007 14:01:55.636545 PCI: 00:1d.0 scanning...
1008 14:01:55.639825 do_pci_scan_bridge for PCI: 00:1d.0
1009 14:01:55.642887 PCI: pci_scan_bus for bus 01
1010 14:01:55.646181 PCI: 01:00.0 [1c5c/1327] enabled
1011 14:01:55.649345 Enabling Common Clock Configuration
1012 14:01:55.655958 L1 Sub-State supported from root port 29
1013 14:01:55.659370 L1 Sub-State Support = 0xf
1014 14:01:55.659456 CommonModeRestoreTime = 0x28
1015 14:01:55.665690 Power On Value = 0x16, Power On Scale = 0x0
1016 14:01:55.665817 ASPM: Enabled L1
1017 14:01:55.672545 scan_bus: scanning of bus PCI: 00:1d.0 took 32783 usecs
1018 14:01:55.675633 PCI: 00:1e.2 scanning...
1019 14:01:55.678844 scan_generic_bus for PCI: 00:1e.2
1020 14:01:55.682154 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 14:01:55.685533 scan_generic_bus for PCI: 00:1e.2 done
1022 14:01:55.692013 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1023 14:01:55.695474 PCI: 00:1e.3 scanning...
1024 14:01:55.698859 scan_generic_bus for PCI: 00:1e.3
1025 14:01:55.702015 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 14:01:55.705114 scan_generic_bus for PCI: 00:1e.3 done
1027 14:01:55.711853 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1028 14:01:55.714859 PCI: 00:1f.0 scanning...
1029 14:01:55.718410 scan_static_bus for PCI: 00:1f.0
1030 14:01:55.718495 PNP: 0c09.0 enabled
1031 14:01:55.724898 scan_static_bus for PCI: 00:1f.0 done
1032 14:01:55.728021 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1033 14:01:55.731438 PCI: 00:1f.3 scanning...
1034 14:01:55.737982 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1035 14:01:55.741192 PCI: 00:1f.4 scanning...
1036 14:01:55.744389 scan_generic_bus for PCI: 00:1f.4
1037 14:01:55.747815 scan_generic_bus for PCI: 00:1f.4 done
1038 14:01:55.754295 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1039 14:01:55.754381 PCI: 00:1f.5 scanning...
1040 14:01:55.757454 scan_generic_bus for PCI: 00:1f.5
1041 14:01:55.764254 scan_generic_bus for PCI: 00:1f.5 done
1042 14:01:55.767469 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1043 14:01:55.774054 scan_bus: scanning of bus DOMAIN: 0000 took 604951 usecs
1044 14:01:55.777263 scan_static_bus for Root Device done
1045 14:01:55.783566 scan_bus: scanning of bus Root Device took 624866 usecs
1046 14:01:55.783651 done
1047 14:01:55.786818 Chrome EC: UHEPI supported
1048 14:01:55.793493 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 14:01:55.800116 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 14:01:55.806470 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 14:01:55.813224 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 14:01:55.816543 SPI flash protection: WPSW=0 SRP0=0
1053 14:01:55.819576 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 14:01:55.826340 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 14:01:55.829456 found VGA at PCI: 00:02.0
1056 14:01:55.832807 Setting up VGA for PCI: 00:02.0
1057 14:01:55.835877 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 14:01:55.842473 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 14:01:55.845802 Allocating resources...
1060 14:01:55.845887 Reading resources...
1061 14:01:55.852099 Root Device read_resources bus 0 link: 0
1062 14:01:55.855384 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 14:01:55.862108 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 14:01:55.865217 DOMAIN: 0000 read_resources bus 0 link: 0
1065 14:01:55.871924 PCI: 00:14.0 read_resources bus 0 link: 0
1066 14:01:55.875348 USB0 port 0 read_resources bus 0 link: 0
1067 14:01:55.883615 USB0 port 0 read_resources bus 0 link: 0 done
1068 14:01:55.886860 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 14:01:55.894201 PCI: 00:15.0 read_resources bus 1 link: 0
1070 14:01:55.897405 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 14:01:55.904106 PCI: 00:15.1 read_resources bus 2 link: 0
1072 14:01:55.907376 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 14:01:55.914882 PCI: 00:19.0 read_resources bus 3 link: 0
1074 14:01:55.921459 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 14:01:55.924609 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 14:01:55.930997 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 14:01:55.934360 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 14:01:55.940940 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 14:01:55.944168 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 14:01:55.950931 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 14:01:55.953974 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 14:01:55.960681 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 14:01:55.967431 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 14:01:55.970563 Root Device read_resources bus 0 link: 0 done
1085 14:01:55.973836 Done reading resources.
1086 14:01:55.980461 Show resources in subtree (Root Device)...After reading.
1087 14:01:55.983851 Root Device child on link 0 CPU_CLUSTER: 0
1088 14:01:55.986903 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 14:01:55.990470 APIC: 00
1090 14:01:55.990554 APIC: 03
1091 14:01:55.990635 APIC: 01
1092 14:01:55.993531 APIC: 07
1093 14:01:55.993615 APIC: 02
1094 14:01:55.996970 APIC: 05
1095 14:01:55.997055 APIC: 06
1096 14:01:55.997121 APIC: 04
1097 14:01:56.046540 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 14:01:56.046849 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 14:01:56.046927 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 14:01:56.046993 PCI: 00:00.0
1101 14:01:56.047288 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 14:01:56.047549 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 14:01:56.075447 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 14:01:56.076084 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 14:01:56.076169 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 14:01:56.082684 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 14:01:56.088969 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 14:01:56.098708 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 14:01:56.108705 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 14:01:56.115139 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 14:01:56.124865 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 14:01:56.134849 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 14:01:56.144548 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 14:01:56.154333 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 14:01:56.164055 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 14:01:56.173938 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 14:01:56.174026 PCI: 00:02.0
1118 14:01:56.183912 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 14:01:56.196865 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 14:01:56.203409 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 14:01:56.206809 PCI: 00:04.0
1122 14:01:56.206906 PCI: 00:08.0
1123 14:01:56.216792 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 14:01:56.220013 PCI: 00:12.0
1125 14:01:56.229850 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 14:01:56.232850 PCI: 00:14.0 child on link 0 USB0 port 0
1127 14:01:56.242617 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 14:01:56.246064 USB0 port 0 child on link 0 USB2 port 0
1129 14:01:56.249032 USB2 port 0
1130 14:01:56.252538 USB2 port 1
1131 14:01:56.252638 USB2 port 2
1132 14:01:56.255827 USB2 port 3
1133 14:01:56.255941 USB2 port 5
1134 14:01:56.259118 USB2 port 6
1135 14:01:56.259205 USB2 port 9
1136 14:01:56.262342 USB3 port 0
1137 14:01:56.262446 USB3 port 1
1138 14:01:56.265633 USB3 port 2
1139 14:01:56.265733 USB3 port 3
1140 14:01:56.268783 USB3 port 4
1141 14:01:56.268896 PCI: 00:14.2
1142 14:01:56.278510 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 14:01:56.288149 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 14:01:56.291376 PCI: 00:14.3
1145 14:01:56.301209 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 14:01:56.304622 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 14:01:56.314195 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 14:01:56.317543 I2C: 01:15
1149 14:01:56.320711 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 14:01:56.330471 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 14:01:56.333897 I2C: 02:5d
1152 14:01:56.333981 GENERIC: 0.0
1153 14:01:56.337235 PCI: 00:16.0
1154 14:01:56.347106 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 14:01:56.347191 PCI: 00:17.0
1156 14:01:56.356721 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 14:01:56.366478 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 14:01:56.372908 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 14:01:56.382732 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 14:01:56.392630 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 14:01:56.398980 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 14:01:56.405466 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 14:01:56.415359 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 14:01:56.415449 I2C: 03:1a
1165 14:01:56.418783 I2C: 03:38
1166 14:01:56.418862 I2C: 03:39
1167 14:01:56.421843 I2C: 03:3a
1168 14:01:56.421918 I2C: 03:3b
1169 14:01:56.425325 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 14:01:56.435295 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 14:01:56.444981 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 14:01:56.454531 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 14:01:56.454622 PCI: 01:00.0
1174 14:01:56.464510 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 14:01:56.467450 PCI: 00:1e.0
1176 14:01:56.477209 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 14:01:56.487045 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 14:01:56.493513 PCI: 00:1e.2 child on link 0 SPI: 00
1179 14:01:56.503594 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 14:01:56.503717 SPI: 00
1181 14:01:56.506807 PCI: 00:1e.3 child on link 0 SPI: 01
1182 14:01:56.516300 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:01:56.519526 SPI: 01
1184 14:01:56.523081 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 14:01:56.532907 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 14:01:56.539520 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 14:01:56.542518 PNP: 0c09.0
1188 14:01:56.552541 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 14:01:56.552631 PCI: 00:1f.3
1190 14:01:56.562298 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 14:01:56.572184 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 14:01:56.575358 PCI: 00:1f.4
1193 14:01:56.584831 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 14:01:56.594788 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 14:01:56.594878 PCI: 00:1f.5
1196 14:01:56.604634 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 14:01:56.611391 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 14:01:56.617935 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 14:01:56.624413 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 14:01:56.627545 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 14:01:56.630642 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 14:01:56.634090 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 14:01:56.637408 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 14:01:56.643830 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 14:01:56.650308 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 14:01:56.660220 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 14:01:56.666836 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 14:01:56.673508 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 14:01:56.679959 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 14:01:56.686466 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 14:01:56.689754 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 14:01:56.696236 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 14:01:56.699525 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 14:01:56.705899 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 14:01:56.709612 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 14:01:56.715733 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 14:01:56.719278 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 14:01:56.725919 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 14:01:56.728825 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 14:01:56.735496 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 14:01:56.738664 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 14:01:56.745155 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 14:01:56.748698 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 14:01:56.754979 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 14:01:56.758249 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 14:01:56.764947 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 14:01:56.768226 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 14:01:56.774527 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 14:01:56.777823 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 14:01:56.784407 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 14:01:56.787794 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 14:01:56.794326 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 14:01:56.797406 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 14:01:56.807166 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 14:01:56.810401 avoid_fixed_resources: DOMAIN: 0000
1236 14:01:56.817131 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 14:01:56.820437 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 14:01:56.830167 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 14:01:56.836806 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 14:01:56.846462 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 14:01:56.853045 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 14:01:56.859507 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 14:01:56.869253 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 14:01:56.875830 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 14:01:56.882271 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 14:01:56.888905 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 14:01:56.898816 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 14:01:56.898906 Setting resources...
1249 14:01:56.905361 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 14:01:56.908539 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 14:01:56.915069 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 14:01:56.918297 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 14:01:56.921754 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 14:01:56.927918 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 14:01:56.934597 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 14:01:56.941309 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 14:01:56.947887 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 14:01:56.954211 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 14:01:56.957476 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 14:01:56.963876 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 14:01:56.967191 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 14:01:56.973799 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 14:01:56.976915 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 14:01:56.983574 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 14:01:56.986967 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 14:01:56.993395 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 14:01:56.996747 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 14:01:57.003350 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 14:01:57.006355 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 14:01:57.012715 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 14:01:57.016241 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 14:01:57.022599 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 14:01:57.026030 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 14:01:57.032474 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 14:01:57.035634 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 14:01:57.042321 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 14:01:57.045704 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 14:01:57.051862 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 14:01:57.055340 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 14:01:57.061920 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 14:01:57.068378 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 14:01:57.074979 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 14:01:57.081697 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 14:01:57.091218 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 14:01:57.094531 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 14:01:57.101188 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 14:01:57.107604 Root Device assign_resources, bus 0 link: 0
1288 14:01:57.110925 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 14:01:57.120682 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 14:01:57.127257 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 14:01:57.136861 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 14:01:57.143454 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 14:01:57.153292 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 14:01:57.159981 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 14:01:57.166390 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 14:01:57.169698 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 14:01:57.179544 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 14:01:57.185940 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 14:01:57.195641 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 14:01:57.202104 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 14:01:57.208754 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 14:01:57.212156 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 14:01:57.222109 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 14:01:57.225156 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 14:01:57.231510 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 14:01:57.238039 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 14:01:57.247747 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 14:01:57.254508 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 14:01:57.260922 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 14:01:57.270818 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 14:01:57.277282 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 14:01:57.283974 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 14:01:57.293777 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 14:01:57.297281 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 14:01:57.303664 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 14:01:57.310358 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 14:01:57.320055 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 14:01:57.329751 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 14:01:57.333209 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 14:01:57.342794 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 14:01:57.346290 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 14:01:57.355783 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 14:01:57.362335 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 14:01:57.368885 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 14:01:57.372363 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 14:01:57.382076 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 14:01:57.385179 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 14:01:57.388670 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 14:01:57.395192 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 14:01:57.398263 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 14:01:57.404728 LPC: Trying to open IO window from 800 size 1ff
1332 14:01:57.411240 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 14:01:57.421326 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 14:01:57.427685 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 14:01:57.437213 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 14:01:57.440584 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 14:01:57.447055 Root Device assign_resources, bus 0 link: 0
1338 14:01:57.450421 Done setting resources.
1339 14:01:57.456826 Show resources in subtree (Root Device)...After assigning values.
1340 14:01:57.460288 Root Device child on link 0 CPU_CLUSTER: 0
1341 14:01:57.463535 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 14:01:57.466721 APIC: 00
1343 14:01:57.466795 APIC: 03
1344 14:01:57.466859 APIC: 01
1345 14:01:57.469995 APIC: 07
1346 14:01:57.470069 APIC: 02
1347 14:01:57.473143 APIC: 05
1348 14:01:57.473213 APIC: 06
1349 14:01:57.473278 APIC: 04
1350 14:01:57.479876 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 14:01:57.489683 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 14:01:57.499478 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 14:01:57.502800 PCI: 00:00.0
1354 14:01:57.509193 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 14:01:57.518929 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 14:01:57.528694 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 14:01:57.538501 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 14:01:57.548315 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 14:01:57.558350 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 14:01:57.568122 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 14:01:57.577528 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 14:01:57.584235 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 14:01:57.593932 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 14:01:57.603565 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 14:01:57.613523 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 14:01:57.623362 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 14:01:57.633321 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 14:01:57.643079 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 14:01:57.649436 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 14:01:57.652621 PCI: 00:02.0
1371 14:01:57.662697 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 14:01:57.675598 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 14:01:57.681882 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 14:01:57.685272 PCI: 00:04.0
1375 14:01:57.685346 PCI: 00:08.0
1376 14:01:57.695073 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 14:01:57.698495 PCI: 00:12.0
1378 14:01:57.708464 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 14:01:57.711414 PCI: 00:14.0 child on link 0 USB0 port 0
1380 14:01:57.724738 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 14:01:57.728080 USB0 port 0 child on link 0 USB2 port 0
1382 14:01:57.731124 USB2 port 0
1383 14:01:57.731222 USB2 port 1
1384 14:01:57.734426 USB2 port 2
1385 14:01:57.734508 USB2 port 3
1386 14:01:57.737885 USB2 port 5
1387 14:01:57.737968 USB2 port 6
1388 14:01:57.740944 USB2 port 9
1389 14:01:57.741034 USB3 port 0
1390 14:01:57.744464 USB3 port 1
1391 14:01:57.744545 USB3 port 2
1392 14:01:57.747926 USB3 port 3
1393 14:01:57.748004 USB3 port 4
1394 14:01:57.750961 PCI: 00:14.2
1395 14:01:57.760677 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 14:01:57.770745 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 14:01:57.773704 PCI: 00:14.3
1398 14:01:57.783609 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 14:01:57.786715 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 14:01:57.796446 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 14:01:57.800008 I2C: 01:15
1402 14:01:57.803075 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 14:01:57.812899 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 14:01:57.816202 I2C: 02:5d
1405 14:01:57.816288 GENERIC: 0.0
1406 14:01:57.819693 PCI: 00:16.0
1407 14:01:57.829454 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 14:01:57.829547 PCI: 00:17.0
1409 14:01:57.842512 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 14:01:57.852295 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 14:01:57.858879 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 14:01:57.868616 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 14:01:57.878443 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 14:01:57.888139 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 14:01:57.891352 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 14:01:57.904524 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 14:01:57.904621 I2C: 03:1a
1418 14:01:57.907837 I2C: 03:38
1419 14:01:57.907918 I2C: 03:39
1420 14:01:57.911182 I2C: 03:3a
1421 14:01:57.911262 I2C: 03:3b
1422 14:01:57.914373 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 14:01:57.924345 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 14:01:57.934002 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 14:01:57.943783 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 14:01:57.947349 PCI: 01:00.0
1427 14:01:57.956931 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 14:01:57.960244 PCI: 00:1e.0
1429 14:01:57.970095 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 14:01:57.979819 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 14:01:57.983195 PCI: 00:1e.2 child on link 0 SPI: 00
1432 14:01:57.996171 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 14:01:57.996258 SPI: 00
1434 14:01:57.999550 PCI: 00:1e.3 child on link 0 SPI: 01
1435 14:01:58.009219 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 14:01:58.012665 SPI: 01
1437 14:01:58.015855 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 14:01:58.025860 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 14:01:58.032313 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 14:01:58.035277 PNP: 0c09.0
1441 14:01:58.045274 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 14:01:58.045403 PCI: 00:1f.3
1443 14:01:58.054875 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 14:01:58.067931 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 14:01:58.068020 PCI: 00:1f.4
1446 14:01:58.077952 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 14:01:58.087548 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 14:01:58.087635 PCI: 00:1f.5
1449 14:01:58.100782 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 14:01:58.100874 Done allocating resources.
1451 14:01:58.107203 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 14:01:58.110667 Enabling resources...
1453 14:01:58.113886 PCI: 00:00.0 subsystem <- 8086/9b61
1454 14:01:58.117018 PCI: 00:00.0 cmd <- 06
1455 14:01:58.120435 PCI: 00:02.0 subsystem <- 8086/9b41
1456 14:01:58.123573 PCI: 00:02.0 cmd <- 03
1457 14:01:58.126749 PCI: 00:08.0 cmd <- 06
1458 14:01:58.130026 PCI: 00:12.0 subsystem <- 8086/02f9
1459 14:01:58.133373 PCI: 00:12.0 cmd <- 02
1460 14:01:58.136525 PCI: 00:14.0 subsystem <- 8086/02ed
1461 14:01:58.139745 PCI: 00:14.0 cmd <- 02
1462 14:01:58.139827 PCI: 00:14.2 cmd <- 02
1463 14:01:58.146374 PCI: 00:14.3 subsystem <- 8086/02f0
1464 14:01:58.146475 PCI: 00:14.3 cmd <- 02
1465 14:01:58.153269 PCI: 00:15.0 subsystem <- 8086/02e8
1466 14:01:58.153361 PCI: 00:15.0 cmd <- 02
1467 14:01:58.156334 PCI: 00:15.1 subsystem <- 8086/02e9
1468 14:01:58.159589 PCI: 00:15.1 cmd <- 02
1469 14:01:58.162866 PCI: 00:16.0 subsystem <- 8086/02e0
1470 14:01:58.166218 PCI: 00:16.0 cmd <- 02
1471 14:01:58.169469 PCI: 00:17.0 subsystem <- 8086/02d3
1472 14:01:58.172787 PCI: 00:17.0 cmd <- 03
1473 14:01:58.176198 PCI: 00:19.0 subsystem <- 8086/02c5
1474 14:01:58.179167 PCI: 00:19.0 cmd <- 02
1475 14:01:58.182582 PCI: 00:1d.0 bridge ctrl <- 0013
1476 14:01:58.185546 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 14:01:58.189078 PCI: 00:1d.0 cmd <- 06
1478 14:01:58.192321 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 14:01:58.195499 PCI: 00:1e.0 cmd <- 06
1480 14:01:58.198924 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 14:01:58.201969 PCI: 00:1e.2 cmd <- 06
1482 14:01:58.205300 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 14:01:58.208675 PCI: 00:1e.3 cmd <- 02
1484 14:01:58.211749 PCI: 00:1f.0 subsystem <- 8086/0284
1485 14:01:58.215032 PCI: 00:1f.0 cmd <- 407
1486 14:01:58.218072 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 14:01:58.218153 PCI: 00:1f.3 cmd <- 02
1488 14:01:58.225241 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 14:01:58.225333 PCI: 00:1f.4 cmd <- 03
1490 14:01:58.228450 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 14:01:58.231745 PCI: 00:1f.5 cmd <- 406
1492 14:01:58.241276 PCI: 01:00.0 cmd <- 02
1493 14:01:58.246686 done.
1494 14:01:58.259134 ME: Version: 14.0.39.1367
1495 14:01:58.265582 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 14:01:58.268850 Initializing devices...
1497 14:01:58.268937 Root Device init ...
1498 14:01:58.275331 Chrome EC: Set SMI mask to 0x0000000000000000
1499 14:01:58.281923 Chrome EC: clear events_b mask to 0x0000000000000000
1500 14:01:58.285326 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 14:01:58.291779 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 14:01:58.298235 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 14:01:58.301496 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 14:01:58.308211 Root Device init finished in 35223 usecs
1505 14:01:58.311374 CPU_CLUSTER: 0 init ...
1506 14:01:58.314395 CPU_CLUSTER: 0 init finished in 2449 usecs
1507 14:01:58.319949 PCI: 00:00.0 init ...
1508 14:01:58.323120 CPU TDP: 15 Watts
1509 14:01:58.326468 CPU PL2 = 64 Watts
1510 14:01:58.329627 PCI: 00:00.0 init finished in 7072 usecs
1511 14:01:58.332974 PCI: 00:02.0 init ...
1512 14:01:58.336339 PCI: 00:02.0 init finished in 2254 usecs
1513 14:01:58.339569 PCI: 00:08.0 init ...
1514 14:01:58.342669 PCI: 00:08.0 init finished in 2253 usecs
1515 14:01:58.345909 PCI: 00:12.0 init ...
1516 14:01:58.349192 PCI: 00:12.0 init finished in 2253 usecs
1517 14:01:58.352521 PCI: 00:14.0 init ...
1518 14:01:58.355846 PCI: 00:14.0 init finished in 2242 usecs
1519 14:01:58.359137 PCI: 00:14.2 init ...
1520 14:01:58.362359 PCI: 00:14.2 init finished in 2251 usecs
1521 14:01:58.365601 PCI: 00:14.3 init ...
1522 14:01:58.368778 PCI: 00:14.3 init finished in 2269 usecs
1523 14:01:58.372288 PCI: 00:15.0 init ...
1524 14:01:58.375769 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 14:01:58.382339 PCI: 00:15.0 init finished in 5968 usecs
1526 14:01:58.382416 PCI: 00:15.1 init ...
1527 14:01:58.388718 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 14:01:58.392196 PCI: 00:15.1 init finished in 5977 usecs
1529 14:01:58.395366 PCI: 00:16.0 init ...
1530 14:01:58.398660 PCI: 00:16.0 init finished in 2254 usecs
1531 14:01:58.401646 PCI: 00:19.0 init ...
1532 14:01:58.404890 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 14:01:58.408220 PCI: 00:19.0 init finished in 5977 usecs
1534 14:01:58.411450 PCI: 00:1d.0 init ...
1535 14:01:58.414718 Initializing PCH PCIe bridge.
1536 14:01:58.418060 PCI: 00:1d.0 init finished in 5287 usecs
1537 14:01:58.421739 PCI: 00:1f.0 init ...
1538 14:01:58.425007 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 14:01:58.431633 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 14:01:58.431718 IOAPIC: ID = 0x02
1541 14:01:58.434969 IOAPIC: Dumping registers
1542 14:01:58.438257 reg 0x0000: 0x02000000
1543 14:01:58.441546 reg 0x0001: 0x00770020
1544 14:01:58.444726 reg 0x0002: 0x00000000
1545 14:01:58.448002 PCI: 00:1f.0 init finished in 23531 usecs
1546 14:01:58.451226 PCI: 00:1f.4 init ...
1547 14:01:58.454477 PCI: 00:1f.4 init finished in 2263 usecs
1548 14:01:58.466016 PCI: 01:00.0 init ...
1549 14:01:58.469351 PCI: 01:00.0 init finished in 2254 usecs
1550 14:01:58.473811 PNP: 0c09.0 init ...
1551 14:01:58.476800 Google Chrome EC uptime: 11.052 seconds
1552 14:01:58.483499 Google Chrome AP resets since EC boot: 0
1553 14:01:58.486843 Google Chrome most recent AP reset causes:
1554 14:01:58.493198 Google Chrome EC reset flags at last EC boot: reset-pin
1555 14:01:58.496540 PNP: 0c09.0 init finished in 20579 usecs
1556 14:01:58.499809 Devices initialized
1557 14:01:58.502950 Show all devs... After init.
1558 14:01:58.503067 Root Device: enabled 1
1559 14:01:58.506155 CPU_CLUSTER: 0: enabled 1
1560 14:01:58.509650 DOMAIN: 0000: enabled 1
1561 14:01:58.512903 APIC: 00: enabled 1
1562 14:01:58.512995 PCI: 00:00.0: enabled 1
1563 14:01:58.516058 PCI: 00:02.0: enabled 1
1564 14:01:58.519461 PCI: 00:04.0: enabled 0
1565 14:01:58.519559 PCI: 00:05.0: enabled 0
1566 14:01:58.522839 PCI: 00:12.0: enabled 1
1567 14:01:58.525939 PCI: 00:12.5: enabled 0
1568 14:01:58.529316 PCI: 00:12.6: enabled 0
1569 14:01:58.529410 PCI: 00:14.0: enabled 1
1570 14:01:58.532395 PCI: 00:14.1: enabled 0
1571 14:01:58.535826 PCI: 00:14.3: enabled 1
1572 14:01:58.538856 PCI: 00:14.5: enabled 0
1573 14:01:58.538940 PCI: 00:15.0: enabled 1
1574 14:01:58.542194 PCI: 00:15.1: enabled 1
1575 14:01:58.545715 PCI: 00:15.2: enabled 0
1576 14:01:58.548791 PCI: 00:15.3: enabled 0
1577 14:01:58.548913 PCI: 00:16.0: enabled 1
1578 14:01:58.551831 PCI: 00:16.1: enabled 0
1579 14:01:58.555370 PCI: 00:16.2: enabled 0
1580 14:01:58.558762 PCI: 00:16.3: enabled 0
1581 14:01:58.558851 PCI: 00:16.4: enabled 0
1582 14:01:58.561972 PCI: 00:16.5: enabled 0
1583 14:01:58.565015 PCI: 00:17.0: enabled 1
1584 14:01:58.568576 PCI: 00:19.0: enabled 1
1585 14:01:58.568667 PCI: 00:19.1: enabled 0
1586 14:01:58.571567 PCI: 00:19.2: enabled 0
1587 14:01:58.574900 PCI: 00:1a.0: enabled 0
1588 14:01:58.578164 PCI: 00:1c.0: enabled 0
1589 14:01:58.578242 PCI: 00:1c.1: enabled 0
1590 14:01:58.581252 PCI: 00:1c.2: enabled 0
1591 14:01:58.584693 PCI: 00:1c.3: enabled 0
1592 14:01:58.588074 PCI: 00:1c.4: enabled 0
1593 14:01:58.588148 PCI: 00:1c.5: enabled 0
1594 14:01:58.591255 PCI: 00:1c.6: enabled 0
1595 14:01:58.594327 PCI: 00:1c.7: enabled 0
1596 14:01:58.597730 PCI: 00:1d.0: enabled 1
1597 14:01:58.597805 PCI: 00:1d.1: enabled 0
1598 14:01:58.600978 PCI: 00:1d.2: enabled 0
1599 14:01:58.604111 PCI: 00:1d.3: enabled 0
1600 14:01:58.607568 PCI: 00:1d.4: enabled 0
1601 14:01:58.607645 PCI: 00:1d.5: enabled 0
1602 14:01:58.610679 PCI: 00:1e.0: enabled 1
1603 14:01:58.613894 PCI: 00:1e.1: enabled 0
1604 14:01:58.617410 PCI: 00:1e.2: enabled 1
1605 14:01:58.617503 PCI: 00:1e.3: enabled 1
1606 14:01:58.620448 PCI: 00:1f.0: enabled 1
1607 14:01:58.623917 PCI: 00:1f.1: enabled 0
1608 14:01:58.627073 PCI: 00:1f.2: enabled 0
1609 14:01:58.627149 PCI: 00:1f.3: enabled 1
1610 14:01:58.630391 PCI: 00:1f.4: enabled 1
1611 14:01:58.633758 PCI: 00:1f.5: enabled 1
1612 14:01:58.636960 PCI: 00:1f.6: enabled 0
1613 14:01:58.637047 USB0 port 0: enabled 1
1614 14:01:58.640190 I2C: 01:15: enabled 1
1615 14:01:58.643338 I2C: 02:5d: enabled 1
1616 14:01:58.643424 GENERIC: 0.0: enabled 1
1617 14:01:58.646854 I2C: 03:1a: enabled 1
1618 14:01:58.650162 I2C: 03:38: enabled 1
1619 14:01:58.650247 I2C: 03:39: enabled 1
1620 14:01:58.653336 I2C: 03:3a: enabled 1
1621 14:01:58.656593 I2C: 03:3b: enabled 1
1622 14:01:58.656679 PCI: 00:00.0: enabled 1
1623 14:01:58.659956 SPI: 00: enabled 1
1624 14:01:58.663185 SPI: 01: enabled 1
1625 14:01:58.663278 PNP: 0c09.0: enabled 1
1626 14:01:58.666508 USB2 port 0: enabled 1
1627 14:01:58.669765 USB2 port 1: enabled 1
1628 14:01:58.673127 USB2 port 2: enabled 0
1629 14:01:58.673207 USB2 port 3: enabled 0
1630 14:01:58.676350 USB2 port 5: enabled 0
1631 14:01:58.679636 USB2 port 6: enabled 1
1632 14:01:58.679724 USB2 port 9: enabled 1
1633 14:01:58.682877 USB3 port 0: enabled 1
1634 14:01:58.686051 USB3 port 1: enabled 1
1635 14:01:58.686132 USB3 port 2: enabled 1
1636 14:01:58.689450 USB3 port 3: enabled 1
1637 14:01:58.692530 USB3 port 4: enabled 0
1638 14:01:58.695947 APIC: 03: enabled 1
1639 14:01:58.696033 APIC: 01: enabled 1
1640 14:01:58.699194 APIC: 07: enabled 1
1641 14:01:58.699279 APIC: 02: enabled 1
1642 14:01:58.702352 APIC: 05: enabled 1
1643 14:01:58.705843 APIC: 06: enabled 1
1644 14:01:58.705936 APIC: 04: enabled 1
1645 14:01:58.708942 PCI: 00:08.0: enabled 1
1646 14:01:58.712448 PCI: 00:14.2: enabled 1
1647 14:01:58.715447 PCI: 01:00.0: enabled 1
1648 14:01:58.718873 Disabling ACPI via APMC:
1649 14:01:58.718959 done.
1650 14:01:58.725608 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 14:01:58.728835 ELOG: NV offset 0xaf0000 size 0x4000
1652 14:01:58.735443 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 14:01:58.741921 ELOG: Event(17) added with size 13 at 2022-08-03 13:11:37 UTC
1654 14:01:58.748475 ELOG: Event(92) added with size 9 at 2022-08-03 13:11:37 UTC
1655 14:01:58.755138 ELOG: Event(93) added with size 9 at 2022-08-03 13:11:37 UTC
1656 14:01:58.761589 ELOG: Event(9A) added with size 9 at 2022-08-03 13:11:37 UTC
1657 14:01:58.767963 ELOG: Event(9E) added with size 10 at 2022-08-03 13:11:37 UTC
1658 14:01:58.774730 ELOG: Event(9F) added with size 14 at 2022-08-03 13:11:37 UTC
1659 14:01:58.780933 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1660 14:01:58.787801 ELOG: Event(A1) added with size 10 at 2022-08-03 13:11:37 UTC
1661 14:01:58.793981 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 14:01:58.800566 ELOG: Event(A0) added with size 9 at 2022-08-03 13:11:37 UTC
1663 14:01:58.803800 elog_add_boot_reason: Logged dev mode boot
1664 14:01:58.806997 Finalize devices...
1665 14:01:58.810419 PCI: 00:17.0 final
1666 14:01:58.810512 Devices finalized
1667 14:01:58.816927 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 14:01:58.820195 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 14:01:58.826835 ME: HFSTS1 : 0x90000245
1670 14:01:58.830098 ME: HFSTS2 : 0x3B850126
1671 14:01:58.833260 ME: HFSTS3 : 0x00000020
1672 14:01:58.836447 ME: HFSTS4 : 0x00004800
1673 14:01:58.842916 ME: HFSTS5 : 0x00000000
1674 14:01:58.846294 ME: HFSTS6 : 0x40400006
1675 14:01:58.849836 ME: Manufacturing Mode : NO
1676 14:01:58.852823 ME: FW Partition Table : OK
1677 14:01:58.856121 ME: Bringup Loader Failure : NO
1678 14:01:58.859373 ME: Firmware Init Complete : YES
1679 14:01:58.862873 ME: Boot Options Present : NO
1680 14:01:58.865977 ME: Update In Progress : NO
1681 14:01:58.869102 ME: D0i3 Support : YES
1682 14:01:58.872767 ME: Low Power State Enabled : NO
1683 14:01:58.875940 ME: CPU Replaced : NO
1684 14:01:58.879141 ME: CPU Replacement Valid : YES
1685 14:01:58.882345 ME: Current Working State : 5
1686 14:01:58.885474 ME: Current Operation State : 1
1687 14:01:58.888754 ME: Current Operation Mode : 0
1688 14:01:58.892309 ME: Error Code : 0
1689 14:01:58.895375 ME: CPU Debug Disabled : YES
1690 14:01:58.898728 ME: TXT Support : NO
1691 14:01:58.905430 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 14:01:58.908538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 14:01:58.911817 CBFS @ c08000 size 3f8000
1694 14:01:58.918300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 14:01:58.921395 CBFS: Locating 'fallback/dsdt.aml'
1696 14:01:58.924818 CBFS: Found @ offset 10bb80 size 3fa5
1697 14:01:58.931262 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 14:01:58.934505 CBFS @ c08000 size 3f8000
1699 14:01:58.937857 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 14:01:58.941005 CBFS: Locating 'fallback/slic'
1701 14:01:58.949258 CBFS: 'fallback/slic' not found.
1702 14:01:58.952576 ACPI: Writing ACPI tables at 99b3e000.
1703 14:01:58.952661 ACPI: * FACS
1704 14:01:58.955763 ACPI: * DSDT
1705 14:01:58.959146 Ramoops buffer: 0x100000@0x99a3d000.
1706 14:01:58.962424 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 14:01:58.968877 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 14:01:58.971958 Google Chrome EC: version:
1709 14:01:58.975240 ro: helios_v2.0.2659-56403530b
1710 14:01:58.978481 rw: helios_v2.0.2849-c41de27e7d
1711 14:01:58.978566 running image: 1
1712 14:01:58.983193 ACPI: * FADT
1713 14:01:58.983278 SCI is IRQ9
1714 14:01:58.989878 ACPI: added table 1/32, length now 40
1715 14:01:58.989962 ACPI: * SSDT
1716 14:01:58.993177 Found 1 CPU(s) with 8 core(s) each.
1717 14:01:58.996551 Error: Could not locate 'wifi_sar' in VPD.
1718 14:01:59.002900 Checking CBFS for default SAR values
1719 14:01:59.006251 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 14:01:59.009699 CBFS @ c08000 size 3f8000
1721 14:01:59.016074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 14:01:59.019422 CBFS: Locating 'wifi_sar_defaults.hex'
1723 14:01:59.022485 CBFS: Found @ offset 5fac0 size 77
1724 14:01:59.025850 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 14:01:59.032583 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 14:01:59.035720 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 14:01:59.042214 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 14:01:59.045530 failed to find key in VPD: dsm_calib_r0_0
1729 14:01:59.055445 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 14:01:59.061877 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 14:01:59.065355 failed to find key in VPD: dsm_calib_r0_1
1732 14:01:59.071653 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 14:01:59.078221 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 14:01:59.081348 failed to find key in VPD: dsm_calib_r0_2
1735 14:01:59.091224 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 14:01:59.097766 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 14:01:59.101045 failed to find key in VPD: dsm_calib_r0_3
1738 14:01:59.110719 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 14:01:59.114062 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 14:01:59.120513 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 14:01:59.124112 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 14:01:59.127640 EC returned error result code 1
1743 14:01:59.130846 EC returned error result code 1
1744 14:01:59.133903 EC returned error result code 1
1745 14:01:59.140674 PS2K: Bad resp from EC. Vivaldi disabled!
1746 14:01:59.143887 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 14:01:59.150518 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 14:01:59.157182 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 14:01:59.160320 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 14:01:59.166800 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 14:01:59.173112 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 14:01:59.180264 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 14:01:59.186380 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 14:01:59.189527 ACPI: added table 2/32, length now 44
1755 14:01:59.189607 ACPI: * MCFG
1756 14:01:59.192875 ACPI: added table 3/32, length now 48
1757 14:01:59.195946 ACPI: * TPM2
1758 14:01:59.199358 TPM2 log created at 99a2d000
1759 14:01:59.202556 ACPI: added table 4/32, length now 52
1760 14:01:59.202652 ACPI: * MADT
1761 14:01:59.205840 SCI is IRQ9
1762 14:01:59.208910 ACPI: added table 5/32, length now 56
1763 14:01:59.212243 current = 99b43ac0
1764 14:01:59.212315 ACPI: * DMAR
1765 14:01:59.215566 ACPI: added table 6/32, length now 60
1766 14:01:59.218804 ACPI: * IGD OpRegion
1767 14:01:59.222095 GMA: Found VBT in CBFS
1768 14:01:59.225241 GMA: Found valid VBT in CBFS
1769 14:01:59.228439 ACPI: added table 7/32, length now 64
1770 14:01:59.228513 ACPI: * HPET
1771 14:01:59.231788 ACPI: added table 8/32, length now 68
1772 14:01:59.235216 ACPI: done.
1773 14:01:59.238434 ACPI tables: 31744 bytes.
1774 14:01:59.241839 smbios_write_tables: 99a2c000
1775 14:01:59.244884 EC returned error result code 3
1776 14:01:59.248295 Couldn't obtain OEM name from CBI
1777 14:01:59.251533 Create SMBIOS type 17
1778 14:01:59.254849 PCI: 00:00.0 (Intel Cannonlake)
1779 14:01:59.254926 PCI: 00:14.3 (Intel WiFi)
1780 14:01:59.258127 SMBIOS tables: 939 bytes.
1781 14:01:59.264568 Writing table forward entry at 0x00000500
1782 14:01:59.267659 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 14:01:59.274172 Writing coreboot table at 0x99b62000
1784 14:01:59.277515 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 14:01:59.284225 1. 0000000000001000-000000000009ffff: RAM
1786 14:01:59.287415 2. 00000000000a0000-00000000000fffff: RESERVED
1787 14:01:59.290637 3. 0000000000100000-0000000099a2bfff: RAM
1788 14:01:59.297081 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 14:01:59.303743 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 14:01:59.310185 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 14:01:59.313409 7. 000000009a000000-000000009f7fffff: RESERVED
1792 14:01:59.316816 8. 00000000e0000000-00000000efffffff: RESERVED
1793 14:01:59.323168 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 14:01:59.326544 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 14:01:59.333199 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 14:01:59.336393 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 14:01:59.342983 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 14:01:59.346245 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 14:01:59.352624 15. 0000000100000000-000000045e7fffff: RAM
1800 14:01:59.355762 Graphics framebuffer located at 0xc0000000
1801 14:01:59.359054 Passing 5 GPIOs to payload:
1802 14:01:59.362456 NAME | PORT | POLARITY | VALUE
1803 14:01:59.369030 write protect | undefined | high | low
1804 14:01:59.375325 lid | undefined | high | high
1805 14:01:59.378885 power | undefined | high | low
1806 14:01:59.385364 oprom | undefined | high | low
1807 14:01:59.388457 EC in RW | 0x000000cb | high | low
1808 14:01:59.391733 Board ID: 4
1809 14:01:59.395098 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 14:01:59.398396 CBFS @ c08000 size 3f8000
1811 14:01:59.405060 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 14:01:59.411490 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum 9a04
1813 14:01:59.414837 coreboot table: 1452 bytes.
1814 14:01:59.417979 IMD ROOT 0. 99fff000 00001000
1815 14:01:59.421250 IMD SMALL 1. 99ffe000 00001000
1816 14:01:59.424515 FSP MEMORY 2. 99c4e000 003b0000
1817 14:01:59.427750 CONSOLE 3. 99c2e000 00020000
1818 14:01:59.431254 FMAP 4. 99c2d000 0000054e
1819 14:01:59.434539 TIME STAMP 5. 99c2c000 00000910
1820 14:01:59.437592 VBOOT WORK 6. 99c18000 00014000
1821 14:01:59.440904 MRC DATA 7. 99c16000 00001958
1822 14:01:59.444181 ROMSTG STCK 8. 99c15000 00001000
1823 14:01:59.447351 AFTER CAR 9. 99c0b000 0000a000
1824 14:01:59.450520 RAMSTAGE 10. 99baf000 0005c000
1825 14:01:59.453897 REFCODE 11. 99b7a000 00035000
1826 14:01:59.457130 SMM BACKUP 12. 99b6a000 00010000
1827 14:01:59.460485 COREBOOT 13. 99b62000 00008000
1828 14:01:59.463802 ACPI 14. 99b3e000 00024000
1829 14:01:59.466855 ACPI GNVS 15. 99b3d000 00001000
1830 14:01:59.470092 RAMOOPS 16. 99a3d000 00100000
1831 14:01:59.473407 TPM2 TCGLOG17. 99a2d000 00010000
1832 14:01:59.476728 SMBIOS 18. 99a2c000 00000800
1833 14:01:59.480066 IMD small region:
1834 14:01:59.483362 IMD ROOT 0. 99ffec00 00000400
1835 14:01:59.486679 FSP RUNTIME 1. 99ffebe0 00000004
1836 14:01:59.489645 EC HOSTEVENT 2. 99ffebc0 00000008
1837 14:01:59.492957 POWER STATE 3. 99ffeb80 00000040
1838 14:01:59.496319 ROMSTAGE 4. 99ffeb60 00000004
1839 14:01:59.499514 MEM INFO 5. 99ffe9a0 000001b9
1840 14:01:59.502804 MTRR: Physical address space:
1841 14:01:59.509317 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1842 14:01:59.515816 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1843 14:01:59.522571 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1844 14:01:59.529239 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1845 14:01:59.532172 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1846 14:01:59.538918 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1847 14:01:59.545336 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1848 14:01:59.551971 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 14:01:59.555191 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 14:01:59.558624 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 14:01:59.561932 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 14:01:59.568444 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 14:01:59.571510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 14:01:59.574694 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 14:01:59.577982 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 14:01:59.584798 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 14:01:59.587836 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 14:01:59.591070 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 14:01:59.594469 call enable_fixed_mtrr()
1860 14:01:59.597677 CPU physical address size: 39 bits
1861 14:01:59.600937 MTRR: default type WB/UC MTRR counts: 6/8.
1862 14:01:59.607540 MTRR: WB selected as default type.
1863 14:01:59.610819 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1864 14:01:59.617203 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1865 14:01:59.623907 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1866 14:01:59.630222 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1867 14:01:59.636754 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1868 14:01:59.643343 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1869 14:01:59.649783 MTRR: Fixed MSR 0x250 0x0606060606060606
1870 14:01:59.653066 MTRR: Fixed MSR 0x258 0x0606060606060606
1871 14:01:59.656562 MTRR: Fixed MSR 0x259 0x0000000000000000
1872 14:01:59.659793 MTRR: Fixed MSR 0x268 0x0606060606060606
1873 14:01:59.666165 MTRR: Fixed MSR 0x269 0x0606060606060606
1874 14:01:59.669574 MTRR: Fixed MSR 0x26a 0x0606060606060606
1875 14:01:59.672737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1876 14:01:59.676025 MTRR: Fixed MSR 0x26c 0x0606060606060606
1877 14:01:59.682497 MTRR: Fixed MSR 0x26d 0x0606060606060606
1878 14:01:59.685920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1879 14:01:59.689027 MTRR: Fixed MSR 0x26f 0x0606060606060606
1880 14:01:59.689113
1881 14:01:59.692205 MTRR check
1882 14:01:59.692291 call enable_fixed_mtrr()
1883 14:01:59.695470 Fixed MTRRs : Enabled
1884 14:01:59.698735 Variable MTRRs: Enabled
1885 14:01:59.698815
1886 14:01:59.702182 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 14:01:59.705403 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 14:01:59.711806 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 14:01:59.715290 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 14:01:59.718544 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 14:01:59.721630 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 14:01:59.728093 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 14:01:59.731490 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 14:01:59.734715 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 14:01:59.738100 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 14:01:59.744701 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 14:01:59.747938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 14:01:59.751040 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 14:01:59.757543 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 14:01:59.760850 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 14:01:59.764235 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 14:01:59.767456 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 14:01:59.774078 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 14:01:59.777211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 14:01:59.780680 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 14:01:59.783687 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 14:01:59.790405 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 14:01:59.790480 call enable_fixed_mtrr()
1909 14:01:59.793632 call enable_fixed_mtrr()
1910 14:01:59.800102 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1911 14:01:59.803441 CPU physical address size: 39 bits
1912 14:01:59.809964 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1913 14:01:59.813236 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 14:01:59.816454 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 14:01:59.819711 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 14:01:59.826257 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 14:01:59.829385 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 14:01:59.832854 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 14:01:59.836240 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 14:01:59.842418 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 14:01:59.845855 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 14:01:59.849325 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 14:01:59.852313 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 14:01:59.859094 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 14:01:59.859186 call enable_fixed_mtrr()
1926 14:01:59.865724 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 14:01:59.868913 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 14:01:59.872028 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 14:01:59.875472 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 14:01:59.881849 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 14:01:59.885311 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 14:01:59.888459 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 14:01:59.891901 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 14:01:59.898203 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 14:01:59.901640 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 14:01:59.904957 CPU physical address size: 39 bits
1937 14:01:59.908220 call enable_fixed_mtrr()
1938 14:01:59.911402 CPU physical address size: 39 bits
1939 14:01:59.914690 CBFS @ c08000 size 3f8000
1940 14:01:59.921030 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1941 14:01:59.924353 CPU physical address size: 39 bits
1942 14:01:59.927688 CPU physical address size: 39 bits
1943 14:01:59.930921 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:01:59.934078 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:01:59.937363 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:01:59.943863 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:01:59.947168 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:01:59.950341 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:01:59.953662 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:01:59.960106 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:01:59.963496 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:01:59.966566 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:01:59.970015 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:01:59.976353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:01:59.979757 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 14:01:59.983040 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 14:01:59.989525 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 14:01:59.992903 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 14:01:59.996163 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 14:01:59.999262 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 14:02:00.005776 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 14:02:00.009170 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 14:02:00.012370 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 14:02:00.015772 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 14:02:00.018916 call enable_fixed_mtrr()
1966 14:02:00.022053 CBFS: Locating 'fallback/payload'
1967 14:02:00.025411 call enable_fixed_mtrr()
1968 14:02:00.028679 CBFS: Found @ offset 1c96c0 size 3f798
1969 14:02:00.031994 CPU physical address size: 39 bits
1970 14:02:00.035402 CPU physical address size: 39 bits
1971 14:02:00.042137 Checking segment from ROM address 0xffdd16f8
1972 14:02:00.045196 Checking segment from ROM address 0xffdd1714
1973 14:02:00.048546 Loading segment from ROM address 0xffdd16f8
1974 14:02:00.051950 code (compression=0)
1975 14:02:00.061753 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1976 14:02:00.067982 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1977 14:02:00.071256 it's not compressed!
1978 14:02:00.163864 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1979 14:02:00.170356 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1980 14:02:00.176819 Loading segment from ROM address 0xffdd1714
1981 14:02:00.176908 Entry Point 0x30000000
1982 14:02:00.180213 Loaded segments
1983 14:02:00.186076 Finalizing chipset.
1984 14:02:00.189155 Finalizing SMM.
1985 14:02:00.192545 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1986 14:02:00.195684 mp_park_aps done after 0 msecs.
1987 14:02:00.202244 Jumping to boot code at 30000000(99b62000)
1988 14:02:00.208970 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1989 14:02:00.209059
1990 14:02:00.212138 Starting depthcharge on Helios...
1991 14:02:00.212493 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1992 14:02:00.212623 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1993 14:02:00.212726 Setting prompt string to ['hatch:']
1994 14:02:00.212823 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1995 14:02:00.222134 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1996 14:02:00.228498 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1997 14:02:00.235169 board_setup: Info: eMMC controller not present; skipping
1998 14:02:00.238374 New NVMe Controller 0x30053ac0 @ 00:1d:00
1999 14:02:00.244840 board_setup: Info: SDHCI controller not present; skipping
2000 14:02:00.251363 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2001 14:02:00.251447 Wipe memory regions:
2002 14:02:00.258168 [0x00000000001000, 0x000000000a0000)
2003 14:02:00.261136 [0x00000000100000, 0x00000030000000)
2004 14:02:00.326725 [0x00000030657430, 0x00000099a2c000)
2005 14:02:00.467307 [0x00000100000000, 0x0000045e800000)
2006 14:02:01.849395 R8152: Initializing
2007 14:02:01.852549 Version 9 (ocp_data = 6010)
2008 14:02:01.856898 R8152: Done initializing
2009 14:02:01.860112 Adding net device
2010 14:02:02.356680 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2011 14:02:02.356820
2012 14:02:02.357105 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2014 14:02:02.457843 hatch: tftpboot 192.168.201.1 6961078/tftp-deploy-ehvcijsv/kernel/bzImage 6961078/tftp-deploy-ehvcijsv/kernel/cmdline 6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
2015 14:02:02.458020 Setting prompt string to 'Starting kernel'
2016 14:02:02.458093 Setting prompt string to ['Starting kernel']
2017 14:02:02.458161 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2018 14:02:02.458232 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2019 14:02:02.461765 tftpboot 192.168.201.1 6961078/tftp-deploy-ehvcijsv/kernel/bzImoy-ehvcijsv/kernel/cmdline 6961078/tftp-deploy-ehvcijsv/ramdisk/ramdisk.cpio.gz
2020 14:02:02.461853 Waiting for link
2021 14:02:02.662871 done.
2022 14:02:02.663019 MAC: 88:54:1f:0f:6e:7d
2023 14:02:02.666011 Sending DHCP discover... done.
2024 14:02:02.669551 Waiting for reply... done.
2025 14:02:02.672669 Sending DHCP request... done.
2026 14:02:02.675893 Waiting for reply... done.
2027 14:02:02.679314 My ip is 192.168.201.104
2028 14:02:02.682548 The DHCP server ip is 192.168.201.1
2029 14:02:02.689057 TFTP server IP predefined by user: 192.168.201.1
2030 14:02:02.695460 Bootfile predefined by user: 6961078/tftp-deploy-ehvcijsv/kernel/bzImage
2031 14:02:02.698980 Sending tftp read request... done.
2032 14:02:02.702012 Waiting for the transfer...
2033 14:02:02.941419 00000000 ################################################################
2034 14:02:03.173630 00080000 ################################################################
2035 14:02:03.408525 00100000 ################################################################
2036 14:02:03.657127 00180000 ################################################################
2037 14:02:03.898864 00200000 ################################################################
2038 14:02:04.136709 00280000 ################################################################
2039 14:02:04.381169 00300000 ################################################################
2040 14:02:04.628048 00380000 ################################################################
2041 14:02:04.881519 00400000 ################################################################
2042 14:02:05.129015 00480000 ################################################################
2043 14:02:05.377858 00500000 ################################################################
2044 14:02:05.631863 00580000 ################################################################
2045 14:02:05.884173 00600000 ################################################################ done.
2046 14:02:05.887708 The bootfile was 6815632 bytes long.
2047 14:02:05.891164 Sending tftp read request... done.
2048 14:02:05.894037 Waiting for the transfer...
2049 14:02:06.138549 00000000 ################################################################
2050 14:02:06.376753 00080000 ################################################################
2051 14:02:06.615185 00100000 ################################################################
2052 14:02:06.905023 00180000 ################################################################
2053 14:02:07.176078 00200000 ################################################################
2054 14:02:07.462460 00280000 ################################################################
2055 14:02:07.775277 00300000 ################################################################
2056 14:02:08.092651 00380000 ################################################################
2057 14:02:08.414576 00400000 ################################################################
2058 14:02:08.736024 00480000 ################################################################
2059 14:02:08.881084 00500000 ############################## done.
2060 14:02:08.884422 Sending tftp read request... done.
2061 14:02:08.887962 Waiting for the transfer...
2062 14:02:08.891503 00000000 # done.
2063 14:02:08.901242 Command line loaded dynamically from TFTP file: 6961078/tftp-deploy-ehvcijsv/kernel/cmdline
2064 14:02:08.923892 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6961078/extract-nfsrootfs-j9p7nsza,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2065 14:02:08.927128 ec_init(0): CrosEC protocol v3 supported (256, 256)
2066 14:02:08.936387 Shutting down all USB controllers.
2067 14:02:08.936805 Removing current net device
2068 14:02:08.944356 Finalizing coreboot
2069 14:02:08.950768 Exiting depthcharge with code 4 at timestamp: 16015998
2070 14:02:08.951350
2071 14:02:08.951768 Starting kernel ...
2072 14:02:08.952134
2073 14:02:08.952533
2074 14:02:08.953418 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2075 14:02:08.954100 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2076 14:02:08.954633 Setting prompt string to ['Linux version [0-9]']
2077 14:02:08.955066 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2078 14:02:08.955504 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2080 14:06:40.954287 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2082 14:06:40.954508 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2084 14:06:40.954673 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2087 14:06:40.954944 end: 2 depthcharge-action (duration 00:05:00) [common]
2089 14:06:40.955150 Cleaning after the job
2090 14:06:40.955241 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/ramdisk
2091 14:06:40.955743 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/kernel
2092 14:06:40.956316 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/nfsrootfs
2093 14:06:41.004783 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961078/tftp-deploy-ehvcijsv/modules
2094 14:06:41.005094 start: 4.1 power-off (timeout 00:00:30) [common]
2095 14:06:41.005257 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2096 14:06:41.024480 >> Command sent successfully.
2097 14:06:41.026373 Returned 0 in 0 seconds
2098 14:06:41.127503 end: 4.1 power-off (duration 00:00:00) [common]
2100 14:06:41.129082 start: 4.2 read-feedback (timeout 00:10:00) [common]
2101 14:06:41.130263 Listened to connection for namespace 'common' for up to 1s
2102 14:06:42.135083 Finalising connection for namespace 'common'
2103 14:06:42.135805 Disconnecting from shell: Finalise
2104 14:06:42.236928 end: 4.2 read-feedback (duration 00:00:01) [common]
2105 14:06:42.237077 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6961078
2106 14:06:42.388940 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6961078
2107 14:06:42.389137 JobError: Your job cannot terminate cleanly.