Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:01:04.942887 lava-dispatcher, installed at version: 2022.06
2 14:01:04.943091 start: 0 validate
3 14:01:04.943234 Start time: 2022-08-03 14:01:04.943226+00:00 (UTC)
4 14:01:04.943375 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:01:04.943519 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 14:01:05.225917 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:01:05.226104 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:01:05.516826 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:01:05.517635 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:01:05.807723 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:01:05.808361 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:01:06.109565 validate duration: 1.17
14 14:01:06.109850 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:01:06.109955 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:01:06.110047 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:01:06.110150 Not decompressing ramdisk as can be used compressed.
18 14:01:06.110237 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 14:01:06.110308 saving as /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/ramdisk/initrd.cpio.gz
20 14:01:06.110371 total size: 5411064 (5MB)
21 14:01:06.111539 progress 0% (0MB)
22 14:01:06.113230 progress 5% (0MB)
23 14:01:06.114823 progress 10% (0MB)
24 14:01:06.116353 progress 15% (0MB)
25 14:01:06.117983 progress 20% (1MB)
26 14:01:06.119426 progress 25% (1MB)
27 14:01:06.120877 progress 30% (1MB)
28 14:01:06.122329 progress 35% (1MB)
29 14:01:06.123934 progress 40% (2MB)
30 14:01:06.125377 progress 45% (2MB)
31 14:01:06.126811 progress 50% (2MB)
32 14:01:06.128254 progress 55% (2MB)
33 14:01:06.129863 progress 60% (3MB)
34 14:01:06.131311 progress 65% (3MB)
35 14:01:06.132795 progress 70% (3MB)
36 14:01:06.134263 progress 75% (3MB)
37 14:01:06.135877 progress 80% (4MB)
38 14:01:06.137363 progress 85% (4MB)
39 14:01:06.138807 progress 90% (4MB)
40 14:01:06.140227 progress 95% (4MB)
41 14:01:06.141850 progress 100% (5MB)
42 14:01:06.142040 5MB downloaded in 0.03s (162.97MB/s)
43 14:01:06.142202 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:01:06.142471 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:01:06.142568 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:01:06.142663 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:01:06.142807 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:01:06.142882 saving as /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/kernel/bzImage
50 14:01:06.142950 total size: 6815632 (6MB)
51 14:01:06.143016 No compression specified
52 14:01:07.644501 progress 0% (0MB)
53 14:01:07.646475 progress 5% (0MB)
54 14:01:07.648272 progress 10% (0MB)
55 14:01:07.650282 progress 15% (1MB)
56 14:01:07.652043 progress 20% (1MB)
57 14:01:07.653931 progress 25% (1MB)
58 14:01:07.655861 progress 30% (1MB)
59 14:01:07.657660 progress 35% (2MB)
60 14:01:07.659678 progress 40% (2MB)
61 14:01:07.661464 progress 45% (2MB)
62 14:01:07.663196 progress 50% (3MB)
63 14:01:07.665140 progress 55% (3MB)
64 14:01:07.666905 progress 60% (3MB)
65 14:01:07.668794 progress 65% (4MB)
66 14:01:07.670556 progress 70% (4MB)
67 14:01:07.672283 progress 75% (4MB)
68 14:01:07.674211 progress 80% (5MB)
69 14:01:07.675938 progress 85% (5MB)
70 14:01:07.677867 progress 90% (5MB)
71 14:01:07.679623 progress 95% (6MB)
72 14:01:07.681446 progress 100% (6MB)
73 14:01:07.681751 6MB downloaded in 1.54s (4.22MB/s)
74 14:01:07.681913 end: 1.2.1 http-download (duration 00:00:02) [common]
76 14:01:07.682173 end: 1.2 download-retry (duration 00:00:02) [common]
77 14:01:07.682272 start: 1.3 download-retry (timeout 00:09:58) [common]
78 14:01:07.682366 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 14:01:07.682485 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 14:01:07.682558 saving as /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/nfsrootfs/full.rootfs.tar
81 14:01:07.682625 total size: 122624016 (116MB)
82 14:01:07.682693 Using unxz to decompress xz
83 14:01:07.686365 progress 0% (0MB)
84 14:01:08.168530 progress 5% (5MB)
85 14:01:08.656866 progress 10% (11MB)
86 14:01:09.150079 progress 15% (17MB)
87 14:01:09.651862 progress 20% (23MB)
88 14:01:09.998513 progress 25% (29MB)
89 14:01:10.367615 progress 30% (35MB)
90 14:01:10.632033 progress 35% (40MB)
91 14:01:10.859196 progress 40% (46MB)
92 14:01:11.239972 progress 45% (52MB)
93 14:01:11.632788 progress 50% (58MB)
94 14:01:12.000528 progress 55% (64MB)
95 14:01:12.380208 progress 60% (70MB)
96 14:01:12.739820 progress 65% (76MB)
97 14:01:13.150509 progress 70% (81MB)
98 14:01:13.596564 progress 75% (87MB)
99 14:01:14.043085 progress 80% (93MB)
100 14:01:14.171732 progress 85% (99MB)
101 14:01:14.355509 progress 90% (105MB)
102 14:01:14.714420 progress 95% (111MB)
103 14:01:15.113243 progress 100% (116MB)
104 14:01:15.118786 116MB downloaded in 7.44s (15.73MB/s)
105 14:01:15.119071 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:01:15.119367 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:01:15.119470 start: 1.4 download-retry (timeout 00:09:51) [common]
109 14:01:15.119567 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 14:01:15.119695 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:01:15.119774 saving as /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/modules/modules.tar
112 14:01:15.119843 total size: 54904 (0MB)
113 14:01:15.119911 Using unxz to decompress xz
114 14:01:15.123287 progress 59% (0MB)
115 14:01:15.123697 progress 100% (0MB)
116 14:01:15.127483 0MB downloaded in 0.01s (6.86MB/s)
117 14:01:15.127719 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:01:15.128009 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:01:15.128117 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 14:01:15.128225 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 14:01:16.963287 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6961091/extract-nfsrootfs-50yew0ly
123 14:01:16.963505 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 14:01:16.963623 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 14:01:16.963775 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3
126 14:01:16.963887 makedir: /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin
127 14:01:16.963982 makedir: /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/tests
128 14:01:16.964074 makedir: /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/results
129 14:01:16.964183 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-add-keys
130 14:01:16.964326 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-add-sources
131 14:01:16.964458 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-background-process-start
132 14:01:16.964586 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-background-process-stop
133 14:01:16.964711 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-common-functions
134 14:01:16.964836 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-echo-ipv4
135 14:01:16.964964 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-install-packages
136 14:01:16.965091 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-installed-packages
137 14:01:16.965215 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-os-build
138 14:01:16.965338 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-probe-channel
139 14:01:16.965460 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-probe-ip
140 14:01:16.965582 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-target-ip
141 14:01:16.965705 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-target-mac
142 14:01:16.965826 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-target-storage
143 14:01:16.965952 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-case
144 14:01:16.966076 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-event
145 14:01:16.966198 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-feedback
146 14:01:16.966320 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-raise
147 14:01:16.966443 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-reference
148 14:01:16.966564 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-runner
149 14:01:16.966686 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-set
150 14:01:16.966807 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-test-shell
151 14:01:16.966930 Updating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-install-packages (oe)
152 14:01:16.967057 Updating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/bin/lava-installed-packages (oe)
153 14:01:16.967166 Creating /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/environment
154 14:01:16.967261 LAVA metadata
155 14:01:16.967336 - LAVA_JOB_ID=6961091
156 14:01:16.967408 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:01:16.967517 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 14:01:16.967591 skipped lava-vland-overlay
159 14:01:16.967678 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:01:16.967770 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 14:01:16.967840 skipped lava-multinode-overlay
162 14:01:16.967925 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:01:16.968017 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 14:01:16.968098 Loading test definitions
165 14:01:16.968199 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
166 14:01:16.968290 Using /lava-6961091 at stage 0
167 14:01:16.968400 Fetching tests from https://github.com/kernelci/test-definitions
168 14:01:16.968491 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/0/tests/0_ltp-timers'
169 14:01:25.552932 Running '/usr/bin/git checkout kernelci.org
170 14:01:25.700217 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 14:01:25.700959 uuid=6961091_1.5.2.3.1 testdef=None
172 14:01:25.701181 end: 1.5.2.3.1 git-repo-action (duration 00:00:09) [common]
174 14:01:25.701464 start: 1.5.2.3.2 test-overlay (timeout 00:09:40) [common]
175 14:01:25.702200 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 14:01:25.702472 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:40) [common]
178 14:01:25.703360 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 14:01:25.703636 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:40) [common]
181 14:01:25.704485 runner path: /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/0/tests/0_ltp-timers test_uuid 6961091_1.5.2.3.1
182 14:01:25.704587 GRP_TEST='TMR'
183 14:01:25.704665 SKIPFILE='skipfile-lkft.yaml'
184 14:01:25.704740 SKIP_INSTALL='true'
185 14:01:25.704812 TST_CMDFILES=''
186 14:01:25.704966 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 14:01:25.705307 Creating lava-test-runner.conf files
189 14:01:25.705387 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961091/lava-overlay-v77gxud3/lava-6961091/0 for stage 0
190 14:01:25.705487 - 0_ltp-timers
191 14:01:25.705601 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
192 14:01:25.705703 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
193 14:01:33.498051 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
194 14:01:33.498231 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
195 14:01:33.498339 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 14:01:33.498456 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
197 14:01:33.498560 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
198 14:01:33.611710 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 14:01:33.612095 start: 1.5.4 extract-modules (timeout 00:09:32) [common]
200 14:01:33.612218 extracting modules file /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961091/extract-nfsrootfs-50yew0ly
201 14:01:33.616862 extracting modules file /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961091/extract-overlay-ramdisk-c1hj5u0y/ramdisk
202 14:01:33.621072 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 14:01:33.621228 start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
204 14:01:33.621319 [common] Applying overlay to NFS
205 14:01:33.621398 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6961091/compress-overlay-gvq73kmn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6961091/extract-nfsrootfs-50yew0ly
206 14:01:34.108715 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 14:01:34.108885 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
208 14:01:34.108992 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 14:01:34.109099 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
210 14:01:34.109191 Building ramdisk /var/lib/lava/dispatcher/tmp/6961091/extract-overlay-ramdisk-c1hj5u0y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6961091/extract-overlay-ramdisk-c1hj5u0y/ramdisk
211 14:01:34.145672 >> 24470 blocks
212 14:01:34.654830 rename /var/lib/lava/dispatcher/tmp/6961091/extract-overlay-ramdisk-c1hj5u0y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
213 14:01:34.655258 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 14:01:34.655395 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
215 14:01:34.655538 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
216 14:01:34.655641 No mkimage arch provided, not using FIT.
217 14:01:34.655743 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 14:01:34.655836 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 14:01:34.655944 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
220 14:01:34.656044 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
221 14:01:34.656132 No LXC device requested
222 14:01:34.656224 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 14:01:34.656320 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
224 14:01:34.656409 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 14:01:34.656484 Checking files for TFTP limit of 4294967296 bytes.
226 14:01:34.656925 end: 1 tftp-deploy (duration 00:00:29) [common]
227 14:01:34.657038 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 14:01:34.657184 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 14:01:34.657323 substitutions:
230 14:01:34.657399 - {DTB}: None
231 14:01:34.657469 - {INITRD}: 6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
232 14:01:34.657536 - {KERNEL}: 6961091/tftp-deploy-fdjj5b8x/kernel/bzImage
233 14:01:34.657600 - {LAVA_MAC}: None
234 14:01:34.657663 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6961091/extract-nfsrootfs-50yew0ly
235 14:01:34.657728 - {NFS_SERVER_IP}: 192.168.201.1
236 14:01:34.657790 - {PRESEED_CONFIG}: None
237 14:01:34.657851 - {PRESEED_LOCAL}: None
238 14:01:34.657912 - {RAMDISK}: 6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
239 14:01:34.657972 - {ROOT_PART}: None
240 14:01:34.658033 - {ROOT}: None
241 14:01:34.658093 - {SERVER_IP}: 192.168.201.1
242 14:01:34.658153 - {TEE}: None
243 14:01:34.658215 Parsed boot commands:
244 14:01:34.658274 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 14:01:34.658441 Parsed boot commands: tftpboot 192.168.201.1 6961091/tftp-deploy-fdjj5b8x/kernel/bzImage 6961091/tftp-deploy-fdjj5b8x/kernel/cmdline 6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
246 14:01:34.658545 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 14:01:34.658670 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 14:01:34.658794 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 14:01:34.658906 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 14:01:34.658982 Not connected, no need to disconnect.
251 14:01:34.659068 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 14:01:34.659158 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 14:01:34.659234 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
254 14:01:34.662196 Setting prompt string to ['lava-test: # ']
255 14:01:34.662511 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 14:01:34.662627 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 14:01:34.662736 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 14:01:34.662834 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 14:01:34.663045 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
260 14:01:34.684351 >> Command sent successfully.
261 14:01:34.686371 Returned 0 in 0 seconds
262 14:01:34.787554 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 14:01:34.788858 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 14:01:34.789328 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 14:01:34.789716 Setting prompt string to 'Starting depthcharge on Helios...'
267 14:01:34.790014 Changing prompt to 'Starting depthcharge on Helios...'
268 14:01:34.790336 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 14:01:34.791406 [Enter `^Ec?' for help]
270 14:01:41.041262
271 14:01:41.041874
272 14:01:41.051321 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 14:01:41.055032 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 14:01:41.061303 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 14:01:41.064371 CPU: AES supported, TXT NOT supported, VT supported
276 14:01:41.071152 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 14:01:41.074527 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 14:01:41.081172 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 14:01:41.084440 VBOOT: Loading verstage.
280 14:01:41.087864 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 14:01:41.093986 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 14:01:41.100908 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 14:01:41.101631 CBFS @ c08000 size 3f8000
284 14:01:41.107208 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 14:01:41.111152 CBFS: Locating 'fallback/verstage'
286 14:01:41.113699 CBFS: Found @ offset 10fb80 size 1072c
287 14:01:41.118209
288 14:01:41.118660
289 14:01:41.128239 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 14:01:41.142111 Probing TPM: . done!
291 14:01:41.145694 TPM ready after 0 ms
292 14:01:41.149235 Connected to device vid:did:rid of 1ae0:0028:00
293 14:01:41.159675 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 14:01:41.163153 Initialized TPM device CR50 revision 0
295 14:01:41.208347 tlcl_send_startup: Startup return code is 0
296 14:01:41.208907 TPM: setup succeeded
297 14:01:41.222601 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 14:01:41.226756 Chrome EC: UHEPI supported
299 14:01:41.229623 Phase 1
300 14:01:41.232854 FMAP: area GBB found @ c05000 (12288 bytes)
301 14:01:41.239845 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 14:01:41.243284 Phase 2
303 14:01:41.243841 Phase 3
304 14:01:41.246100 FMAP: area GBB found @ c05000 (12288 bytes)
305 14:01:41.252885 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 14:01:41.259703 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 14:01:41.263291 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 14:01:41.269249 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 14:01:41.285592 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 14:01:41.289029 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 14:01:41.295164 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 14:01:41.299415 Phase 4
313 14:01:41.302415 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 14:01:41.312064 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 14:01:41.489241 VB2:vb2_rsa_verify_digest() Digest check failed!
316 14:01:41.495378 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 14:01:41.495935 Saving nvdata
318 14:01:41.498552 Reboot requested (10020007)
319 14:01:41.501954 board_reset() called!
320 14:01:41.502509 full_reset() called!
321 14:01:46.008074
322 14:01:46.008646
323 14:01:46.017574 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 14:01:46.021480 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 14:01:46.027547 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 14:01:46.030825 CPU: AES supported, TXT NOT supported, VT supported
327 14:01:46.037610 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 14:01:46.040863 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 14:01:46.047237 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 14:01:46.050669 VBOOT: Loading verstage.
331 14:01:46.054272 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 14:01:46.060686 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 14:01:46.067489 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 14:01:46.067941 CBFS @ c08000 size 3f8000
335 14:01:46.074087 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 14:01:46.077230 CBFS: Locating 'fallback/verstage'
337 14:01:46.081029 CBFS: Found @ offset 10fb80 size 1072c
338 14:01:46.084989
339 14:01:46.085477
340 14:01:46.094816 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 14:01:46.109447 Probing TPM: . done!
342 14:01:46.112722 TPM ready after 0 ms
343 14:01:46.115795 Connected to device vid:did:rid of 1ae0:0028:00
344 14:01:46.125713 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 14:01:46.129651 Initialized TPM device CR50 revision 0
346 14:01:46.174868 tlcl_send_startup: Startup return code is 0
347 14:01:46.175400 TPM: setup succeeded
348 14:01:46.188970 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 14:01:46.192909 Chrome EC: UHEPI supported
350 14:01:46.196421 Phase 1
351 14:01:46.199412 FMAP: area GBB found @ c05000 (12288 bytes)
352 14:01:46.205912 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 14:01:46.212873 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 14:01:46.216363 Recovery requested (1009000e)
355 14:01:46.221925 Saving nvdata
356 14:01:46.227778 tlcl_extend: response is 0
357 14:01:46.236501 tlcl_extend: response is 0
358 14:01:46.243592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 14:01:46.246984 CBFS @ c08000 size 3f8000
360 14:01:46.253690 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 14:01:46.256892 CBFS: Locating 'fallback/romstage'
362 14:01:46.260364 CBFS: Found @ offset 80 size 145fc
363 14:01:46.263488 Accumulated console time in verstage 98 ms
364 14:01:46.263885
365 14:01:46.264263
366 14:01:46.277119 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 14:01:46.283631 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 14:01:46.286457 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 14:01:46.289820 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 14:01:46.296921 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 14:01:46.299406 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 14:01:46.302834 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 14:01:46.306149 TCO_STS: 0000 0000
374 14:01:46.309736 GEN_PMCON: e0015238 00000200
375 14:01:46.312872 GBLRST_CAUSE: 00000000 00000000
376 14:01:46.313440 prev_sleep_state 5
377 14:01:46.316814 Boot Count incremented to 24361
378 14:01:46.323422 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 14:01:46.327213 CBFS @ c08000 size 3f8000
380 14:01:46.333568 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 14:01:46.334033 CBFS: Locating 'fspm.bin'
382 14:01:46.339886 CBFS: Found @ offset 5ffc0 size 71000
383 14:01:46.343016 Chrome EC: UHEPI supported
384 14:01:46.349624 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 14:01:46.353420 Probing TPM: done!
386 14:01:46.359995 Connected to device vid:did:rid of 1ae0:0028:00
387 14:01:46.370423 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 14:01:46.376749 Initialized TPM device CR50 revision 0
389 14:01:46.386168 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 14:01:46.392976 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 14:01:46.396101 MRC cache found, size 1948
392 14:01:46.399318 bootmode is set to: 2
393 14:01:46.402506 PRMRR disabled by config.
394 14:01:46.406069 SPD INDEX = 1
395 14:01:46.409610 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 14:01:46.412354 CBFS @ c08000 size 3f8000
397 14:01:46.419153 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 14:01:46.419641 CBFS: Locating 'spd.bin'
399 14:01:46.422694 CBFS: Found @ offset 5fb80 size 400
400 14:01:46.425623 SPD: module type is LPDDR3
401 14:01:46.428781 SPD: module part is
402 14:01:46.435503 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 14:01:46.438750 SPD: device width 4 bits, bus width 8 bits
404 14:01:46.441904 SPD: module size is 4096 MB (per channel)
405 14:01:46.445596 memory slot: 0 configuration done.
406 14:01:46.448903 memory slot: 2 configuration done.
407 14:01:46.500903 CBMEM:
408 14:01:46.503796 IMD: root @ 99fff000 254 entries.
409 14:01:46.507323 IMD: root @ 99ffec00 62 entries.
410 14:01:46.510628 External stage cache:
411 14:01:46.514069 IMD: root @ 9abff000 254 entries.
412 14:01:46.517584 IMD: root @ 9abfec00 62 entries.
413 14:01:46.520808 Chrome EC: clear events_b mask to 0x0000000020004000
414 14:01:46.537548 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 14:01:46.549005 tlcl_write: response is 0
416 14:01:46.562400 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 14:01:46.569091 MRC: TPM MRC hash updated successfully.
418 14:01:46.569660 2 DIMMs found
419 14:01:46.572417 SMM Memory Map
420 14:01:46.575855 SMRAM : 0x9a000000 0x1000000
421 14:01:46.578823 Subregion 0: 0x9a000000 0xa00000
422 14:01:46.582317 Subregion 1: 0x9aa00000 0x200000
423 14:01:46.585509 Subregion 2: 0x9ac00000 0x400000
424 14:01:46.588826 top_of_ram = 0x9a000000
425 14:01:46.592741 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 14:01:46.598855 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 14:01:46.602007 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 14:01:46.608684 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 14:01:46.612298 CBFS @ c08000 size 3f8000
430 14:01:46.615054 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 14:01:46.618738 CBFS: Locating 'fallback/postcar'
432 14:01:46.625577 CBFS: Found @ offset 107000 size 4b44
433 14:01:46.628772 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 14:01:46.641160 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 14:01:46.644472 Processing 180 relocs. Offset value of 0x97c0c000
436 14:01:46.652536 Accumulated console time in romstage 286 ms
437 14:01:46.652978
438 14:01:46.653347
439 14:01:46.662643 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 14:01:46.669352 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 14:01:46.672631 CBFS @ c08000 size 3f8000
442 14:01:46.675765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 14:01:46.682173 CBFS: Locating 'fallback/ramstage'
444 14:01:46.685981 CBFS: Found @ offset 43380 size 1b9e8
445 14:01:46.692280 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 14:01:46.724171 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 14:01:46.727998 Processing 3976 relocs. Offset value of 0x98db0000
448 14:01:46.734393 Accumulated console time in postcar 52 ms
449 14:01:46.734890
450 14:01:46.735338
451 14:01:46.744516 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 14:01:46.751059 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 14:01:46.754233 WARNING: RO_VPD is uninitialized or empty.
454 14:01:46.757334 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 14:01:46.764416 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 14:01:46.764878 Normal boot.
457 14:01:46.770964 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 14:01:46.773977 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 14:01:46.777437 CBFS @ c08000 size 3f8000
460 14:01:46.784126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 14:01:46.787255 CBFS: Locating 'cpu_microcode_blob.bin'
462 14:01:46.791227 CBFS: Found @ offset 14700 size 2ec00
463 14:01:46.794064 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 14:01:46.796941 Skip microcode update
465 14:01:46.803860 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 14:01:46.804308 CBFS @ c08000 size 3f8000
467 14:01:46.810788 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 14:01:46.813774 CBFS: Locating 'fsps.bin'
469 14:01:46.817385 CBFS: Found @ offset d1fc0 size 35000
470 14:01:46.842659 Detected 4 core, 8 thread CPU.
471 14:01:46.845736 Setting up SMI for CPU
472 14:01:46.849325 IED base = 0x9ac00000
473 14:01:46.849770 IED size = 0x00400000
474 14:01:46.852409 Will perform SMM setup.
475 14:01:46.858923 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 14:01:46.865363 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 14:01:46.868969 Processing 16 relocs. Offset value of 0x00030000
478 14:01:46.872463 Attempting to start 7 APs
479 14:01:46.875732 Waiting for 10ms after sending INIT.
480 14:01:46.892020 Waiting for 1st SIPI to complete...done.
481 14:01:46.892464 AP: slot 2 apic_id 1.
482 14:01:46.898711 Waiting for 2nd SIPI to complete...done.
483 14:01:46.899157 AP: slot 5 apic_id 5.
484 14:01:46.902496 AP: slot 4 apic_id 4.
485 14:01:46.905767 AP: slot 1 apic_id 2.
486 14:01:46.906207 AP: slot 3 apic_id 3.
487 14:01:46.908720 AP: slot 6 apic_id 6.
488 14:01:46.911908 AP: slot 7 apic_id 7.
489 14:01:46.919114 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 14:01:46.921971 Processing 13 relocs. Offset value of 0x00038000
491 14:01:46.929138 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 14:01:46.935439 Installing SMM handler to 0x9a000000
493 14:01:46.941995 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 14:01:46.945325 Processing 658 relocs. Offset value of 0x9a010000
495 14:01:46.955230 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 14:01:46.958558 Processing 13 relocs. Offset value of 0x9a008000
497 14:01:46.965139 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 14:01:46.971954 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 14:01:46.975077 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 14:01:46.982014 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 14:01:46.988857 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 14:01:46.995080 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 14:01:46.998386 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 14:01:47.004705 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 14:01:47.008276 Clearing SMI status registers
506 14:01:47.011259 SMI_STS: PM1
507 14:01:47.011708 PM1_STS: PWRBTN
508 14:01:47.015130 TCO_STS: SECOND_TO
509 14:01:47.018287 New SMBASE 0x9a000000
510 14:01:47.021582 In relocation handler: CPU 0
511 14:01:47.024836 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 14:01:47.028049 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 14:01:47.031197 Relocation complete.
514 14:01:47.035203 New SMBASE 0x99fff800
515 14:01:47.038000 In relocation handler: CPU 2
516 14:01:47.041222 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
517 14:01:47.044718 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 14:01:47.048136 Relocation complete.
519 14:01:47.051276 New SMBASE 0x99ffe800
520 14:01:47.051722 In relocation handler: CPU 6
521 14:01:47.057788 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
522 14:01:47.061194 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 14:01:47.064848 Relocation complete.
524 14:01:47.065313 New SMBASE 0x99ffe400
525 14:01:47.068059 In relocation handler: CPU 7
526 14:01:47.074583 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
527 14:01:47.078182 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 14:01:47.081478 Relocation complete.
529 14:01:47.081921 New SMBASE 0x99fff400
530 14:01:47.084873 In relocation handler: CPU 3
531 14:01:47.091096 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
532 14:01:47.094530 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 14:01:47.097474 Relocation complete.
534 14:01:47.097919 New SMBASE 0x99fffc00
535 14:01:47.101031 In relocation handler: CPU 1
536 14:01:47.104322 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 14:01:47.111092 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 14:01:47.114128 Relocation complete.
539 14:01:47.114570 New SMBASE 0x99ffec00
540 14:01:47.117867 In relocation handler: CPU 5
541 14:01:47.121178 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
542 14:01:47.127502 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 14:01:47.130679 Relocation complete.
544 14:01:47.131255 New SMBASE 0x99fff000
545 14:01:47.134188 In relocation handler: CPU 4
546 14:01:47.137408 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 14:01:47.144207 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 14:01:47.144650 Relocation complete.
549 14:01:47.147386 Initializing CPU #0
550 14:01:47.150923 CPU: vendor Intel device 806ec
551 14:01:47.154502 CPU: family 06, model 8e, stepping 0c
552 14:01:47.157476 Clearing out pending MCEs
553 14:01:47.160754 Setting up local APIC...
554 14:01:47.161235 apic_id: 0x00 done.
555 14:01:47.164161 Turbo is available but hidden
556 14:01:47.167346 Turbo is available and visible
557 14:01:47.170663 VMX status: enabled
558 14:01:47.173780 IA32_FEATURE_CONTROL status: locked
559 14:01:47.177471 Skip microcode update
560 14:01:47.177916 CPU #0 initialized
561 14:01:47.180455 Initializing CPU #2
562 14:01:47.184011 Initializing CPU #5
563 14:01:47.184452 Initializing CPU #4
564 14:01:47.187633 CPU: vendor Intel device 806ec
565 14:01:47.190512 CPU: family 06, model 8e, stepping 0c
566 14:01:47.193776 CPU: vendor Intel device 806ec
567 14:01:47.197358 CPU: family 06, model 8e, stepping 0c
568 14:01:47.200487 Clearing out pending MCEs
569 14:01:47.204055 Initializing CPU #3
570 14:01:47.204497 Initializing CPU #1
571 14:01:47.207001 CPU: vendor Intel device 806ec
572 14:01:47.214266 CPU: family 06, model 8e, stepping 0c
573 14:01:47.214792 CPU: vendor Intel device 806ec
574 14:01:47.220873 CPU: family 06, model 8e, stepping 0c
575 14:01:47.221473 Clearing out pending MCEs
576 14:01:47.223443 Clearing out pending MCEs
577 14:01:47.226717 Setting up local APIC...
578 14:01:47.229925 Setting up local APIC...
579 14:01:47.233182 Clearing out pending MCEs
580 14:01:47.233627 CPU: vendor Intel device 806ec
581 14:01:47.239830 CPU: family 06, model 8e, stepping 0c
582 14:01:47.240314 Setting up local APIC...
583 14:01:47.243039 apic_id: 0x01 done.
584 14:01:47.246731 Setting up local APIC...
585 14:01:47.247175 Initializing CPU #6
586 14:01:47.249996 Clearing out pending MCEs
587 14:01:47.253184 apic_id: 0x05 done.
588 14:01:47.256562 Setting up local APIC...
589 14:01:47.257004 VMX status: enabled
590 14:01:47.259952 Initializing CPU #7
591 14:01:47.263122 CPU: vendor Intel device 806ec
592 14:01:47.266482 CPU: family 06, model 8e, stepping 0c
593 14:01:47.269673 CPU: vendor Intel device 806ec
594 14:01:47.272905 CPU: family 06, model 8e, stepping 0c
595 14:01:47.276317 Clearing out pending MCEs
596 14:01:47.279527 Clearing out pending MCEs
597 14:01:47.279971 Setting up local APIC...
598 14:01:47.283017 VMX status: enabled
599 14:01:47.286169 apic_id: 0x04 done.
600 14:01:47.289699 IA32_FEATURE_CONTROL status: locked
601 14:01:47.290142 Setting up local APIC...
602 14:01:47.293162 apic_id: 0x02 done.
603 14:01:47.296180 apic_id: 0x03 done.
604 14:01:47.296619 VMX status: enabled
605 14:01:47.299871 VMX status: enabled
606 14:01:47.302924 IA32_FEATURE_CONTROL status: locked
607 14:01:47.306012 IA32_FEATURE_CONTROL status: locked
608 14:01:47.309731 Skip microcode update
609 14:01:47.312798 Skip microcode update
610 14:01:47.313268 CPU #1 initialized
611 14:01:47.316342 CPU #3 initialized
612 14:01:47.316904 VMX status: enabled
613 14:01:47.319425 IA32_FEATURE_CONTROL status: locked
614 14:01:47.326052 IA32_FEATURE_CONTROL status: locked
615 14:01:47.326511 Skip microcode update
616 14:01:47.329327 Skip microcode update
617 14:01:47.329775 CPU #5 initialized
618 14:01:47.332885 CPU #4 initialized
619 14:01:47.335892 apic_id: 0x06 done.
620 14:01:47.336335 apic_id: 0x07 done.
621 14:01:47.339460 VMX status: enabled
622 14:01:47.342675 VMX status: enabled
623 14:01:47.345822 IA32_FEATURE_CONTROL status: locked
624 14:01:47.349312 IA32_FEATURE_CONTROL status: locked
625 14:01:47.349757 Skip microcode update
626 14:01:47.352534 Skip microcode update
627 14:01:47.356280 CPU #6 initialized
628 14:01:47.356720 CPU #7 initialized
629 14:01:47.359109 Skip microcode update
630 14:01:47.362623 CPU #2 initialized
631 14:01:47.366095 bsp_do_flight_plan done after 466 msecs.
632 14:01:47.369099 CPU: frequency set to 4200 MHz
633 14:01:47.369543 Enabling SMIs.
634 14:01:47.372363 Locking SMM.
635 14:01:47.386381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 14:01:47.389534 CBFS @ c08000 size 3f8000
637 14:01:47.395993 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 14:01:47.396439 CBFS: Locating 'vbt.bin'
639 14:01:47.399179 CBFS: Found @ offset 5f5c0 size 499
640 14:01:47.406446 Found a VBT of 4608 bytes after decompression
641 14:01:47.590213 Display FSP Version Info HOB
642 14:01:47.593109 Reference Code - CPU = 9.0.1e.30
643 14:01:47.596482 uCode Version = 0.0.0.ca
644 14:01:47.599916 TXT ACM version = ff.ff.ff.ffff
645 14:01:47.603044 Display FSP Version Info HOB
646 14:01:47.606383 Reference Code - ME = 9.0.1e.30
647 14:01:47.609953 MEBx version = 0.0.0.0
648 14:01:47.613181 ME Firmware Version = Consumer SKU
649 14:01:47.616205 Display FSP Version Info HOB
650 14:01:47.619553 Reference Code - CML PCH = 9.0.1e.30
651 14:01:47.623327 PCH-CRID Status = Disabled
652 14:01:47.625990 PCH-CRID Original Value = ff.ff.ff.ffff
653 14:01:47.629431 PCH-CRID New Value = ff.ff.ff.ffff
654 14:01:47.632715 OPROM - RST - RAID = ff.ff.ff.ffff
655 14:01:47.635982 ChipsetInit Base Version = ff.ff.ff.ffff
656 14:01:47.639394 ChipsetInit Oem Version = ff.ff.ff.ffff
657 14:01:47.643018 Display FSP Version Info HOB
658 14:01:47.649196 Reference Code - SA - System Agent = 9.0.1e.30
659 14:01:47.652847 Reference Code - MRC = 0.7.1.6c
660 14:01:47.653422 SA - PCIe Version = 9.0.1e.30
661 14:01:47.656359 SA-CRID Status = Disabled
662 14:01:47.659451 SA-CRID Original Value = 0.0.0.c
663 14:01:47.662682 SA-CRID New Value = 0.0.0.c
664 14:01:47.666268 OPROM - VBIOS = ff.ff.ff.ffff
665 14:01:47.669224 RTC Init
666 14:01:47.672728 Set power on after power failure.
667 14:01:47.673198 Disabling Deep S3
668 14:01:47.676101 Disabling Deep S3
669 14:01:47.676543 Disabling Deep S4
670 14:01:47.679154 Disabling Deep S4
671 14:01:47.679599 Disabling Deep S5
672 14:01:47.682329 Disabling Deep S5
673 14:01:47.688976 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
674 14:01:47.689441 Enumerating buses...
675 14:01:47.695603 Show all devs... Before device enumeration.
676 14:01:47.696088 Root Device: enabled 1
677 14:01:47.698832 CPU_CLUSTER: 0: enabled 1
678 14:01:47.702831 DOMAIN: 0000: enabled 1
679 14:01:47.705791 APIC: 00: enabled 1
680 14:01:47.706308 PCI: 00:00.0: enabled 1
681 14:01:47.708885 PCI: 00:02.0: enabled 1
682 14:01:47.712453 PCI: 00:04.0: enabled 0
683 14:01:47.715860 PCI: 00:05.0: enabled 0
684 14:01:47.716358 PCI: 00:12.0: enabled 1
685 14:01:47.718847 PCI: 00:12.5: enabled 0
686 14:01:47.722161 PCI: 00:12.6: enabled 0
687 14:01:47.725663 PCI: 00:14.0: enabled 1
688 14:01:47.726102 PCI: 00:14.1: enabled 0
689 14:01:47.728923 PCI: 00:14.3: enabled 1
690 14:01:47.732668 PCI: 00:14.5: enabled 0
691 14:01:47.733250 PCI: 00:15.0: enabled 1
692 14:01:47.735650 PCI: 00:15.1: enabled 1
693 14:01:47.738863 PCI: 00:15.2: enabled 0
694 14:01:47.742083 PCI: 00:15.3: enabled 0
695 14:01:47.742646 PCI: 00:16.0: enabled 1
696 14:01:47.745354 PCI: 00:16.1: enabled 0
697 14:01:47.749015 PCI: 00:16.2: enabled 0
698 14:01:47.752214 PCI: 00:16.3: enabled 0
699 14:01:47.752702 PCI: 00:16.4: enabled 0
700 14:01:47.755618 PCI: 00:16.5: enabled 0
701 14:01:47.758871 PCI: 00:17.0: enabled 1
702 14:01:47.759364 PCI: 00:19.0: enabled 1
703 14:01:47.761951 PCI: 00:19.1: enabled 0
704 14:01:47.765176 PCI: 00:19.2: enabled 0
705 14:01:47.769195 PCI: 00:1a.0: enabled 0
706 14:01:47.769731 PCI: 00:1c.0: enabled 0
707 14:01:47.771996 PCI: 00:1c.1: enabled 0
708 14:01:47.775578 PCI: 00:1c.2: enabled 0
709 14:01:47.778996 PCI: 00:1c.3: enabled 0
710 14:01:47.779489 PCI: 00:1c.4: enabled 0
711 14:01:47.782012 PCI: 00:1c.5: enabled 0
712 14:01:47.785302 PCI: 00:1c.6: enabled 0
713 14:01:47.788597 PCI: 00:1c.7: enabled 0
714 14:01:47.789222 PCI: 00:1d.0: enabled 1
715 14:01:47.792367 PCI: 00:1d.1: enabled 0
716 14:01:47.795148 PCI: 00:1d.2: enabled 0
717 14:01:47.795699 PCI: 00:1d.3: enabled 0
718 14:01:47.798845 PCI: 00:1d.4: enabled 0
719 14:01:47.802553 PCI: 00:1d.5: enabled 1
720 14:01:47.806035 PCI: 00:1e.0: enabled 1
721 14:01:47.806527 PCI: 00:1e.1: enabled 0
722 14:01:47.808982 PCI: 00:1e.2: enabled 1
723 14:01:47.811753 PCI: 00:1e.3: enabled 1
724 14:01:47.815466 PCI: 00:1f.0: enabled 1
725 14:01:47.815953 PCI: 00:1f.1: enabled 1
726 14:01:47.818511 PCI: 00:1f.2: enabled 1
727 14:01:47.821839 PCI: 00:1f.3: enabled 1
728 14:01:47.825278 PCI: 00:1f.4: enabled 1
729 14:01:47.825765 PCI: 00:1f.5: enabled 1
730 14:01:47.828421 PCI: 00:1f.6: enabled 0
731 14:01:47.832135 USB0 port 0: enabled 1
732 14:01:47.832632 I2C: 00:15: enabled 1
733 14:01:47.835573 I2C: 00:5d: enabled 1
734 14:01:47.838286 GENERIC: 0.0: enabled 1
735 14:01:47.838776 I2C: 00:1a: enabled 1
736 14:01:47.841767 I2C: 00:38: enabled 1
737 14:01:47.844830 I2C: 00:39: enabled 1
738 14:01:47.848172 I2C: 00:3a: enabled 1
739 14:01:47.848649 I2C: 00:3b: enabled 1
740 14:01:47.851499 PCI: 00:00.0: enabled 1
741 14:01:47.854722 SPI: 00: enabled 1
742 14:01:47.855209 SPI: 01: enabled 1
743 14:01:47.858257 PNP: 0c09.0: enabled 1
744 14:01:47.858742 USB2 port 0: enabled 1
745 14:01:47.861703 USB2 port 1: enabled 1
746 14:01:47.864846 USB2 port 2: enabled 0
747 14:01:47.868299 USB2 port 3: enabled 0
748 14:01:47.868741 USB2 port 5: enabled 0
749 14:01:47.871478 USB2 port 6: enabled 1
750 14:01:47.874926 USB2 port 9: enabled 1
751 14:01:47.875414 USB3 port 0: enabled 1
752 14:01:47.878416 USB3 port 1: enabled 1
753 14:01:47.881429 USB3 port 2: enabled 1
754 14:01:47.884690 USB3 port 3: enabled 1
755 14:01:47.885258 USB3 port 4: enabled 0
756 14:01:47.888156 APIC: 02: enabled 1
757 14:01:47.888643 APIC: 01: enabled 1
758 14:01:47.891710 APIC: 03: enabled 1
759 14:01:47.894666 APIC: 04: enabled 1
760 14:01:47.895108 APIC: 05: enabled 1
761 14:01:47.897784 APIC: 06: enabled 1
762 14:01:47.901300 APIC: 07: enabled 1
763 14:01:47.901785 Compare with tree...
764 14:01:47.904577 Root Device: enabled 1
765 14:01:47.907717 CPU_CLUSTER: 0: enabled 1
766 14:01:47.908202 APIC: 00: enabled 1
767 14:01:47.911545 APIC: 02: enabled 1
768 14:01:47.914522 APIC: 01: enabled 1
769 14:01:47.915011 APIC: 03: enabled 1
770 14:01:47.918209 APIC: 04: enabled 1
771 14:01:47.921192 APIC: 05: enabled 1
772 14:01:47.921636 APIC: 06: enabled 1
773 14:01:47.924802 APIC: 07: enabled 1
774 14:01:47.928182 DOMAIN: 0000: enabled 1
775 14:01:47.930979 PCI: 00:00.0: enabled 1
776 14:01:47.931461 PCI: 00:02.0: enabled 1
777 14:01:47.934394 PCI: 00:04.0: enabled 0
778 14:01:47.937921 PCI: 00:05.0: enabled 0
779 14:01:47.941366 PCI: 00:12.0: enabled 1
780 14:01:47.944592 PCI: 00:12.5: enabled 0
781 14:01:47.945034 PCI: 00:12.6: enabled 0
782 14:01:47.947773 PCI: 00:14.0: enabled 1
783 14:01:47.951321 USB0 port 0: enabled 1
784 14:01:47.954610 USB2 port 0: enabled 1
785 14:01:47.957714 USB2 port 1: enabled 1
786 14:01:47.958201 USB2 port 2: enabled 0
787 14:01:47.961157 USB2 port 3: enabled 0
788 14:01:47.964191 USB2 port 5: enabled 0
789 14:01:47.968208 USB2 port 6: enabled 1
790 14:01:47.971075 USB2 port 9: enabled 1
791 14:01:47.974127 USB3 port 0: enabled 1
792 14:01:47.974567 USB3 port 1: enabled 1
793 14:01:47.977721 USB3 port 2: enabled 1
794 14:01:47.981291 USB3 port 3: enabled 1
795 14:01:47.984478 USB3 port 4: enabled 0
796 14:01:47.987764 PCI: 00:14.1: enabled 0
797 14:01:47.988209 PCI: 00:14.3: enabled 1
798 14:01:47.990748 PCI: 00:14.5: enabled 0
799 14:01:47.993889 PCI: 00:15.0: enabled 1
800 14:01:47.997335 I2C: 00:15: enabled 1
801 14:01:48.000725 PCI: 00:15.1: enabled 1
802 14:01:48.001217 I2C: 00:5d: enabled 1
803 14:01:48.003933 GENERIC: 0.0: enabled 1
804 14:01:48.007156 PCI: 00:15.2: enabled 0
805 14:01:48.011050 PCI: 00:15.3: enabled 0
806 14:01:48.014092 PCI: 00:16.0: enabled 1
807 14:01:48.014533 PCI: 00:16.1: enabled 0
808 14:01:48.017285 PCI: 00:16.2: enabled 0
809 14:01:48.020767 PCI: 00:16.3: enabled 0
810 14:01:48.023974 PCI: 00:16.4: enabled 0
811 14:01:48.027204 PCI: 00:16.5: enabled 0
812 14:01:48.027609 PCI: 00:17.0: enabled 1
813 14:01:48.030711 PCI: 00:19.0: enabled 1
814 14:01:48.034175 I2C: 00:1a: enabled 1
815 14:01:48.037431 I2C: 00:38: enabled 1
816 14:01:48.037870 I2C: 00:39: enabled 1
817 14:01:48.040348 I2C: 00:3a: enabled 1
818 14:01:48.044017 I2C: 00:3b: enabled 1
819 14:01:48.047053 PCI: 00:19.1: enabled 0
820 14:01:48.050239 PCI: 00:19.2: enabled 0
821 14:01:48.050673 PCI: 00:1a.0: enabled 0
822 14:01:48.053746 PCI: 00:1c.0: enabled 0
823 14:01:48.057182 PCI: 00:1c.1: enabled 0
824 14:01:48.060653 PCI: 00:1c.2: enabled 0
825 14:01:48.061121 PCI: 00:1c.3: enabled 0
826 14:01:48.063523 PCI: 00:1c.4: enabled 0
827 14:01:48.067059 PCI: 00:1c.5: enabled 0
828 14:01:48.070233 PCI: 00:1c.6: enabled 0
829 14:01:48.073614 PCI: 00:1c.7: enabled 0
830 14:01:48.074049 PCI: 00:1d.0: enabled 1
831 14:01:48.076873 PCI: 00:1d.1: enabled 0
832 14:01:48.080035 PCI: 00:1d.2: enabled 0
833 14:01:48.083266 PCI: 00:1d.3: enabled 0
834 14:01:48.086944 PCI: 00:1d.4: enabled 0
835 14:01:48.087380 PCI: 00:1d.5: enabled 1
836 14:01:48.090178 PCI: 00:00.0: enabled 1
837 14:01:48.093366 PCI: 00:1e.0: enabled 1
838 14:01:48.096625 PCI: 00:1e.1: enabled 0
839 14:01:48.099881 PCI: 00:1e.2: enabled 1
840 14:01:48.100316 SPI: 00: enabled 1
841 14:01:48.103235 PCI: 00:1e.3: enabled 1
842 14:01:48.106708 SPI: 01: enabled 1
843 14:01:48.109680 PCI: 00:1f.0: enabled 1
844 14:01:48.110115 PNP: 0c09.0: enabled 1
845 14:01:48.113045 PCI: 00:1f.1: enabled 1
846 14:01:48.116662 PCI: 00:1f.2: enabled 1
847 14:01:48.120021 PCI: 00:1f.3: enabled 1
848 14:01:48.123176 PCI: 00:1f.4: enabled 1
849 14:01:48.123614 PCI: 00:1f.5: enabled 1
850 14:01:48.126678 PCI: 00:1f.6: enabled 0
851 14:01:48.129999 Root Device scanning...
852 14:01:48.133431 scan_static_bus for Root Device
853 14:01:48.136635 CPU_CLUSTER: 0 enabled
854 14:01:48.137145 DOMAIN: 0000 enabled
855 14:01:48.140010 DOMAIN: 0000 scanning...
856 14:01:48.143259 PCI: pci_scan_bus for bus 00
857 14:01:48.146300 PCI: 00:00.0 [8086/0000] ops
858 14:01:48.149672 PCI: 00:00.0 [8086/9b61] enabled
859 14:01:48.153037 PCI: 00:02.0 [8086/0000] bus ops
860 14:01:48.156630 PCI: 00:02.0 [8086/9b41] enabled
861 14:01:48.159668 PCI: 00:04.0 [8086/1903] disabled
862 14:01:48.162713 PCI: 00:08.0 [8086/1911] enabled
863 14:01:48.166324 PCI: 00:12.0 [8086/02f9] enabled
864 14:01:48.169841 PCI: 00:14.0 [8086/0000] bus ops
865 14:01:48.172928 PCI: 00:14.0 [8086/02ed] enabled
866 14:01:48.176271 PCI: 00:14.2 [8086/02ef] enabled
867 14:01:48.179795 PCI: 00:14.3 [8086/02f0] enabled
868 14:01:48.182569 PCI: 00:15.0 [8086/0000] bus ops
869 14:01:48.185958 PCI: 00:15.0 [8086/02e8] enabled
870 14:01:48.189396 PCI: 00:15.1 [8086/0000] bus ops
871 14:01:48.192452 PCI: 00:15.1 [8086/02e9] enabled
872 14:01:48.195898 PCI: 00:16.0 [8086/0000] ops
873 14:01:48.199206 PCI: 00:16.0 [8086/02e0] enabled
874 14:01:48.202694 PCI: 00:17.0 [8086/0000] ops
875 14:01:48.205707 PCI: 00:17.0 [8086/02d3] enabled
876 14:01:48.209167 PCI: 00:19.0 [8086/0000] bus ops
877 14:01:48.212902 PCI: 00:19.0 [8086/02c5] enabled
878 14:01:48.215924 PCI: 00:1d.0 [8086/0000] bus ops
879 14:01:48.219013 PCI: 00:1d.0 [8086/02b0] enabled
880 14:01:48.225742 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 14:01:48.226192 PCI: 00:1e.0 [8086/0000] ops
882 14:01:48.229042 PCI: 00:1e.0 [8086/02a8] enabled
883 14:01:48.232632 PCI: 00:1e.2 [8086/0000] bus ops
884 14:01:48.235757 PCI: 00:1e.2 [8086/02aa] enabled
885 14:01:48.239023 PCI: 00:1e.3 [8086/0000] bus ops
886 14:01:48.242942 PCI: 00:1e.3 [8086/02ab] enabled
887 14:01:48.246093 PCI: 00:1f.0 [8086/0000] bus ops
888 14:01:48.248892 PCI: 00:1f.0 [8086/0284] enabled
889 14:01:48.255799 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 14:01:48.262445 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 14:01:48.265672 PCI: 00:1f.3 [8086/0000] bus ops
892 14:01:48.269136 PCI: 00:1f.3 [8086/02c8] enabled
893 14:01:48.272253 PCI: 00:1f.4 [8086/0000] bus ops
894 14:01:48.275594 PCI: 00:1f.4 [8086/02a3] enabled
895 14:01:48.278696 PCI: 00:1f.5 [8086/0000] bus ops
896 14:01:48.282274 PCI: 00:1f.5 [8086/02a4] enabled
897 14:01:48.285537 PCI: Leftover static devices:
898 14:01:48.285982 PCI: 00:05.0
899 14:01:48.288627 PCI: 00:12.5
900 14:01:48.289112 PCI: 00:12.6
901 14:01:48.289470 PCI: 00:14.1
902 14:01:48.291939 PCI: 00:14.5
903 14:01:48.292394 PCI: 00:15.2
904 14:01:48.295254 PCI: 00:15.3
905 14:01:48.295699 PCI: 00:16.1
906 14:01:48.296079 PCI: 00:16.2
907 14:01:48.298984 PCI: 00:16.3
908 14:01:48.299454 PCI: 00:16.4
909 14:01:48.302224 PCI: 00:16.5
910 14:01:48.302665 PCI: 00:19.1
911 14:01:48.305289 PCI: 00:19.2
912 14:01:48.305744 PCI: 00:1a.0
913 14:01:48.306096 PCI: 00:1c.0
914 14:01:48.308899 PCI: 00:1c.1
915 14:01:48.309394 PCI: 00:1c.2
916 14:01:48.311973 PCI: 00:1c.3
917 14:01:48.312421 PCI: 00:1c.4
918 14:01:48.312800 PCI: 00:1c.5
919 14:01:48.315311 PCI: 00:1c.6
920 14:01:48.315777 PCI: 00:1c.7
921 14:01:48.318956 PCI: 00:1d.1
922 14:01:48.319415 PCI: 00:1d.2
923 14:01:48.319782 PCI: 00:1d.3
924 14:01:48.322014 PCI: 00:1d.4
925 14:01:48.322473 PCI: 00:1d.5
926 14:01:48.325648 PCI: 00:1e.1
927 14:01:48.326105 PCI: 00:1f.1
928 14:01:48.328796 PCI: 00:1f.2
929 14:01:48.329275 PCI: 00:1f.6
930 14:01:48.331940 PCI: Check your devicetree.cb.
931 14:01:48.335094 PCI: 00:02.0 scanning...
932 14:01:48.338581 scan_generic_bus for PCI: 00:02.0
933 14:01:48.341933 scan_generic_bus for PCI: 00:02.0 done
934 14:01:48.348410 scan_bus: scanning of bus PCI: 00:02.0 took 10183 usecs
935 14:01:48.348879 PCI: 00:14.0 scanning...
936 14:01:48.351366 scan_static_bus for PCI: 00:14.0
937 14:01:48.355174 USB0 port 0 enabled
938 14:01:48.358385 USB0 port 0 scanning...
939 14:01:48.361677 scan_static_bus for USB0 port 0
940 14:01:48.364989 USB2 port 0 enabled
941 14:01:48.365472 USB2 port 1 enabled
942 14:01:48.368524 USB2 port 2 disabled
943 14:01:48.368966 USB2 port 3 disabled
944 14:01:48.371372 USB2 port 5 disabled
945 14:01:48.374730 USB2 port 6 enabled
946 14:01:48.375172 USB2 port 9 enabled
947 14:01:48.378336 USB3 port 0 enabled
948 14:01:48.381564 USB3 port 1 enabled
949 14:01:48.382007 USB3 port 2 enabled
950 14:01:48.385294 USB3 port 3 enabled
951 14:01:48.385738 USB3 port 4 disabled
952 14:01:48.387999 USB2 port 0 scanning...
953 14:01:48.391688 scan_static_bus for USB2 port 0
954 14:01:48.394955 scan_static_bus for USB2 port 0 done
955 14:01:48.401562 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
956 14:01:48.404830 USB2 port 1 scanning...
957 14:01:48.408066 scan_static_bus for USB2 port 1
958 14:01:48.411125 scan_static_bus for USB2 port 1 done
959 14:01:48.414790 scan_bus: scanning of bus USB2 port 1 took 9679 usecs
960 14:01:48.417952 USB2 port 6 scanning...
961 14:01:48.421714 scan_static_bus for USB2 port 6
962 14:01:48.424672 scan_static_bus for USB2 port 6 done
963 14:01:48.431123 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
964 14:01:48.434376 USB2 port 9 scanning...
965 14:01:48.437998 scan_static_bus for USB2 port 9
966 14:01:48.441208 scan_static_bus for USB2 port 9 done
967 14:01:48.444405 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
968 14:01:48.447798 USB3 port 0 scanning...
969 14:01:48.451281 scan_static_bus for USB3 port 0
970 14:01:48.454492 scan_static_bus for USB3 port 0 done
971 14:01:48.461015 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
972 14:01:48.464414 USB3 port 1 scanning...
973 14:01:48.467713 scan_static_bus for USB3 port 1
974 14:01:48.470988 scan_static_bus for USB3 port 1 done
975 14:01:48.477720 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
976 14:01:48.478167 USB3 port 2 scanning...
977 14:01:48.481226 scan_static_bus for USB3 port 2
978 14:01:48.484437 scan_static_bus for USB3 port 2 done
979 14:01:48.491158 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
980 14:01:48.494322 USB3 port 3 scanning...
981 14:01:48.497447 scan_static_bus for USB3 port 3
982 14:01:48.500747 scan_static_bus for USB3 port 3 done
983 14:01:48.507703 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
984 14:01:48.510719 scan_static_bus for USB0 port 0 done
985 14:01:48.514061 scan_bus: scanning of bus USB0 port 0 took 155299 usecs
986 14:01:48.520735 scan_static_bus for PCI: 00:14.0 done
987 14:01:48.524016 scan_bus: scanning of bus PCI: 00:14.0 took 172900 usecs
988 14:01:48.527688 PCI: 00:15.0 scanning...
989 14:01:48.530850 scan_generic_bus for PCI: 00:15.0
990 14:01:48.533772 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 14:01:48.540574 scan_generic_bus for PCI: 00:15.0 done
992 14:01:48.543966 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
993 14:01:48.546959 PCI: 00:15.1 scanning...
994 14:01:48.550229 scan_generic_bus for PCI: 00:15.1
995 14:01:48.553610 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 14:01:48.560215 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 14:01:48.564031 scan_generic_bus for PCI: 00:15.1 done
998 14:01:48.566917 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
999 14:01:48.570267 PCI: 00:19.0 scanning...
1000 14:01:48.573566 scan_generic_bus for PCI: 00:19.0
1001 14:01:48.580042 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 14:01:48.583644 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 14:01:48.587192 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 14:01:48.590207 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 14:01:48.597089 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 14:01:48.600253 scan_generic_bus for PCI: 00:19.0 done
1007 14:01:48.603713 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
1008 14:01:48.606723 PCI: 00:1d.0 scanning...
1009 14:01:48.610170 do_pci_scan_bridge for PCI: 00:1d.0
1010 14:01:48.613595 PCI: pci_scan_bus for bus 01
1011 14:01:48.616645 PCI: 01:00.0 [1c5c/1327] enabled
1012 14:01:48.620430 Enabling Common Clock Configuration
1013 14:01:48.626749 L1 Sub-State supported from root port 29
1014 14:01:48.627289 L1 Sub-State Support = 0xf
1015 14:01:48.630139 CommonModeRestoreTime = 0x28
1016 14:01:48.636658 Power On Value = 0x16, Power On Scale = 0x0
1017 14:01:48.637146 ASPM: Enabled L1
1018 14:01:48.643236 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1019 14:01:48.646731 PCI: 00:1e.2 scanning...
1020 14:01:48.649861 scan_generic_bus for PCI: 00:1e.2
1021 14:01:48.653475 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 14:01:48.656800 scan_generic_bus for PCI: 00:1e.2 done
1023 14:01:48.663145 scan_bus: scanning of bus PCI: 00:1e.2 took 14001 usecs
1024 14:01:48.663605 PCI: 00:1e.3 scanning...
1025 14:01:48.670121 scan_generic_bus for PCI: 00:1e.3
1026 14:01:48.673409 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 14:01:48.677004 scan_generic_bus for PCI: 00:1e.3 done
1028 14:01:48.683242 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1029 14:01:48.683687 PCI: 00:1f.0 scanning...
1030 14:01:48.686896 scan_static_bus for PCI: 00:1f.0
1031 14:01:48.689716 PNP: 0c09.0 enabled
1032 14:01:48.692951 scan_static_bus for PCI: 00:1f.0 done
1033 14:01:48.699721 scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs
1034 14:01:48.703260 PCI: 00:1f.3 scanning...
1035 14:01:48.706370 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1036 14:01:48.710063 PCI: 00:1f.4 scanning...
1037 14:01:48.713277 scan_generic_bus for PCI: 00:1f.4
1038 14:01:48.716573 scan_generic_bus for PCI: 00:1f.4 done
1039 14:01:48.723263 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1040 14:01:48.726583 PCI: 00:1f.5 scanning...
1041 14:01:48.729839 scan_generic_bus for PCI: 00:1f.5
1042 14:01:48.733135 scan_generic_bus for PCI: 00:1f.5 done
1043 14:01:48.739571 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1044 14:01:48.743113 scan_bus: scanning of bus DOMAIN: 0000 took 604793 usecs
1045 14:01:48.749447 scan_static_bus for Root Device done
1046 14:01:48.753177 scan_bus: scanning of bus Root Device took 624656 usecs
1047 14:01:48.756174 done
1048 14:01:48.756653 Chrome EC: UHEPI supported
1049 14:01:48.763208 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 14:01:48.769782 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 14:01:48.776106 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 14:01:48.782912 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 14:01:48.786497 SPI flash protection: WPSW=0 SRP0=0
1054 14:01:48.792678 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 14:01:48.796451 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 14:01:48.799668 found VGA at PCI: 00:02.0
1057 14:01:48.802902 Setting up VGA for PCI: 00:02.0
1058 14:01:48.806136 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 14:01:48.812584 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 14:01:48.816235 Allocating resources...
1061 14:01:48.816710 Reading resources...
1062 14:01:48.822518 Root Device read_resources bus 0 link: 0
1063 14:01:48.825771 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 14:01:48.832200 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 14:01:48.835892 DOMAIN: 0000 read_resources bus 0 link: 0
1066 14:01:48.842408 PCI: 00:14.0 read_resources bus 0 link: 0
1067 14:01:48.845499 USB0 port 0 read_resources bus 0 link: 0
1068 14:01:48.853892 USB0 port 0 read_resources bus 0 link: 0 done
1069 14:01:48.856998 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 14:01:48.864473 PCI: 00:15.0 read_resources bus 1 link: 0
1071 14:01:48.867879 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 14:01:48.874313 PCI: 00:15.1 read_resources bus 2 link: 0
1073 14:01:48.877372 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 14:01:48.884851 PCI: 00:19.0 read_resources bus 3 link: 0
1075 14:01:48.891539 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 14:01:48.894816 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 14:01:48.901611 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 14:01:48.905481 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 14:01:48.912035 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 14:01:48.915022 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 14:01:48.921878 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 14:01:48.924674 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 14:01:48.931717 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 14:01:48.937903 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 14:01:48.941177 Root Device read_resources bus 0 link: 0 done
1086 14:01:48.944936 Done reading resources.
1087 14:01:48.947975 Show resources in subtree (Root Device)...After reading.
1088 14:01:48.954621 Root Device child on link 0 CPU_CLUSTER: 0
1089 14:01:48.958061 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 14:01:48.958507 APIC: 00
1091 14:01:48.961534 APIC: 02
1092 14:01:48.961977 APIC: 01
1093 14:01:48.964459 APIC: 03
1094 14:01:48.964900 APIC: 04
1095 14:01:48.965312 APIC: 05
1096 14:01:48.968086 APIC: 06
1097 14:01:48.968531 APIC: 07
1098 14:01:48.971155 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 14:01:48.981341 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 14:01:49.031467 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 14:01:49.031966 PCI: 00:00.0
1102 14:01:49.032806 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 14:01:49.033627 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 14:01:49.034341 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 14:01:49.035107 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 14:01:49.081032 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 14:01:49.081642 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 14:01:49.082516 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 14:01:49.082917 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 14:01:49.083590 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 14:01:49.101229 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 14:01:49.102262 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 14:01:49.104868 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 14:01:49.114889 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 14:01:49.124710 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 14:01:49.134387 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 14:01:49.144404 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 14:01:49.144868 PCI: 00:02.0
1119 14:01:49.154294 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 14:01:49.164001 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 14:01:49.173911 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 14:01:49.174362 PCI: 00:04.0
1123 14:01:49.177847 PCI: 00:08.0
1124 14:01:49.187435 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 14:01:49.187882 PCI: 00:12.0
1126 14:01:49.197190 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 14:01:49.203888 PCI: 00:14.0 child on link 0 USB0 port 0
1128 14:01:49.213450 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 14:01:49.217053 USB0 port 0 child on link 0 USB2 port 0
1130 14:01:49.220383 USB2 port 0
1131 14:01:49.220843 USB2 port 1
1132 14:01:49.223526 USB2 port 2
1133 14:01:49.223963 USB2 port 3
1134 14:01:49.227020 USB2 port 5
1135 14:01:49.227457 USB2 port 6
1136 14:01:49.230537 USB2 port 9
1137 14:01:49.230979 USB3 port 0
1138 14:01:49.233720 USB3 port 1
1139 14:01:49.234157 USB3 port 2
1140 14:01:49.236960 USB3 port 3
1141 14:01:49.237452 USB3 port 4
1142 14:01:49.240172 PCI: 00:14.2
1143 14:01:49.250299 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 14:01:49.260538 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 14:01:49.260977 PCI: 00:14.3
1146 14:01:49.270064 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 14:01:49.276795 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 14:01:49.286471 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 14:01:49.286920 I2C: 01:15
1150 14:01:49.289963 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 14:01:49.299820 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:01:49.303245 I2C: 02:5d
1153 14:01:49.303685 GENERIC: 0.0
1154 14:01:49.306483 PCI: 00:16.0
1155 14:01:49.316427 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 14:01:49.316984 PCI: 00:17.0
1157 14:01:49.326562 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 14:01:49.336554 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 14:01:49.343207 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 14:01:49.352998 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 14:01:49.359669 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 14:01:49.369589 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 14:01:49.372752 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 14:01:49.382678 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 14:01:49.386089 I2C: 03:1a
1166 14:01:49.386567 I2C: 03:38
1167 14:01:49.389600 I2C: 03:39
1168 14:01:49.390100 I2C: 03:3a
1169 14:01:49.392965 I2C: 03:3b
1170 14:01:49.395976 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 14:01:49.405704 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 14:01:49.415796 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 14:01:49.422474 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 14:01:49.425906 PCI: 01:00.0
1175 14:01:49.435466 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 14:01:49.438879 PCI: 00:1e.0
1177 14:01:49.448706 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 14:01:49.458970 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 14:01:49.462186 PCI: 00:1e.2 child on link 0 SPI: 00
1180 14:01:49.472365 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 14:01:49.472838 SPI: 00
1182 14:01:49.478339 PCI: 00:1e.3 child on link 0 SPI: 01
1183 14:01:49.488696 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 14:01:49.489179 SPI: 01
1185 14:01:49.491861 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 14:01:49.501819 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 14:01:49.511944 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 14:01:49.512421 PNP: 0c09.0
1189 14:01:49.521935 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 14:01:49.522385 PCI: 00:1f.3
1191 14:01:49.531800 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 14:01:49.541154 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 14:01:49.544636 PCI: 00:1f.4
1194 14:01:49.554853 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 14:01:49.564677 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 14:01:49.565270 PCI: 00:1f.5
1197 14:01:49.574424 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 14:01:49.581720 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 14:01:49.587644 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 14:01:49.594916 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 14:01:49.597938 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 14:01:49.601023 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 14:01:49.604462 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 14:01:49.608079 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 14:01:49.614149 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 14:01:49.621250 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 14:01:49.631126 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 14:01:49.637518 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 14:01:49.644021 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 14:01:49.647500 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 14:01:49.657573 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 14:01:49.660488 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 14:01:49.667235 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 14:01:49.670539 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 14:01:49.673833 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 14:01:49.680611 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 14:01:49.684147 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 14:01:49.690285 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 14:01:49.693944 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 14:01:49.700606 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 14:01:49.703657 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 14:01:49.710362 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 14:01:49.713904 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 14:01:49.720046 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 14:01:49.724362 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 14:01:49.729948 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 14:01:49.733260 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 14:01:49.739822 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 14:01:49.743494 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 14:01:49.749588 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 14:01:49.753013 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 14:01:49.756423 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 14:01:49.763027 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 14:01:49.766433 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 14:01:49.776521 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 14:01:49.779579 avoid_fixed_resources: DOMAIN: 0000
1237 14:01:49.785972 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 14:01:49.792778 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 14:01:49.800051 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 14:01:49.806538 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 14:01:49.816506 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 14:01:49.822701 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 14:01:49.829502 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 14:01:49.839222 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 14:01:49.846105 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 14:01:49.852831 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 14:01:49.858893 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 14:01:49.868934 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 14:01:49.869427 Setting resources...
1250 14:01:49.875380 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 14:01:49.878810 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 14:01:49.885788 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 14:01:49.888821 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 14:01:49.892410 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 14:01:49.899106 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 14:01:49.905454 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 14:01:49.911997 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 14:01:49.918790 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 14:01:49.921924 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 14:01:49.928465 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 14:01:49.931955 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 14:01:49.938438 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 14:01:49.942131 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 14:01:49.948414 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 14:01:49.952025 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 14:01:49.958823 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 14:01:49.961735 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 14:01:49.968660 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 14:01:49.971576 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 14:01:49.978403 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 14:01:49.981507 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 14:01:49.988319 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 14:01:49.992156 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 14:01:49.994701 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 14:01:50.001356 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 14:01:50.004596 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 14:01:50.011064 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 14:01:50.015358 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 14:01:50.021211 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 14:01:50.024840 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 14:01:50.031370 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 14:01:50.037909 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 14:01:50.044566 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 14:01:50.051074 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 14:01:50.061031 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 14:01:50.064185 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 14:01:50.070744 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 14:01:50.077476 Root Device assign_resources, bus 0 link: 0
1289 14:01:50.080622 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 14:01:50.090731 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 14:01:50.097362 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 14:01:50.107290 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 14:01:50.114149 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 14:01:50.123869 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 14:01:50.130601 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 14:01:50.136738 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 14:01:50.140476 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 14:01:50.146869 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 14:01:50.156760 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 14:01:50.163449 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 14:01:50.173527 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 14:01:50.176809 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 14:01:50.183616 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 14:01:50.189648 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 14:01:50.196632 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 14:01:50.199735 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 14:01:50.206516 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 14:01:50.217172 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 14:01:50.223227 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 14:01:50.233117 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 14:01:50.239879 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 14:01:50.246343 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 14:01:50.253351 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 14:01:50.263314 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 14:01:50.266775 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 14:01:50.273305 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 14:01:50.279712 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 14:01:50.289722 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 14:01:50.300034 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 14:01:50.302811 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 14:01:50.309935 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 14:01:50.316411 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 14:01:50.322845 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 14:01:50.332673 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 14:01:50.336261 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 14:01:50.342775 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 14:01:50.349618 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 14:01:50.355599 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 14:01:50.358855 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 14:01:50.362198 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 14:01:50.369501 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 14:01:50.373195 LPC: Trying to open IO window from 800 size 1ff
1333 14:01:50.383038 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 14:01:50.389516 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 14:01:50.399482 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 14:01:50.405767 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 14:01:50.412650 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 14:01:50.415911 Root Device assign_resources, bus 0 link: 0
1339 14:01:50.419720 Done setting resources.
1340 14:01:50.425943 Show resources in subtree (Root Device)...After assigning values.
1341 14:01:50.429335 Root Device child on link 0 CPU_CLUSTER: 0
1342 14:01:50.432627 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 14:01:50.435724 APIC: 00
1344 14:01:50.436158 APIC: 02
1345 14:01:50.436531 APIC: 01
1346 14:01:50.439118 APIC: 03
1347 14:01:50.439565 APIC: 04
1348 14:01:50.442856 APIC: 05
1349 14:01:50.443314 APIC: 06
1350 14:01:50.443814 APIC: 07
1351 14:01:50.448920 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 14:01:50.458629 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 14:01:50.468952 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 14:01:50.472271 PCI: 00:00.0
1355 14:01:50.478520 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 14:01:50.488592 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 14:01:50.498237 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 14:01:50.507976 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 14:01:50.518197 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 14:01:50.528101 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 14:01:50.534924 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 14:01:50.544751 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 14:01:50.554534 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 14:01:50.564219 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 14:01:50.574520 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 14:01:50.583934 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 14:01:50.590675 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 14:01:50.600717 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 14:01:50.610881 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 14:01:50.620384 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 14:01:50.623751 PCI: 00:02.0
1372 14:01:50.633655 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 14:01:50.643569 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 14:01:50.653543 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 14:01:50.654008 PCI: 00:04.0
1376 14:01:50.656833 PCI: 00:08.0
1377 14:01:50.666699 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 14:01:50.667162 PCI: 00:12.0
1379 14:01:50.676661 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 14:01:50.683123 PCI: 00:14.0 child on link 0 USB0 port 0
1381 14:01:50.692925 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 14:01:50.696481 USB0 port 0 child on link 0 USB2 port 0
1383 14:01:50.699685 USB2 port 0
1384 14:01:50.700136 USB2 port 1
1385 14:01:50.702938 USB2 port 2
1386 14:01:50.703408 USB2 port 3
1387 14:01:50.706387 USB2 port 5
1388 14:01:50.706837 USB2 port 6
1389 14:01:50.709603 USB2 port 9
1390 14:01:50.712750 USB3 port 0
1391 14:01:50.713254 USB3 port 1
1392 14:01:50.716170 USB3 port 2
1393 14:01:50.716713 USB3 port 3
1394 14:01:50.719938 USB3 port 4
1395 14:01:50.720489 PCI: 00:14.2
1396 14:01:50.729560 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 14:01:50.739098 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 14:01:50.742557 PCI: 00:14.3
1399 14:01:50.752463 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 14:01:50.755786 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 14:01:50.765850 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 14:01:50.768946 I2C: 01:15
1403 14:01:50.772166 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 14:01:50.782496 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 14:01:50.785896 I2C: 02:5d
1406 14:01:50.786350 GENERIC: 0.0
1407 14:01:50.788557 PCI: 00:16.0
1408 14:01:50.799118 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 14:01:50.799676 PCI: 00:17.0
1410 14:01:50.812093 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 14:01:50.822258 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 14:01:50.828519 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 14:01:50.838601 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 14:01:50.848582 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 14:01:50.858254 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 14:01:50.861601 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 14:01:50.871256 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 14:01:50.874801 I2C: 03:1a
1419 14:01:50.875260 I2C: 03:38
1420 14:01:50.878074 I2C: 03:39
1421 14:01:50.878515 I2C: 03:3a
1422 14:01:50.881921 I2C: 03:3b
1423 14:01:50.884693 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 14:01:50.894658 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 14:01:50.904579 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 14:01:50.914691 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 14:01:50.917978 PCI: 01:00.0
1428 14:01:50.927787 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 14:01:50.928226 PCI: 00:1e.0
1430 14:01:50.941286 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 14:01:50.951325 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 14:01:50.954019 PCI: 00:1e.2 child on link 0 SPI: 00
1433 14:01:50.963866 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 14:01:50.964320 SPI: 00
1435 14:01:50.970625 PCI: 00:1e.3 child on link 0 SPI: 01
1436 14:01:50.980343 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 14:01:50.980793 SPI: 01
1438 14:01:50.984013 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 14:01:50.993904 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 14:01:51.003678 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 14:01:51.004126 PNP: 0c09.0
1442 14:01:51.013653 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 14:01:51.014097 PCI: 00:1f.3
1444 14:01:51.026969 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 14:01:51.036715 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 14:01:51.037242 PCI: 00:1f.4
1447 14:01:51.046408 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 14:01:51.056534 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 14:01:51.060043 PCI: 00:1f.5
1450 14:01:51.069709 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 14:01:51.070158 Done allocating resources.
1452 14:01:51.076125 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 14:01:51.079474 Enabling resources...
1454 14:01:51.083058 PCI: 00:00.0 subsystem <- 8086/9b61
1455 14:01:51.086336 PCI: 00:00.0 cmd <- 06
1456 14:01:51.089644 PCI: 00:02.0 subsystem <- 8086/9b41
1457 14:01:51.093175 PCI: 00:02.0 cmd <- 03
1458 14:01:51.096094 PCI: 00:08.0 cmd <- 06
1459 14:01:51.099455 PCI: 00:12.0 subsystem <- 8086/02f9
1460 14:01:51.102754 PCI: 00:12.0 cmd <- 02
1461 14:01:51.106025 PCI: 00:14.0 subsystem <- 8086/02ed
1462 14:01:51.109383 PCI: 00:14.0 cmd <- 02
1463 14:01:51.109825 PCI: 00:14.2 cmd <- 02
1464 14:01:51.115664 PCI: 00:14.3 subsystem <- 8086/02f0
1465 14:01:51.116109 PCI: 00:14.3 cmd <- 02
1466 14:01:51.119134 PCI: 00:15.0 subsystem <- 8086/02e8
1467 14:01:51.122299 PCI: 00:15.0 cmd <- 02
1468 14:01:51.125740 PCI: 00:15.1 subsystem <- 8086/02e9
1469 14:01:51.129091 PCI: 00:15.1 cmd <- 02
1470 14:01:51.132637 PCI: 00:16.0 subsystem <- 8086/02e0
1471 14:01:51.135852 PCI: 00:16.0 cmd <- 02
1472 14:01:51.139240 PCI: 00:17.0 subsystem <- 8086/02d3
1473 14:01:51.142515 PCI: 00:17.0 cmd <- 03
1474 14:01:51.145582 PCI: 00:19.0 subsystem <- 8086/02c5
1475 14:01:51.149020 PCI: 00:19.0 cmd <- 02
1476 14:01:51.152168 PCI: 00:1d.0 bridge ctrl <- 0013
1477 14:01:51.155668 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 14:01:51.158966 PCI: 00:1d.0 cmd <- 06
1479 14:01:51.162114 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 14:01:51.162605 PCI: 00:1e.0 cmd <- 06
1481 14:01:51.168873 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 14:01:51.169379 PCI: 00:1e.2 cmd <- 06
1483 14:01:51.172208 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 14:01:51.175700 PCI: 00:1e.3 cmd <- 02
1485 14:01:51.179058 PCI: 00:1f.0 subsystem <- 8086/0284
1486 14:01:51.182427 PCI: 00:1f.0 cmd <- 407
1487 14:01:51.186043 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 14:01:51.189131 PCI: 00:1f.3 cmd <- 02
1489 14:01:51.192459 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 14:01:51.195516 PCI: 00:1f.4 cmd <- 03
1491 14:01:51.198803 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 14:01:51.201970 PCI: 00:1f.5 cmd <- 406
1493 14:01:51.210966 PCI: 01:00.0 cmd <- 02
1494 14:01:51.215654 done.
1495 14:01:51.224246 ME: Version: 14.0.39.1367
1496 14:01:51.230892 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1497 14:01:51.233786 Initializing devices...
1498 14:01:51.234233 Root Device init ...
1499 14:01:51.240430 Chrome EC: Set SMI mask to 0x0000000000000000
1500 14:01:51.243687 Chrome EC: clear events_b mask to 0x0000000000000000
1501 14:01:51.250334 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 14:01:51.257294 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 14:01:51.263428 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 14:01:51.266786 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 14:01:51.270282 Root Device init finished in 35198 usecs
1506 14:01:51.273665 CPU_CLUSTER: 0 init ...
1507 14:01:51.280280 CPU_CLUSTER: 0 init finished in 2446 usecs
1508 14:01:51.284673 PCI: 00:00.0 init ...
1509 14:01:51.287887 CPU TDP: 15 Watts
1510 14:01:51.291472 CPU PL2 = 64 Watts
1511 14:01:51.294528 PCI: 00:00.0 init finished in 7068 usecs
1512 14:01:51.298197 PCI: 00:02.0 init ...
1513 14:01:51.301178 PCI: 00:02.0 init finished in 2245 usecs
1514 14:01:51.304725 PCI: 00:08.0 init ...
1515 14:01:51.307945 PCI: 00:08.0 init finished in 2252 usecs
1516 14:01:51.310971 PCI: 00:12.0 init ...
1517 14:01:51.314282 PCI: 00:12.0 init finished in 2251 usecs
1518 14:01:51.317861 PCI: 00:14.0 init ...
1519 14:01:51.321034 PCI: 00:14.0 init finished in 2250 usecs
1520 14:01:51.324111 PCI: 00:14.2 init ...
1521 14:01:51.327669 PCI: 00:14.2 init finished in 2250 usecs
1522 14:01:51.331156 PCI: 00:14.3 init ...
1523 14:01:51.334766 PCI: 00:14.3 init finished in 2270 usecs
1524 14:01:51.337612 PCI: 00:15.0 init ...
1525 14:01:51.340986 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 14:01:51.344262 PCI: 00:15.0 init finished in 5975 usecs
1527 14:01:51.347735 PCI: 00:15.1 init ...
1528 14:01:51.350943 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 14:01:51.357203 PCI: 00:15.1 init finished in 5973 usecs
1530 14:01:51.357638 PCI: 00:16.0 init ...
1531 14:01:51.363889 PCI: 00:16.0 init finished in 2250 usecs
1532 14:01:51.367712 PCI: 00:19.0 init ...
1533 14:01:51.370576 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 14:01:51.373884 PCI: 00:19.0 init finished in 5976 usecs
1535 14:01:51.377293 PCI: 00:1d.0 init ...
1536 14:01:51.380567 Initializing PCH PCIe bridge.
1537 14:01:51.383958 PCI: 00:1d.0 init finished in 5283 usecs
1538 14:01:51.387136 PCI: 00:1f.0 init ...
1539 14:01:51.390764 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 14:01:51.397102 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 14:01:51.397651 IOAPIC: ID = 0x02
1542 14:01:51.399999 IOAPIC: Dumping registers
1543 14:01:51.403472 reg 0x0000: 0x02000000
1544 14:01:51.406761 reg 0x0001: 0x00770020
1545 14:01:51.407196 reg 0x0002: 0x00000000
1546 14:01:51.413437 PCI: 00:1f.0 init finished in 23524 usecs
1547 14:01:51.416751 PCI: 00:1f.4 init ...
1548 14:01:51.420021 PCI: 00:1f.4 init finished in 2262 usecs
1549 14:01:51.431277 PCI: 01:00.0 init ...
1550 14:01:51.434165 PCI: 01:00.0 init finished in 2252 usecs
1551 14:01:51.438322 PNP: 0c09.0 init ...
1552 14:01:51.441473 Google Chrome EC uptime: 11.057 seconds
1553 14:01:51.448287 Google Chrome AP resets since EC boot: 0
1554 14:01:51.451638 Google Chrome most recent AP reset causes:
1555 14:01:51.457861 Google Chrome EC reset flags at last EC boot: reset-pin
1556 14:01:51.461233 PNP: 0c09.0 init finished in 20560 usecs
1557 14:01:51.464601 Devices initialized
1558 14:01:51.468194 Show all devs... After init.
1559 14:01:51.468641 Root Device: enabled 1
1560 14:01:51.471120 CPU_CLUSTER: 0: enabled 1
1561 14:01:51.474330 DOMAIN: 0000: enabled 1
1562 14:01:51.474770 APIC: 00: enabled 1
1563 14:01:51.477523 PCI: 00:00.0: enabled 1
1564 14:01:51.481150 PCI: 00:02.0: enabled 1
1565 14:01:51.484624 PCI: 00:04.0: enabled 0
1566 14:01:51.485095 PCI: 00:05.0: enabled 0
1567 14:01:51.488004 PCI: 00:12.0: enabled 1
1568 14:01:51.491090 PCI: 00:12.5: enabled 0
1569 14:01:51.494317 PCI: 00:12.6: enabled 0
1570 14:01:51.494783 PCI: 00:14.0: enabled 1
1571 14:01:51.497950 PCI: 00:14.1: enabled 0
1572 14:01:51.501085 PCI: 00:14.3: enabled 1
1573 14:01:51.501546 PCI: 00:14.5: enabled 0
1574 14:01:51.504142 PCI: 00:15.0: enabled 1
1575 14:01:51.507395 PCI: 00:15.1: enabled 1
1576 14:01:51.510755 PCI: 00:15.2: enabled 0
1577 14:01:51.511200 PCI: 00:15.3: enabled 0
1578 14:01:51.514467 PCI: 00:16.0: enabled 1
1579 14:01:51.517801 PCI: 00:16.1: enabled 0
1580 14:01:51.521221 PCI: 00:16.2: enabled 0
1581 14:01:51.521655 PCI: 00:16.3: enabled 0
1582 14:01:51.524388 PCI: 00:16.4: enabled 0
1583 14:01:51.527817 PCI: 00:16.5: enabled 0
1584 14:01:51.530463 PCI: 00:17.0: enabled 1
1585 14:01:51.530898 PCI: 00:19.0: enabled 1
1586 14:01:51.533731 PCI: 00:19.1: enabled 0
1587 14:01:51.537200 PCI: 00:19.2: enabled 0
1588 14:01:51.540680 PCI: 00:1a.0: enabled 0
1589 14:01:51.541154 PCI: 00:1c.0: enabled 0
1590 14:01:51.543973 PCI: 00:1c.1: enabled 0
1591 14:01:51.547213 PCI: 00:1c.2: enabled 0
1592 14:01:51.547663 PCI: 00:1c.3: enabled 0
1593 14:01:51.550555 PCI: 00:1c.4: enabled 0
1594 14:01:51.553511 PCI: 00:1c.5: enabled 0
1595 14:01:51.556990 PCI: 00:1c.6: enabled 0
1596 14:01:51.557477 PCI: 00:1c.7: enabled 0
1597 14:01:51.560836 PCI: 00:1d.0: enabled 1
1598 14:01:51.563827 PCI: 00:1d.1: enabled 0
1599 14:01:51.566966 PCI: 00:1d.2: enabled 0
1600 14:01:51.567402 PCI: 00:1d.3: enabled 0
1601 14:01:51.569958 PCI: 00:1d.4: enabled 0
1602 14:01:51.573398 PCI: 00:1d.5: enabled 0
1603 14:01:51.576840 PCI: 00:1e.0: enabled 1
1604 14:01:51.577300 PCI: 00:1e.1: enabled 0
1605 14:01:51.580102 PCI: 00:1e.2: enabled 1
1606 14:01:51.583523 PCI: 00:1e.3: enabled 1
1607 14:01:51.586448 PCI: 00:1f.0: enabled 1
1608 14:01:51.586884 PCI: 00:1f.1: enabled 0
1609 14:01:51.589658 PCI: 00:1f.2: enabled 0
1610 14:01:51.592863 PCI: 00:1f.3: enabled 1
1611 14:01:51.596423 PCI: 00:1f.4: enabled 1
1612 14:01:51.596855 PCI: 00:1f.5: enabled 1
1613 14:01:51.599754 PCI: 00:1f.6: enabled 0
1614 14:01:51.603341 USB0 port 0: enabled 1
1615 14:01:51.603808 I2C: 01:15: enabled 1
1616 14:01:51.606520 I2C: 02:5d: enabled 1
1617 14:01:51.609950 GENERIC: 0.0: enabled 1
1618 14:01:51.610383 I2C: 03:1a: enabled 1
1619 14:01:51.612835 I2C: 03:38: enabled 1
1620 14:01:51.616518 I2C: 03:39: enabled 1
1621 14:01:51.619743 I2C: 03:3a: enabled 1
1622 14:01:51.620200 I2C: 03:3b: enabled 1
1623 14:01:51.623119 PCI: 00:00.0: enabled 1
1624 14:01:51.626372 SPI: 00: enabled 1
1625 14:01:51.626876 SPI: 01: enabled 1
1626 14:01:51.629392 PNP: 0c09.0: enabled 1
1627 14:01:51.632863 USB2 port 0: enabled 1
1628 14:01:51.633437 USB2 port 1: enabled 1
1629 14:01:51.636400 USB2 port 2: enabled 0
1630 14:01:51.639200 USB2 port 3: enabled 0
1631 14:01:51.639637 USB2 port 5: enabled 0
1632 14:01:51.642725 USB2 port 6: enabled 1
1633 14:01:51.645908 USB2 port 9: enabled 1
1634 14:01:51.646345 USB3 port 0: enabled 1
1635 14:01:51.649275 USB3 port 1: enabled 1
1636 14:01:51.652802 USB3 port 2: enabled 1
1637 14:01:51.655903 USB3 port 3: enabled 1
1638 14:01:51.656334 USB3 port 4: enabled 0
1639 14:01:51.659619 APIC: 02: enabled 1
1640 14:01:51.663026 APIC: 01: enabled 1
1641 14:01:51.663456 APIC: 03: enabled 1
1642 14:01:51.665709 APIC: 04: enabled 1
1643 14:01:51.666142 APIC: 05: enabled 1
1644 14:01:51.669408 APIC: 06: enabled 1
1645 14:01:51.672324 APIC: 07: enabled 1
1646 14:01:51.672763 PCI: 00:08.0: enabled 1
1647 14:01:51.675821 PCI: 00:14.2: enabled 1
1648 14:01:51.678770 PCI: 01:00.0: enabled 1
1649 14:01:51.682378 Disabling ACPI via APMC:
1650 14:01:51.685668 done.
1651 14:01:51.689060 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 14:01:51.692166 ELOG: NV offset 0xaf0000 size 0x4000
1653 14:01:51.699802 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 14:01:51.706290 ELOG: Event(17) added with size 13 at 2022-08-03 14:01:50 UTC
1655 14:01:51.712911 ELOG: Event(92) added with size 9 at 2022-08-03 14:01:50 UTC
1656 14:01:51.719760 ELOG: Event(93) added with size 9 at 2022-08-03 14:01:50 UTC
1657 14:01:51.726061 ELOG: Event(9A) added with size 9 at 2022-08-03 14:01:50 UTC
1658 14:01:51.732897 ELOG: Event(9E) added with size 10 at 2022-08-03 14:01:50 UTC
1659 14:01:51.739538 ELOG: Event(9F) added with size 14 at 2022-08-03 14:01:50 UTC
1660 14:01:51.742493 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1661 14:01:51.750460 ELOG: Event(A1) added with size 10 at 2022-08-03 14:01:50 UTC
1662 14:01:51.760196 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 14:01:51.766612 ELOG: Event(A0) added with size 9 at 2022-08-03 14:01:50 UTC
1664 14:01:51.769763 elog_add_boot_reason: Logged dev mode boot
1665 14:01:51.773159 Finalize devices...
1666 14:01:51.773741 PCI: 00:17.0 final
1667 14:01:51.776395 Devices finalized
1668 14:01:51.779447 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 14:01:51.786174 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 14:01:51.789902 ME: HFSTS1 : 0x90000245
1671 14:01:51.792804 ME: HFSTS2 : 0x3B850126
1672 14:01:51.799509 ME: HFSTS3 : 0x00000020
1673 14:01:51.803267 ME: HFSTS4 : 0x00004800
1674 14:01:51.806159 ME: HFSTS5 : 0x00000000
1675 14:01:51.809666 ME: HFSTS6 : 0x40400006
1676 14:01:51.812956 ME: Manufacturing Mode : NO
1677 14:01:51.816449 ME: FW Partition Table : OK
1678 14:01:51.819495 ME: Bringup Loader Failure : NO
1679 14:01:51.822653 ME: Firmware Init Complete : YES
1680 14:01:51.825815 ME: Boot Options Present : NO
1681 14:01:51.829274 ME: Update In Progress : NO
1682 14:01:51.832822 ME: D0i3 Support : YES
1683 14:01:51.835918 ME: Low Power State Enabled : NO
1684 14:01:51.839075 ME: CPU Replaced : NO
1685 14:01:51.842454 ME: CPU Replacement Valid : YES
1686 14:01:51.845944 ME: Current Working State : 5
1687 14:01:51.849168 ME: Current Operation State : 1
1688 14:01:51.852969 ME: Current Operation Mode : 0
1689 14:01:51.855798 ME: Error Code : 0
1690 14:01:51.859228 ME: CPU Debug Disabled : YES
1691 14:01:51.862518 ME: TXT Support : NO
1692 14:01:51.869184 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 14:01:51.875640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 14:01:51.876216 CBFS @ c08000 size 3f8000
1695 14:01:51.882268 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 14:01:51.885426 CBFS: Locating 'fallback/dsdt.aml'
1697 14:01:51.888765 CBFS: Found @ offset 10bb80 size 3fa5
1698 14:01:51.895455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 14:01:51.898476 CBFS @ c08000 size 3f8000
1700 14:01:51.901948 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 14:01:51.905084 CBFS: Locating 'fallback/slic'
1702 14:01:51.910861 CBFS: 'fallback/slic' not found.
1703 14:01:51.917116 ACPI: Writing ACPI tables at 99b3e000.
1704 14:01:51.917548 ACPI: * FACS
1705 14:01:51.920276 ACPI: * DSDT
1706 14:01:51.923578 Ramoops buffer: 0x100000@0x99a3d000.
1707 14:01:51.927150 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 14:01:51.933577 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 14:01:51.936835 Google Chrome EC: version:
1710 14:01:51.940708 ro: helios_v2.0.2659-56403530b
1711 14:01:51.943513 rw: helios_v2.0.2849-c41de27e7d
1712 14:01:51.943951 running image: 1
1713 14:01:51.948119 ACPI: * FADT
1714 14:01:51.948560 SCI is IRQ9
1715 14:01:51.954402 ACPI: added table 1/32, length now 40
1716 14:01:51.954846 ACPI: * SSDT
1717 14:01:51.957580 Found 1 CPU(s) with 8 core(s) each.
1718 14:01:51.961116 Error: Could not locate 'wifi_sar' in VPD.
1719 14:01:51.967490 Checking CBFS for default SAR values
1720 14:01:51.970940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 14:01:51.974241 CBFS @ c08000 size 3f8000
1722 14:01:51.980916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 14:01:51.984119 CBFS: Locating 'wifi_sar_defaults.hex'
1724 14:01:51.987299 CBFS: Found @ offset 5fac0 size 77
1725 14:01:51.990672 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 14:01:51.997221 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 14:01:52.000569 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 14:01:52.007211 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 14:01:52.010738 failed to find key in VPD: dsm_calib_r0_0
1730 14:01:52.020631 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 14:01:52.024021 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 14:01:52.030107 failed to find key in VPD: dsm_calib_r0_1
1733 14:01:52.037237 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 14:01:52.043584 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 14:01:52.046749 failed to find key in VPD: dsm_calib_r0_2
1736 14:01:52.056746 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 14:01:52.059856 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 14:01:52.066550 failed to find key in VPD: dsm_calib_r0_3
1739 14:01:52.073147 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 14:01:52.079878 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 14:01:52.082902 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 14:01:52.089904 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 14:01:52.093099 EC returned error result code 1
1744 14:01:52.096729 EC returned error result code 1
1745 14:01:52.100253 EC returned error result code 1
1746 14:01:52.103522 PS2K: Bad resp from EC. Vivaldi disabled!
1747 14:01:52.109868 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 14:01:52.116637 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 14:01:52.119766 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 14:01:52.126356 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 14:01:52.129749 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 14:01:52.136337 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 14:01:52.143059 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 14:01:52.149430 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 14:01:52.152733 ACPI: added table 2/32, length now 44
1756 14:01:52.155828 ACPI: * MCFG
1757 14:01:52.159065 ACPI: added table 3/32, length now 48
1758 14:01:52.159548 ACPI: * TPM2
1759 14:01:52.162744 TPM2 log created at 99a2d000
1760 14:01:52.166078 ACPI: added table 4/32, length now 52
1761 14:01:52.169298 ACPI: * MADT
1762 14:01:52.169764 SCI is IRQ9
1763 14:01:52.172920 ACPI: added table 5/32, length now 56
1764 14:01:52.176213 current = 99b43ac0
1765 14:01:52.176677 ACPI: * DMAR
1766 14:01:52.182403 ACPI: added table 6/32, length now 60
1767 14:01:52.182874 ACPI: * IGD OpRegion
1768 14:01:52.185577 GMA: Found VBT in CBFS
1769 14:01:52.188899 GMA: Found valid VBT in CBFS
1770 14:01:52.192258 ACPI: added table 7/32, length now 64
1771 14:01:52.192719 ACPI: * HPET
1772 14:01:52.199041 ACPI: added table 8/32, length now 68
1773 14:01:52.199522 ACPI: done.
1774 14:01:52.202295 ACPI tables: 31744 bytes.
1775 14:01:52.205780 smbios_write_tables: 99a2c000
1776 14:01:52.209170 EC returned error result code 3
1777 14:01:52.212059 Couldn't obtain OEM name from CBI
1778 14:01:52.215789 Create SMBIOS type 17
1779 14:01:52.219581 PCI: 00:00.0 (Intel Cannonlake)
1780 14:01:52.220045 PCI: 00:14.3 (Intel WiFi)
1781 14:01:52.222156 SMBIOS tables: 939 bytes.
1782 14:01:52.228763 Writing table forward entry at 0x00000500
1783 14:01:52.231906 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 14:01:52.238697 Writing coreboot table at 0x99b62000
1785 14:01:52.242162 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 14:01:52.248578 1. 0000000000001000-000000000009ffff: RAM
1787 14:01:52.251423 2. 00000000000a0000-00000000000fffff: RESERVED
1788 14:01:52.255022 3. 0000000000100000-0000000099a2bfff: RAM
1789 14:01:52.261585 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 14:01:52.268427 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 14:01:52.271869 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 14:01:52.277971 7. 000000009a000000-000000009f7fffff: RESERVED
1793 14:01:52.281150 8. 00000000e0000000-00000000efffffff: RESERVED
1794 14:01:52.287824 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 14:01:52.291310 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 14:01:52.297719 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 14:01:52.301098 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 14:01:52.307649 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 14:01:52.311529 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 14:01:52.314744 15. 0000000100000000-000000045e7fffff: RAM
1801 14:01:52.321132 Graphics framebuffer located at 0xc0000000
1802 14:01:52.321653 Passing 5 GPIOs to payload:
1803 14:01:52.327888 NAME | PORT | POLARITY | VALUE
1804 14:01:52.333955 write protect | undefined | high | low
1805 14:01:52.337183 lid | undefined | high | high
1806 14:01:52.344101 power | undefined | high | low
1807 14:01:52.347182 oprom | undefined | high | low
1808 14:01:52.354123 EC in RW | 0x000000cb | high | low
1809 14:01:52.354649 Board ID: 4
1810 14:01:52.360730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 14:01:52.363914 CBFS @ c08000 size 3f8000
1812 14:01:52.366867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 14:01:52.373715 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6244
1814 14:01:52.376778 coreboot table: 1492 bytes.
1815 14:01:52.380337 IMD ROOT 0. 99fff000 00001000
1816 14:01:52.383776 IMD SMALL 1. 99ffe000 00001000
1817 14:01:52.387245 FSP MEMORY 2. 99c4e000 003b0000
1818 14:01:52.390223 CONSOLE 3. 99c2e000 00020000
1819 14:01:52.393471 FMAP 4. 99c2d000 0000054e
1820 14:01:52.396637 TIME STAMP 5. 99c2c000 00000910
1821 14:01:52.399969 VBOOT WORK 6. 99c18000 00014000
1822 14:01:52.403478 MRC DATA 7. 99c16000 00001958
1823 14:01:52.406834 ROMSTG STCK 8. 99c15000 00001000
1824 14:01:52.410408 AFTER CAR 9. 99c0b000 0000a000
1825 14:01:52.413367 RAMSTAGE 10. 99baf000 0005c000
1826 14:01:52.416664 REFCODE 11. 99b7a000 00035000
1827 14:01:52.420171 SMM BACKUP 12. 99b6a000 00010000
1828 14:01:52.423603 COREBOOT 13. 99b62000 00008000
1829 14:01:52.426740 ACPI 14. 99b3e000 00024000
1830 14:01:52.430985 ACPI GNVS 15. 99b3d000 00001000
1831 14:01:52.433313 RAMOOPS 16. 99a3d000 00100000
1832 14:01:52.436806 TPM2 TCGLOG17. 99a2d000 00010000
1833 14:01:52.440284 SMBIOS 18. 99a2c000 00000800
1834 14:01:52.443579 IMD small region:
1835 14:01:52.446966 IMD ROOT 0. 99ffec00 00000400
1836 14:01:52.450341 FSP RUNTIME 1. 99ffebe0 00000004
1837 14:01:52.453190 EC HOSTEVENT 2. 99ffebc0 00000008
1838 14:01:52.456470 POWER STATE 3. 99ffeb80 00000040
1839 14:01:52.460206 ROMSTAGE 4. 99ffeb60 00000004
1840 14:01:52.463158 MEM INFO 5. 99ffe9a0 000001b9
1841 14:01:52.466766 VPD 6. 99ffe940 0000004c
1842 14:01:52.470312 MTRR: Physical address space:
1843 14:01:52.476936 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 14:01:52.483125 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 14:01:52.490122 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 14:01:52.496357 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 14:01:52.502751 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 14:01:52.506151 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 14:01:52.512739 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 14:01:52.519366 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 14:01:52.522421 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 14:01:52.525864 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 14:01:52.529132 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 14:01:52.535729 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 14:01:52.539531 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 14:01:52.542725 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 14:01:52.545584 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 14:01:52.551983 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 14:01:52.555990 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 14:01:52.559097 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 14:01:52.562739 call enable_fixed_mtrr()
1862 14:01:52.566193 CPU physical address size: 39 bits
1863 14:01:52.568967 MTRR: default type WB/UC MTRR counts: 6/8.
1864 14:01:52.572027 MTRR: WB selected as default type.
1865 14:01:52.578666 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 14:01:52.585316 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 14:01:52.592146 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 14:01:52.598547 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 14:01:52.605486 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 14:01:52.612077 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 14:01:52.615189 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 14:01:52.618634 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 14:01:52.624982 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 14:01:52.628187 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 14:01:52.631829 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 14:01:52.634933 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 14:01:52.642208 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 14:01:52.644980 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 14:01:52.648392 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 14:01:52.651700 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 14:01:52.657868 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 14:01:52.658303
1883 14:01:52.658642 MTRR check
1884 14:01:52.661576 Fixed MTRRs : Enabled
1885 14:01:52.664808 Variable MTRRs: Enabled
1886 14:01:52.665224
1887 14:01:52.665564 call enable_fixed_mtrr()
1888 14:01:52.671852 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1889 14:01:52.674524 CPU physical address size: 39 bits
1890 14:01:52.681246 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1891 14:01:52.684975 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 14:01:52.687704 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 14:01:52.691071 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 14:01:52.697788 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 14:01:52.701140 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 14:01:52.704459 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 14:01:52.707875 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 14:01:52.714116 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 14:01:52.717978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 14:01:52.720863 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 14:01:52.724330 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 14:01:52.731319 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 14:01:52.731762 call enable_fixed_mtrr()
1904 14:01:52.737670 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 14:01:52.741377 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 14:01:52.745219 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 14:01:52.747566 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 14:01:52.754242 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 14:01:52.757463 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 14:01:52.761482 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 14:01:52.764449 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 14:01:52.767924 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 14:01:52.773819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 14:01:52.777224 CPU physical address size: 39 bits
1915 14:01:52.780532 call enable_fixed_mtrr()
1916 14:01:52.783709 CBFS @ c08000 size 3f8000
1917 14:01:52.787105 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1918 14:01:52.794103 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:01:52.797393 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 14:01:52.800289 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 14:01:52.804341 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 14:01:52.807078 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 14:01:52.813703 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 14:01:52.816771 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 14:01:52.820263 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 14:01:52.823828 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 14:01:52.829983 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 14:01:52.833943 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 14:01:52.836700 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 14:01:52.840055 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 14:01:52.843358 call enable_fixed_mtrr()
1932 14:01:52.846742 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 14:01:52.853210 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 14:01:52.856326 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 14:01:52.859897 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 14:01:52.862973 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 14:01:52.869921 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 14:01:52.873008 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 14:01:52.876604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 14:01:52.879537 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 14:01:52.886342 CPU physical address size: 39 bits
1942 14:01:52.886788 call enable_fixed_mtrr()
1943 14:01:52.889459 CPU physical address size: 39 bits
1944 14:01:52.896335 CPU physical address size: 39 bits
1945 14:01:52.899539 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 14:01:52.902718 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 14:01:52.905922 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 14:01:52.909219 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 14:01:52.916014 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 14:01:52.919161 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 14:01:52.922408 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 14:01:52.926085 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 14:01:52.932487 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 14:01:52.935876 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 14:01:52.939160 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 14:01:52.942529 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 14:01:52.948852 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 14:01:52.949318 call enable_fixed_mtrr()
1959 14:01:52.955263 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 14:01:52.958690 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 14:01:52.962292 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 14:01:52.965339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 14:01:52.971765 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 14:01:52.975362 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 14:01:52.978324 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 14:01:52.982134 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 14:01:52.988628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 14:01:52.991699 CPU physical address size: 39 bits
1969 14:01:52.995392 call enable_fixed_mtrr()
1970 14:01:52.998355 CBFS: Locating 'fallback/payload'
1971 14:01:53.001712 CPU physical address size: 39 bits
1972 14:01:53.004919 CBFS: Found @ offset 1c96c0 size 3f798
1973 14:01:53.008315 Checking segment from ROM address 0xffdd16f8
1974 14:01:53.015091 Checking segment from ROM address 0xffdd1714
1975 14:01:53.018928 Loading segment from ROM address 0xffdd16f8
1976 14:01:53.022180 code (compression=0)
1977 14:01:53.028300 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 14:01:53.038182 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 14:01:53.038631 it's not compressed!
1980 14:01:53.131662 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 14:01:53.137898 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 14:01:53.144746 Loading segment from ROM address 0xffdd1714
1983 14:01:53.145226 Entry Point 0x30000000
1984 14:01:53.148091 Loaded segments
1985 14:01:53.153832 Finalizing chipset.
1986 14:01:53.157150 Finalizing SMM.
1987 14:01:53.160422 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1988 14:01:53.163425 mp_park_aps done after 0 msecs.
1989 14:01:53.170201 Jumping to boot code at 30000000(99b62000)
1990 14:01:53.176744 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 14:01:53.177209
1992 14:01:53.180180 Starting depthcharge on Helios...
1993 14:01:53.181288 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
1994 14:01:53.181819 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1995 14:01:53.182264 Setting prompt string to ['hatch:']
1996 14:01:53.182674 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1997 14:01:53.190274 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1998 14:01:53.196459 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1999 14:01:53.203547 board_setup: Info: eMMC controller not present; skipping
2000 14:01:53.206871 New NVMe Controller 0x30053ac0 @ 00:1d:00
2001 14:01:53.213177 board_setup: Info: SDHCI controller not present; skipping
2002 14:01:53.219642 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2003 14:01:53.220083 Wipe memory regions:
2004 14:01:53.222937 [0x00000000001000, 0x000000000a0000)
2005 14:01:53.226453 [0x00000000100000, 0x00000030000000)
2006 14:01:53.296005 [0x00000030657430, 0x00000099a2c000)
2007 14:01:53.446339 [0x00000100000000, 0x0000045e800000)
2008 14:01:54.902245 R8152: Initializing
2009 14:01:54.905372 Version 9 (ocp_data = 6010)
2010 14:01:54.910059 R8152: Done initializing
2011 14:01:54.913186 Adding net device
2012 14:01:55.288072 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2013 14:01:55.288590
2014 14:01:55.289453 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2016 14:01:55.391170 hatch: tftpboot 192.168.201.1 6961091/tftp-deploy-fdjj5b8x/kernel/bzImage 6961091/tftp-deploy-fdjj5b8x/kernel/cmdline 6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
2017 14:01:55.391737 Setting prompt string to 'Starting kernel'
2018 14:01:55.392322 Setting prompt string to ['Starting kernel']
2019 14:01:55.392876 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2020 14:01:55.393499 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2021 14:01:55.397081 tftpboot 192.168.201.1 6961091/tftp-deploy-fdjj5b8x/kernel/bzImaoy-fdjj5b8x/kernel/cmdline 6961091/tftp-deploy-fdjj5b8x/ramdisk/ramdisk.cpio.gz
2022 14:01:55.397206 Waiting for link
2023 14:01:55.597564 done.
2024 14:01:55.598056 MAC: f4:f5:e8:50:e3:ec
2025 14:01:55.600501 Sending DHCP discover... done.
2026 14:01:55.604110 Waiting for reply... done.
2027 14:01:55.607253 Sending DHCP request... done.
2028 14:01:55.614012 Waiting for reply... done.
2029 14:01:55.614458 My ip is 192.168.201.10
2030 14:01:55.620885 The DHCP server ip is 192.168.201.1
2031 14:01:55.624303 TFTP server IP predefined by user: 192.168.201.1
2032 14:01:55.630776 Bootfile predefined by user: 6961091/tftp-deploy-fdjj5b8x/kernel/bzImage
2033 14:01:55.634463 Sending tftp read request... done.
2034 14:01:55.640487 Waiting for the transfer...
2035 14:01:55.902511 00000000 ################################################################
2036 14:01:56.161888 00080000 ################################################################
2037 14:01:56.411716 00100000 ################################################################
2038 14:01:56.652548 00180000 ################################################################
2039 14:01:56.902533 00200000 ################################################################
2040 14:01:57.139993 00280000 ################################################################
2041 14:01:57.378450 00300000 ################################################################
2042 14:01:57.647976 00380000 ################################################################
2043 14:01:57.930574 00400000 ################################################################
2044 14:01:58.212363 00480000 ################################################################
2045 14:01:58.456053 00500000 ################################################################
2046 14:01:58.724928 00580000 ################################################################
2047 14:01:58.972630 00600000 ################################################################ done.
2048 14:01:58.975996 The bootfile was 6815632 bytes long.
2049 14:01:58.979194 Sending tftp read request... done.
2050 14:01:58.982568 Waiting for the transfer...
2051 14:01:59.267485 00000000 ################################################################
2052 14:01:59.540612 00080000 ################################################################
2053 14:01:59.785652 00100000 ################################################################
2054 14:02:00.059884 00180000 ################################################################
2055 14:02:00.332561 00200000 ################################################################
2056 14:02:00.600973 00280000 ################################################################
2057 14:02:00.861579 00300000 ################################################################
2058 14:02:01.114944 00380000 ################################################################
2059 14:02:01.351977 00400000 ################################################################
2060 14:02:01.595932 00480000 ################################################################
2061 14:02:01.708686 00500000 ############################## done.
2062 14:02:01.711913 Sending tftp read request... done.
2063 14:02:01.715361 Waiting for the transfer...
2064 14:02:01.718674 00000000 # done.
2065 14:02:01.725311 Command line loaded dynamically from TFTP file: 6961091/tftp-deploy-fdjj5b8x/kernel/cmdline
2066 14:02:01.748398 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6961091/extract-nfsrootfs-50yew0ly,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2067 14:02:01.755012 ec_init(0): CrosEC protocol v3 supported (256, 256)
2068 14:02:01.763198 Shutting down all USB controllers.
2069 14:02:01.763294 Removing current net device
2070 14:02:01.766433 Finalizing coreboot
2071 14:02:01.773303 Exiting depthcharge with code 4 at timestamp: 15869409
2072 14:02:01.773405
2073 14:02:01.773482 Starting kernel ...
2074 14:02:01.773553
2075 14:02:01.773862 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2076 14:02:01.773970 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2077 14:02:01.774055 Setting prompt string to ['Linux version [0-9]']
2078 14:02:01.774132 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2079 14:02:01.774209 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2080 14:02:01.776294
2082 14:06:34.774873 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2084 14:06:34.775912 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2086 14:06:34.776706 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2089 14:06:34.778377 end: 2 depthcharge-action (duration 00:05:00) [common]
2091 14:06:34.779482 Cleaning after the job
2092 14:06:34.779616 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/ramdisk
2093 14:06:34.780123 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/kernel
2094 14:06:34.780652 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/nfsrootfs
2095 14:06:34.830851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961091/tftp-deploy-fdjj5b8x/modules
2096 14:06:34.831192 start: 4.1 power-off (timeout 00:00:30) [common]
2097 14:06:34.831372 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2098 14:06:34.852416 >> Command sent successfully.
2099 14:06:34.854377 Returned 0 in 0 seconds
2100 14:06:34.955695 end: 4.1 power-off (duration 00:00:00) [common]
2102 14:06:34.957899 start: 4.2 read-feedback (timeout 00:10:00) [common]
2103 14:06:34.958971 Listened to connection for namespace 'common' for up to 1s
2104 14:06:35.827203 Listened to connection for namespace 'common' for up to 1s
2105 14:06:35.830522 Listened to connection for namespace 'common' for up to 1s
2106 14:06:35.833503 Listened to connection for namespace 'common' for up to 1s
2107 14:06:35.837419 Listened to connection for namespace 'common' for up to 1s
2108 14:06:35.840514 Listened to connection for namespace 'common' for up to 1s
2109 14:06:35.843875 Listened to connection for namespace 'common' for up to 1s
2110 14:06:35.847015 Listened to connection for namespace 'common' for up to 1s
2111 14:06:35.850563 Listened to connection for namespace 'common' for up to 1s
2112 14:06:35.853482 Listened to connection for namespace 'common' for up to 1s
2113 14:06:35.857227 Listened to connection for namespace 'common' for up to 1s
2114 14:06:35.863735 Listened to connection for namespace 'common' for up to 1s
2115 14:06:35.866574 Listened to connection for namespace 'common' for up to 1s
2116 14:06:35.959216 Finalising connection for namespace 'common'
2117 14:06:35.959933 Disconnecting from shell: Finalise
2118 14:06:35.960410
2119 14:06:36.061898 end: 4.2 read-feedback (duration 00:00:01) [common]
2120 14:06:36.062494 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6961091
2121 14:06:36.228082 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6961091
2122 14:06:36.228284 JobError: Your job cannot terminate cleanly.