Boot log: acer-cb317-1h-c3z6-dedede

    1 07:04:38.299610  lava-dispatcher, installed at version: 2022.11
    2 07:04:38.299812  start: 0 validate
    3 07:04:38.299944  Start time: 2023-02-07 07:04:38.299937+00:00 (UTC)
    4 07:04:38.300078  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:04:38.300209  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
    6 07:04:38.307294  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:04:38.307434  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:04:38.315000  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:04:38.315125  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 07:04:38.323473  validate duration: 0.02
   12 07:04:38.323730  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 07:04:38.323861  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 07:04:38.323992  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 07:04:38.324105  Not decompressing ramdisk as can be used compressed.
   16 07:04:38.324294  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
   17 07:04:38.324428  saving as /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/ramdisk/rootfs.cpio.gz
   18 07:04:38.324492  total size: 8423718 (8MB)
   19 07:04:38.335387  progress   0% (0MB)
   20 07:04:38.354395  progress   5% (0MB)
   21 07:04:38.370761  progress  10% (0MB)
   22 07:04:38.388207  progress  15% (1MB)
   23 07:04:38.406261  progress  20% (1MB)
   24 07:04:38.425199  progress  25% (2MB)
   25 07:04:38.440760  progress  30% (2MB)
   26 07:04:38.459572  progress  35% (2MB)
   27 07:04:38.472501  progress  40% (3MB)
   28 07:04:38.496227  progress  45% (3MB)
   29 07:04:38.534445  progress  50% (4MB)
   30 07:04:38.568414  progress  55% (4MB)
   31 07:04:38.607528  progress  60% (4MB)
   32 07:04:38.640600  progress  65% (5MB)
   33 07:04:38.679009  progress  70% (5MB)
   34 07:04:38.712265  progress  75% (6MB)
   35 07:04:38.747049  progress  80% (6MB)
   36 07:04:38.784554  progress  85% (6MB)
   37 07:04:38.819258  progress  90% (7MB)
   38 07:04:38.854188  progress  95% (7MB)
   39 07:04:38.869305  progress 100% (8MB)
   40 07:04:38.869928  8MB downloaded in 0.55s (14.73MB/s)
   41 07:04:38.870441  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 07:04:38.871348  end: 1.1 download-retry (duration 00:00:01) [common]
   44 07:04:38.871677  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 07:04:38.872001  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 07:04:38.872385  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 07:04:38.872655  saving as /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/kernel/bzImage
   48 07:04:38.872912  total size: 7573392 (7MB)
   49 07:04:38.873150  No compression specified
   50 07:04:38.878094  progress   0% (0MB)
   51 07:04:38.888324  progress   5% (0MB)
   52 07:04:38.897726  progress  10% (0MB)
   53 07:04:38.906957  progress  15% (1MB)
   54 07:04:38.916396  progress  20% (1MB)
   55 07:04:38.925554  progress  25% (1MB)
   56 07:04:38.935362  progress  30% (2MB)
   57 07:04:38.945526  progress  35% (2MB)
   58 07:04:38.954904  progress  40% (2MB)
   59 07:04:38.965878  progress  45% (3MB)
   60 07:04:38.975469  progress  50% (3MB)
   61 07:04:38.984847  progress  55% (4MB)
   62 07:04:38.994083  progress  60% (4MB)
   63 07:04:39.004066  progress  65% (4MB)
   64 07:04:39.013274  progress  70% (5MB)
   65 07:04:39.022675  progress  75% (5MB)
   66 07:04:39.031909  progress  80% (5MB)
   67 07:04:39.043066  progress  85% (6MB)
   68 07:04:39.052443  progress  90% (6MB)
   69 07:04:39.061849  progress  95% (6MB)
   70 07:04:39.070694  progress 100% (7MB)
   71 07:04:39.070868  7MB downloaded in 0.20s (36.49MB/s)
   72 07:04:39.071025  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 07:04:39.071265  end: 1.2 download-retry (duration 00:00:00) [common]
   75 07:04:39.071355  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 07:04:39.071445  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 07:04:39.071553  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 07:04:39.071622  saving as /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/modules/modules.tar
   79 07:04:39.071684  total size: 54868 (0MB)
   80 07:04:39.071746  Using unxz to decompress xz
   81 07:04:39.076786  progress  59% (0MB)
   82 07:04:39.077162  progress 100% (0MB)
   83 07:04:39.080607  0MB downloaded in 0.01s (5.87MB/s)
   84 07:04:39.080850  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 07:04:39.081160  end: 1.3 download-retry (duration 00:00:00) [common]
   87 07:04:39.081277  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   88 07:04:39.081394  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   89 07:04:39.081503  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 07:04:39.081611  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   91 07:04:39.081804  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8
   92 07:04:39.081938  makedir: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin
   93 07:04:39.082043  makedir: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/tests
   94 07:04:39.082148  makedir: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/results
   95 07:04:39.082283  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-add-keys
   96 07:04:39.082442  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-add-sources
   97 07:04:39.082584  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-background-process-start
   98 07:04:39.082725  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-background-process-stop
   99 07:04:39.082863  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-common-functions
  100 07:04:39.082998  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-echo-ipv4
  101 07:04:39.083132  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-install-packages
  102 07:04:39.083270  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-installed-packages
  103 07:04:39.083402  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-os-build
  104 07:04:39.083532  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-probe-channel
  105 07:04:39.083667  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-probe-ip
  106 07:04:39.083797  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-target-ip
  107 07:04:39.083927  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-target-mac
  108 07:04:39.084057  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-target-storage
  109 07:04:39.084190  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-case
  110 07:04:39.084331  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-event
  111 07:04:39.084465  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-feedback
  112 07:04:39.084597  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-raise
  113 07:04:39.084732  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-reference
  114 07:04:39.084863  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-runner
  115 07:04:39.085002  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-set
  116 07:04:39.085165  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-test-shell
  117 07:04:39.085302  Updating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-install-packages (oe)
  118 07:04:39.085436  Updating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/bin/lava-installed-packages (oe)
  119 07:04:39.085566  Creating /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/environment
  120 07:04:39.085693  LAVA metadata
  121 07:04:39.085786  - LAVA_JOB_ID=9045543
  122 07:04:39.085877  - LAVA_DISPATCHER_IP=192.168.201.1
  123 07:04:39.086019  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  124 07:04:39.086100  skipped lava-vland-overlay
  125 07:04:39.086224  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 07:04:39.086340  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  127 07:04:39.086423  skipped lava-multinode-overlay
  128 07:04:39.086533  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 07:04:39.086666  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  130 07:04:39.086773  Loading test definitions
  131 07:04:39.086905  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  132 07:04:39.087004  Using /lava-9045543 at stage 0
  133 07:04:39.087336  uuid=9045543_1.4.2.3.1 testdef=None
  134 07:04:39.087450  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 07:04:39.087576  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  136 07:04:39.088147  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 07:04:39.088446  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  139 07:04:39.089097  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 07:04:39.089389  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  142 07:04:39.090014  runner path: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/0/tests/0_dmesg test_uuid 9045543_1.4.2.3.1
  143 07:04:39.090197  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 07:04:39.090489  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  146 07:04:39.090585  Using /lava-9045543 at stage 1
  147 07:04:39.090889  uuid=9045543_1.4.2.3.5 testdef=None
  148 07:04:39.091007  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 07:04:39.091121  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  150 07:04:39.091648  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 07:04:39.091933  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  153 07:04:39.092609  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 07:04:39.092873  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  156 07:04:39.093485  runner path: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/1/tests/1_bootrr test_uuid 9045543_1.4.2.3.5
  157 07:04:39.093644  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 07:04:39.093876  Creating lava-test-runner.conf files
  160 07:04:39.093947  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/0 for stage 0
  161 07:04:39.094037  - 0_dmesg
  162 07:04:39.094118  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045543/lava-overlay-ajeg89d8/lava-9045543/1 for stage 1
  163 07:04:39.094208  - 1_bootrr
  164 07:04:39.094308  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 07:04:39.094410  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  166 07:04:39.101122  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 07:04:39.101242  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  168 07:04:39.101344  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 07:04:39.101441  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 07:04:39.101536  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  171 07:04:39.287421  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 07:04:39.287773  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  173 07:04:39.287896  extracting modules file /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045543/extract-overlay-ramdisk-e9b3oakw/ramdisk
  174 07:04:39.292223  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 07:04:39.292347  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  176 07:04:39.292442  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045543/compress-overlay-sl9atxgx/overlay-1.4.2.4.tar.gz to ramdisk
  177 07:04:39.292532  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045543/compress-overlay-sl9atxgx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045543/extract-overlay-ramdisk-e9b3oakw/ramdisk
  178 07:04:39.296370  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 07:04:39.296509  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  180 07:04:39.296615  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 07:04:39.296726  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  182 07:04:39.296818  Building ramdisk /var/lib/lava/dispatcher/tmp/9045543/extract-overlay-ramdisk-e9b3oakw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045543/extract-overlay-ramdisk-e9b3oakw/ramdisk
  183 07:04:39.360830  >> 48158 blocks

  184 07:04:40.106353  rename /var/lib/lava/dispatcher/tmp/9045543/extract-overlay-ramdisk-e9b3oakw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz
  185 07:04:40.106795  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 07:04:40.106933  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  187 07:04:40.107052  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  188 07:04:40.107164  No mkimage arch provided, not using FIT.
  189 07:04:40.107273  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 07:04:40.107382  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 07:04:40.107500  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 07:04:40.107615  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  193 07:04:40.107703  No LXC device requested
  194 07:04:40.107805  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 07:04:40.107915  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  196 07:04:40.108019  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 07:04:40.108101  Checking files for TFTP limit of 4294967296 bytes.
  198 07:04:40.108563  end: 1 tftp-deploy (duration 00:00:02) [common]
  199 07:04:40.108682  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 07:04:40.108798  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 07:04:40.108944  substitutions:
  202 07:04:40.109022  - {DTB}: None
  203 07:04:40.109106  - {INITRD}: 9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz
  204 07:04:40.109184  - {KERNEL}: 9045543/tftp-deploy-wp4op99g/kernel/bzImage
  205 07:04:40.109261  - {LAVA_MAC}: None
  206 07:04:40.109340  - {PRESEED_CONFIG}: None
  207 07:04:40.109417  - {PRESEED_LOCAL}: None
  208 07:04:40.109492  - {RAMDISK}: 9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz
  209 07:04:40.109566  - {ROOT_PART}: None
  210 07:04:40.109643  - {ROOT}: None
  211 07:04:40.109716  - {SERVER_IP}: 192.168.201.1
  212 07:04:40.109789  - {TEE}: None
  213 07:04:40.109862  Parsed boot commands:
  214 07:04:40.109935  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 07:04:40.110113  Parsed boot commands: tftpboot 192.168.201.1 9045543/tftp-deploy-wp4op99g/kernel/bzImage 9045543/tftp-deploy-wp4op99g/kernel/cmdline 9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz
  216 07:04:40.110224  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 07:04:40.110335  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 07:04:40.110447  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 07:04:40.110555  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 07:04:40.110637  Not connected, no need to disconnect.
  221 07:04:40.110737  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 07:04:40.110841  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 07:04:40.110919  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-1'
  224 07:04:40.113860  Setting prompt string to ['lava-test: # ']
  225 07:04:40.114162  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 07:04:40.114282  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 07:04:40.114397  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 07:04:40.114509  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 07:04:40.114922  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
  230 07:04:49.446488  >> Command sent successfully.

  231 07:04:49.456680  Returned 0 in 9 seconds
  232 07:04:49.558301  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 07:04:49.559963  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 07:04:49.560586  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 07:04:49.561091  Setting prompt string to 'Starting depthcharge on Magolor...'
  237 07:04:49.561475  Changing prompt to 'Starting depthcharge on Magolor...'
  238 07:04:49.561882  depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
  239 07:04:49.563321  [Enter `^Ec?' for help]

  240 07:04:49.563778  

  241 07:04:49.564157  

  242 07:04:49.564615  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...

  243 07:04:49.565014  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz

  244 07:04:49.565363  CPU: ID 906c0, Jasperlake A0, ucode: 2400001f

  245 07:04:49.565704  CPU: AES supported, TXT NOT supported, VT supported

  246 07:04:49.566045  MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1

  247 07:04:49.566430  PCH: device id 4d87 (rev 01) is Jasperlake Super

  248 07:04:49.566766  IGD: device id 4e55 (rev 01) is Jasperlake GT4

  249 07:04:49.567094  VBOOT: Loading verstage.

  250 07:04:49.567477  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  251 07:04:49.567814  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32

  252 07:04:49.568146  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  253 07:04:49.568535  CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec

  254 07:04:49.568869  

  255 07:04:49.569191  

  256 07:04:49.569727  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...

  257 07:04:49.570096  Probing TPM: . done!

  258 07:04:49.570427  TPM ready after 0 ms

  259 07:04:49.570755  Connected to device vid:did:rid of 1ae0:0028:00

  260 07:04:49.571089  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  261 07:04:49.571425  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  262 07:04:49.571756  Initialized TPM device CR50 revision 0

  263 07:04:49.572080  tlcl_send_startup: Startup return code is 0

  264 07:04:49.572442  TPM: setup succeeded

  265 07:04:49.572775  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  266 07:04:49.573103  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  267 07:04:49.573432  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  268 07:04:49.573765  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  269 07:04:49.574087  Chrome EC: UHEPI supported

  270 07:04:49.574416  Phase 1

  271 07:04:49.574741  FMAP: area GBB found @ c05000 (12288 bytes)

  272 07:04:49.575070  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  273 07:04:49.575398  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  274 07:04:49.575724  Recovery requested (1009000e)

  275 07:04:49.576045  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 07:04:49.576428  tlcl_extend: response is 0

  277 07:04:49.576862  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 07:04:49.577200  tlcl_extend: response is 0

  279 07:04:49.577526  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  280 07:04:49.577856  CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4

  281 07:04:49.578179  BS: verstage times (exec / console): total (unknown) / 124 ms

  282 07:04:49.578502  

  283 07:04:49.578821  

  284 07:04:49.579205  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...

  285 07:04:49.579548  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 07:04:49.579875  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 07:04:49.580200  gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000

  288 07:04:49.580569  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 07:04:49.580898  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  290 07:04:49.581220  gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000

  291 07:04:49.581540  TCO_STS:   0000 0001

  292 07:04:49.581865  GEN_PMCON: d0015038 00002200

  293 07:04:49.582188  GBLRST_CAUSE: 00000000 00000000

  294 07:04:49.582508  prev_sleep_state 5

  295 07:04:49.582830  Boot Count incremented to 6276

  296 07:04:49.583149  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  297 07:04:49.583474  CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000

  298 07:04:49.583796  Chrome EC: UHEPI supported

  299 07:04:49.584116  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  300 07:04:49.584487  Probing TPM:  done!

  301 07:04:49.584818  Connected to device vid:did:rid of 1ae0:0028:00

  302 07:04:49.585143  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  303 07:04:49.585476  Initialized TPM device CR50 revision 0

  304 07:04:49.585874  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  305 07:04:49.586247  MRC: Hash idx 0x100b comparison successful.

  306 07:04:49.586575  MRC cache found, size 5458

  307 07:04:49.586899  bootmode is set to: 2

  308 07:04:49.587223  SPD INDEX = 0

  309 07:04:49.587543  CBFS: Found 'spd.bin' @0x40c40 size 0x600

  310 07:04:49.587867  SPD: module type is LPDDR4X

  311 07:04:49.588189  SPD: module part number is MT53E512M32D2NP-046 WT:E

  312 07:04:49.588572  SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb

  313 07:04:49.588854  SPD: device width 16 bits, bus width 32 bits

  314 07:04:49.589083  SPD: module size is 4096 MB (per channel)

  315 07:04:49.589313  meminit_channels: DRAM half-populated

  316 07:04:49.589541  CBMEM:

  317 07:04:49.589769  IMD: root @ 0x76fff000 254 entries.

  318 07:04:49.589994  IMD: root @ 0x76ffec00 62 entries.

  319 07:04:49.590226  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  320 07:04:49.590458  WARNING: RO_VPD is uninitialized or empty.

  321 07:04:49.590687  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

  322 07:04:49.590917  External stage cache:

  323 07:04:49.591145  IMD: root @ 0x7b3ff000 254 entries.

  324 07:04:49.591373  IMD: root @ 0x7b3fec00 62 entries.

  325 07:04:49.591600  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)

  326 07:04:49.591831  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  327 07:04:49.592102  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  328 07:04:49.592373  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  329 07:04:49.592645  cse_lite: Skip switching to RW in the recovery path

  330 07:04:49.592895  1 DIMMs found

  331 07:04:49.593130  SMM Memory Map

  332 07:04:49.593358  SMRAM       : 0x7b000000 0x800000

  333 07:04:49.593877   Subregion 0: 0x7b000000 0x200000

  334 07:04:49.594086   Subregion 1: 0x7b200000 0x200000

  335 07:04:49.594260   Subregion 2: 0x7b400000 0x400000

  336 07:04:49.594431  top_of_ram = 0x77000000

  337 07:04:49.594603  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  338 07:04:49.594775  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  339 07:04:49.594945  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  340 07:04:49.595114  CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c

  341 07:04:49.595283  Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)

  342 07:04:49.595455  Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90

  343 07:04:49.595628  Processing 188 relocs. Offset value of 0x74c0e000

  344 07:04:49.595854  BS: romstage times (exec / console): total (unknown) / 255 ms

  345 07:04:49.596100  

  346 07:04:49.596276  

  347 07:04:49.596496  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...

  348 07:04:49.596673  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  349 07:04:49.596846  CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488

  350 07:04:49.597017  Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)

  351 07:04:49.597190  Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70

  352 07:04:49.597360  Processing 4805 relocs. Offset value of 0x75da8000

  353 07:04:49.597532  BS: postcar times (exec / console): total (unknown) / 42 ms

  354 07:04:49.597711  

  355 07:04:49.597882  

  356 07:04:49.598050  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...

  357 07:04:49.598220  Normal boot

  358 07:04:49.598414  EC returned error result code 3

  359 07:04:49.598586  FW_CONFIG value is 0x204

  360 07:04:49.598752  GENERIC: 0.0 disabled by fw_config

  361 07:04:49.598885  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  362 07:04:49.599019  I2C: 00:10 disabled by fw_config

  363 07:04:49.599150  I2C: 00:10 disabled by fw_config

  364 07:04:49.599283  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  365 07:04:49.599416  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  366 07:04:49.599550  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  367 07:04:49.599684  fw_config match found: TS_SOURCE=TS_UNPROVISIONED

  368 07:04:49.599900  fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED

  369 07:04:49.600049  I2C: 00:10 disabled by fw_config

  370 07:04:49.600184  fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED

  371 07:04:49.600333  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED

  372 07:04:49.600474  I2C: 00:1a disabled by fw_config

  373 07:04:49.600608  I2C: 00:1a disabled by fw_config

  374 07:04:49.600742  fw_config match found: AUDIO_AMP=UNPROVISIONED

  375 07:04:49.600876  fw_config match found: AUDIO_AMP=UNPROVISIONED

  376 07:04:49.601008  GENERIC: 0.0 disabled by fw_config

  377 07:04:49.601142  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  378 07:04:49.601276  CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000

  379 07:04:49.601410  microcode: sig=0x906c0 pf=0x1 revision=0x2400001f

  380 07:04:49.601543  microcode: Update skipped, already up-to-date

  381 07:04:49.601677  CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906

  382 07:04:49.611344  Detected 2 core, 2 thread CPU.

  383 07:04:49.614460  Setting up SMI for CPU

  384 07:04:49.618246  IED base = 0x7b400000

  385 07:04:49.618500  IED size = 0x00400000

  386 07:04:49.620763  Will perform SMM setup.

  387 07:04:49.624639  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.

  388 07:04:49.634390  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  389 07:04:49.637713  Processing 16 relocs. Offset value of 0x00030000

  390 07:04:49.641465  Attempting to start 1 APs

  391 07:04:49.644941  Waiting for 10ms after sending INIT.

  392 07:04:49.661193  Waiting for 1st SIPI to complete...done.

  393 07:04:49.661642  AP: slot 1 apic_id 2.

  394 07:04:49.667544  Waiting for 2nd SIPI to complete...done.

  395 07:04:49.674636  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  396 07:04:49.680872  Processing 13 relocs. Offset value of 0x00038000

  397 07:04:49.681455  Unable to locate Global NVS

  398 07:04:49.691294  SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)

  399 07:04:49.694127  Installing permanent SMM handler to 0x7b000000

  400 07:04:49.704045  Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10

  401 07:04:49.707255  Processing 704 relocs. Offset value of 0x7b010000

  402 07:04:49.714068  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  403 07:04:49.721091  Processing 13 relocs. Offset value of 0x7b008000

  404 07:04:49.727302  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  405 07:04:49.730657  Unable to locate Global NVS

  406 07:04:49.737362  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)

  407 07:04:49.740880  Clearing SMI status registers

  408 07:04:49.741332  SMI_STS: PM1 

  409 07:04:49.743726  PM1_STS: PWRBTN 

  410 07:04:49.744177  TCO_STS: INTRD_DET 

  411 07:04:49.747331  GPE0 STD STS: 

  412 07:04:49.754468  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  413 07:04:49.757646  In relocation handler: CPU 0

  414 07:04:49.760499  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  415 07:04:49.768219  Writing SMRR. base = 0x7b000006, mask=0xff800800

  416 07:04:49.768792  Relocation complete.

  417 07:04:49.776224  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  418 07:04:49.779122  In relocation handler: CPU 1

  419 07:04:49.782463  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  420 07:04:49.785882  Writing SMRR. base = 0x7b000006, mask=0xff800800

  421 07:04:49.788924  Relocation complete.

  422 07:04:49.792665  Initializing CPU #0

  423 07:04:49.795687  CPU: vendor Intel device 906c0

  424 07:04:49.798994  CPU: family 06, model 9c, stepping 00

  425 07:04:49.802562  Clearing out pending MCEs

  426 07:04:49.803169  Setting up local APIC...

  427 07:04:49.805892   apic_id: 0x00 done.

  428 07:04:49.809328  Turbo is available but hidden

  429 07:04:49.812307  Turbo is available and visible

  430 07:04:49.815830  microcode: Update skipped, already up-to-date

  431 07:04:49.819154  CPU #0 initialized

  432 07:04:49.822488  Initializing CPU #1

  433 07:04:49.825827  CPU: vendor Intel device 906c0

  434 07:04:49.829210  CPU: family 06, model 9c, stepping 00

  435 07:04:49.829809  Clearing out pending MCEs

  436 07:04:49.832963  Setting up local APIC...

  437 07:04:49.835490   apic_id: 0x02 done.

  438 07:04:49.839150  microcode: Update skipped, already up-to-date

  439 07:04:49.842382  CPU #1 initialized

  440 07:04:49.845450  bsp_do_flight_plan done after 175 msecs.

  441 07:04:49.848847  CPU: frequency set to 2800 MHz

  442 07:04:49.852272  Enabling SMIs.

  443 07:04:49.855906  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms

  444 07:04:49.867239  Probing TPM:  done!

  445 07:04:49.873812  Connected to device vid:did:rid of 1ae0:0028:00

  446 07:04:49.884036  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  447 07:04:49.887065  Initialized TPM device CR50 revision 0

  448 07:04:49.890666  CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc

  449 07:04:49.897665  Found a VBT of 7680 bytes after decompression

  450 07:04:49.903797  WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called

  451 07:04:49.939597  Detected 2 core, 2 thread CPU.

  452 07:04:49.942388  Detected 2 core, 2 thread CPU.

  453 07:04:50.305690  Display FSP Version Info HOB

  454 07:04:50.309059  Reference Code - CPU = 8.7.22.30

  455 07:04:50.312016  uCode Version = 24.0.0.1f

  456 07:04:50.315429  TXT ACM version = ff.ff.ff.ffff

  457 07:04:50.318637  Reference Code - ME = 8.7.22.30

  458 07:04:50.322155  MEBx version = 0.0.0.0

  459 07:04:50.325498  ME Firmware Version = Consumer SKU

  460 07:04:50.328700  Reference Code - PCH = 8.7.22.30

  461 07:04:50.332176  PCH-CRID Status = Disabled

  462 07:04:50.335321  PCH-CRID Original Value = ff.ff.ff.ffff

  463 07:04:50.338733  PCH-CRID New Value = ff.ff.ff.ffff

  464 07:04:50.342007  OPROM - RST - RAID = ff.ff.ff.ffff

  465 07:04:50.345718  PCH Hsio Version = 4.0.0.0

  466 07:04:50.349220  Reference Code - SA - System Agent = 8.7.22.30

  467 07:04:50.353334  Reference Code - MRC = 0.0.4.68

  468 07:04:50.356754  SA - PCIe Version = 8.7.22.30

  469 07:04:50.359834  SA-CRID Status = Disabled

  470 07:04:50.363741  SA-CRID Original Value = 0.0.0.0

  471 07:04:50.364085  SA-CRID New Value = 0.0.0.0

  472 07:04:50.368145  OPROM - VBIOS = ff.ff.ff.ffff

  473 07:04:50.374157  IO Manageability Engine FW Version = ff.ff.ff.ffff

  474 07:04:50.377880  PHY Build Version = ff.ff.ff.ffff

  475 07:04:50.381208  Thunderbolt(TM) FW Version = ff.ff.ff.ffff

  476 07:04:50.387941  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  477 07:04:50.391429  ITSS IRQ Polarities Before:

  478 07:04:50.392017  IPC0: 0xffffffff

  479 07:04:50.393985  IPC1: 0xffffffff

  480 07:04:50.394511  IPC2: 0xffffffff

  481 07:04:50.398381  IPC3: 0xffffffff

  482 07:04:50.398866  ITSS IRQ Polarities After:

  483 07:04:50.400675  IPC0: 0xffffffff

  484 07:04:50.404355  IPC1: 0xffffffff

  485 07:04:50.404840  IPC2: 0xffffffff

  486 07:04:50.407207  IPC3: 0xffffffff

  487 07:04:50.417648  pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.

  488 07:04:50.424198  BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms

  489 07:04:50.427699  Enumerating buses...

  490 07:04:50.430745  Show all devs... Before device enumeration.

  491 07:04:50.433631  Root Device: enabled 1

  492 07:04:50.437293  CPU_CLUSTER: 0: enabled 1

  493 07:04:50.437912  DOMAIN: 0000: enabled 1

  494 07:04:50.440682  PCI: 00:00.0: enabled 1

  495 07:04:50.444376  PCI: 00:02.0: enabled 1

  496 07:04:50.447233  PCI: 00:04.0: enabled 1

  497 07:04:50.447731  PCI: 00:05.0: enabled 1

  498 07:04:50.451323  PCI: 00:09.0: enabled 0

  499 07:04:50.453750  PCI: 00:12.6: enabled 0

  500 07:04:50.454247  PCI: 00:14.0: enabled 1

  501 07:04:50.457255  PCI: 00:14.1: enabled 0

  502 07:04:50.460253  PCI: 00:14.2: enabled 0

  503 07:04:50.463981  PCI: 00:14.3: enabled 1

  504 07:04:50.464607  PCI: 00:14.5: enabled 1

  505 07:04:50.467160  PCI: 00:15.0: enabled 1

  506 07:04:50.470853  PCI: 00:15.1: enabled 1

  507 07:04:50.474938  PCI: 00:15.2: enabled 1

  508 07:04:50.475427  PCI: 00:15.3: enabled 1

  509 07:04:50.477802  PCI: 00:16.0: enabled 1

  510 07:04:50.480496  PCI: 00:16.1: enabled 0

  511 07:04:50.483918  PCI: 00:16.4: enabled 0

  512 07:04:50.484531  PCI: 00:16.5: enabled 0

  513 07:04:50.487624  PCI: 00:17.0: enabled 0

  514 07:04:50.490406  PCI: 00:19.0: enabled 1

  515 07:04:50.490990  PCI: 00:19.1: enabled 0

  516 07:04:50.493705  PCI: 00:19.2: enabled 1

  517 07:04:50.497141  PCI: 00:1a.0: enabled 1

  518 07:04:50.500828  PCI: 00:1c.0: enabled 0

  519 07:04:50.501392  PCI: 00:1c.1: enabled 0

  520 07:04:50.504431  PCI: 00:1c.2: enabled 0

  521 07:04:50.507053  PCI: 00:1c.3: enabled 0

  522 07:04:50.510397  PCI: 00:1c.4: enabled 0

  523 07:04:50.511031  PCI: 00:1c.5: enabled 0

  524 07:04:50.513722  PCI: 00:1c.6: enabled 0

  525 07:04:50.516996  PCI: 00:1c.7: enabled 1

  526 07:04:50.517486  PCI: 00:1e.0: enabled 0

  527 07:04:50.520420  PCI: 00:1e.1: enabled 0

  528 07:04:50.523833  PCI: 00:1e.2: enabled 1

  529 07:04:50.526842  PCI: 00:1e.3: enabled 0

  530 07:04:50.527289  PCI: 00:1f.0: enabled 1

  531 07:04:50.530443  PCI: 00:1f.1: enabled 1

  532 07:04:50.533590  PCI: 00:1f.2: enabled 1

  533 07:04:50.537538  PCI: 00:1f.3: enabled 1

  534 07:04:50.538091  PCI: 00:1f.4: enabled 0

  535 07:04:50.540783  PCI: 00:1f.5: enabled 1

  536 07:04:50.543993  PCI: 00:1f.7: enabled 0

  537 07:04:50.546823  GENERIC: 0.0: enabled 1

  538 07:04:50.547305  GENERIC: 0.0: enabled 1

  539 07:04:50.550414  USB0 port 0: enabled 1

  540 07:04:50.553749  GENERIC: 0.0: enabled 1

  541 07:04:50.554204  I2C: 00:2c: enabled 1

  542 07:04:50.556955  I2C: 00:15: enabled 1

  543 07:04:50.560068  GENERIC: 0.0: enabled 0

  544 07:04:50.560692  I2C: 00:15: enabled 1

  545 07:04:50.563179  I2C: 00:10: enabled 0

  546 07:04:50.566765  I2C: 00:10: enabled 0

  547 07:04:50.570149  I2C: 00:2c: enabled 1

  548 07:04:50.570618  I2C: 00:40: enabled 1

  549 07:04:50.573381  I2C: 00:10: enabled 1

  550 07:04:50.577702  I2C: 00:39: enabled 1

  551 07:04:50.578245  I2C: 00:36: enabled 1

  552 07:04:50.580016  I2C: 00:10: enabled 0

  553 07:04:50.583430  I2C: 00:0c: enabled 1

  554 07:04:50.583949  I2C: 00:50: enabled 1

  555 07:04:50.586991  I2C: 00:1a: enabled 1

  556 07:04:50.590812  I2C: 00:1a: enabled 0

  557 07:04:50.591331  I2C: 00:1a: enabled 0

  558 07:04:50.593146  I2C: 00:28: enabled 1

  559 07:04:50.596987  I2C: 00:29: enabled 1

  560 07:04:50.597511  PCI: 00:00.0: enabled 1

  561 07:04:50.600409  SPI: 00: enabled 1

  562 07:04:50.603495  PNP: 0c09.0: enabled 1

  563 07:04:50.604067  GENERIC: 0.0: enabled 0

  564 07:04:50.606610  USB2 port 0: enabled 1

  565 07:04:50.610024  USB2 port 1: enabled 1

  566 07:04:50.610581  USB2 port 2: enabled 1

  567 07:04:50.613780  USB2 port 3: enabled 1

  568 07:04:50.616641  USB2 port 4: enabled 0

  569 07:04:50.620238  USB2 port 5: enabled 1

  570 07:04:50.620847  USB2 port 6: enabled 0

  571 07:04:50.623305  USB2 port 7: enabled 1

  572 07:04:50.626605  USB3 port 0: enabled 1

  573 07:04:50.627182  USB3 port 1: enabled 1

  574 07:04:50.629907  USB3 port 2: enabled 1

  575 07:04:50.633437  USB3 port 3: enabled 1

  576 07:04:50.633887  APIC: 00: enabled 1

  577 07:04:50.636935  APIC: 02: enabled 1

  578 07:04:50.640013  Compare with tree...

  579 07:04:50.640557  Root Device: enabled 1

  580 07:04:50.642997   CPU_CLUSTER: 0: enabled 1

  581 07:04:50.646354    APIC: 00: enabled 1

  582 07:04:50.650291    APIC: 02: enabled 1

  583 07:04:50.650886   DOMAIN: 0000: enabled 1

  584 07:04:50.653421    PCI: 00:00.0: enabled 1

  585 07:04:50.656702    PCI: 00:02.0: enabled 1

  586 07:04:50.660167    PCI: 00:04.0: enabled 1

  587 07:04:50.660822     GENERIC: 0.0: enabled 1

  588 07:04:50.663196    PCI: 00:05.0: enabled 1

  589 07:04:50.666696     GENERIC: 0.0: enabled 1

  590 07:04:50.669710    PCI: 00:09.0: enabled 0

  591 07:04:50.673282    PCI: 00:12.6: enabled 0

  592 07:04:50.673780    PCI: 00:14.0: enabled 1

  593 07:04:50.676469     USB0 port 0: enabled 1

  594 07:04:50.679807      USB2 port 0: enabled 1

  595 07:04:50.682939      USB2 port 1: enabled 1

  596 07:04:50.686477      USB2 port 2: enabled 1

  597 07:04:50.689812      USB2 port 3: enabled 1

  598 07:04:50.690378      USB2 port 4: enabled 0

  599 07:04:50.693066      USB2 port 5: enabled 1

  600 07:04:50.696446      USB2 port 6: enabled 0

  601 07:04:50.699574      USB2 port 7: enabled 1

  602 07:04:50.703042      USB3 port 0: enabled 1

  603 07:04:50.703543      USB3 port 1: enabled 1

  604 07:04:50.706326      USB3 port 2: enabled 1

  605 07:04:50.709885      USB3 port 3: enabled 1

  606 07:04:50.713675    PCI: 00:14.1: enabled 0

  607 07:04:50.716930    PCI: 00:14.2: enabled 0

  608 07:04:50.717507    PCI: 00:14.3: enabled 1

  609 07:04:50.719883     GENERIC: 0.0: enabled 1

  610 07:04:50.723150    PCI: 00:14.5: enabled 1

  611 07:04:50.726553    PCI: 00:15.0: enabled 1

  612 07:04:50.730349     I2C: 00:2c: enabled 1

  613 07:04:50.730851     I2C: 00:15: enabled 1

  614 07:04:50.733972    PCI: 00:15.1: enabled 1

  615 07:04:50.736502    PCI: 00:15.2: enabled 1

  616 07:04:50.740302     GENERIC: 0.0: enabled 0

  617 07:04:50.743293     I2C: 00:15: enabled 1

  618 07:04:50.743745     I2C: 00:10: enabled 0

  619 07:04:50.746376     I2C: 00:10: enabled 0

  620 07:04:50.749840     I2C: 00:2c: enabled 1

  621 07:04:50.753246     I2C: 00:40: enabled 1

  622 07:04:50.753699     I2C: 00:10: enabled 1

  623 07:04:50.756280     I2C: 00:39: enabled 1

  624 07:04:50.759625    PCI: 00:15.3: enabled 1

  625 07:04:50.763345     I2C: 00:36: enabled 1

  626 07:04:50.763801     I2C: 00:10: enabled 0

  627 07:04:50.766442     I2C: 00:0c: enabled 1

  628 07:04:50.769588     I2C: 00:50: enabled 1

  629 07:04:50.773535    PCI: 00:16.0: enabled 1

  630 07:04:50.776336    PCI: 00:16.1: enabled 0

  631 07:04:50.776802    PCI: 00:16.4: enabled 0

  632 07:04:50.779782    PCI: 00:16.5: enabled 0

  633 07:04:50.784149    PCI: 00:17.0: enabled 0

  634 07:04:50.785994    PCI: 00:19.0: enabled 1

  635 07:04:50.786445     I2C: 00:1a: enabled 1

  636 07:04:50.789334     I2C: 00:1a: enabled 0

  637 07:04:50.792826     I2C: 00:1a: enabled 0

  638 07:04:50.795956     I2C: 00:28: enabled 1

  639 07:04:50.796442     I2C: 00:29: enabled 1

  640 07:04:50.799513    PCI: 00:19.1: enabled 0

  641 07:04:50.802701    PCI: 00:19.2: enabled 1

  642 07:04:50.806026    PCI: 00:1a.0: enabled 1

  643 07:04:50.809363    PCI: 00:1e.0: enabled 0

  644 07:04:50.809882    PCI: 00:1e.1: enabled 0

  645 07:04:50.813360    PCI: 00:1e.2: enabled 1

  646 07:04:50.816256     SPI: 00: enabled 1

  647 07:04:50.819403    PCI: 00:1e.3: enabled 0

  648 07:04:50.819855    PCI: 00:1f.0: enabled 1

  649 07:04:50.822986     PNP: 0c09.0: enabled 1

  650 07:04:50.826322    PCI: 00:1f.1: enabled 1

  651 07:04:50.829796    PCI: 00:1f.2: enabled 1

  652 07:04:50.833029    PCI: 00:1f.3: enabled 1

  653 07:04:50.833570     GENERIC: 0.0: enabled 0

  654 07:04:50.836539    PCI: 00:1f.4: enabled 0

  655 07:04:50.839678    PCI: 00:1f.5: enabled 1

  656 07:04:50.842764    PCI: 00:1f.7: enabled 0

  657 07:04:50.846004  Root Device scanning...

  658 07:04:50.849299  scan_static_bus for Root Device

  659 07:04:50.849760  CPU_CLUSTER: 0 enabled

  660 07:04:50.852808  DOMAIN: 0000 enabled

  661 07:04:50.856514  DOMAIN: 0000 scanning...

  662 07:04:50.859480  PCI: pci_scan_bus for bus 00

  663 07:04:50.862311  PCI: 00:00.0 [8086/0000] ops

  664 07:04:50.865943  PCI: 00:00.0 [8086/4e22] enabled

  665 07:04:50.869384  PCI: 00:02.0 [8086/0000] bus ops

  666 07:04:50.872546  PCI: 00:02.0 [8086/4e55] enabled

  667 07:04:50.875921  PCI: 00:04.0 [8086/0000] bus ops

  668 07:04:50.879198  PCI: 00:04.0 [8086/4e03] enabled

  669 07:04:50.882786  PCI: 00:05.0 [8086/0000] bus ops

  670 07:04:50.886120  PCI: 00:05.0 [8086/4e19] enabled

  671 07:04:50.889541  PCI: 00:08.0 [8086/4e11] enabled

  672 07:04:50.892404  PCI: 00:14.0 [8086/0000] bus ops

  673 07:04:50.895872  PCI: 00:14.0 [8086/4ded] enabled

  674 07:04:50.899117  PCI: 00:14.2 [8086/4def] disabled

  675 07:04:50.902406  PCI: 00:14.3 [8086/0000] bus ops

  676 07:04:50.905664  PCI: 00:14.3 [8086/4df0] enabled

  677 07:04:50.906112  PCI: 00:14.5 [8086/0000] ops

  678 07:04:50.909929  PCI: 00:14.5 [8086/4df8] enabled

  679 07:04:50.912627  PCI: 00:15.0 [8086/0000] bus ops

  680 07:04:50.915867  PCI: 00:15.0 [8086/4de8] enabled

  681 07:04:50.919461  PCI: 00:15.1 [8086/0000] bus ops

  682 07:04:50.922326  PCI: 00:15.1 [8086/4de9] enabled

  683 07:04:50.926087  PCI: 00:15.2 [8086/0000] bus ops

  684 07:04:50.928910  PCI: 00:15.2 [8086/4dea] enabled

  685 07:04:50.932422  PCI: 00:15.3 [8086/0000] bus ops

  686 07:04:50.935968  PCI: 00:15.3 [8086/4deb] enabled

  687 07:04:50.939317  PCI: 00:16.0 [8086/0000] ops

  688 07:04:50.942432  PCI: 00:16.0 [8086/4de0] enabled

  689 07:04:50.945933  PCI: 00:19.0 [8086/0000] bus ops

  690 07:04:50.949120  PCI: 00:19.0 [8086/4dc5] enabled

  691 07:04:50.952337  PCI: 00:19.2 [8086/0000] ops

  692 07:04:50.955796  PCI: 00:19.2 [8086/4dc7] enabled

  693 07:04:50.959358  PCI: 00:1a.0 [8086/0000] ops

  694 07:04:50.962419  PCI: 00:1a.0 [8086/4dc4] enabled

  695 07:04:50.965950  PCI: 00:1e.0 [8086/0000] ops

  696 07:04:50.968841  PCI: 00:1e.0 [8086/4da8] disabled

  697 07:04:50.972280  PCI: 00:1e.2 [8086/0000] bus ops

  698 07:04:50.975614  PCI: 00:1e.2 [8086/4daa] enabled

  699 07:04:50.979089  PCI: 00:1f.0 [8086/0000] bus ops

  700 07:04:50.982619  PCI: 00:1f.0 [8086/4d87] enabled

  701 07:04:50.989508  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  702 07:04:50.990038  RTC Init

  703 07:04:50.992281  Set power on after power failure.

  704 07:04:50.995612  Disabling Deep S3

  705 07:04:50.996059  Disabling Deep S3

  706 07:04:50.998632  Disabling Deep S4

  707 07:04:50.999073  Disabling Deep S4

  708 07:04:51.002260  Disabling Deep S5

  709 07:04:51.002814  Disabling Deep S5

  710 07:04:51.005308  PCI: 00:1f.2 [0000/0000] hidden

  711 07:04:51.009248  PCI: 00:1f.3 [8086/0000] bus ops

  712 07:04:51.012389  PCI: 00:1f.3 [8086/4dc8] enabled

  713 07:04:51.015723  PCI: 00:1f.5 [8086/0000] bus ops

  714 07:04:51.018825  PCI: 00:1f.5 [8086/4da4] enabled

  715 07:04:51.022195  PCI: Leftover static devices:

  716 07:04:51.025182  PCI: 00:12.6

  717 07:04:51.025643  PCI: 00:09.0

  718 07:04:51.029235  PCI: 00:14.1

  719 07:04:51.029674  PCI: 00:16.1

  720 07:04:51.030021  PCI: 00:16.4

  721 07:04:51.033260  PCI: 00:16.5

  722 07:04:51.033742  PCI: 00:17.0

  723 07:04:51.034232  PCI: 00:19.1

  724 07:04:51.036925  PCI: 00:1e.1

  725 07:04:51.037418  PCI: 00:1e.3

  726 07:04:51.037882  PCI: 00:1f.1

  727 07:04:51.040233  PCI: 00:1f.4

  728 07:04:51.040853  PCI: 00:1f.7

  729 07:04:51.043480  PCI: Check your devicetree.cb.

  730 07:04:51.046897  PCI: 00:02.0 scanning...

  731 07:04:51.050166  scan_generic_bus for PCI: 00:02.0

  732 07:04:51.054180  scan_generic_bus for PCI: 00:02.0 done

  733 07:04:51.060291  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  734 07:04:51.060768  PCI: 00:04.0 scanning...

  735 07:04:51.063402  scan_generic_bus for PCI: 00:04.0

  736 07:04:51.067071  GENERIC: 0.0 enabled

  737 07:04:51.073738  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  738 07:04:51.077600  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  739 07:04:51.080059  PCI: 00:05.0 scanning...

  740 07:04:51.083628  scan_generic_bus for PCI: 00:05.0

  741 07:04:51.087315  GENERIC: 0.0 enabled

  742 07:04:51.093712  bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done

  743 07:04:51.096778  scan_bus: bus PCI: 00:05.0 finished in 11 msecs

  744 07:04:51.100008  PCI: 00:14.0 scanning...

  745 07:04:51.103335  scan_static_bus for PCI: 00:14.0

  746 07:04:51.103856  USB0 port 0 enabled

  747 07:04:51.107633  USB0 port 0 scanning...

  748 07:04:51.110178  scan_static_bus for USB0 port 0

  749 07:04:51.113625  USB2 port 0 enabled

  750 07:04:51.114066  USB2 port 1 enabled

  751 07:04:51.117063  USB2 port 2 enabled

  752 07:04:51.120369  USB2 port 3 enabled

  753 07:04:51.120811  USB2 port 4 disabled

  754 07:04:51.123635  USB2 port 5 enabled

  755 07:04:51.126996  USB2 port 6 disabled

  756 07:04:51.127439  USB2 port 7 enabled

  757 07:04:51.130385  USB3 port 0 enabled

  758 07:04:51.130829  USB3 port 1 enabled

  759 07:04:51.133608  USB3 port 2 enabled

  760 07:04:51.137076  USB3 port 3 enabled

  761 07:04:51.137520  USB2 port 0 scanning...

  762 07:04:51.140398  scan_static_bus for USB2 port 0

  763 07:04:51.144091  scan_static_bus for USB2 port 0 done

  764 07:04:51.150435  scan_bus: bus USB2 port 0 finished in 6 msecs

  765 07:04:51.153402  USB2 port 1 scanning...

  766 07:04:51.156832  scan_static_bus for USB2 port 1

  767 07:04:51.160133  scan_static_bus for USB2 port 1 done

  768 07:04:51.164173  scan_bus: bus USB2 port 1 finished in 6 msecs

  769 07:04:51.167575  USB2 port 2 scanning...

  770 07:04:51.170356  scan_static_bus for USB2 port 2

  771 07:04:51.173516  scan_static_bus for USB2 port 2 done

  772 07:04:51.177243  scan_bus: bus USB2 port 2 finished in 6 msecs

  773 07:04:51.180410  USB2 port 3 scanning...

  774 07:04:51.183766  scan_static_bus for USB2 port 3

  775 07:04:51.187259  scan_static_bus for USB2 port 3 done

  776 07:04:51.190488  scan_bus: bus USB2 port 3 finished in 6 msecs

  777 07:04:51.193700  USB2 port 5 scanning...

  778 07:04:51.197308  scan_static_bus for USB2 port 5

  779 07:04:51.200419  scan_static_bus for USB2 port 5 done

  780 07:04:51.206926  scan_bus: bus USB2 port 5 finished in 6 msecs

  781 07:04:51.207490  USB2 port 7 scanning...

  782 07:04:51.210277  scan_static_bus for USB2 port 7

  783 07:04:51.216616  scan_static_bus for USB2 port 7 done

  784 07:04:51.220236  scan_bus: bus USB2 port 7 finished in 6 msecs

  785 07:04:51.223711  USB3 port 0 scanning...

  786 07:04:51.226928  scan_static_bus for USB3 port 0

  787 07:04:51.230073  scan_static_bus for USB3 port 0 done

  788 07:04:51.233780  scan_bus: bus USB3 port 0 finished in 6 msecs

  789 07:04:51.236819  USB3 port 1 scanning...

  790 07:04:51.240547  scan_static_bus for USB3 port 1

  791 07:04:51.243330  scan_static_bus for USB3 port 1 done

  792 07:04:51.247061  scan_bus: bus USB3 port 1 finished in 6 msecs

  793 07:04:51.250509  USB3 port 2 scanning...

  794 07:04:51.253225  scan_static_bus for USB3 port 2

  795 07:04:51.256863  scan_static_bus for USB3 port 2 done

  796 07:04:51.263571  scan_bus: bus USB3 port 2 finished in 6 msecs

  797 07:04:51.264070  USB3 port 3 scanning...

  798 07:04:51.266961  scan_static_bus for USB3 port 3

  799 07:04:51.270478  scan_static_bus for USB3 port 3 done

  800 07:04:51.276838  scan_bus: bus USB3 port 3 finished in 6 msecs

  801 07:04:51.280559  scan_static_bus for USB0 port 0 done

  802 07:04:51.283582  scan_bus: bus USB0 port 0 finished in 172 msecs

  803 07:04:51.290521  scan_static_bus for PCI: 00:14.0 done

  804 07:04:51.293451  scan_bus: bus PCI: 00:14.0 finished in 189 msecs

  805 07:04:51.297601  PCI: 00:14.3 scanning...

  806 07:04:51.300148  scan_static_bus for PCI: 00:14.3

  807 07:04:51.300676  GENERIC: 0.0 enabled

  808 07:04:51.306748  scan_static_bus for PCI: 00:14.3 done

  809 07:04:51.310154  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  810 07:04:51.313936  PCI: 00:15.0 scanning...

  811 07:04:51.317092  scan_static_bus for PCI: 00:15.0

  812 07:04:51.317627  I2C: 00:2c enabled

  813 07:04:51.320109  I2C: 00:15 enabled

  814 07:04:51.323716  scan_static_bus for PCI: 00:15.0 done

  815 07:04:51.330314  scan_bus: bus PCI: 00:15.0 finished in 11 msecs

  816 07:04:51.330878  PCI: 00:15.1 scanning...

  817 07:04:51.334035  scan_static_bus for PCI: 00:15.1

  818 07:04:51.340247  scan_static_bus for PCI: 00:15.1 done

  819 07:04:51.343202  scan_bus: bus PCI: 00:15.1 finished in 7 msecs

  820 07:04:51.346551  PCI: 00:15.2 scanning...

  821 07:04:51.349994  scan_static_bus for PCI: 00:15.2

  822 07:04:51.350490  GENERIC: 0.0 disabled

  823 07:04:51.353330  I2C: 00:15 enabled

  824 07:04:51.356770  I2C: 00:10 disabled

  825 07:04:51.357286  I2C: 00:10 disabled

  826 07:04:51.360615  I2C: 00:2c enabled

  827 07:04:51.361115  I2C: 00:40 enabled

  828 07:04:51.363340  I2C: 00:10 enabled

  829 07:04:51.366658  I2C: 00:39 enabled

  830 07:04:51.370103  scan_static_bus for PCI: 00:15.2 done

  831 07:04:51.373227  scan_bus: bus PCI: 00:15.2 finished in 23 msecs

  832 07:04:51.376850  PCI: 00:15.3 scanning...

  833 07:04:51.380149  scan_static_bus for PCI: 00:15.3

  834 07:04:51.383361  I2C: 00:36 enabled

  835 07:04:51.384025  I2C: 00:10 disabled

  836 07:04:51.386661  I2C: 00:0c enabled

  837 07:04:51.387265  I2C: 00:50 enabled

  838 07:04:51.393696  scan_static_bus for PCI: 00:15.3 done

  839 07:04:51.396484  scan_bus: bus PCI: 00:15.3 finished in 14 msecs

  840 07:04:51.399792  PCI: 00:19.0 scanning...

  841 07:04:51.403710  scan_static_bus for PCI: 00:19.0

  842 07:04:51.404302  I2C: 00:1a enabled

  843 07:04:51.406679  I2C: 00:1a disabled

  844 07:04:51.409929  I2C: 00:1a disabled

  845 07:04:51.410522  I2C: 00:28 enabled

  846 07:04:51.413258  I2C: 00:29 enabled

  847 07:04:51.416680  scan_static_bus for PCI: 00:19.0 done

  848 07:04:51.420101  scan_bus: bus PCI: 00:19.0 finished in 17 msecs

  849 07:04:51.423543  PCI: 00:1e.2 scanning...

  850 07:04:51.426868  scan_generic_bus for PCI: 00:1e.2

  851 07:04:51.430229  SPI: 00 enabled

  852 07:04:51.433077  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

  853 07:04:51.439911  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

  854 07:04:51.443319  PCI: 00:1f.0 scanning...

  855 07:04:51.446252  scan_static_bus for PCI: 00:1f.0

  856 07:04:51.446751  PNP: 0c09.0 enabled

  857 07:04:51.449427  PNP: 0c09.0 scanning...

  858 07:04:51.453056  scan_static_bus for PNP: 0c09.0

  859 07:04:51.456260  scan_static_bus for PNP: 0c09.0 done

  860 07:04:51.462722  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

  861 07:04:51.467026  scan_static_bus for PCI: 00:1f.0 done

  862 07:04:51.469892  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

  863 07:04:51.473159  PCI: 00:1f.3 scanning...

  864 07:04:51.476377  scan_static_bus for PCI: 00:1f.3

  865 07:04:51.479954  GENERIC: 0.0 disabled

  866 07:04:51.482909  scan_static_bus for PCI: 00:1f.3 done

  867 07:04:51.486718  scan_bus: bus PCI: 00:1f.3 finished in 9 msecs

  868 07:04:51.489692  PCI: 00:1f.5 scanning...

  869 07:04:51.492758  scan_generic_bus for PCI: 00:1f.5

  870 07:04:51.496233  scan_generic_bus for PCI: 00:1f.5 done

  871 07:04:51.502653  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

  872 07:04:51.506473  scan_bus: bus DOMAIN: 0000 finished in 646 msecs

  873 07:04:51.509578  scan_static_bus for Root Device done

  874 07:04:51.516206  scan_bus: bus Root Device finished in 665 msecs

  875 07:04:51.516827  done

  876 07:04:51.522747  BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms

  877 07:04:51.526164  Chrome EC: UHEPI supported

  878 07:04:51.533001  FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)

  879 07:04:51.536456  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

  880 07:04:51.539515  SPI flash protection: WPSW=0 SRP0=1

  881 07:04:51.546196  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

  882 07:04:51.552866  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

  883 07:04:51.553373  found VGA at PCI: 00:02.0

  884 07:04:51.556143  Setting up VGA for PCI: 00:02.0

  885 07:04:51.562448  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

  886 07:04:51.566060  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

  887 07:04:51.569616  Allocating resources...

  888 07:04:51.572476  Reading resources...

  889 07:04:51.576034  Root Device read_resources bus 0 link: 0

  890 07:04:51.579551  CPU_CLUSTER: 0 read_resources bus 0 link: 0

  891 07:04:51.586003  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

  892 07:04:51.589303  DOMAIN: 0000 read_resources bus 0 link: 0

  893 07:04:51.595814  PCI: 00:04.0 read_resources bus 1 link: 0

  894 07:04:51.599563  PCI: 00:04.0 read_resources bus 1 link: 0 done

  895 07:04:51.605844  PCI: 00:05.0 read_resources bus 2 link: 0

  896 07:04:51.610265  PCI: 00:05.0 read_resources bus 2 link: 0 done

  897 07:04:51.613636  PCI: 00:14.0 read_resources bus 0 link: 0

  898 07:04:51.617444  USB0 port 0 read_resources bus 0 link: 0

  899 07:04:51.626622  USB0 port 0 read_resources bus 0 link: 0 done

  900 07:04:51.630080  PCI: 00:14.0 read_resources bus 0 link: 0 done

  901 07:04:51.633144  PCI: 00:14.3 read_resources bus 0 link: 0

  902 07:04:51.640210  PCI: 00:14.3 read_resources bus 0 link: 0 done

  903 07:04:51.695285  PCI: 00:15.0 read_resources bus 0 link: 0

  904 07:04:51.695942  PCI: 00:15.0 read_resources bus 0 link: 0 done

  905 07:04:51.696460  PCI: 00:15.2 read_resources bus 0 link: 0

  906 07:04:51.697262  PCI: 00:15.2 read_resources bus 0 link: 0 done

  907 07:04:51.697679  PCI: 00:15.3 read_resources bus 0 link: 0

  908 07:04:51.698044  PCI: 00:15.3 read_resources bus 0 link: 0 done

  909 07:04:51.698397  PCI: 00:19.0 read_resources bus 0 link: 0

  910 07:04:51.698742  PCI: 00:19.0 read_resources bus 0 link: 0 done

  911 07:04:51.699158  PCI: 00:1e.2 read_resources bus 3 link: 0

  912 07:04:51.699505  PCI: 00:1e.2 read_resources bus 3 link: 0 done

  913 07:04:51.699839  PCI: 00:1f.0 read_resources bus 0 link: 0

  914 07:04:51.746470  PCI: 00:1f.0 read_resources bus 0 link: 0 done

  915 07:04:51.747123  PCI: 00:1f.3 read_resources bus 0 link: 0

  916 07:04:51.747608  PCI: 00:1f.3 read_resources bus 0 link: 0 done

  917 07:04:51.748460  DOMAIN: 0000 read_resources bus 0 link: 0 done

  918 07:04:51.748923  Root Device read_resources bus 0 link: 0 done

  919 07:04:51.749337  Done reading resources.

  920 07:04:51.749735  Show resources in subtree (Root Device)...After reading.

  921 07:04:51.750164   Root Device child on link 0 CPU_CLUSTER: 0

  922 07:04:51.750566    CPU_CLUSTER: 0 child on link 0 APIC: 00

  923 07:04:51.750953     APIC: 00

  924 07:04:51.751334     APIC: 02

  925 07:04:51.751758    DOMAIN: 0000 child on link 0 PCI: 00:00.0

  926 07:04:51.796045    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

  927 07:04:51.797123    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

  928 07:04:51.797665     PCI: 00:00.0

  929 07:04:51.798115     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

  930 07:04:51.798893     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

  931 07:04:51.799415     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

  932 07:04:51.802479     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

  933 07:04:51.808818     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

  934 07:04:51.818994     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

  935 07:04:51.828909     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

  936 07:04:51.838660     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

  937 07:04:51.845721     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

  938 07:04:51.855367     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

  939 07:04:51.865535     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

  940 07:04:51.875285     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

  941 07:04:51.885386     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

  942 07:04:51.892556     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

  943 07:04:51.901904     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

  944 07:04:51.912084     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

  945 07:04:51.921695     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

  946 07:04:51.932006     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

  947 07:04:51.942001     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

  948 07:04:51.942522     PCI: 00:02.0

  949 07:04:51.951590     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  950 07:04:51.961652     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

  951 07:04:51.971804     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

  952 07:04:51.975185     PCI: 00:04.0 child on link 0 GENERIC: 0.0

  953 07:04:51.984980     PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  954 07:04:51.988747      GENERIC: 0.0

  955 07:04:51.992298     PCI: 00:05.0 child on link 0 GENERIC: 0.0

  956 07:04:52.001786     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

  957 07:04:52.005004      GENERIC: 0.0

  958 07:04:52.005460     PCI: 00:08.0

  959 07:04:52.015181     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  960 07:04:52.018578     PCI: 00:14.0 child on link 0 USB0 port 0

  961 07:04:52.028258     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

  962 07:04:52.034756      USB0 port 0 child on link 0 USB2 port 0

  963 07:04:52.035344       USB2 port 0

  964 07:04:52.038429       USB2 port 1

  965 07:04:52.039007       USB2 port 2

  966 07:04:52.041701       USB2 port 3

  967 07:04:52.042159       USB2 port 4

  968 07:04:52.044984       USB2 port 5

  969 07:04:52.045440       USB2 port 6

  970 07:04:52.047709       USB2 port 7

  971 07:04:52.051420       USB3 port 0

  972 07:04:52.051874       USB3 port 1

  973 07:04:52.054507       USB3 port 2

  974 07:04:52.054958       USB3 port 3

  975 07:04:52.058263     PCI: 00:14.2

  976 07:04:52.061424     PCI: 00:14.3 child on link 0 GENERIC: 0.0

  977 07:04:52.071339     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

  978 07:04:52.074415      GENERIC: 0.0

  979 07:04:52.074874     PCI: 00:14.5

  980 07:04:52.084454     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  981 07:04:52.087974     PCI: 00:15.0 child on link 0 I2C: 00:2c

  982 07:04:52.098221     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  983 07:04:52.101020      I2C: 00:2c

  984 07:04:52.101556      I2C: 00:15

  985 07:04:52.104533     PCI: 00:15.1

  986 07:04:52.114922     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  987 07:04:52.118089     PCI: 00:15.2 child on link 0 GENERIC: 0.0

  988 07:04:52.127516     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  989 07:04:52.131168      GENERIC: 0.0

  990 07:04:52.131803      I2C: 00:15

  991 07:04:52.132266      I2C: 00:10

  992 07:04:52.134261      I2C: 00:10

  993 07:04:52.134757      I2C: 00:2c

  994 07:04:52.137582      I2C: 00:40

  995 07:04:52.138083      I2C: 00:10

  996 07:04:52.141215      I2C: 00:39

  997 07:04:52.144834     PCI: 00:15.3 child on link 0 I2C: 00:36

  998 07:04:52.154447     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

  999 07:04:52.157549      I2C: 00:36

 1000 07:04:52.158052      I2C: 00:10

 1001 07:04:52.161126      I2C: 00:0c

 1002 07:04:52.161642      I2C: 00:50

 1003 07:04:52.162152     PCI: 00:16.0

 1004 07:04:52.171519     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1005 07:04:52.177737     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1006 07:04:52.187691     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1007 07:04:52.188265      I2C: 00:1a

 1008 07:04:52.190988      I2C: 00:1a

 1009 07:04:52.191593      I2C: 00:1a

 1010 07:04:52.194297      I2C: 00:28

 1011 07:04:52.194932      I2C: 00:29

 1012 07:04:52.198013     PCI: 00:19.2

 1013 07:04:52.207798     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1014 07:04:52.217862     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1015 07:04:52.218381     PCI: 00:1a.0

 1016 07:04:52.227932     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1017 07:04:52.231274     PCI: 00:1e.0

 1018 07:04:52.234160     PCI: 00:1e.2 child on link 0 SPI: 00

 1019 07:04:52.244249     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1020 07:04:52.244885      SPI: 00

 1021 07:04:52.250630     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1022 07:04:52.257289     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1023 07:04:52.261187      PNP: 0c09.0

 1024 07:04:52.270927      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1025 07:04:52.271526     PCI: 00:1f.2

 1026 07:04:52.280490     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1027 07:04:52.291644     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1028 07:04:52.295023     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1029 07:04:52.304677     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1030 07:04:52.314654     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1031 07:04:52.315153      GENERIC: 0.0

 1032 07:04:52.318400     PCI: 00:1f.5

 1033 07:04:52.325098     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1034 07:04:52.334904  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1035 07:04:52.341605  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1036 07:04:52.348043  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1037 07:04:52.354481   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1038 07:04:52.361392   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1039 07:04:52.371575   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1040 07:04:52.374683   DOMAIN: 0000: Resource ranges:

 1041 07:04:52.378191   * Base: 1000, Size: 800, Tag: 100

 1042 07:04:52.381053   * Base: 1900, Size: e700, Tag: 100

 1043 07:04:52.384854    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1044 07:04:52.391224  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1045 07:04:52.398257  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1046 07:04:52.407847   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1047 07:04:52.414255   update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)

 1048 07:04:52.421419   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1049 07:04:52.431086   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1050 07:04:52.437808   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1051 07:04:52.444345   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1052 07:04:52.454224   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1053 07:04:52.461109   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1054 07:04:52.467665   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1055 07:04:52.477474   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1056 07:04:52.483881   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1057 07:04:52.491268   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1058 07:04:52.500561   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1059 07:04:52.507825   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1060 07:04:52.513781   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1061 07:04:52.520468   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1062 07:04:52.530105   update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)

 1063 07:04:52.537092   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1064 07:04:52.543745   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1065 07:04:52.553643   update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)

 1066 07:04:52.560508   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1067 07:04:52.563519   DOMAIN: 0000: Resource ranges:

 1068 07:04:52.567644   * Base: 7fc00000, Size: 40400000, Tag: 200

 1069 07:04:52.573654   * Base: d0000000, Size: 2b000000, Tag: 200

 1070 07:04:52.577229   * Base: fb001000, Size: 2fff000, Tag: 200

 1071 07:04:52.580282   * Base: fe010000, Size: 22000, Tag: 200

 1072 07:04:52.583327   * Base: fe033000, Size: a4d000, Tag: 200

 1073 07:04:52.590672   * Base: fea88000, Size: 2f8000, Tag: 200

 1074 07:04:52.593839   * Base: fed88000, Size: 8000, Tag: 200

 1075 07:04:52.597281   * Base: fed93000, Size: d000, Tag: 200

 1076 07:04:52.600393   * Base: feda2000, Size: 125e000, Tag: 200

 1077 07:04:52.607112   * Base: 180400000, Size: 7e7fc00000, Tag: 100200

 1078 07:04:52.614064    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1079 07:04:52.620850    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1080 07:04:52.626972    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1081 07:04:52.633650    PCI: 00:1f.3 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1082 07:04:52.640488    PCI: 00:04.0 10 *  [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem

 1083 07:04:52.647392    PCI: 00:14.0 10 *  [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem

 1084 07:04:52.654396    PCI: 00:14.3 10 *  [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem

 1085 07:04:52.660522    PCI: 00:1f.3 10 *  [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem

 1086 07:04:52.666922    PCI: 00:08.0 10 *  [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem

 1087 07:04:52.673725    PCI: 00:14.5 10 *  [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem

 1088 07:04:52.680160    PCI: 00:15.0 10 *  [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem

 1089 07:04:52.687043    PCI: 00:15.1 10 *  [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem

 1090 07:04:52.693830    PCI: 00:15.2 10 *  [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem

 1091 07:04:52.700427    PCI: 00:15.3 10 *  [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem

 1092 07:04:52.707293    PCI: 00:16.0 10 *  [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem

 1093 07:04:52.713429    PCI: 00:19.0 10 *  [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem

 1094 07:04:52.720510    PCI: 00:19.2 18 *  [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem

 1095 07:04:52.726680    PCI: 00:1a.0 10 *  [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem

 1096 07:04:52.733656    PCI: 00:1e.2 10 *  [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem

 1097 07:04:52.740688    PCI: 00:1f.5 10 *  [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem

 1098 07:04:52.746951  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1099 07:04:52.753393  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1100 07:04:52.756969  Root Device assign_resources, bus 0 link: 0

 1101 07:04:52.763714  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1102 07:04:52.770535  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1103 07:04:52.780173  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1104 07:04:52.786806  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1105 07:04:52.793569  PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64

 1106 07:04:52.800068  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1107 07:04:52.803252  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1108 07:04:52.813542  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1109 07:04:52.816799  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1110 07:04:52.820655  PCI: 00:05.0 assign_resources, bus 2 link: 0

 1111 07:04:52.830078  PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64

 1112 07:04:52.837299  PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64

 1113 07:04:52.843230  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1114 07:04:52.846591  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1115 07:04:52.856466  PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64

 1116 07:04:52.859905  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1117 07:04:52.863220  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1118 07:04:52.874120  PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64

 1119 07:04:52.880746  PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64

 1120 07:04:52.884083  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1121 07:04:52.890653  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1122 07:04:52.897693  PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64

 1123 07:04:52.907601  PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64

 1124 07:04:52.910727  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1125 07:04:52.914108  PCI: 00:15.2 assign_resources, bus 0 link: 0

 1126 07:04:52.923734  PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64

 1127 07:04:52.927543  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1128 07:04:52.934034  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1129 07:04:52.940550  PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64

 1130 07:04:52.947555  PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64

 1131 07:04:52.953790  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1132 07:04:52.957396  PCI: 00:19.0 assign_resources, bus 0 link: 0

 1133 07:04:52.967405  PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64

 1134 07:04:52.973791  PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64

 1135 07:04:52.983557  PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64

 1136 07:04:52.987097  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1137 07:04:52.990398  PCI: 00:1e.2 assign_resources, bus 3 link: 0

 1138 07:04:52.996875  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1139 07:04:53.000145  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1140 07:04:53.006980  LPC: Trying to open IO window from 800 size 1ff

 1141 07:04:53.013516  PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64

 1142 07:04:53.023720  PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64

 1143 07:04:53.027026  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1144 07:04:53.030522  PCI: 00:1f.3 assign_resources, bus 0 link: 0

 1145 07:04:53.040349  PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem

 1146 07:04:53.043719  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1147 07:04:53.046936  Root Device assign_resources, bus 0 link: 0

 1148 07:04:53.050382  Done setting resources.

 1149 07:04:53.056493  Show resources in subtree (Root Device)...After assigning values.

 1150 07:04:53.060240   Root Device child on link 0 CPU_CLUSTER: 0

 1151 07:04:53.066787    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1152 07:04:53.067342     APIC: 00

 1153 07:04:53.067736     APIC: 02

 1154 07:04:53.073060    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1155 07:04:53.082985    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1156 07:04:53.093525    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1157 07:04:53.094095     PCI: 00:00.0

 1158 07:04:53.103144     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1159 07:04:53.113177     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1160 07:04:53.123200     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1161 07:04:53.130133     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1162 07:04:53.139954     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1163 07:04:53.150364     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1164 07:04:53.160421     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1165 07:04:53.166663     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1166 07:04:53.176449     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1167 07:04:53.186934     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1168 07:04:53.196930     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1169 07:04:53.206746     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1170 07:04:53.216385     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1171 07:04:53.223219     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1172 07:04:53.233591     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1173 07:04:53.243378     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1174 07:04:53.253438     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1175 07:04:53.263549     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1176 07:04:53.269504     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1177 07:04:53.273124     PCI: 00:02.0

 1178 07:04:53.283284     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1179 07:04:53.292908     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1180 07:04:53.303375     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1181 07:04:53.306472     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1182 07:04:53.316152     PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10

 1183 07:04:53.319731      GENERIC: 0.0

 1184 07:04:53.323336     PCI: 00:05.0 child on link 0 GENERIC: 0.0

 1185 07:04:53.337347     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1186 07:04:53.337947      GENERIC: 0.0

 1187 07:04:53.340473     PCI: 00:08.0

 1188 07:04:53.349934     PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10

 1189 07:04:53.353022     PCI: 00:14.0 child on link 0 USB0 port 0

 1190 07:04:53.363349     PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10

 1191 07:04:53.366244      USB0 port 0 child on link 0 USB2 port 0

 1192 07:04:53.369512       USB2 port 0

 1193 07:04:53.370015       USB2 port 1

 1194 07:04:53.372953       USB2 port 2

 1195 07:04:53.376253       USB2 port 3

 1196 07:04:53.376878       USB2 port 4

 1197 07:04:53.379403       USB2 port 5

 1198 07:04:53.379951       USB2 port 6

 1199 07:04:53.382879       USB2 port 7

 1200 07:04:53.383375       USB3 port 0

 1201 07:04:53.386119       USB3 port 1

 1202 07:04:53.386618       USB3 port 2

 1203 07:04:53.389439       USB3 port 3

 1204 07:04:53.389934     PCI: 00:14.2

 1205 07:04:53.395765     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1206 07:04:53.406583     PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10

 1207 07:04:53.407217      GENERIC: 0.0

 1208 07:04:53.409412     PCI: 00:14.5

 1209 07:04:53.419998     PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10

 1210 07:04:53.423114     PCI: 00:15.0 child on link 0 I2C: 00:2c

 1211 07:04:53.432813     PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10

 1212 07:04:53.436125      I2C: 00:2c

 1213 07:04:53.436763      I2C: 00:15

 1214 07:04:53.439334     PCI: 00:15.1

 1215 07:04:53.449179     PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10

 1216 07:04:53.452559     PCI: 00:15.2 child on link 0 GENERIC: 0.0

 1217 07:04:53.462760     PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10

 1218 07:04:53.465837      GENERIC: 0.0

 1219 07:04:53.466330      I2C: 00:15

 1220 07:04:53.469399      I2C: 00:10

 1221 07:04:53.469897      I2C: 00:10

 1222 07:04:53.472899      I2C: 00:2c

 1223 07:04:53.473395      I2C: 00:40

 1224 07:04:53.476101      I2C: 00:10

 1225 07:04:53.476766      I2C: 00:39

 1226 07:04:53.479134     PCI: 00:15.3 child on link 0 I2C: 00:36

 1227 07:04:53.489254     PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10

 1228 07:04:53.492846      I2C: 00:36

 1229 07:04:53.493340      I2C: 00:10

 1230 07:04:53.495633      I2C: 00:0c

 1231 07:04:53.496145      I2C: 00:50

 1232 07:04:53.498786     PCI: 00:16.0

 1233 07:04:53.509066     PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10

 1234 07:04:53.512201     PCI: 00:19.0 child on link 0 I2C: 00:1a

 1235 07:04:53.522548     PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10

 1236 07:04:53.525379      I2C: 00:1a

 1237 07:04:53.525879      I2C: 00:1a

 1238 07:04:53.528487      I2C: 00:1a

 1239 07:04:53.528981      I2C: 00:28

 1240 07:04:53.532234      I2C: 00:29

 1241 07:04:53.532887     PCI: 00:19.2

 1242 07:04:53.546053     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1243 07:04:53.555133     PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18

 1244 07:04:53.555635     PCI: 00:1a.0

 1245 07:04:53.565468     PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10

 1246 07:04:53.568222     PCI: 00:1e.0

 1247 07:04:53.571970     PCI: 00:1e.2 child on link 0 SPI: 00

 1248 07:04:53.581949     PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10

 1249 07:04:53.584892      SPI: 00

 1250 07:04:53.588423     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1251 07:04:53.595595     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1252 07:04:53.598348      PNP: 0c09.0

 1253 07:04:53.608441      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1254 07:04:53.609046     PCI: 00:1f.2

 1255 07:04:53.618102     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1256 07:04:53.627846     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1

 1257 07:04:53.631117     PCI: 00:1f.3 child on link 0 GENERIC: 0.0

 1258 07:04:53.640972     PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10

 1259 07:04:53.651232     PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20

 1260 07:04:53.654513      GENERIC: 0.0

 1261 07:04:53.655010     PCI: 00:1f.5

 1262 07:04:53.664727     PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10

 1263 07:04:53.667957  Done allocating resources.

 1264 07:04:53.674528  BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms

 1265 07:04:53.678181  Enabling resources...

 1266 07:04:53.680959  PCI: 00:00.0 subsystem <- 8086/4e22

 1267 07:04:53.684419  PCI: 00:00.0 cmd <- 06

 1268 07:04:53.688467  PCI: 00:02.0 subsystem <- 8086/4e55

 1269 07:04:53.691310  PCI: 00:02.0 cmd <- 03

 1270 07:04:53.694802  PCI: 00:04.0 subsystem <- 8086/4e03

 1271 07:04:53.698010  PCI: 00:04.0 cmd <- 02

 1272 07:04:53.700988  PCI: 00:05.0 bridge ctrl <- 0003

 1273 07:04:53.704255  PCI: 00:05.0 subsystem <- 8086/4e19

 1274 07:04:53.704952  PCI: 00:05.0 cmd <- 02

 1275 07:04:53.707807  PCI: 00:08.0 cmd <- 06

 1276 07:04:53.711323  PCI: 00:14.0 subsystem <- 8086/4ded

 1277 07:04:53.714927  PCI: 00:14.0 cmd <- 02

 1278 07:04:53.717639  PCI: 00:14.3 subsystem <- 8086/4df0

 1279 07:04:53.720903  PCI: 00:14.3 cmd <- 02

 1280 07:04:53.724562  PCI: 00:14.5 subsystem <- 8086/4df8

 1281 07:04:53.727882  PCI: 00:14.5 cmd <- 06

 1282 07:04:53.731600  PCI: 00:15.0 subsystem <- 8086/4de8

 1283 07:04:53.734549  PCI: 00:15.0 cmd <- 02

 1284 07:04:53.737813  PCI: 00:15.1 subsystem <- 8086/4de9

 1285 07:04:53.738308  PCI: 00:15.1 cmd <- 02

 1286 07:04:53.741841  PCI: 00:15.2 subsystem <- 8086/4dea

 1287 07:04:53.744602  PCI: 00:15.2 cmd <- 02

 1288 07:04:53.748056  PCI: 00:15.3 subsystem <- 8086/4deb

 1289 07:04:53.751325  PCI: 00:15.3 cmd <- 02

 1290 07:04:53.754668  PCI: 00:16.0 subsystem <- 8086/4de0

 1291 07:04:53.757982  PCI: 00:16.0 cmd <- 02

 1292 07:04:53.761083  PCI: 00:19.0 subsystem <- 8086/4dc5

 1293 07:04:53.764530  PCI: 00:19.0 cmd <- 02

 1294 07:04:53.767941  PCI: 00:19.2 subsystem <- 8086/4dc7

 1295 07:04:53.771236  PCI: 00:19.2 cmd <- 06

 1296 07:04:53.774660  PCI: 00:1a.0 subsystem <- 8086/4dc4

 1297 07:04:53.775273  PCI: 00:1a.0 cmd <- 06

 1298 07:04:53.781182  PCI: 00:1e.2 subsystem <- 8086/4daa

 1299 07:04:53.781683  PCI: 00:1e.2 cmd <- 06

 1300 07:04:53.784215  PCI: 00:1f.0 subsystem <- 8086/4d87

 1301 07:04:53.788285  PCI: 00:1f.0 cmd <- 407

 1302 07:04:53.790890  PCI: 00:1f.3 subsystem <- 8086/4dc8

 1303 07:04:53.794284  PCI: 00:1f.3 cmd <- 02

 1304 07:04:53.798382  PCI: 00:1f.5 subsystem <- 8086/4da4

 1305 07:04:53.800947  PCI: 00:1f.5 cmd <- 406

 1306 07:04:53.804619  done.

 1307 07:04:53.807952  BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms

 1308 07:04:53.811683  Initializing devices...

 1309 07:04:53.814520  Root Device init

 1310 07:04:53.815011  mainboard: EC init

 1311 07:04:53.821376  Chrome EC: Set SMI mask to 0x0000000000000000

 1312 07:04:53.825089  Chrome EC: clear events_b mask to 0x0000000000000000

 1313 07:04:53.831444  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1314 07:04:53.837773  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1315 07:04:53.844781  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e

 1316 07:04:53.848261  Chrome EC: Set WAKE mask to 0x0000000000000000

 1317 07:04:53.851429  Root Device init finished in 35 msecs

 1318 07:04:53.855351  PCI: 00:00.0 init

 1319 07:04:53.858495  CPU TDP = 6 Watts

 1320 07:04:53.858988  CPU PL1 = 7 Watts

 1321 07:04:53.861953  CPU PL2 = 12 Watts

 1322 07:04:53.865697  PCI: 00:00.0 init finished in 6 msecs

 1323 07:04:53.868851  PCI: 00:02.0 init

 1324 07:04:53.871848  GMA: Found VBT in CBFS

 1325 07:04:53.872372  GMA: Found valid VBT in CBFS

 1326 07:04:53.878601  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1327 07:04:53.885289                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1328 07:04:53.891860  PCI: 00:02.0 init finished in 18 msecs

 1329 07:04:53.892456  PCI: 00:08.0 init

 1330 07:04:53.895213  PCI: 00:08.0 init finished in 0 msecs

 1331 07:04:53.898740  PCI: 00:14.0 init

 1332 07:04:53.902535  XHCI: Updated LFPS sampling OFF time to 9 ms

 1333 07:04:53.908959  PCI: 00:14.0 init finished in 4 msecs

 1334 07:04:53.909530  PCI: 00:15.0 init

 1335 07:04:53.912215  I2C bus 0 version 0x3230302a

 1336 07:04:53.915203  DW I2C bus 0 at 0x7fd2a000 (400 KHz)

 1337 07:04:53.919067  PCI: 00:15.0 init finished in 6 msecs

 1338 07:04:53.922291  PCI: 00:15.1 init

 1339 07:04:53.925837  I2C bus 1 version 0x3230302a

 1340 07:04:53.929433  DW I2C bus 1 at 0x7fd2b000 (400 KHz)

 1341 07:04:53.932895  PCI: 00:15.1 init finished in 6 msecs

 1342 07:04:53.936074  PCI: 00:15.2 init

 1343 07:04:53.939016  I2C bus 2 version 0x3230302a

 1344 07:04:53.942343  DW I2C bus 2 at 0x7fd2c000 (400 KHz)

 1345 07:04:53.946088  PCI: 00:15.2 init finished in 6 msecs

 1346 07:04:53.949098  PCI: 00:15.3 init

 1347 07:04:53.949593  I2C bus 3 version 0x3230302a

 1348 07:04:53.955638  DW I2C bus 3 at 0x7fd2d000 (400 KHz)

 1349 07:04:53.959218  PCI: 00:15.3 init finished in 6 msecs

 1350 07:04:53.959717  PCI: 00:16.0 init

 1351 07:04:53.962445  PCI: 00:16.0 init finished in 0 msecs

 1352 07:04:53.965758  PCI: 00:19.0 init

 1353 07:04:53.968995  I2C bus 4 version 0x3230302a

 1354 07:04:53.972605  DW I2C bus 4 at 0x7fd2f000 (400 KHz)

 1355 07:04:53.975781  PCI: 00:19.0 init finished in 6 msecs

 1356 07:04:53.979069  PCI: 00:1a.0 init

 1357 07:04:53.982535  PCI: 00:1a.0 init finished in 0 msecs

 1358 07:04:53.985985  PCI: 00:1f.0 init

 1359 07:04:53.989281  IOAPIC: Initializing IOAPIC at 0xfec00000

 1360 07:04:53.992445  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1361 07:04:53.996152  IOAPIC: ID = 0x02

 1362 07:04:53.999460  IOAPIC: Dumping registers

 1363 07:04:54.002894    reg 0x0000: 0x02000000

 1364 07:04:54.003389    reg 0x0001: 0x00770020

 1365 07:04:54.006537    reg 0x0002: 0x00000000

 1366 07:04:54.009184  PCI: 00:1f.0 init finished in 21 msecs

 1367 07:04:54.012541  PCI: 00:1f.2 init

 1368 07:04:54.016521  Disabling ACPI via APMC.

 1369 07:04:54.019359  APMC done.

 1370 07:04:54.022614  PCI: 00:1f.2 init finished in 5 msecs

 1371 07:04:54.033050  PNP: 0c09.0 init

 1372 07:04:54.036630  Google Chrome EC uptime: 6.538 seconds

 1373 07:04:54.043216  Google Chrome AP resets since EC boot: 0

 1374 07:04:54.046030  Google Chrome most recent AP reset causes:

 1375 07:04:54.052767  Google Chrome EC reset flags at last EC boot: reset-pin

 1376 07:04:54.055918  PNP: 0c09.0 init finished in 18 msecs

 1377 07:04:54.056458  Devices initialized

 1378 07:04:54.059803  Show all devs... After init.

 1379 07:04:54.062664  Root Device: enabled 1

 1380 07:04:54.066027  CPU_CLUSTER: 0: enabled 1

 1381 07:04:54.069299  DOMAIN: 0000: enabled 1

 1382 07:04:54.069795  PCI: 00:00.0: enabled 1

 1383 07:04:54.072604  PCI: 00:02.0: enabled 1

 1384 07:04:54.075918  PCI: 00:04.0: enabled 1

 1385 07:04:54.076465  PCI: 00:05.0: enabled 1

 1386 07:04:54.079275  PCI: 00:09.0: enabled 0

 1387 07:04:54.083080  PCI: 00:12.6: enabled 0

 1388 07:04:54.085830  PCI: 00:14.0: enabled 1

 1389 07:04:54.086346  PCI: 00:14.1: enabled 0

 1390 07:04:54.089355  PCI: 00:14.2: enabled 0

 1391 07:04:54.092686  PCI: 00:14.3: enabled 1

 1392 07:04:54.096422  PCI: 00:14.5: enabled 1

 1393 07:04:54.096916  PCI: 00:15.0: enabled 1

 1394 07:04:54.099341  PCI: 00:15.1: enabled 1

 1395 07:04:54.102609  PCI: 00:15.2: enabled 1

 1396 07:04:54.105894  PCI: 00:15.3: enabled 1

 1397 07:04:54.106389  PCI: 00:16.0: enabled 1

 1398 07:04:54.109270  PCI: 00:16.1: enabled 0

 1399 07:04:54.112734  PCI: 00:16.4: enabled 0

 1400 07:04:54.113332  PCI: 00:16.5: enabled 0

 1401 07:04:54.115762  PCI: 00:17.0: enabled 0

 1402 07:04:54.119230  PCI: 00:19.0: enabled 1

 1403 07:04:54.123322  PCI: 00:19.1: enabled 0

 1404 07:04:54.123903  PCI: 00:19.2: enabled 1

 1405 07:04:54.125783  PCI: 00:1a.0: enabled 1

 1406 07:04:54.128987  PCI: 00:1c.0: enabled 0

 1407 07:04:54.132979  PCI: 00:1c.1: enabled 0

 1408 07:04:54.133592  PCI: 00:1c.2: enabled 0

 1409 07:04:54.135857  PCI: 00:1c.3: enabled 0

 1410 07:04:54.138876  PCI: 00:1c.4: enabled 0

 1411 07:04:54.142381  PCI: 00:1c.5: enabled 0

 1412 07:04:54.142980  PCI: 00:1c.6: enabled 0

 1413 07:04:54.145803  PCI: 00:1c.7: enabled 1

 1414 07:04:54.149322  PCI: 00:1e.0: enabled 0

 1415 07:04:54.152299  PCI: 00:1e.1: enabled 0

 1416 07:04:54.152889  PCI: 00:1e.2: enabled 1

 1417 07:04:54.155315  PCI: 00:1e.3: enabled 0

 1418 07:04:54.159005  PCI: 00:1f.0: enabled 1

 1419 07:04:54.159537  PCI: 00:1f.1: enabled 0

 1420 07:04:54.161988  PCI: 00:1f.2: enabled 1

 1421 07:04:54.165405  PCI: 00:1f.3: enabled 1

 1422 07:04:54.168890  PCI: 00:1f.4: enabled 0

 1423 07:04:54.169464  PCI: 00:1f.5: enabled 1

 1424 07:04:54.172189  PCI: 00:1f.7: enabled 0

 1425 07:04:54.175661  GENERIC: 0.0: enabled 1

 1426 07:04:54.178922  GENERIC: 0.0: enabled 1

 1427 07:04:54.179528  USB0 port 0: enabled 1

 1428 07:04:54.182182  GENERIC: 0.0: enabled 1

 1429 07:04:54.185613  I2C: 00:2c: enabled 1

 1430 07:04:54.186111  I2C: 00:15: enabled 1

 1431 07:04:54.188871  GENERIC: 0.0: enabled 0

 1432 07:04:54.192107  I2C: 00:15: enabled 1

 1433 07:04:54.192653  I2C: 00:10: enabled 0

 1434 07:04:54.195363  I2C: 00:10: enabled 0

 1435 07:04:54.198994  I2C: 00:2c: enabled 1

 1436 07:04:54.199493  I2C: 00:40: enabled 1

 1437 07:04:54.202093  I2C: 00:10: enabled 1

 1438 07:04:54.205411  I2C: 00:39: enabled 1

 1439 07:04:54.205911  I2C: 00:36: enabled 1

 1440 07:04:54.208991  I2C: 00:10: enabled 0

 1441 07:04:54.211939  I2C: 00:0c: enabled 1

 1442 07:04:54.212464  I2C: 00:50: enabled 1

 1443 07:04:54.215687  I2C: 00:1a: enabled 1

 1444 07:04:54.218479  I2C: 00:1a: enabled 0

 1445 07:04:54.222200  I2C: 00:1a: enabled 0

 1446 07:04:54.222699  I2C: 00:28: enabled 1

 1447 07:04:54.225410  I2C: 00:29: enabled 1

 1448 07:04:54.228645  PCI: 00:00.0: enabled 1

 1449 07:04:54.229156  SPI: 00: enabled 1

 1450 07:04:54.232489  PNP: 0c09.0: enabled 1

 1451 07:04:54.235600  GENERIC: 0.0: enabled 0

 1452 07:04:54.236200  USB2 port 0: enabled 1

 1453 07:04:54.238528  USB2 port 1: enabled 1

 1454 07:04:54.241877  USB2 port 2: enabled 1

 1455 07:04:54.242367  USB2 port 3: enabled 1

 1456 07:04:54.245203  USB2 port 4: enabled 0

 1457 07:04:54.248921  USB2 port 5: enabled 1

 1458 07:04:54.252024  USB2 port 6: enabled 0

 1459 07:04:54.252541  USB2 port 7: enabled 1

 1460 07:04:54.255726  USB3 port 0: enabled 1

 1461 07:04:54.258428  USB3 port 1: enabled 1

 1462 07:04:54.258919  USB3 port 2: enabled 1

 1463 07:04:54.262006  USB3 port 3: enabled 1

 1464 07:04:54.265306  APIC: 00: enabled 1

 1465 07:04:54.265794  APIC: 02: enabled 1

 1466 07:04:54.268454  PCI: 00:08.0: enabled 1

 1467 07:04:54.275673  BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms

 1468 07:04:54.278502  FMAP: area RW_ELOG found @ bfa000 (4096 bytes)

 1469 07:04:54.281862  ELOG: NV offset 0xbfa000 size 0x1000

 1470 07:04:54.289297  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1471 07:04:54.296089  ELOG: Event(17) added with size 13 at 2023-02-07 07:04:54 UTC

 1472 07:04:54.302693  ELOG: Event(92) added with size 9 at 2023-02-07 07:04:54 UTC

 1473 07:04:54.309670  ELOG: Event(93) added with size 9 at 2023-02-07 07:04:54 UTC

 1474 07:04:54.316124  ELOG: Event(9E) added with size 10 at 2023-02-07 07:04:54 UTC

 1475 07:04:54.323240  ELOG: Event(9F) added with size 14 at 2023-02-07 07:04:54 UTC

 1476 07:04:54.325965  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1477 07:04:54.332502  ELOG: Event(A1) added with size 10 at 2023-02-07 07:04:54 UTC

 1478 07:04:54.342907  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1479 07:04:54.349370  ELOG: Event(A0) added with size 9 at 2023-02-07 07:04:54 UTC

 1480 07:04:54.352382  elog_add_boot_reason: Logged dev mode boot

 1481 07:04:54.359331  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1482 07:04:54.359823  Finalize devices...

 1483 07:04:54.362414  Devices finalized

 1484 07:04:54.366204  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1485 07:04:54.372738  FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)

 1486 07:04:54.379473  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1487 07:04:54.382650  ME: HFSTS1                  : 0x80030045

 1488 07:04:54.386035  ME: HFSTS2                  : 0x30280136

 1489 07:04:54.389521  ME: HFSTS3                  : 0x00000050

 1490 07:04:54.396362  ME: HFSTS4                  : 0x00004000

 1491 07:04:54.399176  ME: HFSTS5                  : 0x00000000

 1492 07:04:54.402789  ME: HFSTS6                  : 0x40400006

 1493 07:04:54.406369  ME: Manufacturing Mode      : NO

 1494 07:04:54.409361  ME: FW Partition Table      : OK

 1495 07:04:54.412378  ME: Bringup Loader Failure  : NO

 1496 07:04:54.416001  ME: Firmware Init Complete  : NO

 1497 07:04:54.419273  ME: Boot Options Present    : NO

 1498 07:04:54.422433  ME: Update In Progress      : NO

 1499 07:04:54.426021  ME: D0i3 Support            : YES

 1500 07:04:54.429466  ME: Low Power State Enabled : NO

 1501 07:04:54.432258  ME: CPU Replaced            : YES

 1502 07:04:54.435958  ME: CPU Replacement Valid   : YES

 1503 07:04:54.439239  ME: Current Working State   : 5

 1504 07:04:54.442604  ME: Current Operation State : 1

 1505 07:04:54.446067  ME: Current Operation Mode  : 3

 1506 07:04:54.449229  ME: Error Code              : 0

 1507 07:04:54.452462  ME: CPU Debug Disabled      : YES

 1508 07:04:54.455405  ME: TXT Support             : NO

 1509 07:04:54.461983  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms

 1510 07:04:54.465568  CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2

 1511 07:04:54.472537  ACPI: Writing ACPI tables at 76b27000.

 1512 07:04:54.473039  ACPI:    * FACS

 1513 07:04:54.475957  ACPI:    * DSDT

 1514 07:04:54.479426  Ramoops buffer: 0x100000@0x76a26000.

 1515 07:04:54.482833  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1516 07:04:54.489376  FMAP: area RW_VPD found @ bfc000 (8192 bytes)

 1517 07:04:54.492785  Google Chrome EC: version:

 1518 07:04:54.496566  	ro: magolor_1.1.9999-103b6f9

 1519 07:04:54.497141  	rw: magolor_1.1.9999-103b6f9

 1520 07:04:54.499857    running image: 1

 1521 07:04:54.505946  PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000

 1522 07:04:54.509462  ACPI:    * FADT

 1523 07:04:54.509962  SCI is IRQ9

 1524 07:04:54.513052  ACPI: added table 1/32, length now 40

 1525 07:04:54.515974  ACPI:     * SSDT

 1526 07:04:54.519245  Found 1 CPU(s) with 2 core(s) each.

 1527 07:04:54.523062  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1528 07:04:54.530796  \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h

 1529 07:04:54.533219  Could not locate 'wifi_sar' in VPD.

 1530 07:04:54.536112  Checking CBFS for default SAR values

 1531 07:04:54.543010  wifi_sar_defaults.hex has bad len in CBFS

 1532 07:04:54.545648  failed from getting SAR limits!

 1533 07:04:54.549182  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1534 07:04:54.552815  \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c

 1535 07:04:54.558855  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15

 1536 07:04:54.562711  \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15

 1537 07:04:54.569506  \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c

 1538 07:04:54.572869  \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40

 1539 07:04:54.579252  \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10

 1540 07:04:54.585866  \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39

 1541 07:04:54.589063  \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h

 1542 07:04:54.595864  \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch

 1543 07:04:54.602590  \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h

 1544 07:04:54.609594  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a

 1545 07:04:54.612575  \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28

 1546 07:04:54.619330  \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29

 1547 07:04:54.622540  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1548 07:04:54.629595  PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]

 1549 07:04:54.632774  PS2K: Passing 101 keymaps to kernel

 1550 07:04:54.639241  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1551 07:04:54.646464  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1

 1552 07:04:54.649059  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1553 07:04:54.655834  \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3

 1554 07:04:54.658963  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1555 07:04:54.665760  \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7

 1556 07:04:54.672453  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1557 07:04:54.678965  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1

 1558 07:04:54.682264  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1559 07:04:54.689395  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3

 1560 07:04:54.692723  ACPI: added table 2/32, length now 44

 1561 07:04:54.695558  ACPI:    * MCFG

 1562 07:04:54.698944  ACPI: added table 3/32, length now 48

 1563 07:04:54.699519  ACPI:    * TPM2

 1564 07:04:54.702393  TPM2 log created at 0x76a16000

 1565 07:04:54.705469  ACPI: added table 4/32, length now 52

 1566 07:04:54.709240  ACPI:    * MADT

 1567 07:04:54.709740  SCI is IRQ9

 1568 07:04:54.712256  ACPI: added table 5/32, length now 56

 1569 07:04:54.715400  current = 76b2d580

 1570 07:04:54.715927  ACPI:    * DMAR

 1571 07:04:54.722213  ACPI: added table 6/32, length now 60

 1572 07:04:54.725524  ACPI: added table 7/32, length now 64

 1573 07:04:54.726028  ACPI:    * HPET

 1574 07:04:54.728990  ACPI: added table 8/32, length now 68

 1575 07:04:54.732369  ACPI: done.

 1576 07:04:54.735785  ACPI tables: 26304 bytes.

 1577 07:04:54.738999  smbios_write_tables: 76a15000

 1578 07:04:54.742196  EC returned error result code 3

 1579 07:04:54.745528  Couldn't obtain OEM name from CBI

 1580 07:04:54.749639  Create SMBIOS type 16

 1581 07:04:54.750238  Create SMBIOS type 17

 1582 07:04:54.752415  GENERIC: 0.0 (WIFI Device)

 1583 07:04:54.755348  SMBIOS tables: 913 bytes.

 1584 07:04:54.759305  Writing table forward entry at 0x00000500

 1585 07:04:54.765420  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929

 1586 07:04:54.768831  Writing coreboot table at 0x76b4b000

 1587 07:04:54.775479   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1588 07:04:54.779171   1. 0000000000001000-000000000009ffff: RAM

 1589 07:04:54.785415   2. 00000000000a0000-00000000000fffff: RESERVED

 1590 07:04:54.788921   3. 0000000000100000-0000000076a14fff: RAM

 1591 07:04:54.795769   4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES

 1592 07:04:54.798765   5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE

 1593 07:04:54.806065   6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES

 1594 07:04:54.808907   7. 0000000077000000-000000007fbfffff: RESERVED

 1595 07:04:54.815320   8. 00000000c0000000-00000000cfffffff: RESERVED

 1596 07:04:54.818894   9. 00000000fb000000-00000000fb000fff: RESERVED

 1597 07:04:54.825170  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1598 07:04:54.828907  11. 00000000fea80000-00000000fea87fff: RESERVED

 1599 07:04:54.835073  12. 00000000fed80000-00000000fed87fff: RESERVED

 1600 07:04:54.838802  13. 00000000fed90000-00000000fed92fff: RESERVED

 1601 07:04:54.842063  14. 00000000feda0000-00000000feda1fff: RESERVED

 1602 07:04:54.848728  15. 0000000100000000-00000001803fffff: RAM

 1603 07:04:54.852106  Passing 4 GPIOs to payload:

 1604 07:04:54.855283              NAME |       PORT | POLARITY |     VALUE

 1605 07:04:54.861783               lid |  undefined |     high |      high

 1606 07:04:54.865274             power |  undefined |     high |       low

 1607 07:04:54.872157             oprom |  undefined |     high |       low

 1608 07:04:54.875108          EC in RW | 0x000000b9 |     high |       low

 1609 07:04:54.882578  Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 6c9f

 1610 07:04:54.885509  coreboot table: 1504 bytes.

 1611 07:04:54.888606  IMD ROOT    0. 0x76fff000 0x00001000

 1612 07:04:54.891824  IMD SMALL   1. 0x76ffe000 0x00001000

 1613 07:04:54.898667  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1614 07:04:54.901925  CONSOLE     3. 0x76c2e000 0x00020000

 1615 07:04:54.904728  FMAP        4. 0x76c2d000 0x00000578

 1616 07:04:54.908337  TIME STAMP  5. 0x76c2c000 0x00000910

 1617 07:04:54.911427  VBOOT WORK  6. 0x76c18000 0x00014000

 1618 07:04:54.914824  ROMSTG STCK 7. 0x76c17000 0x00001000

 1619 07:04:54.918389  AFTER CAR   8. 0x76c0d000 0x0000a000

 1620 07:04:54.921808  RAMSTAGE    9. 0x76ba7000 0x00066000

 1621 07:04:54.928521  REFCODE    10. 0x76b67000 0x00040000

 1622 07:04:54.931631  SMM BACKUP 11. 0x76b57000 0x00010000

 1623 07:04:54.934857  4f444749   12. 0x76b55000 0x00002000

 1624 07:04:54.938355  EXT VBT13. 0x76b53000 0x00001c43

 1625 07:04:54.941877  COREBOOT   14. 0x76b4b000 0x00008000

 1626 07:04:54.945410  ACPI       15. 0x76b27000 0x00024000

 1627 07:04:54.948230  ACPI GNVS  16. 0x76b26000 0x00001000

 1628 07:04:54.951498  RAMOOPS    17. 0x76a26000 0x00100000

 1629 07:04:54.954816  TPM2 TCGLOG18. 0x76a16000 0x00010000

 1630 07:04:54.958283  SMBIOS     19. 0x76a15000 0x00000800

 1631 07:04:54.961231  IMD small region:

 1632 07:04:54.964941    IMD ROOT    0. 0x76ffec00 0x00000400

 1633 07:04:54.968076    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1634 07:04:54.974535    VPD         2. 0x76ffeb80 0x0000004c

 1635 07:04:54.977947    POWER STATE 3. 0x76ffeb40 0x00000040

 1636 07:04:54.981468    ROMSTAGE    4. 0x76ffeb20 0x00000004

 1637 07:04:54.984337    MEM INFO    5. 0x76ffe940 0x000001e0

 1638 07:04:54.990954  BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms

 1639 07:04:54.994289  MTRR: Physical address space:

 1640 07:04:55.000877  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1641 07:04:55.007750  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1642 07:04:55.011940  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1643 07:04:55.017565  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1644 07:04:55.024625  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1645 07:04:55.030808  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1646 07:04:55.037380  0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6

 1647 07:04:55.040519  MTRR: Fixed MSR 0x250 0x0606060606060606

 1648 07:04:55.044250  MTRR: Fixed MSR 0x258 0x0606060606060606

 1649 07:04:55.050749  MTRR: Fixed MSR 0x259 0x0000000000000000

 1650 07:04:55.053837  MTRR: Fixed MSR 0x268 0x0606060606060606

 1651 07:04:55.057538  MTRR: Fixed MSR 0x269 0x0606060606060606

 1652 07:04:55.060566  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1653 07:04:55.066935  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1654 07:04:55.070568  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1655 07:04:55.073714  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1656 07:04:55.077089  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1657 07:04:55.084069  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1658 07:04:55.084689  call enable_fixed_mtrr()

 1659 07:04:55.090720  CPU physical address size: 39 bits

 1660 07:04:55.093421  MTRR: default type WB/UC MTRR counts: 6/5.

 1661 07:04:55.096753  MTRR: UC selected as default type.

 1662 07:04:55.103548  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1663 07:04:55.110055  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1664 07:04:55.116950  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1665 07:04:55.120513  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1666 07:04:55.127037  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1667 07:04:55.127566  

 1668 07:04:55.130348  MTRR check

 1669 07:04:55.133757  Fixed MTRRs   : Enabled

 1670 07:04:55.134254  Variable MTRRs: Enabled

 1671 07:04:55.134641  

 1672 07:04:55.140416  MTRR: Fixed MSR 0x250 0x0606060606060606

 1673 07:04:55.143648  MTRR: Fixed MSR 0x258 0x0606060606060606

 1674 07:04:55.147069  MTRR: Fixed MSR 0x259 0x0000000000000000

 1675 07:04:55.150343  MTRR: Fixed MSR 0x268 0x0606060606060606

 1676 07:04:55.156811  MTRR: Fixed MSR 0x269 0x0606060606060606

 1677 07:04:55.159958  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1678 07:04:55.163534  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1679 07:04:55.166685  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1680 07:04:55.169633  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1681 07:04:55.176666  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1682 07:04:55.179803  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1683 07:04:55.186177  BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms

 1684 07:04:55.189884  call enable_fixed_mtrr()

 1685 07:04:55.194754  Checking cr50 for pending updates

 1686 07:04:55.195346  CPU physical address size: 39 bits

 1687 07:04:55.198671  Reading cr50 TPM mode

 1688 07:04:55.208902  BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms

 1689 07:04:55.216634  CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38

 1690 07:04:55.219538  Checking segment from ROM address 0xfff9d5b8

 1691 07:04:55.226281  Checking segment from ROM address 0xfff9d5d4

 1692 07:04:55.229211  Loading segment from ROM address 0xfff9d5b8

 1693 07:04:55.232626    code (compression=0)

 1694 07:04:55.239372    New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00

 1695 07:04:55.249258  Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00

 1696 07:04:55.252816  it's not compressed!

 1697 07:04:55.377553  [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0

 1698 07:04:55.384456  Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370

 1699 07:04:55.391735  Loading segment from ROM address 0xfff9d5d4

 1700 07:04:55.394596    Entry Point 0x30000000

 1701 07:04:55.395197  Loaded segments

 1702 07:04:55.401497  BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms

 1703 07:04:55.417316  Finalizing chipset.

 1704 07:04:55.421051  Finalizing SMM.

 1705 07:04:55.421672  APMC done.

 1706 07:04:55.427729  BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms

 1707 07:04:55.430637  mp_park_aps done after 0 msecs.

 1708 07:04:55.434003  Jumping to boot code at 0x30000000(0x76b4b000)

 1709 07:04:55.444064  CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes

 1710 07:04:55.444621  

 1711 07:04:55.445150  

 1712 07:04:55.445627  

 1713 07:04:55.448049  Starting depthcharge on Magolor...

 1714 07:04:55.448691  

 1715 07:04:55.449929  end: 2.2.3 depthcharge-start (duration 00:00:06) [common]
 1716 07:04:55.450608  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 1717 07:04:55.451094  Setting prompt string to ['dedede:']
 1718 07:04:55.451532  bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:45)
 1719 07:04:55.457670  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1720 07:04:55.458178  

 1721 07:04:55.464202  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1722 07:04:55.464764  

 1723 07:04:55.467419  fw_config match found: AUDIO_AMP=UNPROVISIONED

 1724 07:04:55.467933  

 1725 07:04:55.470891  Wipe memory regions:

 1726 07:04:55.471399  

 1727 07:04:55.474450  	[0x00000000001000, 0x000000000a0000)

 1728 07:04:55.474905  

 1729 07:04:55.477295  	[0x00000000100000, 0x00000030000000)

 1730 07:04:55.606033  

 1731 07:04:55.609265  	[0x00000031062170, 0x00000076a15000)

 1732 07:04:55.778460  

 1733 07:04:55.781193  	[0x00000100000000, 0x00000180400000)

 1734 07:04:56.843692  

 1735 07:04:56.844256  R8152: Initializing

 1736 07:04:56.844713  

 1737 07:04:56.847398  Version 6 (ocp_data = 5c30)

 1738 07:04:56.850707  

 1739 07:04:56.851298  R8152: Done initializing

 1740 07:04:56.851693  

 1741 07:04:56.854173  Adding net device

 1742 07:04:56.854766  

 1743 07:04:56.857343  [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48

 1744 07:04:56.860571  

 1745 07:04:56.861161  

 1746 07:04:56.861563  

 1747 07:04:56.862505  Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1749 07:04:56.964434  dedede: tftpboot 192.168.201.1 9045543/tftp-deploy-wp4op99g/kernel/bzImage 9045543/tftp-deploy-wp4op99g/kernel/cmdline 9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz

 1750 07:04:56.965189  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1751 07:04:56.965809  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 1752 07:04:56.970265  tftpboot 192.168.201.1 9045543/tftp-deploy-wp4op99g/kernel/bzImoy-wp4op99g/kernel/cmdline 9045543/tftp-deploy-wp4op99g/ramdisk/ramdisk.cpio.gz

 1753 07:04:56.970789  

 1754 07:04:56.971233  Waiting for link

 1755 07:04:57.172030  

 1756 07:04:57.172639  done.

 1757 07:04:57.173119  

 1758 07:04:57.173492  MAC: 00:24:32:30:7a:67

 1759 07:04:57.173907  

 1760 07:04:57.175389  Sending DHCP discover... done.

 1761 07:04:57.175944  

 1762 07:04:57.178498  Waiting for reply... done.

 1763 07:04:57.178994  

 1764 07:04:57.182182  Sending DHCP request... done.

 1765 07:04:57.182683  

 1766 07:04:57.188737  Waiting for reply... done.

 1767 07:04:57.189237  

 1768 07:04:57.189627  My ip is 192.168.201.15

 1769 07:04:57.189990  

 1770 07:04:57.191940  The DHCP server ip is 192.168.201.1

 1771 07:04:57.192481  

 1772 07:04:57.199046  TFTP server IP predefined by user: 192.168.201.1

 1773 07:04:57.199619  

 1774 07:04:57.205433  Bootfile predefined by user: 9045543/tftp-deploy-wp4op99g/kernel/bzImage

 1775 07:04:57.205933  

 1776 07:04:57.209031  Sending tftp read request... done.

 1777 07:04:57.209636  

 1778 07:04:57.215339  Waiting for the transfer... 

 1779 07:04:57.215951  

 1780 07:04:57.917660  00000000 ################################################################

 1781 07:04:57.918176  

 1782 07:04:58.561577  00080000 ################################################################

 1783 07:04:58.562348  

 1784 07:04:59.267741  00100000 ################################################################

 1785 07:04:59.268298  

 1786 07:04:59.869619  00180000 ################################################################

 1787 07:04:59.869780  

 1788 07:05:00.460315  00200000 ################################################################

 1789 07:05:00.460475  

 1790 07:05:01.001153  00280000 ################################################################

 1791 07:05:01.001313  

 1792 07:05:01.541037  00300000 ################################################################

 1793 07:05:01.541235  

 1794 07:05:02.075981  00380000 ################################################################

 1795 07:05:02.076126  

 1796 07:05:02.637522  00400000 ################################################################

 1797 07:05:02.637673  

 1798 07:05:03.200878  00480000 ################################################################

 1799 07:05:03.201036  

 1800 07:05:03.730569  00500000 ################################################################

 1801 07:05:03.730719  

 1802 07:05:04.260134  00580000 ################################################################

 1803 07:05:04.260285  

 1804 07:05:04.803375  00600000 ################################################################

 1805 07:05:04.803525  

 1806 07:05:05.331277  00680000 ################################################################

 1807 07:05:05.331447  

 1808 07:05:05.570396  00700000 ############################# done.

 1809 07:05:05.570587  

 1810 07:05:05.573404  The bootfile was 7573392 bytes long.

 1811 07:05:05.573495  

 1812 07:05:05.577054  Sending tftp read request... done.

 1813 07:05:05.577147  

 1814 07:05:05.580241  Waiting for the transfer... 

 1815 07:05:05.580371  

 1816 07:05:06.146634  00000000 ################################################################

 1817 07:05:06.146796  

 1818 07:05:06.691602  00080000 ################################################################

 1819 07:05:06.691766  

 1820 07:05:07.235173  00100000 ################################################################

 1821 07:05:07.235333  

 1822 07:05:07.777010  00180000 ################################################################

 1823 07:05:07.777179  

 1824 07:05:08.346967  00200000 ################################################################

 1825 07:05:08.347130  

 1826 07:05:08.900470  00280000 ################################################################

 1827 07:05:08.900628  

 1828 07:05:09.468706  00300000 ################################################################

 1829 07:05:09.468871  

 1830 07:05:10.021834  00380000 ################################################################

 1831 07:05:10.021998  

 1832 07:05:10.573463  00400000 ################################################################

 1833 07:05:10.573626  

 1834 07:05:11.124554  00480000 ################################################################

 1835 07:05:11.124718  

 1836 07:05:11.673480  00500000 ################################################################

 1837 07:05:11.673645  

 1838 07:05:12.250571  00580000 ################################################################

 1839 07:05:12.250726  

 1840 07:05:12.817954  00600000 ################################################################

 1841 07:05:12.818115  

 1842 07:05:13.383738  00680000 ################################################################

 1843 07:05:13.383898  

 1844 07:05:13.955335  00700000 ################################################################

 1845 07:05:13.955501  

 1846 07:05:14.516785  00780000 ################################################################

 1847 07:05:14.516941  

 1848 07:05:14.707207  00800000 ##################### done.

 1849 07:05:14.707368  

 1850 07:05:14.709990  Sending tftp read request... done.

 1851 07:05:14.710079  

 1852 07:05:14.713258  Waiting for the transfer... 

 1853 07:05:14.713347  

 1854 07:05:14.713416  00000000 # done.

 1855 07:05:14.713483  

 1856 07:05:14.722867  Command line loaded dynamically from TFTP file: 9045543/tftp-deploy-wp4op99g/kernel/cmdline

 1857 07:05:14.722958  

 1858 07:05:14.736581  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 1859 07:05:14.736674  

 1860 07:05:14.739656  ec_init: CrosEC protocol v3 supported (256, 256)

 1861 07:05:14.746739  

 1862 07:05:14.749985  Shutting down all USB controllers.

 1863 07:05:14.750074  

 1864 07:05:14.750143  Removing current net device

 1865 07:05:14.750208  

 1866 07:05:14.753529  Finalizing coreboot

 1867 07:05:14.753617  

 1868 07:05:14.759950  Exiting depthcharge with code 4 at timestamp: 26123603

 1869 07:05:14.760051  

 1870 07:05:14.760121  

 1871 07:05:14.760185  Starting kernel ...

 1872 07:05:14.760247  

 1873 07:05:14.760307  

 1874 07:05:14.760730  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 1875 07:05:14.760835  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 1876 07:05:14.760914  Setting prompt string to ['Linux version [0-9]']
 1877 07:05:14.760989  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1878 07:05:14.761062  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1880 07:09:39.761891  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 1882 07:09:39.763035  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 1884 07:09:39.763897  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1887 07:09:39.765419  end: 2 depthcharge-action (duration 00:05:00) [common]
 1889 07:09:39.766661  Cleaning after the job
 1890 07:09:39.766891  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/ramdisk
 1891 07:09:39.767536  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/kernel
 1892 07:09:39.768090  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045543/tftp-deploy-wp4op99g/modules
 1893 07:09:39.768279  start: 5.1 power-off (timeout 00:00:30) [common]
 1894 07:09:39.768437  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
 1895 07:09:41.940811  >> Command sent successfully.

 1896 07:09:41.946836  Returned 0 in 2 seconds
 1897 07:09:42.048076  end: 5.1 power-off (duration 00:00:02) [common]
 1899 07:09:42.049789  start: 5.2 read-feedback (timeout 00:09:58) [common]
 1900 07:09:42.051018  Listened to connection for namespace 'common' for up to 1s
 1902 07:09:42.052585  Listened to connection for namespace 'common' for up to 1s
 1903 07:09:43.055485  Finalising connection for namespace 'common'
 1904 07:09:43.056267  Disconnecting from shell: Finalise
 1905 07:09:43.056791  
 1906 07:09:43.158416  end: 5.2 read-feedback (duration 00:00:01) [common]
 1907 07:09:43.159067  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045543
 1908 07:09:43.167758  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045543
 1909 07:09:43.167879  JobError: Your job cannot terminate cleanly.