Boot log: asus-cx9400-volteer

    1 07:04:38.445182  lava-dispatcher, installed at version: 2022.11
    2 07:04:38.445367  start: 0 validate
    3 07:04:38.445498  Start time: 2023-02-07 07:04:38.445491+00:00 (UTC)
    4 07:04:38.445623  Using caching service: 'http://localhost/cache/?uri=%s'
    5 07:04:38.445759  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
    6 07:04:38.454441  Using caching service: 'http://localhost/cache/?uri=%s'
    7 07:04:38.454564  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 07:04:38.461962  Using caching service: 'http://localhost/cache/?uri=%s'
    9 07:04:38.462075  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 07:04:38.465183  validate duration: 0.02
   12 07:04:38.465437  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 07:04:38.465574  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 07:04:38.465688  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 07:04:38.465787  Not decompressing ramdisk as can be used compressed.
   16 07:04:38.466000  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
   17 07:04:38.466084  saving as /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/ramdisk/rootfs.cpio.gz
   18 07:04:38.466152  total size: 8423718 (8MB)
   19 07:04:38.482694  progress   0% (0MB)
   20 07:04:38.499903  progress   5% (0MB)
   21 07:04:38.519820  progress  10% (0MB)
   22 07:04:38.537269  progress  15% (1MB)
   23 07:04:38.554623  progress  20% (1MB)
   24 07:04:38.574489  progress  25% (2MB)
   25 07:04:38.592342  progress  30% (2MB)
   26 07:04:38.608989  progress  35% (2MB)
   27 07:04:38.626300  progress  40% (3MB)
   28 07:04:38.644061  progress  45% (3MB)
   29 07:04:38.664295  progress  50% (4MB)
   30 07:04:38.681852  progress  55% (4MB)
   31 07:04:38.698734  progress  60% (4MB)
   32 07:04:38.716559  progress  65% (5MB)
   33 07:04:38.732822  progress  70% (5MB)
   34 07:04:38.753477  progress  75% (6MB)
   35 07:04:38.769893  progress  80% (6MB)
   36 07:04:38.787852  progress  85% (6MB)
   37 07:04:38.807586  progress  90% (7MB)
   38 07:04:38.825701  progress  95% (7MB)
   39 07:04:38.842207  progress 100% (8MB)
   40 07:04:38.842799  8MB downloaded in 0.38s (21.33MB/s)
   41 07:04:38.843320  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 07:04:38.844277  end: 1.1 download-retry (duration 00:00:00) [common]
   44 07:04:38.844652  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 07:04:38.844996  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 07:04:38.845368  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 07:04:38.845643  saving as /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/kernel/bzImage
   48 07:04:38.845881  total size: 7573392 (7MB)
   49 07:04:38.846113  No compression specified
   50 07:04:38.859106  progress   0% (0MB)
   51 07:04:38.876708  progress   5% (0MB)
   52 07:04:38.899794  progress  10% (0MB)
   53 07:04:38.926712  progress  15% (1MB)
   54 07:04:38.952784  progress  20% (1MB)
   55 07:04:38.972383  progress  25% (1MB)
   56 07:04:38.997887  progress  30% (2MB)
   57 07:04:39.020505  progress  35% (2MB)
   58 07:04:39.048027  progress  40% (2MB)
   59 07:04:39.072744  progress  45% (3MB)
   60 07:04:39.086381  progress  50% (3MB)
   61 07:04:39.099285  progress  55% (4MB)
   62 07:04:39.109876  progress  60% (4MB)
   63 07:04:39.126050  progress  65% (4MB)
   64 07:04:39.136539  progress  70% (5MB)
   65 07:04:39.152562  progress  75% (5MB)
   66 07:04:39.162374  progress  80% (5MB)
   67 07:04:39.175567  progress  85% (6MB)
   68 07:04:39.189075  progress  90% (6MB)
   69 07:04:39.202433  progress  95% (6MB)
   70 07:04:39.214954  progress 100% (7MB)
   71 07:04:39.215146  7MB downloaded in 0.37s (19.56MB/s)
   72 07:04:39.215303  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 07:04:39.215544  end: 1.2 download-retry (duration 00:00:00) [common]
   75 07:04:39.215635  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 07:04:39.215724  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 07:04:39.215831  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 07:04:39.215901  saving as /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/modules/modules.tar
   79 07:04:39.216002  total size: 54868 (0MB)
   80 07:04:39.216064  Using unxz to decompress xz
   81 07:04:39.220835  progress  59% (0MB)
   82 07:04:39.221239  progress 100% (0MB)
   83 07:04:39.224658  0MB downloaded in 0.01s (6.05MB/s)
   84 07:04:39.224884  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 07:04:39.225148  end: 1.3 download-retry (duration 00:00:00) [common]
   87 07:04:39.225245  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   88 07:04:39.225347  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   89 07:04:39.225433  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 07:04:39.225524  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   91 07:04:39.225714  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn
   92 07:04:39.225838  makedir: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin
   93 07:04:39.225930  makedir: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/tests
   94 07:04:39.226016  makedir: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/results
   95 07:04:39.226122  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-add-keys
   96 07:04:39.226257  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-add-sources
   97 07:04:39.226381  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-background-process-start
   98 07:04:39.226497  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-background-process-stop
   99 07:04:39.226613  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-common-functions
  100 07:04:39.226727  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-echo-ipv4
  101 07:04:39.226842  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-install-packages
  102 07:04:39.226956  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-installed-packages
  103 07:04:39.227067  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-os-build
  104 07:04:39.227178  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-probe-channel
  105 07:04:39.227290  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-probe-ip
  106 07:04:39.227401  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-target-ip
  107 07:04:39.227512  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-target-mac
  108 07:04:39.227621  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-target-storage
  109 07:04:39.227735  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-case
  110 07:04:39.227846  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-event
  111 07:04:39.227958  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-feedback
  112 07:04:39.228069  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-raise
  113 07:04:39.228184  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-reference
  114 07:04:39.228295  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-runner
  115 07:04:39.228446  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-set
  116 07:04:39.228556  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-test-shell
  117 07:04:39.228670  Updating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-install-packages (oe)
  118 07:04:39.228786  Updating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/bin/lava-installed-packages (oe)
  119 07:04:39.228887  Creating /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/environment
  120 07:04:39.228980  LAVA metadata
  121 07:04:39.229055  - LAVA_JOB_ID=9045546
  122 07:04:39.229123  - LAVA_DISPATCHER_IP=192.168.201.1
  123 07:04:39.229232  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  124 07:04:39.229300  skipped lava-vland-overlay
  125 07:04:39.229378  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 07:04:39.229466  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  127 07:04:39.229531  skipped lava-multinode-overlay
  128 07:04:39.229620  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 07:04:39.229709  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  130 07:04:39.229788  Loading test definitions
  131 07:04:39.229889  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  132 07:04:39.229965  Using /lava-9045546 at stage 0
  133 07:04:39.230232  uuid=9045546_1.4.2.3.1 testdef=None
  134 07:04:39.230325  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 07:04:39.230418  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  136 07:04:39.230914  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 07:04:39.231150  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  139 07:04:39.231777  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 07:04:39.232025  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  142 07:04:39.232620  runner path: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/0/tests/0_dmesg test_uuid 9045546_1.4.2.3.1
  143 07:04:39.232770  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 07:04:39.233007  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  146 07:04:39.233082  Using /lava-9045546 at stage 1
  147 07:04:39.233334  uuid=9045546_1.4.2.3.5 testdef=None
  148 07:04:39.233427  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 07:04:39.233518  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  150 07:04:39.233968  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 07:04:39.234197  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  153 07:04:39.234779  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 07:04:39.235023  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  156 07:04:39.235576  runner path: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/1/tests/1_bootrr test_uuid 9045546_1.4.2.3.5
  157 07:04:39.235758  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 07:04:39.235974  Creating lava-test-runner.conf files
  160 07:04:39.236040  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/0 for stage 0
  161 07:04:39.236124  - 0_dmesg
  162 07:04:39.236201  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045546/lava-overlay-juzk37gn/lava-9045546/1 for stage 1
  163 07:04:39.236286  - 1_bootrr
  164 07:04:39.236423  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 07:04:39.236514  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  166 07:04:39.242695  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 07:04:39.242809  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  168 07:04:39.242901  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 07:04:39.242991  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 07:04:39.243080  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  171 07:04:39.427019  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 07:04:39.427366  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  173 07:04:39.427478  extracting modules file /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045546/extract-overlay-ramdisk-0fy8rp9m/ramdisk
  174 07:04:39.431895  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 07:04:39.432012  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  176 07:04:39.432103  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045546/compress-overlay-5bwrzx3_/overlay-1.4.2.4.tar.gz to ramdisk
  177 07:04:39.432179  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045546/compress-overlay-5bwrzx3_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045546/extract-overlay-ramdisk-0fy8rp9m/ramdisk
  178 07:04:39.436109  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 07:04:39.436222  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  180 07:04:39.436322  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 07:04:39.436450  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  182 07:04:39.436529  Building ramdisk /var/lib/lava/dispatcher/tmp/9045546/extract-overlay-ramdisk-0fy8rp9m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045546/extract-overlay-ramdisk-0fy8rp9m/ramdisk
  183 07:04:39.499915  >> 48158 blocks

  184 07:04:40.240519  rename /var/lib/lava/dispatcher/tmp/9045546/extract-overlay-ramdisk-0fy8rp9m/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz
  185 07:04:40.240951  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 07:04:40.241075  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  187 07:04:40.241179  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  188 07:04:40.241275  No mkimage arch provided, not using FIT.
  189 07:04:40.241369  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 07:04:40.241459  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 07:04:40.241557  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 07:04:40.241651  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  193 07:04:40.241727  No LXC device requested
  194 07:04:40.241806  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 07:04:40.241895  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  196 07:04:40.241978  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 07:04:40.242049  Checking files for TFTP limit of 4294967296 bytes.
  198 07:04:40.242430  end: 1 tftp-deploy (duration 00:00:02) [common]
  199 07:04:40.242535  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 07:04:40.242632  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 07:04:40.242778  substitutions:
  202 07:04:40.242849  - {DTB}: None
  203 07:04:40.242915  - {INITRD}: 9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz
  204 07:04:40.242976  - {KERNEL}: 9045546/tftp-deploy-zm1eoqnx/kernel/bzImage
  205 07:04:40.243035  - {LAVA_MAC}: None
  206 07:04:40.243092  - {PRESEED_CONFIG}: None
  207 07:04:40.243149  - {PRESEED_LOCAL}: None
  208 07:04:40.243205  - {RAMDISK}: 9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz
  209 07:04:40.243263  - {ROOT_PART}: None
  210 07:04:40.243320  - {ROOT}: None
  211 07:04:40.243376  - {SERVER_IP}: 192.168.201.1
  212 07:04:40.243431  - {TEE}: None
  213 07:04:40.243488  Parsed boot commands:
  214 07:04:40.243545  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 07:04:40.243696  Parsed boot commands: tftpboot 192.168.201.1 9045546/tftp-deploy-zm1eoqnx/kernel/bzImage 9045546/tftp-deploy-zm1eoqnx/kernel/cmdline 9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz
  216 07:04:40.243790  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 07:04:40.243879  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 07:04:40.243974  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 07:04:40.244064  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 07:04:40.244136  Not connected, no need to disconnect.
  221 07:04:40.244212  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 07:04:40.244293  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 07:04:40.244365  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
  224 07:04:40.247267  Setting prompt string to ['lava-test: # ']
  225 07:04:40.247560  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 07:04:40.247664  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 07:04:40.247767  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 07:04:40.247859  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 07:04:40.248247  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
  230 07:04:49.574903  >> Command sent successfully.

  231 07:04:49.585053  Returned 0 in 9 seconds
  232 07:04:49.686864  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  234 07:04:49.688430  end: 2.2.2 reset-device (duration 00:00:09) [common]
  235 07:04:49.689006  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  236 07:04:49.689512  Setting prompt string to 'Starting depthcharge on Voema...'
  237 07:04:49.689892  Changing prompt to 'Starting depthcharge on Voema...'
  238 07:04:49.690318  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 07:04:49.691716  [Enter `^Ec?' for help]

  240 07:04:49.692374  

  241 07:04:49.692849  

  242 07:04:49.693218  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  243 07:04:49.693607  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  244 07:04:49.693953  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  245 07:04:49.694291  CPU: AES supported, TXT NOT supported, VT supported

  246 07:04:49.694626  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  247 07:04:49.695083  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  248 07:04:49.695435  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  249 07:04:49.695769  VBOOT: Loading verstage.

  250 07:04:49.696099  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  251 07:04:49.696465  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  252 07:04:49.696800  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  253 07:04:49.697128  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  254 07:04:49.697458  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  255 07:04:49.697789  

  256 07:04:49.698110  

  257 07:04:49.698453  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  258 07:04:49.698786  Probing TPM: . done!

  259 07:04:49.699160  TPM ready after 0 ms

  260 07:04:49.699492  Connected to device vid:did:rid of 1ae0:0028:00

  261 07:04:49.699819  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  262 07:04:49.700163  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  263 07:04:49.700511  Initialized TPM device CR50 revision 0

  264 07:04:49.700836  tlcl_send_startup: Startup return code is 0

  265 07:04:49.701162  TPM: setup succeeded

  266 07:04:49.701484  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  267 07:04:49.701808  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  268 07:04:49.702130  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  269 07:04:49.702458  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  270 07:04:49.702782  Chrome EC: UHEPI supported

  271 07:04:49.703104  Phase 1

  272 07:04:49.703429  FMAP: area GBB found @ 1805000 (458752 bytes)

  273 07:04:49.703755  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  274 07:04:49.704081  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  275 07:04:49.704438  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  276 07:04:49.704832  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  277 07:04:49.705208  Recovery requested (1009000e)

  278 07:04:49.705538  TPM: Extending digest for VBOOT: boot mode into PCR 0

  279 07:04:49.705862  tlcl_extend: response is 0

  280 07:04:49.706184  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  281 07:04:49.706506  tlcl_extend: response is 0

  282 07:04:49.706829  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  283 07:04:49.707156  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  284 07:04:49.707482  BS: verstage times (exec / console): total (unknown) / 142 ms

  285 07:04:49.707834  

  286 07:04:49.708233  

  287 07:04:49.708600  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  288 07:04:49.708930  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  289 07:04:49.709256  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  290 07:04:49.709577  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  291 07:04:49.709899  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  292 07:04:49.710225  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  293 07:04:49.710543  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  294 07:04:49.710861  TCO_STS:   0000 0000

  295 07:04:49.711181  GEN_PMCON: d0015038 00002200

  296 07:04:49.711499  GBLRST_CAUSE: 00000000 00000000

  297 07:04:49.711815  HPR_CAUSE0: 00000000

  298 07:04:49.712132  prev_sleep_state 5

  299 07:04:49.712475  Boot Count incremented to 15660

  300 07:04:49.712793  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  301 07:04:49.713116  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  302 07:04:49.713443  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  303 07:04:49.713764  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  304 07:04:49.714088  Chrome EC: UHEPI supported

  305 07:04:49.714796  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  306 07:04:49.715150  Probing TPM:  done!

  307 07:04:49.715748  Connected to device vid:did:rid of 1ae0:0028:00

  308 07:04:49.725650  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  309 07:04:49.734523  Initialized TPM device CR50 revision 0

  310 07:04:49.745056  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  311 07:04:49.751571  MRC: Hash idx 0x100b comparison successful.

  312 07:04:49.754960  MRC cache found, size faa8

  313 07:04:49.755557  bootmode is set to: 2

  314 07:04:49.758103  SPD index = 0

  315 07:04:49.764767  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  316 07:04:49.768206  SPD: module type is LPDDR4X

  317 07:04:49.771515  SPD: module part number is MT53E512M64D4NW-046

  318 07:04:49.778002  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  319 07:04:49.784748  SPD: device width 16 bits, bus width 16 bits

  320 07:04:49.788269  SPD: module size is 1024 MB (per channel)

  321 07:04:50.221591  CBMEM:

  322 07:04:50.224982  IMD: root @ 0x76fff000 254 entries.

  323 07:04:50.228306  IMD: root @ 0x76ffec00 62 entries.

  324 07:04:50.231481  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  325 07:04:50.238179  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  326 07:04:50.241310  External stage cache:

  327 07:04:50.244960  IMD: root @ 0x7b3ff000 254 entries.

  328 07:04:50.248342  IMD: root @ 0x7b3fec00 62 entries.

  329 07:04:50.263319  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  330 07:04:50.269982  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  331 07:04:50.276968  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  332 07:04:50.290636  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  333 07:04:50.297247  cse_lite: Skip switching to RW in the recovery path

  334 07:04:50.297953  8 DIMMs found

  335 07:04:50.298401  SMM Memory Map

  336 07:04:50.300418  SMRAM       : 0x7b000000 0x800000

  337 07:04:50.307714   Subregion 0: 0x7b000000 0x200000

  338 07:04:50.308215   Subregion 1: 0x7b200000 0x200000

  339 07:04:50.310784   Subregion 2: 0x7b400000 0x400000

  340 07:04:50.313881  top_of_ram = 0x77000000

  341 07:04:50.320688  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  342 07:04:50.323721  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  343 07:04:50.330982  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  344 07:04:50.334024  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  345 07:04:50.344013  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  346 07:04:50.350777  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  347 07:04:50.360271  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  348 07:04:50.363887  Processing 211 relocs. Offset value of 0x74c0b000

  349 07:04:50.373440  BS: romstage times (exec / console): total (unknown) / 277 ms

  350 07:04:50.379864  

  351 07:04:50.380485  

  352 07:04:50.389358  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  353 07:04:50.392751  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  354 07:04:50.402564  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  355 07:04:50.409104  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  356 07:04:50.415773  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  357 07:04:50.422347  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  358 07:04:50.469669  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  359 07:04:50.475822  Processing 5008 relocs. Offset value of 0x75d98000

  360 07:04:50.479449  BS: postcar times (exec / console): total (unknown) / 59 ms

  361 07:04:50.482838  

  362 07:04:50.483431  

  363 07:04:50.492388  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  364 07:04:50.492961  Normal boot

  365 07:04:50.496579  FW_CONFIG value is 0x804c02

  366 07:04:50.500197  PCI: 00:07.0 disabled by fw_config

  367 07:04:50.502628  PCI: 00:07.1 disabled by fw_config

  368 07:04:50.506482  PCI: 00:0d.2 disabled by fw_config

  369 07:04:50.509703  PCI: 00:1c.7 disabled by fw_config

  370 07:04:50.516339  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  371 07:04:50.523225  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  372 07:04:50.526134  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  373 07:04:50.529749  GENERIC: 0.0 disabled by fw_config

  374 07:04:50.536665  GENERIC: 1.0 disabled by fw_config

  375 07:04:50.539562  fw_config match found: DB_USB=USB3_ACTIVE

  376 07:04:50.543214  fw_config match found: DB_USB=USB3_ACTIVE

  377 07:04:50.545967  fw_config match found: DB_USB=USB3_ACTIVE

  378 07:04:50.553014  fw_config match found: DB_USB=USB3_ACTIVE

  379 07:04:50.556016  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  380 07:04:50.562843  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  381 07:04:50.572528  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  382 07:04:50.579383  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  383 07:04:50.582777  microcode: sig=0x806c1 pf=0x80 revision=0x86

  384 07:04:50.589378  microcode: Update skipped, already up-to-date

  385 07:04:50.596730  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  386 07:04:50.623391  Detected 4 core, 8 thread CPU.

  387 07:04:50.626771  Setting up SMI for CPU

  388 07:04:50.630151  IED base = 0x7b400000

  389 07:04:50.630609  IED size = 0x00400000

  390 07:04:50.633397  Will perform SMM setup.

  391 07:04:50.639746  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  392 07:04:50.647025  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  393 07:04:50.653598  Processing 16 relocs. Offset value of 0x00030000

  394 07:04:50.656868  Attempting to start 7 APs

  395 07:04:50.660157  Waiting for 10ms after sending INIT.

  396 07:04:50.675361  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  397 07:04:50.675926  done.

  398 07:04:50.679031  AP: slot 2 apic_id 3.

  399 07:04:50.682133  AP: slot 6 apic_id 2.

  400 07:04:50.682645  AP: slot 4 apic_id 5.

  401 07:04:50.685791  AP: slot 5 apic_id 4.

  402 07:04:50.688877  AP: slot 7 apic_id 7.

  403 07:04:50.689483  AP: slot 3 apic_id 6.

  404 07:04:50.695795  Waiting for 2nd SIPI to complete...done.

  405 07:04:50.702062  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  406 07:04:50.708773  Processing 13 relocs. Offset value of 0x00038000

  407 07:04:50.709376  Unable to locate Global NVS

  408 07:04:50.718698  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  409 07:04:50.722067  Installing permanent SMM handler to 0x7b000000

  410 07:04:50.732359  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  411 07:04:50.735306  Processing 794 relocs. Offset value of 0x7b010000

  412 07:04:50.745263  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  413 07:04:50.748682  Processing 13 relocs. Offset value of 0x7b008000

  414 07:04:50.755114  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  415 07:04:50.762298  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  416 07:04:50.765027  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  417 07:04:50.772115  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  418 07:04:50.778770  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  419 07:04:50.784960  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  420 07:04:50.792044  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  421 07:04:50.792634  Unable to locate Global NVS

  422 07:04:50.801413  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  423 07:04:50.805037  Clearing SMI status registers

  424 07:04:50.805485  SMI_STS: PM1 

  425 07:04:50.808804  PM1_STS: PWRBTN 

  426 07:04:50.815063  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  427 07:04:50.818781  In relocation handler: CPU 0

  428 07:04:50.821949  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  429 07:04:50.828396  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  430 07:04:50.828849  Relocation complete.

  431 07:04:50.838222  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  432 07:04:50.838818  In relocation handler: CPU 1

  433 07:04:50.845105  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  434 07:04:50.845572  Relocation complete.

  435 07:04:50.854964  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  436 07:04:50.855556  In relocation handler: CPU 6

  437 07:04:50.861473  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  438 07:04:50.864777  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  439 07:04:50.868384  Relocation complete.

  440 07:04:50.874854  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  441 07:04:50.878482  In relocation handler: CPU 2

  442 07:04:50.881223  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  443 07:04:50.884749  Relocation complete.

  444 07:04:50.891352  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  445 07:04:50.895071  In relocation handler: CPU 4

  446 07:04:50.898746  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  447 07:04:50.901579  Relocation complete.

  448 07:04:50.908290  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  449 07:04:50.911223  In relocation handler: CPU 5

  450 07:04:50.914817  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  451 07:04:50.918080  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  452 07:04:50.921427  Relocation complete.

  453 07:04:50.928123  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  454 07:04:50.931258  In relocation handler: CPU 3

  455 07:04:50.934738  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  456 07:04:50.941304  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  457 07:04:50.941788  Relocation complete.

  458 07:04:50.951505  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  459 07:04:50.954935  In relocation handler: CPU 7

  460 07:04:50.958139  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  461 07:04:50.958635  Relocation complete.

  462 07:04:50.961752  Initializing CPU #0

  463 07:04:50.965393  CPU: vendor Intel device 806c1

  464 07:04:50.968008  CPU: family 06, model 8c, stepping 01

  465 07:04:50.971301  Clearing out pending MCEs

  466 07:04:50.974796  Setting up local APIC...

  467 07:04:50.975247   apic_id: 0x00 done.

  468 07:04:50.977952  Turbo is available but hidden

  469 07:04:50.981593  Turbo is available and visible

  470 07:04:50.985347  microcode: Update skipped, already up-to-date

  471 07:04:50.989199  CPU #0 initialized

  472 07:04:50.992666  Initializing CPU #1

  473 07:04:50.993123  Initializing CPU #4

  474 07:04:50.995692  Initializing CPU #7

  475 07:04:50.998912  CPU: vendor Intel device 806c1

  476 07:04:51.002475  CPU: family 06, model 8c, stepping 01

  477 07:04:51.005396  CPU: vendor Intel device 806c1

  478 07:04:51.009249  CPU: family 06, model 8c, stepping 01

  479 07:04:51.012415  Initializing CPU #3

  480 07:04:51.012958  Clearing out pending MCEs

  481 07:04:51.015825  CPU: vendor Intel device 806c1

  482 07:04:51.022190  CPU: family 06, model 8c, stepping 01

  483 07:04:51.022913  Setting up local APIC...

  484 07:04:51.025737  Initializing CPU #2

  485 07:04:51.028587  Initializing CPU #6

  486 07:04:51.032401  CPU: vendor Intel device 806c1

  487 07:04:51.035676  CPU: family 06, model 8c, stepping 01

  488 07:04:51.038546  CPU: vendor Intel device 806c1

  489 07:04:51.042223  CPU: family 06, model 8c, stepping 01

  490 07:04:51.045677  Clearing out pending MCEs

  491 07:04:51.046134  Clearing out pending MCEs

  492 07:04:51.048673  Setting up local APIC...

  493 07:04:51.051993  Clearing out pending MCEs

  494 07:04:51.055570   apic_id: 0x07 done.

  495 07:04:51.056099  Setting up local APIC...

  496 07:04:51.058639  Initializing CPU #5

  497 07:04:51.061999  CPU: vendor Intel device 806c1

  498 07:04:51.065842  CPU: family 06, model 8c, stepping 01

  499 07:04:51.068423  CPU: vendor Intel device 806c1

  500 07:04:51.071994  CPU: family 06, model 8c, stepping 01

  501 07:04:51.075556  Clearing out pending MCEs

  502 07:04:51.078521  Clearing out pending MCEs

  503 07:04:51.078981  Setting up local APIC...

  504 07:04:51.082153   apic_id: 0x06 done.

  505 07:04:51.085223  microcode: Update skipped, already up-to-date

  506 07:04:51.092473  microcode: Update skipped, already up-to-date

  507 07:04:51.093022  CPU #7 initialized

  508 07:04:51.095228   apic_id: 0x05 done.

  509 07:04:51.098773  Setting up local APIC...

  510 07:04:51.102324  Setting up local APIC...

  511 07:04:51.102882  Clearing out pending MCEs

  512 07:04:51.105205   apic_id: 0x02 done.

  513 07:04:51.108710   apic_id: 0x03 done.

  514 07:04:51.109263   apic_id: 0x04 done.

  515 07:04:51.115226  microcode: Update skipped, already up-to-date

  516 07:04:51.118366  microcode: Update skipped, already up-to-date

  517 07:04:51.121585  CPU #4 initialized

  518 07:04:51.122042  CPU #5 initialized

  519 07:04:51.124842  Setting up local APIC...

  520 07:04:51.128407  microcode: Update skipped, already up-to-date

  521 07:04:51.135009  microcode: Update skipped, already up-to-date

  522 07:04:51.135472  CPU #6 initialized

  523 07:04:51.138465  CPU #2 initialized

  524 07:04:51.141545  CPU #3 initialized

  525 07:04:51.142001   apic_id: 0x01 done.

  526 07:04:51.148220  microcode: Update skipped, already up-to-date

  527 07:04:51.148719  CPU #1 initialized

  528 07:04:51.155133  bsp_do_flight_plan done after 455 msecs.

  529 07:04:51.155594  CPU: frequency set to 4000 MHz

  530 07:04:51.158307  Enabling SMIs.

  531 07:04:51.164920  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  532 07:04:51.180537  SATAXPCIE1 indicates PCIe NVMe is present

  533 07:04:51.184008  Probing TPM:  done!

  534 07:04:51.187488  Connected to device vid:did:rid of 1ae0:0028:00

  535 07:04:51.198214  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  536 07:04:51.201157  Initialized TPM device CR50 revision 0

  537 07:04:51.205035  Enabling S0i3.4

  538 07:04:51.211026  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  539 07:04:51.214867  Found a VBT of 8704 bytes after decompression

  540 07:04:51.221184  cse_lite: CSE RO boot. HybridStorageMode disabled

  541 07:04:51.227914  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  542 07:04:51.303620  FSPS returned 0

  543 07:04:51.307248  Executing Phase 1 of FspMultiPhaseSiInit

  544 07:04:51.316892  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  545 07:04:51.320153  port C0 DISC req: usage 1 usb3 1 usb2 5

  546 07:04:51.323894  Raw Buffer output 0 00000511

  547 07:04:51.326769  Raw Buffer output 1 00000000

  548 07:04:51.330897  pmc_send_ipc_cmd succeeded

  549 07:04:51.337237  port C1 DISC req: usage 1 usb3 2 usb2 3

  550 07:04:51.337800  Raw Buffer output 0 00000321

  551 07:04:51.340654  Raw Buffer output 1 00000000

  552 07:04:51.344658  pmc_send_ipc_cmd succeeded

  553 07:04:51.349985  Detected 4 core, 8 thread CPU.

  554 07:04:51.352971  Detected 4 core, 8 thread CPU.

  555 07:04:51.587121  Display FSP Version Info HOB

  556 07:04:51.590434  Reference Code - CPU = a.0.4c.31

  557 07:04:51.593899  uCode Version = 0.0.0.86

  558 07:04:51.596981  TXT ACM version = ff.ff.ff.ffff

  559 07:04:51.600090  Reference Code - ME = a.0.4c.31

  560 07:04:51.604012  MEBx version = 0.0.0.0

  561 07:04:51.606883  ME Firmware Version = Consumer SKU

  562 07:04:51.610176  Reference Code - PCH = a.0.4c.31

  563 07:04:51.613944  PCH-CRID Status = Disabled

  564 07:04:51.617213  PCH-CRID Original Value = ff.ff.ff.ffff

  565 07:04:51.620584  PCH-CRID New Value = ff.ff.ff.ffff

  566 07:04:51.623974  OPROM - RST - RAID = ff.ff.ff.ffff

  567 07:04:51.627274  PCH Hsio Version = 4.0.0.0

  568 07:04:51.630426  Reference Code - SA - System Agent = a.0.4c.31

  569 07:04:51.633653  Reference Code - MRC = 2.0.0.1

  570 07:04:51.637044  SA - PCIe Version = a.0.4c.31

  571 07:04:51.640377  SA-CRID Status = Disabled

  572 07:04:51.643941  SA-CRID Original Value = 0.0.0.1

  573 07:04:51.647183  SA-CRID New Value = 0.0.0.1

  574 07:04:51.650434  OPROM - VBIOS = ff.ff.ff.ffff

  575 07:04:51.653433  IO Manageability Engine FW Version = 11.1.4.0

  576 07:04:51.657418  PHY Build Version = 0.0.0.e0

  577 07:04:51.659952  Thunderbolt(TM) FW Version = 0.0.0.0

  578 07:04:51.667115  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  579 07:04:51.670575  ITSS IRQ Polarities Before:

  580 07:04:51.671172  IPC0: 0xffffffff

  581 07:04:51.673835  IPC1: 0xffffffff

  582 07:04:51.674431  IPC2: 0xffffffff

  583 07:04:51.677425  IPC3: 0xffffffff

  584 07:04:51.680175  ITSS IRQ Polarities After:

  585 07:04:51.680714  IPC0: 0xffffffff

  586 07:04:51.683917  IPC1: 0xffffffff

  587 07:04:51.684548  IPC2: 0xffffffff

  588 07:04:51.687007  IPC3: 0xffffffff

  589 07:04:51.690873  Found PCIe Root Port #9 at PCI: 00:1d.0.

  590 07:04:51.703848  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  591 07:04:51.713800  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  592 07:04:51.726771  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  593 07:04:51.734273  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  594 07:04:51.734966  Enumerating buses...

  595 07:04:51.740618  Show all devs... Before device enumeration.

  596 07:04:51.741217  Root Device: enabled 1

  597 07:04:51.743262  DOMAIN: 0000: enabled 1

  598 07:04:51.746486  CPU_CLUSTER: 0: enabled 1

  599 07:04:51.750254  PCI: 00:00.0: enabled 1

  600 07:04:51.750804  PCI: 00:02.0: enabled 1

  601 07:04:51.753853  PCI: 00:04.0: enabled 1

  602 07:04:51.756759  PCI: 00:05.0: enabled 1

  603 07:04:51.759935  PCI: 00:06.0: enabled 0

  604 07:04:51.760516  PCI: 00:07.0: enabled 0

  605 07:04:51.763457  PCI: 00:07.1: enabled 0

  606 07:04:51.766724  PCI: 00:07.2: enabled 0

  607 07:04:51.770145  PCI: 00:07.3: enabled 0

  608 07:04:51.770738  PCI: 00:08.0: enabled 1

  609 07:04:51.773448  PCI: 00:09.0: enabled 0

  610 07:04:51.776440  PCI: 00:0a.0: enabled 0

  611 07:04:51.780032  PCI: 00:0d.0: enabled 1

  612 07:04:51.780564  PCI: 00:0d.1: enabled 0

  613 07:04:51.783630  PCI: 00:0d.2: enabled 0

  614 07:04:51.786615  PCI: 00:0d.3: enabled 0

  615 07:04:51.787110  PCI: 00:0e.0: enabled 0

  616 07:04:51.790137  PCI: 00:10.2: enabled 1

  617 07:04:51.793442  PCI: 00:10.6: enabled 0

  618 07:04:51.796531  PCI: 00:10.7: enabled 0

  619 07:04:51.797102  PCI: 00:12.0: enabled 0

  620 07:04:51.799750  PCI: 00:12.6: enabled 0

  621 07:04:51.803084  PCI: 00:13.0: enabled 0

  622 07:04:51.806360  PCI: 00:14.0: enabled 1

  623 07:04:51.806858  PCI: 00:14.1: enabled 0

  624 07:04:51.809969  PCI: 00:14.2: enabled 1

  625 07:04:51.813372  PCI: 00:14.3: enabled 1

  626 07:04:51.816625  PCI: 00:15.0: enabled 1

  627 07:04:51.817125  PCI: 00:15.1: enabled 1

  628 07:04:51.819933  PCI: 00:15.2: enabled 1

  629 07:04:51.823496  PCI: 00:15.3: enabled 1

  630 07:04:51.826255  PCI: 00:16.0: enabled 1

  631 07:04:51.826754  PCI: 00:16.1: enabled 0

  632 07:04:51.829807  PCI: 00:16.2: enabled 0

  633 07:04:51.833123  PCI: 00:16.3: enabled 0

  634 07:04:51.833739  PCI: 00:16.4: enabled 0

  635 07:04:51.836419  PCI: 00:16.5: enabled 0

  636 07:04:51.839999  PCI: 00:17.0: enabled 1

  637 07:04:51.843336  PCI: 00:19.0: enabled 0

  638 07:04:51.843930  PCI: 00:19.1: enabled 1

  639 07:04:51.846627  PCI: 00:19.2: enabled 0

  640 07:04:51.850192  PCI: 00:1c.0: enabled 1

  641 07:04:51.852864  PCI: 00:1c.1: enabled 0

  642 07:04:51.853363  PCI: 00:1c.2: enabled 0

  643 07:04:51.856407  PCI: 00:1c.3: enabled 0

  644 07:04:51.859608  PCI: 00:1c.4: enabled 0

  645 07:04:51.862688  PCI: 00:1c.5: enabled 0

  646 07:04:51.863307  PCI: 00:1c.6: enabled 1

  647 07:04:51.866257  PCI: 00:1c.7: enabled 0

  648 07:04:51.869500  PCI: 00:1d.0: enabled 1

  649 07:04:51.870014  PCI: 00:1d.1: enabled 0

  650 07:04:51.872957  PCI: 00:1d.2: enabled 1

  651 07:04:51.876191  PCI: 00:1d.3: enabled 0

  652 07:04:51.879940  PCI: 00:1e.0: enabled 1

  653 07:04:51.880606  PCI: 00:1e.1: enabled 0

  654 07:04:51.883480  PCI: 00:1e.2: enabled 1

  655 07:04:51.886414  PCI: 00:1e.3: enabled 1

  656 07:04:51.889740  PCI: 00:1f.0: enabled 1

  657 07:04:51.890260  PCI: 00:1f.1: enabled 0

  658 07:04:51.893428  PCI: 00:1f.2: enabled 1

  659 07:04:51.896282  PCI: 00:1f.3: enabled 1

  660 07:04:51.899395  PCI: 00:1f.4: enabled 0

  661 07:04:51.900007  PCI: 00:1f.5: enabled 1

  662 07:04:51.902789  PCI: 00:1f.6: enabled 0

  663 07:04:51.906229  PCI: 00:1f.7: enabled 0

  664 07:04:51.906745  APIC: 00: enabled 1

  665 07:04:51.910037  GENERIC: 0.0: enabled 1

  666 07:04:51.913037  GENERIC: 0.0: enabled 1

  667 07:04:51.916077  GENERIC: 1.0: enabled 1

  668 07:04:51.916726  GENERIC: 0.0: enabled 1

  669 07:04:51.919459  GENERIC: 1.0: enabled 1

  670 07:04:51.922808  USB0 port 0: enabled 1

  671 07:04:51.926294  GENERIC: 0.0: enabled 1

  672 07:04:51.926813  USB0 port 0: enabled 1

  673 07:04:51.929289  GENERIC: 0.0: enabled 1

  674 07:04:51.932720  I2C: 00:1a: enabled 1

  675 07:04:51.933377  I2C: 00:31: enabled 1

  676 07:04:51.936415  I2C: 00:32: enabled 1

  677 07:04:51.939544  I2C: 00:10: enabled 1

  678 07:04:51.940059  I2C: 00:15: enabled 1

  679 07:04:51.942964  GENERIC: 0.0: enabled 0

  680 07:04:51.946168  GENERIC: 1.0: enabled 0

  681 07:04:51.949144  GENERIC: 0.0: enabled 1

  682 07:04:51.949622  SPI: 00: enabled 1

  683 07:04:51.952462  SPI: 00: enabled 1

  684 07:04:51.952961  PNP: 0c09.0: enabled 1

  685 07:04:51.956144  GENERIC: 0.0: enabled 1

  686 07:04:51.959354  USB3 port 0: enabled 1

  687 07:04:51.962661  USB3 port 1: enabled 1

  688 07:04:51.963178  USB3 port 2: enabled 0

  689 07:04:51.965917  USB3 port 3: enabled 0

  690 07:04:51.969356  USB2 port 0: enabled 0

  691 07:04:51.969870  USB2 port 1: enabled 1

  692 07:04:51.972362  USB2 port 2: enabled 1

  693 07:04:51.975635  USB2 port 3: enabled 0

  694 07:04:51.979297  USB2 port 4: enabled 1

  695 07:04:51.979853  USB2 port 5: enabled 0

  696 07:04:51.982832  USB2 port 6: enabled 0

  697 07:04:51.985488  USB2 port 7: enabled 0

  698 07:04:51.986018  USB2 port 8: enabled 0

  699 07:04:51.989060  USB2 port 9: enabled 0

  700 07:04:51.992624  USB3 port 0: enabled 0

  701 07:04:51.993260  USB3 port 1: enabled 1

  702 07:04:51.995560  USB3 port 2: enabled 0

  703 07:04:51.999020  USB3 port 3: enabled 0

  704 07:04:52.002269  GENERIC: 0.0: enabled 1

  705 07:04:52.002796  GENERIC: 1.0: enabled 1

  706 07:04:52.005840  APIC: 01: enabled 1

  707 07:04:52.008795  APIC: 03: enabled 1

  708 07:04:52.009270  APIC: 06: enabled 1

  709 07:04:52.012899  APIC: 05: enabled 1

  710 07:04:52.013450  APIC: 04: enabled 1

  711 07:04:52.015527  APIC: 02: enabled 1

  712 07:04:52.018963  APIC: 07: enabled 1

  713 07:04:52.019495  Compare with tree...

  714 07:04:52.022383  Root Device: enabled 1

  715 07:04:52.025724   DOMAIN: 0000: enabled 1

  716 07:04:52.029527    PCI: 00:00.0: enabled 1

  717 07:04:52.030057    PCI: 00:02.0: enabled 1

  718 07:04:52.032142    PCI: 00:04.0: enabled 1

  719 07:04:52.035593     GENERIC: 0.0: enabled 1

  720 07:04:52.038931    PCI: 00:05.0: enabled 1

  721 07:04:52.042241    PCI: 00:06.0: enabled 0

  722 07:04:52.042693    PCI: 00:07.0: enabled 0

  723 07:04:52.045389     GENERIC: 0.0: enabled 1

  724 07:04:52.048772    PCI: 00:07.1: enabled 0

  725 07:04:52.052219     GENERIC: 1.0: enabled 1

  726 07:04:52.055799    PCI: 00:07.2: enabled 0

  727 07:04:52.056427     GENERIC: 0.0: enabled 1

  728 07:04:52.058762    PCI: 00:07.3: enabled 0

  729 07:04:52.061978     GENERIC: 1.0: enabled 1

  730 07:04:52.065673    PCI: 00:08.0: enabled 1

  731 07:04:52.068817    PCI: 00:09.0: enabled 0

  732 07:04:52.069264    PCI: 00:0a.0: enabled 0

  733 07:04:52.072450    PCI: 00:0d.0: enabled 1

  734 07:04:52.075612     USB0 port 0: enabled 1

  735 07:04:52.079147      USB3 port 0: enabled 1

  736 07:04:52.082312      USB3 port 1: enabled 1

  737 07:04:52.085608      USB3 port 2: enabled 0

  738 07:04:52.086110      USB3 port 3: enabled 0

  739 07:04:52.089092    PCI: 00:0d.1: enabled 0

  740 07:04:52.092173    PCI: 00:0d.2: enabled 0

  741 07:04:52.095404     GENERIC: 0.0: enabled 1

  742 07:04:52.099306    PCI: 00:0d.3: enabled 0

  743 07:04:52.099881    PCI: 00:0e.0: enabled 0

  744 07:04:52.101955    PCI: 00:10.2: enabled 1

  745 07:04:52.105379    PCI: 00:10.6: enabled 0

  746 07:04:52.108890    PCI: 00:10.7: enabled 0

  747 07:04:52.112561    PCI: 00:12.0: enabled 0

  748 07:04:52.113156    PCI: 00:12.6: enabled 0

  749 07:04:52.115244    PCI: 00:13.0: enabled 0

  750 07:04:52.118709    PCI: 00:14.0: enabled 1

  751 07:04:52.122062     USB0 port 0: enabled 1

  752 07:04:52.122651      USB2 port 0: enabled 0

  753 07:04:52.125371      USB2 port 1: enabled 1

  754 07:04:52.128743      USB2 port 2: enabled 1

  755 07:04:52.132238      USB2 port 3: enabled 0

  756 07:04:52.135344      USB2 port 4: enabled 1

  757 07:04:52.138669      USB2 port 5: enabled 0

  758 07:04:52.139166      USB2 port 6: enabled 0

  759 07:04:52.142203      USB2 port 7: enabled 0

  760 07:04:52.145788      USB2 port 8: enabled 0

  761 07:04:52.148810      USB2 port 9: enabled 0

  762 07:04:52.151782      USB3 port 0: enabled 0

  763 07:04:52.155353      USB3 port 1: enabled 1

  764 07:04:52.155852      USB3 port 2: enabled 0

  765 07:04:52.158859      USB3 port 3: enabled 0

  766 07:04:52.162269    PCI: 00:14.1: enabled 0

  767 07:04:52.165020    PCI: 00:14.2: enabled 1

  768 07:04:52.168465    PCI: 00:14.3: enabled 1

  769 07:04:52.168961     GENERIC: 0.0: enabled 1

  770 07:04:52.172483    PCI: 00:15.0: enabled 1

  771 07:04:52.175093     I2C: 00:1a: enabled 1

  772 07:04:52.178381     I2C: 00:31: enabled 1

  773 07:04:52.178881     I2C: 00:32: enabled 1

  774 07:04:52.182059    PCI: 00:15.1: enabled 1

  775 07:04:52.185285     I2C: 00:10: enabled 1

  776 07:04:52.188608    PCI: 00:15.2: enabled 1

  777 07:04:52.191930    PCI: 00:15.3: enabled 1

  778 07:04:52.192538    PCI: 00:16.0: enabled 1

  779 07:04:52.195276    PCI: 00:16.1: enabled 0

  780 07:04:52.198508    PCI: 00:16.2: enabled 0

  781 07:04:52.201586    PCI: 00:16.3: enabled 0

  782 07:04:52.204916    PCI: 00:16.4: enabled 0

  783 07:04:52.205413    PCI: 00:16.5: enabled 0

  784 07:04:52.208459    PCI: 00:17.0: enabled 1

  785 07:04:52.211860    PCI: 00:19.0: enabled 0

  786 07:04:52.215136    PCI: 00:19.1: enabled 1

  787 07:04:52.218589     I2C: 00:15: enabled 1

  788 07:04:52.219093    PCI: 00:19.2: enabled 0

  789 07:04:52.221611    PCI: 00:1d.0: enabled 1

  790 07:04:52.225243     GENERIC: 0.0: enabled 1

  791 07:04:52.228304    PCI: 00:1e.0: enabled 1

  792 07:04:52.231672    PCI: 00:1e.1: enabled 0

  793 07:04:52.232245    PCI: 00:1e.2: enabled 1

  794 07:04:52.235738     SPI: 00: enabled 1

  795 07:04:52.239797    PCI: 00:1e.3: enabled 1

  796 07:04:52.240444     SPI: 00: enabled 1

  797 07:04:52.243237    PCI: 00:1f.0: enabled 1

  798 07:04:52.294716     PNP: 0c09.0: enabled 1

  799 07:04:52.295432    PCI: 00:1f.1: enabled 0

  800 07:04:52.295856    PCI: 00:1f.2: enabled 1

  801 07:04:52.296229     GENERIC: 0.0: enabled 1

  802 07:04:52.296647      GENERIC: 0.0: enabled 1

  803 07:04:52.297372      GENERIC: 1.0: enabled 1

  804 07:04:52.297807    PCI: 00:1f.3: enabled 1

  805 07:04:52.298186    PCI: 00:1f.4: enabled 0

  806 07:04:52.298530    PCI: 00:1f.5: enabled 1

  807 07:04:52.298886    PCI: 00:1f.6: enabled 0

  808 07:04:52.299217    PCI: 00:1f.7: enabled 0

  809 07:04:52.299556   CPU_CLUSTER: 0: enabled 1

  810 07:04:52.299882    APIC: 00: enabled 1

  811 07:04:52.300206    APIC: 01: enabled 1

  812 07:04:52.300566    APIC: 03: enabled 1

  813 07:04:52.300894    APIC: 06: enabled 1

  814 07:04:52.301260    APIC: 05: enabled 1

  815 07:04:52.301637    APIC: 04: enabled 1

  816 07:04:52.302015    APIC: 02: enabled 1

  817 07:04:52.302339    APIC: 07: enabled 1

  818 07:04:52.344803  Root Device scanning...

  819 07:04:52.345384  scan_static_bus for Root Device

  820 07:04:52.345779  DOMAIN: 0000 enabled

  821 07:04:52.346530  CPU_CLUSTER: 0 enabled

  822 07:04:52.347085  DOMAIN: 0000 scanning...

  823 07:04:52.347576  PCI: pci_scan_bus for bus 00

  824 07:04:52.347962  PCI: 00:00.0 [8086/0000] ops

  825 07:04:52.348374  PCI: 00:00.0 [8086/9a12] enabled

  826 07:04:52.348741  PCI: 00:02.0 [8086/0000] bus ops

  827 07:04:52.349081  PCI: 00:02.0 [8086/9a40] enabled

  828 07:04:52.349414  PCI: 00:04.0 [8086/0000] bus ops

  829 07:04:52.350091  PCI: 00:04.0 [8086/9a03] enabled

  830 07:04:52.350508  PCI: 00:05.0 [8086/9a19] enabled

  831 07:04:52.350849  PCI: 00:07.0 [0000/0000] hidden

  832 07:04:52.351224  PCI: 00:08.0 [8086/9a11] enabled

  833 07:04:52.351737  PCI: 00:0a.0 [8086/9a0d] disabled

  834 07:04:52.352090  PCI: 00:0d.0 [8086/0000] bus ops

  835 07:04:52.395498  PCI: 00:0d.0 [8086/9a13] enabled

  836 07:04:52.396129  PCI: 00:14.0 [8086/0000] bus ops

  837 07:04:52.396639  PCI: 00:14.0 [8086/a0ed] enabled

  838 07:04:52.397432  PCI: 00:14.2 [8086/a0ef] enabled

  839 07:04:52.397870  PCI: 00:14.3 [8086/0000] bus ops

  840 07:04:52.398260  PCI: 00:14.3 [8086/a0f0] enabled

  841 07:04:52.398613  PCI: 00:15.0 [8086/0000] bus ops

  842 07:04:52.398953  PCI: 00:15.0 [8086/a0e8] enabled

  843 07:04:52.399287  PCI: 00:15.1 [8086/0000] bus ops

  844 07:04:52.399616  PCI: 00:15.1 [8086/a0e9] enabled

  845 07:04:52.399945  PCI: 00:15.2 [8086/0000] bus ops

  846 07:04:52.400269  PCI: 00:15.2 [8086/a0ea] enabled

  847 07:04:52.400644  PCI: 00:15.3 [8086/0000] bus ops

  848 07:04:52.400972  PCI: 00:15.3 [8086/a0eb] enabled

  849 07:04:52.401300  PCI: 00:16.0 [8086/0000] ops

  850 07:04:52.420815  PCI: 00:16.0 [8086/a0e0] enabled

  851 07:04:52.421469  PCI: Static device PCI: 00:17.0 not found, disabling it.

  852 07:04:52.421879  PCI: 00:19.0 [8086/0000] bus ops

  853 07:04:52.422630  PCI: 00:19.0 [8086/a0c5] disabled

  854 07:04:52.423044  PCI: 00:19.1 [8086/0000] bus ops

  855 07:04:52.423406  PCI: 00:19.1 [8086/a0c6] enabled

  856 07:04:52.424266  PCI: 00:1d.0 [8086/0000] bus ops

  857 07:04:52.424790  PCI: 00:1d.0 [8086/a0b0] enabled

  858 07:04:52.427990  PCI: 00:1e.0 [8086/0000] ops

  859 07:04:52.431123  PCI: 00:1e.0 [8086/a0a8] enabled

  860 07:04:52.434125  PCI: 00:1e.2 [8086/0000] bus ops

  861 07:04:52.437445  PCI: 00:1e.2 [8086/a0aa] enabled

  862 07:04:52.440925  PCI: 00:1e.3 [8086/0000] bus ops

  863 07:04:52.444345  PCI: 00:1e.3 [8086/a0ab] enabled

  864 07:04:52.447565  PCI: 00:1f.0 [8086/0000] bus ops

  865 07:04:52.450723  PCI: 00:1f.0 [8086/a087] enabled

  866 07:04:52.454382  RTC Init

  867 07:04:52.457471  Set power on after power failure.

  868 07:04:52.458153  Disabling Deep S3

  869 07:04:52.460777  Disabling Deep S3

  870 07:04:52.461334  Disabling Deep S4

  871 07:04:52.464245  Disabling Deep S4

  872 07:04:52.467244  Disabling Deep S5

  873 07:04:52.467821  Disabling Deep S5

  874 07:04:52.470678  PCI: 00:1f.2 [0000/0000] hidden

  875 07:04:52.473894  PCI: 00:1f.3 [8086/0000] bus ops

  876 07:04:52.477517  PCI: 00:1f.3 [8086/a0c8] enabled

  877 07:04:52.480648  PCI: 00:1f.5 [8086/0000] bus ops

  878 07:04:52.484213  PCI: 00:1f.5 [8086/a0a4] enabled

  879 07:04:52.487443  PCI: Leftover static devices:

  880 07:04:52.487998  PCI: 00:10.2

  881 07:04:52.490839  PCI: 00:10.6

  882 07:04:52.491512  PCI: 00:10.7

  883 07:04:52.494341  PCI: 00:06.0

  884 07:04:52.494999  PCI: 00:07.1

  885 07:04:52.495445  PCI: 00:07.2

  886 07:04:52.497733  PCI: 00:07.3

  887 07:04:52.498310  PCI: 00:09.0

  888 07:04:52.500522  PCI: 00:0d.1

  889 07:04:52.501076  PCI: 00:0d.2

  890 07:04:52.504043  PCI: 00:0d.3

  891 07:04:52.504628  PCI: 00:0e.0

  892 07:04:52.505076  PCI: 00:12.0

  893 07:04:52.507169  PCI: 00:12.6

  894 07:04:52.507724  PCI: 00:13.0

  895 07:04:52.510691  PCI: 00:14.1

  896 07:04:52.511353  PCI: 00:16.1

  897 07:04:52.511811  PCI: 00:16.2

  898 07:04:52.514143  PCI: 00:16.3

  899 07:04:52.514733  PCI: 00:16.4

  900 07:04:52.517838  PCI: 00:16.5

  901 07:04:52.518497  PCI: 00:17.0

  902 07:04:52.518987  PCI: 00:19.2

  903 07:04:52.520673  PCI: 00:1e.1

  904 07:04:52.521228  PCI: 00:1f.1

  905 07:04:52.523854  PCI: 00:1f.4

  906 07:04:52.524485  PCI: 00:1f.6

  907 07:04:52.527297  PCI: 00:1f.7

  908 07:04:52.527847  PCI: Check your devicetree.cb.

  909 07:04:52.530855  PCI: 00:02.0 scanning...

  910 07:04:52.534316  scan_generic_bus for PCI: 00:02.0

  911 07:04:52.537842  scan_generic_bus for PCI: 00:02.0 done

  912 07:04:52.544380  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  913 07:04:52.547348  PCI: 00:04.0 scanning...

  914 07:04:52.550513  scan_generic_bus for PCI: 00:04.0

  915 07:04:52.551061  GENERIC: 0.0 enabled

  916 07:04:52.557731  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  917 07:04:52.563819  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  918 07:04:52.564504  PCI: 00:0d.0 scanning...

  919 07:04:52.567186  scan_static_bus for PCI: 00:0d.0

  920 07:04:52.570655  USB0 port 0 enabled

  921 07:04:52.574067  USB0 port 0 scanning...

  922 07:04:52.577202  scan_static_bus for USB0 port 0

  923 07:04:52.580517  USB3 port 0 enabled

  924 07:04:52.581067  USB3 port 1 enabled

  925 07:04:52.583944  USB3 port 2 disabled

  926 07:04:52.584532  USB3 port 3 disabled

  927 07:04:52.587009  USB3 port 0 scanning...

  928 07:04:52.590672  scan_static_bus for USB3 port 0

  929 07:04:52.593834  scan_static_bus for USB3 port 0 done

  930 07:04:52.600424  scan_bus: bus USB3 port 0 finished in 6 msecs

  931 07:04:52.601059  USB3 port 1 scanning...

  932 07:04:52.603902  scan_static_bus for USB3 port 1

  933 07:04:52.610410  scan_static_bus for USB3 port 1 done

  934 07:04:52.613798  scan_bus: bus USB3 port 1 finished in 6 msecs

  935 07:04:52.617263  scan_static_bus for USB0 port 0 done

  936 07:04:52.620851  scan_bus: bus USB0 port 0 finished in 43 msecs

  937 07:04:52.627018  scan_static_bus for PCI: 00:0d.0 done

  938 07:04:52.630524  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  939 07:04:52.634320  PCI: 00:14.0 scanning...

  940 07:04:52.637059  scan_static_bus for PCI: 00:14.0

  941 07:04:52.640488  USB0 port 0 enabled

  942 07:04:52.641275  USB0 port 0 scanning...

  943 07:04:52.643711  scan_static_bus for USB0 port 0

  944 07:04:52.647392  USB2 port 0 disabled

  945 07:04:52.650584  USB2 port 1 enabled

  946 07:04:52.651091  USB2 port 2 enabled

  947 07:04:52.653747  USB2 port 3 disabled

  948 07:04:52.654290  USB2 port 4 enabled

  949 07:04:52.656814  USB2 port 5 disabled

  950 07:04:52.660162  USB2 port 6 disabled

  951 07:04:52.660903  USB2 port 7 disabled

  952 07:04:52.663992  USB2 port 8 disabled

  953 07:04:52.666931  USB2 port 9 disabled

  954 07:04:52.667430  USB3 port 0 disabled

  955 07:04:52.670200  USB3 port 1 enabled

  956 07:04:52.673573  USB3 port 2 disabled

  957 07:04:52.674073  USB3 port 3 disabled

  958 07:04:52.676708  USB2 port 1 scanning...

  959 07:04:52.680155  scan_static_bus for USB2 port 1

  960 07:04:52.683365  scan_static_bus for USB2 port 1 done

  961 07:04:52.689963  scan_bus: bus USB2 port 1 finished in 6 msecs

  962 07:04:52.690564  USB2 port 2 scanning...

  963 07:04:52.693830  scan_static_bus for USB2 port 2

  964 07:04:52.697272  scan_static_bus for USB2 port 2 done

  965 07:04:52.703659  scan_bus: bus USB2 port 2 finished in 6 msecs

  966 07:04:52.706881  USB2 port 4 scanning...

  967 07:04:52.710017  scan_static_bus for USB2 port 4

  968 07:04:52.713204  scan_static_bus for USB2 port 4 done

  969 07:04:52.717297  scan_bus: bus USB2 port 4 finished in 6 msecs

  970 07:04:52.720109  USB3 port 1 scanning...

  971 07:04:52.723728  scan_static_bus for USB3 port 1

  972 07:04:52.726981  scan_static_bus for USB3 port 1 done

  973 07:04:52.730409  scan_bus: bus USB3 port 1 finished in 6 msecs

  974 07:04:52.733656  scan_static_bus for USB0 port 0 done

  975 07:04:52.740300  scan_bus: bus USB0 port 0 finished in 93 msecs

  976 07:04:52.743849  scan_static_bus for PCI: 00:14.0 done

  977 07:04:52.747059  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  978 07:04:52.750341  PCI: 00:14.3 scanning...

  979 07:04:52.753685  scan_static_bus for PCI: 00:14.3

  980 07:04:52.756942  GENERIC: 0.0 enabled

  981 07:04:52.759876  scan_static_bus for PCI: 00:14.3 done

  982 07:04:52.766456  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  983 07:04:52.767100  PCI: 00:15.0 scanning...

  984 07:04:52.769975  scan_static_bus for PCI: 00:15.0

  985 07:04:52.773396  I2C: 00:1a enabled

  986 07:04:52.776669  I2C: 00:31 enabled

  987 07:04:52.777173  I2C: 00:32 enabled

  988 07:04:52.780186  scan_static_bus for PCI: 00:15.0 done

  989 07:04:52.786588  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  990 07:04:52.787214  PCI: 00:15.1 scanning...

  991 07:04:52.790291  scan_static_bus for PCI: 00:15.1

  992 07:04:52.793568  I2C: 00:10 enabled

  993 07:04:52.796830  scan_static_bus for PCI: 00:15.1 done

  994 07:04:52.803252  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  995 07:04:52.803841  PCI: 00:15.2 scanning...

  996 07:04:52.806969  scan_static_bus for PCI: 00:15.2

  997 07:04:52.813575  scan_static_bus for PCI: 00:15.2 done

  998 07:04:52.816426  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  999 07:04:52.820306  PCI: 00:15.3 scanning...

 1000 07:04:52.823481  scan_static_bus for PCI: 00:15.3

 1001 07:04:52.827096  scan_static_bus for PCI: 00:15.3 done

 1002 07:04:52.830273  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1003 07:04:52.833644  PCI: 00:19.1 scanning...

 1004 07:04:52.837299  scan_static_bus for PCI: 00:19.1

 1005 07:04:52.840235  I2C: 00:15 enabled

 1006 07:04:52.843991  scan_static_bus for PCI: 00:19.1 done

 1007 07:04:52.846769  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1008 07:04:52.849992  PCI: 00:1d.0 scanning...

 1009 07:04:52.853619  do_pci_scan_bridge for PCI: 00:1d.0

 1010 07:04:52.856955  PCI: pci_scan_bus for bus 01

 1011 07:04:52.860099  PCI: 01:00.0 [1c5c/174a] enabled

 1012 07:04:52.863386  GENERIC: 0.0 enabled

 1013 07:04:52.867132  Enabling Common Clock Configuration

 1014 07:04:52.870174  L1 Sub-State supported from root port 29

 1015 07:04:52.873730  L1 Sub-State Support = 0xf

 1016 07:04:52.876843  CommonModeRestoreTime = 0x28

 1017 07:04:52.880195  Power On Value = 0x16, Power On Scale = 0x0

 1018 07:04:52.883847  ASPM: Enabled L1

 1019 07:04:52.886695  PCIe: Max_Payload_Size adjusted to 128

 1020 07:04:52.890382  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1021 07:04:52.893975  PCI: 00:1e.2 scanning...

 1022 07:04:52.897000  scan_generic_bus for PCI: 00:1e.2

 1023 07:04:52.899968  SPI: 00 enabled

 1024 07:04:52.907046  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1025 07:04:52.909950  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1026 07:04:52.913839  PCI: 00:1e.3 scanning...

 1027 07:04:52.916771  scan_generic_bus for PCI: 00:1e.3

 1028 07:04:52.917276  SPI: 00 enabled

 1029 07:04:52.923734  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1030 07:04:52.930471  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1031 07:04:52.931089  PCI: 00:1f.0 scanning...

 1032 07:04:52.933660  scan_static_bus for PCI: 00:1f.0

 1033 07:04:52.937068  PNP: 0c09.0 enabled

 1034 07:04:52.940570  PNP: 0c09.0 scanning...

 1035 07:04:52.943992  scan_static_bus for PNP: 0c09.0

 1036 07:04:52.946751  scan_static_bus for PNP: 0c09.0 done

 1037 07:04:52.950139  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1038 07:04:52.953353  scan_static_bus for PCI: 00:1f.0 done

 1039 07:04:52.960042  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1040 07:04:52.963263  PCI: 00:1f.2 scanning...

 1041 07:04:52.966601  scan_static_bus for PCI: 00:1f.2

 1042 07:04:52.967107  GENERIC: 0.0 enabled

 1043 07:04:52.970053  GENERIC: 0.0 scanning...

 1044 07:04:52.973781  scan_static_bus for GENERIC: 0.0

 1045 07:04:52.976782  GENERIC: 0.0 enabled

 1046 07:04:52.980389  GENERIC: 1.0 enabled

 1047 07:04:52.983144  scan_static_bus for GENERIC: 0.0 done

 1048 07:04:52.986564  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1049 07:04:52.989700  scan_static_bus for PCI: 00:1f.2 done

 1050 07:04:52.996520  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1051 07:04:52.997056  PCI: 00:1f.3 scanning...

 1052 07:04:53.000140  scan_static_bus for PCI: 00:1f.3

 1053 07:04:53.006851  scan_static_bus for PCI: 00:1f.3 done

 1054 07:04:53.010366  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1055 07:04:53.013708  PCI: 00:1f.5 scanning...

 1056 07:04:53.016785  scan_generic_bus for PCI: 00:1f.5

 1057 07:04:53.019989  scan_generic_bus for PCI: 00:1f.5 done

 1058 07:04:53.026837  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1059 07:04:53.029751  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1060 07:04:53.033008  scan_static_bus for Root Device done

 1061 07:04:53.040081  scan_bus: bus Root Device finished in 736 msecs

 1062 07:04:53.040722  done

 1063 07:04:53.046519  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1064 07:04:53.049359  Chrome EC: UHEPI supported

 1065 07:04:53.055959  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1066 07:04:53.062906  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1067 07:04:53.065989  SPI flash protection: WPSW=0 SRP0=0

 1068 07:04:53.069651  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1069 07:04:53.075919  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1070 07:04:53.079991  found VGA at PCI: 00:02.0

 1071 07:04:53.082970  Setting up VGA for PCI: 00:02.0

 1072 07:04:53.086393  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1073 07:04:53.092754  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1074 07:04:53.095962  Allocating resources...

 1075 07:04:53.096505  Reading resources...

 1076 07:04:53.099561  Root Device read_resources bus 0 link: 0

 1077 07:04:53.105998  DOMAIN: 0000 read_resources bus 0 link: 0

 1078 07:04:53.109829  PCI: 00:04.0 read_resources bus 1 link: 0

 1079 07:04:53.116069  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1080 07:04:53.119983  PCI: 00:0d.0 read_resources bus 0 link: 0

 1081 07:04:53.125706  USB0 port 0 read_resources bus 0 link: 0

 1082 07:04:53.128886  USB0 port 0 read_resources bus 0 link: 0 done

 1083 07:04:53.136273  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1084 07:04:53.139503  PCI: 00:14.0 read_resources bus 0 link: 0

 1085 07:04:53.142528  USB0 port 0 read_resources bus 0 link: 0

 1086 07:04:53.150136  USB0 port 0 read_resources bus 0 link: 0 done

 1087 07:04:53.153248  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1088 07:04:53.160193  PCI: 00:14.3 read_resources bus 0 link: 0

 1089 07:04:53.163639  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1090 07:04:53.170470  PCI: 00:15.0 read_resources bus 0 link: 0

 1091 07:04:53.173604  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1092 07:04:53.180368  PCI: 00:15.1 read_resources bus 0 link: 0

 1093 07:04:53.183533  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1094 07:04:53.190661  PCI: 00:19.1 read_resources bus 0 link: 0

 1095 07:04:53.193981  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1096 07:04:53.200411  PCI: 00:1d.0 read_resources bus 1 link: 0

 1097 07:04:53.203825  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1098 07:04:53.210393  PCI: 00:1e.2 read_resources bus 2 link: 0

 1099 07:04:53.213820  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1100 07:04:53.220718  PCI: 00:1e.3 read_resources bus 3 link: 0

 1101 07:04:53.223926  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1102 07:04:53.230392  PCI: 00:1f.0 read_resources bus 0 link: 0

 1103 07:04:53.233876  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1104 07:04:53.237324  PCI: 00:1f.2 read_resources bus 0 link: 0

 1105 07:04:53.243991  GENERIC: 0.0 read_resources bus 0 link: 0

 1106 07:04:53.247273  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1107 07:04:53.253640  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1108 07:04:53.260398  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1109 07:04:53.264023  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1110 07:04:53.270218  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1111 07:04:53.273608  Root Device read_resources bus 0 link: 0 done

 1112 07:04:53.276854  Done reading resources.

 1113 07:04:53.280472  Show resources in subtree (Root Device)...After reading.

 1114 07:04:53.287197   Root Device child on link 0 DOMAIN: 0000

 1115 07:04:53.290369    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1116 07:04:53.300377    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1117 07:04:53.310422    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1118 07:04:53.310957     PCI: 00:00.0

 1119 07:04:53.320404     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1120 07:04:53.330081     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1121 07:04:53.340044     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1122 07:04:53.350026     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1123 07:04:53.359844     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1124 07:04:53.366815     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1125 07:04:53.376508     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1126 07:04:53.386521     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1127 07:04:53.396623     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1128 07:04:53.406578     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1129 07:04:53.413242     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1130 07:04:53.423097     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1131 07:04:53.432932     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1132 07:04:53.443469     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1133 07:04:53.452940     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1134 07:04:53.459795     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1135 07:04:53.472914     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1136 07:04:53.479856     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1137 07:04:53.489239     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1138 07:04:53.499464     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1139 07:04:53.502583     PCI: 00:02.0

 1140 07:04:53.512843     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1141 07:04:53.523120     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1142 07:04:53.529467     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1143 07:04:53.536160     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1144 07:04:53.546053     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1145 07:04:53.546650      GENERIC: 0.0

 1146 07:04:53.549517     PCI: 00:05.0

 1147 07:04:53.559273     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1148 07:04:53.562740     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1149 07:04:53.566094      GENERIC: 0.0

 1150 07:04:53.566597     PCI: 00:08.0

 1151 07:04:53.575991     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1152 07:04:53.579386     PCI: 00:0a.0

 1153 07:04:53.582607     PCI: 00:0d.0 child on link 0 USB0 port 0

 1154 07:04:53.592350     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1155 07:04:53.595667      USB0 port 0 child on link 0 USB3 port 0

 1156 07:04:53.599470       USB3 port 0

 1157 07:04:53.600000       USB3 port 1

 1158 07:04:53.602455       USB3 port 2

 1159 07:04:53.602961       USB3 port 3

 1160 07:04:53.608917     PCI: 00:14.0 child on link 0 USB0 port 0

 1161 07:04:53.618920     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1162 07:04:53.622489      USB0 port 0 child on link 0 USB2 port 0

 1163 07:04:53.625987       USB2 port 0

 1164 07:04:53.626489       USB2 port 1

 1165 07:04:53.628761       USB2 port 2

 1166 07:04:53.629262       USB2 port 3

 1167 07:04:53.632269       USB2 port 4

 1168 07:04:53.632797       USB2 port 5

 1169 07:04:53.635546       USB2 port 6

 1170 07:04:53.636142       USB2 port 7

 1171 07:04:53.638984       USB2 port 8

 1172 07:04:53.639488       USB2 port 9

 1173 07:04:53.642340       USB3 port 0

 1174 07:04:53.642848       USB3 port 1

 1175 07:04:53.645948       USB3 port 2

 1176 07:04:53.648975       USB3 port 3

 1177 07:04:53.649478     PCI: 00:14.2

 1178 07:04:53.659328     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 07:04:53.669082     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1180 07:04:53.672108     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1181 07:04:53.682037     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1182 07:04:53.685518      GENERIC: 0.0

 1183 07:04:53.689113     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1184 07:04:53.698996     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1185 07:04:53.701972      I2C: 00:1a

 1186 07:04:53.702472      I2C: 00:31

 1187 07:04:53.705455      I2C: 00:32

 1188 07:04:53.708723     PCI: 00:15.1 child on link 0 I2C: 00:10

 1189 07:04:53.718726     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 07:04:53.719296      I2C: 00:10

 1191 07:04:53.721905     PCI: 00:15.2

 1192 07:04:53.732211     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 07:04:53.732808     PCI: 00:15.3

 1194 07:04:53.742127     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 07:04:53.745248     PCI: 00:16.0

 1196 07:04:53.755456     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 07:04:53.756026     PCI: 00:19.0

 1198 07:04:53.762203     PCI: 00:19.1 child on link 0 I2C: 00:15

 1199 07:04:53.772185     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1200 07:04:53.772722      I2C: 00:15

 1201 07:04:53.775322     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1202 07:04:53.785627     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1203 07:04:53.795456     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1204 07:04:53.805007     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1205 07:04:53.805579      GENERIC: 0.0

 1206 07:04:53.808567      PCI: 01:00.0

 1207 07:04:53.818345      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1208 07:04:53.828631      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1209 07:04:53.835316      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1210 07:04:53.838282     PCI: 00:1e.0

 1211 07:04:53.848349     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 07:04:53.855364     PCI: 00:1e.2 child on link 0 SPI: 00

 1213 07:04:53.864843     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 07:04:53.865350      SPI: 00

 1215 07:04:53.868835     PCI: 00:1e.3 child on link 0 SPI: 00

 1216 07:04:53.878419     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1217 07:04:53.879022      SPI: 00

 1218 07:04:53.885149     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1219 07:04:53.891559     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1220 07:04:53.895047      PNP: 0c09.0

 1221 07:04:53.904888      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1222 07:04:53.908392     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1223 07:04:53.917991     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1224 07:04:53.928155     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1225 07:04:53.931649      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1226 07:04:53.932245       GENERIC: 0.0

 1227 07:04:53.934711       GENERIC: 1.0

 1228 07:04:53.938049     PCI: 00:1f.3

 1229 07:04:53.948137     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1230 07:04:53.958177     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1231 07:04:53.958685     PCI: 00:1f.5

 1232 07:04:53.967879     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1233 07:04:53.971029    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1234 07:04:53.974759     APIC: 00

 1235 07:04:53.975381     APIC: 01

 1236 07:04:53.975864     APIC: 03

 1237 07:04:53.977842     APIC: 06

 1238 07:04:53.978344     APIC: 05

 1239 07:04:53.978737     APIC: 04

 1240 07:04:53.981306     APIC: 02

 1241 07:04:53.981900     APIC: 07

 1242 07:04:53.991534  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1243 07:04:53.994804   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1244 07:04:54.001252   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1245 07:04:54.007877   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1246 07:04:54.010786    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1247 07:04:54.014259    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1248 07:04:54.020757    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1249 07:04:54.027502   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1250 07:04:54.034238   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1251 07:04:54.040961   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1252 07:04:54.050754  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1253 07:04:54.054105  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1254 07:04:54.063841   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1255 07:04:54.070797   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1256 07:04:54.077398   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1257 07:04:54.080605   DOMAIN: 0000: Resource ranges:

 1258 07:04:54.083893   * Base: 1000, Size: 800, Tag: 100

 1259 07:04:54.087545   * Base: 1900, Size: e700, Tag: 100

 1260 07:04:54.094318    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1261 07:04:54.100441  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1262 07:04:54.107058  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1263 07:04:54.114093   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1264 07:04:54.123706   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1265 07:04:54.130244   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1266 07:04:54.137210   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1267 07:04:54.147121   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1268 07:04:54.153722   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1269 07:04:54.161040   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1270 07:04:54.170102   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1271 07:04:54.176755   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1272 07:04:54.183855   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1273 07:04:54.193575   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1274 07:04:54.200506   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1275 07:04:54.206775   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1276 07:04:54.216955   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1277 07:04:54.223691   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1278 07:04:54.230007   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1279 07:04:54.240078   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1280 07:04:54.246803   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1281 07:04:54.253733   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1282 07:04:54.263391   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1283 07:04:54.269830   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1284 07:04:54.276396   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1285 07:04:54.279874   DOMAIN: 0000: Resource ranges:

 1286 07:04:54.286539   * Base: 7fc00000, Size: 40400000, Tag: 200

 1287 07:04:54.290125   * Base: d0000000, Size: 28000000, Tag: 200

 1288 07:04:54.292961   * Base: fa000000, Size: 1000000, Tag: 200

 1289 07:04:54.296204   * Base: fb001000, Size: 2fff000, Tag: 200

 1290 07:04:54.303452   * Base: fe010000, Size: 2e000, Tag: 200

 1291 07:04:54.306466   * Base: fe03f000, Size: d41000, Tag: 200

 1292 07:04:54.310109   * Base: fed88000, Size: 8000, Tag: 200

 1293 07:04:54.313070   * Base: fed93000, Size: d000, Tag: 200

 1294 07:04:54.319770   * Base: feda2000, Size: 1e000, Tag: 200

 1295 07:04:54.323246   * Base: fede0000, Size: 1220000, Tag: 200

 1296 07:04:54.326391   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1297 07:04:54.333230    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1298 07:04:54.339893    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1299 07:04:54.346404    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1300 07:04:54.352721    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1301 07:04:54.359522    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1302 07:04:54.366372    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1303 07:04:54.372888    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1304 07:04:54.379661    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1305 07:04:54.386559    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1306 07:04:54.392844    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1307 07:04:54.399917    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1308 07:04:54.405891    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1309 07:04:54.412779    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1310 07:04:54.419414    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1311 07:04:54.426013    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1312 07:04:54.432498    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1313 07:04:54.438970    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1314 07:04:54.446067    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1315 07:04:54.452476    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1316 07:04:54.459104    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1317 07:04:54.465934    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1318 07:04:54.472237    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1319 07:04:54.482673  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1320 07:04:54.489024  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1321 07:04:54.491899   PCI: 00:1d.0: Resource ranges:

 1322 07:04:54.495493   * Base: 7fc00000, Size: 100000, Tag: 200

 1323 07:04:54.502161    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1324 07:04:54.508532    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1325 07:04:54.515457    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1326 07:04:54.525310  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1327 07:04:54.532077  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1328 07:04:54.535293  Root Device assign_resources, bus 0 link: 0

 1329 07:04:54.541851  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1330 07:04:54.548444  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1331 07:04:54.558533  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1332 07:04:54.565205  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1333 07:04:54.575063  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1334 07:04:54.578450  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1335 07:04:54.581830  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1336 07:04:54.591576  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1337 07:04:54.598387  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1338 07:04:54.608576  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1339 07:04:54.611363  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1340 07:04:54.618424  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1341 07:04:54.624860  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1342 07:04:54.628294  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1343 07:04:54.635306  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1344 07:04:54.641706  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1345 07:04:54.651630  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1346 07:04:54.658125  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1347 07:04:54.664899  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1348 07:04:54.668820  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1349 07:04:54.678583  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1350 07:04:54.681637  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1351 07:04:54.684631  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1352 07:04:54.694857  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1353 07:04:54.698300  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1354 07:04:54.704771  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1355 07:04:54.711553  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1356 07:04:54.721078  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1357 07:04:54.727597  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1358 07:04:54.738076  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1359 07:04:54.740891  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1360 07:04:54.744402  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1361 07:04:54.754039  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1362 07:04:54.764411  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1363 07:04:54.774360  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1364 07:04:54.777759  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1365 07:04:54.784157  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1366 07:04:54.794136  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1367 07:04:54.800578  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1368 07:04:54.807323  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1369 07:04:54.814412  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1370 07:04:54.817143  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1371 07:04:54.823841  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1372 07:04:54.830273  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1373 07:04:54.837251  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1374 07:04:54.840579  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1375 07:04:54.847275  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1376 07:04:54.851000  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1377 07:04:54.854312  LPC: Trying to open IO window from 800 size 1ff

 1378 07:04:54.864266  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1379 07:04:54.871334  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1380 07:04:54.880921  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1381 07:04:54.884050  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1382 07:04:54.890595  Root Device assign_resources, bus 0 link: 0

 1383 07:04:54.891159  Done setting resources.

 1384 07:04:54.897399  Show resources in subtree (Root Device)...After assigning values.

 1385 07:04:54.903852   Root Device child on link 0 DOMAIN: 0000

 1386 07:04:54.907680    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1387 07:04:54.917101    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1388 07:04:54.927090    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1389 07:04:54.927704     PCI: 00:00.0

 1390 07:04:54.936966     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1391 07:04:54.947516     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1392 07:04:54.956904     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1393 07:04:54.966819     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1394 07:04:54.973372     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1395 07:04:54.983594     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1396 07:04:54.994055     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1397 07:04:55.003541     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1398 07:04:55.013383     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1399 07:04:55.023102     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1400 07:04:55.030017     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1401 07:04:55.040039     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1402 07:04:55.049748     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1403 07:04:55.060006     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1404 07:04:55.066620     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1405 07:04:55.076301     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1406 07:04:55.086517     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1407 07:04:55.096428     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1408 07:04:55.106332     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1409 07:04:55.116262     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1410 07:04:55.116752     PCI: 00:02.0

 1411 07:04:55.129390     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1412 07:04:55.139747     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1413 07:04:55.149319     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1414 07:04:55.152878     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1415 07:04:55.162586     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1416 07:04:55.166282      GENERIC: 0.0

 1417 07:04:55.166900     PCI: 00:05.0

 1418 07:04:55.176449     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1419 07:04:55.182859     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1420 07:04:55.183423      GENERIC: 0.0

 1421 07:04:55.185840     PCI: 00:08.0

 1422 07:04:55.196359     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1423 07:04:55.196936     PCI: 00:0a.0

 1424 07:04:55.202642     PCI: 00:0d.0 child on link 0 USB0 port 0

 1425 07:04:55.212934     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1426 07:04:55.216344      USB0 port 0 child on link 0 USB3 port 0

 1427 07:04:55.219522       USB3 port 0

 1428 07:04:55.220136       USB3 port 1

 1429 07:04:55.222871       USB3 port 2

 1430 07:04:55.223465       USB3 port 3

 1431 07:04:55.229360     PCI: 00:14.0 child on link 0 USB0 port 0

 1432 07:04:55.239372     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1433 07:04:55.242346      USB0 port 0 child on link 0 USB2 port 0

 1434 07:04:55.245813       USB2 port 0

 1435 07:04:55.246471       USB2 port 1

 1436 07:04:55.249258       USB2 port 2

 1437 07:04:55.249853       USB2 port 3

 1438 07:04:55.252816       USB2 port 4

 1439 07:04:55.253408       USB2 port 5

 1440 07:04:55.255943       USB2 port 6

 1441 07:04:55.256476       USB2 port 7

 1442 07:04:55.259157       USB2 port 8

 1443 07:04:55.259657       USB2 port 9

 1444 07:04:55.262136       USB3 port 0

 1445 07:04:55.262669       USB3 port 1

 1446 07:04:55.265997       USB3 port 2

 1447 07:04:55.266501       USB3 port 3

 1448 07:04:55.268950     PCI: 00:14.2

 1449 07:04:55.279610     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1450 07:04:55.289424     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1451 07:04:55.295772     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1452 07:04:55.305979     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1453 07:04:55.306594      GENERIC: 0.0

 1454 07:04:55.308813     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1455 07:04:55.322727     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1456 07:04:55.323394      I2C: 00:1a

 1457 07:04:55.325222      I2C: 00:31

 1458 07:04:55.325757      I2C: 00:32

 1459 07:04:55.329150     PCI: 00:15.1 child on link 0 I2C: 00:10

 1460 07:04:55.338721     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1461 07:04:55.342208      I2C: 00:10

 1462 07:04:55.342712     PCI: 00:15.2

 1463 07:04:55.355349     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1464 07:04:55.355953     PCI: 00:15.3

 1465 07:04:55.365490     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1466 07:04:55.369026     PCI: 00:16.0

 1467 07:04:55.378491     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1468 07:04:55.379000     PCI: 00:19.0

 1469 07:04:55.385481     PCI: 00:19.1 child on link 0 I2C: 00:15

 1470 07:04:55.395336     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1471 07:04:55.395905      I2C: 00:15

 1472 07:04:55.398671     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1473 07:04:55.408863     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1474 07:04:55.421758     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1475 07:04:55.431473     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1476 07:04:55.432040      GENERIC: 0.0

 1477 07:04:55.435185      PCI: 01:00.0

 1478 07:04:55.445184      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1479 07:04:55.455128      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1480 07:04:55.464992      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1481 07:04:55.468505     PCI: 00:1e.0

 1482 07:04:55.477890     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1483 07:04:55.481612     PCI: 00:1e.2 child on link 0 SPI: 00

 1484 07:04:55.494756     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1485 07:04:55.495344      SPI: 00

 1486 07:04:55.498593     PCI: 00:1e.3 child on link 0 SPI: 00

 1487 07:04:55.508339     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1488 07:04:55.511392      SPI: 00

 1489 07:04:55.515375     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1490 07:04:55.524941     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1491 07:04:55.525537      PNP: 0c09.0

 1492 07:04:55.535002      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1493 07:04:55.538258     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1494 07:04:55.548299     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1495 07:04:55.558114     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1496 07:04:55.560924      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1497 07:04:55.564544       GENERIC: 0.0

 1498 07:04:55.565042       GENERIC: 1.0

 1499 07:04:55.568063     PCI: 00:1f.3

 1500 07:04:55.578018     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1501 07:04:55.587858     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1502 07:04:55.591142     PCI: 00:1f.5

 1503 07:04:55.601429     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1504 07:04:55.604355    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1505 07:04:55.604861     APIC: 00

 1506 07:04:55.607487     APIC: 01

 1507 07:04:55.607986     APIC: 03

 1508 07:04:55.608417     APIC: 06

 1509 07:04:55.610788     APIC: 05

 1510 07:04:55.611326     APIC: 04

 1511 07:04:55.614362     APIC: 02

 1512 07:04:55.614955     APIC: 07

 1513 07:04:55.617980  Done allocating resources.

 1514 07:04:55.624486  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1515 07:04:55.628422  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1516 07:04:55.633854  Configure GPIOs for I2S audio on UP4.

 1517 07:04:55.640949  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1518 07:04:55.644356  Enabling resources...

 1519 07:04:55.647459  PCI: 00:00.0 subsystem <- 8086/9a12

 1520 07:04:55.648061  PCI: 00:00.0 cmd <- 06

 1521 07:04:55.653891  PCI: 00:02.0 subsystem <- 8086/9a40

 1522 07:04:55.654478  PCI: 00:02.0 cmd <- 03

 1523 07:04:55.657293  PCI: 00:04.0 subsystem <- 8086/9a03

 1524 07:04:55.660832  PCI: 00:04.0 cmd <- 02

 1525 07:04:55.663839  PCI: 00:05.0 subsystem <- 8086/9a19

 1526 07:04:55.667129  PCI: 00:05.0 cmd <- 02

 1527 07:04:55.670513  PCI: 00:08.0 subsystem <- 8086/9a11

 1528 07:04:55.673821  PCI: 00:08.0 cmd <- 06

 1529 07:04:55.677435  PCI: 00:0d.0 subsystem <- 8086/9a13

 1530 07:04:55.680376  PCI: 00:0d.0 cmd <- 02

 1531 07:04:55.684373  PCI: 00:14.0 subsystem <- 8086/a0ed

 1532 07:04:55.687281  PCI: 00:14.0 cmd <- 02

 1533 07:04:55.690726  PCI: 00:14.2 subsystem <- 8086/a0ef

 1534 07:04:55.691319  PCI: 00:14.2 cmd <- 02

 1535 07:04:55.697459  PCI: 00:14.3 subsystem <- 8086/a0f0

 1536 07:04:55.698059  PCI: 00:14.3 cmd <- 02

 1537 07:04:55.701707  PCI: 00:15.0 subsystem <- 8086/a0e8

 1538 07:04:55.703965  PCI: 00:15.0 cmd <- 02

 1539 07:04:55.707269  PCI: 00:15.1 subsystem <- 8086/a0e9

 1540 07:04:55.711044  PCI: 00:15.1 cmd <- 02

 1541 07:04:55.714099  PCI: 00:15.2 subsystem <- 8086/a0ea

 1542 07:04:55.717355  PCI: 00:15.2 cmd <- 02

 1543 07:04:55.720850  PCI: 00:15.3 subsystem <- 8086/a0eb

 1544 07:04:55.724409  PCI: 00:15.3 cmd <- 02

 1545 07:04:55.727259  PCI: 00:16.0 subsystem <- 8086/a0e0

 1546 07:04:55.730875  PCI: 00:16.0 cmd <- 02

 1547 07:04:55.734061  PCI: 00:19.1 subsystem <- 8086/a0c6

 1548 07:04:55.737101  PCI: 00:19.1 cmd <- 02

 1549 07:04:55.740445  PCI: 00:1d.0 bridge ctrl <- 0013

 1550 07:04:55.743575  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1551 07:04:55.744182  PCI: 00:1d.0 cmd <- 06

 1552 07:04:55.750441  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1553 07:04:55.751036  PCI: 00:1e.0 cmd <- 06

 1554 07:04:55.754260  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1555 07:04:55.756963  PCI: 00:1e.2 cmd <- 06

 1556 07:04:55.760420  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1557 07:04:55.763511  PCI: 00:1e.3 cmd <- 02

 1558 07:04:55.766841  PCI: 00:1f.0 subsystem <- 8086/a087

 1559 07:04:55.770478  PCI: 00:1f.0 cmd <- 407

 1560 07:04:55.773668  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1561 07:04:55.776762  PCI: 00:1f.3 cmd <- 02

 1562 07:04:55.780544  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1563 07:04:55.783623  PCI: 00:1f.5 cmd <- 406

 1564 07:04:55.786860  PCI: 01:00.0 cmd <- 02

 1565 07:04:55.791791  done.

 1566 07:04:55.794529  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1567 07:04:55.798070  Initializing devices...

 1568 07:04:55.801562  Root Device init

 1569 07:04:55.804573  Chrome EC: Set SMI mask to 0x0000000000000000

 1570 07:04:55.811264  Chrome EC: clear events_b mask to 0x0000000000000000

 1571 07:04:55.818216  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1572 07:04:55.821316  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1573 07:04:55.828042  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1574 07:04:55.834867  Chrome EC: Set WAKE mask to 0x0000000000000000

 1575 07:04:55.837908  fw_config match found: DB_USB=USB3_ACTIVE

 1576 07:04:55.844915  Configure Right Type-C port orientation for retimer

 1577 07:04:55.848082  Root Device init finished in 42 msecs

 1578 07:04:55.851343  PCI: 00:00.0 init

 1579 07:04:55.851947  CPU TDP = 9 Watts

 1580 07:04:55.854258  CPU PL1 = 9 Watts

 1581 07:04:55.858042  CPU PL2 = 40 Watts

 1582 07:04:55.858546  CPU PL4 = 83 Watts

 1583 07:04:55.861163  PCI: 00:00.0 init finished in 8 msecs

 1584 07:04:55.864516  PCI: 00:02.0 init

 1585 07:04:55.867762  GMA: Found VBT in CBFS

 1586 07:04:55.870982  GMA: Found valid VBT in CBFS

 1587 07:04:55.874680  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1588 07:04:55.884681                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1589 07:04:55.887595  PCI: 00:02.0 init finished in 18 msecs

 1590 07:04:55.888097  PCI: 00:05.0 init

 1591 07:04:55.894568  PCI: 00:05.0 init finished in 0 msecs

 1592 07:04:55.895176  PCI: 00:08.0 init

 1593 07:04:55.900770  PCI: 00:08.0 init finished in 0 msecs

 1594 07:04:55.901360  PCI: 00:14.0 init

 1595 07:04:55.907847  PCI: 00:14.0 init finished in 0 msecs

 1596 07:04:55.908490  PCI: 00:14.2 init

 1597 07:04:55.911353  PCI: 00:14.2 init finished in 0 msecs

 1598 07:04:55.914744  PCI: 00:15.0 init

 1599 07:04:55.917904  I2C bus 0 version 0x3230302a

 1600 07:04:55.921064  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1601 07:04:55.924667  PCI: 00:15.0 init finished in 6 msecs

 1602 07:04:55.927637  PCI: 00:15.1 init

 1603 07:04:55.931549  I2C bus 1 version 0x3230302a

 1604 07:04:55.934490  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1605 07:04:55.938072  PCI: 00:15.1 init finished in 6 msecs

 1606 07:04:55.941120  PCI: 00:15.2 init

 1607 07:04:55.944424  I2C bus 2 version 0x3230302a

 1608 07:04:55.948196  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1609 07:04:55.951034  PCI: 00:15.2 init finished in 6 msecs

 1610 07:04:55.951638  PCI: 00:15.3 init

 1611 07:04:55.954215  I2C bus 3 version 0x3230302a

 1612 07:04:55.957705  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1613 07:04:55.964079  PCI: 00:15.3 init finished in 6 msecs

 1614 07:04:55.964692  PCI: 00:16.0 init

 1615 07:04:55.967627  PCI: 00:16.0 init finished in 0 msecs

 1616 07:04:55.971350  PCI: 00:19.1 init

 1617 07:04:55.974398  I2C bus 5 version 0x3230302a

 1618 07:04:55.978085  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1619 07:04:55.980881  PCI: 00:19.1 init finished in 6 msecs

 1620 07:04:55.984440  PCI: 00:1d.0 init

 1621 07:04:55.988152  Initializing PCH PCIe bridge.

 1622 07:04:55.991064  PCI: 00:1d.0 init finished in 3 msecs

 1623 07:04:55.994463  PCI: 00:1f.0 init

 1624 07:04:55.998145  IOAPIC: Initializing IOAPIC at 0xfec00000

 1625 07:04:56.001110  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1626 07:04:56.004698  IOAPIC: ID = 0x02

 1627 07:04:56.008261  IOAPIC: Dumping registers

 1628 07:04:56.010830    reg 0x0000: 0x02000000

 1629 07:04:56.011337    reg 0x0001: 0x00770020

 1630 07:04:56.014749    reg 0x0002: 0x00000000

 1631 07:04:56.018311  PCI: 00:1f.0 init finished in 21 msecs

 1632 07:04:56.020773  PCI: 00:1f.2 init

 1633 07:04:56.024585  Disabling ACPI via APMC.

 1634 07:04:56.028047  APMC done.

 1635 07:04:56.031443  PCI: 00:1f.2 init finished in 5 msecs

 1636 07:04:56.042333  PCI: 01:00.0 init

 1637 07:04:56.045457  PCI: 01:00.0 init finished in 0 msecs

 1638 07:04:56.049140  PNP: 0c09.0 init

 1639 07:04:56.052153  Google Chrome EC uptime: 8.343 seconds

 1640 07:04:56.058933  Google Chrome AP resets since EC boot: 1

 1641 07:04:56.062060  Google Chrome most recent AP reset causes:

 1642 07:04:56.065507  	0.346: 32775 shutdown: entering G3

 1643 07:04:56.071850  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1644 07:04:56.075158  PNP: 0c09.0 init finished in 22 msecs

 1645 07:04:56.080925  Devices initialized

 1646 07:04:56.085004  Show all devs... After init.

 1647 07:04:56.087829  Root Device: enabled 1

 1648 07:04:56.088454  DOMAIN: 0000: enabled 1

 1649 07:04:56.091189  CPU_CLUSTER: 0: enabled 1

 1650 07:04:56.094159  PCI: 00:00.0: enabled 1

 1651 07:04:56.097578  PCI: 00:02.0: enabled 1

 1652 07:04:56.098089  PCI: 00:04.0: enabled 1

 1653 07:04:56.100854  PCI: 00:05.0: enabled 1

 1654 07:04:56.104198  PCI: 00:06.0: enabled 0

 1655 07:04:56.107855  PCI: 00:07.0: enabled 0

 1656 07:04:56.108489  PCI: 00:07.1: enabled 0

 1657 07:04:56.111286  PCI: 00:07.2: enabled 0

 1658 07:04:56.114578  PCI: 00:07.3: enabled 0

 1659 07:04:56.117651  PCI: 00:08.0: enabled 1

 1660 07:04:56.118251  PCI: 00:09.0: enabled 0

 1661 07:04:56.121219  PCI: 00:0a.0: enabled 0

 1662 07:04:56.124653  PCI: 00:0d.0: enabled 1

 1663 07:04:56.125245  PCI: 00:0d.1: enabled 0

 1664 07:04:56.128092  PCI: 00:0d.2: enabled 0

 1665 07:04:56.131224  PCI: 00:0d.3: enabled 0

 1666 07:04:56.134421  PCI: 00:0e.0: enabled 0

 1667 07:04:56.135018  PCI: 00:10.2: enabled 1

 1668 07:04:56.137526  PCI: 00:10.6: enabled 0

 1669 07:04:56.141286  PCI: 00:10.7: enabled 0

 1670 07:04:56.144201  PCI: 00:12.0: enabled 0

 1671 07:04:56.144738  PCI: 00:12.6: enabled 0

 1672 07:04:56.147381  PCI: 00:13.0: enabled 0

 1673 07:04:56.151118  PCI: 00:14.0: enabled 1

 1674 07:04:56.153946  PCI: 00:14.1: enabled 0

 1675 07:04:56.154444  PCI: 00:14.2: enabled 1

 1676 07:04:56.157938  PCI: 00:14.3: enabled 1

 1677 07:04:56.160609  PCI: 00:15.0: enabled 1

 1678 07:04:56.164012  PCI: 00:15.1: enabled 1

 1679 07:04:56.164543  PCI: 00:15.2: enabled 1

 1680 07:04:56.167492  PCI: 00:15.3: enabled 1

 1681 07:04:56.170626  PCI: 00:16.0: enabled 1

 1682 07:04:56.171121  PCI: 00:16.1: enabled 0

 1683 07:04:56.174046  PCI: 00:16.2: enabled 0

 1684 07:04:56.177516  PCI: 00:16.3: enabled 0

 1685 07:04:56.180942  PCI: 00:16.4: enabled 0

 1686 07:04:56.181602  PCI: 00:16.5: enabled 0

 1687 07:04:56.184341  PCI: 00:17.0: enabled 0

 1688 07:04:56.187397  PCI: 00:19.0: enabled 0

 1689 07:04:56.191021  PCI: 00:19.1: enabled 1

 1690 07:04:56.191624  PCI: 00:19.2: enabled 0

 1691 07:04:56.193965  PCI: 00:1c.0: enabled 1

 1692 07:04:56.197253  PCI: 00:1c.1: enabled 0

 1693 07:04:56.200685  PCI: 00:1c.2: enabled 0

 1694 07:04:56.201187  PCI: 00:1c.3: enabled 0

 1695 07:04:56.204306  PCI: 00:1c.4: enabled 0

 1696 07:04:56.207395  PCI: 00:1c.5: enabled 0

 1697 07:04:56.207899  PCI: 00:1c.6: enabled 1

 1698 07:04:56.210972  PCI: 00:1c.7: enabled 0

 1699 07:04:56.214214  PCI: 00:1d.0: enabled 1

 1700 07:04:56.217005  PCI: 00:1d.1: enabled 0

 1701 07:04:56.217507  PCI: 00:1d.2: enabled 1

 1702 07:04:56.220690  PCI: 00:1d.3: enabled 0

 1703 07:04:56.224204  PCI: 00:1e.0: enabled 1

 1704 07:04:56.227906  PCI: 00:1e.1: enabled 0

 1705 07:04:56.228570  PCI: 00:1e.2: enabled 1

 1706 07:04:56.230602  PCI: 00:1e.3: enabled 1

 1707 07:04:56.233974  PCI: 00:1f.0: enabled 1

 1708 07:04:56.237545  PCI: 00:1f.1: enabled 0

 1709 07:04:56.238151  PCI: 00:1f.2: enabled 1

 1710 07:04:56.240834  PCI: 00:1f.3: enabled 1

 1711 07:04:56.244077  PCI: 00:1f.4: enabled 0

 1712 07:04:56.244715  PCI: 00:1f.5: enabled 1

 1713 07:04:56.247385  PCI: 00:1f.6: enabled 0

 1714 07:04:56.250684  PCI: 00:1f.7: enabled 0

 1715 07:04:56.253648  APIC: 00: enabled 1

 1716 07:04:56.254205  GENERIC: 0.0: enabled 1

 1717 07:04:56.257188  GENERIC: 0.0: enabled 1

 1718 07:04:56.260676  GENERIC: 1.0: enabled 1

 1719 07:04:56.263877  GENERIC: 0.0: enabled 1

 1720 07:04:56.264435  GENERIC: 1.0: enabled 1

 1721 07:04:56.267357  USB0 port 0: enabled 1

 1722 07:04:56.270344  GENERIC: 0.0: enabled 1

 1723 07:04:56.270849  USB0 port 0: enabled 1

 1724 07:04:56.273701  GENERIC: 0.0: enabled 1

 1725 07:04:56.277309  I2C: 00:1a: enabled 1

 1726 07:04:56.277948  I2C: 00:31: enabled 1

 1727 07:04:56.280136  I2C: 00:32: enabled 1

 1728 07:04:56.283764  I2C: 00:10: enabled 1

 1729 07:04:56.284264  I2C: 00:15: enabled 1

 1730 07:04:56.287413  GENERIC: 0.0: enabled 0

 1731 07:04:56.290638  GENERIC: 1.0: enabled 0

 1732 07:04:56.293887  GENERIC: 0.0: enabled 1

 1733 07:04:56.294492  SPI: 00: enabled 1

 1734 07:04:56.296970  SPI: 00: enabled 1

 1735 07:04:56.300877  PNP: 0c09.0: enabled 1

 1736 07:04:56.301482  GENERIC: 0.0: enabled 1

 1737 07:04:56.303670  USB3 port 0: enabled 1

 1738 07:04:56.306816  USB3 port 1: enabled 1

 1739 07:04:56.307338  USB3 port 2: enabled 0

 1740 07:04:56.310410  USB3 port 3: enabled 0

 1741 07:04:56.313639  USB2 port 0: enabled 0

 1742 07:04:56.317274  USB2 port 1: enabled 1

 1743 07:04:56.317882  USB2 port 2: enabled 1

 1744 07:04:56.320428  USB2 port 3: enabled 0

 1745 07:04:56.323797  USB2 port 4: enabled 1

 1746 07:04:56.324443  USB2 port 5: enabled 0

 1747 07:04:56.327530  USB2 port 6: enabled 0

 1748 07:04:56.330501  USB2 port 7: enabled 0

 1749 07:04:56.331001  USB2 port 8: enabled 0

 1750 07:04:56.334046  USB2 port 9: enabled 0

 1751 07:04:56.336834  USB3 port 0: enabled 0

 1752 07:04:56.340439  USB3 port 1: enabled 1

 1753 07:04:56.341042  USB3 port 2: enabled 0

 1754 07:04:56.344117  USB3 port 3: enabled 0

 1755 07:04:56.347235  GENERIC: 0.0: enabled 1

 1756 07:04:56.347840  GENERIC: 1.0: enabled 1

 1757 07:04:56.350546  APIC: 01: enabled 1

 1758 07:04:56.354337  APIC: 03: enabled 1

 1759 07:04:56.354945  APIC: 06: enabled 1

 1760 07:04:56.357423  APIC: 05: enabled 1

 1761 07:04:56.360995  APIC: 04: enabled 1

 1762 07:04:56.361601  APIC: 02: enabled 1

 1763 07:04:56.364098  APIC: 07: enabled 1

 1764 07:04:56.364752  PCI: 01:00.0: enabled 1

 1765 07:04:56.370465  BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms

 1766 07:04:56.376825  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1767 07:04:56.380536  ELOG: NV offset 0xf30000 size 0x1000

 1768 07:04:56.386847  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1769 07:04:56.393558  ELOG: Event(17) added with size 13 at 2023-02-07 07:04:54 UTC

 1770 07:04:56.400001  ELOG: Event(92) added with size 9 at 2023-02-07 07:04:54 UTC

 1771 07:04:56.407107  ELOG: Event(93) added with size 9 at 2023-02-07 07:04:54 UTC

 1772 07:04:56.413585  ELOG: Event(9E) added with size 10 at 2023-02-07 07:04:54 UTC

 1773 07:04:56.420446  ELOG: Event(9F) added with size 14 at 2023-02-07 07:04:54 UTC

 1774 07:04:56.423170  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1775 07:04:56.430558  ELOG: Event(A1) added with size 10 at 2023-02-07 07:04:54 UTC

 1776 07:04:56.440495  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1777 07:04:56.443839  ELOG: Event(A0) added with size 9 at 2023-02-07 07:04:54 UTC

 1778 07:04:56.450373  elog_add_boot_reason: Logged dev mode boot

 1779 07:04:56.453714  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1780 07:04:56.456869  Finalize devices...

 1781 07:04:56.460301  Devices finalized

 1782 07:04:56.463310  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1783 07:04:56.470410  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1784 07:04:56.476613  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1785 07:04:56.480479  ME: HFSTS1                      : 0x80030055

 1786 07:04:56.483135  ME: HFSTS2                      : 0x30280116

 1787 07:04:56.490312  ME: HFSTS3                      : 0x00000050

 1788 07:04:56.493476  ME: HFSTS4                      : 0x00004000

 1789 07:04:56.496989  ME: HFSTS5                      : 0x00000000

 1790 07:04:56.503558  ME: HFSTS6                      : 0x00400006

 1791 07:04:56.506391  ME: Manufacturing Mode          : YES

 1792 07:04:56.509708  ME: SPI Protection Mode Enabled : NO

 1793 07:04:56.513658  ME: FW Partition Table          : OK

 1794 07:04:56.516982  ME: Bringup Loader Failure      : NO

 1795 07:04:56.520221  ME: Firmware Init Complete      : NO

 1796 07:04:56.523242  ME: Boot Options Present        : NO

 1797 07:04:56.529842  ME: Update In Progress          : NO

 1798 07:04:56.533261  ME: D0i3 Support                : YES

 1799 07:04:56.536581  ME: Low Power State Enabled     : NO

 1800 07:04:56.539710  ME: CPU Replaced                : YES

 1801 07:04:56.543040  ME: CPU Replacement Valid       : YES

 1802 07:04:56.546793  ME: Current Working State       : 5

 1803 07:04:56.549713  ME: Current Operation State     : 1

 1804 07:04:56.553270  ME: Current Operation Mode      : 3

 1805 07:04:56.559732  ME: Error Code                  : 0

 1806 07:04:56.562958  ME: Enhanced Debug Mode         : NO

 1807 07:04:56.566162  ME: CPU Debug Disabled          : YES

 1808 07:04:56.569771  ME: TXT Support                 : NO

 1809 07:04:56.576299  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1810 07:04:56.582944  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1811 07:04:56.586341  CBFS: 'fallback/slic' not found.

 1812 07:04:56.589273  ACPI: Writing ACPI tables at 76b01000.

 1813 07:04:56.593225  ACPI:    * FACS

 1814 07:04:56.593834  ACPI:    * DSDT

 1815 07:04:56.596608  Ramoops buffer: 0x100000@0x76a00000.

 1816 07:04:56.603085  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1817 07:04:56.605959  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1818 07:04:56.609901  Google Chrome EC: version:

 1819 07:04:56.613288  	ro: voema_v2.0.7540-147f8d37d1

 1820 07:04:56.616480  	rw: voema_v2.0.7540-147f8d37d1

 1821 07:04:56.619917    running image: 2

 1822 07:04:56.626432  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1823 07:04:56.629678  ACPI:    * FADT

 1824 07:04:56.630305  SCI is IRQ9

 1825 07:04:56.633071  ACPI: added table 1/32, length now 40

 1826 07:04:56.636533  ACPI:     * SSDT

 1827 07:04:56.640023  Found 1 CPU(s) with 8 core(s) each.

 1828 07:04:56.642839  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1829 07:04:56.649858  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1830 07:04:56.652704  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1831 07:04:56.656670  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1832 07:04:56.662745  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1833 07:04:56.669465  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1834 07:04:56.672872  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1835 07:04:56.679135  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1836 07:04:56.686523  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1837 07:04:56.689124  \_SB.PCI0.RP09: Added StorageD3Enable property

 1838 07:04:56.692620  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1839 07:04:56.699097  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1840 07:04:56.705768  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1841 07:04:56.709443  PS2K: Passing 80 keymaps to kernel

 1842 07:04:56.716158  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1843 07:04:56.723028  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1844 07:04:56.729530  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1845 07:04:56.735824  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1846 07:04:56.742804  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1847 07:04:56.749238  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1848 07:04:56.756192  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1849 07:04:56.762861  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1850 07:04:56.765711  ACPI: added table 2/32, length now 44

 1851 07:04:56.766308  ACPI:    * MCFG

 1852 07:04:56.772635  ACPI: added table 3/32, length now 48

 1853 07:04:56.773171  ACPI:    * TPM2

 1854 07:04:56.776046  TPM2 log created at 0x769f0000

 1855 07:04:56.779109  ACPI: added table 4/32, length now 52

 1856 07:04:56.782471  ACPI:    * MADT

 1857 07:04:56.783106  SCI is IRQ9

 1858 07:04:56.785409  ACPI: added table 5/32, length now 56

 1859 07:04:56.789880  current = 76b09850

 1860 07:04:56.790501  ACPI:    * DMAR

 1861 07:04:56.792397  ACPI: added table 6/32, length now 60

 1862 07:04:56.798845  ACPI: added table 7/32, length now 64

 1863 07:04:56.799351  ACPI:    * HPET

 1864 07:04:56.802631  ACPI: added table 8/32, length now 68

 1865 07:04:56.806093  ACPI: done.

 1866 07:04:56.806596  ACPI tables: 35216 bytes.

 1867 07:04:56.808987  smbios_write_tables: 769ef000

 1868 07:04:56.812123  EC returned error result code 3

 1869 07:04:56.815853  Couldn't obtain OEM name from CBI

 1870 07:04:56.819517  Create SMBIOS type 16

 1871 07:04:56.822616  Create SMBIOS type 17

 1872 07:04:56.826263  GENERIC: 0.0 (WIFI Device)

 1873 07:04:56.826866  SMBIOS tables: 1750 bytes.

 1874 07:04:56.832265  Writing table forward entry at 0x00000500

 1875 07:04:56.839018  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1876 07:04:56.842407  Writing coreboot table at 0x76b25000

 1877 07:04:56.848851   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1878 07:04:56.852259   1. 0000000000001000-000000000009ffff: RAM

 1879 07:04:56.855366   2. 00000000000a0000-00000000000fffff: RESERVED

 1880 07:04:56.862061   3. 0000000000100000-00000000769eefff: RAM

 1881 07:04:56.865235   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1882 07:04:56.871761   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1883 07:04:56.878897   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1884 07:04:56.882007   7. 0000000077000000-000000007fbfffff: RESERVED

 1885 07:04:56.888748   8. 00000000c0000000-00000000cfffffff: RESERVED

 1886 07:04:56.892124   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1887 07:04:56.895011  10. 00000000fb000000-00000000fb000fff: RESERVED

 1888 07:04:56.901914  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1889 07:04:56.905326  12. 00000000fed80000-00000000fed87fff: RESERVED

 1890 07:04:56.911920  13. 00000000fed90000-00000000fed92fff: RESERVED

 1891 07:04:56.915121  14. 00000000feda0000-00000000feda1fff: RESERVED

 1892 07:04:56.922229  15. 00000000fedc0000-00000000feddffff: RESERVED

 1893 07:04:56.925008  16. 0000000100000000-00000002803fffff: RAM

 1894 07:04:56.928399  Passing 4 GPIOs to payload:

 1895 07:04:56.931937              NAME |       PORT | POLARITY |     VALUE

 1896 07:04:56.938485               lid |  undefined |     high |      high

 1897 07:04:56.945241             power |  undefined |     high |       low

 1898 07:04:56.948373             oprom |  undefined |     high |       low

 1899 07:04:56.955327          EC in RW | 0x000000e5 |     high |      high

 1900 07:04:56.961738  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cbf1

 1901 07:04:56.962332  coreboot table: 1576 bytes.

 1902 07:04:56.968670  IMD ROOT    0. 0x76fff000 0x00001000

 1903 07:04:56.971535  IMD SMALL   1. 0x76ffe000 0x00001000

 1904 07:04:56.975161  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1905 07:04:56.978486  VPD         3. 0x76c4d000 0x00000367

 1906 07:04:56.981775  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1907 07:04:56.984947  CONSOLE     5. 0x76c2c000 0x00020000

 1908 07:04:56.988487  FMAP        6. 0x76c2b000 0x00000578

 1909 07:04:56.991310  TIME STAMP  7. 0x76c2a000 0x00000910

 1910 07:04:56.998357  VBOOT WORK  8. 0x76c16000 0x00014000

 1911 07:04:57.001382  ROMSTG STCK 9. 0x76c15000 0x00001000

 1912 07:04:57.005074  AFTER CAR  10. 0x76c0a000 0x0000b000

 1913 07:04:57.008822  RAMSTAGE   11. 0x76b97000 0x00073000

 1914 07:04:57.012359  REFCODE    12. 0x76b42000 0x00055000

 1915 07:04:57.015443  SMM BACKUP 13. 0x76b32000 0x00010000

 1916 07:04:57.018252  4f444749   14. 0x76b30000 0x00002000

 1917 07:04:57.021595  EXT VBT15. 0x76b2d000 0x0000219f

 1918 07:04:57.024987  COREBOOT   16. 0x76b25000 0x00008000

 1919 07:04:57.028578  ACPI       17. 0x76b01000 0x00024000

 1920 07:04:57.035189  ACPI GNVS  18. 0x76b00000 0x00001000

 1921 07:04:57.038647  RAMOOPS    19. 0x76a00000 0x00100000

 1922 07:04:57.041751  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1923 07:04:57.045027  SMBIOS     21. 0x769ef000 0x00000800

 1924 07:04:57.048816  IMD small region:

 1925 07:04:57.051932    IMD ROOT    0. 0x76ffec00 0x00000400

 1926 07:04:57.054979    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1927 07:04:57.058406    POWER STATE 2. 0x76ffeb80 0x00000044

 1928 07:04:57.061462    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1929 07:04:57.065222    MEM INFO    4. 0x76ffe980 0x000001e0

 1930 07:04:57.071231  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1931 07:04:57.074818  MTRR: Physical address space:

 1932 07:04:57.081382  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1933 07:04:57.088109  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1934 07:04:57.094634  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1935 07:04:57.101442  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1936 07:04:57.107851  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1937 07:04:57.111597  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1938 07:04:57.118081  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1939 07:04:57.124790  MTRR: Fixed MSR 0x250 0x0606060606060606

 1940 07:04:57.127911  MTRR: Fixed MSR 0x258 0x0606060606060606

 1941 07:04:57.131270  MTRR: Fixed MSR 0x259 0x0000000000000000

 1942 07:04:57.134593  MTRR: Fixed MSR 0x268 0x0606060606060606

 1943 07:04:57.141583  MTRR: Fixed MSR 0x269 0x0606060606060606

 1944 07:04:57.144834  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1945 07:04:57.147770  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1946 07:04:57.151297  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1947 07:04:57.154653  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1948 07:04:57.161229  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1949 07:04:57.164207  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1950 07:04:57.167746  call enable_fixed_mtrr()

 1951 07:04:57.171206  CPU physical address size: 39 bits

 1952 07:04:57.174196  MTRR: default type WB/UC MTRR counts: 6/6.

 1953 07:04:57.180492  MTRR: UC selected as default type.

 1954 07:04:57.184227  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1955 07:04:57.190650  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1956 07:04:57.197464  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1957 07:04:57.204001  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1958 07:04:57.210570  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1959 07:04:57.217213  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1960 07:04:57.217796  

 1961 07:04:57.220714  MTRR check

 1962 07:04:57.221243  Fixed MTRRs   : Enabled

 1963 07:04:57.224230  Variable MTRRs: Enabled

 1964 07:04:57.224785  

 1965 07:04:57.227557  MTRR: Fixed MSR 0x250 0x0606060606060606

 1966 07:04:57.233733  MTRR: Fixed MSR 0x258 0x0606060606060606

 1967 07:04:57.236953  MTRR: Fixed MSR 0x259 0x0000000000000000

 1968 07:04:57.240806  MTRR: Fixed MSR 0x268 0x0606060606060606

 1969 07:04:57.243779  MTRR: Fixed MSR 0x269 0x0606060606060606

 1970 07:04:57.250352  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1971 07:04:57.253780  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1972 07:04:57.257187  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1973 07:04:57.260833  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1974 07:04:57.263582  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1975 07:04:57.270297  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1976 07:04:57.276777  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1977 07:04:57.280418  call enable_fixed_mtrr()

 1978 07:04:57.284306  Checking cr50 for pending updates

 1979 07:04:57.284838  CPU physical address size: 39 bits

 1980 07:04:57.291134  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 07:04:57.294102  MTRR: Fixed MSR 0x250 0x0606060606060606

 1982 07:04:57.297501  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 07:04:57.300926  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 07:04:57.307510  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 07:04:57.310738  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 07:04:57.314232  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 07:04:57.317487  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 07:04:57.324346  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 07:04:57.327453  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 07:04:57.330813  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 07:04:57.334203  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 07:04:57.341430  MTRR: Fixed MSR 0x258 0x0606060606060606

 1993 07:04:57.341887  call enable_fixed_mtrr()

 1994 07:04:57.347924  MTRR: Fixed MSR 0x259 0x0000000000000000

 1995 07:04:57.351462  MTRR: Fixed MSR 0x268 0x0606060606060606

 1996 07:04:57.354783  MTRR: Fixed MSR 0x269 0x0606060606060606

 1997 07:04:57.358343  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1998 07:04:57.364861  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1999 07:04:57.368193  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2000 07:04:57.371362  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2001 07:04:57.374851  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2002 07:04:57.381110  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2003 07:04:57.384874  CPU physical address size: 39 bits

 2004 07:04:57.388028  call enable_fixed_mtrr()

 2005 07:04:57.391497  Reading cr50 TPM mode

 2006 07:04:57.395307  MTRR: Fixed MSR 0x250 0x0606060606060606

 2007 07:04:57.398429  MTRR: Fixed MSR 0x250 0x0606060606060606

 2008 07:04:57.402271  MTRR: Fixed MSR 0x258 0x0606060606060606

 2009 07:04:57.405200  MTRR: Fixed MSR 0x259 0x0000000000000000

 2010 07:04:57.412105  MTRR: Fixed MSR 0x268 0x0606060606060606

 2011 07:04:57.415378  MTRR: Fixed MSR 0x269 0x0606060606060606

 2012 07:04:57.418614  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2013 07:04:57.421854  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2014 07:04:57.428278  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2015 07:04:57.431983  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2016 07:04:57.435260  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2017 07:04:57.438161  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2018 07:04:57.445580  MTRR: Fixed MSR 0x258 0x0606060606060606

 2019 07:04:57.446124  call enable_fixed_mtrr()

 2020 07:04:57.452184  MTRR: Fixed MSR 0x259 0x0000000000000000

 2021 07:04:57.455797  MTRR: Fixed MSR 0x268 0x0606060606060606

 2022 07:04:57.459093  MTRR: Fixed MSR 0x269 0x0606060606060606

 2023 07:04:57.461976  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2024 07:04:57.469180  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2025 07:04:57.472383  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2026 07:04:57.475635  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2027 07:04:57.478711  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2028 07:04:57.485715  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2029 07:04:57.488590  CPU physical address size: 39 bits

 2030 07:04:57.492161  call enable_fixed_mtrr()

 2031 07:04:57.495686  MTRR: Fixed MSR 0x250 0x0606060606060606

 2032 07:04:57.498596  MTRR: Fixed MSR 0x250 0x0606060606060606

 2033 07:04:57.505337  MTRR: Fixed MSR 0x258 0x0606060606060606

 2034 07:04:57.508768  MTRR: Fixed MSR 0x259 0x0000000000000000

 2035 07:04:57.512018  MTRR: Fixed MSR 0x268 0x0606060606060606

 2036 07:04:57.515212  MTRR: Fixed MSR 0x269 0x0606060606060606

 2037 07:04:57.522284  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2038 07:04:57.525705  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2039 07:04:57.528633  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2040 07:04:57.531710  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2041 07:04:57.538700  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2042 07:04:57.542198  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2043 07:04:57.545287  MTRR: Fixed MSR 0x258 0x0606060606060606

 2044 07:04:57.548658  call enable_fixed_mtrr()

 2045 07:04:57.552204  MTRR: Fixed MSR 0x259 0x0000000000000000

 2046 07:04:57.558873  MTRR: Fixed MSR 0x268 0x0606060606060606

 2047 07:04:57.561981  MTRR: Fixed MSR 0x269 0x0606060606060606

 2048 07:04:57.565300  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2049 07:04:57.568865  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2050 07:04:57.572015  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2051 07:04:57.578161  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2052 07:04:57.582017  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2053 07:04:57.585305  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2054 07:04:57.588704  CPU physical address size: 39 bits

 2055 07:04:57.595629  call enable_fixed_mtrr()

 2056 07:04:57.598671  CPU physical address size: 39 bits

 2057 07:04:57.601813  CPU physical address size: 39 bits

 2058 07:04:57.605033  CPU physical address size: 39 bits

 2059 07:04:57.611795  BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms

 2060 07:04:57.618487  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2061 07:04:57.621964  Checking segment from ROM address 0xffc02b38

 2062 07:04:57.628648  Checking segment from ROM address 0xffc02b54

 2063 07:04:57.632012  Loading segment from ROM address 0xffc02b38

 2064 07:04:57.634852    code (compression=0)

 2065 07:04:57.642060    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2066 07:04:57.651908  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2067 07:04:57.652445  it's not compressed!

 2068 07:04:57.792132  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2069 07:04:57.798776  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2070 07:04:57.805504  Loading segment from ROM address 0xffc02b54

 2071 07:04:57.805956    Entry Point 0x30000000

 2072 07:04:57.808611  Loaded segments

 2073 07:04:57.815134  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2074 07:04:57.858116  Finalizing chipset.

 2075 07:04:57.861552  Finalizing SMM.

 2076 07:04:57.862007  APMC done.

 2077 07:04:57.868150  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2078 07:04:57.871955  mp_park_aps done after 0 msecs.

 2079 07:04:57.874659  Jumping to boot code at 0x30000000(0x76b25000)

 2080 07:04:57.884756  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2081 07:04:57.885212  

 2082 07:04:57.885595  

 2083 07:04:57.885927  

 2084 07:04:57.887990  Starting depthcharge on Voema...

 2085 07:04:57.888479  

 2086 07:04:57.889631  end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
 2087 07:04:57.890155  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2088 07:04:57.890579  Setting prompt string to ['volteer:']
 2089 07:04:57.890969  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
 2090 07:04:57.897979  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2091 07:04:57.898474  

 2092 07:04:57.904601  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2093 07:04:57.905085  

 2094 07:04:57.908063  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2095 07:04:57.912246  

 2096 07:04:57.912732  Failed to find eMMC card reader

 2097 07:04:57.913096  

 2098 07:04:57.915500  Wipe memory regions:

 2099 07:04:57.915953  

 2100 07:04:57.918934  	[0x00000000001000, 0x000000000a0000)

 2101 07:04:57.919390  

 2102 07:04:57.922158  	[0x00000000100000, 0x00000030000000)

 2103 07:04:57.949919  

 2104 07:04:57.953271  	[0x00000032662db0, 0x000000769ef000)

 2105 07:04:57.989258  

 2106 07:04:57.992202  	[0x00000100000000, 0x00000280400000)

 2107 07:04:58.193449  

 2108 07:04:58.196754  ec_init: CrosEC protocol v3 supported (256, 256)

 2109 07:04:58.196847  

 2110 07:04:58.203140  update_port_state: port C0 state: usb enable 1 mux conn 0

 2111 07:04:58.203237  

 2112 07:04:58.210397  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2113 07:04:58.214559  

 2114 07:04:58.218005  pmc_check_ipc_sts: STS_BUSY done after 1561 us

 2115 07:04:58.218095  

 2116 07:04:58.221207  send_conn_disc_msg: pmc_send_cmd succeeded

 2117 07:04:58.655818  

 2118 07:04:58.656379  R8152: Initializing

 2119 07:04:58.656751  

 2120 07:04:58.658662  Version 9 (ocp_data = 6010)

 2121 07:04:58.659269  

 2122 07:04:58.661875  R8152: Done initializing

 2123 07:04:58.662326  

 2124 07:04:58.665279  Adding net device

 2125 07:04:58.966700  

 2126 07:04:58.970018  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2127 07:04:58.970515  

 2128 07:04:58.970902  

 2129 07:04:58.971265  

 2130 07:04:58.973857  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2132 07:04:59.075686  volteer: tftpboot 192.168.201.1 9045546/tftp-deploy-zm1eoqnx/kernel/bzImage 9045546/tftp-deploy-zm1eoqnx/kernel/cmdline 9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz

 2133 07:04:59.076424  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2134 07:04:59.076954  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
 2135 07:04:59.081128  tftpboot 192.168.201.1 9045546/tftp-deploy-zm1eoqnx/kernel/bzImoy-zm1eoqnx/kernel/cmdline 9045546/tftp-deploy-zm1eoqnx/ramdisk/ramdisk.cpio.gz

 2136 07:04:59.081634  

 2137 07:04:59.082020  Waiting for link

 2138 07:04:59.285945  

 2139 07:04:59.286450  done.

 2140 07:04:59.286805  

 2141 07:04:59.287141  MAC: 00:e0:4c:71:a6:42

 2142 07:04:59.287499  

 2143 07:04:59.288700  Sending DHCP discover... done.

 2144 07:04:59.289245  

 2145 07:04:59.292085  Waiting for reply... done.

 2146 07:04:59.292563  

 2147 07:04:59.295520  Sending DHCP request... done.

 2148 07:04:59.295968  

 2149 07:04:59.301898  Waiting for reply... done.

 2150 07:04:59.302355  

 2151 07:04:59.302735  My ip is 192.168.201.18

 2152 07:04:59.303074  

 2153 07:04:59.305384  The DHCP server ip is 192.168.201.1

 2154 07:04:59.305832  

 2155 07:04:59.312244  TFTP server IP predefined by user: 192.168.201.1

 2156 07:04:59.312740  

 2157 07:04:59.318328  Bootfile predefined by user: 9045546/tftp-deploy-zm1eoqnx/kernel/bzImage

 2158 07:04:59.318780  

 2159 07:04:59.321803  Sending tftp read request... done.

 2160 07:04:59.322253  

 2161 07:04:59.324796  Waiting for the transfer... 

 2162 07:04:59.325265  

 2163 07:04:59.612678  00000000 ################################################################

 2164 07:04:59.612819  

 2165 07:04:59.960699  00080000 ################################################################

 2166 07:04:59.960870  

 2167 07:05:00.272183  00100000 ################################################################

 2168 07:05:00.272345  

 2169 07:05:00.510380  00180000 ################################################################

 2170 07:05:00.510522  

 2171 07:05:00.783933  00200000 ################################################################

 2172 07:05:00.784088  

 2173 07:05:01.048014  00280000 ################################################################

 2174 07:05:01.048170  

 2175 07:05:01.308141  00300000 ################################################################

 2176 07:05:01.308279  

 2177 07:05:01.552024  00380000 ################################################################

 2178 07:05:01.552167  

 2179 07:05:01.794419  00400000 ################################################################

 2180 07:05:01.794578  

 2181 07:05:02.030895  00480000 ################################################################

 2182 07:05:02.031048  

 2183 07:05:02.268406  00500000 ################################################################

 2184 07:05:02.268552  

 2185 07:05:02.506038  00580000 ################################################################

 2186 07:05:02.506190  

 2187 07:05:02.747299  00600000 ################################################################

 2188 07:05:02.747439  

 2189 07:05:02.984468  00680000 ################################################################

 2190 07:05:02.984622  

 2191 07:05:03.089361  00700000 ############################# done.

 2192 07:05:03.089483  

 2193 07:05:03.092763  The bootfile was 7573392 bytes long.

 2194 07:05:03.092843  

 2195 07:05:03.095506  Sending tftp read request... done.

 2196 07:05:03.095585  

 2197 07:05:03.099103  Waiting for the transfer... 

 2198 07:05:03.099182  

 2199 07:05:03.363717  00000000 ################################################################

 2200 07:05:03.363870  

 2201 07:05:03.624667  00080000 ################################################################

 2202 07:05:03.624823  

 2203 07:05:03.884517  00100000 ################################################################

 2204 07:05:03.884707  

 2205 07:05:04.136246  00180000 ################################################################

 2206 07:05:04.136410  

 2207 07:05:04.381031  00200000 ################################################################

 2208 07:05:04.381174  

 2209 07:05:04.627032  00280000 ################################################################

 2210 07:05:04.627181  

 2211 07:05:04.869586  00300000 ################################################################

 2212 07:05:04.869732  

 2213 07:05:05.112631  00380000 ################################################################

 2214 07:05:05.112785  

 2215 07:05:05.353238  00400000 ################################################################

 2216 07:05:05.353402  

 2217 07:05:05.600623  00480000 ################################################################

 2218 07:05:05.600781  

 2219 07:05:05.863453  00500000 ################################################################

 2220 07:05:05.863608  

 2221 07:05:06.117442  00580000 ################################################################

 2222 07:05:06.117603  

 2223 07:05:06.374229  00600000 ################################################################

 2224 07:05:06.374385  

 2225 07:05:06.651870  00680000 ################################################################

 2226 07:05:06.652028  

 2227 07:05:06.937485  00700000 ################################################################

 2228 07:05:06.937645  

 2229 07:05:07.194277  00780000 ################################################################

 2230 07:05:07.194455  

 2231 07:05:07.274602  00800000 ##################### done.

 2232 07:05:07.274761  

 2233 07:05:07.277957  Sending tftp read request... done.

 2234 07:05:07.278048  

 2235 07:05:07.280791  Waiting for the transfer... 

 2236 07:05:07.280883  

 2237 07:05:07.280951  00000000 # done.

 2238 07:05:07.281019  

 2239 07:05:07.291009  Command line loaded dynamically from TFTP file: 9045546/tftp-deploy-zm1eoqnx/kernel/cmdline

 2240 07:05:07.291146  

 2241 07:05:07.304096  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2242 07:05:07.308413  

 2243 07:05:07.311801  Shutting down all USB controllers.

 2244 07:05:07.311892  

 2245 07:05:07.311968  Removing current net device

 2246 07:05:07.312042  

 2247 07:05:07.314872  Finalizing coreboot

 2248 07:05:07.314954  

 2249 07:05:07.321251  Exiting depthcharge with code 4 at timestamp: 18084063

 2250 07:05:07.321358  

 2251 07:05:07.321430  

 2252 07:05:07.321496  Starting kernel ...

 2253 07:05:07.321560  

 2254 07:05:07.321621  

 2255 07:05:07.322000  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2256 07:05:07.322104  start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
 2257 07:05:07.322181  Setting prompt string to ['Linux version [0-9]']
 2258 07:05:07.322261  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2259 07:05:07.322345  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2261 07:09:40.323087  end: 2.2.5 auto-login-action (duration 00:04:33) [common]
 2263 07:09:40.324557  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
 2265 07:09:40.325684  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2268 07:09:40.327234  end: 2 depthcharge-action (duration 00:05:00) [common]
 2270 07:09:40.328642  Cleaning after the job
 2271 07:09:40.329121  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/ramdisk
 2272 07:09:40.332221  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/kernel
 2273 07:09:40.335010  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045546/tftp-deploy-zm1eoqnx/modules
 2274 07:09:40.336040  start: 5.1 power-off (timeout 00:00:30) [common]
 2275 07:09:40.336914  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
 2276 07:09:42.556473  >> Command sent successfully.

 2277 07:09:42.561497  Returned 0 in 2 seconds
 2278 07:09:42.663053  end: 5.1 power-off (duration 00:00:02) [common]
 2280 07:09:42.664721  start: 5.2 read-feedback (timeout 00:09:58) [common]
 2281 07:09:42.665977  Listened to connection for namespace 'common' for up to 1s
 2282 07:09:43.668761  Finalising connection for namespace 'common'
 2283 07:09:43.669566  Disconnecting from shell: Finalise
 2284 07:09:43.670048  

 2285 07:09:43.771621  end: 5.2 read-feedback (duration 00:00:01) [common]
 2286 07:09:43.772273  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045546
 2287 07:09:43.780727  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045546
 2288 07:09:43.780857  JobError: Your job cannot terminate cleanly.