Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:23.352839 lava-dispatcher, installed at version: 2023.01
2 12:44:23.353042 start: 0 validate
3 12:44:23.353169 Start time: 2023-03-22 12:44:23.353163+00:00 (UTC)
4 12:44:23.353340 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:23.353475 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:44:23.662953 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:23.663701 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:23.961010 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:23.961696 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:27.313995 validate duration: 3.96
12 12:44:27.314304 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:27.314475 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:27.314593 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:27.314707 Not decompressing ramdisk as can be used compressed.
16 12:44:27.314802 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:44:27.314877 saving as /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/ramdisk/rootfs.cpio.gz
18 12:44:27.314948 total size: 8429740 (8MB)
19 12:44:28.038248 progress 0% (0MB)
20 12:44:28.044066 progress 5% (0MB)
21 12:44:28.046386 progress 10% (0MB)
22 12:44:28.048655 progress 15% (1MB)
23 12:44:28.050956 progress 20% (1MB)
24 12:44:28.053216 progress 25% (2MB)
25 12:44:28.055516 progress 30% (2MB)
26 12:44:28.057818 progress 35% (2MB)
27 12:44:28.059901 progress 40% (3MB)
28 12:44:28.062203 progress 45% (3MB)
29 12:44:28.064609 progress 50% (4MB)
30 12:44:28.066917 progress 55% (4MB)
31 12:44:28.069147 progress 60% (4MB)
32 12:44:28.071413 progress 65% (5MB)
33 12:44:28.073689 progress 70% (5MB)
34 12:44:28.075743 progress 75% (6MB)
35 12:44:28.078012 progress 80% (6MB)
36 12:44:28.080233 progress 85% (6MB)
37 12:44:28.082499 progress 90% (7MB)
38 12:44:28.084789 progress 95% (7MB)
39 12:44:28.087082 progress 100% (8MB)
40 12:44:28.087227 8MB downloaded in 0.77s (10.41MB/s)
41 12:44:28.087399 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:44:28.087666 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:44:28.087763 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:44:28.087856 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:44:28.087971 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:28.088047 saving as /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/kernel/bzImage
48 12:44:28.088115 total size: 11646080 (11MB)
49 12:44:28.088183 No compression specified
50 12:44:28.089147 progress 0% (0MB)
51 12:44:28.092243 progress 5% (0MB)
52 12:44:28.095428 progress 10% (1MB)
53 12:44:28.098574 progress 15% (1MB)
54 12:44:28.101713 progress 20% (2MB)
55 12:44:28.104655 progress 25% (2MB)
56 12:44:28.107847 progress 30% (3MB)
57 12:44:28.110990 progress 35% (3MB)
58 12:44:28.114162 progress 40% (4MB)
59 12:44:28.117083 progress 45% (5MB)
60 12:44:28.120205 progress 50% (5MB)
61 12:44:28.123339 progress 55% (6MB)
62 12:44:28.126470 progress 60% (6MB)
63 12:44:28.129632 progress 65% (7MB)
64 12:44:28.132549 progress 70% (7MB)
65 12:44:28.135706 progress 75% (8MB)
66 12:44:28.138799 progress 80% (8MB)
67 12:44:28.141878 progress 85% (9MB)
68 12:44:28.144758 progress 90% (10MB)
69 12:44:28.147871 progress 95% (10MB)
70 12:44:28.150968 progress 100% (11MB)
71 12:44:28.151134 11MB downloaded in 0.06s (176.26MB/s)
72 12:44:28.151293 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:44:28.151560 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:44:28.151656 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:44:28.151753 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:44:28.151874 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:28.151949 saving as /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/modules/modules.tar
79 12:44:28.152019 total size: 497788 (0MB)
80 12:44:28.152087 Using unxz to decompress xz
81 12:44:28.155495 progress 6% (0MB)
82 12:44:28.155891 progress 13% (0MB)
83 12:44:28.156173 progress 19% (0MB)
84 12:44:28.157593 progress 26% (0MB)
85 12:44:28.159767 progress 32% (0MB)
86 12:44:28.162083 progress 39% (0MB)
87 12:44:28.164144 progress 46% (0MB)
88 12:44:28.166327 progress 52% (0MB)
89 12:44:28.168944 progress 59% (0MB)
90 12:44:28.171064 progress 65% (0MB)
91 12:44:28.173284 progress 72% (0MB)
92 12:44:28.175296 progress 78% (0MB)
93 12:44:28.177390 progress 85% (0MB)
94 12:44:28.179526 progress 92% (0MB)
95 12:44:28.181581 progress 98% (0MB)
96 12:44:28.189129 0MB downloaded in 0.04s (12.80MB/s)
97 12:44:28.189471 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:44:28.189773 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:44:28.189882 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:44:28.189988 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:44:28.190083 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:44:28.190178 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:44:28.190368 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp
105 12:44:28.190486 makedir: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin
106 12:44:28.190581 makedir: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/tests
107 12:44:28.190671 makedir: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/results
108 12:44:28.190788 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-add-keys
109 12:44:28.190932 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-add-sources
110 12:44:28.191093 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-background-process-start
111 12:44:28.191219 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-background-process-stop
112 12:44:28.191344 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-common-functions
113 12:44:28.191465 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-echo-ipv4
114 12:44:28.191588 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-install-packages
115 12:44:28.191710 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-installed-packages
116 12:44:28.191829 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-os-build
117 12:44:28.191949 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-probe-channel
118 12:44:28.192070 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-probe-ip
119 12:44:28.192189 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-target-ip
120 12:44:28.192308 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-target-mac
121 12:44:28.192425 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-target-storage
122 12:44:28.192554 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-case
123 12:44:28.192686 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-event
124 12:44:28.192817 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-feedback
125 12:44:28.192950 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-raise
126 12:44:28.193085 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-reference
127 12:44:28.193243 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-runner
128 12:44:28.193384 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-set
129 12:44:28.193508 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-test-shell
130 12:44:28.193634 Updating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-install-packages (oe)
131 12:44:28.193761 Updating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/bin/lava-installed-packages (oe)
132 12:44:28.193873 Creating /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/environment
133 12:44:28.193970 LAVA metadata
134 12:44:28.194050 - LAVA_JOB_ID=9729694
135 12:44:28.194122 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:44:28.194235 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:44:28.194312 skipped lava-vland-overlay
138 12:44:28.194397 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:44:28.194488 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:44:28.194561 skipped lava-multinode-overlay
141 12:44:28.194645 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:44:28.194738 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:44:28.194822 Loading test definitions
144 12:44:28.194932 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:44:28.195016 Using /lava-9729694 at stage 0
146 12:44:28.195301 uuid=9729694_1.4.2.3.1 testdef=None
147 12:44:28.195410 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:44:28.195510 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:44:28.196044 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:44:28.196293 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:44:28.196914 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:44:28.197176 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:44:28.197808 runner path: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/0/tests/0_dmesg test_uuid 9729694_1.4.2.3.1
156 12:44:28.197971 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:44:28.198229 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:44:28.198309 Using /lava-9729694 at stage 1
160 12:44:28.198572 uuid=9729694_1.4.2.3.5 testdef=None
161 12:44:28.198670 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:44:28.198766 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:44:28.199312 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:44:28.199556 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:44:28.200172 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:44:28.200430 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:44:28.201014 runner path: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/1/tests/1_bootrr test_uuid 9729694_1.4.2.3.5
170 12:44:28.201167 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:44:28.201401 Creating lava-test-runner.conf files
173 12:44:28.201471 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/0 for stage 0
174 12:44:28.201559 - 0_dmesg
175 12:44:28.201643 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729694/lava-overlay-wdvl62xp/lava-9729694/1 for stage 1
176 12:44:28.201733 - 1_bootrr
177 12:44:28.201836 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:44:28.201931 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:44:28.208841 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:44:28.208961 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:44:28.209059 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:44:28.209155 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:44:28.209315 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:44:28.411866 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:44:28.412257 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:44:28.412377 extracting modules file /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729694/extract-overlay-ramdisk-pajfd4o4/ramdisk
187 12:44:28.426871 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:44:28.427020 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:44:28.427120 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729694/compress-overlay-35qibqgc/overlay-1.4.2.4.tar.gz to ramdisk
190 12:44:28.427201 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729694/compress-overlay-35qibqgc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729694/extract-overlay-ramdisk-pajfd4o4/ramdisk
191 12:44:28.431707 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:44:28.431822 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:44:28.431923 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:44:28.432021 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:44:28.432102 Building ramdisk /var/lib/lava/dispatcher/tmp/9729694/extract-overlay-ramdisk-pajfd4o4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729694/extract-overlay-ramdisk-pajfd4o4/ramdisk
196 12:44:28.510168 >> 53721 blocks
197 12:44:29.408081 rename /var/lib/lava/dispatcher/tmp/9729694/extract-overlay-ramdisk-pajfd4o4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
198 12:44:29.408524 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:44:29.408655 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:44:29.408769 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:44:29.408869 No mkimage arch provided, not using FIT.
202 12:44:29.408972 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:44:29.409066 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:44:29.409171 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:44:29.409320 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:44:29.409408 No LXC device requested
207 12:44:29.409502 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:44:29.409604 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:44:29.409694 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:44:29.409832 Checking files for TFTP limit of 4294967296 bytes.
211 12:44:29.410244 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:44:29.410360 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:44:29.410463 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:44:29.410599 substitutions:
215 12:44:29.410675 - {DTB}: None
216 12:44:29.410747 - {INITRD}: 9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
217 12:44:29.410814 - {KERNEL}: 9729694/tftp-deploy-qimqeo5c/kernel/bzImage
218 12:44:29.410880 - {LAVA_MAC}: None
219 12:44:29.410943 - {PRESEED_CONFIG}: None
220 12:44:29.411007 - {PRESEED_LOCAL}: None
221 12:44:29.411069 - {RAMDISK}: 9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
222 12:44:29.411132 - {ROOT_PART}: None
223 12:44:29.411194 - {ROOT}: None
224 12:44:29.411256 - {SERVER_IP}: 192.168.201.1
225 12:44:29.411317 - {TEE}: None
226 12:44:29.411378 Parsed boot commands:
227 12:44:29.411439 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:44:29.411602 Parsed boot commands: tftpboot 192.168.201.1 9729694/tftp-deploy-qimqeo5c/kernel/bzImage 9729694/tftp-deploy-qimqeo5c/kernel/cmdline 9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
229 12:44:29.411734 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:44:29.411832 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:44:29.411941 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:44:29.412039 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:44:29.412115 Not connected, no need to disconnect.
234 12:44:29.412198 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:44:29.412286 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:44:29.412357 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
237 12:44:29.415708 Setting prompt string to ['lava-test: # ']
238 12:44:29.416116 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:44:29.416233 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:44:29.416343 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:44:29.416442 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:44:29.416633 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
243 12:44:34.565429 >> Command sent successfully.
244 12:44:34.574424 Returned 0 in 5 seconds
245 12:44:34.676285 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:44:34.677899 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:44:34.678455 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:44:34.678938 Setting prompt string to 'Starting depthcharge on Voema...'
250 12:44:34.679286 Changing prompt to 'Starting depthcharge on Voema...'
251 12:44:34.679640 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 12:44:34.680805 [Enter `^Ec?' for help]
253 12:44:36.233086
254 12:44:36.233778
255 12:44:36.241996 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 12:44:36.245406 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 12:44:36.252179 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 12:44:36.255250 CPU: AES supported, TXT NOT supported, VT supported
259 12:44:36.262835 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 12:44:36.265991 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 12:44:36.272773 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 12:44:36.276055 VBOOT: Loading verstage.
263 12:44:36.279589 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 12:44:36.286150 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 12:44:36.289760 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 12:44:36.299738 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 12:44:36.306205 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 12:44:36.306799
269 12:44:36.307189
270 12:44:36.316614 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 12:44:36.332786 Probing TPM: . done!
272 12:44:36.336403 TPM ready after 0 ms
273 12:44:36.339857 Connected to device vid:did:rid of 1ae0:0028:00
274 12:44:36.350747 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
275 12:44:36.357378 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 12:44:36.360920 Initialized TPM device CR50 revision 0
277 12:44:36.417863 tlcl_send_startup: Startup return code is 0
278 12:44:36.418443 TPM: setup succeeded
279 12:44:36.433742 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 12:44:36.447968 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 12:44:36.460638 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 12:44:36.470494 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 12:44:36.474519 Chrome EC: UHEPI supported
284 12:44:36.477578 Phase 1
285 12:44:36.481056 FMAP: area GBB found @ 1805000 (458752 bytes)
286 12:44:36.490690 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 12:44:36.497257 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 12:44:36.504696 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 12:44:36.510891 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 12:44:36.513576 Recovery requested (1009000e)
291 12:44:36.517488 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 12:44:36.528961 tlcl_extend: response is 0
293 12:44:36.535774 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 12:44:36.545166 tlcl_extend: response is 0
295 12:44:36.551420 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:44:36.558678 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 12:44:36.564720 BS: verstage times (exec / console): total (unknown) / 142 ms
298 12:44:36.565314
299 12:44:36.565674
300 12:44:36.577935 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 12:44:36.584556 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 12:44:36.587997 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 12:44:36.591987 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 12:44:36.598190 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 12:44:36.601600 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 12:44:36.604947 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
307 12:44:36.608538 TCO_STS: 0000 0000
308 12:44:36.611561 GEN_PMCON: d0015038 00002200
309 12:44:36.614826 GBLRST_CAUSE: 00000000 00000000
310 12:44:36.617909 HPR_CAUSE0: 00000000
311 12:44:36.618462 prev_sleep_state 5
312 12:44:36.621404 Boot Count incremented to 15445
313 12:44:36.628185 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 12:44:36.634858 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:44:36.644542 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:44:36.651222 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 12:44:36.654474 Chrome EC: UHEPI supported
318 12:44:36.660906 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 12:44:36.672283 Probing TPM: done!
320 12:44:36.678788 Connected to device vid:did:rid of 1ae0:0028:00
321 12:44:36.688601 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
322 12:44:36.691904 Initialized TPM device CR50 revision 0
323 12:44:36.707045 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 12:44:36.713311 MRC: Hash idx 0x100b comparison successful.
325 12:44:36.716745 MRC cache found, size faa8
326 12:44:36.717378 bootmode is set to: 2
327 12:44:36.720411 SPD index = 2
328 12:44:36.726358 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 12:44:36.730648 SPD: module type is LPDDR4X
330 12:44:36.733447 SPD: module part number is MT53D1G64D4NW-046
331 12:44:36.740012 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 12:44:36.743152 SPD: device width 16 bits, bus width 16 bits
333 12:44:36.749803 SPD: module size is 2048 MB (per channel)
334 12:44:37.179648 CBMEM:
335 12:44:37.183231 IMD: root @ 0x76fff000 254 entries.
336 12:44:37.186346 IMD: root @ 0x76ffec00 62 entries.
337 12:44:37.189956 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 12:44:37.196477 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 12:44:37.199679 External stage cache:
340 12:44:37.202940 IMD: root @ 0x7b3ff000 254 entries.
341 12:44:37.206340 IMD: root @ 0x7b3fec00 62 entries.
342 12:44:37.221373 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 12:44:37.227713 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 12:44:37.234200 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 12:44:37.248495 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 12:44:37.254717 cse_lite: Skip switching to RW in the recovery path
347 12:44:37.255307 8 DIMMs found
348 12:44:37.255709 SMM Memory Map
349 12:44:37.261475 SMRAM : 0x7b000000 0x800000
350 12:44:37.264948 Subregion 0: 0x7b000000 0x200000
351 12:44:37.268246 Subregion 1: 0x7b200000 0x200000
352 12:44:37.271140 Subregion 2: 0x7b400000 0x400000
353 12:44:37.271690 top_of_ram = 0x77000000
354 12:44:37.277928 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 12:44:37.284247 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 12:44:37.287633 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 12:44:37.294402 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:44:37.300998 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 12:44:37.307308 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 12:44:37.317434 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 12:44:37.324449 Processing 211 relocs. Offset value of 0x74c0b000
362 12:44:37.330448 BS: romstage times (exec / console): total (unknown) / 277 ms
363 12:44:37.335947
364 12:44:37.336425
365 12:44:37.346608 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 12:44:37.349632 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 12:44:37.360339 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 12:44:37.366376 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 12:44:37.373196 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 12:44:37.379722 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 12:44:37.423463 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 12:44:37.430438 Processing 5008 relocs. Offset value of 0x75d98000
373 12:44:37.432817 BS: postcar times (exec / console): total (unknown) / 59 ms
374 12:44:37.436251
375 12:44:37.436701
376 12:44:37.446224 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 12:44:37.446781 Normal boot
378 12:44:37.449587 FW_CONFIG value is 0x804c02
379 12:44:37.453014 PCI: 00:07.0 disabled by fw_config
380 12:44:37.455940 PCI: 00:07.1 disabled by fw_config
381 12:44:37.459681 PCI: 00:0d.2 disabled by fw_config
382 12:44:37.465903 PCI: 00:1c.7 disabled by fw_config
383 12:44:37.469898 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 12:44:37.476022 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 12:44:37.479766 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 12:44:37.486104 GENERIC: 0.0 disabled by fw_config
387 12:44:37.489377 GENERIC: 1.0 disabled by fw_config
388 12:44:37.492943 fw_config match found: DB_USB=USB3_ACTIVE
389 12:44:37.496043 fw_config match found: DB_USB=USB3_ACTIVE
390 12:44:37.499596 fw_config match found: DB_USB=USB3_ACTIVE
391 12:44:37.506151 fw_config match found: DB_USB=USB3_ACTIVE
392 12:44:37.510220 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 12:44:37.515883 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 12:44:37.526071 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 12:44:37.532298 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 12:44:37.535662 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 12:44:37.542308 microcode: Update skipped, already up-to-date
398 12:44:37.549190 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 12:44:37.577397 Detected 4 core, 8 thread CPU.
400 12:44:37.580083 Setting up SMI for CPU
401 12:44:37.583604 IED base = 0x7b400000
402 12:44:37.584192 IED size = 0x00400000
403 12:44:37.587022 Will perform SMM setup.
404 12:44:37.593536 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 12:44:37.600469 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 12:44:37.606644 Processing 16 relocs. Offset value of 0x00030000
407 12:44:37.610167 Attempting to start 7 APs
408 12:44:37.613302 Waiting for 10ms after sending INIT.
409 12:44:37.628845 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 12:44:37.632437 AP: slot 4 apic_id 4.
411 12:44:37.635351 AP: slot 7 apic_id 5.
412 12:44:37.635946 done.
413 12:44:37.636363 AP: slot 2 apic_id 7.
414 12:44:37.639043 AP: slot 6 apic_id 2.
415 12:44:37.642144 AP: slot 3 apic_id 3.
416 12:44:37.645485 Waiting for 2nd SIPI to complete...done.
417 12:44:37.648606 AP: slot 5 apic_id 6.
418 12:44:37.655510 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 12:44:37.661910 Processing 13 relocs. Offset value of 0x00038000
420 12:44:37.665268 Unable to locate Global NVS
421 12:44:37.672011 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 12:44:37.675162 Installing permanent SMM handler to 0x7b000000
423 12:44:37.685045 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 12:44:37.688474 Processing 794 relocs. Offset value of 0x7b010000
425 12:44:37.698479 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 12:44:37.701659 Processing 13 relocs. Offset value of 0x7b008000
427 12:44:37.708553 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 12:44:37.715502 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 12:44:37.718380 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 12:44:37.724900 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 12:44:37.731449 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 12:44:37.738180 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 12:44:37.745063 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 12:44:37.745690 Unable to locate Global NVS
435 12:44:37.754286 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 12:44:37.757633 Clearing SMI status registers
437 12:44:37.758135 SMI_STS: PM1
438 12:44:37.761188 PM1_STS: PWRBTN
439 12:44:37.767828 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 12:44:37.770991 In relocation handler: CPU 0
441 12:44:37.774248 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 12:44:37.781188 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 12:44:37.781784 Relocation complete.
444 12:44:37.791186 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 12:44:37.791749 In relocation handler: CPU 1
446 12:44:37.797827 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 12:44:37.798377 Relocation complete.
448 12:44:37.807594 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 12:44:37.808202 In relocation handler: CPU 7
450 12:44:37.814228 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 12:44:37.814825 Relocation complete.
452 12:44:37.824118 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
453 12:44:37.824669 In relocation handler: CPU 4
454 12:44:37.830868 New SMBASE=0x7afff000 IEDBASE=0x7b400000
455 12:44:37.834469 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 12:44:37.838105 Relocation complete.
457 12:44:37.844204 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
458 12:44:37.847409 In relocation handler: CPU 6
459 12:44:37.851001 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 12:44:37.857253 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 12:44:37.857804 Relocation complete.
462 12:44:37.863994 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
463 12:44:37.867314 In relocation handler: CPU 3
464 12:44:37.873522 New SMBASE=0x7afff400 IEDBASE=0x7b400000
465 12:44:37.874081 Relocation complete.
466 12:44:37.880316 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
467 12:44:37.883821 In relocation handler: CPU 2
468 12:44:37.890458 New SMBASE=0x7afff800 IEDBASE=0x7b400000
469 12:44:37.891010 Relocation complete.
470 12:44:37.897280 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
471 12:44:37.900113 In relocation handler: CPU 5
472 12:44:37.903979 New SMBASE=0x7affec00 IEDBASE=0x7b400000
473 12:44:37.910050 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 12:44:37.913897 Relocation complete.
475 12:44:37.914346 Initializing CPU #0
476 12:44:37.917369 CPU: vendor Intel device 806c1
477 12:44:37.920489 CPU: family 06, model 8c, stepping 01
478 12:44:37.923534 Clearing out pending MCEs
479 12:44:37.927301 Setting up local APIC...
480 12:44:37.930055 apic_id: 0x00 done.
481 12:44:37.933655 Turbo is available but hidden
482 12:44:37.937096 Turbo is available and visible
483 12:44:37.940480 microcode: Update skipped, already up-to-date
484 12:44:37.943853 CPU #0 initialized
485 12:44:37.944396 Initializing CPU #5
486 12:44:37.946763 Initializing CPU #2
487 12:44:37.950270 CPU: vendor Intel device 806c1
488 12:44:37.953606 CPU: family 06, model 8c, stepping 01
489 12:44:37.956745 CPU: vendor Intel device 806c1
490 12:44:37.959928 CPU: family 06, model 8c, stepping 01
491 12:44:37.963038 Clearing out pending MCEs
492 12:44:37.966354 Clearing out pending MCEs
493 12:44:37.966799 Setting up local APIC...
494 12:44:37.969989 Initializing CPU #3
495 12:44:37.973246 Initializing CPU #6
496 12:44:37.976718 CPU: vendor Intel device 806c1
497 12:44:37.979767 CPU: family 06, model 8c, stepping 01
498 12:44:37.983093 CPU: vendor Intel device 806c1
499 12:44:37.986814 CPU: family 06, model 8c, stepping 01
500 12:44:37.989673 Clearing out pending MCEs
501 12:44:37.990117 Clearing out pending MCEs
502 12:44:37.993437 apic_id: 0x06 done.
503 12:44:37.996652 Setting up local APIC...
504 12:44:37.997365 Initializing CPU #1
505 12:44:38.000088 Initializing CPU #7
506 12:44:38.004040 Initializing CPU #4
507 12:44:38.004485 CPU: vendor Intel device 806c1
508 12:44:38.007406 CPU: family 06, model 8c, stepping 01
509 12:44:38.010719 CPU: vendor Intel device 806c1
510 12:44:38.017583 CPU: family 06, model 8c, stepping 01
511 12:44:38.018129 Clearing out pending MCEs
512 12:44:38.020529 Clearing out pending MCEs
513 12:44:38.024205 Setting up local APIC...
514 12:44:38.027525 Setting up local APIC...
515 12:44:38.028070 Setting up local APIC...
516 12:44:38.030750 apic_id: 0x07 done.
517 12:44:38.034132 microcode: Update skipped, already up-to-date
518 12:44:38.040516 microcode: Update skipped, already up-to-date
519 12:44:38.041064 CPU #5 initialized
520 12:44:38.043907 CPU #2 initialized
521 12:44:38.048082 CPU: vendor Intel device 806c1
522 12:44:38.050527 CPU: family 06, model 8c, stepping 01
523 12:44:38.054118 Clearing out pending MCEs
524 12:44:38.057455 Setting up local APIC...
525 12:44:38.058044 apic_id: 0x04 done.
526 12:44:38.060849 apic_id: 0x05 done.
527 12:44:38.064163 microcode: Update skipped, already up-to-date
528 12:44:38.070241 microcode: Update skipped, already up-to-date
529 12:44:38.070742 CPU #4 initialized
530 12:44:38.073615 CPU #7 initialized
531 12:44:38.077326 Setting up local APIC...
532 12:44:38.077784 apic_id: 0x02 done.
533 12:44:38.080734 apic_id: 0x03 done.
534 12:44:38.083624 microcode: Update skipped, already up-to-date
535 12:44:38.090120 microcode: Update skipped, already up-to-date
536 12:44:38.090660 CPU #6 initialized
537 12:44:38.093917 CPU #3 initialized
538 12:44:38.097015 apic_id: 0x01 done.
539 12:44:38.100383 microcode: Update skipped, already up-to-date
540 12:44:38.103575 CPU #1 initialized
541 12:44:38.106863 bsp_do_flight_plan done after 456 msecs.
542 12:44:38.110323 CPU: frequency set to 4400 MHz
543 12:44:38.110766 Enabling SMIs.
544 12:44:38.117056 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 12:44:38.133769 SATAXPCIE1 indicates PCIe NVMe is present
546 12:44:38.136751 Probing TPM: done!
547 12:44:38.140557 Connected to device vid:did:rid of 1ae0:0028:00
548 12:44:38.151023 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
549 12:44:38.154511 Initialized TPM device CR50 revision 0
550 12:44:38.157280 Enabling S0i3.4
551 12:44:38.164157 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 12:44:38.167437 Found a VBT of 8704 bytes after decompression
553 12:44:38.174115 cse_lite: CSE RO boot. HybridStorageMode disabled
554 12:44:38.180486 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 12:44:38.255699 FSPS returned 0
556 12:44:38.258759 Executing Phase 1 of FspMultiPhaseSiInit
557 12:44:38.269321 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 12:44:38.272293 port C0 DISC req: usage 1 usb3 1 usb2 5
559 12:44:38.275266 Raw Buffer output 0 00000511
560 12:44:38.278601 Raw Buffer output 1 00000000
561 12:44:38.282793 pmc_send_ipc_cmd succeeded
562 12:44:38.289085 port C1 DISC req: usage 1 usb3 2 usb2 3
563 12:44:38.289733 Raw Buffer output 0 00000321
564 12:44:38.292149 Raw Buffer output 1 00000000
565 12:44:38.296470 pmc_send_ipc_cmd succeeded
566 12:44:38.301875 Detected 4 core, 8 thread CPU.
567 12:44:38.304710 Detected 4 core, 8 thread CPU.
568 12:44:38.504646 Display FSP Version Info HOB
569 12:44:38.507988 Reference Code - CPU = a.0.4c.31
570 12:44:38.511261 uCode Version = 0.0.0.86
571 12:44:38.514913 TXT ACM version = ff.ff.ff.ffff
572 12:44:38.518317 Reference Code - ME = a.0.4c.31
573 12:44:38.521354 MEBx version = 0.0.0.0
574 12:44:38.524746 ME Firmware Version = Consumer SKU
575 12:44:38.528341 Reference Code - PCH = a.0.4c.31
576 12:44:38.531115 PCH-CRID Status = Disabled
577 12:44:38.535385 PCH-CRID Original Value = ff.ff.ff.ffff
578 12:44:38.537933 PCH-CRID New Value = ff.ff.ff.ffff
579 12:44:38.541615 OPROM - RST - RAID = ff.ff.ff.ffff
580 12:44:38.544716 PCH Hsio Version = 4.0.0.0
581 12:44:38.548182 Reference Code - SA - System Agent = a.0.4c.31
582 12:44:38.551548 Reference Code - MRC = 2.0.0.1
583 12:44:38.554798 SA - PCIe Version = a.0.4c.31
584 12:44:38.557799 SA-CRID Status = Disabled
585 12:44:38.561506 SA-CRID Original Value = 0.0.0.1
586 12:44:38.564646 SA-CRID New Value = 0.0.0.1
587 12:44:38.568011 OPROM - VBIOS = ff.ff.ff.ffff
588 12:44:38.571756 IO Manageability Engine FW Version = 11.1.4.0
589 12:44:38.574627 PHY Build Version = 0.0.0.e0
590 12:44:38.578977 Thunderbolt(TM) FW Version = 0.0.0.0
591 12:44:38.585646 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 12:44:38.586235 ITSS IRQ Polarities Before:
593 12:44:38.589307 IPC0: 0xffffffff
594 12:44:38.589896 IPC1: 0xffffffff
595 12:44:38.592722 IPC2: 0xffffffff
596 12:44:38.593344 IPC3: 0xffffffff
597 12:44:38.596144 ITSS IRQ Polarities After:
598 12:44:38.599195 IPC0: 0xffffffff
599 12:44:38.599785 IPC1: 0xffffffff
600 12:44:38.602528 IPC2: 0xffffffff
601 12:44:38.603113 IPC3: 0xffffffff
602 12:44:38.609401 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 12:44:38.619005 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 12:44:38.632304 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 12:44:38.642135 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 12:44:38.648944 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
607 12:44:38.652768 Enumerating buses...
608 12:44:38.655561 Show all devs... Before device enumeration.
609 12:44:38.658842 Root Device: enabled 1
610 12:44:38.662073 DOMAIN: 0000: enabled 1
611 12:44:38.665503 CPU_CLUSTER: 0: enabled 1
612 12:44:38.665948 PCI: 00:00.0: enabled 1
613 12:44:38.669182 PCI: 00:02.0: enabled 1
614 12:44:38.672589 PCI: 00:04.0: enabled 1
615 12:44:38.676114 PCI: 00:05.0: enabled 1
616 12:44:38.676661 PCI: 00:06.0: enabled 0
617 12:44:38.679572 PCI: 00:07.0: enabled 0
618 12:44:38.682217 PCI: 00:07.1: enabled 0
619 12:44:38.685885 PCI: 00:07.2: enabled 0
620 12:44:38.686474 PCI: 00:07.3: enabled 0
621 12:44:38.688633 PCI: 00:08.0: enabled 1
622 12:44:38.692361 PCI: 00:09.0: enabled 0
623 12:44:38.692909 PCI: 00:0a.0: enabled 0
624 12:44:38.695654 PCI: 00:0d.0: enabled 1
625 12:44:38.699125 PCI: 00:0d.1: enabled 0
626 12:44:38.702262 PCI: 00:0d.2: enabled 0
627 12:44:38.702806 PCI: 00:0d.3: enabled 0
628 12:44:38.705410 PCI: 00:0e.0: enabled 0
629 12:44:38.708690 PCI: 00:10.2: enabled 1
630 12:44:38.712052 PCI: 00:10.6: enabled 0
631 12:44:38.712638 PCI: 00:10.7: enabled 0
632 12:44:38.715572 PCI: 00:12.0: enabled 0
633 12:44:38.718495 PCI: 00:12.6: enabled 0
634 12:44:38.722223 PCI: 00:13.0: enabled 0
635 12:44:38.722853 PCI: 00:14.0: enabled 1
636 12:44:38.724988 PCI: 00:14.1: enabled 0
637 12:44:38.728411 PCI: 00:14.2: enabled 1
638 12:44:38.731604 PCI: 00:14.3: enabled 1
639 12:44:38.732041 PCI: 00:15.0: enabled 1
640 12:44:38.735028 PCI: 00:15.1: enabled 1
641 12:44:38.738407 PCI: 00:15.2: enabled 1
642 12:44:38.738845 PCI: 00:15.3: enabled 1
643 12:44:38.741640 PCI: 00:16.0: enabled 1
644 12:44:38.745353 PCI: 00:16.1: enabled 0
645 12:44:38.748298 PCI: 00:16.2: enabled 0
646 12:44:38.748736 PCI: 00:16.3: enabled 0
647 12:44:38.751813 PCI: 00:16.4: enabled 0
648 12:44:38.755002 PCI: 00:16.5: enabled 0
649 12:44:38.758451 PCI: 00:17.0: enabled 1
650 12:44:38.758991 PCI: 00:19.0: enabled 0
651 12:44:38.761313 PCI: 00:19.1: enabled 1
652 12:44:38.765101 PCI: 00:19.2: enabled 0
653 12:44:38.768863 PCI: 00:1c.0: enabled 1
654 12:44:38.769481 PCI: 00:1c.1: enabled 0
655 12:44:38.772041 PCI: 00:1c.2: enabled 0
656 12:44:38.775172 PCI: 00:1c.3: enabled 0
657 12:44:38.778071 PCI: 00:1c.4: enabled 0
658 12:44:38.778612 PCI: 00:1c.5: enabled 0
659 12:44:38.782111 PCI: 00:1c.6: enabled 1
660 12:44:38.785308 PCI: 00:1c.7: enabled 0
661 12:44:38.785847 PCI: 00:1d.0: enabled 1
662 12:44:38.788461 PCI: 00:1d.1: enabled 0
663 12:44:38.791275 PCI: 00:1d.2: enabled 1
664 12:44:38.795082 PCI: 00:1d.3: enabled 0
665 12:44:38.795627 PCI: 00:1e.0: enabled 1
666 12:44:38.798080 PCI: 00:1e.1: enabled 0
667 12:44:38.801695 PCI: 00:1e.2: enabled 1
668 12:44:38.804846 PCI: 00:1e.3: enabled 1
669 12:44:38.805436 PCI: 00:1f.0: enabled 1
670 12:44:38.807751 PCI: 00:1f.1: enabled 0
671 12:44:38.811399 PCI: 00:1f.2: enabled 1
672 12:44:38.814752 PCI: 00:1f.3: enabled 1
673 12:44:38.815296 PCI: 00:1f.4: enabled 0
674 12:44:38.818031 PCI: 00:1f.5: enabled 1
675 12:44:38.821125 PCI: 00:1f.6: enabled 0
676 12:44:38.821593 PCI: 00:1f.7: enabled 0
677 12:44:38.824600 APIC: 00: enabled 1
678 12:44:38.828238 GENERIC: 0.0: enabled 1
679 12:44:38.831944 GENERIC: 0.0: enabled 1
680 12:44:38.832488 GENERIC: 1.0: enabled 1
681 12:44:38.834580 GENERIC: 0.0: enabled 1
682 12:44:38.837829 GENERIC: 1.0: enabled 1
683 12:44:38.838389 USB0 port 0: enabled 1
684 12:44:38.841355 GENERIC: 0.0: enabled 1
685 12:44:38.844517 USB0 port 0: enabled 1
686 12:44:38.848096 GENERIC: 0.0: enabled 1
687 12:44:38.848641 I2C: 00:1a: enabled 1
688 12:44:38.851459 I2C: 00:31: enabled 1
689 12:44:38.854610 I2C: 00:32: enabled 1
690 12:44:38.855153 I2C: 00:10: enabled 1
691 12:44:38.857895 I2C: 00:15: enabled 1
692 12:44:38.860801 GENERIC: 0.0: enabled 0
693 12:44:38.864584 GENERIC: 1.0: enabled 0
694 12:44:38.865125 GENERIC: 0.0: enabled 1
695 12:44:38.867799 SPI: 00: enabled 1
696 12:44:38.868344 SPI: 00: enabled 1
697 12:44:38.870800 PNP: 0c09.0: enabled 1
698 12:44:38.874447 GENERIC: 0.0: enabled 1
699 12:44:38.878303 USB3 port 0: enabled 1
700 12:44:38.878874 USB3 port 1: enabled 1
701 12:44:38.881307 USB3 port 2: enabled 0
702 12:44:38.884807 USB3 port 3: enabled 0
703 12:44:38.885391 USB2 port 0: enabled 0
704 12:44:38.887618 USB2 port 1: enabled 1
705 12:44:38.891001 USB2 port 2: enabled 1
706 12:44:38.894614 USB2 port 3: enabled 0
707 12:44:38.895158 USB2 port 4: enabled 1
708 12:44:38.897325 USB2 port 5: enabled 0
709 12:44:38.901058 USB2 port 6: enabled 0
710 12:44:38.901651 USB2 port 7: enabled 0
711 12:44:38.904464 USB2 port 8: enabled 0
712 12:44:38.907806 USB2 port 9: enabled 0
713 12:44:38.908350 USB3 port 0: enabled 0
714 12:44:38.910588 USB3 port 1: enabled 1
715 12:44:38.914074 USB3 port 2: enabled 0
716 12:44:38.917365 USB3 port 3: enabled 0
717 12:44:38.917806 GENERIC: 0.0: enabled 1
718 12:44:38.921261 GENERIC: 1.0: enabled 1
719 12:44:38.924200 APIC: 01: enabled 1
720 12:44:38.924778 APIC: 07: enabled 1
721 12:44:38.927580 APIC: 03: enabled 1
722 12:44:38.931087 APIC: 04: enabled 1
723 12:44:38.931635 APIC: 06: enabled 1
724 12:44:38.934637 APIC: 02: enabled 1
725 12:44:38.935189 APIC: 05: enabled 1
726 12:44:38.937120 Compare with tree...
727 12:44:38.940989 Root Device: enabled 1
728 12:44:38.944252 DOMAIN: 0000: enabled 1
729 12:44:38.944812 PCI: 00:00.0: enabled 1
730 12:44:38.947148 PCI: 00:02.0: enabled 1
731 12:44:38.950459 PCI: 00:04.0: enabled 1
732 12:44:38.954292 GENERIC: 0.0: enabled 1
733 12:44:38.957584 PCI: 00:05.0: enabled 1
734 12:44:38.958031 PCI: 00:06.0: enabled 0
735 12:44:38.960593 PCI: 00:07.0: enabled 0
736 12:44:38.964079 GENERIC: 0.0: enabled 1
737 12:44:38.967321 PCI: 00:07.1: enabled 0
738 12:44:38.970367 GENERIC: 1.0: enabled 1
739 12:44:38.970818 PCI: 00:07.2: enabled 0
740 12:44:38.973892 GENERIC: 0.0: enabled 1
741 12:44:38.977453 PCI: 00:07.3: enabled 0
742 12:44:38.980595 GENERIC: 1.0: enabled 1
743 12:44:38.983831 PCI: 00:08.0: enabled 1
744 12:44:38.984382 PCI: 00:09.0: enabled 0
745 12:44:38.987431 PCI: 00:0a.0: enabled 0
746 12:44:38.990741 PCI: 00:0d.0: enabled 1
747 12:44:38.993918 USB0 port 0: enabled 1
748 12:44:38.997042 USB3 port 0: enabled 1
749 12:44:38.997643 USB3 port 1: enabled 1
750 12:44:39.000748 USB3 port 2: enabled 0
751 12:44:39.004021 USB3 port 3: enabled 0
752 12:44:39.007295 PCI: 00:0d.1: enabled 0
753 12:44:39.010358 PCI: 00:0d.2: enabled 0
754 12:44:39.010897 GENERIC: 0.0: enabled 1
755 12:44:39.014507 PCI: 00:0d.3: enabled 0
756 12:44:39.017387 PCI: 00:0e.0: enabled 0
757 12:44:39.020811 PCI: 00:10.2: enabled 1
758 12:44:39.023747 PCI: 00:10.6: enabled 0
759 12:44:39.024355 PCI: 00:10.7: enabled 0
760 12:44:39.026730 PCI: 00:12.0: enabled 0
761 12:44:39.030234 PCI: 00:12.6: enabled 0
762 12:44:39.033817 PCI: 00:13.0: enabled 0
763 12:44:39.037290 PCI: 00:14.0: enabled 1
764 12:44:39.037881 USB0 port 0: enabled 1
765 12:44:39.040316 USB2 port 0: enabled 0
766 12:44:39.044197 USB2 port 1: enabled 1
767 12:44:39.046904 USB2 port 2: enabled 1
768 12:44:39.049992 USB2 port 3: enabled 0
769 12:44:39.053656 USB2 port 4: enabled 1
770 12:44:39.054249 USB2 port 5: enabled 0
771 12:44:39.056901 USB2 port 6: enabled 0
772 12:44:39.060273 USB2 port 7: enabled 0
773 12:44:39.063462 USB2 port 8: enabled 0
774 12:44:39.067120 USB2 port 9: enabled 0
775 12:44:39.067727 USB3 port 0: enabled 0
776 12:44:39.069938 USB3 port 1: enabled 1
777 12:44:39.073806 USB3 port 2: enabled 0
778 12:44:39.076894 USB3 port 3: enabled 0
779 12:44:39.079970 PCI: 00:14.1: enabled 0
780 12:44:39.083427 PCI: 00:14.2: enabled 1
781 12:44:39.083987 PCI: 00:14.3: enabled 1
782 12:44:39.087143 GENERIC: 0.0: enabled 1
783 12:44:39.089837 PCI: 00:15.0: enabled 1
784 12:44:39.093186 I2C: 00:1a: enabled 1
785 12:44:39.093677 I2C: 00:31: enabled 1
786 12:44:39.096945 I2C: 00:32: enabled 1
787 12:44:39.100209 PCI: 00:15.1: enabled 1
788 12:44:39.103499 I2C: 00:10: enabled 1
789 12:44:39.106688 PCI: 00:15.2: enabled 1
790 12:44:39.107236 PCI: 00:15.3: enabled 1
791 12:44:39.110051 PCI: 00:16.0: enabled 1
792 12:44:39.113599 PCI: 00:16.1: enabled 0
793 12:44:39.116943 PCI: 00:16.2: enabled 0
794 12:44:39.120429 PCI: 00:16.3: enabled 0
795 12:44:39.120972 PCI: 00:16.4: enabled 0
796 12:44:39.123149 PCI: 00:16.5: enabled 0
797 12:44:39.126294 PCI: 00:17.0: enabled 1
798 12:44:39.129588 PCI: 00:19.0: enabled 0
799 12:44:39.132993 PCI: 00:19.1: enabled 1
800 12:44:39.133571 I2C: 00:15: enabled 1
801 12:44:39.137067 PCI: 00:19.2: enabled 0
802 12:44:39.140012 PCI: 00:1d.0: enabled 1
803 12:44:39.143658 GENERIC: 0.0: enabled 1
804 12:44:39.146617 PCI: 00:1e.0: enabled 1
805 12:44:39.147210 PCI: 00:1e.1: enabled 0
806 12:44:39.149750 PCI: 00:1e.2: enabled 1
807 12:44:39.153021 SPI: 00: enabled 1
808 12:44:39.156755 PCI: 00:1e.3: enabled 1
809 12:44:39.157337 SPI: 00: enabled 1
810 12:44:39.159856 PCI: 00:1f.0: enabled 1
811 12:44:39.163129 PNP: 0c09.0: enabled 1
812 12:44:39.166372 PCI: 00:1f.1: enabled 0
813 12:44:39.166958 PCI: 00:1f.2: enabled 1
814 12:44:39.169614 GENERIC: 0.0: enabled 1
815 12:44:39.173600 GENERIC: 0.0: enabled 1
816 12:44:39.176313 GENERIC: 1.0: enabled 1
817 12:44:39.179947 PCI: 00:1f.3: enabled 1
818 12:44:39.183387 PCI: 00:1f.4: enabled 0
819 12:44:39.183949 PCI: 00:1f.5: enabled 1
820 12:44:39.186151 PCI: 00:1f.6: enabled 0
821 12:44:39.190070 PCI: 00:1f.7: enabled 0
822 12:44:39.193079 CPU_CLUSTER: 0: enabled 1
823 12:44:39.193659 APIC: 00: enabled 1
824 12:44:39.196036 APIC: 01: enabled 1
825 12:44:39.199534 APIC: 07: enabled 1
826 12:44:39.200108 APIC: 03: enabled 1
827 12:44:39.251965 APIC: 04: enabled 1
828 12:44:39.252623 APIC: 06: enabled 1
829 12:44:39.253044 APIC: 02: enabled 1
830 12:44:39.253507 APIC: 05: enabled 1
831 12:44:39.253882 Root Device scanning...
832 12:44:39.254614 scan_static_bus for Root Device
833 12:44:39.254993 DOMAIN: 0000 enabled
834 12:44:39.255339 CPU_CLUSTER: 0 enabled
835 12:44:39.255671 DOMAIN: 0000 scanning...
836 12:44:39.256004 PCI: pci_scan_bus for bus 00
837 12:44:39.256331 PCI: 00:00.0 [8086/0000] ops
838 12:44:39.256682 PCI: 00:00.0 [8086/9a12] enabled
839 12:44:39.257014 PCI: 00:02.0 [8086/0000] bus ops
840 12:44:39.257377 PCI: 00:02.0 [8086/9a40] enabled
841 12:44:39.257700 PCI: 00:04.0 [8086/0000] bus ops
842 12:44:39.258018 PCI: 00:04.0 [8086/9a03] enabled
843 12:44:39.258333 PCI: 00:05.0 [8086/9a19] enabled
844 12:44:39.298272 PCI: 00:07.0 [0000/0000] hidden
845 12:44:39.298871 PCI: 00:08.0 [8086/9a11] enabled
846 12:44:39.299226 PCI: 00:0a.0 [8086/9a0d] disabled
847 12:44:39.299556 PCI: 00:0d.0 [8086/0000] bus ops
848 12:44:39.300235 PCI: 00:0d.0 [8086/9a13] enabled
849 12:44:39.300576 PCI: 00:14.0 [8086/0000] bus ops
850 12:44:39.300895 PCI: 00:14.0 [8086/a0ed] enabled
851 12:44:39.301229 PCI: 00:14.2 [8086/a0ef] enabled
852 12:44:39.301546 PCI: 00:14.3 [8086/0000] bus ops
853 12:44:39.301845 PCI: 00:14.3 [8086/a0f0] enabled
854 12:44:39.302141 PCI: 00:15.0 [8086/0000] bus ops
855 12:44:39.302434 PCI: 00:15.0 [8086/a0e8] enabled
856 12:44:39.302754 PCI: 00:15.1 [8086/0000] bus ops
857 12:44:39.303367 PCI: 00:15.1 [8086/a0e9] enabled
858 12:44:39.303691 PCI: 00:15.2 [8086/0000] bus ops
859 12:44:39.306310 PCI: 00:15.2 [8086/a0ea] enabled
860 12:44:39.306794 PCI: 00:15.3 [8086/0000] bus ops
861 12:44:39.309480 PCI: 00:15.3 [8086/a0eb] enabled
862 12:44:39.313150 PCI: 00:16.0 [8086/0000] ops
863 12:44:39.316447 PCI: 00:16.0 [8086/a0e0] enabled
864 12:44:39.323583 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 12:44:39.326062 PCI: 00:19.0 [8086/0000] bus ops
866 12:44:39.329666 PCI: 00:19.0 [8086/a0c5] disabled
867 12:44:39.333118 PCI: 00:19.1 [8086/0000] bus ops
868 12:44:39.336172 PCI: 00:19.1 [8086/a0c6] enabled
869 12:44:39.339770 PCI: 00:1d.0 [8086/0000] bus ops
870 12:44:39.343218 PCI: 00:1d.0 [8086/a0b0] enabled
871 12:44:39.346274 PCI: 00:1e.0 [8086/0000] ops
872 12:44:39.349836 PCI: 00:1e.0 [8086/a0a8] enabled
873 12:44:39.353181 PCI: 00:1e.2 [8086/0000] bus ops
874 12:44:39.356557 PCI: 00:1e.2 [8086/a0aa] enabled
875 12:44:39.359898 PCI: 00:1e.3 [8086/0000] bus ops
876 12:44:39.362758 PCI: 00:1e.3 [8086/a0ab] enabled
877 12:44:39.366402 PCI: 00:1f.0 [8086/0000] bus ops
878 12:44:39.369657 PCI: 00:1f.0 [8086/a087] enabled
879 12:44:39.370247 RTC Init
880 12:44:39.372906 Set power on after power failure.
881 12:44:39.376111 Disabling Deep S3
882 12:44:39.376703 Disabling Deep S3
883 12:44:39.379750 Disabling Deep S4
884 12:44:39.382696 Disabling Deep S4
885 12:44:39.383288 Disabling Deep S5
886 12:44:39.385760 Disabling Deep S5
887 12:44:39.389185 PCI: 00:1f.2 [0000/0000] hidden
888 12:44:39.392579 PCI: 00:1f.3 [8086/0000] bus ops
889 12:44:39.395777 PCI: 00:1f.3 [8086/a0c8] enabled
890 12:44:39.399434 PCI: 00:1f.5 [8086/0000] bus ops
891 12:44:39.402312 PCI: 00:1f.5 [8086/a0a4] enabled
892 12:44:39.405956 PCI: Leftover static devices:
893 12:44:39.406502 PCI: 00:10.2
894 12:44:39.406885 PCI: 00:10.6
895 12:44:39.409859 PCI: 00:10.7
896 12:44:39.410417 PCI: 00:06.0
897 12:44:39.412091 PCI: 00:07.1
898 12:44:39.412533 PCI: 00:07.2
899 12:44:39.412881 PCI: 00:07.3
900 12:44:39.415607 PCI: 00:09.0
901 12:44:39.416045 PCI: 00:0d.1
902 12:44:39.419112 PCI: 00:0d.2
903 12:44:39.419581 PCI: 00:0d.3
904 12:44:39.420012 PCI: 00:0e.0
905 12:44:39.422575 PCI: 00:12.0
906 12:44:39.423120 PCI: 00:12.6
907 12:44:39.425864 PCI: 00:13.0
908 12:44:39.426340 PCI: 00:14.1
909 12:44:39.429174 PCI: 00:16.1
910 12:44:39.429654 PCI: 00:16.2
911 12:44:39.430004 PCI: 00:16.3
912 12:44:39.432652 PCI: 00:16.4
913 12:44:39.433197 PCI: 00:16.5
914 12:44:39.435918 PCI: 00:17.0
915 12:44:39.436465 PCI: 00:19.2
916 12:44:39.436819 PCI: 00:1e.1
917 12:44:39.439394 PCI: 00:1f.1
918 12:44:39.439938 PCI: 00:1f.4
919 12:44:39.442939 PCI: 00:1f.6
920 12:44:39.443487 PCI: 00:1f.7
921 12:44:39.445765 PCI: Check your devicetree.cb.
922 12:44:39.448819 PCI: 00:02.0 scanning...
923 12:44:39.452002 scan_generic_bus for PCI: 00:02.0
924 12:44:39.455413 scan_generic_bus for PCI: 00:02.0 done
925 12:44:39.458725 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 12:44:39.462445 PCI: 00:04.0 scanning...
927 12:44:39.466059 scan_generic_bus for PCI: 00:04.0
928 12:44:39.468890 GENERIC: 0.0 enabled
929 12:44:39.475780 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 12:44:39.478564 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 12:44:39.482595 PCI: 00:0d.0 scanning...
932 12:44:39.485455 scan_static_bus for PCI: 00:0d.0
933 12:44:39.489345 USB0 port 0 enabled
934 12:44:39.489876 USB0 port 0 scanning...
935 12:44:39.492540 scan_static_bus for USB0 port 0
936 12:44:39.495746 USB3 port 0 enabled
937 12:44:39.498912 USB3 port 1 enabled
938 12:44:39.499465 USB3 port 2 disabled
939 12:44:39.501918 USB3 port 3 disabled
940 12:44:39.505429 USB3 port 0 scanning...
941 12:44:39.508440 scan_static_bus for USB3 port 0
942 12:44:39.511863 scan_static_bus for USB3 port 0 done
943 12:44:39.515909 scan_bus: bus USB3 port 0 finished in 6 msecs
944 12:44:39.518783 USB3 port 1 scanning...
945 12:44:39.521733 scan_static_bus for USB3 port 1
946 12:44:39.525182 scan_static_bus for USB3 port 1 done
947 12:44:39.532036 scan_bus: bus USB3 port 1 finished in 6 msecs
948 12:44:39.535151 scan_static_bus for USB0 port 0 done
949 12:44:39.538916 scan_bus: bus USB0 port 0 finished in 43 msecs
950 12:44:39.542185 scan_static_bus for PCI: 00:0d.0 done
951 12:44:39.549259 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 12:44:39.549810 PCI: 00:14.0 scanning...
953 12:44:39.552740 scan_static_bus for PCI: 00:14.0
954 12:44:39.555587 USB0 port 0 enabled
955 12:44:39.559141 USB0 port 0 scanning...
956 12:44:39.561822 scan_static_bus for USB0 port 0
957 12:44:39.565383 USB2 port 0 disabled
958 12:44:39.565923 USB2 port 1 enabled
959 12:44:39.568808 USB2 port 2 enabled
960 12:44:39.569455 USB2 port 3 disabled
961 12:44:39.571887 USB2 port 4 enabled
962 12:44:39.575288 USB2 port 5 disabled
963 12:44:39.575869 USB2 port 6 disabled
964 12:44:39.578657 USB2 port 7 disabled
965 12:44:39.581870 USB2 port 8 disabled
966 12:44:39.582452 USB2 port 9 disabled
967 12:44:39.585615 USB3 port 0 disabled
968 12:44:39.588476 USB3 port 1 enabled
969 12:44:39.588958 USB3 port 2 disabled
970 12:44:39.592136 USB3 port 3 disabled
971 12:44:39.595321 USB2 port 1 scanning...
972 12:44:39.598643 scan_static_bus for USB2 port 1
973 12:44:39.601849 scan_static_bus for USB2 port 1 done
974 12:44:39.605008 scan_bus: bus USB2 port 1 finished in 6 msecs
975 12:44:39.608353 USB2 port 2 scanning...
976 12:44:39.611474 scan_static_bus for USB2 port 2
977 12:44:39.614832 scan_static_bus for USB2 port 2 done
978 12:44:39.618387 scan_bus: bus USB2 port 2 finished in 6 msecs
979 12:44:39.621578 USB2 port 4 scanning...
980 12:44:39.625231 scan_static_bus for USB2 port 4
981 12:44:39.628553 scan_static_bus for USB2 port 4 done
982 12:44:39.635070 scan_bus: bus USB2 port 4 finished in 6 msecs
983 12:44:39.635621 USB3 port 1 scanning...
984 12:44:39.638762 scan_static_bus for USB3 port 1
985 12:44:39.644875 scan_static_bus for USB3 port 1 done
986 12:44:39.648352 scan_bus: bus USB3 port 1 finished in 6 msecs
987 12:44:39.651629 scan_static_bus for USB0 port 0 done
988 12:44:39.655098 scan_bus: bus USB0 port 0 finished in 93 msecs
989 12:44:39.661610 scan_static_bus for PCI: 00:14.0 done
990 12:44:39.664843 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 12:44:39.668129 PCI: 00:14.3 scanning...
992 12:44:39.671197 scan_static_bus for PCI: 00:14.3
993 12:44:39.674896 GENERIC: 0.0 enabled
994 12:44:39.678287 scan_static_bus for PCI: 00:14.3 done
995 12:44:39.681759 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 12:44:39.684564 PCI: 00:15.0 scanning...
997 12:44:39.688172 scan_static_bus for PCI: 00:15.0
998 12:44:39.691083 I2C: 00:1a enabled
999 12:44:39.691669 I2C: 00:31 enabled
1000 12:44:39.694563 I2C: 00:32 enabled
1001 12:44:39.697903 scan_static_bus for PCI: 00:15.0 done
1002 12:44:39.701521 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 12:44:39.704309 PCI: 00:15.1 scanning...
1004 12:44:39.707771 scan_static_bus for PCI: 00:15.1
1005 12:44:39.710717 I2C: 00:10 enabled
1006 12:44:39.714454 scan_static_bus for PCI: 00:15.1 done
1007 12:44:39.717525 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 12:44:39.721286 PCI: 00:15.2 scanning...
1009 12:44:39.724332 scan_static_bus for PCI: 00:15.2
1010 12:44:39.728287 scan_static_bus for PCI: 00:15.2 done
1011 12:44:39.733991 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 12:44:39.737086 PCI: 00:15.3 scanning...
1013 12:44:39.740187 scan_static_bus for PCI: 00:15.3
1014 12:44:39.743941 scan_static_bus for PCI: 00:15.3 done
1015 12:44:39.747402 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 12:44:39.750533 PCI: 00:19.1 scanning...
1017 12:44:39.753621 scan_static_bus for PCI: 00:19.1
1018 12:44:39.757023 I2C: 00:15 enabled
1019 12:44:39.760740 scan_static_bus for PCI: 00:19.1 done
1020 12:44:39.763606 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 12:44:39.767219 PCI: 00:1d.0 scanning...
1022 12:44:39.770354 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:44:39.773655 PCI: pci_scan_bus for bus 01
1024 12:44:39.777028 PCI: 01:00.0 [15b7/5009] enabled
1025 12:44:39.780308 GENERIC: 0.0 enabled
1026 12:44:39.783465 Enabling Common Clock Configuration
1027 12:44:39.787504 L1 Sub-State supported from root port 29
1028 12:44:39.790109 L1 Sub-State Support = 0x5
1029 12:44:39.793768 CommonModeRestoreTime = 0x28
1030 12:44:39.797013 Power On Value = 0x16, Power On Scale = 0x0
1031 12:44:39.800325 ASPM: Enabled L1
1032 12:44:39.803944 PCIe: Max_Payload_Size adjusted to 128
1033 12:44:39.807148 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 12:44:39.810383 PCI: 00:1e.2 scanning...
1035 12:44:39.813305 scan_generic_bus for PCI: 00:1e.2
1036 12:44:39.817340 SPI: 00 enabled
1037 12:44:39.823218 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 12:44:39.828156 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 12:44:39.830490 PCI: 00:1e.3 scanning...
1040 12:44:39.833808 scan_generic_bus for PCI: 00:1e.3
1041 12:44:39.834490 SPI: 00 enabled
1042 12:44:39.840384 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 12:44:39.846838 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 12:44:39.847289 PCI: 00:1f.0 scanning...
1045 12:44:39.850428 scan_static_bus for PCI: 00:1f.0
1046 12:44:39.853608 PNP: 0c09.0 enabled
1047 12:44:39.856721 PNP: 0c09.0 scanning...
1048 12:44:39.860440 scan_static_bus for PNP: 0c09.0
1049 12:44:39.863682 scan_static_bus for PNP: 0c09.0 done
1050 12:44:39.867301 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 12:44:39.870302 scan_static_bus for PCI: 00:1f.0 done
1052 12:44:39.877166 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 12:44:39.880316 PCI: 00:1f.2 scanning...
1054 12:44:39.883295 scan_static_bus for PCI: 00:1f.2
1055 12:44:39.883748 GENERIC: 0.0 enabled
1056 12:44:39.886925 GENERIC: 0.0 scanning...
1057 12:44:39.890119 scan_static_bus for GENERIC: 0.0
1058 12:44:39.893644 GENERIC: 0.0 enabled
1059 12:44:39.896763 GENERIC: 1.0 enabled
1060 12:44:39.900159 scan_static_bus for GENERIC: 0.0 done
1061 12:44:39.903665 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 12:44:39.906764 scan_static_bus for PCI: 00:1f.2 done
1063 12:44:39.913089 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 12:44:39.913665 PCI: 00:1f.3 scanning...
1065 12:44:39.916295 scan_static_bus for PCI: 00:1f.3
1066 12:44:39.923669 scan_static_bus for PCI: 00:1f.3 done
1067 12:44:39.926673 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 12:44:39.930009 PCI: 00:1f.5 scanning...
1069 12:44:39.933245 scan_generic_bus for PCI: 00:1f.5
1070 12:44:39.936246 scan_generic_bus for PCI: 00:1f.5 done
1071 12:44:39.943123 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 12:44:39.946227 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 12:44:39.949780 scan_static_bus for Root Device done
1074 12:44:39.956363 scan_bus: bus Root Device finished in 736 msecs
1075 12:44:39.956906 done
1076 12:44:39.962792 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 12:44:39.966234 Chrome EC: UHEPI supported
1078 12:44:39.972694 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 12:44:39.976077 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 12:44:39.979273 SPI flash protection: WPSW=0 SRP0=1
1081 12:44:39.986061 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 12:44:39.992763 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 12:44:39.993408 found VGA at PCI: 00:02.0
1084 12:44:39.996431 Setting up VGA for PCI: 00:02.0
1085 12:44:40.002656 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 12:44:40.005840 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 12:44:40.009479 Allocating resources...
1088 12:44:40.012445 Reading resources...
1089 12:44:40.015897 Root Device read_resources bus 0 link: 0
1090 12:44:40.019339 DOMAIN: 0000 read_resources bus 0 link: 0
1091 12:44:40.026617 PCI: 00:04.0 read_resources bus 1 link: 0
1092 12:44:40.029785 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 12:44:40.036579 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 12:44:40.040078 USB0 port 0 read_resources bus 0 link: 0
1095 12:44:40.046722 USB0 port 0 read_resources bus 0 link: 0 done
1096 12:44:40.050038 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 12:44:40.053130 PCI: 00:14.0 read_resources bus 0 link: 0
1098 12:44:40.059966 USB0 port 0 read_resources bus 0 link: 0
1099 12:44:40.063497 USB0 port 0 read_resources bus 0 link: 0 done
1100 12:44:40.070114 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 12:44:40.073533 PCI: 00:14.3 read_resources bus 0 link: 0
1102 12:44:40.080267 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 12:44:40.083615 PCI: 00:15.0 read_resources bus 0 link: 0
1104 12:44:40.090201 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 12:44:40.093746 PCI: 00:15.1 read_resources bus 0 link: 0
1106 12:44:40.100612 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 12:44:40.103250 PCI: 00:19.1 read_resources bus 0 link: 0
1108 12:44:40.110569 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 12:44:40.113823 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 12:44:40.120587 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 12:44:40.124039 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 12:44:40.130671 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 12:44:40.133524 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 12:44:40.140629 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 12:44:40.143532 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 12:44:40.150485 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 12:44:40.153424 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 12:44:40.156934 GENERIC: 0.0 read_resources bus 0 link: 0
1119 12:44:40.163768 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 12:44:40.166988 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 12:44:40.174179 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 12:44:40.177787 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 12:44:40.184542 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 12:44:40.187886 Root Device read_resources bus 0 link: 0 done
1125 12:44:40.191037 Done reading resources.
1126 12:44:40.197798 Show resources in subtree (Root Device)...After reading.
1127 12:44:40.201093 Root Device child on link 0 DOMAIN: 0000
1128 12:44:40.204578 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 12:44:40.214124 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 12:44:40.224198 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 12:44:40.227681 PCI: 00:00.0
1132 12:44:40.237752 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 12:44:40.244265 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 12:44:40.254208 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 12:44:40.263651 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 12:44:40.274342 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 12:44:40.283879 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 12:44:40.293883 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 12:44:40.300778 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 12:44:40.310183 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 12:44:40.320404 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 12:44:40.330523 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 12:44:40.340423 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 12:44:40.346784 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 12:44:40.356884 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 12:44:40.366889 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 12:44:40.376882 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 12:44:40.387133 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 12:44:40.396646 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 12:44:40.403307 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 12:44:40.413067 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 12:44:40.415929 PCI: 00:02.0
1153 12:44:40.426529 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:44:40.436747 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:44:40.446162 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:44:40.449890 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 12:44:40.459765 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 12:44:40.463858 GENERIC: 0.0
1159 12:44:40.464442 PCI: 00:05.0
1160 12:44:40.473291 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 12:44:40.479336 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 12:44:40.479785 GENERIC: 0.0
1163 12:44:40.482694 PCI: 00:08.0
1164 12:44:40.492657 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:44:40.493191 PCI: 00:0a.0
1166 12:44:40.495860 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 12:44:40.505704 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 12:44:40.512585 USB0 port 0 child on link 0 USB3 port 0
1169 12:44:40.513240 USB3 port 0
1170 12:44:40.515825 USB3 port 1
1171 12:44:40.516397 USB3 port 2
1172 12:44:40.519600 USB3 port 3
1173 12:44:40.522554 PCI: 00:14.0 child on link 0 USB0 port 0
1174 12:44:40.532411 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 12:44:40.539084 USB0 port 0 child on link 0 USB2 port 0
1176 12:44:40.539644 USB2 port 0
1177 12:44:40.542420 USB2 port 1
1178 12:44:40.542966 USB2 port 2
1179 12:44:40.545614 USB2 port 3
1180 12:44:40.546054 USB2 port 4
1181 12:44:40.549169 USB2 port 5
1182 12:44:40.549766 USB2 port 6
1183 12:44:40.552169 USB2 port 7
1184 12:44:40.552710 USB2 port 8
1185 12:44:40.555866 USB2 port 9
1186 12:44:40.556415 USB3 port 0
1187 12:44:40.559118 USB3 port 1
1188 12:44:40.559661 USB3 port 2
1189 12:44:40.562226 USB3 port 3
1190 12:44:40.565536 PCI: 00:14.2
1191 12:44:40.575489 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:44:40.585274 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 12:44:40.588547 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 12:44:40.598752 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 12:44:40.599355 GENERIC: 0.0
1196 12:44:40.605578 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 12:44:40.615516 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 12:44:40.616072 I2C: 00:1a
1199 12:44:40.619088 I2C: 00:31
1200 12:44:40.619636 I2C: 00:32
1201 12:44:40.621812 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 12:44:40.632191 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 12:44:40.634861 I2C: 00:10
1204 12:44:40.635318 PCI: 00:15.2
1205 12:44:40.645762 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:44:40.648978 PCI: 00:15.3
1207 12:44:40.658726 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 12:44:40.659283 PCI: 00:16.0
1209 12:44:40.668388 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:44:40.671757 PCI: 00:19.0
1211 12:44:40.675327 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 12:44:40.684945 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:44:40.688849 I2C: 00:15
1214 12:44:40.691873 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 12:44:40.701533 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 12:44:40.711477 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 12:44:40.718905 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 12:44:40.721814 GENERIC: 0.0
1219 12:44:40.722359 PCI: 01:00.0
1220 12:44:40.731938 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:44:40.741737 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 12:44:40.744750 PCI: 00:1e.0
1223 12:44:40.754829 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 12:44:40.757870 PCI: 00:1e.2 child on link 0 SPI: 00
1225 12:44:40.767984 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:44:40.771766 SPI: 00
1227 12:44:40.774758 PCI: 00:1e.3 child on link 0 SPI: 00
1228 12:44:40.784650 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 12:44:40.785200 SPI: 00
1230 12:44:40.791170 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 12:44:40.797969 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 12:44:40.800903 PNP: 0c09.0
1233 12:44:40.811054 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 12:44:40.814102 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 12:44:40.824272 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 12:44:40.831509 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 12:44:40.837307 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 12:44:40.837761 GENERIC: 0.0
1239 12:44:40.840795 GENERIC: 1.0
1240 12:44:40.841384 PCI: 00:1f.3
1241 12:44:40.850945 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 12:44:40.864336 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 12:44:40.864957 PCI: 00:1f.5
1244 12:44:40.874427 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 12:44:40.877525 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 12:44:40.878003 APIC: 00
1247 12:44:40.880974 APIC: 01
1248 12:44:40.881568 APIC: 07
1249 12:44:40.884193 APIC: 03
1250 12:44:40.884743 APIC: 04
1251 12:44:40.885100 APIC: 06
1252 12:44:40.887588 APIC: 02
1253 12:44:40.888135 APIC: 05
1254 12:44:40.894120 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 12:44:40.900784 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 12:44:40.907230 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 12:44:40.913591 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 12:44:40.916917 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 12:44:40.920754 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 12:44:40.930288 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 12:44:40.936948 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 12:44:40.943516 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 12:44:40.950426 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 12:44:40.957345 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 12:44:40.963977 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 12:44:40.974042 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 12:44:40.980353 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 12:44:40.983805 DOMAIN: 0000: Resource ranges:
1269 12:44:40.987178 * Base: 1000, Size: 800, Tag: 100
1270 12:44:40.990168 * Base: 1900, Size: e700, Tag: 100
1271 12:44:40.997148 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 12:44:41.003478 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 12:44:41.009899 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 12:44:41.016874 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 12:44:41.023551 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 12:44:41.033199 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 12:44:41.039876 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 12:44:41.046350 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 12:44:41.056584 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 12:44:41.063227 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 12:44:41.070144 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 12:44:41.079790 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 12:44:41.086632 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 12:44:41.092977 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 12:44:41.103292 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 12:44:41.109791 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 12:44:41.116039 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 12:44:41.126002 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 12:44:41.132786 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 12:44:41.139292 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 12:44:41.149024 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 12:44:41.155884 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 12:44:41.162534 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 12:44:41.172833 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 12:44:41.179204 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 12:44:41.182705 DOMAIN: 0000: Resource ranges:
1297 12:44:41.185879 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 12:44:41.192497 * Base: d0000000, Size: 28000000, Tag: 200
1299 12:44:41.195862 * Base: fa000000, Size: 1000000, Tag: 200
1300 12:44:41.199306 * Base: fb001000, Size: 2fff000, Tag: 200
1301 12:44:41.202302 * Base: fe010000, Size: 2e000, Tag: 200
1302 12:44:41.209314 * Base: fe03f000, Size: d41000, Tag: 200
1303 12:44:41.212358 * Base: fed88000, Size: 8000, Tag: 200
1304 12:44:41.215366 * Base: fed93000, Size: d000, Tag: 200
1305 12:44:41.218775 * Base: feda2000, Size: 1e000, Tag: 200
1306 12:44:41.225810 * Base: fede0000, Size: 1220000, Tag: 200
1307 12:44:41.228898 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 12:44:41.235202 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 12:44:41.242174 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 12:44:41.248922 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 12:44:41.255478 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 12:44:41.262209 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 12:44:41.268422 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 12:44:41.275762 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 12:44:41.282442 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 12:44:41.288696 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 12:44:41.295582 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 12:44:41.302191 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 12:44:41.308547 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 12:44:41.314984 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 12:44:41.322175 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 12:44:41.328503 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 12:44:41.335081 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 12:44:41.341978 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 12:44:41.348132 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 12:44:41.354700 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 12:44:41.361546 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 12:44:41.368337 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 12:44:41.374590 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 12:44:41.381670 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 12:44:41.391522 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 12:44:41.394923 PCI: 00:1d.0: Resource ranges:
1333 12:44:41.398370 * Base: 7fc00000, Size: 100000, Tag: 200
1334 12:44:41.404841 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 12:44:41.411626 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 12:44:41.421329 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 12:44:41.428038 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 12:44:41.431198 Root Device assign_resources, bus 0 link: 0
1339 12:44:41.437392 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 12:44:41.444443 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 12:44:41.454365 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 12:44:41.460586 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 12:44:41.466998 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 12:44:41.473962 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 12:44:41.477273 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 12:44:41.487994 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 12:44:41.494103 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 12:44:41.503848 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 12:44:41.507204 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 12:44:41.513724 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 12:44:41.520550 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 12:44:41.523863 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 12:44:41.530297 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 12:44:41.536716 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 12:44:41.546611 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 12:44:41.553415 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 12:44:41.560299 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 12:44:41.563680 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 12:44:41.573333 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 12:44:41.576501 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 12:44:41.579619 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 12:44:41.590007 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 12:44:41.592967 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 12:44:41.599677 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 12:44:41.606305 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 12:44:41.615918 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 12:44:41.622755 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 12:44:41.632963 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 12:44:41.635836 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 12:44:41.638902 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 12:44:41.648882 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 12:44:41.659983 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 12:44:41.668616 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 12:44:41.672011 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 12:44:41.678771 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 12:44:41.688500 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 12:44:41.691736 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 12:44:41.702095 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 12:44:41.705031 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 12:44:41.712033 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 12:44:41.718415 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 12:44:41.725251 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 12:44:41.728491 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 12:44:41.731958 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 12:44:41.738232 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 12:44:41.741589 LPC: Trying to open IO window from 800 size 1ff
1387 12:44:41.751929 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 12:44:41.758329 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 12:44:41.768273 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 12:44:41.771420 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 12:44:41.778526 Root Device assign_resources, bus 0 link: 0
1392 12:44:41.779087 Done setting resources.
1393 12:44:41.784596 Show resources in subtree (Root Device)...After assigning values.
1394 12:44:41.791431 Root Device child on link 0 DOMAIN: 0000
1395 12:44:41.794845 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 12:44:41.804611 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 12:44:41.814674 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 12:44:41.815218 PCI: 00:00.0
1399 12:44:41.824599 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 12:44:41.834397 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 12:44:41.844488 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 12:44:41.854592 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 12:44:41.861041 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 12:44:41.870826 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 12:44:41.880624 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 12:44:41.890923 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 12:44:41.900464 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 12:44:41.907259 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 12:44:41.917270 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 12:44:41.926876 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 12:44:41.937161 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 12:44:41.946898 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 12:44:41.956828 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 12:44:41.963795 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 12:44:41.973075 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 12:44:41.983134 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 12:44:41.993543 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 12:44:42.003258 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 12:44:42.003791 PCI: 00:02.0
1420 12:44:42.016287 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 12:44:42.026450 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 12:44:42.036528 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 12:44:42.039811 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 12:44:42.049987 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 12:44:42.053432 GENERIC: 0.0
1426 12:44:42.054016 PCI: 00:05.0
1427 12:44:42.063270 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 12:44:42.069961 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 12:44:42.070538 GENERIC: 0.0
1430 12:44:42.072734 PCI: 00:08.0
1431 12:44:42.083281 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 12:44:42.083874 PCI: 00:0a.0
1433 12:44:42.089730 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 12:44:42.100012 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 12:44:42.102444 USB0 port 0 child on link 0 USB3 port 0
1436 12:44:42.106139 USB3 port 0
1437 12:44:42.106685 USB3 port 1
1438 12:44:42.109501 USB3 port 2
1439 12:44:42.109944 USB3 port 3
1440 12:44:42.116266 PCI: 00:14.0 child on link 0 USB0 port 0
1441 12:44:42.125734 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 12:44:42.129792 USB0 port 0 child on link 0 USB2 port 0
1443 12:44:42.132963 USB2 port 0
1444 12:44:42.133556 USB2 port 1
1445 12:44:42.135874 USB2 port 2
1446 12:44:42.136313 USB2 port 3
1447 12:44:42.139418 USB2 port 4
1448 12:44:42.139961 USB2 port 5
1449 12:44:42.142449 USB2 port 6
1450 12:44:42.142892 USB2 port 7
1451 12:44:42.146021 USB2 port 8
1452 12:44:42.146478 USB2 port 9
1453 12:44:42.148794 USB3 port 0
1454 12:44:42.152610 USB3 port 1
1455 12:44:42.153154 USB3 port 2
1456 12:44:42.156089 USB3 port 3
1457 12:44:42.156630 PCI: 00:14.2
1458 12:44:42.165523 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 12:44:42.176106 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 12:44:42.182627 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 12:44:42.192162 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 12:44:42.192805 GENERIC: 0.0
1463 12:44:42.198974 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 12:44:42.209326 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 12:44:42.209877 I2C: 00:1a
1466 12:44:42.212160 I2C: 00:31
1467 12:44:42.212617 I2C: 00:32
1468 12:44:42.215294 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 12:44:42.228962 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 12:44:42.229601 I2C: 00:10
1471 12:44:42.232654 PCI: 00:15.2
1472 12:44:42.242239 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 12:44:42.242883 PCI: 00:15.3
1474 12:44:42.252188 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 12:44:42.255272 PCI: 00:16.0
1476 12:44:42.265792 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 12:44:42.266350 PCI: 00:19.0
1478 12:44:42.272331 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 12:44:42.282124 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 12:44:42.282672 I2C: 00:15
1481 12:44:42.288560 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 12:44:42.295205 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 12:44:42.308630 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 12:44:42.318630 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 12:44:42.321690 GENERIC: 0.0
1486 12:44:42.322134 PCI: 01:00.0
1487 12:44:42.332074 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 12:44:42.341982 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 12:44:42.344726 PCI: 00:1e.0
1490 12:44:42.355350 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 12:44:42.358375 PCI: 00:1e.2 child on link 0 SPI: 00
1492 12:44:42.371879 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 12:44:42.372479 SPI: 00
1494 12:44:42.375040 PCI: 00:1e.3 child on link 0 SPI: 00
1495 12:44:42.385086 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 12:44:42.388319 SPI: 00
1497 12:44:42.391786 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 12:44:42.401197 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 12:44:42.401836 PNP: 0c09.0
1500 12:44:42.411130 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 12:44:42.414423 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 12:44:42.424697 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 12:44:42.434436 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 12:44:42.438478 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 12:44:42.441297 GENERIC: 0.0
1506 12:44:42.441858 GENERIC: 1.0
1507 12:44:42.444720 PCI: 00:1f.3
1508 12:44:42.454431 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 12:44:42.464471 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 12:44:42.465028 PCI: 00:1f.5
1511 12:44:42.477675 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 12:44:42.482005 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 12:44:42.482596 APIC: 00
1514 12:44:42.485066 APIC: 01
1515 12:44:42.485694 APIC: 07
1516 12:44:42.486093 APIC: 03
1517 12:44:42.487329 APIC: 04
1518 12:44:42.487822 APIC: 06
1519 12:44:42.490983 APIC: 02
1520 12:44:42.491528 APIC: 05
1521 12:44:42.494094 Done allocating resources.
1522 12:44:42.501379 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1523 12:44:42.504457 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 12:44:42.510679 Configure GPIOs for I2S audio on UP4.
1525 12:44:42.517017 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 12:44:42.517532 Enabling resources...
1527 12:44:42.523829 PCI: 00:00.0 subsystem <- 8086/9a12
1528 12:44:42.524368 PCI: 00:00.0 cmd <- 06
1529 12:44:42.527201 PCI: 00:02.0 subsystem <- 8086/9a40
1530 12:44:42.530576 PCI: 00:02.0 cmd <- 03
1531 12:44:42.533800 PCI: 00:04.0 subsystem <- 8086/9a03
1532 12:44:42.537036 PCI: 00:04.0 cmd <- 02
1533 12:44:42.540759 PCI: 00:05.0 subsystem <- 8086/9a19
1534 12:44:42.543456 PCI: 00:05.0 cmd <- 02
1535 12:44:42.547412 PCI: 00:08.0 subsystem <- 8086/9a11
1536 12:44:42.550296 PCI: 00:08.0 cmd <- 06
1537 12:44:42.554037 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 12:44:42.556893 PCI: 00:0d.0 cmd <- 02
1539 12:44:42.560621 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 12:44:42.564032 PCI: 00:14.0 cmd <- 02
1541 12:44:42.566807 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 12:44:42.567256 PCI: 00:14.2 cmd <- 02
1543 12:44:42.573577 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 12:44:42.574122 PCI: 00:14.3 cmd <- 02
1545 12:44:42.576938 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 12:44:42.580540 PCI: 00:15.0 cmd <- 02
1547 12:44:42.584137 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 12:44:42.587088 PCI: 00:15.1 cmd <- 02
1549 12:44:42.590300 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 12:44:42.593455 PCI: 00:15.2 cmd <- 02
1551 12:44:42.596896 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 12:44:42.599993 PCI: 00:15.3 cmd <- 02
1553 12:44:42.603314 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 12:44:42.606872 PCI: 00:16.0 cmd <- 02
1555 12:44:42.610095 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 12:44:42.613895 PCI: 00:19.1 cmd <- 02
1557 12:44:42.616660 PCI: 00:1d.0 bridge ctrl <- 0013
1558 12:44:42.619584 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 12:44:42.620188 PCI: 00:1d.0 cmd <- 06
1560 12:44:42.626761 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 12:44:42.627317 PCI: 00:1e.0 cmd <- 06
1562 12:44:42.629643 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 12:44:42.633138 PCI: 00:1e.2 cmd <- 06
1564 12:44:42.636404 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 12:44:42.639847 PCI: 00:1e.3 cmd <- 02
1566 12:44:42.642868 PCI: 00:1f.0 subsystem <- 8086/a087
1567 12:44:42.646299 PCI: 00:1f.0 cmd <- 407
1568 12:44:42.649326 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 12:44:42.652809 PCI: 00:1f.3 cmd <- 02
1570 12:44:42.656200 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 12:44:42.659840 PCI: 00:1f.5 cmd <- 406
1572 12:44:42.663251 PCI: 01:00.0 cmd <- 02
1573 12:44:42.667189 done.
1574 12:44:42.671263 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 12:44:42.673754 Initializing devices...
1576 12:44:42.677107 Root Device init
1577 12:44:42.680702 Chrome EC: Set SMI mask to 0x0000000000000000
1578 12:44:42.687642 Chrome EC: clear events_b mask to 0x0000000000000000
1579 12:44:42.693986 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 12:44:42.697187 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 12:44:42.703953 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 12:44:42.710510 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 12:44:42.713731 fw_config match found: DB_USB=USB3_ACTIVE
1584 12:44:42.720500 Configure Right Type-C port orientation for retimer
1585 12:44:42.723424 Root Device init finished in 42 msecs
1586 12:44:42.726694 PCI: 00:00.0 init
1587 12:44:42.730524 CPU TDP = 9 Watts
1588 12:44:42.731068 CPU PL1 = 9 Watts
1589 12:44:42.733393 CPU PL2 = 40 Watts
1590 12:44:42.733839 CPU PL4 = 83 Watts
1591 12:44:42.736689 PCI: 00:00.0 init finished in 8 msecs
1592 12:44:42.740109 PCI: 00:02.0 init
1593 12:44:42.743381 GMA: Found VBT in CBFS
1594 12:44:42.746656 GMA: Found valid VBT in CBFS
1595 12:44:42.749946 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 12:44:42.760288 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 12:44:42.763460 PCI: 00:02.0 init finished in 18 msecs
1598 12:44:42.766896 PCI: 00:05.0 init
1599 12:44:42.769970 PCI: 00:05.0 init finished in 0 msecs
1600 12:44:42.770426 PCI: 00:08.0 init
1601 12:44:42.777320 PCI: 00:08.0 init finished in 0 msecs
1602 12:44:42.777885 PCI: 00:14.0 init
1603 12:44:42.783622 PCI: 00:14.0 init finished in 0 msecs
1604 12:44:42.784182 PCI: 00:14.2 init
1605 12:44:42.786769 PCI: 00:14.2 init finished in 0 msecs
1606 12:44:42.790241 PCI: 00:15.0 init
1607 12:44:42.793833 I2C bus 0 version 0x3230302a
1608 12:44:42.797136 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 12:44:42.800303 PCI: 00:15.0 init finished in 6 msecs
1610 12:44:42.803529 PCI: 00:15.1 init
1611 12:44:42.807150 I2C bus 1 version 0x3230302a
1612 12:44:42.809942 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 12:44:42.813765 PCI: 00:15.1 init finished in 6 msecs
1614 12:44:42.817088 PCI: 00:15.2 init
1615 12:44:42.820349 I2C bus 2 version 0x3230302a
1616 12:44:42.823609 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 12:44:42.826961 PCI: 00:15.2 init finished in 6 msecs
1618 12:44:42.827569 PCI: 00:15.3 init
1619 12:44:42.829987 I2C bus 3 version 0x3230302a
1620 12:44:42.833266 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 12:44:42.839917 PCI: 00:15.3 init finished in 6 msecs
1622 12:44:42.840476 PCI: 00:16.0 init
1623 12:44:42.842973 PCI: 00:16.0 init finished in 0 msecs
1624 12:44:42.846747 PCI: 00:19.1 init
1625 12:44:42.850214 I2C bus 5 version 0x3230302a
1626 12:44:42.853552 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 12:44:42.856808 PCI: 00:19.1 init finished in 6 msecs
1628 12:44:42.860463 PCI: 00:1d.0 init
1629 12:44:42.863579 Initializing PCH PCIe bridge.
1630 12:44:42.866733 PCI: 00:1d.0 init finished in 3 msecs
1631 12:44:42.870199 PCI: 00:1f.0 init
1632 12:44:42.873569 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 12:44:42.880289 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 12:44:42.880822 IOAPIC: ID = 0x02
1635 12:44:42.883973 IOAPIC: Dumping registers
1636 12:44:42.886870 reg 0x0000: 0x02000000
1637 12:44:42.887424 reg 0x0001: 0x00770020
1638 12:44:42.890711 reg 0x0002: 0x00000000
1639 12:44:42.893789 PCI: 00:1f.0 init finished in 21 msecs
1640 12:44:42.897279 PCI: 00:1f.2 init
1641 12:44:42.900614 Disabling ACPI via APMC.
1642 12:44:42.903876 APMC done.
1643 12:44:42.907163 PCI: 00:1f.2 init finished in 5 msecs
1644 12:44:42.918014 PCI: 01:00.0 init
1645 12:44:42.920664 PCI: 01:00.0 init finished in 0 msecs
1646 12:44:42.924719 PNP: 0c09.0 init
1647 12:44:42.927467 Google Chrome EC uptime: 8.260 seconds
1648 12:44:42.933963 Google Chrome AP resets since EC boot: 1
1649 12:44:42.937340 Google Chrome most recent AP reset causes:
1650 12:44:42.940613 0.451: 32775 shutdown: entering G3
1651 12:44:42.947209 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 12:44:42.950310 PNP: 0c09.0 init finished in 22 msecs
1653 12:44:42.956398 Devices initialized
1654 12:44:42.959601 Show all devs... After init.
1655 12:44:42.962802 Root Device: enabled 1
1656 12:44:42.963374 DOMAIN: 0000: enabled 1
1657 12:44:42.966230 CPU_CLUSTER: 0: enabled 1
1658 12:44:42.969189 PCI: 00:00.0: enabled 1
1659 12:44:42.972513 PCI: 00:02.0: enabled 1
1660 12:44:42.972954 PCI: 00:04.0: enabled 1
1661 12:44:42.975926 PCI: 00:05.0: enabled 1
1662 12:44:42.979536 PCI: 00:06.0: enabled 0
1663 12:44:42.982596 PCI: 00:07.0: enabled 0
1664 12:44:42.983134 PCI: 00:07.1: enabled 0
1665 12:44:42.986324 PCI: 00:07.2: enabled 0
1666 12:44:42.989197 PCI: 00:07.3: enabled 0
1667 12:44:42.992803 PCI: 00:08.0: enabled 1
1668 12:44:42.993392 PCI: 00:09.0: enabled 0
1669 12:44:42.996436 PCI: 00:0a.0: enabled 0
1670 12:44:42.999268 PCI: 00:0d.0: enabled 1
1671 12:44:43.002578 PCI: 00:0d.1: enabled 0
1672 12:44:43.003121 PCI: 00:0d.2: enabled 0
1673 12:44:43.006043 PCI: 00:0d.3: enabled 0
1674 12:44:43.009363 PCI: 00:0e.0: enabled 0
1675 12:44:43.009913 PCI: 00:10.2: enabled 1
1676 12:44:43.012791 PCI: 00:10.6: enabled 0
1677 12:44:43.015723 PCI: 00:10.7: enabled 0
1678 12:44:43.019186 PCI: 00:12.0: enabled 0
1679 12:44:43.019635 PCI: 00:12.6: enabled 0
1680 12:44:43.022750 PCI: 00:13.0: enabled 0
1681 12:44:43.026075 PCI: 00:14.0: enabled 1
1682 12:44:43.029189 PCI: 00:14.1: enabled 0
1683 12:44:43.029799 PCI: 00:14.2: enabled 1
1684 12:44:43.032842 PCI: 00:14.3: enabled 1
1685 12:44:43.035955 PCI: 00:15.0: enabled 1
1686 12:44:43.039839 PCI: 00:15.1: enabled 1
1687 12:44:43.040440 PCI: 00:15.2: enabled 1
1688 12:44:43.042867 PCI: 00:15.3: enabled 1
1689 12:44:43.045848 PCI: 00:16.0: enabled 1
1690 12:44:43.046447 PCI: 00:16.1: enabled 0
1691 12:44:43.048813 PCI: 00:16.2: enabled 0
1692 12:44:43.052690 PCI: 00:16.3: enabled 0
1693 12:44:43.055698 PCI: 00:16.4: enabled 0
1694 12:44:43.056149 PCI: 00:16.5: enabled 0
1695 12:44:43.059030 PCI: 00:17.0: enabled 0
1696 12:44:43.062071 PCI: 00:19.0: enabled 0
1697 12:44:43.066048 PCI: 00:19.1: enabled 1
1698 12:44:43.066614 PCI: 00:19.2: enabled 0
1699 12:44:43.069520 PCI: 00:1c.0: enabled 1
1700 12:44:43.072541 PCI: 00:1c.1: enabled 0
1701 12:44:43.076023 PCI: 00:1c.2: enabled 0
1702 12:44:43.076469 PCI: 00:1c.3: enabled 0
1703 12:44:43.079224 PCI: 00:1c.4: enabled 0
1704 12:44:43.082262 PCI: 00:1c.5: enabled 0
1705 12:44:43.085827 PCI: 00:1c.6: enabled 1
1706 12:44:43.086378 PCI: 00:1c.7: enabled 0
1707 12:44:43.089013 PCI: 00:1d.0: enabled 1
1708 12:44:43.092970 PCI: 00:1d.1: enabled 0
1709 12:44:43.093573 PCI: 00:1d.2: enabled 1
1710 12:44:43.095726 PCI: 00:1d.3: enabled 0
1711 12:44:43.098821 PCI: 00:1e.0: enabled 1
1712 12:44:43.102550 PCI: 00:1e.1: enabled 0
1713 12:44:43.103102 PCI: 00:1e.2: enabled 1
1714 12:44:43.105606 PCI: 00:1e.3: enabled 1
1715 12:44:43.108642 PCI: 00:1f.0: enabled 1
1716 12:44:43.112494 PCI: 00:1f.1: enabled 0
1717 12:44:43.113050 PCI: 00:1f.2: enabled 1
1718 12:44:43.115410 PCI: 00:1f.3: enabled 1
1719 12:44:43.118380 PCI: 00:1f.4: enabled 0
1720 12:44:43.122036 PCI: 00:1f.5: enabled 1
1721 12:44:43.122480 PCI: 00:1f.6: enabled 0
1722 12:44:43.125364 PCI: 00:1f.7: enabled 0
1723 12:44:43.128801 APIC: 00: enabled 1
1724 12:44:43.129397 GENERIC: 0.0: enabled 1
1725 12:44:43.131957 GENERIC: 0.0: enabled 1
1726 12:44:43.135236 GENERIC: 1.0: enabled 1
1727 12:44:43.138635 GENERIC: 0.0: enabled 1
1728 12:44:43.139190 GENERIC: 1.0: enabled 1
1729 12:44:43.142169 USB0 port 0: enabled 1
1730 12:44:43.145661 GENERIC: 0.0: enabled 1
1731 12:44:43.146222 USB0 port 0: enabled 1
1732 12:44:43.148807 GENERIC: 0.0: enabled 1
1733 12:44:43.151735 I2C: 00:1a: enabled 1
1734 12:44:43.155817 I2C: 00:31: enabled 1
1735 12:44:43.156373 I2C: 00:32: enabled 1
1736 12:44:43.158491 I2C: 00:10: enabled 1
1737 12:44:43.161647 I2C: 00:15: enabled 1
1738 12:44:43.162088 GENERIC: 0.0: enabled 0
1739 12:44:43.165404 GENERIC: 1.0: enabled 0
1740 12:44:43.168366 GENERIC: 0.0: enabled 1
1741 12:44:43.168978 SPI: 00: enabled 1
1742 12:44:43.171669 SPI: 00: enabled 1
1743 12:44:43.174977 PNP: 0c09.0: enabled 1
1744 12:44:43.175670 GENERIC: 0.0: enabled 1
1745 12:44:43.178860 USB3 port 0: enabled 1
1746 12:44:43.181816 USB3 port 1: enabled 1
1747 12:44:43.184920 USB3 port 2: enabled 0
1748 12:44:43.185431 USB3 port 3: enabled 0
1749 12:44:43.188346 USB2 port 0: enabled 0
1750 12:44:43.191805 USB2 port 1: enabled 1
1751 12:44:43.192358 USB2 port 2: enabled 1
1752 12:44:43.194993 USB2 port 3: enabled 0
1753 12:44:43.198538 USB2 port 4: enabled 1
1754 12:44:43.199089 USB2 port 5: enabled 0
1755 12:44:43.201855 USB2 port 6: enabled 0
1756 12:44:43.205339 USB2 port 7: enabled 0
1757 12:44:43.208729 USB2 port 8: enabled 0
1758 12:44:43.209324 USB2 port 9: enabled 0
1759 12:44:43.212156 USB3 port 0: enabled 0
1760 12:44:43.215030 USB3 port 1: enabled 1
1761 12:44:43.215579 USB3 port 2: enabled 0
1762 12:44:43.218242 USB3 port 3: enabled 0
1763 12:44:43.221396 GENERIC: 0.0: enabled 1
1764 12:44:43.225305 GENERIC: 1.0: enabled 1
1765 12:44:43.225854 APIC: 01: enabled 1
1766 12:44:43.228163 APIC: 07: enabled 1
1767 12:44:43.228711 APIC: 03: enabled 1
1768 12:44:43.231909 APIC: 04: enabled 1
1769 12:44:43.235133 APIC: 06: enabled 1
1770 12:44:43.235685 APIC: 02: enabled 1
1771 12:44:43.238410 APIC: 05: enabled 1
1772 12:44:43.241668 PCI: 01:00.0: enabled 1
1773 12:44:43.245039 BS: BS_DEV_INIT run times (exec / console): 28 / 540 ms
1774 12:44:43.251874 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 12:44:43.255140 ELOG: NV offset 0xf30000 size 0x1000
1776 12:44:43.261136 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 12:44:43.268062 ELOG: Event(17) added with size 13 at 2023-03-22 12:44:43 UTC
1778 12:44:43.274524 ELOG: Event(92) added with size 9 at 2023-03-22 12:44:43 UTC
1779 12:44:43.281014 ELOG: Event(93) added with size 9 at 2023-03-22 12:44:43 UTC
1780 12:44:43.287895 ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:43 UTC
1781 12:44:43.294326 ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:43 UTC
1782 12:44:43.301368 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 12:44:43.307564 ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:43 UTC
1784 12:44:43.314449 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 12:44:43.320723 ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:43 UTC
1786 12:44:43.324462 elog_add_boot_reason: Logged dev mode boot
1787 12:44:43.330637 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1788 12:44:43.331191 Finalize devices...
1789 12:44:43.334216 Devices finalized
1790 12:44:43.340882 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 12:44:43.344232 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 12:44:43.350462 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 12:44:43.353594 ME: HFSTS1 : 0x80030055
1794 12:44:43.361021 ME: HFSTS2 : 0x30280116
1795 12:44:43.363796 ME: HFSTS3 : 0x00000050
1796 12:44:43.367982 ME: HFSTS4 : 0x00004000
1797 12:44:43.373668 ME: HFSTS5 : 0x00000000
1798 12:44:43.377439 ME: HFSTS6 : 0x40400006
1799 12:44:43.380539 ME: Manufacturing Mode : YES
1800 12:44:43.383557 ME: SPI Protection Mode Enabled : NO
1801 12:44:43.390404 ME: FW Partition Table : OK
1802 12:44:43.393371 ME: Bringup Loader Failure : NO
1803 12:44:43.397549 ME: Firmware Init Complete : NO
1804 12:44:43.400287 ME: Boot Options Present : NO
1805 12:44:43.403858 ME: Update In Progress : NO
1806 12:44:43.406781 ME: D0i3 Support : YES
1807 12:44:43.410634 ME: Low Power State Enabled : NO
1808 12:44:43.413732 ME: CPU Replaced : YES
1809 12:44:43.419972 ME: CPU Replacement Valid : YES
1810 12:44:43.423596 ME: Current Working State : 5
1811 12:44:43.427399 ME: Current Operation State : 1
1812 12:44:43.430298 ME: Current Operation Mode : 3
1813 12:44:43.433750 ME: Error Code : 0
1814 12:44:43.437492 ME: Enhanced Debug Mode : NO
1815 12:44:43.440566 ME: CPU Debug Disabled : YES
1816 12:44:43.443349 ME: TXT Support : NO
1817 12:44:43.449731 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 12:44:43.456946 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 12:44:43.460084 CBFS: 'fallback/slic' not found.
1820 12:44:43.466938 ACPI: Writing ACPI tables at 76b01000.
1821 12:44:43.467499 ACPI: * FACS
1822 12:44:43.469711 ACPI: * DSDT
1823 12:44:43.473485 Ramoops buffer: 0x100000@0x76a00000.
1824 12:44:43.476480 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 12:44:43.482988 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 12:44:43.486333 Google Chrome EC: version:
1827 12:44:43.489709 ro: voema_v2.0.10114-a447f03e46
1828 12:44:43.492825 rw: voema_v2.0.10114-a447f03e46
1829 12:44:43.493346 running image: 2
1830 12:44:43.499550 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 12:44:43.504061 ACPI: * FADT
1832 12:44:43.504601 SCI is IRQ9
1833 12:44:43.510707 ACPI: added table 1/32, length now 40
1834 12:44:43.511307 ACPI: * SSDT
1835 12:44:43.514487 Found 1 CPU(s) with 8 core(s) each.
1836 12:44:43.520490 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 12:44:43.523868 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 12:44:43.527424 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 12:44:43.530714 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 12:44:43.537440 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 12:44:43.544455 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 12:44:43.547621 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 12:44:43.554275 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 12:44:43.560590 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 12:44:43.563882 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 12:44:43.570465 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 12:44:43.573550 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 12:44:43.580705 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 12:44:43.583380 PS2K: Passing 80 keymaps to kernel
1850 12:44:43.591078 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 12:44:43.596784 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 12:44:43.603820 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 12:44:43.610148 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 12:44:43.616750 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 12:44:43.623333 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 12:44:43.629719 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 12:44:43.637025 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 12:44:43.639977 ACPI: added table 2/32, length now 44
1859 12:44:43.640591 ACPI: * MCFG
1860 12:44:43.646512 ACPI: added table 3/32, length now 48
1861 12:44:43.647125 ACPI: * TPM2
1862 12:44:43.650183 TPM2 log created at 0x769f0000
1863 12:44:43.653363 ACPI: added table 4/32, length now 52
1864 12:44:43.656513 ACPI: * MADT
1865 12:44:43.657058 SCI is IRQ9
1866 12:44:43.660101 ACPI: added table 5/32, length now 56
1867 12:44:43.663472 current = 76b09850
1868 12:44:43.664015 ACPI: * DMAR
1869 12:44:43.666537 ACPI: added table 6/32, length now 60
1870 12:44:43.673578 ACPI: added table 7/32, length now 64
1871 12:44:43.674117 ACPI: * HPET
1872 12:44:43.676433 ACPI: added table 8/32, length now 68
1873 12:44:43.680078 ACPI: done.
1874 12:44:43.680666 ACPI tables: 35216 bytes.
1875 12:44:43.682956 smbios_write_tables: 769ef000
1876 12:44:43.686346 EC returned error result code 3
1877 12:44:43.689645 Couldn't obtain OEM name from CBI
1878 12:44:43.693904 Create SMBIOS type 16
1879 12:44:43.697050 Create SMBIOS type 17
1880 12:44:43.700404 GENERIC: 0.0 (WIFI Device)
1881 12:44:43.704081 SMBIOS tables: 1734 bytes.
1882 12:44:43.707744 Writing table forward entry at 0x00000500
1883 12:44:43.713585 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 12:44:43.716757 Writing coreboot table at 0x76b25000
1885 12:44:43.723765 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 12:44:43.727012 1. 0000000000001000-000000000009ffff: RAM
1887 12:44:43.730199 2. 00000000000a0000-00000000000fffff: RESERVED
1888 12:44:43.737003 3. 0000000000100000-00000000769eefff: RAM
1889 12:44:43.740124 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 12:44:43.746792 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 12:44:43.753325 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 12:44:43.757191 7. 0000000077000000-000000007fbfffff: RESERVED
1893 12:44:43.763654 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 12:44:43.767104 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 12:44:43.770051 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 12:44:43.776404 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 12:44:43.780762 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 12:44:43.786973 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 12:44:43.789744 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 12:44:43.796692 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 12:44:43.800088 16. 0000000100000000-00000004803fffff: RAM
1902 12:44:43.803756 Passing 4 GPIOs to payload:
1903 12:44:43.806439 NAME | PORT | POLARITY | VALUE
1904 12:44:43.813060 lid | undefined | high | high
1905 12:44:43.819986 power | undefined | high | low
1906 12:44:43.823418 oprom | undefined | high | low
1907 12:44:43.829913 EC in RW | 0x000000e5 | high | high
1908 12:44:43.836288 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1909 12:44:43.836760 coreboot table: 1576 bytes.
1910 12:44:43.843027 IMD ROOT 0. 0x76fff000 0x00001000
1911 12:44:43.846342 IMD SMALL 1. 0x76ffe000 0x00001000
1912 12:44:43.849790 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 12:44:43.853184 VPD 3. 0x76c4d000 0x00000367
1914 12:44:43.856355 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 12:44:43.860022 CONSOLE 5. 0x76c2c000 0x00020000
1916 12:44:43.863376 FMAP 6. 0x76c2b000 0x00000578
1917 12:44:43.866427 TIME STAMP 7. 0x76c2a000 0x00000910
1918 12:44:43.873059 VBOOT WORK 8. 0x76c16000 0x00014000
1919 12:44:43.876834 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 12:44:43.879524 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 12:44:43.882734 RAMSTAGE 11. 0x76b97000 0x00073000
1922 12:44:43.886223 REFCODE 12. 0x76b42000 0x00055000
1923 12:44:43.889195 SMM BACKUP 13. 0x76b32000 0x00010000
1924 12:44:43.892925 4f444749 14. 0x76b30000 0x00002000
1925 12:44:43.895969 EXT VBT15. 0x76b2d000 0x0000219f
1926 12:44:43.899379 COREBOOT 16. 0x76b25000 0x00008000
1927 12:44:43.906644 ACPI 17. 0x76b01000 0x00024000
1928 12:44:43.909556 ACPI GNVS 18. 0x76b00000 0x00001000
1929 12:44:43.912892 RAMOOPS 19. 0x76a00000 0x00100000
1930 12:44:43.916238 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 12:44:43.919297 SMBIOS 21. 0x769ef000 0x00000800
1932 12:44:43.922364 IMD small region:
1933 12:44:43.926337 IMD ROOT 0. 0x76ffec00 0x00000400
1934 12:44:43.929358 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 12:44:43.932546 POWER STATE 2. 0x76ffeb80 0x00000044
1936 12:44:43.935988 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 12:44:43.942901 MEM INFO 4. 0x76ffe980 0x000001e0
1938 12:44:43.945713 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1939 12:44:43.949347 MTRR: Physical address space:
1940 12:44:43.955722 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 12:44:43.962774 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 12:44:43.969308 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 12:44:43.975885 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 12:44:43.982424 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 12:44:43.989021 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 12:44:43.992656 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 12:44:43.999119 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 12:44:44.002479 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 12:44:44.005679 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 12:44:44.008748 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 12:44:44.015449 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 12:44:44.018937 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 12:44:44.021899 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 12:44:44.025930 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 12:44:44.032362 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 12:44:44.035872 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 12:44:44.038992 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 12:44:44.043341 call enable_fixed_mtrr()
1959 12:44:44.046020 CPU physical address size: 39 bits
1960 12:44:44.053184 MTRR: default type WB/UC MTRR counts: 6/7.
1961 12:44:44.056036 MTRR: WB selected as default type.
1962 12:44:44.062883 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 12:44:44.065771 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 12:44:44.073488 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 12:44:44.079590 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 12:44:44.086167 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 12:44:44.092836 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 12:44:44.099581 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 12:44:44.102871 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 12:44:44.106146 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 12:44:44.110185 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 12:44:44.116396 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 12:44:44.119783 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 12:44:44.123152 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 12:44:44.126600 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 12:44:44.133068 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 12:44:44.136355 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 12:44:44.139445 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 12:44:44.139927
1980 12:44:44.144435 MTRR check
1981 12:44:44.147452 call enable_fixed_mtrr()
1982 12:44:44.150518 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 12:44:44.153789 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 12:44:44.156959 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 12:44:44.164124 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 12:44:44.167233 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 12:44:44.170426 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 12:44:44.173396 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 12:44:44.177026 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 12:44:44.183795 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 12:44:44.186907 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 12:44:44.190601 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 12:44:44.193753 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 12:44:44.202358 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 12:44:44.202910 call enable_fixed_mtrr()
1996 12:44:44.208743 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 12:44:44.212649 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 12:44:44.215517 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 12:44:44.219178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 12:44:44.225974 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 12:44:44.229135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 12:44:44.232255 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 12:44:44.235377 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 12:44:44.242351 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 12:44:44.245457 CPU physical address size: 39 bits
2006 12:44:44.250304 call enable_fixed_mtrr()
2007 12:44:44.253239 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:44:44.260245 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 12:44:44.263475 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 12:44:44.266803 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 12:44:44.270072 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 12:44:44.276781 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 12:44:44.280211 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 12:44:44.283452 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 12:44:44.287385 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 12:44:44.293840 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 12:44:44.296712 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 12:44:44.299873 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 12:44:44.307286 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 12:44:44.307864 call enable_fixed_mtrr()
2021 12:44:44.314017 Fixed MTRRs : CPU physical address size: 39 bits
2022 12:44:44.317629 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 12:44:44.321018 CPU physical address size: 39 bits
2024 12:44:44.329356 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 12:44:44.332087 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 12:44:44.336019 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 12:44:44.339466 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 12:44:44.345956 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 12:44:44.349142 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 12:44:44.352120 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 12:44:44.355366 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 12:44:44.358562 Enabled
2033 12:44:44.362214 CPU physical address size: 39 bits
2034 12:44:44.368621 Variable MTRRs: MTRR: Fixed MSR 0x250 0x0606060606060606
2035 12:44:44.371756 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 12:44:44.375515 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 12:44:44.381915 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 12:44:44.385435 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 12:44:44.388499 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 12:44:44.392363 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 12:44:44.398663 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 12:44:44.402355 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 12:44:44.405552 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 12:44:44.408731 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 12:44:44.414897 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 12:44:44.418697 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 12:44:44.421527 call enable_fixed_mtrr()
2048 12:44:44.425098 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 12:44:44.431919 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 12:44:44.435458 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 12:44:44.438482 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 12:44:44.441850 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 12:44:44.448626 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 12:44:44.451775 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 12:44:44.455140 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 12:44:44.458046 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 12:44:44.463551 CPU physical address size: 39 bits
2058 12:44:44.469796 call enable_fixed_mtrr()
2059 12:44:44.470343 Enabled
2060 12:44:44.470699
2061 12:44:44.473173 call enable_fixed_mtrr()
2062 12:44:44.476774 CPU physical address size: 39 bits
2063 12:44:44.483471 BS: BS_WRITE_TABLES exit times (exec / console): 370 / 154 ms
2064 12:44:44.487060 CPU physical address size: 39 bits
2065 12:44:44.490216 Checking cr50 for pending updates
2066 12:44:44.497352 Reading cr50 TPM mode
2067 12:44:44.507335 BS: BS_PAYLOAD_LOAD entry times (exec / console): 13 / 6 ms
2068 12:44:44.517613 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2069 12:44:44.520350 Checking segment from ROM address 0xffc02b38
2070 12:44:44.524104 Checking segment from ROM address 0xffc02b54
2071 12:44:44.530672 Loading segment from ROM address 0xffc02b38
2072 12:44:44.531226 code (compression=0)
2073 12:44:44.540641 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 12:44:44.550290 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 12:44:44.550863 it's not compressed!
2076 12:44:44.700156 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 12:44:44.707013 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 12:44:44.713672 Loading segment from ROM address 0xffc02b54
2079 12:44:44.717272 Entry Point 0x30000000
2080 12:44:44.717878 Loaded segments
2081 12:44:44.723363 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2082 12:44:44.769181 Finalizing chipset.
2083 12:44:44.772572 Finalizing SMM.
2084 12:44:44.773061 APMC done.
2085 12:44:44.778780 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 12:44:44.782368 mp_park_aps done after 0 msecs.
2087 12:44:44.785746 Jumping to boot code at 0x30000000(0x76b25000)
2088 12:44:44.795793 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 12:44:44.796388
2090 12:44:44.796809
2091 12:44:44.798989
2092 12:44:44.799553 Starting depthcharge on Voema...
2093 12:44:44.800782 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2094 12:44:44.801391 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2095 12:44:44.801875 Setting prompt string to ['volteer:']
2096 12:44:44.802330 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2097 12:44:44.803078
2098 12:44:44.808755 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 12:44:44.809342
2100 12:44:44.815968 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 12:44:44.816563
2102 12:44:44.821849 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 12:44:44.822305
2104 12:44:44.825450 Failed to find eMMC card reader
2105 12:44:44.825993
2106 12:44:44.826349 Wipe memory regions:
2107 12:44:44.829070
2108 12:44:44.832425 [0x00000000001000, 0x000000000a0000)
2109 12:44:44.832986
2110 12:44:44.834965 [0x00000000100000, 0x00000030000000)
2111 12:44:44.874137
2112 12:44:44.877800 [0x00000032662db0, 0x000000769ef000)
2113 12:44:44.932247
2114 12:44:44.935349 [0x00000100000000, 0x00000480400000)
2115 12:44:45.613624
2116 12:44:45.616904 ec_init: CrosEC protocol v3 supported (256, 256)
2117 12:44:46.048013
2118 12:44:46.048602 R8152: Initializing
2119 12:44:46.048995
2120 12:44:46.051715 Version 6 (ocp_data = 5c30)
2121 12:44:46.052347
2122 12:44:46.055287 R8152: Done initializing
2123 12:44:46.055882
2124 12:44:46.057575 Adding net device
2125 12:44:46.359084
2126 12:44:46.362668 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 12:44:46.363267
2128 12:44:46.363726
2129 12:44:46.364261
2130 12:44:46.365898 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 12:44:46.467979 volteer: tftpboot 192.168.201.1 9729694/tftp-deploy-qimqeo5c/kernel/bzImage 9729694/tftp-deploy-qimqeo5c/kernel/cmdline 9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
2133 12:44:46.468707 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 12:44:46.469173 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 12:44:46.473433 tftpboot 192.168.201.1 9729694/tftp-deploy-qimqeo5c/kernel/bzImoy-qimqeo5c/kernel/cmdline 9729694/tftp-deploy-qimqeo5c/ramdisk/ramdisk.cpio.gz
2136 12:44:46.473898
2137 12:44:46.474307 Waiting for link
2138 12:44:46.677489
2139 12:44:46.678085 done.
2140 12:44:46.678527
2141 12:44:46.679264 MAC: 00:24:32:30:77:d1
2142 12:44:46.679994
2143 12:44:46.680799 Sending DHCP discover... done.
2144 12:44:46.681263
2145 12:44:46.683624 Waiting for reply... done.
2146 12:44:46.684157
2147 12:44:46.686742 Sending DHCP request... done.
2148 12:44:46.687186
2149 12:44:46.694623 Waiting for reply... done.
2150 12:44:46.695064
2151 12:44:46.695418 My ip is 192.168.201.13
2152 12:44:46.695803
2153 12:44:46.697344 The DHCP server ip is 192.168.201.1
2154 12:44:46.700528
2155 12:44:46.704186 TFTP server IP predefined by user: 192.168.201.1
2156 12:44:46.704778
2157 12:44:46.710763 Bootfile predefined by user: 9729694/tftp-deploy-qimqeo5c/kernel/bzImage
2158 12:44:46.711315
2159 12:44:46.714206 Sending tftp read request... done.
2160 12:44:46.714780
2161 12:44:46.721113 Waiting for the transfer...
2162 12:44:46.721715
2163 12:44:47.426337 00000000 ################################################################
2164 12:44:47.426887
2165 12:44:48.126107 00080000 ################################################################
2166 12:44:48.126670
2167 12:44:48.842435 00100000 ################################################################
2168 12:44:48.842977
2169 12:44:49.557158 00180000 ################################################################
2170 12:44:49.557774
2171 12:44:50.278613 00200000 ################################################################
2172 12:44:50.279233
2173 12:44:50.991196 00280000 ################################################################
2174 12:44:50.991808
2175 12:44:51.710516 00300000 ################################################################
2176 12:44:51.711112
2177 12:44:52.416648 00380000 ################################################################
2178 12:44:52.417293
2179 12:44:53.128424 00400000 ################################################################
2180 12:44:53.128964
2181 12:44:53.818096 00480000 ################################################################
2182 12:44:53.818630
2183 12:44:54.516459 00500000 ################################################################
2184 12:44:54.516996
2185 12:44:55.195416 00580000 ################################################################
2186 12:44:55.195959
2187 12:44:55.905767 00600000 ################################################################
2188 12:44:55.906333
2189 12:44:56.617258 00680000 ################################################################
2190 12:44:56.617815
2191 12:44:57.297846 00700000 ################################################################
2192 12:44:57.298376
2193 12:44:57.988297 00780000 ################################################################
2194 12:44:57.988875
2195 12:44:58.676805 00800000 ################################################################
2196 12:44:58.677377
2197 12:44:59.381862 00880000 ################################################################
2198 12:44:59.382417
2199 12:45:00.091492 00900000 ################################################################
2200 12:45:00.092047
2201 12:45:00.806114 00980000 ################################################################
2202 12:45:00.806729
2203 12:45:01.519970 00a00000 ################################################################
2204 12:45:01.520535
2205 12:45:02.249769 00a80000 ################################################################
2206 12:45:02.250314
2207 12:45:02.407551 00b00000 ############## done.
2208 12:45:02.408109
2209 12:45:02.410576 The bootfile was 11646080 bytes long.
2210 12:45:02.411142
2211 12:45:02.413579 Sending tftp read request... done.
2212 12:45:02.414022
2213 12:45:02.417332 Waiting for the transfer...
2214 12:45:02.417902
2215 12:45:03.138436 00000000 ################################################################
2216 12:45:03.139049
2217 12:45:03.868669 00080000 ################################################################
2218 12:45:03.869269
2219 12:45:04.586580 00100000 ################################################################
2220 12:45:04.587151
2221 12:45:05.303282 00180000 ################################################################
2222 12:45:05.303831
2223 12:45:06.012374 00200000 ################################################################
2224 12:45:06.012979
2225 12:45:06.734527 00280000 ################################################################
2226 12:45:06.735085
2227 12:45:07.454236 00300000 ################################################################
2228 12:45:07.454834
2229 12:45:08.172773 00380000 ################################################################
2230 12:45:08.173381
2231 12:45:08.898268 00400000 ################################################################
2232 12:45:08.898822
2233 12:45:09.611544 00480000 ################################################################
2234 12:45:09.612095
2235 12:45:10.334935 00500000 ################################################################
2236 12:45:10.335544
2237 12:45:11.059857 00580000 ################################################################
2238 12:45:11.060455
2239 12:45:11.791537 00600000 ################################################################
2240 12:45:11.792144
2241 12:45:12.501625 00680000 ################################################################
2242 12:45:12.502220
2243 12:45:13.221674 00700000 ################################################################
2244 12:45:13.222234
2245 12:45:13.947195 00780000 ################################################################
2246 12:45:13.947782
2247 12:45:14.665355 00800000 ################################################################
2248 12:45:14.665940
2249 12:45:15.108341 00880000 ######################################## done.
2250 12:45:15.108896
2251 12:45:15.111723 Sending tftp read request... done.
2252 12:45:15.112176
2253 12:45:15.115197 Waiting for the transfer...
2254 12:45:15.115786
2255 12:45:15.116155 00000000 # done.
2256 12:45:15.116503
2257 12:45:15.124979 Command line loaded dynamically from TFTP file: 9729694/tftp-deploy-qimqeo5c/kernel/cmdline
2258 12:45:15.125475
2259 12:45:15.138044 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2260 12:45:15.144383
2261 12:45:15.147992 Shutting down all USB controllers.
2262 12:45:15.148547
2263 12:45:15.148906 Removing current net device
2264 12:45:15.149314
2265 12:45:15.150518 Finalizing coreboot
2266 12:45:15.150900
2267 12:45:15.157147 Exiting depthcharge with code 4 at timestamp: 38951431
2268 12:45:15.157754
2269 12:45:15.158114
2270 12:45:15.158446 Starting kernel ...
2271 12:45:15.158767
2272 12:45:15.159084
2273 12:45:15.160390 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
2274 12:45:15.160901 start: 2.2.5 auto-login-action (timeout 00:04:14) [common]
2275 12:45:15.161322 Setting prompt string to ['Linux version [0-9]']
2276 12:45:15.161683 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 12:45:15.162045 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2279 12:49:29.162748 end: 2.2.5 auto-login-action (duration 00:04:14) [common]
2281 12:49:29.164067 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 254 seconds'
2283 12:49:29.165272 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2286 12:49:29.167296 end: 2 depthcharge-action (duration 00:05:00) [common]
2288 12:49:29.168760 Cleaning after the job
2289 12:49:29.169314 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/ramdisk
2290 12:49:29.172628 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/kernel
2291 12:49:29.176473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729694/tftp-deploy-qimqeo5c/modules
2292 12:49:29.178516 start: 5.1 power-off (timeout 00:00:30) [common]
2293 12:49:29.179492 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2294 12:49:29.286377 >> Command sent successfully.
2295 12:49:29.288759 Returned 0 in 0 seconds
2296 12:49:29.389360 end: 5.1 power-off (duration 00:00:00) [common]
2298 12:49:29.389748 start: 5.2 read-feedback (timeout 00:10:00) [common]
2299 12:49:29.390044 Listened to connection for namespace 'common' for up to 1s
2300 12:49:30.393463 Finalising connection for namespace 'common'
2301 12:49:30.394098 Disconnecting from shell: Finalise
2302 12:49:30.394506
2303 12:49:30.495847 end: 5.2 read-feedback (duration 00:00:01) [common]
2304 12:49:30.496455 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729694
2305 12:49:30.525523 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729694
2306 12:49:30.526184 JobError: Your job cannot terminate cleanly.