Boot log: dell-latitude-5400-8665U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:09.698600 lava-dispatcher, installed at version: 2023.01
2 12:44:09.698810 start: 0 validate
3 12:44:09.698951 Start time: 2023-03-22 12:44:09.698945+00:00 (UTC)
4 12:44:09.699097 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:09.699239 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:09.701787 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:09.701931 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:26.213816 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:26.214508 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:26.218552 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:26.219248 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:27.229399 validate duration: 17.53
14 12:44:27.229807 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:27.229993 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:27.230131 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:27.230277 Not decompressing ramdisk as can be used compressed.
18 12:44:27.230375 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 12:44:27.230481 saving as /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/ramdisk/initrd.cpio.gz
20 12:44:27.230551 total size: 5432123 (5MB)
21 12:44:27.518032 progress 0% (0MB)
22 12:44:27.520824 progress 5% (0MB)
23 12:44:27.523324 progress 10% (0MB)
24 12:44:27.525840 progress 15% (0MB)
25 12:44:27.528525 progress 20% (1MB)
26 12:44:27.530841 progress 25% (1MB)
27 12:44:27.533334 progress 30% (1MB)
28 12:44:27.535980 progress 35% (1MB)
29 12:44:27.538331 progress 40% (2MB)
30 12:44:27.540635 progress 45% (2MB)
31 12:44:27.542968 progress 50% (2MB)
32 12:44:27.545653 progress 55% (2MB)
33 12:44:27.548016 progress 60% (3MB)
34 12:44:27.550367 progress 65% (3MB)
35 12:44:27.552944 progress 70% (3MB)
36 12:44:27.555424 progress 75% (3MB)
37 12:44:27.557741 progress 80% (4MB)
38 12:44:27.559985 progress 85% (4MB)
39 12:44:27.562496 progress 90% (4MB)
40 12:44:27.564776 progress 95% (4MB)
41 12:44:27.567192 progress 100% (5MB)
42 12:44:27.567426 5MB downloaded in 0.34s (15.38MB/s)
43 12:44:27.567601 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:27.567879 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:27.567980 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:27.568084 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:27.568211 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:27.568290 saving as /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/kernel/bzImage
50 12:44:27.568363 total size: 11646080 (11MB)
51 12:44:27.568434 No compression specified
52 12:44:27.569415 progress 0% (0MB)
53 12:44:27.572534 progress 5% (0MB)
54 12:44:27.575761 progress 10% (1MB)
55 12:44:27.578986 progress 15% (1MB)
56 12:44:27.582228 progress 20% (2MB)
57 12:44:27.585289 progress 25% (2MB)
58 12:44:27.588532 progress 30% (3MB)
59 12:44:27.591758 progress 35% (3MB)
60 12:44:27.594980 progress 40% (4MB)
61 12:44:27.598036 progress 45% (5MB)
62 12:44:27.601331 progress 50% (5MB)
63 12:44:27.604581 progress 55% (6MB)
64 12:44:27.607845 progress 60% (6MB)
65 12:44:27.611024 progress 65% (7MB)
66 12:44:27.614017 progress 70% (7MB)
67 12:44:27.617169 progress 75% (8MB)
68 12:44:27.620367 progress 80% (8MB)
69 12:44:27.623560 progress 85% (9MB)
70 12:44:27.626573 progress 90% (10MB)
71 12:44:27.629993 progress 95% (10MB)
72 12:44:27.633361 progress 100% (11MB)
73 12:44:27.633593 11MB downloaded in 0.07s (170.28MB/s)
74 12:44:27.633787 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:27.634091 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:27.634210 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:27.634326 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:27.634467 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 12:44:27.634552 saving as /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/nfsrootfs/full.rootfs.tar
81 12:44:27.634648 total size: 133351768 (127MB)
82 12:44:27.634738 Using unxz to decompress xz
83 12:44:27.638408 progress 0% (0MB)
84 12:44:28.035307 progress 5% (6MB)
85 12:44:28.452741 progress 10% (12MB)
86 12:44:28.782923 progress 15% (19MB)
87 12:44:29.007108 progress 20% (25MB)
88 12:44:29.341160 progress 25% (31MB)
89 12:44:29.872154 progress 30% (38MB)
90 12:44:30.325874 progress 35% (44MB)
91 12:44:30.783616 progress 40% (50MB)
92 12:44:31.228941 progress 45% (57MB)
93 12:44:31.645844 progress 50% (63MB)
94 12:44:32.081348 progress 55% (69MB)
95 12:44:32.505601 progress 60% (76MB)
96 12:44:32.927936 progress 65% (82MB)
97 12:44:33.354440 progress 70% (89MB)
98 12:44:33.778237 progress 75% (95MB)
99 12:44:34.287197 progress 80% (101MB)
100 12:44:34.792807 progress 85% (108MB)
101 12:44:35.144245 progress 90% (114MB)
102 12:44:35.587874 progress 95% (120MB)
103 12:44:36.047688 progress 100% (127MB)
104 12:44:36.054172 127MB downloaded in 8.42s (15.10MB/s)
105 12:44:36.054503 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:44:36.054813 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:44:36.054921 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:44:36.055021 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:44:36.055169 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:44:36.055255 saving as /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/modules/modules.tar
112 12:44:36.055334 total size: 497788 (0MB)
113 12:44:36.055414 Using unxz to decompress xz
114 12:44:36.058893 progress 6% (0MB)
115 12:44:36.059328 progress 13% (0MB)
116 12:44:36.059593 progress 19% (0MB)
117 12:44:36.060991 progress 26% (0MB)
118 12:44:36.063197 progress 32% (0MB)
119 12:44:36.065536 progress 39% (0MB)
120 12:44:36.067566 progress 46% (0MB)
121 12:44:36.069714 progress 52% (0MB)
122 12:44:36.072301 progress 59% (0MB)
123 12:44:36.074490 progress 65% (0MB)
124 12:44:36.076795 progress 72% (0MB)
125 12:44:36.078939 progress 78% (0MB)
126 12:44:36.081234 progress 85% (0MB)
127 12:44:36.083441 progress 92% (0MB)
128 12:44:36.085522 progress 98% (0MB)
129 12:44:36.093153 0MB downloaded in 0.04s (12.56MB/s)
130 12:44:36.093582 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:44:36.094067 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:44:36.094235 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:44:36.094404 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:44:37.668678 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729665/extract-nfsrootfs-jdgptpx5
136 12:44:37.668910 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:44:37.669028 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:44:37.669184 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul
139 12:44:37.669303 makedir: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin
140 12:44:37.669400 makedir: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/tests
141 12:44:37.669493 makedir: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/results
142 12:44:37.669608 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-add-keys
143 12:44:37.669766 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-add-sources
144 12:44:37.669901 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-background-process-start
145 12:44:37.670032 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-background-process-stop
146 12:44:37.670161 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-common-functions
147 12:44:37.670287 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-echo-ipv4
148 12:44:37.670421 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-install-packages
149 12:44:37.670548 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-installed-packages
150 12:44:37.670673 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-os-build
151 12:44:37.670797 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-probe-channel
152 12:44:37.670920 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-probe-ip
153 12:44:37.671043 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-target-ip
154 12:44:37.671177 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-target-mac
155 12:44:37.671302 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-target-storage
156 12:44:37.671431 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-case
157 12:44:37.671560 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-event
158 12:44:37.671684 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-feedback
159 12:44:37.671809 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-raise
160 12:44:37.671935 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-reference
161 12:44:37.672059 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-runner
162 12:44:37.672184 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-set
163 12:44:37.672307 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-test-shell
164 12:44:37.672432 Updating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-install-packages (oe)
165 12:44:37.672566 Updating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/bin/lava-installed-packages (oe)
166 12:44:37.672677 Creating /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/environment
167 12:44:37.672775 LAVA metadata
168 12:44:37.672854 - LAVA_JOB_ID=9729665
169 12:44:37.672927 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:44:37.673039 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:44:37.673112 skipped lava-vland-overlay
172 12:44:37.673197 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:44:37.673288 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:44:37.673357 skipped lava-multinode-overlay
175 12:44:37.673438 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:44:37.673528 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:44:37.673609 Loading test definitions
178 12:44:37.673713 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 12:44:37.673793 Using /lava-9729665 at stage 0
180 12:44:37.674072 uuid=9729665_1.5.2.3.1 testdef=None
181 12:44:37.674172 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:44:37.674272 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 12:44:37.674814 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:44:37.675074 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 12:44:37.675726 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:44:37.675992 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 12:44:37.676602 runner path: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/0/tests/0_dmesg test_uuid 9729665_1.5.2.3.1
190 12:44:37.676774 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:44:37.677035 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 12:44:37.677116 Using /lava-9729665 at stage 1
194 12:44:37.677388 uuid=9729665_1.5.2.3.5 testdef=None
195 12:44:37.677488 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:44:37.677589 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 12:44:37.678097 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:44:37.678349 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 12:44:37.678996 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:44:37.679273 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 12:44:37.679896 runner path: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/1/tests/1_bootrr test_uuid 9729665_1.5.2.3.5
204 12:44:37.680060 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:44:37.680312 Creating lava-test-runner.conf files
207 12:44:37.680385 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/0 for stage 0
208 12:44:37.680477 - 0_dmesg
209 12:44:37.680560 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729665/lava-overlay-hefm33ul/lava-9729665/1 for stage 1
210 12:44:37.680653 - 1_bootrr
211 12:44:37.680754 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:44:37.680849 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 12:44:37.687813 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:44:37.687946 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 12:44:37.688049 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:44:37.688149 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 12:44:37.688248 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 12:44:37.802382 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:44:37.802772 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
220 12:44:37.803057 extracting modules file /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729665/extract-nfsrootfs-jdgptpx5
221 12:44:37.817429 extracting modules file /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729665/extract-overlay-ramdisk-nfcl4sur/ramdisk
222 12:44:37.831653 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:44:37.831830 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
224 12:44:37.831932 [common] Applying overlay to NFS
225 12:44:37.832015 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729665/compress-overlay-ls7pwrj1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729665/extract-nfsrootfs-jdgptpx5
226 12:44:37.836648 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:44:37.836781 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
228 12:44:37.836884 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:44:37.836992 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
230 12:44:37.837085 Building ramdisk /var/lib/lava/dispatcher/tmp/9729665/extract-overlay-ramdisk-nfcl4sur/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729665/extract-overlay-ramdisk-nfcl4sur/ramdisk
231 12:44:37.882117 >> 30091 blocks
232 12:44:38.486447 rename /var/lib/lava/dispatcher/tmp/9729665/extract-overlay-ramdisk-nfcl4sur/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
233 12:44:38.486932 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:44:38.487091 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 12:44:38.487221 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 12:44:38.487345 No mkimage arch provided, not using FIT.
237 12:44:38.487463 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:44:38.487583 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:44:38.487718 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
240 12:44:38.487838 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 12:44:38.487934 No LXC device requested
242 12:44:38.488050 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:44:38.488166 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 12:44:38.488279 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:44:38.488372 Checking files for TFTP limit of 4294967296 bytes.
246 12:44:38.488842 end: 1 tftp-deploy (duration 00:00:11) [common]
247 12:44:38.488981 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:44:38.489104 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:44:38.489260 substitutions:
250 12:44:38.489345 - {DTB}: None
251 12:44:38.489435 - {INITRD}: 9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
252 12:44:38.489522 - {KERNEL}: 9729665/tftp-deploy-n1y37feo/kernel/bzImage
253 12:44:38.489606 - {LAVA_MAC}: None
254 12:44:38.489690 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729665/extract-nfsrootfs-jdgptpx5
255 12:44:38.489773 - {NFS_SERVER_IP}: 192.168.201.1
256 12:44:38.489855 - {PRESEED_CONFIG}: None
257 12:44:38.489940 - {PRESEED_LOCAL}: None
258 12:44:38.490021 - {RAMDISK}: 9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
259 12:44:38.490106 - {ROOT_PART}: None
260 12:44:38.490197 - {ROOT}: None
261 12:44:38.490270 - {SERVER_IP}: 192.168.201.1
262 12:44:38.490335 - {TEE}: None
263 12:44:38.490401 Parsed boot commands:
264 12:44:38.490464 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:44:38.490637 Parsed boot commands: tftpboot 192.168.201.1 9729665/tftp-deploy-n1y37feo/kernel/bzImage 9729665/tftp-deploy-n1y37feo/kernel/cmdline 9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
266 12:44:38.490743 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:44:38.490845 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:44:38.490960 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:44:38.491072 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:44:38.491166 Not connected, no need to disconnect.
271 12:44:38.491254 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:44:38.491348 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:44:38.491425 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-0'
274 12:44:38.494704 Setting prompt string to ['lava-test: # ']
275 12:44:38.495027 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:44:38.495171 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:44:38.495285 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:44:38.495391 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:44:38.495596 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
280 12:44:59.996882 >> Command sent successfully.
281 12:44:59.999515 Returned 0 in 21 seconds
282 12:45:00.100319 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
284 12:45:00.100675 end: 2.2.2 reset-device (duration 00:00:22) [common]
285 12:45:00.100804 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
286 12:45:00.100906 Setting prompt string to 'Starting depthcharge on sarien...'
287 12:45:00.100981 Changing prompt to 'Starting depthcharge on sarien...'
288 12:45:00.101059 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
289 12:45:00.101366 [Enter `^Ec?' for help]
290 12:45:00.101457
291 12:45:00.101534
292 12:45:00.101606 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
293 12:45:00.101679 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
294 12:45:00.101758 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
295 12:45:00.101830 CPU: AES supported, TXT supported, VT supported
296 12:45:00.101896 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
297 12:45:00.101960 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
298 12:45:00.102028 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
299 12:45:00.102092 VBOOT: Loading verstage.
300 12:45:00.102157 CBFS @ 1d00000 size 300000
301 12:45:00.102220 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
302 12:45:00.102301 CBFS: Locating 'fallback/verstage'
303 12:45:00.102366 CBFS: Found @ offset 10f6c0 size 1435c
304 12:45:00.102429
305 12:45:00.102491
306 12:45:00.102554 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
307 12:45:00.102617 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
308 12:45:00.102680 done! DID_VID 0x00281ae0
309 12:45:00.102749 TPM ready after 0 ms
310 12:45:00.102820 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
311 12:45:00.102883 tlcl_send_startup: Startup return code is 0
312 12:45:00.102947 TPM: setup succeeded
313 12:45:00.103010 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
314 12:45:00.103073 Checking cr50 for recovery request
315 12:45:00.103149 Phase 1
316 12:45:00.103212 FMAP: Found "FLASH" version 1.1 at 1c10000.
317 12:45:00.103292 FMAP: base = fe000000 size = 2000000 #areas = 37
318 12:45:00.103357 FMAP: area GBB found @ 1c11000 (978944 bytes)
319 12:45:00.103421 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
320 12:45:00.103484 Phase 2
321 12:45:00.103546 Phase 3
322 12:45:00.103608 FMAP: area GBB found @ 1c11000 (978944 bytes)
323 12:45:00.103671 VB2:vb2_report_dev_firmware() This is developer signed firmware
324 12:45:00.103733 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
325 12:45:00.103812 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
326 12:45:00.103877 VB2:vb2_verify_keyblock() Checking key block signature...
327 12:45:00.103940 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
328 12:45:00.104003 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
329 12:45:00.104066 VB2:vb2_verify_fw_preamble() Verifying preamble.
330 12:45:00.104128 Phase 4
331 12:45:00.104190 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
332 12:45:00.104253 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
333 12:45:00.104332 VB2:vb2_rsa_verify_digest() Digest check failed!
334 12:45:00.104395 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
335 12:45:00.104458 Saving nvdata
336 12:45:00.104520 Reboot requested (10020007)
337 12:45:00.104582 board_reset() called!
338 12:45:00.104644 full_reset() called!
339 12:45:02.039883
340 12:45:02.040234
341 12:45:02.048542 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
342 12:45:02.052455 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
343 12:45:02.057815 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
344 12:45:02.062148 CPU: AES supported, TXT supported, VT supported
345 12:45:02.068406 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
346 12:45:02.073200 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
347 12:45:02.078428 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
348 12:45:02.081775 VBOOT: Loading verstage.
349 12:45:02.083881 CBFS @ 1d00000 size 300000
350 12:45:02.090287 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
351 12:45:02.094243 CBFS: Locating 'fallback/verstage'
352 12:45:02.098362 CBFS: Found @ offset 10f6c0 size 1435c
353 12:45:02.112387
354 12:45:02.112500
355 12:45:02.121721 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
356 12:45:02.128399 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
357 12:45:02.252084 .done! DID_VID 0x00281ae0
358 12:45:02.253539 TPM ready after 0 ms
359 12:45:02.257698 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
360 12:45:02.324754 tlcl_send_startup: Startup return code is 0
361 12:45:02.327417 TPM: setup succeeded
362 12:45:02.345692 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
363 12:45:02.350266 Checking cr50 for recovery request
364 12:45:02.359711 Phase 1
365 12:45:02.364012 FMAP: Found "FLASH" version 1.1 at 1c10000.
366 12:45:02.369381 FMAP: base = fe000000 size = 2000000 #areas = 37
367 12:45:02.374099 FMAP: area GBB found @ 1c11000 (978944 bytes)
368 12:45:02.380221 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
369 12:45:02.387408 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
370 12:45:02.390066 Recovery requested (1009000e)
371 12:45:02.391453 Saving nvdata
372 12:45:02.406426 tlcl_extend: response is 0
373 12:45:02.420537 tlcl_extend: response is 0
374 12:45:02.424204 CBFS @ 1d00000 size 300000
375 12:45:02.430906 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
376 12:45:02.433968 CBFS: Locating 'fallback/romstage'
377 12:45:02.438241 CBFS: Found @ offset 80 size 15b2c
378 12:45:02.439058
379 12:45:02.439432
380 12:45:02.448203 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
381 12:45:02.452893 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
382 12:45:02.457352 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 12:45:02.462072 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
384 12:45:02.465758 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 12:45:02.470156 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
386 12:45:02.472198 TCO_STS: 0000 0004
387 12:45:02.475373 GEN_PMCON: d0015209 00002200
388 12:45:02.478759 GBLRST_CAUSE: 00000000 00000000
389 12:45:02.480804 prev_sleep_state 5
390 12:45:02.483549 Boot Count incremented to 23115
391 12:45:02.487196 CBFS @ 1d00000 size 300000
392 12:45:02.493804 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
393 12:45:02.496481 CBFS: Locating 'fspm.bin'
394 12:45:02.499314 CBFS: Found @ offset 60fc0 size 70000
395 12:45:02.505638 FMAP: Found "FLASH" version 1.1 at 1c10000.
396 12:45:02.510137 FMAP: base = fe000000 size = 2000000 #areas = 37
397 12:45:02.515585 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
398 12:45:02.522369 Probing TPM I2C: done! DID_VID 0x00281ae0
399 12:45:02.525030 Locality already claimed
400 12:45:02.528252 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
401 12:45:02.547848 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
402 12:45:02.554464 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 12:45:02.556882 MRC cache found, size 18e0
404 12:45:02.559584 bootmode is set to :2
405 12:45:20.408698 CBMEM:
406 12:45:20.411324 IMD: root @ 89fff000 254 entries.
407 12:45:20.414714 IMD: root @ 89ffec00 62 entries.
408 12:45:20.417420 External stage cache:
409 12:45:20.421728 IMD: root @ 8abff000 254 entries.
410 12:45:20.425044 IMD: root @ 8abfec00 62 entries.
411 12:45:20.430864 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
412 12:45:20.434070 creating vboot_handoff structure
413 12:45:20.456567 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
414 12:45:20.500856 tlcl_write: response is 0
415 12:45:20.521065 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
416 12:45:20.525595 MRC: TPM MRC hash updated successfully.
417 12:45:20.526899 1 DIMMs found
418 12:45:20.529022 top_of_ram = 0x8a000000
419 12:45:20.534789 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
420 12:45:20.539474 MTRR Range: Start=ff000000 End=0 (Size 1000000)
421 12:45:20.542141 CBFS @ 1d00000 size 300000
422 12:45:20.548928 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
423 12:45:20.552255 CBFS: Locating 'fallback/postcar'
424 12:45:20.555502 CBFS: Found @ offset 107000 size 41a4
425 12:45:20.562293 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
426 12:45:20.572076 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
427 12:45:20.576895 Processing 126 relocs. Offset value of 0x87cdd000
428 12:45:20.579929
429 12:45:20.580220
430 12:45:20.588699 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
431 12:45:20.591202 CBFS @ 1d00000 size 300000
432 12:45:20.597142 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
433 12:45:20.601261 CBFS: Locating 'fallback/ramstage'
434 12:45:20.604521 CBFS: Found @ offset 458c0 size 1a8a8
435 12:45:20.612011 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
436 12:45:20.640094 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
437 12:45:20.644512 Processing 3754 relocs. Offset value of 0x88e81000
438 12:45:20.650140
439 12:45:20.650666
440 12:45:20.658554 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
441 12:45:20.663864 FMAP: Found "FLASH" version 1.1 at 1c10000.
442 12:45:20.668620 FMAP: base = fe000000 size = 2000000 #areas = 37
443 12:45:20.673802 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
444 12:45:20.677733 WARNING: RO_VPD is uninitialized or empty.
445 12:45:20.682385 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
446 12:45:20.686979 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
447 12:45:20.688301 Normal boot.
448 12:45:20.695654 BS: BS_PRE_DEVICE times (us): entry 0 run 54 exit 1164
449 12:45:20.697923 CBFS @ 1d00000 size 300000
450 12:45:20.703826 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
451 12:45:20.708280 CBFS: Locating 'cpu_microcode_blob.bin'
452 12:45:20.711806 CBFS: Found @ offset 15c40 size 2fc00
453 12:45:20.716587 microcode: sig=0x806ec pf=0x80 revision=0xb7
454 12:45:20.718623 Skip microcode update
455 12:45:20.721301 CBFS @ 1d00000 size 300000
456 12:45:20.727713 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
457 12:45:20.730161 CBFS: Locating 'fsps.bin'
458 12:45:20.734863 CBFS: Found @ offset d1fc0 size 35000
459 12:45:20.764678 Detected 4 core, 8 thread CPU.
460 12:45:20.766702 Setting up SMI for CPU
461 12:45:20.768484 IED base = 0x8ac00000
462 12:45:20.770684 IED size = 0x00400000
463 12:45:20.774211 Will perform SMM setup.
464 12:45:20.778663 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
465 12:45:20.786743 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
466 12:45:20.791895 Processing 16 relocs. Offset value of 0x00030000
467 12:45:20.794634 Attempting to start 7 APs
468 12:45:20.798046 Waiting for 10ms after sending INIT.
469 12:45:20.813901 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
470 12:45:20.814826 done.
471 12:45:20.816706 AP: slot 7 apic_id 5.
472 12:45:20.819223 AP: slot 6 apic_id 4.
473 12:45:20.823524 Waiting for 2nd SIPI to complete...done.
474 12:45:20.825009 AP: slot 5 apic_id 7.
475 12:45:20.827404 AP: slot 2 apic_id 6.
476 12:45:20.830028 AP: slot 4 apic_id 3.
477 12:45:20.832224 AP: slot 1 apic_id 2.
478 12:45:20.840392 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
479 12:45:20.844425 Processing 13 relocs. Offset value of 0x00038000
480 12:45:20.851475 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
481 12:45:20.855348 Installing SMM handler to 0x8a000000
482 12:45:20.862895 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
483 12:45:20.868846 Processing 867 relocs. Offset value of 0x8a010000
484 12:45:20.876594 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
485 12:45:20.881728 Processing 13 relocs. Offset value of 0x8a008000
486 12:45:20.887121 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
487 12:45:20.892458 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
488 12:45:20.898315 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
489 12:45:20.904354 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
490 12:45:20.910069 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
491 12:45:20.916094 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
492 12:45:20.921615 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
493 12:45:20.928239 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
494 12:45:20.931781 Clearing SMI status registers
495 12:45:20.933695 SMI_STS: PM1
496 12:45:20.935506 PM1_STS: WAK PWRBTN TMROF
497 12:45:20.938294 TCO_STS: BOOT SECOND_TO
498 12:45:20.940512 GPE0 STD STS: eSPI
499 12:45:20.942664 New SMBASE 0x8a000000
500 12:45:20.945628 In relocation handler: CPU 0
501 12:45:20.950236 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
502 12:45:20.954426 Writing SMRR. base = 0x8a000006, mask=0xff000800
503 12:45:20.956733 Relocation complete.
504 12:45:20.958901 New SMBASE 0x89fff400
505 12:45:20.961744 In relocation handler: CPU 3
506 12:45:20.966253 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
507 12:45:20.971257 Writing SMRR. base = 0x8a000006, mask=0xff000800
508 12:45:20.973363 Relocation complete.
509 12:45:20.974823 New SMBASE 0x89ffe800
510 12:45:20.978080 In relocation handler: CPU 6
511 12:45:20.982594 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
512 12:45:20.987158 Writing SMRR. base = 0x8a000006, mask=0xff000800
513 12:45:20.989372 Relocation complete.
514 12:45:20.991368 New SMBASE 0x89ffe400
515 12:45:20.994513 In relocation handler: CPU 7
516 12:45:20.999192 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
517 12:45:21.003297 Writing SMRR. base = 0x8a000006, mask=0xff000800
518 12:45:21.005850 Relocation complete.
519 12:45:21.007504 New SMBASE 0x89fff800
520 12:45:21.010157 In relocation handler: CPU 2
521 12:45:21.014600 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
522 12:45:21.019760 Writing SMRR. base = 0x8a000006, mask=0xff000800
523 12:45:21.021413 Relocation complete.
524 12:45:21.024212 New SMBASE 0x89ffec00
525 12:45:21.027149 In relocation handler: CPU 5
526 12:45:21.031005 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
527 12:45:21.036172 Writing SMRR. base = 0x8a000006, mask=0xff000800
528 12:45:21.038640 Relocation complete.
529 12:45:21.040103 New SMBASE 0x89fff000
530 12:45:21.043281 In relocation handler: CPU 4
531 12:45:21.046974 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
532 12:45:21.051999 Writing SMRR. base = 0x8a000006, mask=0xff000800
533 12:45:21.054728 Relocation complete.
534 12:45:21.056726 New SMBASE 0x89fffc00
535 12:45:21.059330 In relocation handler: CPU 1
536 12:45:21.063750 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
537 12:45:21.068225 Writing SMRR. base = 0x8a000006, mask=0xff000800
538 12:45:21.070774 Relocation complete.
539 12:45:21.072661 Initializing CPU #0
540 12:45:21.076237 CPU: vendor Intel device 806ec
541 12:45:21.080125 CPU: family 06, model 8e, stepping 0c
542 12:45:21.082790 Clearing out pending MCEs
543 12:45:21.087407 Setting up local APIC... apic_id: 0x00 done.
544 12:45:21.090008 Turbo is available but hidden
545 12:45:21.092659 Turbo has been enabled
546 12:45:21.094199 VMX status: enabled
547 12:45:21.097853 IA32_FEATURE_CONTROL status: locked
548 12:45:21.100051 Skip microcode update
549 12:45:21.102094 CPU #0 initialized
550 12:45:21.104519 Initializing CPU #3
551 12:45:21.106489 Initializing CPU #4
552 12:45:21.109127 Initializing CPU #1
553 12:45:21.111451 CPU: vendor Intel device 806ec
554 12:45:21.115827 CPU: family 06, model 8e, stepping 0c
555 12:45:21.118157 CPU: vendor Intel device 806ec
556 12:45:21.122246 CPU: family 06, model 8e, stepping 0c
557 12:45:21.125015 Clearing out pending MCEs
558 12:45:21.127067 Clearing out pending MCEs
559 12:45:21.133175 Setting up local APIC...CPU: vendor Intel device 806ec
560 12:45:21.136798 CPU: family 06, model 8e, stepping 0c
561 12:45:21.141611 Setting up local APIC...Initializing CPU #6
562 12:45:21.143415 Initializing CPU #7
563 12:45:21.146551 CPU: vendor Intel device 806ec
564 12:45:21.149823 CPU: family 06, model 8e, stepping 0c
565 12:45:21.152813 CPU: vendor Intel device 806ec
566 12:45:21.156611 CPU: family 06, model 8e, stepping 0c
567 12:45:21.159642 Clearing out pending MCEs
568 12:45:21.162041 Clearing out pending MCEs
569 12:45:21.166384 Setting up local APIC...Initializing CPU #2
570 12:45:21.168807 Initializing CPU #5
571 12:45:21.172167 CPU: vendor Intel device 806ec
572 12:45:21.175492 CPU: family 06, model 8e, stepping 0c
573 12:45:21.178431 CPU: vendor Intel device 806ec
574 12:45:21.182996 CPU: family 06, model 8e, stepping 0c
575 12:45:21.185038 Clearing out pending MCEs
576 12:45:21.187220 Clearing out pending MCEs
577 12:45:21.192567 Setting up local APIC... apic_id: 0x04 done.
578 12:45:21.196243 Setting up local APIC... apic_id: 0x06 done.
579 12:45:21.201254 Setting up local APIC... apic_id: 0x03 done.
580 12:45:21.203051 apic_id: 0x02 done.
581 12:45:21.204769 VMX status: enabled
582 12:45:21.206847 VMX status: enabled
583 12:45:21.211190 IA32_FEATURE_CONTROL status: locked
584 12:45:21.215129 IA32_FEATURE_CONTROL status: locked
585 12:45:21.216631 Skip microcode update
586 12:45:21.219047 Skip microcode update
587 12:45:21.221184 CPU #4 initialized
588 12:45:21.222484 CPU #1 initialized
589 12:45:21.224671 apic_id: 0x05 done.
590 12:45:21.226794 VMX status: enabled
591 12:45:21.228939 VMX status: enabled
592 12:45:21.232866 IA32_FEATURE_CONTROL status: locked
593 12:45:21.236756 IA32_FEATURE_CONTROL status: locked
594 12:45:21.238661 Skip microcode update
595 12:45:21.240770 Skip microcode update
596 12:45:21.243298 Clearing out pending MCEs
597 12:45:21.245155 VMX status: enabled
598 12:45:21.247240 apic_id: 0x07 done.
599 12:45:21.251493 IA32_FEATURE_CONTROL status: locked
600 12:45:21.253261 VMX status: enabled
601 12:45:21.255713 Skip microcode update
602 12:45:21.259330 IA32_FEATURE_CONTROL status: locked
603 12:45:21.260670 CPU #2 initialized
604 12:45:21.263230 Skip microcode update
605 12:45:21.267008 Setting up local APIC...CPU #6 initialized
606 12:45:21.269747 CPU #7 initialized
607 12:45:21.271783 apic_id: 0x01 done.
608 12:45:21.273680 CPU #5 initialized
609 12:45:21.275388 VMX status: enabled
610 12:45:21.279308 IA32_FEATURE_CONTROL status: locked
611 12:45:21.281236 Skip microcode update
612 12:45:21.283676 CPU #3 initialized
613 12:45:21.287305 bsp_do_flight_plan done after 460 msecs.
614 12:45:21.290851 CPU: frequency set to 4800 MHz
615 12:45:21.292400 Enabling SMIs.
616 12:45:21.294240 Locking SMM.
617 12:45:21.296409 CBFS @ 1d00000 size 300000
618 12:45:21.303455 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
619 12:45:21.306128 CBFS: Locating 'vbt.bin'
620 12:45:21.309457 CBFS: Found @ offset 60a40 size 4a0
621 12:45:21.314122 Found a VBT of 4608 bytes after decompression
622 12:45:21.327851 FMAP: area GBB found @ 1c11000 (978944 bytes)
623 12:45:21.359027 Detected 4 core, 8 thread CPU.
624 12:45:21.361992 Detected 4 core, 8 thread CPU.
625 12:45:21.589566 Display FSP Version Info HOB
626 12:45:21.593227 Reference Code - CPU = 7.0.5e.40
627 12:45:21.595499 uCode Version = 0.0.0.b8
628 12:45:21.598036 Display FSP Version Info HOB
629 12:45:21.601568 Reference Code - ME = 7.0.5e.40
630 12:45:21.603766 MEBx version = 0.0.0.0
631 12:45:21.607281 ME Firmware Version = Consumer SKU
632 12:45:21.610097 Display FSP Version Info HOB
633 12:45:21.613680 Reference Code - CNL PCH = 7.0.5e.40
634 12:45:21.617187 PCH-CRID Status = Disabled
635 12:45:21.620053 CNL PCH H A0 Hsio Version = 2.0.0.0
636 12:45:21.623474 CNL PCH H Ax Hsio Version = 9.0.0.0
637 12:45:21.627403 CNL PCH H Bx Hsio Version = a.0.0.0
638 12:45:21.631192 CNL PCH LP B0 Hsio Version = 7.0.0.0
639 12:45:21.635127 CNL PCH LP Bx Hsio Version = 6.0.0.0
640 12:45:21.638484 CNL PCH LP Dx Hsio Version = 7.0.0.0
641 12:45:21.641816 Display FSP Version Info HOB
642 12:45:21.646302 Reference Code - SA - System Agent = 7.0.5e.40
643 12:45:21.649468 Reference Code - MRC = 0.7.1.68
644 12:45:21.651853 SA - PCIe Version = 7.0.5e.40
645 12:45:21.654957 SA-CRID Status = Disabled
646 12:45:21.658619 SA-CRID Original Value = 0.0.0.c
647 12:45:21.660822 SA-CRID New Value = 0.0.0.c
648 12:45:21.678857 RTC Init
649 12:45:21.683242 Set power off after power failure.
650 12:45:21.685143 Disabling Deep S3
651 12:45:21.686883 Disabling Deep S3
652 12:45:21.688767 Disabling Deep S4
653 12:45:21.690672 Disabling Deep S4
654 12:45:21.692039 Disabling Deep S5
655 12:45:21.694182 Disabling Deep S5
656 12:45:21.700666 BS: BS_DEV_INIT_CHIPS times (us): entry 598631 run 384232 exit 16231
657 12:45:21.703679 Enumerating buses...
658 12:45:21.708049 Show all devs... Before device enumeration.
659 12:45:21.709604 Root Device: enabled 1
660 12:45:21.712909 CPU_CLUSTER: 0: enabled 1
661 12:45:21.714999 DOMAIN: 0000: enabled 1
662 12:45:21.717358 APIC: 00: enabled 1
663 12:45:21.719339 PCI: 00:00.0: enabled 1
664 12:45:21.721888 PCI: 00:02.0: enabled 1
665 12:45:21.723804 PCI: 00:04.0: enabled 1
666 12:45:21.726863 PCI: 00:12.0: enabled 1
667 12:45:21.729374 PCI: 00:12.5: enabled 0
668 12:45:21.731602 PCI: 00:12.6: enabled 0
669 12:45:21.734105 PCI: 00:13.0: enabled 0
670 12:45:21.736252 PCI: 00:14.0: enabled 1
671 12:45:21.739459 PCI: 00:14.1: enabled 0
672 12:45:21.741458 PCI: 00:14.3: enabled 1
673 12:45:21.743868 PCI: 00:14.5: enabled 0
674 12:45:21.746068 PCI: 00:15.0: enabled 1
675 12:45:21.748638 PCI: 00:15.1: enabled 1
676 12:45:21.751656 PCI: 00:15.2: enabled 0
677 12:45:21.753555 PCI: 00:15.3: enabled 0
678 12:45:21.756275 PCI: 00:16.0: enabled 1
679 12:45:21.758351 PCI: 00:16.1: enabled 0
680 12:45:21.761521 PCI: 00:16.2: enabled 0
681 12:45:21.763601 PCI: 00:16.3: enabled 0
682 12:45:21.765192 PCI: 00:16.4: enabled 0
683 12:45:21.768337 PCI: 00:16.5: enabled 0
684 12:45:21.770298 PCI: 00:17.0: enabled 1
685 12:45:21.773486 PCI: 00:19.0: enabled 1
686 12:45:21.774983 PCI: 00:19.1: enabled 0
687 12:45:21.778132 PCI: 00:19.2: enabled 1
688 12:45:21.779678 PCI: 00:1a.0: enabled 0
689 12:45:21.782703 PCI: 00:1c.0: enabled 1
690 12:45:21.785600 PCI: 00:1c.1: enabled 0
691 12:45:21.787114 PCI: 00:1c.2: enabled 0
692 12:45:21.789479 PCI: 00:1c.3: enabled 0
693 12:45:21.792383 PCI: 00:1c.4: enabled 0
694 12:45:21.794769 PCI: 00:1c.5: enabled 0
695 12:45:21.796981 PCI: 00:1c.6: enabled 0
696 12:45:21.799927 PCI: 00:1c.7: enabled 1
697 12:45:21.801928 PCI: 00:1d.0: enabled 1
698 12:45:21.804801 PCI: 00:1d.1: enabled 1
699 12:45:21.806706 PCI: 00:1d.2: enabled 0
700 12:45:21.809693 PCI: 00:1d.3: enabled 0
701 12:45:21.812142 PCI: 00:1d.4: enabled 1
702 12:45:21.814647 PCI: 00:1e.0: enabled 0
703 12:45:21.816774 PCI: 00:1e.1: enabled 0
704 12:45:21.819035 PCI: 00:1e.2: enabled 0
705 12:45:21.821824 PCI: 00:1e.3: enabled 0
706 12:45:21.824088 PCI: 00:1f.0: enabled 1
707 12:45:21.826035 PCI: 00:1f.1: enabled 1
708 12:45:21.828588 PCI: 00:1f.2: enabled 1
709 12:45:21.831559 PCI: 00:1f.3: enabled 1
710 12:45:21.834113 PCI: 00:1f.4: enabled 1
711 12:45:21.836220 PCI: 00:1f.5: enabled 1
712 12:45:21.838238 PCI: 00:1f.6: enabled 1
713 12:45:21.841282 USB0 port 0: enabled 1
714 12:45:21.842808 I2C: 00:10: enabled 1
715 12:45:21.845246 I2C: 00:10: enabled 1
716 12:45:21.847780 I2C: 00:34: enabled 1
717 12:45:21.849354 I2C: 00:2c: enabled 1
718 12:45:21.852005 I2C: 00:50: enabled 1
719 12:45:21.853882 PNP: 0c09.0: enabled 1
720 12:45:21.856807 USB2 port 0: enabled 1
721 12:45:21.859341 USB2 port 1: enabled 1
722 12:45:21.860890 USB2 port 2: enabled 1
723 12:45:21.863586 USB2 port 4: enabled 1
724 12:45:21.866035 USB2 port 5: enabled 1
725 12:45:21.868181 USB2 port 6: enabled 1
726 12:45:21.871314 USB2 port 7: enabled 1
727 12:45:21.873854 USB2 port 8: enabled 1
728 12:45:21.875796 USB2 port 9: enabled 1
729 12:45:21.877796 USB3 port 0: enabled 1
730 12:45:21.880385 USB3 port 1: enabled 1
731 12:45:21.882314 USB3 port 2: enabled 1
732 12:45:21.884423 USB3 port 3: enabled 1
733 12:45:21.887394 USB3 port 4: enabled 1
734 12:45:21.889284 APIC: 02: enabled 1
735 12:45:21.890638 APIC: 06: enabled 1
736 12:45:21.893672 APIC: 01: enabled 1
737 12:45:21.895223 APIC: 03: enabled 1
738 12:45:21.897571 APIC: 07: enabled 1
739 12:45:21.899624 APIC: 04: enabled 1
740 12:45:21.901537 APIC: 05: enabled 1
741 12:45:21.902990 Compare with tree...
742 12:45:21.905885 Root Device: enabled 1
743 12:45:21.909025 CPU_CLUSTER: 0: enabled 1
744 12:45:21.910932 APIC: 00: enabled 1
745 12:45:21.912984 APIC: 02: enabled 1
746 12:45:21.915119 APIC: 06: enabled 1
747 12:45:21.917219 APIC: 01: enabled 1
748 12:45:21.919711 APIC: 03: enabled 1
749 12:45:21.922060 APIC: 07: enabled 1
750 12:45:21.924181 APIC: 04: enabled 1
751 12:45:21.926444 APIC: 05: enabled 1
752 12:45:21.928592 DOMAIN: 0000: enabled 1
753 12:45:21.931419 PCI: 00:00.0: enabled 1
754 12:45:21.934098 PCI: 00:02.0: enabled 1
755 12:45:21.937094 PCI: 00:04.0: enabled 1
756 12:45:21.939518 PCI: 00:12.0: enabled 1
757 12:45:21.941680 PCI: 00:12.5: enabled 0
758 12:45:21.945459 PCI: 00:12.6: enabled 0
759 12:45:21.946967 PCI: 00:13.0: enabled 0
760 12:45:21.950077 PCI: 00:14.0: enabled 1
761 12:45:21.952325 USB0 port 0: enabled 1
762 12:45:21.955303 USB2 port 0: enabled 1
763 12:45:21.958291 USB2 port 1: enabled 1
764 12:45:21.960197 USB2 port 2: enabled 1
765 12:45:21.963448 USB2 port 4: enabled 1
766 12:45:21.965649 USB2 port 5: enabled 1
767 12:45:21.968972 USB2 port 6: enabled 1
768 12:45:21.972104 USB2 port 7: enabled 1
769 12:45:21.974309 USB2 port 8: enabled 1
770 12:45:21.977344 USB2 port 9: enabled 1
771 12:45:21.980003 USB3 port 0: enabled 1
772 12:45:21.982070 USB3 port 1: enabled 1
773 12:45:21.985224 USB3 port 2: enabled 1
774 12:45:21.987787 USB3 port 3: enabled 1
775 12:45:21.990988 USB3 port 4: enabled 1
776 12:45:21.993385 PCI: 00:14.1: enabled 0
777 12:45:21.995866 PCI: 00:14.3: enabled 1
778 12:45:21.998493 PCI: 00:14.5: enabled 0
779 12:45:22.001175 PCI: 00:15.0: enabled 1
780 12:45:22.003357 I2C: 00:10: enabled 1
781 12:45:22.005981 I2C: 00:10: enabled 1
782 12:45:22.009008 I2C: 00:34: enabled 1
783 12:45:22.011633 PCI: 00:15.1: enabled 1
784 12:45:22.013719 I2C: 00:2c: enabled 1
785 12:45:22.016697 PCI: 00:15.2: enabled 0
786 12:45:22.019201 PCI: 00:15.3: enabled 0
787 12:45:22.021695 PCI: 00:16.0: enabled 1
788 12:45:22.024747 PCI: 00:16.1: enabled 0
789 12:45:22.027185 PCI: 00:16.2: enabled 0
790 12:45:22.029544 PCI: 00:16.3: enabled 0
791 12:45:22.032296 PCI: 00:16.4: enabled 0
792 12:45:22.034693 PCI: 00:16.5: enabled 0
793 12:45:22.037294 PCI: 00:17.0: enabled 1
794 12:45:22.039944 PCI: 00:19.0: enabled 1
795 12:45:22.042568 I2C: 00:50: enabled 1
796 12:45:22.045715 PCI: 00:19.1: enabled 0
797 12:45:22.048215 PCI: 00:19.2: enabled 1
798 12:45:22.050888 PCI: 00:1a.0: enabled 0
799 12:45:22.053198 PCI: 00:1c.0: enabled 1
800 12:45:22.056330 PCI: 00:1c.1: enabled 0
801 12:45:22.058039 PCI: 00:1c.2: enabled 0
802 12:45:22.061464 PCI: 00:1c.3: enabled 0
803 12:45:22.064185 PCI: 00:1c.4: enabled 0
804 12:45:22.066624 PCI: 00:1c.5: enabled 0
805 12:45:22.069203 PCI: 00:1c.6: enabled 0
806 12:45:22.071463 PCI: 00:1c.7: enabled 1
807 12:45:22.074584 PCI: 00:1d.0: enabled 1
808 12:45:22.077214 PCI: 00:1d.1: enabled 1
809 12:45:22.079846 PCI: 00:1d.2: enabled 0
810 12:45:22.082058 PCI: 00:1d.3: enabled 0
811 12:45:22.084585 PCI: 00:1d.4: enabled 1
812 12:45:22.087877 PCI: 00:1e.0: enabled 0
813 12:45:22.090488 PCI: 00:1e.1: enabled 0
814 12:45:22.093143 PCI: 00:1e.2: enabled 0
815 12:45:22.095578 PCI: 00:1e.3: enabled 0
816 12:45:22.098057 PCI: 00:1f.0: enabled 1
817 12:45:22.100168 PNP: 0c09.0: enabled 1
818 12:45:22.103071 PCI: 00:1f.1: enabled 1
819 12:45:22.105728 PCI: 00:1f.2: enabled 1
820 12:45:22.108996 PCI: 00:1f.3: enabled 1
821 12:45:22.110882 PCI: 00:1f.4: enabled 1
822 12:45:22.113519 PCI: 00:1f.5: enabled 1
823 12:45:22.116092 PCI: 00:1f.6: enabled 1
824 12:45:22.118287 Root Device scanning...
825 12:45:22.122649 root_dev_scan_bus for Root Device
826 12:45:22.125216 CPU_CLUSTER: 0 enabled
827 12:45:22.126971 DOMAIN: 0000 enabled
828 12:45:22.128843 DOMAIN: 0000 scanning...
829 12:45:22.133060 PCI: pci_scan_bus for bus 00
830 12:45:22.135493 PCI: 00:00.0 [8086/0000] ops
831 12:45:22.138636 PCI: 00:00.0 [8086/3e34] enabled
832 12:45:22.141819 PCI: 00:02.0 [8086/0000] ops
833 12:45:22.145378 PCI: 00:02.0 [8086/3ea0] enabled
834 12:45:22.148533 PCI: 00:04.0 [8086/1903] enabled
835 12:45:22.151345 PCI: 00:08.0 [8086/1911] enabled
836 12:45:22.155264 PCI: 00:12.0 [8086/9df9] enabled
837 12:45:22.158329 PCI: 00:14.0 [8086/0000] bus ops
838 12:45:22.161352 PCI: 00:14.0 [8086/9ded] enabled
839 12:45:22.165569 PCI: 00:14.2 [8086/9def] enabled
840 12:45:22.168321 PCI: 00:14.3 [8086/9df0] enabled
841 12:45:22.172007 PCI: 00:15.0 [8086/0000] bus ops
842 12:45:22.174857 PCI: 00:15.0 [8086/9de8] enabled
843 12:45:22.178552 PCI: 00:15.1 [8086/0000] bus ops
844 12:45:22.181893 PCI: 00:15.1 [8086/9de9] enabled
845 12:45:22.187068 PCI: Static device PCI: 00:16.0 not found, disabling it.
846 12:45:22.189907 PCI: 00:17.0 [8086/0000] ops
847 12:45:22.193606 PCI: 00:17.0 [8086/9dd3] enabled
848 12:45:22.196839 PCI: 00:19.0 [8086/0000] bus ops
849 12:45:22.200662 PCI: 00:19.0 [8086/9dc5] enabled
850 12:45:22.203229 PCI: 00:19.2 [8086/0000] ops
851 12:45:22.206355 PCI: 00:19.2 [8086/9dc7] enabled
852 12:45:22.210106 PCI: 00:1c.0 [8086/0000] bus ops
853 12:45:22.213330 PCI: 00:1c.0 [8086/9dbf] enabled
854 12:45:22.218532 PCI: Static device PCI: 00:1c.7 not found, disabling it.
855 12:45:22.221944 PCI: 00:1d.0 [8086/0000] bus ops
856 12:45:22.225598 PCI: 00:1d.0 [8086/9db4] enabled
857 12:45:22.230997 PCI: Static device PCI: 00:1d.1 not found, disabling it.
858 12:45:22.236604 PCI: Static device PCI: 00:1d.4 not found, disabling it.
859 12:45:22.239803 PCI: 00:1f.0 [8086/0000] bus ops
860 12:45:22.242881 PCI: 00:1f.0 [8086/9d84] enabled
861 12:45:22.248843 PCI: Static device PCI: 00:1f.1 not found, disabling it.
862 12:45:22.254453 PCI: Static device PCI: 00:1f.2 not found, disabling it.
863 12:45:22.257817 PCI: 00:1f.3 [8086/0000] bus ops
864 12:45:22.261272 PCI: 00:1f.3 [8086/9dc8] enabled
865 12:45:22.265005 PCI: 00:1f.4 [8086/0000] bus ops
866 12:45:22.267743 PCI: 00:1f.4 [8086/9da3] enabled
867 12:45:22.270713 PCI: 00:1f.5 [8086/0000] bus ops
868 12:45:22.274180 PCI: 00:1f.5 [8086/9da4] enabled
869 12:45:22.277542 PCI: 00:1f.6 [8086/15be] enabled
870 12:45:22.280468 PCI: Leftover static devices:
871 12:45:22.281985 PCI: 00:12.5
872 12:45:22.283898 PCI: 00:12.6
873 12:45:22.284744 PCI: 00:13.0
874 12:45:22.286568 PCI: 00:14.1
875 12:45:22.287938 PCI: 00:14.5
876 12:45:22.288734 PCI: 00:15.2
877 12:45:22.290039 PCI: 00:15.3
878 12:45:22.291815 PCI: 00:16.0
879 12:45:22.293089 PCI: 00:16.1
880 12:45:22.294500 PCI: 00:16.2
881 12:45:22.296289 PCI: 00:16.3
882 12:45:22.297599 PCI: 00:16.4
883 12:45:22.298833 PCI: 00:16.5
884 12:45:22.300120 PCI: 00:19.1
885 12:45:22.301414 PCI: 00:1a.0
886 12:45:22.302283 PCI: 00:1c.1
887 12:45:22.303711 PCI: 00:1c.2
888 12:45:22.305380 PCI: 00:1c.3
889 12:45:22.306854 PCI: 00:1c.4
890 12:45:22.308462 PCI: 00:1c.5
891 12:45:22.309630 PCI: 00:1c.6
892 12:45:22.310789 PCI: 00:1c.7
893 12:45:22.312028 PCI: 00:1d.1
894 12:45:22.313416 PCI: 00:1d.2
895 12:45:22.314642 PCI: 00:1d.3
896 12:45:22.316439 PCI: 00:1d.4
897 12:45:22.317758 PCI: 00:1e.0
898 12:45:22.319027 PCI: 00:1e.1
899 12:45:22.320092 PCI: 00:1e.2
900 12:45:22.321248 PCI: 00:1e.3
901 12:45:22.323170 PCI: 00:1f.1
902 12:45:22.324999 PCI: 00:1f.2
903 12:45:22.327128 PCI: Check your devicetree.cb.
904 12:45:22.330236 PCI: 00:14.0 scanning...
905 12:45:22.334007 scan_usb_bus for PCI: 00:14.0
906 12:45:22.335431 USB0 port 0 enabled
907 12:45:22.337568 USB0 port 0 scanning...
908 12:45:22.341545 scan_usb_bus for USB0 port 0
909 12:45:22.343001 USB2 port 0 enabled
910 12:45:22.344885 USB2 port 1 enabled
911 12:45:22.347248 USB2 port 2 enabled
912 12:45:22.349590 USB2 port 4 enabled
913 12:45:22.351029 USB2 port 5 enabled
914 12:45:22.353829 USB2 port 6 enabled
915 12:45:22.355197 USB2 port 7 enabled
916 12:45:22.357640 USB2 port 8 enabled
917 12:45:22.359477 USB2 port 9 enabled
918 12:45:22.361502 USB3 port 0 enabled
919 12:45:22.363553 USB3 port 1 enabled
920 12:45:22.365685 USB3 port 2 enabled
921 12:45:22.368260 USB3 port 3 enabled
922 12:45:22.369999 USB3 port 4 enabled
923 12:45:22.372411 USB2 port 0 scanning...
924 12:45:22.375744 scan_usb_bus for USB2 port 0
925 12:45:22.378420 scan_usb_bus for USB2 port 0 done
926 12:45:22.384184 scan_bus: scanning of bus USB2 port 0 took 9058 usecs
927 12:45:22.386801 USB2 port 1 scanning...
928 12:45:22.389607 scan_usb_bus for USB2 port 1
929 12:45:22.393549 scan_usb_bus for USB2 port 1 done
930 12:45:22.398664 scan_bus: scanning of bus USB2 port 1 took 9059 usecs
931 12:45:22.401179 USB2 port 2 scanning...
932 12:45:22.404516 scan_usb_bus for USB2 port 2
933 12:45:22.408309 scan_usb_bus for USB2 port 2 done
934 12:45:22.412822 scan_bus: scanning of bus USB2 port 2 took 9059 usecs
935 12:45:22.415419 USB2 port 4 scanning...
936 12:45:22.418400 scan_usb_bus for USB2 port 4
937 12:45:22.422049 scan_usb_bus for USB2 port 4 done
938 12:45:22.427295 scan_bus: scanning of bus USB2 port 4 took 9059 usecs
939 12:45:22.429872 USB2 port 5 scanning...
940 12:45:22.433150 scan_usb_bus for USB2 port 5
941 12:45:22.436887 scan_usb_bus for USB2 port 5 done
942 12:45:22.442219 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
943 12:45:22.443847 USB2 port 6 scanning...
944 12:45:22.447123 scan_usb_bus for USB2 port 6
945 12:45:22.450339 scan_usb_bus for USB2 port 6 done
946 12:45:22.456368 scan_bus: scanning of bus USB2 port 6 took 9059 usecs
947 12:45:22.458513 USB2 port 7 scanning...
948 12:45:22.462101 scan_usb_bus for USB2 port 7
949 12:45:22.465136 scan_usb_bus for USB2 port 7 done
950 12:45:22.470907 scan_bus: scanning of bus USB2 port 7 took 9052 usecs
951 12:45:22.473039 USB2 port 8 scanning...
952 12:45:22.476060 scan_usb_bus for USB2 port 8
953 12:45:22.479640 scan_usb_bus for USB2 port 8 done
954 12:45:22.484877 scan_bus: scanning of bus USB2 port 8 took 9053 usecs
955 12:45:22.487088 USB2 port 9 scanning...
956 12:45:22.490100 scan_usb_bus for USB2 port 9
957 12:45:22.494066 scan_usb_bus for USB2 port 9 done
958 12:45:22.498762 scan_bus: scanning of bus USB2 port 9 took 9059 usecs
959 12:45:22.501383 USB3 port 0 scanning...
960 12:45:22.505087 scan_usb_bus for USB3 port 0
961 12:45:22.509071 scan_usb_bus for USB3 port 0 done
962 12:45:22.514262 scan_bus: scanning of bus USB3 port 0 took 9060 usecs
963 12:45:22.516736 USB3 port 1 scanning...
964 12:45:22.518916 scan_usb_bus for USB3 port 1
965 12:45:22.523124 scan_usb_bus for USB3 port 1 done
966 12:45:22.527861 scan_bus: scanning of bus USB3 port 1 took 9051 usecs
967 12:45:22.530773 USB3 port 2 scanning...
968 12:45:22.534029 scan_usb_bus for USB3 port 2
969 12:45:22.537386 scan_usb_bus for USB3 port 2 done
970 12:45:22.542092 scan_bus: scanning of bus USB3 port 2 took 9057 usecs
971 12:45:22.545067 USB3 port 3 scanning...
972 12:45:22.548264 scan_usb_bus for USB3 port 3
973 12:45:22.551129 scan_usb_bus for USB3 port 3 done
974 12:45:22.556759 scan_bus: scanning of bus USB3 port 3 took 9059 usecs
975 12:45:22.558994 USB3 port 4 scanning...
976 12:45:22.562636 scan_usb_bus for USB3 port 4
977 12:45:22.565737 scan_usb_bus for USB3 port 4 done
978 12:45:22.571019 scan_bus: scanning of bus USB3 port 4 took 9058 usecs
979 12:45:22.574865 scan_usb_bus for USB0 port 0 done
980 12:45:22.579917 scan_bus: scanning of bus USB0 port 0 took 239242 usecs
981 12:45:22.584116 scan_usb_bus for PCI: 00:14.0 done
982 12:45:22.589857 scan_bus: scanning of bus PCI: 00:14.0 took 256169 usecs
983 12:45:22.591425 PCI: 00:15.0 scanning...
984 12:45:22.595844 scan_generic_bus for PCI: 00:15.0
985 12:45:22.599753 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
986 12:45:22.603763 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
987 12:45:22.607881 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
988 12:45:22.611789 scan_generic_bus for PCI: 00:15.0 done
989 12:45:22.617030 scan_bus: scanning of bus PCI: 00:15.0 took 22373 usecs
990 12:45:22.619811 PCI: 00:15.1 scanning...
991 12:45:22.623396 scan_generic_bus for PCI: 00:15.1
992 12:45:22.627723 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
993 12:45:22.631442 scan_generic_bus for PCI: 00:15.1 done
994 12:45:22.637246 scan_bus: scanning of bus PCI: 00:15.1 took 14208 usecs
995 12:45:22.639368 PCI: 00:19.0 scanning...
996 12:45:22.643703 scan_generic_bus for PCI: 00:19.0
997 12:45:22.647054 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
998 12:45:22.651610 scan_generic_bus for PCI: 00:19.0 done
999 12:45:22.656843 scan_bus: scanning of bus PCI: 00:19.0 took 14209 usecs
1000 12:45:22.659010 PCI: 00:1c.0 scanning...
1001 12:45:22.663489 do_pci_scan_bridge for PCI: 00:1c.0
1002 12:45:22.666768 PCI: pci_scan_bus for bus 01
1003 12:45:22.669963 PCI: 01:00.0 [10ec/525a] enabled
1004 12:45:22.672490 Capability: type 0x01 @ 0x80
1005 12:45:22.675640 Capability: type 0x05 @ 0x90
1006 12:45:22.678665 Capability: type 0x10 @ 0xb0
1007 12:45:22.681775 Capability: type 0x10 @ 0x40
1008 12:45:22.685076 Enabling Common Clock Configuration
1009 12:45:22.689448 L1 Sub-State supported from root port 28
1010 12:45:22.691623 L1 Sub-State Support = 0xf
1011 12:45:22.694888 CommonModeRestoreTime = 0x3c
1012 12:45:22.698947 Power On Value = 0x6, Power On Scale = 0x1
1013 12:45:22.701983 ASPM: Enabled L0s and L1
1014 12:45:22.704709 Capability: type 0x01 @ 0x80
1015 12:45:22.707337 Capability: type 0x05 @ 0x90
1016 12:45:22.710491 Capability: type 0x10 @ 0xb0
1017 12:45:22.716218 scan_bus: scanning of bus PCI: 00:1c.0 took 53653 usecs
1018 12:45:22.718465 PCI: 00:1d.0 scanning...
1019 12:45:22.722435 do_pci_scan_bridge for PCI: 00:1d.0
1020 12:45:22.725507 PCI: pci_scan_bus for bus 02
1021 12:45:22.728435 PCI: 02:00.0 [1217/8620] enabled
1022 12:45:22.732028 Capability: type 0x01 @ 0x6c
1023 12:45:22.734710 Capability: type 0x05 @ 0x48
1024 12:45:22.737771 Capability: type 0x10 @ 0x80
1025 12:45:22.740433 Capability: type 0x10 @ 0x40
1026 12:45:22.744262 L1 Sub-State supported from root port 29
1027 12:45:22.747000 L1 Sub-State Support = 0xf
1028 12:45:22.750280 CommonModeRestoreTime = 0x78
1029 12:45:22.754644 Power On Value = 0x16, Power On Scale = 0x0
1030 12:45:22.756764 ASPM: Enabled L1
1031 12:45:22.761109 Capability: type 0x01 @ 0x6c
1032 12:45:22.765403 Capability: type 0x05 @ 0x48
1033 12:45:22.770098 Capability: type 0x10 @ 0x80
1034 12:45:22.778029 scan_bus: scanning of bus PCI: 00:1d.0 took 56033 usecs
1035 12:45:22.780550 PCI: 00:1f.0 scanning...
1036 12:45:22.783600 scan_lpc_bus for PCI: 00:1f.0
1037 12:45:22.785512 PNP: 0c09.0 enabled
1038 12:45:22.788658 scan_lpc_bus for PCI: 00:1f.0 done
1039 12:45:22.794328 scan_bus: scanning of bus PCI: 00:1f.0 took 11399 usecs
1040 12:45:22.797371 PCI: 00:1f.3 scanning...
1041 12:45:22.802484 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
1042 12:45:22.804966 PCI: 00:1f.4 scanning...
1043 12:45:22.808882 scan_generic_bus for PCI: 00:1f.4
1044 12:45:22.813271 scan_generic_bus for PCI: 00:1f.4 done
1045 12:45:22.818507 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
1046 12:45:22.820689 PCI: 00:1f.5 scanning...
1047 12:45:22.825126 scan_generic_bus for PCI: 00:1f.5
1048 12:45:22.828293 scan_generic_bus for PCI: 00:1f.5 done
1049 12:45:22.833671 scan_bus: scanning of bus PCI: 00:1f.5 took 10132 usecs
1050 12:45:22.839614 scan_bus: scanning of bus DOMAIN: 0000 took 707409 usecs
1051 12:45:22.844212 root_dev_scan_bus for Root Device done
1052 12:45:22.849217 scan_bus: scanning of bus Root Device took 727550 usecs
1053 12:45:22.850423 done
1054 12:45:22.855606 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1055 12:45:22.861979 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 12:45:22.869846 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1057 12:45:22.875680 MRC: cache data 'RECOVERY_MRC_CACHE' needs update.
1058 12:45:22.892618 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1059 12:45:22.896163 ELOG: NV offset 0x1bf0000 size 0x4000
1060 12:45:22.904847 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1061 12:45:22.910358 ELOG: Event(17) added with size 13 at 2023-03-22 12:45:22 UTC
1062 12:45:22.916481 POST: Unexpected post code in previous boot: 0x92
1063 12:45:22.922389 ELOG: Event(A3) added with size 11 at 2023-03-22 12:45:22 UTC
1064 12:45:22.928879 ELOG: Event(AA) added with size 11 at 2023-03-22 12:45:22 UTC
1065 12:45:22.934885 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1066 12:45:22.938657 SPI flash protection: WPSW=0 SRP0=0
1067 12:45:22.942659 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 12:45:22.948978 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149152 exit 87031
1069 12:45:22.951997 found VGA at PCI: 00:02.0
1070 12:45:22.954699 Setting up VGA for PCI: 00:02.0
1071 12:45:22.960360 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 12:45:22.965420 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 12:45:22.968034 Allocating resources...
1074 12:45:22.969612 Reading resources...
1075 12:45:22.973494 Root Device read_resources bus 0 link: 0
1076 12:45:22.978092 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 12:45:22.983243 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 12:45:22.988715 DOMAIN: 0000 read_resources bus 0 link: 0
1079 12:45:22.994916 PCI: 00:14.0 read_resources bus 0 link: 0
1080 12:45:22.998408 USB0 port 0 read_resources bus 0 link: 0
1081 12:45:23.007651 USB0 port 0 read_resources bus 0 link: 0 done
1082 12:45:23.013527 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 12:45:23.018043 PCI: 00:15.0 read_resources bus 1 link: 0
1084 12:45:23.024273 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 12:45:23.029008 PCI: 00:15.1 read_resources bus 2 link: 0
1086 12:45:23.033511 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 12:45:23.038788 PCI: 00:19.0 read_resources bus 3 link: 0
1088 12:45:23.043946 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 12:45:23.048984 PCI: 00:1c.0 read_resources bus 1 link: 0
1090 12:45:23.054079 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1091 12:45:23.059247 PCI: 00:1d.0 read_resources bus 2 link: 0
1092 12:45:23.065651 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1093 12:45:23.071024 PCI: 00:1f.0 read_resources bus 0 link: 0
1094 12:45:23.076298 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1095 12:45:23.081909 DOMAIN: 0000 read_resources bus 0 link: 0 done
1096 12:45:23.087397 Root Device read_resources bus 0 link: 0 done
1097 12:45:23.089759 Done reading resources.
1098 12:45:23.095233 Show resources in subtree (Root Device)...After reading.
1099 12:45:23.099558 Root Device child on link 0 CPU_CLUSTER: 0
1100 12:45:23.103939 CPU_CLUSTER: 0 child on link 0 APIC: 00
1101 12:45:23.104750 APIC: 00
1102 12:45:23.106009 APIC: 02
1103 12:45:23.107821 APIC: 06
1104 12:45:23.108714 APIC: 01
1105 12:45:23.110358 APIC: 03
1106 12:45:23.111571 APIC: 07
1107 12:45:23.112846 APIC: 04
1108 12:45:23.114283 APIC: 05
1109 12:45:23.117941 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1110 12:45:23.127456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1111 12:45:23.137464 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1112 12:45:23.138841 PCI: 00:00.0
1113 12:45:23.148738 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1114 12:45:23.158368 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1115 12:45:23.167530 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1116 12:45:23.176789 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1117 12:45:23.185491 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1118 12:45:23.195736 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1119 12:45:23.204323 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1120 12:45:23.213875 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1121 12:45:23.222938 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1122 12:45:23.233015 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1123 12:45:23.241857 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1124 12:45:23.251662 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1125 12:45:23.261407 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1126 12:45:23.269974 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1127 12:45:23.271809 PCI: 00:02.0
1128 12:45:23.282283 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1129 12:45:23.292467 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1130 12:45:23.300968 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1131 12:45:23.302722 PCI: 00:04.0
1132 12:45:23.312203 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1133 12:45:23.314209 PCI: 00:08.0
1134 12:45:23.324051 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 12:45:23.325465 PCI: 00:12.0
1136 12:45:23.335861 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 12:45:23.340050 PCI: 00:14.0 child on link 0 USB0 port 0
1138 12:45:23.350737 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 12:45:23.354416 USB0 port 0 child on link 0 USB2 port 0
1140 12:45:23.356210 USB2 port 0
1141 12:45:23.358160 USB2 port 1
1142 12:45:23.359474 USB2 port 2
1143 12:45:23.361826 USB2 port 4
1144 12:45:23.362744 USB2 port 5
1145 12:45:23.364438 USB2 port 6
1146 12:45:23.366360 USB2 port 7
1147 12:45:23.368597 USB2 port 8
1148 12:45:23.370519 USB2 port 9
1149 12:45:23.371830 USB3 port 0
1150 12:45:23.373741 USB3 port 1
1151 12:45:23.375235 USB3 port 2
1152 12:45:23.377258 USB3 port 3
1153 12:45:23.379020 USB3 port 4
1154 12:45:23.380425 PCI: 00:14.2
1155 12:45:23.390936 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 12:45:23.400218 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 12:45:23.402640 PCI: 00:14.3
1158 12:45:23.412430 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:45:23.415938 PCI: 00:15.0 child on link 0 I2C: 01:10
1160 12:45:23.426110 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:45:23.427993 I2C: 01:10
1162 12:45:23.428925 I2C: 01:10
1163 12:45:23.430634 I2C: 01:34
1164 12:45:23.434811 PCI: 00:15.1 child on link 0 I2C: 02:2c
1165 12:45:23.445496 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 12:45:23.446728 I2C: 02:2c
1167 12:45:23.448571 PCI: 00:17.0
1168 12:45:23.457639 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1169 12:45:23.465999 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1170 12:45:23.475012 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1171 12:45:23.482947 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1172 12:45:23.491325 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1173 12:45:23.500510 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1174 12:45:23.503963 PCI: 00:19.0 child on link 0 I2C: 03:50
1175 12:45:23.514572 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:45:23.524604 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:45:23.526023 I2C: 03:50
1178 12:45:23.527271 PCI: 00:19.2
1179 12:45:23.538135 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1180 12:45:23.548850 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1181 12:45:23.553013 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1182 12:45:23.561576 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1183 12:45:23.571168 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1184 12:45:23.580851 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1185 12:45:23.582114 PCI: 01:00.0
1186 12:45:23.591370 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1187 12:45:23.596448 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1188 12:45:23.605162 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1189 12:45:23.614641 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1190 12:45:23.623703 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1191 12:45:23.625234 PCI: 02:00.0
1192 12:45:23.634268 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1193 12:45:23.643575 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1194 12:45:23.648167 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1195 12:45:23.656980 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1196 12:45:23.665737 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1197 12:45:23.666808 PNP: 0c09.0
1198 12:45:23.675924 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1199 12:45:23.684743 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1200 12:45:23.692704 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1201 12:45:23.694740 PCI: 00:1f.3
1202 12:45:23.704597 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:45:23.715121 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1204 12:45:23.716418 PCI: 00:1f.4
1205 12:45:23.725128 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1206 12:45:23.735453 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1207 12:45:23.737541 PCI: 00:1f.5
1208 12:45:23.745557 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1209 12:45:23.746948 PCI: 00:1f.6
1210 12:45:23.757236 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1211 12:45:23.762832 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 12:45:23.769827 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 12:45:23.776659 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 12:45:23.782135 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1215 12:45:23.789793 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1216 12:45:23.793518 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1217 12:45:23.796792 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1218 12:45:23.799743 PCI: 00:17.0 18 * [0x60 - 0x67] io
1219 12:45:23.804201 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1220 12:45:23.810819 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1221 12:45:23.817490 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1222 12:45:23.825272 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1223 12:45:23.833762 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1224 12:45:23.840352 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1225 12:45:23.844131 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1226 12:45:23.852616 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1227 12:45:23.860334 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 12:45:23.868751 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 12:45:23.875460 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 12:45:23.879119 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1231 12:45:23.883417 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1232 12:45:23.891296 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1233 12:45:23.895713 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1234 12:45:23.900878 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1235 12:45:23.905468 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1236 12:45:23.910012 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1237 12:45:23.915137 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1238 12:45:23.920411 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1239 12:45:23.924604 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1240 12:45:23.929795 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1241 12:45:23.934386 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1242 12:45:23.939476 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1243 12:45:23.944291 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1244 12:45:23.949250 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1245 12:45:23.954492 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1246 12:45:23.958716 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1247 12:45:23.963855 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1248 12:45:23.968599 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1249 12:45:23.972932 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1250 12:45:23.978396 PCI: 00:19.0 10 * [0x11349000 - 0x11349fff] mem
1251 12:45:23.983477 PCI: 00:19.0 18 * [0x1134a000 - 0x1134afff] mem
1252 12:45:23.987813 PCI: 00:19.2 18 * [0x1134b000 - 0x1134bfff] mem
1253 12:45:23.993297 PCI: 00:1f.5 10 * [0x1134c000 - 0x1134cfff] mem
1254 12:45:23.997741 PCI: 00:17.0 24 * [0x1134d000 - 0x1134d7ff] mem
1255 12:45:24.002576 PCI: 00:17.0 14 * [0x1134e000 - 0x1134e0ff] mem
1256 12:45:24.008050 PCI: 00:1f.4 10 * [0x1134f000 - 0x1134f0ff] mem
1257 12:45:24.016036 DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done
1258 12:45:24.020033 avoid_fixed_resources: DOMAIN: 0000
1259 12:45:24.025988 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1260 12:45:24.031367 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1261 12:45:24.039645 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1262 12:45:24.046931 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1263 12:45:24.054070 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1264 12:45:24.062595 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1265 12:45:24.069435 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1266 12:45:24.077747 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1267 12:45:24.084639 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1268 12:45:24.093052 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1269 12:45:24.100014 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1270 12:45:24.107335 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1271 12:45:24.109377 Setting resources...
1272 12:45:24.115586 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1273 12:45:24.119250 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1274 12:45:24.123643 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1275 12:45:24.128016 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1276 12:45:24.131474 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1277 12:45:24.138341 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1278 12:45:24.144654 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1279 12:45:24.150043 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1280 12:45:24.156548 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1281 12:45:24.163199 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1282 12:45:24.170047 DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff
1283 12:45:24.175290 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1284 12:45:24.180945 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1285 12:45:24.185034 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1286 12:45:24.190276 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1287 12:45:24.195305 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1288 12:45:24.200357 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1289 12:45:24.204889 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1290 12:45:24.210088 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1291 12:45:24.215287 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1292 12:45:24.219639 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1293 12:45:24.224590 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1294 12:45:24.229615 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1295 12:45:24.234308 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1296 12:45:24.239406 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1297 12:45:24.244014 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1298 12:45:24.248892 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1299 12:45:24.253513 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1300 12:45:24.258745 PCI: 00:19.0 10 * [0xd1349000 - 0xd1349fff] mem
1301 12:45:24.263636 PCI: 00:19.0 18 * [0xd134a000 - 0xd134afff] mem
1302 12:45:24.268811 PCI: 00:19.2 18 * [0xd134b000 - 0xd134bfff] mem
1303 12:45:24.273370 PCI: 00:1f.5 10 * [0xd134c000 - 0xd134cfff] mem
1304 12:45:24.278099 PCI: 00:17.0 24 * [0xd134d000 - 0xd134d7ff] mem
1305 12:45:24.283072 PCI: 00:17.0 14 * [0xd134e000 - 0xd134e0ff] mem
1306 12:45:24.288345 PCI: 00:1f.4 10 * [0xd134f000 - 0xd134f0ff] mem
1307 12:45:24.295216 DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done
1308 12:45:24.302457 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1309 12:45:24.309461 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1310 12:45:24.316881 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1311 12:45:24.321899 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1312 12:45:24.329623 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1313 12:45:24.336780 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1314 12:45:24.344587 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1315 12:45:24.351302 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1316 12:45:24.356341 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1317 12:45:24.361505 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1318 12:45:24.369483 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1319 12:45:24.372941 Root Device assign_resources, bus 0 link: 0
1320 12:45:24.377632 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 12:45:24.386645 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1322 12:45:24.395169 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1323 12:45:24.403072 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1324 12:45:24.410701 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1325 12:45:24.419128 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1326 12:45:24.427739 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1327 12:45:24.435341 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1328 12:45:24.440374 PCI: 00:14.0 assign_resources, bus 0 link: 0
1329 12:45:24.445171 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 12:45:24.452916 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1331 12:45:24.461375 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1332 12:45:24.469317 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1333 12:45:24.477782 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1334 12:45:24.482991 PCI: 00:15.0 assign_resources, bus 1 link: 0
1335 12:45:24.487048 PCI: 00:15.0 assign_resources, bus 1 link: 0
1336 12:45:24.495382 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1337 12:45:24.499518 PCI: 00:15.1 assign_resources, bus 2 link: 0
1338 12:45:24.504583 PCI: 00:15.1 assign_resources, bus 2 link: 0
1339 12:45:24.512454 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1340 12:45:24.519931 PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem
1341 12:45:24.528071 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1342 12:45:24.536076 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1343 12:45:24.543728 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1344 12:45:24.551425 PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem
1345 12:45:24.559602 PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1346 12:45:24.567123 PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1347 12:45:24.571815 PCI: 00:19.0 assign_resources, bus 3 link: 0
1348 12:45:24.576981 PCI: 00:19.0 assign_resources, bus 3 link: 0
1349 12:45:24.585518 PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1350 12:45:24.593428 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1351 12:45:24.602667 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1352 12:45:24.611069 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1353 12:45:24.615248 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1354 12:45:24.623502 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1355 12:45:24.627975 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1356 12:45:24.637044 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1357 12:45:24.646003 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1358 12:45:24.654725 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1359 12:45:24.658628 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1360 12:45:24.668695 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1361 12:45:24.678284 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1362 12:45:24.684472 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1363 12:45:24.688920 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1364 12:45:24.694579 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:45:24.698805 LPC: Trying to open IO window from 930 size 8
1366 12:45:24.703821 LPC: Trying to open IO window from 940 size 8
1367 12:45:24.707973 LPC: Trying to open IO window from 950 size 10
1368 12:45:24.716698 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1369 12:45:24.725037 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1370 12:45:24.733341 PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64
1371 12:45:24.740994 PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem
1372 12:45:24.748680 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1373 12:45:24.753593 DOMAIN: 0000 assign_resources, bus 0 link: 0
1374 12:45:24.758983 Root Device assign_resources, bus 0 link: 0
1375 12:45:24.761003 Done setting resources.
1376 12:45:24.767512 Show resources in subtree (Root Device)...After assigning values.
1377 12:45:24.771985 Root Device child on link 0 CPU_CLUSTER: 0
1378 12:45:24.776502 CPU_CLUSTER: 0 child on link 0 APIC: 00
1379 12:45:24.777753 APIC: 00
1380 12:45:24.778415 APIC: 02
1381 12:45:24.780015 APIC: 06
1382 12:45:24.781656 APIC: 01
1383 12:45:24.782284 APIC: 03
1384 12:45:24.783608 APIC: 07
1385 12:45:24.784917 APIC: 04
1386 12:45:24.785781 APIC: 05
1387 12:45:24.790712 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1388 12:45:24.800076 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1389 12:45:24.810731 DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1390 12:45:24.812783 PCI: 00:00.0
1391 12:45:24.822582 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1392 12:45:24.831820 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1393 12:45:24.841349 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1394 12:45:24.851011 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1395 12:45:24.860449 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1396 12:45:24.869648 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1397 12:45:24.878395 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1398 12:45:24.887375 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1399 12:45:24.896453 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1400 12:45:24.906427 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1401 12:45:24.916235 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1402 12:45:24.926069 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1403 12:45:24.935629 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1404 12:45:24.944121 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1405 12:45:24.945710 PCI: 00:02.0
1406 12:45:24.956231 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 12:45:24.967182 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 12:45:24.976381 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 12:45:24.978000 PCI: 00:04.0
1410 12:45:24.988362 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1411 12:45:24.990339 PCI: 00:08.0
1412 12:45:25.000672 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1413 12:45:25.001544 PCI: 00:12.0
1414 12:45:25.012352 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1415 12:45:25.016614 PCI: 00:14.0 child on link 0 USB0 port 0
1416 12:45:25.027439 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1417 12:45:25.030976 USB0 port 0 child on link 0 USB2 port 0
1418 12:45:25.032941 USB2 port 0
1419 12:45:25.035444 USB2 port 1
1420 12:45:25.036255 USB2 port 2
1421 12:45:25.038711 USB2 port 4
1422 12:45:25.040215 USB2 port 5
1423 12:45:25.041511 USB2 port 6
1424 12:45:25.043880 USB2 port 7
1425 12:45:25.045792 USB2 port 8
1426 12:45:25.047114 USB2 port 9
1427 12:45:25.049083 USB3 port 0
1428 12:45:25.050592 USB3 port 1
1429 12:45:25.052395 USB3 port 2
1430 12:45:25.054230 USB3 port 3
1431 12:45:25.055541 USB3 port 4
1432 12:45:25.057876 PCI: 00:14.2
1433 12:45:25.068439 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1434 12:45:25.078417 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1435 12:45:25.079832 PCI: 00:14.3
1436 12:45:25.089806 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1437 12:45:25.094310 PCI: 00:15.0 child on link 0 I2C: 01:10
1438 12:45:25.105135 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1439 12:45:25.106029 I2C: 01:10
1440 12:45:25.107394 I2C: 01:10
1441 12:45:25.109832 I2C: 01:34
1442 12:45:25.113314 PCI: 00:15.1 child on link 0 I2C: 02:2c
1443 12:45:25.124157 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1444 12:45:25.125523 I2C: 02:2c
1445 12:45:25.127475 PCI: 00:17.0
1446 12:45:25.137622 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1447 12:45:25.147430 PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14
1448 12:45:25.157202 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1449 12:45:25.166119 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1450 12:45:25.174342 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1451 12:45:25.184787 PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24
1452 12:45:25.189098 PCI: 00:19.0 child on link 0 I2C: 03:50
1453 12:45:25.199369 PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1454 12:45:25.209851 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18
1455 12:45:25.211419 I2C: 03:50
1456 12:45:25.213267 PCI: 00:19.2
1457 12:45:25.224547 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 12:45:25.234529 PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1459 12:45:25.238902 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1460 12:45:25.247737 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1461 12:45:25.257731 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1462 12:45:25.268714 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1463 12:45:25.270177 PCI: 01:00.0
1464 12:45:25.281267 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1465 12:45:25.285595 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1466 12:45:25.294242 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1467 12:45:25.304009 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1468 12:45:25.315235 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1469 12:45:25.317168 PCI: 02:00.0
1470 12:45:25.327154 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1471 12:45:25.337335 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1472 12:45:25.341817 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 12:45:25.350289 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 12:45:25.358975 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 12:45:25.361427 PNP: 0c09.0
1476 12:45:25.369990 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1477 12:45:25.378018 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1478 12:45:25.387019 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1479 12:45:25.388737 PCI: 00:1f.3
1480 12:45:25.398509 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1481 12:45:25.409013 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1482 12:45:25.411259 PCI: 00:1f.4
1483 12:45:25.419624 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1484 12:45:25.430364 PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10
1485 12:45:25.431616 PCI: 00:1f.5
1486 12:45:25.441642 PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10
1487 12:45:25.444074 PCI: 00:1f.6
1488 12:45:25.454585 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1489 12:45:25.456709 Done allocating resources.
1490 12:45:25.462531 BS: BS_DEV_RESOURCES times (us): entry 0 run 2507696 exit 21
1491 12:45:25.465305 Enabling resources...
1492 12:45:25.470423 PCI: 00:00.0 subsystem <- 1028/3e34
1493 12:45:25.473083 PCI: 00:00.0 cmd <- 06
1494 12:45:25.476425 PCI: 00:02.0 subsystem <- 1028/3ea0
1495 12:45:25.479058 PCI: 00:02.0 cmd <- 03
1496 12:45:25.483053 PCI: 00:04.0 subsystem <- 1028/1903
1497 12:45:25.485639 PCI: 00:04.0 cmd <- 02
1498 12:45:25.487824 PCI: 00:08.0 cmd <- 06
1499 12:45:25.491567 PCI: 00:12.0 subsystem <- 1028/9df9
1500 12:45:25.494413 PCI: 00:12.0 cmd <- 02
1501 12:45:25.497993 PCI: 00:14.0 subsystem <- 1028/9ded
1502 12:45:25.500481 PCI: 00:14.0 cmd <- 02
1503 12:45:25.502494 PCI: 00:14.2 cmd <- 02
1504 12:45:25.506810 PCI: 00:14.3 subsystem <- 1028/9df0
1505 12:45:25.509273 PCI: 00:14.3 cmd <- 02
1506 12:45:25.513330 PCI: 00:15.0 subsystem <- 1028/9de8
1507 12:45:25.514970 PCI: 00:15.0 cmd <- 02
1508 12:45:25.518863 PCI: 00:15.1 subsystem <- 1028/9de9
1509 12:45:25.521630 PCI: 00:15.1 cmd <- 02
1510 12:45:25.525375 PCI: 00:17.0 subsystem <- 1028/9dd3
1511 12:45:25.527904 PCI: 00:17.0 cmd <- 03
1512 12:45:25.531442 PCI: 00:19.0 subsystem <- 1028/9dc5
1513 12:45:25.534216 PCI: 00:19.0 cmd <- 06
1514 12:45:25.538575 PCI: 00:19.2 subsystem <- 1028/9dc7
1515 12:45:25.540957 PCI: 00:19.2 cmd <- 06
1516 12:45:25.544005 PCI: 00:1c.0 bridge ctrl <- 0003
1517 12:45:25.547343 PCI: 00:1c.0 subsystem <- 1028/9dbf
1518 12:45:25.550360 Capability: type 0x10 @ 0x40
1519 12:45:25.553533 Capability: type 0x05 @ 0x80
1520 12:45:25.555788 Capability: type 0x0d @ 0x90
1521 12:45:25.558938 PCI: 00:1c.0 cmd <- 06
1522 12:45:25.562236 PCI: 00:1d.0 bridge ctrl <- 0003
1523 12:45:25.565745 PCI: 00:1d.0 subsystem <- 1028/9db4
1524 12:45:25.568751 Capability: type 0x10 @ 0x40
1525 12:45:25.572019 Capability: type 0x05 @ 0x80
1526 12:45:25.574167 Capability: type 0x0d @ 0x90
1527 12:45:25.576804 PCI: 00:1d.0 cmd <- 06
1528 12:45:25.580818 PCI: 00:1f.0 subsystem <- 1028/9d84
1529 12:45:25.582753 PCI: 00:1f.0 cmd <- 407
1530 12:45:25.587716 PCI: 00:1f.3 subsystem <- 1028/9dc8
1531 12:45:25.589301 PCI: 00:1f.3 cmd <- 02
1532 12:45:25.592882 PCI: 00:1f.4 subsystem <- 1028/9da3
1533 12:45:25.596307 PCI: 00:1f.4 cmd <- 03
1534 12:45:25.599410 PCI: 00:1f.5 subsystem <- 1028/9da4
1535 12:45:25.602150 PCI: 00:1f.5 cmd <- 406
1536 12:45:25.606358 PCI: 00:1f.6 subsystem <- 1028/15be
1537 12:45:25.608753 PCI: 00:1f.6 cmd <- 02
1538 12:45:25.619306 PCI: 01:00.0 cmd <- 02
1539 12:45:25.623124 PCI: 02:00.0 cmd <- 06
1540 12:45:25.627430 done.
1541 12:45:25.633615 BS: BS_DEV_ENABLE times (us): entry 398 run 164165 exit 0
1542 12:45:25.635661 Initializing devices...
1543 12:45:25.637744 Root Device init ...
1544 12:45:25.641598 Root Device init finished in 2140 usecs
1545 12:45:25.644427 CPU_CLUSTER: 0 init ...
1546 12:45:25.649210 CPU_CLUSTER: 0 init finished in 2430 usecs
1547 12:45:25.654972 PCI: 00:00.0 init ...
1548 12:45:25.657727 CPU TDP: 15 Watts
1549 12:45:25.660251 CPU PL2 = 51 Watts
1550 12:45:25.664115 PCI: 00:00.0 init finished in 7037 usecs
1551 12:45:25.667444 PCI: 00:02.0 init ...
1552 12:45:25.670873 PCI: 00:02.0 init finished in 2237 usecs
1553 12:45:25.673592 PCI: 00:04.0 init ...
1554 12:45:25.677869 PCI: 00:04.0 init finished in 2235 usecs
1555 12:45:25.679899 PCI: 00:08.0 init ...
1556 12:45:25.684200 PCI: 00:08.0 init finished in 2235 usecs
1557 12:45:25.687370 PCI: 00:12.0 init ...
1558 12:45:25.690836 PCI: 00:12.0 init finished in 2235 usecs
1559 12:45:25.693395 PCI: 00:14.0 init ...
1560 12:45:25.697821 PCI: 00:14.0 init finished in 2236 usecs
1561 12:45:25.700418 PCI: 00:14.2 init ...
1562 12:45:25.704624 PCI: 00:14.2 init finished in 2235 usecs
1563 12:45:25.707312 PCI: 00:14.3 init ...
1564 12:45:25.711610 PCI: 00:14.3 init finished in 2240 usecs
1565 12:45:25.713700 PCI: 00:15.0 init ...
1566 12:45:25.717581 DW I2C bus 0 at 0xd1347000 (400 KHz)
1567 12:45:25.721623 PCI: 00:15.0 init finished in 5933 usecs
1568 12:45:25.724042 PCI: 00:15.1 init ...
1569 12:45:25.728027 DW I2C bus 1 at 0xd1348000 (400 KHz)
1570 12:45:25.731738 PCI: 00:15.1 init finished in 5933 usecs
1571 12:45:25.735173 PCI: 00:19.0 init ...
1572 12:45:25.738825 DW I2C bus 4 at 0xd1349000 (400 KHz)
1573 12:45:25.742844 PCI: 00:19.0 init finished in 5934 usecs
1574 12:45:25.745620 PCI: 00:1c.0 init ...
1575 12:45:25.749151 Initializing PCH PCIe bridge.
1576 12:45:25.753357 PCI: 00:1c.0 init finished in 5248 usecs
1577 12:45:25.755795 PCI: 00:1d.0 init ...
1578 12:45:25.758513 Initializing PCH PCIe bridge.
1579 12:45:25.762988 PCI: 00:1d.0 init finished in 5247 usecs
1580 12:45:25.765033 PCI: 00:1f.0 init ...
1581 12:45:25.769425 IOAPIC: Initializing IOAPIC at 0xfec00000
1582 12:45:25.774545 IOAPIC: Bootstrap Processor Local APIC = 0x00
1583 12:45:25.776153 IOAPIC: ID = 0x02
1584 12:45:25.779228 IOAPIC: Dumping registers
1585 12:45:25.780800 reg 0x0000: 0x02000000
1586 12:45:25.784520 reg 0x0001: 0x00770020
1587 12:45:25.786047 reg 0x0002: 0x00000000
1588 12:45:25.792011 PCI: 00:1f.0 init finished in 25019 usecs
1589 12:45:25.795120 PCI: 00:1f.3 init ...
1590 12:45:25.799977 HDA: codec_mask = 05
1591 12:45:25.802954 HDA: Initializing codec #2
1592 12:45:25.806234 HDA: codec viddid: 8086280b
1593 12:45:25.808508 HDA: No verb table entry found
1594 12:45:25.811449 HDA: Initializing codec #0
1595 12:45:25.814748 HDA: codec viddid: 10ec0236
1596 12:45:25.821770 HDA: verb loaded.
1597 12:45:25.826080 PCI: 00:1f.3 init finished in 28835 usecs
1598 12:45:25.828057 PCI: 00:1f.4 init ...
1599 12:45:25.832310 PCI: 00:1f.4 init finished in 2245 usecs
1600 12:45:25.835933 PCI: 00:1f.6 init ...
1601 12:45:25.839590 PCI: 00:1f.6 init finished in 2236 usecs
1602 12:45:25.850464 PCI: 01:00.0 init ...
1603 12:45:25.854051 PCI: 01:00.0 init finished in 2235 usecs
1604 12:45:25.856755 PCI: 02:00.0 init ...
1605 12:45:25.861342 PCI: 02:00.0 init finished in 2237 usecs
1606 12:45:25.863722 PNP: 0c09.0 init ...
1607 12:45:25.867414 EC Label : 00.00.20
1608 12:45:25.871345 EC Revision : 9ca674bba
1609 12:45:25.874728 EC Model Num : 08B9
1610 12:45:25.879068 EC Build Date : 05/10/19
1611 12:45:25.888675 PNP: 0c09.0 init finished in 22769 usecs
1612 12:45:25.890863 Devices initialized
1613 12:45:25.893437 Show all devs... After init.
1614 12:45:25.896375 Root Device: enabled 1
1615 12:45:25.898944 CPU_CLUSTER: 0: enabled 1
1616 12:45:25.900967 DOMAIN: 0000: enabled 1
1617 12:45:25.902923 APIC: 00: enabled 1
1618 12:45:25.905050 PCI: 00:00.0: enabled 1
1619 12:45:25.908163 PCI: 00:02.0: enabled 1
1620 12:45:25.910343 PCI: 00:04.0: enabled 1
1621 12:45:25.912968 PCI: 00:12.0: enabled 1
1622 12:45:25.914983 PCI: 00:12.5: enabled 0
1623 12:45:25.917089 PCI: 00:12.6: enabled 0
1624 12:45:25.919651 PCI: 00:13.0: enabled 0
1625 12:45:25.922823 PCI: 00:14.0: enabled 1
1626 12:45:25.925442 PCI: 00:14.1: enabled 0
1627 12:45:25.927383 PCI: 00:14.3: enabled 1
1628 12:45:25.929452 PCI: 00:14.5: enabled 0
1629 12:45:25.932036 PCI: 00:15.0: enabled 1
1630 12:45:25.934499 PCI: 00:15.1: enabled 1
1631 12:45:25.937175 PCI: 00:15.2: enabled 0
1632 12:45:25.939789 PCI: 00:15.3: enabled 0
1633 12:45:25.942026 PCI: 00:16.0: enabled 0
1634 12:45:25.944427 PCI: 00:16.1: enabled 0
1635 12:45:25.946887 PCI: 00:16.2: enabled 0
1636 12:45:25.949261 PCI: 00:16.3: enabled 0
1637 12:45:25.951313 PCI: 00:16.4: enabled 0
1638 12:45:25.954209 PCI: 00:16.5: enabled 0
1639 12:45:25.956822 PCI: 00:17.0: enabled 1
1640 12:45:25.959219 PCI: 00:19.0: enabled 1
1641 12:45:25.961329 PCI: 00:19.1: enabled 0
1642 12:45:25.963753 PCI: 00:19.2: enabled 1
1643 12:45:25.966566 PCI: 00:1a.0: enabled 0
1644 12:45:25.969038 PCI: 00:1c.0: enabled 1
1645 12:45:25.971003 PCI: 00:1c.1: enabled 0
1646 12:45:25.973645 PCI: 00:1c.2: enabled 0
1647 12:45:25.976025 PCI: 00:1c.3: enabled 0
1648 12:45:25.978671 PCI: 00:1c.4: enabled 0
1649 12:45:25.981258 PCI: 00:1c.5: enabled 0
1650 12:45:25.983304 PCI: 00:1c.6: enabled 0
1651 12:45:25.985932 PCI: 00:1c.7: enabled 0
1652 12:45:25.987543 PCI: 00:1d.0: enabled 1
1653 12:45:25.990005 PCI: 00:1d.1: enabled 0
1654 12:45:25.993104 PCI: 00:1d.2: enabled 0
1655 12:45:25.995702 PCI: 00:1d.3: enabled 0
1656 12:45:25.998255 PCI: 00:1d.4: enabled 0
1657 12:45:26.000905 PCI: 00:1e.0: enabled 0
1658 12:45:26.002990 PCI: 00:1e.1: enabled 0
1659 12:45:26.005514 PCI: 00:1e.2: enabled 0
1660 12:45:26.008171 PCI: 00:1e.3: enabled 0
1661 12:45:26.009629 PCI: 00:1f.0: enabled 1
1662 12:45:26.012467 PCI: 00:1f.1: enabled 0
1663 12:45:26.015027 PCI: 00:1f.2: enabled 0
1664 12:45:26.016969 PCI: 00:1f.3: enabled 1
1665 12:45:26.019650 PCI: 00:1f.4: enabled 1
1666 12:45:26.022744 PCI: 00:1f.5: enabled 1
1667 12:45:26.024722 PCI: 00:1f.6: enabled 1
1668 12:45:26.026879 USB0 port 0: enabled 1
1669 12:45:26.028898 I2C: 01:10: enabled 1
1670 12:45:26.031868 I2C: 01:10: enabled 1
1671 12:45:26.033840 I2C: 01:34: enabled 1
1672 12:45:26.035819 I2C: 02:2c: enabled 1
1673 12:45:26.037832 I2C: 03:50: enabled 1
1674 12:45:26.040720 PNP: 0c09.0: enabled 1
1675 12:45:26.042898 USB2 port 0: enabled 1
1676 12:45:26.045261 USB2 port 1: enabled 1
1677 12:45:26.047770 USB2 port 2: enabled 1
1678 12:45:26.050062 USB2 port 4: enabled 1
1679 12:45:26.052729 USB2 port 5: enabled 1
1680 12:45:26.054680 USB2 port 6: enabled 1
1681 12:45:26.056605 USB2 port 7: enabled 1
1682 12:45:26.059186 USB2 port 8: enabled 1
1683 12:45:26.061210 USB2 port 9: enabled 1
1684 12:45:26.063813 USB3 port 0: enabled 1
1685 12:45:26.066670 USB3 port 1: enabled 1
1686 12:45:26.068052 USB3 port 2: enabled 1
1687 12:45:26.071032 USB3 port 3: enabled 1
1688 12:45:26.073432 USB3 port 4: enabled 1
1689 12:45:26.075135 APIC: 02: enabled 1
1690 12:45:26.077122 APIC: 06: enabled 1
1691 12:45:26.079026 APIC: 01: enabled 1
1692 12:45:26.081628 APIC: 03: enabled 1
1693 12:45:26.082829 APIC: 07: enabled 1
1694 12:45:26.085526 APIC: 04: enabled 1
1695 12:45:26.086984 APIC: 05: enabled 1
1696 12:45:26.089705 PCI: 00:08.0: enabled 1
1697 12:45:26.092754 PCI: 00:14.2: enabled 1
1698 12:45:26.094298 PCI: 01:00.0: enabled 1
1699 12:45:26.096944 PCI: 02:00.0: enabled 1
1700 12:45:26.102024 Disabling ACPI via APMC:
1701 12:45:26.104588 done.
1702 12:45:26.110456 ELOG: Event(92) added with size 9 at 2023-03-22 12:45:25 UTC
1703 12:45:26.117050 ELOG: Event(93) added with size 9 at 2023-03-22 12:45:25 UTC
1704 12:45:26.122875 ELOG: Event(9A) added with size 9 at 2023-03-22 12:45:25 UTC
1705 12:45:26.129031 ELOG: Event(9E) added with size 10 at 2023-03-22 12:45:25 UTC
1706 12:45:26.135061 ELOG: Event(9F) added with size 14 at 2023-03-22 12:45:25 UTC
1707 12:45:26.140977 BS: BS_DEV_INIT times (us): entry 0 run 463821 exit 38304
1708 12:45:26.147353 ELOG: Event(A1) added with size 10 at 2023-03-22 12:45:25 UTC
1709 12:45:26.155025 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1710 12:45:26.161737 ELOG: Event(A0) added with size 9 at 2023-03-22 12:45:25 UTC
1711 12:45:26.165621 elog_add_boot_reason: Logged dev mode boot
1712 12:45:26.167784 Finalize devices...
1713 12:45:26.170554 PCI: 00:17.0 final
1714 12:45:26.172416 Devices finalized
1715 12:45:26.176951 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1716 12:45:26.183091 BS: BS_POST_DEVICE times (us): entry 24773 run 5936 exit 5362
1717 12:45:26.188667 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1718 12:45:26.197162 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1719 12:45:26.202255 disable_unused_touchscreen: Disable ACPI0C50
1720 12:45:26.206933 disable_unused_touchscreen: Enable ELAN900C
1721 12:45:26.209435 CBFS @ 1d00000 size 300000
1722 12:45:26.215863 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1723 12:45:26.218809 CBFS: Locating 'fallback/dsdt.aml'
1724 12:45:26.223311 CBFS: Found @ offset 10b200 size 4448
1725 12:45:26.226592 CBFS @ 1d00000 size 300000
1726 12:45:26.232543 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1727 12:45:26.235326 CBFS: Locating 'fallback/slic'
1728 12:45:26.240189 CBFS: 'fallback/slic' not found.
1729 12:45:26.244546 ACPI: Writing ACPI tables at 89c0f000.
1730 12:45:26.245864 ACPI: * FACS
1731 12:45:26.248263 ACPI: * DSDT
1732 12:45:26.250977 Ramoops buffer: 0x100000@0x89b0e000.
1733 12:45:26.256746 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1734 12:45:26.261236 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1735 12:45:26.264385 ACPI: * FADT
1736 12:45:26.265888 SCI is IRQ9
1737 12:45:26.269710 ACPI: added table 1/32, length now 40
1738 12:45:26.271722 ACPI: * SSDT
1739 12:45:26.275433 Found 1 CPU(s) with 8 core(s) each.
1740 12:45:26.279659 Error: Could not locate 'wifi_sar' in VPD.
1741 12:45:26.283355 Error: failed from getting SAR limits!
1742 12:45:26.286731 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1743 12:45:26.291445 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1744 12:45:26.295363 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1745 12:45:26.299698 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1746 12:45:26.304959 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1747 12:45:26.310169 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1748 12:45:26.314982 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1749 12:45:26.319757 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1750 12:45:26.324616 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1751 12:45:26.331142 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1752 12:45:26.336643 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1753 12:45:26.343010 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1754 12:45:26.347545 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1755 12:45:26.352139 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1756 12:45:26.356611 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1757 12:45:26.361420 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1758 12:45:26.366615 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 12:45:26.372005 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 12:45:26.378770 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1761 12:45:26.384505 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 12:45:26.390237 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1763 12:45:26.394474 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1764 12:45:26.398611 ACPI: added table 2/32, length now 44
1765 12:45:26.400434 ACPI: * MCFG
1766 12:45:26.404684 ACPI: added table 3/32, length now 48
1767 12:45:26.405545 ACPI: * TPM2
1768 12:45:26.408674 TPM2 log created at 89afe000
1769 12:45:26.412223 ACPI: added table 4/32, length now 52
1770 12:45:26.414586 ACPI: * MADT
1771 12:45:26.415311 SCI is IRQ9
1772 12:45:26.418879 ACPI: added table 5/32, length now 56
1773 12:45:26.420861 current = 89c14bd0
1774 12:45:26.423509 ACPI: * IGD OpRegion
1775 12:45:26.425533 GMA: Found VBT in CBFS
1776 12:45:26.429162 GMA: Found valid VBT in CBFS
1777 12:45:26.432584 ACPI: added table 6/32, length now 60
1778 12:45:26.434554 ACPI: * HPET
1779 12:45:26.438026 ACPI: added table 7/32, length now 64
1780 12:45:26.439201 ACPI: done.
1781 12:45:26.442414 ACPI tables: 31872 bytes.
1782 12:45:26.444612 smbios_write_tables: 89afd000
1783 12:45:26.447117 recv_ec_data: 0x01
1784 12:45:26.449610 Create SMBIOS type 17
1785 12:45:26.452357 PCI: 00:14.3 (Intel WiFi)
1786 12:45:26.454848 SMBIOS tables: 708 bytes.
1787 12:45:26.458764 Writing table forward entry at 0x00000500
1788 12:45:26.465193 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1789 12:45:26.468026 Writing coreboot table at 0x89c33000
1790 12:45:26.474427 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 12:45:26.478766 1. 0000000000001000-000000000009ffff: RAM
1792 12:45:26.483214 2. 00000000000a0000-00000000000fffff: RESERVED
1793 12:45:26.487396 3. 0000000000100000-0000000089afcfff: RAM
1794 12:45:26.493380 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1795 12:45:26.498215 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1796 12:45:26.504625 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1797 12:45:26.509568 7. 000000008a000000-000000008f7fffff: RESERVED
1798 12:45:26.513971 8. 00000000e0000000-00000000efffffff: RESERVED
1799 12:45:26.518395 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 12:45:26.523544 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 12:45:26.528378 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 12:45:26.533334 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 12:45:26.537935 13. 00000000feda0000-00000000feda1fff: RESERVED
1804 12:45:26.542553 14. 0000000100000000-000000026e7fffff: RAM
1805 12:45:26.546529 Graphics framebuffer located at 0xc0000000
1806 12:45:26.548782 Passing 6 GPIOs to payload:
1807 12:45:26.554552 NAME | PORT | POLARITY | VALUE
1808 12:45:26.559367 write protect | 0x000000dc | high | low
1809 12:45:26.564573 recovery | 0x000000d5 | low | high
1810 12:45:26.570176 lid | undefined | high | high
1811 12:45:26.575449 power | undefined | high | low
1812 12:45:26.580874 oprom | undefined | high | low
1813 12:45:26.585922 EC in RW | undefined | high | low
1814 12:45:26.587843 recv_ec_data: 0x01
1815 12:45:26.589136 SKU ID: 3
1816 12:45:26.592084 CBFS @ 1d00000 size 300000
1817 12:45:26.597943 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1818 12:45:26.604597 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum bb28
1819 12:45:26.607762 coreboot table: 1484 bytes.
1820 12:45:26.610876 IMD ROOT 0. 89fff000 00001000
1821 12:45:26.613414 IMD SMALL 1. 89ffe000 00001000
1822 12:45:26.617191 FSP MEMORY 2. 89d0e000 002f0000
1823 12:45:26.620513 CONSOLE 3. 89cee000 00020000
1824 12:45:26.624051 TIME STAMP 4. 89ced000 00000910
1825 12:45:26.626839 VBOOT WORK 5. 89cea000 00003000
1826 12:45:26.630548 VBOOT 6. 89ce9000 00000c0c
1827 12:45:26.633834 MRC DATA 7. 89ce7000 000018f0
1828 12:45:26.637220 ROMSTG STCK 8. 89ce6000 00000400
1829 12:45:26.641105 AFTER CAR 9. 89cdc000 0000a000
1830 12:45:26.643656 RAMSTAGE 10. 89c80000 0005c000
1831 12:45:26.647127 REFCODE 11. 89c4b000 00035000
1832 12:45:26.650293 SMM BACKUP 12. 89c3b000 00010000
1833 12:45:26.654286 COREBOOT 13. 89c33000 00008000
1834 12:45:26.657173 ACPI 14. 89c0f000 00024000
1835 12:45:26.660155 ACPI GNVS 15. 89c0e000 00001000
1836 12:45:26.664067 RAMOOPS 16. 89b0e000 00100000
1837 12:45:26.667355 TPM2 TCGLOG17. 89afe000 00010000
1838 12:45:26.670117 SMBIOS 18. 89afd000 00000800
1839 12:45:26.672074 IMD small region:
1840 12:45:26.675789 IMD ROOT 0. 89ffec00 00000400
1841 12:45:26.679244 FSP RUNTIME 1. 89ffebe0 00000004
1842 12:45:26.682541 POWER STATE 2. 89ffeba0 00000040
1843 12:45:26.686305 ROMSTAGE 3. 89ffeb80 00000004
1844 12:45:26.689123 MEM INFO 4. 89ffe9c0 000001a9
1845 12:45:26.692743 VPD 5. 89ffe980 00000031
1846 12:45:26.696962 COREBOOTFWD 6. 89ffe940 00000028
1847 12:45:26.700105 MTRR: Physical address space:
1848 12:45:26.705998 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 12:45:26.711851 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 12:45:26.718063 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1851 12:45:26.724771 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1852 12:45:26.730794 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 12:45:26.736984 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 12:45:26.743595 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1855 12:45:26.747526 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 12:45:26.751470 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 12:45:26.755545 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 12:45:26.759311 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 12:45:26.763859 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 12:45:26.767749 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 12:45:26.771648 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 12:45:26.775832 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 12:45:26.779718 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 12:45:26.784481 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 12:45:26.788545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 12:45:26.791737 call enable_fixed_mtrr()
1867 12:45:26.795210 CPU physical address size: 39 bits
1868 12:45:26.799716 MTRR: default type WB/UC MTRR counts: 7/7.
1869 12:45:26.802818 MTRR: UC selected as default type.
1870 12:45:26.809451 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1871 12:45:26.815457 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1872 12:45:26.821372 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1873 12:45:26.827609 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1874 12:45:26.833671 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 12:45:26.840282 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1876 12:45:26.845823 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1877 12:45:26.847602
1878 12:45:26.848488 MTRR check
1879 12:45:26.851565 Fixed MTRRs : Enabled
1880 12:45:26.853649 Variable MTRRs: Enabled
1881 12:45:26.854298
1882 12:45:26.858293 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 12:45:26.862291 MTRR: Fixed MSR 0x258 0x0606060606060606
1884 12:45:26.866483 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 12:45:26.870490 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 12:45:26.874707 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 12:45:26.878840 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 12:45:26.882165 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 12:45:26.886641 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 12:45:26.890127 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 12:45:26.894275 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 12:45:26.898460 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 12:45:26.905213 BS: BS_WRITE_TABLES times (us): entry 17194 run 490223 exit 157180
1894 12:45:26.907822 call enable_fixed_mtrr()
1895 12:45:26.910269 CBFS @ 1d00000 size 300000
1896 12:45:26.917312 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1897 12:45:26.920359 CPU physical address size: 39 bits
1898 12:45:26.924368 CBFS: Locating 'fallback/payload'
1899 12:45:26.928327 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 12:45:26.932474 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 12:45:26.936262 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 12:45:26.940713 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 12:45:26.944735 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 12:45:26.948753 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 12:45:26.952666 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 12:45:26.957113 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 12:45:26.961052 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 12:45:26.964926 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 12:45:26.968987 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 12:45:26.972847 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 12:45:26.977412 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 12:45:26.979841 call enable_fixed_mtrr()
1913 12:45:26.984482 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 12:45:26.988594 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 12:45:26.993176 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 12:45:26.996195 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 12:45:27.000403 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 12:45:27.004814 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 12:45:27.008753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 12:45:27.012785 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 12:45:27.016983 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 12:45:27.020557 CPU physical address size: 39 bits
1923 12:45:27.023793 call enable_fixed_mtrr()
1924 12:45:27.027573 CBFS: Found @ offset 1cf4c0 size 3a954
1925 12:45:27.031158 CPU physical address size: 39 bits
1926 12:45:27.035468 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 12:45:27.039655 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 12:45:27.043370 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 12:45:27.047797 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 12:45:27.051210 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 12:45:27.055214 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 12:45:27.059746 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 12:45:27.063761 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 12:45:27.068393 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 12:45:27.071849 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 12:45:27.076398 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 12:45:27.080634 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 12:45:27.084084 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 12:45:27.086846 call enable_fixed_mtrr()
1940 12:45:27.091321 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 12:45:27.095791 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 12:45:27.099691 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 12:45:27.103565 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 12:45:27.107649 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 12:45:27.111125 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 12:45:27.115125 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 12:45:27.119449 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 12:45:27.123371 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 12:45:27.127436 CPU physical address size: 39 bits
1950 12:45:27.130579 call enable_fixed_mtrr()
1951 12:45:27.134820 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 12:45:27.138745 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 12:45:27.142572 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 12:45:27.146912 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 12:45:27.150933 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 12:45:27.154495 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 12:45:27.158643 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 12:45:27.163191 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 12:45:27.167410 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 12:45:27.171009 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 12:45:27.175943 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 12:45:27.179489 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 12:45:27.183375 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 12:45:27.186080 call enable_fixed_mtrr()
1965 12:45:27.190928 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 12:45:27.194247 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 12:45:27.198799 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 12:45:27.202781 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 12:45:27.207587 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 12:45:27.211564 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 12:45:27.215089 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 12:45:27.219514 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 12:45:27.223400 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 12:45:27.226569 CPU physical address size: 39 bits
1975 12:45:27.229711 call enable_fixed_mtrr()
1976 12:45:27.234261 Checking segment from ROM address 0xffecf4f8
1977 12:45:27.237834 CPU physical address size: 39 bits
1978 12:45:27.242769 Checking segment from ROM address 0xffecf514
1979 12:45:27.245893 CPU physical address size: 39 bits
1980 12:45:27.249832 Loading segment from ROM address 0xffecf4f8
1981 12:45:27.252796 code (compression=0)
1982 12:45:27.261250 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1983 12:45:27.270013 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1984 12:45:27.271787 it's not compressed!
1985 12:45:27.353171 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1986 12:45:27.360387 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1987 12:45:27.368835 Loading segment from ROM address 0xffecf514
1988 12:45:27.371227 Entry Point 0x30100018
1989 12:45:27.372377 Loaded segments
1990 12:45:27.376861 Finalizing chipset.
1991 12:45:27.378157 Finalizing SMM.
1992 12:45:27.385033 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466985 exit 5977
1993 12:45:27.387673 mp_park_aps done after 0 msecs.
1994 12:45:27.391669 Jumping to boot code at 30100018(89c33000)
1995 12:45:27.401344 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1996 12:45:27.401453
1997 12:45:27.401548
1998 12:45:27.401621
1999 12:45:27.404482 Starting depthcharge on sarien...
2000 12:45:27.404582
2001 12:45:27.405190 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
2002 12:45:27.405309 start: 2.2.4 bootloader-commands (timeout 00:04:11) [common]
2003 12:45:27.405407 Setting prompt string to ['sarien:']
2004 12:45:27.405497 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:11)
2005 12:45:27.412199 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 12:45:27.412300
2007 12:45:27.419692 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 12:45:27.420421
2009 12:45:27.427649 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2010 12:45:27.427751
2011 12:45:27.429611 BIOS MMAP details:
2012 12:45:27.429708
2013 12:45:27.432103 IFD Base Offset : 0x1000000
2014 12:45:27.433020
2015 12:45:27.434912 IFD End Offset : 0x2000000
2016 12:45:27.435974
2017 12:45:27.438215 MMAP Size : 0x1000000
2018 12:45:27.438303
2019 12:45:27.440736 MMAP Start : 0xff000000
2020 12:45:27.442034
2021 12:45:27.448033 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2022 12:45:27.451908
2023 12:45:27.456083 New NVMe Controller 0x3214e128 @ 00:1d:04
2024 12:45:27.456200
2025 12:45:27.460960 New NVMe Controller 0x3214e1f0 @ 00:1d:00
2026 12:45:27.461245
2027 12:45:27.466699 The GBB signature is at 0x30000014 and is: 24 47 42 42
2028 12:45:27.470216
2029 12:45:27.472729 Wipe memory regions:
2030 12:45:27.472821
2031 12:45:27.476520 [0x00000000001000, 0x000000000a0000)
2032 12:45:27.476620
2033 12:45:27.480302 [0x00000000100000, 0x00000030000000)
2034 12:45:27.562312
2035 12:45:27.565511 [0x00000032751910, 0x00000089afd000)
2036 12:45:27.715659
2037 12:45:27.719057 [0x00000100000000, 0x0000026e800000)
2038 12:45:28.729487
2039 12:45:28.732115 R8152: Initializing
2040 12:45:28.732249
2041 12:45:28.734621 Version 6 (ocp_data = 5c30)
2042 12:45:28.735247
2043 12:45:28.738468 R8152: Done initializing
2044 12:45:28.738599
2045 12:45:28.740354 Adding net device
2046 12:45:28.740449
2047 12:45:28.745724 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2048 12:45:28.745854
2049 12:45:28.745932
2050 12:45:28.746006
2051 12:45:28.746907 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 12:45:28.847686 sarien:tftpboot 192.168.201.1 9729665/tftp-deploy-n1y37feo/kernel/bzImage 9729665/tftp-deploy-n1y37feo/kernel/cmdline 9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
2054 12:45:28.847928 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 12:45:28.848066 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:10)
2056 12:45:28.849624 tftpboot 192.168.201.1 9729665/tftp-deploy-n1y37feo/kernel/bzImage 9729665/tftp-deploy-n1y37feo/kernel/cmdline 9729665/tftp-deploy-n1y37feo/ramdisk/ramdisk.cpio.gz
2057 12:45:28.849769
2058 12:45:28.850966 Waiting for link
2059 12:45:29.051202
2060 12:45:29.051787 done.
2061 12:45:29.051927
2062 12:45:29.054251 MAC: 00:24:32:30:7b:ce
2063 12:45:29.054411
2064 12:45:29.056939 Sending DHCP discover... done.
2065 12:45:29.057116
2066 12:45:29.059872 Waiting for reply... done.
2067 12:45:29.060040
2068 12:45:29.062909 Sending DHCP request... done.
2069 12:45:29.063101
2070 12:45:29.065244 Waiting for reply... done.
2071 12:45:29.065908
2072 12:45:29.068062 My ip is 192.168.201.162
2073 12:45:29.068232
2074 12:45:29.071587 The DHCP server ip is 192.168.201.1
2075 12:45:29.072291
2076 12:45:29.076597 TFTP server IP predefined by user: 192.168.201.1
2077 12:45:29.076749
2078 12:45:29.083032 Bootfile predefined by user: 9729665/tftp-deploy-n1y37feo/kernel/bzImage
2079 12:45:29.084341
2080 12:45:29.086993 Sending tftp read request... done.
2081 12:45:29.087138
2082 12:45:29.090589 Waiting for the transfer...
2083 12:45:29.091218
2084 12:45:29.610421 00000000 ################################################################
2085 12:45:29.610623
2086 12:45:30.129778 00080000 ################################################################
2087 12:45:30.130950
2088 12:45:30.650001 00100000 ################################################################
2089 12:45:30.650442
2090 12:45:31.172396 00180000 ################################################################
2091 12:45:31.173012
2092 12:45:31.687511 00200000 ################################################################
2093 12:45:31.687723
2094 12:45:32.207363 00280000 ################################################################
2095 12:45:32.207986
2096 12:45:32.726833 00300000 ################################################################
2097 12:45:32.727437
2098 12:45:33.257020 00380000 ################################################################
2099 12:45:33.257552
2100 12:45:33.785613 00400000 ################################################################
2101 12:45:33.786000
2102 12:45:34.317134 00480000 ################################################################
2103 12:45:34.317542
2104 12:45:34.844089 00500000 ################################################################
2105 12:45:34.844705
2106 12:45:35.370693 00580000 ################################################################
2107 12:45:35.371288
2108 12:45:35.893292 00600000 ################################################################
2109 12:45:35.894192
2110 12:45:36.406047 00680000 ################################################################
2111 12:45:36.406520
2112 12:45:36.911992 00700000 ################################################################
2113 12:45:36.912621
2114 12:45:37.429166 00780000 ################################################################
2115 12:45:37.429742
2116 12:45:37.951619 00800000 ################################################################
2117 12:45:37.952777
2118 12:45:38.474327 00880000 ################################################################
2119 12:45:38.474876
2120 12:45:39.000118 00900000 ################################################################
2121 12:45:39.000655
2122 12:45:39.536715 00980000 ################################################################
2123 12:45:39.537864
2124 12:45:40.054343 00a00000 ################################################################
2125 12:45:40.055230
2126 12:45:40.588958 00a80000 ################################################################
2127 12:45:40.589855
2128 12:45:40.706981 00b00000 ############## done.
2129 12:45:40.707413
2130 12:45:40.710337 The bootfile was 11646080 bytes long.
2131 12:45:40.711214
2132 12:45:40.714253 Sending tftp read request... done.
2133 12:45:40.714727
2134 12:45:40.717701 Waiting for the transfer...
2135 12:45:40.717837
2136 12:45:41.253532 00000000 ################################################################
2137 12:45:41.253706
2138 12:45:41.778565 00080000 ################################################################
2139 12:45:41.778736
2140 12:45:42.317426 00100000 ################################################################
2141 12:45:42.317957
2142 12:45:42.861453 00180000 ################################################################
2143 12:45:42.862065
2144 12:45:43.408452 00200000 ################################################################
2145 12:45:43.408977
2146 12:45:43.931184 00280000 ################################################################
2147 12:45:43.931873
2148 12:45:44.481890 00300000 ################################################################
2149 12:45:44.482115
2150 12:45:45.008111 00380000 ################################################################
2151 12:45:45.008765
2152 12:45:45.536086 00400000 ################################################################
2153 12:45:45.536701
2154 12:45:46.051111 00480000 ################################################################
2155 12:45:46.051717
2156 12:45:46.568556 00500000 ################################################################
2157 12:45:46.568996
2158 12:45:46.960639 00580000 ################################################# done.
2159 12:45:46.960800
2160 12:45:46.963804 Sending tftp read request... done.
2161 12:45:46.964428
2162 12:45:46.967015 Waiting for the transfer...
2163 12:45:46.967160
2164 12:45:46.968695 00000000 # done.
2165 12:45:46.968824
2166 12:45:46.977822 Command line loaded dynamically from TFTP file: 9729665/tftp-deploy-n1y37feo/kernel/cmdline
2167 12:45:46.977970
2168 12:45:47.003693 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729665/extract-nfsrootfs-jdgptpx5,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2169 12:45:47.007965
2170 12:45:47.011416 Shutting down all USB controllers.
2171 12:45:47.011816
2172 12:45:47.014730 Removing current net device
2173 12:45:47.015422
2174 12:45:47.018436 EC: exit firmware mode
2175 12:45:47.019035
2176 12:45:47.021149 Finalizing coreboot
2177 12:45:47.021661
2178 12:45:47.027508 Exiting depthcharge with code 4 at timestamp: 45005649
2179 12:45:47.027618
2180 12:45:47.027696
2181 12:45:47.029976 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2182 12:45:47.030109 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2183 12:45:47.030200 Setting prompt string to ['Linux version [0-9]']
2184 12:45:47.030281 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2185 12:45:47.030361 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2186 12:45:47.030570 Starting kernel ...
2187 12:45:47.030654
2188 12:45:47.030726
2190 12:49:38.030372 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2192 12:49:38.030611 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2194 12:49:38.030793 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2197 12:49:38.031096 end: 2 depthcharge-action (duration 00:05:00) [common]
2199 12:49:38.031352 Cleaning after the job
2200 12:49:38.031451 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/ramdisk
2201 12:49:38.031995 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/kernel
2202 12:49:38.032953 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/nfsrootfs
2203 12:49:38.067136 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729665/tftp-deploy-n1y37feo/modules
2204 12:49:38.067622 start: 5.1 power-off (timeout 00:00:30) [common]
2205 12:49:38.067806 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
2206 12:49:45.403253 >> Command sent successfully.
2207 12:49:45.405764 Returned 0 in 7 seconds
2208 12:49:45.506677 end: 5.1 power-off (duration 00:00:07) [common]
2210 12:49:45.507285 start: 5.2 read-feedback (timeout 00:09:53) [common]
2211 12:49:45.507736 Listened to connection for namespace 'common' for up to 1s
2212 12:49:46.511379 Finalising connection for namespace 'common'
2213 12:49:46.512065 Disconnecting from shell: Finalise
2214 12:49:46.512628
2215 12:49:46.614177 end: 5.2 read-feedback (duration 00:00:01) [common]
2216 12:49:46.614835 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729665
2217 12:49:46.750160 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729665
2218 12:49:46.750372 JobError: Your job cannot terminate cleanly.