Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:11.568753 lava-dispatcher, installed at version: 2023.01
2 12:44:11.568955 start: 0 validate
3 12:44:11.569077 Start time: 2023-03-22 12:44:11.569071+00:00 (UTC)
4 12:44:11.569202 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:11.569440 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:11.856866 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:11.857037 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:12.149651 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:12.150369 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:16.214000 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:16.214709 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:17.220764 validate duration: 5.65
14 12:44:17.221101 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:17.221215 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:17.221318 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:17.221414 Not decompressing ramdisk as can be used compressed.
18 12:44:17.221496 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230317.0/amd64/initrd.cpio.gz
19 12:44:17.221568 saving as /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/ramdisk/initrd.cpio.gz
20 12:44:17.221633 total size: 5432124 (5MB)
21 12:44:17.222523 progress 0% (0MB)
22 12:44:17.223999 progress 5% (0MB)
23 12:44:17.225366 progress 10% (0MB)
24 12:44:17.226731 progress 15% (0MB)
25 12:44:17.228184 progress 20% (1MB)
26 12:44:17.229540 progress 25% (1MB)
27 12:44:17.230869 progress 30% (1MB)
28 12:44:17.232376 progress 35% (1MB)
29 12:44:17.233673 progress 40% (2MB)
30 12:44:17.235015 progress 45% (2MB)
31 12:44:17.236306 progress 50% (2MB)
32 12:44:17.237847 progress 55% (2MB)
33 12:44:17.239203 progress 60% (3MB)
34 12:44:17.240557 progress 65% (3MB)
35 12:44:17.242048 progress 70% (3MB)
36 12:44:17.243362 progress 75% (3MB)
37 12:44:17.244699 progress 80% (4MB)
38 12:44:17.246006 progress 85% (4MB)
39 12:44:17.247445 progress 90% (4MB)
40 12:44:17.248797 progress 95% (4MB)
41 12:44:17.250106 progress 100% (5MB)
42 12:44:17.250308 5MB downloaded in 0.03s (180.69MB/s)
43 12:44:17.250460 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:17.250705 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:17.250793 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:17.250878 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:17.250987 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:17.251074 saving as /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/kernel/bzImage
50 12:44:17.251137 total size: 11646080 (11MB)
51 12:44:17.251197 No compression specified
52 12:44:17.252129 progress 0% (0MB)
53 12:44:17.254919 progress 5% (0MB)
54 12:44:17.257997 progress 10% (1MB)
55 12:44:17.261123 progress 15% (1MB)
56 12:44:17.264067 progress 20% (2MB)
57 12:44:17.266823 progress 25% (2MB)
58 12:44:17.269783 progress 30% (3MB)
59 12:44:17.272686 progress 35% (3MB)
60 12:44:17.275574 progress 40% (4MB)
61 12:44:17.278332 progress 45% (5MB)
62 12:44:17.281249 progress 50% (5MB)
63 12:44:17.284105 progress 55% (6MB)
64 12:44:17.287051 progress 60% (6MB)
65 12:44:17.289911 progress 65% (7MB)
66 12:44:17.292736 progress 70% (7MB)
67 12:44:17.295882 progress 75% (8MB)
68 12:44:17.299005 progress 80% (8MB)
69 12:44:17.301959 progress 85% (9MB)
70 12:44:17.304743 progress 90% (10MB)
71 12:44:17.307634 progress 95% (10MB)
72 12:44:17.310503 progress 100% (11MB)
73 12:44:17.310669 11MB downloaded in 0.06s (186.58MB/s)
74 12:44:17.310835 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:17.311088 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:17.311177 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:17.311263 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:17.311368 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230317.0/amd64/full.rootfs.tar.xz
80 12:44:17.311438 saving as /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/nfsrootfs/full.rootfs.tar
81 12:44:17.311499 total size: 207197968 (197MB)
82 12:44:17.311559 Using unxz to decompress xz
83 12:44:17.314639 progress 0% (0MB)
84 12:44:17.889022 progress 5% (9MB)
85 12:44:18.438467 progress 10% (19MB)
86 12:44:19.043797 progress 15% (29MB)
87 12:44:19.428695 progress 20% (39MB)
88 12:44:19.795484 progress 25% (49MB)
89 12:44:20.390311 progress 30% (59MB)
90 12:44:20.953712 progress 35% (69MB)
91 12:44:21.562571 progress 40% (79MB)
92 12:44:22.120365 progress 45% (88MB)
93 12:44:22.697160 progress 50% (98MB)
94 12:44:23.319820 progress 55% (108MB)
95 12:44:24.005402 progress 60% (118MB)
96 12:44:24.148680 progress 65% (128MB)
97 12:44:24.301415 progress 70% (138MB)
98 12:44:24.394046 progress 75% (148MB)
99 12:44:24.471042 progress 80% (158MB)
100 12:44:24.539113 progress 85% (167MB)
101 12:44:24.651061 progress 90% (177MB)
102 12:44:24.915524 progress 95% (187MB)
103 12:44:25.506582 progress 100% (197MB)
104 12:44:25.511630 197MB downloaded in 8.20s (24.10MB/s)
105 12:44:25.511919 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:44:25.512187 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:44:25.512287 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:44:25.512416 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:44:25.512532 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:44:25.512605 saving as /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/modules/modules.tar
112 12:44:25.512668 total size: 497788 (0MB)
113 12:44:25.512731 Using unxz to decompress xz
114 12:44:25.515827 progress 6% (0MB)
115 12:44:25.516218 progress 13% (0MB)
116 12:44:25.516495 progress 19% (0MB)
117 12:44:25.517758 progress 26% (0MB)
118 12:44:25.519722 progress 32% (0MB)
119 12:44:25.521912 progress 39% (0MB)
120 12:44:25.523676 progress 46% (0MB)
121 12:44:25.525587 progress 52% (0MB)
122 12:44:25.527893 progress 59% (0MB)
123 12:44:25.529823 progress 65% (0MB)
124 12:44:25.531812 progress 72% (0MB)
125 12:44:25.533687 progress 78% (0MB)
126 12:44:25.535629 progress 85% (0MB)
127 12:44:25.537628 progress 92% (0MB)
128 12:44:25.539444 progress 98% (0MB)
129 12:44:25.546396 0MB downloaded in 0.03s (14.08MB/s)
130 12:44:25.546676 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:44:25.546946 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:44:25.547043 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:44:25.547146 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:44:27.559991 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729651/extract-nfsrootfs-y7yduoa1
136 12:44:27.560189 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:44:27.560293 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:44:27.560444 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn
139 12:44:27.560549 makedir: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin
140 12:44:27.560637 makedir: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/tests
141 12:44:27.560719 makedir: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/results
142 12:44:27.560820 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-add-keys
143 12:44:27.560946 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-add-sources
144 12:44:27.561059 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-background-process-start
145 12:44:27.561174 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-background-process-stop
146 12:44:27.561285 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-common-functions
147 12:44:27.561394 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-echo-ipv4
148 12:44:27.561505 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-install-packages
149 12:44:27.561614 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-installed-packages
150 12:44:27.561722 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-os-build
151 12:44:27.561831 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-probe-channel
152 12:44:27.561940 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-probe-ip
153 12:44:27.562049 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-target-ip
154 12:44:27.562157 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-target-mac
155 12:44:27.562265 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-target-storage
156 12:44:27.562377 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-case
157 12:44:27.562486 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-event
158 12:44:27.562597 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-feedback
159 12:44:27.562712 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-raise
160 12:44:27.562819 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-reference
161 12:44:27.562926 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-runner
162 12:44:27.563033 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-set
163 12:44:27.563140 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-test-shell
164 12:44:27.563250 Updating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-add-keys (debian)
165 12:44:27.563366 Updating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-add-sources (debian)
166 12:44:27.563477 Updating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-install-packages (debian)
167 12:44:27.563589 Updating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-installed-packages (debian)
168 12:44:27.563699 Updating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/bin/lava-os-build (debian)
169 12:44:27.563799 Creating /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/environment
170 12:44:27.563926 LAVA metadata
171 12:44:27.564001 - LAVA_JOB_ID=9729651
172 12:44:27.564068 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:44:27.564166 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
174 12:44:27.564233 skipped lava-vland-overlay
175 12:44:27.564433 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:44:27.564521 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
177 12:44:27.564585 skipped lava-multinode-overlay
178 12:44:27.564662 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:44:27.564744 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
180 12:44:27.564818 Loading test definitions
181 12:44:27.564911 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
182 12:44:27.564982 Using /lava-9729651 at stage 0
183 12:44:27.565206 uuid=9729651_1.5.2.3.1 testdef=None
184 12:44:27.565294 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:44:27.565381 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
186 12:44:27.565784 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:44:27.566015 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
189 12:44:27.566489 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:44:27.566725 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
192 12:44:27.567176 runner path: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/0/tests/0_timesync-off test_uuid 9729651_1.5.2.3.1
193 12:44:27.567320 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:44:27.567554 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
196 12:44:27.567628 Using /lava-9729651 at stage 0
197 12:44:27.567741 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:44:27.567827 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/0/tests/1_kselftest-futex'
199 12:44:34.744706 Running '/usr/bin/git checkout kernelci.org
200 12:44:34.882426 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 12:44:34.883124 uuid=9729651_1.5.2.3.5 testdef=None
202 12:44:34.883316 end: 1.5.2.3.5 git-repo-action (duration 00:00:07) [common]
204 12:44:34.883569 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
205 12:44:34.884282 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:44:34.884567 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
208 12:44:34.885522 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:44:34.885778 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
211 12:44:34.886650 runner path: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/0/tests/1_kselftest-futex test_uuid 9729651_1.5.2.3.5
212 12:44:34.886744 BOARD='asus-C436FA-Flip-hatch'
213 12:44:34.886815 BRANCH='cip-gitlab'
214 12:44:34.886882 SKIPFILE='skipfile-lkft.yaml'
215 12:44:34.886944 SKIP_INSTALL='True'
216 12:44:34.887003 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kselftest.tar.xz'
217 12:44:34.887063 TST_CASENAME=''
218 12:44:34.887121 TST_CMDFILES='futex'
219 12:44:34.887257 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:44:34.887473 Creating lava-test-runner.conf files
222 12:44:34.887538 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729651/lava-overlay-v8e7rpdn/lava-9729651/0 for stage 0
223 12:44:34.887623 - 0_timesync-off
224 12:44:34.887693 - 1_kselftest-futex
225 12:44:34.887785 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
226 12:44:34.887878 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
227 12:44:42.508920 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 12:44:42.509082 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
229 12:44:42.509179 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:44:42.509280 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
231 12:44:42.509376 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
232 12:44:42.611760 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:44:42.612120 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
234 12:44:42.612235 extracting modules file /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729651/extract-nfsrootfs-y7yduoa1
235 12:44:42.624816 extracting modules file /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729651/extract-overlay-ramdisk-4tcv4761/ramdisk
236 12:44:42.637388 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:44:42.637527 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
238 12:44:42.637621 [common] Applying overlay to NFS
239 12:44:42.637694 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729651/compress-overlay-d9cxuuvj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729651/extract-nfsrootfs-y7yduoa1
240 12:44:43.413898 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:44:43.414061 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
242 12:44:43.414159 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:44:43.414252 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
244 12:44:43.414339 Building ramdisk /var/lib/lava/dispatcher/tmp/9729651/extract-overlay-ramdisk-4tcv4761/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729651/extract-overlay-ramdisk-4tcv4761/ramdisk
245 12:44:43.454988 >> 30091 blocks
246 12:44:43.998762 rename /var/lib/lava/dispatcher/tmp/9729651/extract-overlay-ramdisk-4tcv4761/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
247 12:44:43.999167 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:44:43.999287 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 12:44:43.999387 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 12:44:43.999485 No mkimage arch provided, not using FIT.
251 12:44:43.999574 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:44:43.999662 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:44:43.999765 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 12:44:43.999859 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 12:44:43.999943 No LXC device requested
256 12:44:44.000024 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:44:44.000117 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 12:44:44.000202 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:44:44.000272 Checking files for TFTP limit of 4294967296 bytes.
260 12:44:44.000683 end: 1 tftp-deploy (duration 00:00:27) [common]
261 12:44:44.000791 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:44:44.000886 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:44:44.001017 substitutions:
264 12:44:44.001088 - {DTB}: None
265 12:44:44.001154 - {INITRD}: 9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
266 12:44:44.001214 - {KERNEL}: 9729651/tftp-deploy-uwgtmfrs/kernel/bzImage
267 12:44:44.001273 - {LAVA_MAC}: None
268 12:44:44.001330 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729651/extract-nfsrootfs-y7yduoa1
269 12:44:44.001388 - {NFS_SERVER_IP}: 192.168.201.1
270 12:44:44.001445 - {PRESEED_CONFIG}: None
271 12:44:44.001503 - {PRESEED_LOCAL}: None
272 12:44:44.001559 - {RAMDISK}: 9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
273 12:44:44.001615 - {ROOT_PART}: None
274 12:44:44.001670 - {ROOT}: None
275 12:44:44.001725 - {SERVER_IP}: 192.168.201.1
276 12:44:44.001781 - {TEE}: None
277 12:44:44.001837 Parsed boot commands:
278 12:44:44.001892 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:44:44.002047 Parsed boot commands: tftpboot 192.168.201.1 9729651/tftp-deploy-uwgtmfrs/kernel/bzImage 9729651/tftp-deploy-uwgtmfrs/kernel/cmdline 9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
280 12:44:44.002140 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:44:44.002228 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:44:44.002322 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:44:44.002406 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:44:44.002477 Not connected, no need to disconnect.
285 12:44:44.002554 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:44:44.002635 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:44:44.002705 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
288 12:44:44.005668 Setting prompt string to ['lava-test: # ']
289 12:44:44.006131 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:44:44.006243 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:44:44.006341 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:44:44.006436 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:44:44.006611 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 12:44:49.150087 >> Command sent successfully.
295 12:44:49.159382 Returned 0 in 5 seconds
296 12:44:49.260853 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:44:49.262261 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:44:49.262773 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:44:49.263236 Setting prompt string to 'Starting depthcharge on Helios...'
301 12:44:49.263591 Changing prompt to 'Starting depthcharge on Helios...'
302 12:44:49.263954 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 12:44:49.265281 [Enter `^Ec?' for help]
304 12:44:49.872828
305 12:44:49.873533
306 12:44:49.883766 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:44:49.886951 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:44:49.893297 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:44:49.896634 CPU: AES supported, TXT NOT supported, VT supported
310 12:44:49.903180 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:44:49.906546 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:44:49.912971 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:44:49.916463 VBOOT: Loading verstage.
314 12:44:49.919935 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:44:49.926808 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:44:49.929741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:44:49.933282 CBFS @ c08000 size 3f8000
318 12:44:49.940162 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:44:49.943321 CBFS: Locating 'fallback/verstage'
320 12:44:49.946523 CBFS: Found @ offset 10fb80 size 1072c
321 12:44:49.947033
322 12:44:49.949768
323 12:44:49.959943 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:44:49.974459 Probing TPM: . done!
325 12:44:49.977175 TPM ready after 0 ms
326 12:44:49.980884 Connected to device vid:did:rid of 1ae0:0028:00
327 12:44:49.990961 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 12:44:49.994391 Initialized TPM device CR50 revision 0
329 12:44:50.037600 tlcl_send_startup: Startup return code is 0
330 12:44:50.038181 TPM: setup succeeded
331 12:44:50.050563 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:44:50.054829 Chrome EC: UHEPI supported
333 12:44:50.057845 Phase 1
334 12:44:50.061026 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:44:50.067852 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 12:44:50.068414 Phase 2
337 12:44:50.071175 Phase 3
338 12:44:50.074282 FMAP: area GBB found @ c05000 (12288 bytes)
339 12:44:50.081159 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 12:44:50.087749 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 12:44:50.091380 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 12:44:50.097709 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 12:44:50.113010 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 12:44:50.116235 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 12:44:50.123176 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 12:44:50.127457 Phase 4
347 12:44:50.130850 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 12:44:50.137274 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 12:44:50.316582 VB2:vb2_rsa_verify_digest() Digest check failed!
350 12:44:50.323051 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 12:44:50.323237 Saving nvdata
352 12:44:50.326412 Reboot requested (10020007)
353 12:44:50.329474 board_reset() called!
354 12:44:50.329620 full_reset() called!
355 12:44:54.840056
356 12:44:54.840670
357 12:44:54.849756 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 12:44:54.852852 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 12:44:54.859584 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 12:44:54.862785 CPU: AES supported, TXT NOT supported, VT supported
361 12:44:54.869626 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 12:44:54.873105 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 12:44:54.879325 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 12:44:54.883039 VBOOT: Loading verstage.
365 12:44:54.885953 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 12:44:54.893015 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 12:44:54.896413 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 12:44:54.899764 CBFS @ c08000 size 3f8000
369 12:44:54.906086 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 12:44:54.909348 CBFS: Locating 'fallback/verstage'
371 12:44:54.912988 CBFS: Found @ offset 10fb80 size 1072c
372 12:44:54.917020
373 12:44:54.917463
374 12:44:54.926654 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 12:44:54.941017 Probing TPM: . done!
376 12:44:54.944300 TPM ready after 0 ms
377 12:44:54.947611 Connected to device vid:did:rid of 1ae0:0028:00
378 12:44:54.958065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 12:44:54.961332 Initialized TPM device CR50 revision 0
380 12:44:55.005071 tlcl_send_startup: Startup return code is 0
381 12:44:55.005611 TPM: setup succeeded
382 12:44:55.017471 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 12:44:55.021334 Chrome EC: UHEPI supported
384 12:44:55.024793 Phase 1
385 12:44:55.027920 FMAP: area GBB found @ c05000 (12288 bytes)
386 12:44:55.034536 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 12:44:55.041423 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 12:44:55.045030 Recovery requested (1009000e)
389 12:44:55.050473 Saving nvdata
390 12:44:55.056642 tlcl_extend: response is 0
391 12:44:55.065158 tlcl_extend: response is 0
392 12:44:55.072240 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 12:44:55.075689 CBFS @ c08000 size 3f8000
394 12:44:55.083056 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 12:44:55.085265 CBFS: Locating 'fallback/romstage'
396 12:44:55.089170 CBFS: Found @ offset 80 size 145fc
397 12:44:55.092301 Accumulated console time in verstage 98 ms
398 12:44:55.092799
399 12:44:55.093162
400 12:44:55.105581 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 12:44:55.111760 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 12:44:55.115492 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 12:44:55.118586 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 12:44:55.125237 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 12:44:55.128786 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 12:44:55.131829 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 12:44:55.135013 TCO_STS: 0000 0000
408 12:44:55.138361 GEN_PMCON: e0015238 00000200
409 12:44:55.141817 GBLRST_CAUSE: 00000000 00000000
410 12:44:55.142272 prev_sleep_state 5
411 12:44:55.145284 Boot Count incremented to 58028
412 12:44:55.152044 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 12:44:55.155090 CBFS @ c08000 size 3f8000
414 12:44:55.161763 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 12:44:55.162223 CBFS: Locating 'fspm.bin'
416 12:44:55.168707 CBFS: Found @ offset 5ffc0 size 71000
417 12:44:55.172039 Chrome EC: UHEPI supported
418 12:44:55.178611 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 12:44:55.181761 Probing TPM: done!
420 12:44:55.188776 Connected to device vid:did:rid of 1ae0:0028:00
421 12:44:55.198289 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 12:44:55.204627 Initialized TPM device CR50 revision 0
423 12:44:55.213417 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 12:44:55.220192 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 12:44:55.223267 MRC cache found, size 1948
426 12:44:55.226848 bootmode is set to: 2
427 12:44:55.230409 PRMRR disabled by config.
428 12:44:55.230977 SPD INDEX = 1
429 12:44:55.236923 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 12:44:55.239945 CBFS @ c08000 size 3f8000
431 12:44:55.246459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 12:44:55.246931 CBFS: Locating 'spd.bin'
433 12:44:55.250272 CBFS: Found @ offset 5fb80 size 400
434 12:44:55.253161 SPD: module type is LPDDR3
435 12:44:55.256301 SPD: module part is
436 12:44:55.263220 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 12:44:55.266666 SPD: device width 4 bits, bus width 8 bits
438 12:44:55.269865 SPD: module size is 4096 MB (per channel)
439 12:44:55.273138 memory slot: 0 configuration done.
440 12:44:55.276392 memory slot: 2 configuration done.
441 12:44:55.327325 CBMEM:
442 12:44:55.330707 IMD: root @ 99fff000 254 entries.
443 12:44:55.334166 IMD: root @ 99ffec00 62 entries.
444 12:44:55.337453 External stage cache:
445 12:44:55.340826 IMD: root @ 9abff000 254 entries.
446 12:44:55.343949 IMD: root @ 9abfec00 62 entries.
447 12:44:55.346983 Chrome EC: clear events_b mask to 0x0000000020004000
448 12:44:55.363261 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 12:44:55.376579 tlcl_write: response is 0
450 12:44:55.385680 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 12:44:55.391814 MRC: TPM MRC hash updated successfully.
452 12:44:55.392267 2 DIMMs found
453 12:44:55.395445 SMM Memory Map
454 12:44:55.398780 SMRAM : 0x9a000000 0x1000000
455 12:44:55.401775 Subregion 0: 0x9a000000 0xa00000
456 12:44:55.405182 Subregion 1: 0x9aa00000 0x200000
457 12:44:55.408714 Subregion 2: 0x9ac00000 0x400000
458 12:44:55.411984 top_of_ram = 0x9a000000
459 12:44:55.415367 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 12:44:55.421681 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 12:44:55.425293 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 12:44:55.431551 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 12:44:55.435515 CBFS @ c08000 size 3f8000
464 12:44:55.438245 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 12:44:55.442061 CBFS: Locating 'fallback/postcar'
466 12:44:55.444913 CBFS: Found @ offset 107000 size 4b44
467 12:44:55.451682 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 12:44:55.464211 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 12:44:55.467985 Processing 180 relocs. Offset value of 0x97c0c000
470 12:44:55.476093 Accumulated console time in romstage 286 ms
471 12:44:55.476577
472 12:44:55.476966
473 12:44:55.485981 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 12:44:55.492801 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 12:44:55.495963 CBFS @ c08000 size 3f8000
476 12:44:55.499327 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 12:44:55.502666 CBFS: Locating 'fallback/ramstage'
478 12:44:55.509826 CBFS: Found @ offset 43380 size 1b9e8
479 12:44:55.515995 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 12:44:55.547639 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 12:44:55.551350 Processing 3976 relocs. Offset value of 0x98db0000
482 12:44:55.558015 Accumulated console time in postcar 52 ms
483 12:44:55.558627
484 12:44:55.559003
485 12:44:55.567436 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 12:44:55.574506 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 12:44:55.577791 WARNING: RO_VPD is uninitialized or empty.
488 12:44:55.580988 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 12:44:55.587399 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 12:44:55.587865 Normal boot.
491 12:44:55.594166 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 12:44:55.597518 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 12:44:55.600992 CBFS @ c08000 size 3f8000
494 12:44:55.607684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 12:44:55.610795 CBFS: Locating 'cpu_microcode_blob.bin'
496 12:44:55.614094 CBFS: Found @ offset 14700 size 2ec00
497 12:44:55.617575 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 12:44:55.620742 Skip microcode update
499 12:44:55.624065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 12:44:55.627488 CBFS @ c08000 size 3f8000
501 12:44:55.634139 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 12:44:55.637147 CBFS: Locating 'fsps.bin'
503 12:44:55.640552 CBFS: Found @ offset d1fc0 size 35000
504 12:44:55.665938 Detected 4 core, 8 thread CPU.
505 12:44:55.669030 Setting up SMI for CPU
506 12:44:55.672282 IED base = 0x9ac00000
507 12:44:55.672935 IED size = 0x00400000
508 12:44:55.675843 Will perform SMM setup.
509 12:44:55.682364 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 12:44:55.688902 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 12:44:55.695694 Processing 16 relocs. Offset value of 0x00030000
512 12:44:55.696161 Attempting to start 7 APs
513 12:44:55.701970 Waiting for 10ms after sending INIT.
514 12:44:55.715656 Waiting for 1st SIPI to complete...done.
515 12:44:55.716148 AP: slot 3 apic_id 1.
516 12:44:55.722413 Waiting for 2nd SIPI to complete...done.
517 12:44:55.722873 AP: slot 6 apic_id 5.
518 12:44:55.725284 AP: slot 5 apic_id 4.
519 12:44:55.728725 AP: slot 2 apic_id 6.
520 12:44:55.729202 AP: slot 7 apic_id 7.
521 12:44:55.732172 AP: slot 1 apic_id 3.
522 12:44:55.735410 AP: slot 4 apic_id 2.
523 12:44:55.741986 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 12:44:55.748397 Processing 13 relocs. Offset value of 0x00038000
525 12:44:55.755103 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 12:44:55.758637 Installing SMM handler to 0x9a000000
527 12:44:55.765521 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 12:44:55.771743 Processing 658 relocs. Offset value of 0x9a010000
529 12:44:55.778487 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 12:44:55.781763 Processing 13 relocs. Offset value of 0x9a008000
531 12:44:55.788622 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 12:44:55.795021 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 12:44:55.801771 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 12:44:55.804770 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 12:44:55.811394 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 12:44:55.818862 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 12:44:55.821696 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 12:44:55.828282 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 12:44:55.831885 Clearing SMI status registers
540 12:44:55.834692 SMI_STS: PM1
541 12:44:55.835143 PM1_STS: PWRBTN
542 12:44:55.838438 TCO_STS: SECOND_TO
543 12:44:55.841816 New SMBASE 0x9a000000
544 12:44:55.844810 In relocation handler: CPU 0
545 12:44:55.848531 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 12:44:55.851433 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 12:44:55.854916 Relocation complete.
548 12:44:55.858106 New SMBASE 0x99fff400
549 12:44:55.858563 In relocation handler: CPU 3
550 12:44:55.864412 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
551 12:44:55.867861 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 12:44:55.871254 Relocation complete.
553 12:44:55.874509 New SMBASE 0x99fff800
554 12:44:55.874599 In relocation handler: CPU 2
555 12:44:55.881172 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
556 12:44:55.884529 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 12:44:55.887620 Relocation complete.
558 12:44:55.887708 New SMBASE 0x99ffe400
559 12:44:55.891180 In relocation handler: CPU 7
560 12:44:55.897766 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
561 12:44:55.901078 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 12:44:55.904982 Relocation complete.
563 12:44:55.905070 New SMBASE 0x99fffc00
564 12:44:55.907606 In relocation handler: CPU 1
565 12:44:55.911480 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
566 12:44:55.918052 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 12:44:55.920827 Relocation complete.
568 12:44:55.920915 New SMBASE 0x99fff000
569 12:44:55.924495 In relocation handler: CPU 4
570 12:44:55.927946 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
571 12:44:55.934085 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 12:44:55.937725 Relocation complete.
573 12:44:55.937813 New SMBASE 0x99ffe800
574 12:44:55.940663 In relocation handler: CPU 6
575 12:44:55.943973 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
576 12:44:55.950712 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 12:44:55.950802 Relocation complete.
578 12:44:55.954134 New SMBASE 0x99ffec00
579 12:44:55.957482 In relocation handler: CPU 5
580 12:44:55.960899 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
581 12:44:55.967624 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 12:44:55.967734 Relocation complete.
583 12:44:55.971138 Initializing CPU #0
584 12:44:55.973988 CPU: vendor Intel device 806ec
585 12:44:55.977332 CPU: family 06, model 8e, stepping 0c
586 12:44:55.981108 Clearing out pending MCEs
587 12:44:55.984269 Setting up local APIC...
588 12:44:55.984430 apic_id: 0x00 done.
589 12:44:55.987607 Turbo is available but hidden
590 12:44:55.991107 Turbo is available and visible
591 12:44:55.994326 VMX status: enabled
592 12:44:55.997849 IA32_FEATURE_CONTROL status: locked
593 12:44:56.000597 Skip microcode update
594 12:44:56.000690 CPU #0 initialized
595 12:44:56.004127 Initializing CPU #3
596 12:44:56.004220 Initializing CPU #6
597 12:44:56.007621 Initializing CPU #5
598 12:44:56.010424 CPU: vendor Intel device 806ec
599 12:44:56.013859 CPU: family 06, model 8e, stepping 0c
600 12:44:56.017205 CPU: vendor Intel device 806ec
601 12:44:56.020835 CPU: family 06, model 8e, stepping 0c
602 12:44:56.023833 Clearing out pending MCEs
603 12:44:56.027154 Clearing out pending MCEs
604 12:44:56.030615 Setting up local APIC...
605 12:44:56.034037 CPU: vendor Intel device 806ec
606 12:44:56.037134 CPU: family 06, model 8e, stepping 0c
607 12:44:56.037222 Clearing out pending MCEs
608 12:44:56.040373 Initializing CPU #4
609 12:44:56.043789 Initializing CPU #1
610 12:44:56.047073 CPU: vendor Intel device 806ec
611 12:44:56.050102 CPU: family 06, model 8e, stepping 0c
612 12:44:56.054034 CPU: vendor Intel device 806ec
613 12:44:56.056821 CPU: family 06, model 8e, stepping 0c
614 12:44:56.060469 Clearing out pending MCEs
615 12:44:56.060604 Clearing out pending MCEs
616 12:44:56.063398 Setting up local APIC...
617 12:44:56.066932 Initializing CPU #2
618 12:44:56.067077 Initializing CPU #7
619 12:44:56.070147 CPU: vendor Intel device 806ec
620 12:44:56.076865 CPU: family 06, model 8e, stepping 0c
621 12:44:56.080046 CPU: vendor Intel device 806ec
622 12:44:56.083439 CPU: family 06, model 8e, stepping 0c
623 12:44:56.083686 Clearing out pending MCEs
624 12:44:56.087048 Clearing out pending MCEs
625 12:44:56.090284 Setting up local APIC...
626 12:44:56.093877 apic_id: 0x03 done.
627 12:44:56.094199 Setting up local APIC...
628 12:44:56.096838 Setting up local APIC...
629 12:44:56.100262 Setting up local APIC...
630 12:44:56.103514 apic_id: 0x05 done.
631 12:44:56.104119 Setting up local APIC...
632 12:44:56.106763 VMX status: enabled
633 12:44:56.110172 apic_id: 0x02 done.
634 12:44:56.113597 IA32_FEATURE_CONTROL status: locked
635 12:44:56.114055 VMX status: enabled
636 12:44:56.116772 Skip microcode update
637 12:44:56.119881 IA32_FEATURE_CONTROL status: locked
638 12:44:56.123245 CPU #1 initialized
639 12:44:56.123696 Skip microcode update
640 12:44:56.126758 apic_id: 0x01 done.
641 12:44:56.130125 CPU #4 initialized
642 12:44:56.130578 VMX status: enabled
643 12:44:56.133382 VMX status: enabled
644 12:44:56.133836 apic_id: 0x04 done.
645 12:44:56.140051 IA32_FEATURE_CONTROL status: locked
646 12:44:56.140579 VMX status: enabled
647 12:44:56.143249 Skip microcode update
648 12:44:56.146484 IA32_FEATURE_CONTROL status: locked
649 12:44:56.150324 CPU #6 initialized
650 12:44:56.150775 Skip microcode update
651 12:44:56.153223 IA32_FEATURE_CONTROL status: locked
652 12:44:56.156258 CPU #5 initialized
653 12:44:56.159783 apic_id: 0x07 done.
654 12:44:56.160229 apic_id: 0x06 done.
655 12:44:56.163079 VMX status: enabled
656 12:44:56.163530 VMX status: enabled
657 12:44:56.166344 IA32_FEATURE_CONTROL status: locked
658 12:44:56.173326 IA32_FEATURE_CONTROL status: locked
659 12:44:56.173777 Skip microcode update
660 12:44:56.176741 Skip microcode update
661 12:44:56.180047 Skip microcode update
662 12:44:56.180548 CPU #7 initialized
663 12:44:56.183317 CPU #2 initialized
664 12:44:56.183762 CPU #3 initialized
665 12:44:56.189730 bsp_do_flight_plan done after 465 msecs.
666 12:44:56.193296 CPU: frequency set to 4200 MHz
667 12:44:56.193745 Enabling SMIs.
668 12:44:56.194099 Locking SMM.
669 12:44:56.209472 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 12:44:56.212948 CBFS @ c08000 size 3f8000
671 12:44:56.219139 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 12:44:56.219597 CBFS: Locating 'vbt.bin'
673 12:44:56.222486 CBFS: Found @ offset 5f5c0 size 499
674 12:44:56.229546 Found a VBT of 4608 bytes after decompression
675 12:44:56.410137 Display FSP Version Info HOB
676 12:44:56.413785 Reference Code - CPU = 9.0.1e.30
677 12:44:56.416728 uCode Version = 0.0.0.ca
678 12:44:56.419974 TXT ACM version = ff.ff.ff.ffff
679 12:44:56.423497 Display FSP Version Info HOB
680 12:44:56.426423 Reference Code - ME = 9.0.1e.30
681 12:44:56.430037 MEBx version = 0.0.0.0
682 12:44:56.433100 ME Firmware Version = Consumer SKU
683 12:44:56.436818 Display FSP Version Info HOB
684 12:44:56.439672 Reference Code - CML PCH = 9.0.1e.30
685 12:44:56.443224 PCH-CRID Status = Disabled
686 12:44:56.446824 PCH-CRID Original Value = ff.ff.ff.ffff
687 12:44:56.449938 PCH-CRID New Value = ff.ff.ff.ffff
688 12:44:56.453159 OPROM - RST - RAID = ff.ff.ff.ffff
689 12:44:56.456401 ChipsetInit Base Version = ff.ff.ff.ffff
690 12:44:56.459987 ChipsetInit Oem Version = ff.ff.ff.ffff
691 12:44:56.462993 Display FSP Version Info HOB
692 12:44:56.469782 Reference Code - SA - System Agent = 9.0.1e.30
693 12:44:56.473454 Reference Code - MRC = 0.7.1.6c
694 12:44:56.476116 SA - PCIe Version = 9.0.1e.30
695 12:44:56.476663 SA-CRID Status = Disabled
696 12:44:56.479798 SA-CRID Original Value = 0.0.0.c
697 12:44:56.483108 SA-CRID New Value = 0.0.0.c
698 12:44:56.486181 OPROM - VBIOS = ff.ff.ff.ffff
699 12:44:56.489539 RTC Init
700 12:44:56.492715 Set power on after power failure.
701 12:44:56.493174 Disabling Deep S3
702 12:44:56.496398 Disabling Deep S3
703 12:44:56.496857 Disabling Deep S4
704 12:44:56.499524 Disabling Deep S4
705 12:44:56.502661 Disabling Deep S5
706 12:44:56.503162 Disabling Deep S5
707 12:44:56.509280 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
708 12:44:56.509803 Enumerating buses...
709 12:44:56.516280 Show all devs... Before device enumeration.
710 12:44:56.519061 Root Device: enabled 1
711 12:44:56.519551 CPU_CLUSTER: 0: enabled 1
712 12:44:56.522623 DOMAIN: 0000: enabled 1
713 12:44:56.525959 APIC: 00: enabled 1
714 12:44:56.526417 PCI: 00:00.0: enabled 1
715 12:44:56.529446 PCI: 00:02.0: enabled 1
716 12:44:56.532764 PCI: 00:04.0: enabled 0
717 12:44:56.536029 PCI: 00:05.0: enabled 0
718 12:44:56.536566 PCI: 00:12.0: enabled 1
719 12:44:56.539437 PCI: 00:12.5: enabled 0
720 12:44:56.542534 PCI: 00:12.6: enabled 0
721 12:44:56.545827 PCI: 00:14.0: enabled 1
722 12:44:56.545919 PCI: 00:14.1: enabled 0
723 12:44:56.548672 PCI: 00:14.3: enabled 1
724 12:44:56.552065 PCI: 00:14.5: enabled 0
725 12:44:56.552153 PCI: 00:15.0: enabled 1
726 12:44:56.555238 PCI: 00:15.1: enabled 1
727 12:44:56.558900 PCI: 00:15.2: enabled 0
728 12:44:56.562238 PCI: 00:15.3: enabled 0
729 12:44:56.562327 PCI: 00:16.0: enabled 1
730 12:44:56.565541 PCI: 00:16.1: enabled 0
731 12:44:56.568325 PCI: 00:16.2: enabled 0
732 12:44:56.571794 PCI: 00:16.3: enabled 0
733 12:44:56.571882 PCI: 00:16.4: enabled 0
734 12:44:56.575400 PCI: 00:16.5: enabled 0
735 12:44:56.578645 PCI: 00:17.0: enabled 1
736 12:44:56.581792 PCI: 00:19.0: enabled 1
737 12:44:56.581879 PCI: 00:19.1: enabled 0
738 12:44:56.585437 PCI: 00:19.2: enabled 0
739 12:44:56.588786 PCI: 00:1a.0: enabled 0
740 12:44:56.591986 PCI: 00:1c.0: enabled 0
741 12:44:56.592066 PCI: 00:1c.1: enabled 0
742 12:44:56.595551 PCI: 00:1c.2: enabled 0
743 12:44:56.598382 PCI: 00:1c.3: enabled 0
744 12:44:56.598456 PCI: 00:1c.4: enabled 0
745 12:44:56.601680 PCI: 00:1c.5: enabled 0
746 12:44:56.605121 PCI: 00:1c.6: enabled 0
747 12:44:56.608228 PCI: 00:1c.7: enabled 0
748 12:44:56.608301 PCI: 00:1d.0: enabled 1
749 12:44:56.611921 PCI: 00:1d.1: enabled 0
750 12:44:56.615207 PCI: 00:1d.2: enabled 0
751 12:44:56.618557 PCI: 00:1d.3: enabled 0
752 12:44:56.618636 PCI: 00:1d.4: enabled 0
753 12:44:56.621819 PCI: 00:1d.5: enabled 1
754 12:44:56.624753 PCI: 00:1e.0: enabled 1
755 12:44:56.628491 PCI: 00:1e.1: enabled 0
756 12:44:56.628568 PCI: 00:1e.2: enabled 1
757 12:44:56.631899 PCI: 00:1e.3: enabled 1
758 12:44:56.634988 PCI: 00:1f.0: enabled 1
759 12:44:56.635068 PCI: 00:1f.1: enabled 1
760 12:44:56.638459 PCI: 00:1f.2: enabled 1
761 12:44:56.641978 PCI: 00:1f.3: enabled 1
762 12:44:56.644646 PCI: 00:1f.4: enabled 1
763 12:44:56.644718 PCI: 00:1f.5: enabled 1
764 12:44:56.648145 PCI: 00:1f.6: enabled 0
765 12:44:56.651455 USB0 port 0: enabled 1
766 12:44:56.654679 I2C: 00:15: enabled 1
767 12:44:56.654755 I2C: 00:5d: enabled 1
768 12:44:56.658253 GENERIC: 0.0: enabled 1
769 12:44:56.661633 I2C: 00:1a: enabled 1
770 12:44:56.661719 I2C: 00:38: enabled 1
771 12:44:56.664569 I2C: 00:39: enabled 1
772 12:44:56.668499 I2C: 00:3a: enabled 1
773 12:44:56.668572 I2C: 00:3b: enabled 1
774 12:44:56.671445 PCI: 00:00.0: enabled 1
775 12:44:56.674711 SPI: 00: enabled 1
776 12:44:56.674783 SPI: 01: enabled 1
777 12:44:56.677746 PNP: 0c09.0: enabled 1
778 12:44:56.681461 USB2 port 0: enabled 1
779 12:44:56.681542 USB2 port 1: enabled 1
780 12:44:56.684447 USB2 port 2: enabled 0
781 12:44:56.688008 USB2 port 3: enabled 0
782 12:44:56.688087 USB2 port 5: enabled 0
783 12:44:56.691249 USB2 port 6: enabled 1
784 12:44:56.694377 USB2 port 9: enabled 1
785 12:44:56.697774 USB3 port 0: enabled 1
786 12:44:56.697854 USB3 port 1: enabled 1
787 12:44:56.701429 USB3 port 2: enabled 1
788 12:44:56.704638 USB3 port 3: enabled 1
789 12:44:56.704719 USB3 port 4: enabled 0
790 12:44:56.707943 APIC: 03: enabled 1
791 12:44:56.711530 APIC: 06: enabled 1
792 12:44:56.711624 APIC: 01: enabled 1
793 12:44:56.714346 APIC: 02: enabled 1
794 12:44:56.714426 APIC: 04: enabled 1
795 12:44:56.718042 APIC: 05: enabled 1
796 12:44:56.721098 APIC: 07: enabled 1
797 12:44:56.721177 Compare with tree...
798 12:44:56.724550 Root Device: enabled 1
799 12:44:56.727724 CPU_CLUSTER: 0: enabled 1
800 12:44:56.731088 APIC: 00: enabled 1
801 12:44:56.731168 APIC: 03: enabled 1
802 12:44:56.734648 APIC: 06: enabled 1
803 12:44:56.737639 APIC: 01: enabled 1
804 12:44:56.737718 APIC: 02: enabled 1
805 12:44:56.741410 APIC: 04: enabled 1
806 12:44:56.744143 APIC: 05: enabled 1
807 12:44:56.744221 APIC: 07: enabled 1
808 12:44:56.747522 DOMAIN: 0000: enabled 1
809 12:44:56.750918 PCI: 00:00.0: enabled 1
810 12:44:56.754204 PCI: 00:02.0: enabled 1
811 12:44:56.754283 PCI: 00:04.0: enabled 0
812 12:44:56.757632 PCI: 00:05.0: enabled 0
813 12:44:56.761577 PCI: 00:12.0: enabled 1
814 12:44:56.764144 PCI: 00:12.5: enabled 0
815 12:44:56.767655 PCI: 00:12.6: enabled 0
816 12:44:56.767735 PCI: 00:14.0: enabled 1
817 12:44:56.770996 USB0 port 0: enabled 1
818 12:44:56.774132 USB2 port 0: enabled 1
819 12:44:56.777557 USB2 port 1: enabled 1
820 12:44:56.780596 USB2 port 2: enabled 0
821 12:44:56.780683 USB2 port 3: enabled 0
822 12:44:56.784325 USB2 port 5: enabled 0
823 12:44:56.787688 USB2 port 6: enabled 1
824 12:44:56.791055 USB2 port 9: enabled 1
825 12:44:56.794183 USB3 port 0: enabled 1
826 12:44:56.797490 USB3 port 1: enabled 1
827 12:44:56.797577 USB3 port 2: enabled 1
828 12:44:56.800910 USB3 port 3: enabled 1
829 12:44:56.803989 USB3 port 4: enabled 0
830 12:44:56.807265 PCI: 00:14.1: enabled 0
831 12:44:56.810573 PCI: 00:14.3: enabled 1
832 12:44:56.810660 PCI: 00:14.5: enabled 0
833 12:44:56.813838 PCI: 00:15.0: enabled 1
834 12:44:56.817689 I2C: 00:15: enabled 1
835 12:44:56.820470 PCI: 00:15.1: enabled 1
836 12:44:56.824116 I2C: 00:5d: enabled 1
837 12:44:56.824202 GENERIC: 0.0: enabled 1
838 12:44:56.827375 PCI: 00:15.2: enabled 0
839 12:44:56.830808 PCI: 00:15.3: enabled 0
840 12:44:56.833623 PCI: 00:16.0: enabled 1
841 12:44:56.836957 PCI: 00:16.1: enabled 0
842 12:44:56.837044 PCI: 00:16.2: enabled 0
843 12:44:56.840488 PCI: 00:16.3: enabled 0
844 12:44:56.843890 PCI: 00:16.4: enabled 0
845 12:44:56.846977 PCI: 00:16.5: enabled 0
846 12:44:56.847064 PCI: 00:17.0: enabled 1
847 12:44:56.850481 PCI: 00:19.0: enabled 1
848 12:44:56.853511 I2C: 00:1a: enabled 1
849 12:44:56.857325 I2C: 00:38: enabled 1
850 12:44:56.860414 I2C: 00:39: enabled 1
851 12:44:56.860502 I2C: 00:3a: enabled 1
852 12:44:56.863649 I2C: 00:3b: enabled 1
853 12:44:56.866831 PCI: 00:19.1: enabled 0
854 12:44:56.870421 PCI: 00:19.2: enabled 0
855 12:44:56.870509 PCI: 00:1a.0: enabled 0
856 12:44:56.873521 PCI: 00:1c.0: enabled 0
857 12:44:56.876877 PCI: 00:1c.1: enabled 0
858 12:44:56.880415 PCI: 00:1c.2: enabled 0
859 12:44:56.883684 PCI: 00:1c.3: enabled 0
860 12:44:56.883772 PCI: 00:1c.4: enabled 0
861 12:44:56.886706 PCI: 00:1c.5: enabled 0
862 12:44:56.890296 PCI: 00:1c.6: enabled 0
863 12:44:56.893523 PCI: 00:1c.7: enabled 0
864 12:44:56.896970 PCI: 00:1d.0: enabled 1
865 12:44:56.897059 PCI: 00:1d.1: enabled 0
866 12:44:56.900003 PCI: 00:1d.2: enabled 0
867 12:44:56.903416 PCI: 00:1d.3: enabled 0
868 12:44:56.906813 PCI: 00:1d.4: enabled 0
869 12:44:56.910548 PCI: 00:1d.5: enabled 1
870 12:44:56.910637 PCI: 00:00.0: enabled 1
871 12:44:56.913597 PCI: 00:1e.0: enabled 1
872 12:44:56.916649 PCI: 00:1e.1: enabled 0
873 12:44:56.920000 PCI: 00:1e.2: enabled 1
874 12:44:56.920088 SPI: 00: enabled 1
875 12:44:56.923267 PCI: 00:1e.3: enabled 1
876 12:44:56.926837 SPI: 01: enabled 1
877 12:44:56.929951 PCI: 00:1f.0: enabled 1
878 12:44:56.930039 PNP: 0c09.0: enabled 1
879 12:44:56.933634 PCI: 00:1f.1: enabled 1
880 12:44:56.936553 PCI: 00:1f.2: enabled 1
881 12:44:56.939901 PCI: 00:1f.3: enabled 1
882 12:44:56.943595 PCI: 00:1f.4: enabled 1
883 12:44:56.943684 PCI: 00:1f.5: enabled 1
884 12:44:56.946599 PCI: 00:1f.6: enabled 0
885 12:44:56.949662 Root Device scanning...
886 12:44:56.953325 scan_static_bus for Root Device
887 12:44:56.956408 CPU_CLUSTER: 0 enabled
888 12:44:56.956497 DOMAIN: 0000 enabled
889 12:44:56.959721 DOMAIN: 0000 scanning...
890 12:44:56.962925 PCI: pci_scan_bus for bus 00
891 12:44:56.966524 PCI: 00:00.0 [8086/0000] ops
892 12:44:56.969913 PCI: 00:00.0 [8086/9b61] enabled
893 12:44:56.972778 PCI: 00:02.0 [8086/0000] bus ops
894 12:44:56.976357 PCI: 00:02.0 [8086/9b41] enabled
895 12:44:56.979686 PCI: 00:04.0 [8086/1903] disabled
896 12:44:56.983195 PCI: 00:08.0 [8086/1911] enabled
897 12:44:56.986581 PCI: 00:12.0 [8086/02f9] enabled
898 12:44:56.989805 PCI: 00:14.0 [8086/0000] bus ops
899 12:44:56.993001 PCI: 00:14.0 [8086/02ed] enabled
900 12:44:56.996306 PCI: 00:14.2 [8086/02ef] enabled
901 12:44:56.999538 PCI: 00:14.3 [8086/02f0] enabled
902 12:44:57.002970 PCI: 00:15.0 [8086/0000] bus ops
903 12:44:57.006422 PCI: 00:15.0 [8086/02e8] enabled
904 12:44:57.009650 PCI: 00:15.1 [8086/0000] bus ops
905 12:44:57.012733 PCI: 00:15.1 [8086/02e9] enabled
906 12:44:57.016399 PCI: 00:16.0 [8086/0000] ops
907 12:44:57.019701 PCI: 00:16.0 [8086/02e0] enabled
908 12:44:57.023311 PCI: 00:17.0 [8086/0000] ops
909 12:44:57.026281 PCI: 00:17.0 [8086/02d3] enabled
910 12:44:57.030015 PCI: 00:19.0 [8086/0000] bus ops
911 12:44:57.033093 PCI: 00:19.0 [8086/02c5] enabled
912 12:44:57.036459 PCI: 00:1d.0 [8086/0000] bus ops
913 12:44:57.039613 PCI: 00:1d.0 [8086/02b0] enabled
914 12:44:57.046477 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 12:44:57.046977 PCI: 00:1e.0 [8086/0000] ops
916 12:44:57.049674 PCI: 00:1e.0 [8086/02a8] enabled
917 12:44:57.053106 PCI: 00:1e.2 [8086/0000] bus ops
918 12:44:57.056416 PCI: 00:1e.2 [8086/02aa] enabled
919 12:44:57.059566 PCI: 00:1e.3 [8086/0000] bus ops
920 12:44:57.063310 PCI: 00:1e.3 [8086/02ab] enabled
921 12:44:57.066598 PCI: 00:1f.0 [8086/0000] bus ops
922 12:44:57.069504 PCI: 00:1f.0 [8086/0284] enabled
923 12:44:57.076209 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 12:44:57.082923 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 12:44:57.086175 PCI: 00:1f.3 [8086/0000] bus ops
926 12:44:57.089436 PCI: 00:1f.3 [8086/02c8] enabled
927 12:44:57.092792 PCI: 00:1f.4 [8086/0000] bus ops
928 12:44:57.096302 PCI: 00:1f.4 [8086/02a3] enabled
929 12:44:57.100139 PCI: 00:1f.5 [8086/0000] bus ops
930 12:44:57.102994 PCI: 00:1f.5 [8086/02a4] enabled
931 12:44:57.106211 PCI: Leftover static devices:
932 12:44:57.106673 PCI: 00:05.0
933 12:44:57.109407 PCI: 00:12.5
934 12:44:57.109867 PCI: 00:12.6
935 12:44:57.110319 PCI: 00:14.1
936 12:44:57.112750 PCI: 00:14.5
937 12:44:57.113211 PCI: 00:15.2
938 12:44:57.116027 PCI: 00:15.3
939 12:44:57.116524 PCI: 00:16.1
940 12:44:57.119258 PCI: 00:16.2
941 12:44:57.119751 PCI: 00:16.3
942 12:44:57.120206 PCI: 00:16.4
943 12:44:57.122716 PCI: 00:16.5
944 12:44:57.123179 PCI: 00:19.1
945 12:44:57.125877 PCI: 00:19.2
946 12:44:57.126337 PCI: 00:1a.0
947 12:44:57.126790 PCI: 00:1c.0
948 12:44:57.129121 PCI: 00:1c.1
949 12:44:57.129585 PCI: 00:1c.2
950 12:44:57.132718 PCI: 00:1c.3
951 12:44:57.133176 PCI: 00:1c.4
952 12:44:57.133626 PCI: 00:1c.5
953 12:44:57.136271 PCI: 00:1c.6
954 12:44:57.136769 PCI: 00:1c.7
955 12:44:57.139374 PCI: 00:1d.1
956 12:44:57.139834 PCI: 00:1d.2
957 12:44:57.142667 PCI: 00:1d.3
958 12:44:57.143127 PCI: 00:1d.4
959 12:44:57.143573 PCI: 00:1d.5
960 12:44:57.145954 PCI: 00:1e.1
961 12:44:57.146414 PCI: 00:1f.1
962 12:44:57.149265 PCI: 00:1f.2
963 12:44:57.149728 PCI: 00:1f.6
964 12:44:57.152362 PCI: Check your devicetree.cb.
965 12:44:57.155802 PCI: 00:02.0 scanning...
966 12:44:57.159523 scan_generic_bus for PCI: 00:02.0
967 12:44:57.162424 scan_generic_bus for PCI: 00:02.0 done
968 12:44:57.169108 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
969 12:44:57.169607 PCI: 00:14.0 scanning...
970 12:44:57.172586 scan_static_bus for PCI: 00:14.0
971 12:44:57.176131 USB0 port 0 enabled
972 12:44:57.179391 USB0 port 0 scanning...
973 12:44:57.182578 scan_static_bus for USB0 port 0
974 12:44:57.185959 USB2 port 0 enabled
975 12:44:57.186405 USB2 port 1 enabled
976 12:44:57.189084 USB2 port 2 disabled
977 12:44:57.189564 USB2 port 3 disabled
978 12:44:57.192623 USB2 port 5 disabled
979 12:44:57.196018 USB2 port 6 enabled
980 12:44:57.196488 USB2 port 9 enabled
981 12:44:57.199095 USB3 port 0 enabled
982 12:44:57.202471 USB3 port 1 enabled
983 12:44:57.202916 USB3 port 2 enabled
984 12:44:57.205733 USB3 port 3 enabled
985 12:44:57.206235 USB3 port 4 disabled
986 12:44:57.208905 USB2 port 0 scanning...
987 12:44:57.212307 scan_static_bus for USB2 port 0
988 12:44:57.215762 scan_static_bus for USB2 port 0 done
989 12:44:57.222549 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
990 12:44:57.226003 USB2 port 1 scanning...
991 12:44:57.228923 scan_static_bus for USB2 port 1
992 12:44:57.232418 scan_static_bus for USB2 port 1 done
993 12:44:57.235550 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
994 12:44:57.238776 USB2 port 6 scanning...
995 12:44:57.242293 scan_static_bus for USB2 port 6
996 12:44:57.245547 scan_static_bus for USB2 port 6 done
997 12:44:57.252253 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
998 12:44:57.255627 USB2 port 9 scanning...
999 12:44:57.259077 scan_static_bus for USB2 port 9
1000 12:44:57.262423 scan_static_bus for USB2 port 9 done
1001 12:44:57.265462 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
1002 12:44:57.268960 USB3 port 0 scanning...
1003 12:44:57.272418 scan_static_bus for USB3 port 0
1004 12:44:57.275495 scan_static_bus for USB3 port 0 done
1005 12:44:57.282292 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
1006 12:44:57.285476 USB3 port 1 scanning...
1007 12:44:57.288668 scan_static_bus for USB3 port 1
1008 12:44:57.292632 scan_static_bus for USB3 port 1 done
1009 12:44:57.295341 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
1010 12:44:57.299364 USB3 port 2 scanning...
1011 12:44:57.302222 scan_static_bus for USB3 port 2
1012 12:44:57.305472 scan_static_bus for USB3 port 2 done
1013 12:44:57.312018 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
1014 12:44:57.315438 USB3 port 3 scanning...
1015 12:44:57.318476 scan_static_bus for USB3 port 3
1016 12:44:57.321908 scan_static_bus for USB3 port 3 done
1017 12:44:57.328415 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
1018 12:44:57.332094 scan_static_bus for USB0 port 0 done
1019 12:44:57.335305 scan_bus: scanning of bus USB0 port 0 took 155402 usecs
1020 12:44:57.338483 scan_static_bus for PCI: 00:14.0 done
1021 12:44:57.345280 scan_bus: scanning of bus PCI: 00:14.0 took 173008 usecs
1022 12:44:57.348625 PCI: 00:15.0 scanning...
1023 12:44:57.352450 scan_generic_bus for PCI: 00:15.0
1024 12:44:57.355154 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 12:44:57.358576 scan_generic_bus for PCI: 00:15.0 done
1026 12:44:57.365615 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
1027 12:44:57.368591 PCI: 00:15.1 scanning...
1028 12:44:57.372129 scan_generic_bus for PCI: 00:15.1
1029 12:44:57.375182 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 12:44:57.378722 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 12:44:57.385370 scan_generic_bus for PCI: 00:15.1 done
1032 12:44:57.388506 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
1033 12:44:57.391730 PCI: 00:19.0 scanning...
1034 12:44:57.395182 scan_generic_bus for PCI: 00:19.0
1035 12:44:57.398583 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 12:44:57.405429 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 12:44:57.408356 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 12:44:57.411626 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 12:44:57.415441 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 12:44:57.421512 scan_generic_bus for PCI: 00:19.0 done
1041 12:44:57.424826 scan_bus: scanning of bus PCI: 00:19.0 took 30749 usecs
1042 12:44:57.428274 PCI: 00:1d.0 scanning...
1043 12:44:57.431831 do_pci_scan_bridge for PCI: 00:1d.0
1044 12:44:57.434969 PCI: pci_scan_bus for bus 01
1045 12:44:57.438531 PCI: 01:00.0 [1c5c/1327] enabled
1046 12:44:57.441773 Enabling Common Clock Configuration
1047 12:44:57.444924 L1 Sub-State supported from root port 29
1048 12:44:57.448428 L1 Sub-State Support = 0xf
1049 12:44:57.451643 CommonModeRestoreTime = 0x28
1050 12:44:57.458294 Power On Value = 0x16, Power On Scale = 0x0
1051 12:44:57.458777 ASPM: Enabled L1
1052 12:44:57.464864 scan_bus: scanning of bus PCI: 00:1d.0 took 32792 usecs
1053 12:44:57.465327 PCI: 00:1e.2 scanning...
1054 12:44:57.471626 scan_generic_bus for PCI: 00:1e.2
1055 12:44:57.475238 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 12:44:57.478305 scan_generic_bus for PCI: 00:1e.2 done
1057 12:44:57.484986 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1058 12:44:57.485444 PCI: 00:1e.3 scanning...
1059 12:44:57.488432 scan_generic_bus for PCI: 00:1e.3
1060 12:44:57.494720 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 12:44:57.498549 scan_generic_bus for PCI: 00:1e.3 done
1062 12:44:57.501485 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1063 12:44:57.504859 PCI: 00:1f.0 scanning...
1064 12:44:57.508058 scan_static_bus for PCI: 00:1f.0
1065 12:44:57.511331 PNP: 0c09.0 enabled
1066 12:44:57.514498 scan_static_bus for PCI: 00:1f.0 done
1067 12:44:57.521278 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1068 12:44:57.521741 PCI: 00:1f.3 scanning...
1069 12:44:57.528407 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1070 12:44:57.531444 PCI: 00:1f.4 scanning...
1071 12:44:57.534972 scan_generic_bus for PCI: 00:1f.4
1072 12:44:57.538770 scan_generic_bus for PCI: 00:1f.4 done
1073 12:44:57.544939 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1074 12:44:57.548151 PCI: 00:1f.5 scanning...
1075 12:44:57.551475 scan_generic_bus for PCI: 00:1f.5
1076 12:44:57.554892 scan_generic_bus for PCI: 00:1f.5 done
1077 12:44:57.561422 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1078 12:44:57.564716 scan_bus: scanning of bus DOMAIN: 0000 took 605136 usecs
1079 12:44:57.567917 scan_static_bus for Root Device done
1080 12:44:57.574558 scan_bus: scanning of bus Root Device took 625020 usecs
1081 12:44:57.575030 done
1082 12:44:57.578182 Chrome EC: UHEPI supported
1083 12:44:57.584592 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 12:44:57.590949 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 12:44:57.597700 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 12:44:57.604366 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 12:44:57.607888 SPI flash protection: WPSW=0 SRP0=0
1088 12:44:57.610795 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 12:44:57.617670 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 12:44:57.620899 found VGA at PCI: 00:02.0
1091 12:44:57.624745 Setting up VGA for PCI: 00:02.0
1092 12:44:57.627582 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 12:44:57.634096 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 12:44:57.637782 Allocating resources...
1095 12:44:57.638267 Reading resources...
1096 12:44:57.644016 Root Device read_resources bus 0 link: 0
1097 12:44:57.647814 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 12:44:57.653965 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 12:44:57.657516 DOMAIN: 0000 read_resources bus 0 link: 0
1100 12:44:57.664190 PCI: 00:14.0 read_resources bus 0 link: 0
1101 12:44:57.667493 USB0 port 0 read_resources bus 0 link: 0
1102 12:44:57.675233 USB0 port 0 read_resources bus 0 link: 0 done
1103 12:44:57.678268 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 12:44:57.686284 PCI: 00:15.0 read_resources bus 1 link: 0
1105 12:44:57.689689 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 12:44:57.695927 PCI: 00:15.1 read_resources bus 2 link: 0
1107 12:44:57.699085 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 12:44:57.706414 PCI: 00:19.0 read_resources bus 3 link: 0
1109 12:44:57.713452 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 12:44:57.716815 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 12:44:57.723353 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 12:44:57.726598 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 12:44:57.732945 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 12:44:57.736502 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 12:44:57.743020 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 12:44:57.746692 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 12:44:57.752822 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 12:44:57.759767 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 12:44:57.763298 Root Device read_resources bus 0 link: 0 done
1120 12:44:57.766411 Done reading resources.
1121 12:44:57.769710 Show resources in subtree (Root Device)...After reading.
1122 12:44:57.776456 Root Device child on link 0 CPU_CLUSTER: 0
1123 12:44:57.779584 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 12:44:57.780042 APIC: 00
1125 12:44:57.782995 APIC: 03
1126 12:44:57.783453 APIC: 06
1127 12:44:57.786241 APIC: 01
1128 12:44:57.786696 APIC: 02
1129 12:44:57.787062 APIC: 04
1130 12:44:57.789492 APIC: 05
1131 12:44:57.789948 APIC: 07
1132 12:44:57.793035 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 12:44:57.802689 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 12:44:57.812737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 12:44:57.862379 PCI: 00:00.0
1136 12:44:57.863313 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 12:44:57.864255 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 12:44:57.864901 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 12:44:57.865600 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 12:44:57.866082 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 12:44:57.912192 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 12:44:57.913047 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 12:44:57.914021 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 12:44:57.914473 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 12:44:57.914859 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 12:44:57.922427 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 12:44:57.928642 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 12:44:57.935855 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 12:44:57.945730 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 12:44:57.955189 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 12:44:57.965473 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 12:44:57.965945 PCI: 00:02.0
1153 12:44:57.975461 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:44:57.988575 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:44:57.995262 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:44:57.998301 PCI: 00:04.0
1157 12:44:57.998748 PCI: 00:08.0
1158 12:44:58.008429 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 12:44:58.011779 PCI: 00:12.0
1160 12:44:58.021369 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:44:58.024862 PCI: 00:14.0 child on link 0 USB0 port 0
1162 12:44:58.034831 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 12:44:58.038244 USB0 port 0 child on link 0 USB2 port 0
1164 12:44:58.041651 USB2 port 0
1165 12:44:58.042118 USB2 port 1
1166 12:44:58.044835 USB2 port 2
1167 12:44:58.045302 USB2 port 3
1168 12:44:58.048192 USB2 port 5
1169 12:44:58.048815 USB2 port 6
1170 12:44:58.051434 USB2 port 9
1171 12:44:58.051886 USB3 port 0
1172 12:44:58.054856 USB3 port 1
1173 12:44:58.058173 USB3 port 2
1174 12:44:58.058688 USB3 port 3
1175 12:44:58.061851 USB3 port 4
1176 12:44:58.062472 PCI: 00:14.2
1177 12:44:58.071564 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 12:44:58.081556 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 12:44:58.084995 PCI: 00:14.3
1180 12:44:58.094495 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 12:44:58.097728 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 12:44:58.107578 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:44:58.107700 I2C: 01:15
1184 12:44:58.114023 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 12:44:58.123963 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:44:58.124057 I2C: 02:5d
1187 12:44:58.127419 GENERIC: 0.0
1188 12:44:58.127516 PCI: 00:16.0
1189 12:44:58.137732 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:44:58.140920 PCI: 00:17.0
1191 12:44:58.147638 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 12:44:58.157287 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 12:44:58.167383 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 12:44:58.174192 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 12:44:58.183956 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 12:44:58.190696 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 12:44:58.197369 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 12:44:58.207213 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:44:58.207861 I2C: 03:1a
1200 12:44:58.210357 I2C: 03:38
1201 12:44:58.210947 I2C: 03:39
1202 12:44:58.211361 I2C: 03:3a
1203 12:44:58.213824 I2C: 03:3b
1204 12:44:58.217322 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 12:44:58.226995 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 12:44:58.236878 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 12:44:58.247107 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 12:44:58.247643 PCI: 01:00.0
1209 12:44:58.256903 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 12:44:58.260168 PCI: 00:1e.0
1211 12:44:58.270464 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 12:44:58.280288 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 12:44:58.283165 PCI: 00:1e.2 child on link 0 SPI: 00
1214 12:44:58.293258 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 12:44:58.296474 SPI: 00
1216 12:44:58.300401 PCI: 00:1e.3 child on link 0 SPI: 01
1217 12:44:58.310078 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 12:44:58.310649 SPI: 01
1219 12:44:58.313031 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:44:58.323076 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:44:58.333189 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:44:58.333794 PNP: 0c09.0
1223 12:44:58.343129 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:44:58.343790 PCI: 00:1f.3
1225 12:44:58.352831 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:44:58.362791 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:44:58.366531 PCI: 00:1f.4
1228 12:44:58.376296 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:44:58.386505 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 12:44:58.387080 PCI: 00:1f.5
1231 12:44:58.396227 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 12:44:58.402784 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 12:44:58.409523 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 12:44:58.415992 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 12:44:58.419553 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 12:44:58.422787 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 12:44:58.426289 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 12:44:58.429489 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 12:44:58.436056 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 12:44:58.442527 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 12:44:58.452278 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 12:44:58.459030 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 12:44:58.466072 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 12:44:58.469217 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 12:44:58.478776 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 12:44:58.482461 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 12:44:58.489069 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 12:44:58.492212 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 12:44:58.495908 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 12:44:58.502454 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 12:44:58.505401 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 12:44:58.511976 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 12:44:58.515367 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 12:44:58.522594 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 12:44:58.525552 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 12:44:58.532091 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 12:44:58.535202 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 12:44:58.541971 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 12:44:58.545396 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 12:44:58.551924 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 12:44:58.555112 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 12:44:58.562129 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 12:44:58.565128 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 12:44:58.571767 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 12:44:58.575070 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 12:44:58.578273 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 12:44:58.585067 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 12:44:58.588345 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 12:44:58.598194 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 12:44:58.601649 avoid_fixed_resources: DOMAIN: 0000
1271 12:44:58.608482 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 12:44:58.615238 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 12:44:58.621563 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 12:44:58.628139 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 12:44:58.638044 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 12:44:58.644589 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 12:44:58.651240 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 12:44:58.661242 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 12:44:58.667899 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 12:44:58.674214 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 12:44:58.680759 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 12:44:58.690677 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 12:44:58.691236 Setting resources...
1284 12:44:58.697298 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 12:44:58.700926 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 12:44:58.704207 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 12:44:58.710762 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 12:44:58.713956 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 12:44:58.720440 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 12:44:58.727250 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 12:44:58.734125 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 12:44:58.740891 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 12:44:58.743743 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 12:44:58.750492 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 12:44:58.754098 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 12:44:58.760435 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 12:44:58.763909 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 12:44:58.770278 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 12:44:58.773882 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 12:44:58.780093 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 12:44:58.783575 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 12:44:58.790216 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 12:44:58.793421 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 12:44:58.800054 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 12:44:58.803552 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 12:44:58.810085 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 12:44:58.813279 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 12:44:58.816753 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 12:44:58.823208 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 12:44:58.826369 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 12:44:58.833631 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 12:44:58.836462 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 12:44:58.843097 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 12:44:58.846725 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 12:44:58.852915 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 12:44:58.859582 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 12:44:58.865969 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 12:44:58.872690 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 12:44:58.882437 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 12:44:58.886247 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 12:44:58.893037 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 12:44:58.899302 Root Device assign_resources, bus 0 link: 0
1323 12:44:58.902640 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 12:44:58.912372 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 12:44:58.919166 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 12:44:58.928856 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 12:44:58.935695 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 12:44:58.945925 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 12:44:58.952237 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 12:44:58.958916 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:44:58.962067 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 12:44:58.968799 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 12:44:58.978279 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 12:44:58.984935 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 12:44:58.994994 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 12:44:58.998297 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 12:44:59.004976 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 12:44:59.011527 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 12:44:59.018050 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 12:44:59.021399 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 12:44:59.028175 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 12:44:59.038269 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 12:44:59.045107 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 12:44:59.054623 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 12:44:59.061515 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 12:44:59.068152 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 12:44:59.074870 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 12:44:59.084775 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 12:44:59.088447 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 12:44:59.095002 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 12:44:59.101698 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 12:44:59.111980 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 12:44:59.121718 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 12:44:59.125289 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:44:59.131303 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 12:44:59.138078 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 12:44:59.144554 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 12:44:59.154857 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 12:44:59.157766 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 12:44:59.164617 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 12:44:59.171028 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 12:44:59.177521 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 12:44:59.181172 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 12:44:59.184339 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:44:59.191081 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 12:44:59.194953 LPC: Trying to open IO window from 800 size 1ff
1367 12:44:59.204437 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 12:44:59.211535 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 12:44:59.221141 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 12:44:59.228119 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 12:44:59.234389 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:44:59.237814 Root Device assign_resources, bus 0 link: 0
1373 12:44:59.240976 Done setting resources.
1374 12:44:59.247584 Show resources in subtree (Root Device)...After assigning values.
1375 12:44:59.251250 Root Device child on link 0 CPU_CLUSTER: 0
1376 12:44:59.254562 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 12:44:59.257766 APIC: 00
1378 12:44:59.258204 APIC: 03
1379 12:44:59.258547 APIC: 06
1380 12:44:59.261021 APIC: 01
1381 12:44:59.261461 APIC: 02
1382 12:44:59.264203 APIC: 04
1383 12:44:59.264668 APIC: 05
1384 12:44:59.265015 APIC: 07
1385 12:44:59.271230 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 12:44:59.281276 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 12:44:59.290918 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 12:44:59.291367 PCI: 00:00.0
1389 12:44:59.301069 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 12:44:59.310789 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 12:44:59.320618 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 12:44:59.330203 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 12:44:59.340360 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 12:44:59.346924 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 12:44:59.356924 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 12:44:59.367004 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 12:44:59.376600 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 12:44:59.386837 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 12:44:59.393258 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 12:44:59.403729 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 12:44:59.413347 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 12:44:59.422794 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 12:44:59.432853 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 12:44:59.442699 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 12:44:59.443193 PCI: 00:02.0
1406 12:44:59.456120 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 12:44:59.465715 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 12:44:59.476062 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 12:44:59.476584 PCI: 00:04.0
1410 12:44:59.479157 PCI: 00:08.0
1411 12:44:59.489116 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 12:44:59.489577 PCI: 00:12.0
1413 12:44:59.498992 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 12:44:59.505417 PCI: 00:14.0 child on link 0 USB0 port 0
1415 12:44:59.515832 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 12:44:59.519032 USB0 port 0 child on link 0 USB2 port 0
1417 12:44:59.522371 USB2 port 0
1418 12:44:59.522959 USB2 port 1
1419 12:44:59.525556 USB2 port 2
1420 12:44:59.526058 USB2 port 3
1421 12:44:59.528887 USB2 port 5
1422 12:44:59.529389 USB2 port 6
1423 12:44:59.532118 USB2 port 9
1424 12:44:59.532767 USB3 port 0
1425 12:44:59.535648 USB3 port 1
1426 12:44:59.536150 USB3 port 2
1427 12:44:59.538884 USB3 port 3
1428 12:44:59.539482 USB3 port 4
1429 12:44:59.542017 PCI: 00:14.2
1430 12:44:59.551820 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 12:44:59.562163 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 12:44:59.564981 PCI: 00:14.3
1433 12:44:59.575080 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 12:44:59.578256 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 12:44:59.588219 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 12:44:59.591620 I2C: 01:15
1437 12:44:59.594764 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 12:44:59.604787 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 12:44:59.608032 I2C: 02:5d
1440 12:44:59.608522 GENERIC: 0.0
1441 12:44:59.611377 PCI: 00:16.0
1442 12:44:59.621470 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 12:44:59.621935 PCI: 00:17.0
1444 12:44:59.631010 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 12:44:59.640811 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 12:44:59.650938 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 12:44:59.660751 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 12:44:59.671024 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 12:44:59.680782 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 12:44:59.684179 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 12:44:59.694062 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 12:44:59.697481 I2C: 03:1a
1453 12:44:59.697960 I2C: 03:38
1454 12:44:59.700995 I2C: 03:39
1455 12:44:59.701564 I2C: 03:3a
1456 12:44:59.701949 I2C: 03:3b
1457 12:44:59.707158 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 12:44:59.717360 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 12:44:59.727136 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 12:44:59.737146 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 12:44:59.737613 PCI: 01:00.0
1462 12:44:59.747037 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 12:44:59.750290 PCI: 00:1e.0
1464 12:44:59.760223 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 12:44:59.770182 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 12:44:59.776555 PCI: 00:1e.2 child on link 0 SPI: 00
1467 12:44:59.786434 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 12:44:59.786722 SPI: 00
1469 12:44:59.789537 PCI: 00:1e.3 child on link 0 SPI: 01
1470 12:44:59.803358 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 12:44:59.803814 SPI: 01
1472 12:44:59.806328 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 12:44:59.816368 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 12:44:59.826254 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 12:44:59.826711 PNP: 0c09.0
1476 12:44:59.836126 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 12:44:59.836617 PCI: 00:1f.3
1478 12:44:59.846162 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 12:44:59.856085 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 12:44:59.859681 PCI: 00:1f.4
1481 12:44:59.869178 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 12:44:59.879379 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 12:44:59.879838 PCI: 00:1f.5
1484 12:44:59.889220 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 12:44:59.892642 Done allocating resources.
1486 12:44:59.899183 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 12:44:59.902341 Enabling resources...
1488 12:44:59.905823 PCI: 00:00.0 subsystem <- 8086/9b61
1489 12:44:59.908880 PCI: 00:00.0 cmd <- 06
1490 12:44:59.912424 PCI: 00:02.0 subsystem <- 8086/9b41
1491 12:44:59.915601 PCI: 00:02.0 cmd <- 03
1492 12:44:59.916049 PCI: 00:08.0 cmd <- 06
1493 12:44:59.922638 PCI: 00:12.0 subsystem <- 8086/02f9
1494 12:44:59.923082 PCI: 00:12.0 cmd <- 02
1495 12:44:59.925808 PCI: 00:14.0 subsystem <- 8086/02ed
1496 12:44:59.929462 PCI: 00:14.0 cmd <- 02
1497 12:44:59.932204 PCI: 00:14.2 cmd <- 02
1498 12:44:59.935748 PCI: 00:14.3 subsystem <- 8086/02f0
1499 12:44:59.938738 PCI: 00:14.3 cmd <- 02
1500 12:44:59.942393 PCI: 00:15.0 subsystem <- 8086/02e8
1501 12:44:59.945498 PCI: 00:15.0 cmd <- 02
1502 12:44:59.949254 PCI: 00:15.1 subsystem <- 8086/02e9
1503 12:44:59.952340 PCI: 00:15.1 cmd <- 02
1504 12:44:59.955461 PCI: 00:16.0 subsystem <- 8086/02e0
1505 12:44:59.958734 PCI: 00:16.0 cmd <- 02
1506 12:44:59.962158 PCI: 00:17.0 subsystem <- 8086/02d3
1507 12:44:59.962673 PCI: 00:17.0 cmd <- 03
1508 12:44:59.969028 PCI: 00:19.0 subsystem <- 8086/02c5
1509 12:44:59.969565 PCI: 00:19.0 cmd <- 02
1510 12:44:59.972085 PCI: 00:1d.0 bridge ctrl <- 0013
1511 12:44:59.975758 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 12:44:59.979011 PCI: 00:1d.0 cmd <- 06
1513 12:44:59.982315 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 12:44:59.986058 PCI: 00:1e.0 cmd <- 06
1515 12:44:59.988825 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 12:44:59.992073 PCI: 00:1e.2 cmd <- 06
1517 12:44:59.995350 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 12:44:59.998850 PCI: 00:1e.3 cmd <- 02
1519 12:45:00.002599 PCI: 00:1f.0 subsystem <- 8086/0284
1520 12:45:00.005528 PCI: 00:1f.0 cmd <- 407
1521 12:45:00.008594 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 12:45:00.012028 PCI: 00:1f.3 cmd <- 02
1523 12:45:00.015447 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 12:45:00.018823 PCI: 00:1f.4 cmd <- 03
1525 12:45:00.021768 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 12:45:00.022236 PCI: 00:1f.5 cmd <- 406
1527 12:45:00.032180 PCI: 01:00.0 cmd <- 02
1528 12:45:00.037468 done.
1529 12:45:00.049445 ME: Version: 14.0.39.1367
1530 12:45:00.055981 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1531 12:45:00.059425 Initializing devices...
1532 12:45:00.059877 Root Device init ...
1533 12:45:00.066074 Chrome EC: Set SMI mask to 0x0000000000000000
1534 12:45:00.069120 Chrome EC: clear events_b mask to 0x0000000000000000
1535 12:45:00.075765 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 12:45:00.082416 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 12:45:00.089514 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 12:45:00.092345 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 12:45:00.095693 Root Device init finished in 35150 usecs
1540 12:45:00.099257 CPU_CLUSTER: 0 init ...
1541 12:45:00.105894 CPU_CLUSTER: 0 init finished in 2439 usecs
1542 12:45:00.110020 PCI: 00:00.0 init ...
1543 12:45:00.113234 CPU TDP: 15 Watts
1544 12:45:00.116547 CPU PL2 = 64 Watts
1545 12:45:00.119784 PCI: 00:00.0 init finished in 7080 usecs
1546 12:45:00.123493 PCI: 00:02.0 init ...
1547 12:45:00.126902 PCI: 00:02.0 init finished in 2254 usecs
1548 12:45:00.129764 PCI: 00:08.0 init ...
1549 12:45:00.133107 PCI: 00:08.0 init finished in 2251 usecs
1550 12:45:00.136504 PCI: 00:12.0 init ...
1551 12:45:00.139825 PCI: 00:12.0 init finished in 2252 usecs
1552 12:45:00.143311 PCI: 00:14.0 init ...
1553 12:45:00.146611 PCI: 00:14.0 init finished in 2252 usecs
1554 12:45:00.149716 PCI: 00:14.2 init ...
1555 12:45:00.153485 PCI: 00:14.2 init finished in 2252 usecs
1556 12:45:00.156587 PCI: 00:14.3 init ...
1557 12:45:00.159425 PCI: 00:14.3 init finished in 2259 usecs
1558 12:45:00.163074 PCI: 00:15.0 init ...
1559 12:45:00.166247 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 12:45:00.169511 PCI: 00:15.0 init finished in 5976 usecs
1561 12:45:00.172819 PCI: 00:15.1 init ...
1562 12:45:00.176004 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 12:45:00.182653 PCI: 00:15.1 init finished in 5975 usecs
1564 12:45:00.183113 PCI: 00:16.0 init ...
1565 12:45:00.189244 PCI: 00:16.0 init finished in 2251 usecs
1566 12:45:00.192730 PCI: 00:19.0 init ...
1567 12:45:00.195754 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 12:45:00.199288 PCI: 00:19.0 init finished in 5975 usecs
1569 12:45:00.202317 PCI: 00:1d.0 init ...
1570 12:45:00.205619 Initializing PCH PCIe bridge.
1571 12:45:00.208768 PCI: 00:1d.0 init finished in 5282 usecs
1572 12:45:00.212473 PCI: 00:1f.0 init ...
1573 12:45:00.215802 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 12:45:00.222154 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 12:45:00.222636 IOAPIC: ID = 0x02
1576 12:45:00.225382 IOAPIC: Dumping registers
1577 12:45:00.228765 reg 0x0000: 0x02000000
1578 12:45:00.232059 reg 0x0001: 0x00770020
1579 12:45:00.232529 reg 0x0002: 0x00000000
1580 12:45:00.238658 PCI: 00:1f.0 init finished in 23532 usecs
1581 12:45:00.242123 PCI: 00:1f.4 init ...
1582 12:45:00.245175 PCI: 00:1f.4 init finished in 2262 usecs
1583 12:45:00.255827 PCI: 01:00.0 init ...
1584 12:45:00.259375 PCI: 01:00.0 init finished in 2252 usecs
1585 12:45:00.263717 PNP: 0c09.0 init ...
1586 12:45:00.266923 Google Chrome EC uptime: 11.093 seconds
1587 12:45:00.273530 Google Chrome AP resets since EC boot: 0
1588 12:45:00.276985 Google Chrome most recent AP reset causes:
1589 12:45:00.283609 Google Chrome EC reset flags at last EC boot: reset-pin
1590 12:45:00.287129 PNP: 0c09.0 init finished in 20565 usecs
1591 12:45:00.290428 Devices initialized
1592 12:45:00.290919 Show all devs... After init.
1593 12:45:00.293439 Root Device: enabled 1
1594 12:45:00.297087 CPU_CLUSTER: 0: enabled 1
1595 12:45:00.300702 DOMAIN: 0000: enabled 1
1596 12:45:00.301196 APIC: 00: enabled 1
1597 12:45:00.303577 PCI: 00:00.0: enabled 1
1598 12:45:00.306678 PCI: 00:02.0: enabled 1
1599 12:45:00.309962 PCI: 00:04.0: enabled 0
1600 12:45:00.310453 PCI: 00:05.0: enabled 0
1601 12:45:00.313221 PCI: 00:12.0: enabled 1
1602 12:45:00.316482 PCI: 00:12.5: enabled 0
1603 12:45:00.316934 PCI: 00:12.6: enabled 0
1604 12:45:00.320064 PCI: 00:14.0: enabled 1
1605 12:45:00.323123 PCI: 00:14.1: enabled 0
1606 12:45:00.326650 PCI: 00:14.3: enabled 1
1607 12:45:00.327101 PCI: 00:14.5: enabled 0
1608 12:45:00.330406 PCI: 00:15.0: enabled 1
1609 12:45:00.333332 PCI: 00:15.1: enabled 1
1610 12:45:00.336747 PCI: 00:15.2: enabled 0
1611 12:45:00.337197 PCI: 00:15.3: enabled 0
1612 12:45:00.339653 PCI: 00:16.0: enabled 1
1613 12:45:00.343271 PCI: 00:16.1: enabled 0
1614 12:45:00.346323 PCI: 00:16.2: enabled 0
1615 12:45:00.346775 PCI: 00:16.3: enabled 0
1616 12:45:00.349964 PCI: 00:16.4: enabled 0
1617 12:45:00.353264 PCI: 00:16.5: enabled 0
1618 12:45:00.356250 PCI: 00:17.0: enabled 1
1619 12:45:00.356730 PCI: 00:19.0: enabled 1
1620 12:45:00.359528 PCI: 00:19.1: enabled 0
1621 12:45:00.363262 PCI: 00:19.2: enabled 0
1622 12:45:00.363738 PCI: 00:1a.0: enabled 0
1623 12:45:00.366273 PCI: 00:1c.0: enabled 0
1624 12:45:00.369463 PCI: 00:1c.1: enabled 0
1625 12:45:00.372838 PCI: 00:1c.2: enabled 0
1626 12:45:00.373292 PCI: 00:1c.3: enabled 0
1627 12:45:00.376233 PCI: 00:1c.4: enabled 0
1628 12:45:00.379759 PCI: 00:1c.5: enabled 0
1629 12:45:00.383044 PCI: 00:1c.6: enabled 0
1630 12:45:00.383497 PCI: 00:1c.7: enabled 0
1631 12:45:00.386532 PCI: 00:1d.0: enabled 1
1632 12:45:00.389620 PCI: 00:1d.1: enabled 0
1633 12:45:00.392664 PCI: 00:1d.2: enabled 0
1634 12:45:00.393116 PCI: 00:1d.3: enabled 0
1635 12:45:00.395920 PCI: 00:1d.4: enabled 0
1636 12:45:00.399237 PCI: 00:1d.5: enabled 0
1637 12:45:00.399693 PCI: 00:1e.0: enabled 1
1638 12:45:00.402735 PCI: 00:1e.1: enabled 0
1639 12:45:00.405898 PCI: 00:1e.2: enabled 1
1640 12:45:00.409217 PCI: 00:1e.3: enabled 1
1641 12:45:00.409669 PCI: 00:1f.0: enabled 1
1642 12:45:00.412425 PCI: 00:1f.1: enabled 0
1643 12:45:00.416038 PCI: 00:1f.2: enabled 0
1644 12:45:00.419278 PCI: 00:1f.3: enabled 1
1645 12:45:00.419757 PCI: 00:1f.4: enabled 1
1646 12:45:00.422612 PCI: 00:1f.5: enabled 1
1647 12:45:00.425959 PCI: 00:1f.6: enabled 0
1648 12:45:00.429314 USB0 port 0: enabled 1
1649 12:45:00.429776 I2C: 01:15: enabled 1
1650 12:45:00.433038 I2C: 02:5d: enabled 1
1651 12:45:00.435624 GENERIC: 0.0: enabled 1
1652 12:45:00.436073 I2C: 03:1a: enabled 1
1653 12:45:00.438939 I2C: 03:38: enabled 1
1654 12:45:00.442566 I2C: 03:39: enabled 1
1655 12:45:00.443114 I2C: 03:3a: enabled 1
1656 12:45:00.445604 I2C: 03:3b: enabled 1
1657 12:45:00.448900 PCI: 00:00.0: enabled 1
1658 12:45:00.449390 SPI: 00: enabled 1
1659 12:45:00.452581 SPI: 01: enabled 1
1660 12:45:00.455799 PNP: 0c09.0: enabled 1
1661 12:45:00.456386 USB2 port 0: enabled 1
1662 12:45:00.458901 USB2 port 1: enabled 1
1663 12:45:00.462323 USB2 port 2: enabled 0
1664 12:45:00.462827 USB2 port 3: enabled 0
1665 12:45:00.465406 USB2 port 5: enabled 0
1666 12:45:00.468908 USB2 port 6: enabled 1
1667 12:45:00.472050 USB2 port 9: enabled 1
1668 12:45:00.472575 USB3 port 0: enabled 1
1669 12:45:00.475481 USB3 port 1: enabled 1
1670 12:45:00.478942 USB3 port 2: enabled 1
1671 12:45:00.479431 USB3 port 3: enabled 1
1672 12:45:00.481828 USB3 port 4: enabled 0
1673 12:45:00.485435 APIC: 03: enabled 1
1674 12:45:00.485891 APIC: 06: enabled 1
1675 12:45:00.488726 APIC: 01: enabled 1
1676 12:45:00.491822 APIC: 02: enabled 1
1677 12:45:00.492363 APIC: 04: enabled 1
1678 12:45:00.495093 APIC: 05: enabled 1
1679 12:45:00.495592 APIC: 07: enabled 1
1680 12:45:00.498468 PCI: 00:08.0: enabled 1
1681 12:45:00.501978 PCI: 00:14.2: enabled 1
1682 12:45:00.505078 PCI: 01:00.0: enabled 1
1683 12:45:00.508982 Disabling ACPI via APMC:
1684 12:45:00.509472 done.
1685 12:45:00.515235 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 12:45:00.518482 ELOG: NV offset 0xaf0000 size 0x4000
1687 12:45:00.525335 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 12:45:00.532097 ELOG: Event(17) added with size 13 at 2023-03-22 12:45:00 UTC
1689 12:45:00.538663 ELOG: Event(92) added with size 9 at 2023-03-22 12:45:00 UTC
1690 12:45:00.545288 ELOG: Event(93) added with size 9 at 2023-03-22 12:45:00 UTC
1691 12:45:00.551938 ELOG: Event(9A) added with size 9 at 2023-03-22 12:45:00 UTC
1692 12:45:00.558379 ELOG: Event(9E) added with size 10 at 2023-03-22 12:45:00 UTC
1693 12:45:00.565167 ELOG: Event(9F) added with size 14 at 2023-03-22 12:45:00 UTC
1694 12:45:00.567969 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 12:45:00.575473 ELOG: Event(A1) added with size 10 at 2023-03-22 12:45:00 UTC
1696 12:45:00.585223 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 12:45:00.592434 ELOG: Event(A0) added with size 9 at 2023-03-22 12:45:00 UTC
1698 12:45:00.595400 elog_add_boot_reason: Logged dev mode boot
1699 12:45:00.598563 Finalize devices...
1700 12:45:00.599042 PCI: 00:17.0 final
1701 12:45:00.602018 Devices finalized
1702 12:45:00.605279 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 12:45:00.612203 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 12:45:00.615139 ME: HFSTS1 : 0x90000245
1705 12:45:00.618639 ME: HFSTS2 : 0x3B850126
1706 12:45:00.625171 ME: HFSTS3 : 0x00000020
1707 12:45:00.628127 ME: HFSTS4 : 0x00004800
1708 12:45:00.632012 ME: HFSTS5 : 0x00000000
1709 12:45:00.634755 ME: HFSTS6 : 0x40400006
1710 12:45:00.638608 ME: Manufacturing Mode : NO
1711 12:45:00.641829 ME: FW Partition Table : OK
1712 12:45:00.645361 ME: Bringup Loader Failure : NO
1713 12:45:00.648180 ME: Firmware Init Complete : YES
1714 12:45:00.651397 ME: Boot Options Present : NO
1715 12:45:00.654907 ME: Update In Progress : NO
1716 12:45:00.658257 ME: D0i3 Support : YES
1717 12:45:00.661232 ME: Low Power State Enabled : NO
1718 12:45:00.664708 ME: CPU Replaced : NO
1719 12:45:00.667787 ME: CPU Replacement Valid : YES
1720 12:45:00.671409 ME: Current Working State : 5
1721 12:45:00.674407 ME: Current Operation State : 1
1722 12:45:00.678066 ME: Current Operation Mode : 0
1723 12:45:00.681237 ME: Error Code : 0
1724 12:45:00.684558 ME: CPU Debug Disabled : YES
1725 12:45:00.687873 ME: TXT Support : NO
1726 12:45:00.694594 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 12:45:00.700833 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 12:45:00.701343 CBFS @ c08000 size 3f8000
1729 12:45:00.707712 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 12:45:00.711122 CBFS: Locating 'fallback/dsdt.aml'
1731 12:45:00.714587 CBFS: Found @ offset 10bb80 size 3fa5
1732 12:45:00.720745 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 12:45:00.724432 CBFS @ c08000 size 3f8000
1734 12:45:00.727426 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 12:45:00.730666 CBFS: Locating 'fallback/slic'
1736 12:45:00.736188 CBFS: 'fallback/slic' not found.
1737 12:45:00.742592 ACPI: Writing ACPI tables at 99b3e000.
1738 12:45:00.743107 ACPI: * FACS
1739 12:45:00.746177 ACPI: * DSDT
1740 12:45:00.748939 Ramoops buffer: 0x100000@0x99a3d000.
1741 12:45:00.752424 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 12:45:00.758994 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 12:45:00.762248 Google Chrome EC: version:
1744 12:45:00.765633 ro: helios_v2.0.2659-56403530b
1745 12:45:00.768855 rw: helios_v2.0.2849-c41de27e7d
1746 12:45:00.769392 running image: 1
1747 12:45:00.773318 ACPI: * FADT
1748 12:45:00.773814 SCI is IRQ9
1749 12:45:00.779906 ACPI: added table 1/32, length now 40
1750 12:45:00.780446 ACPI: * SSDT
1751 12:45:00.783510 Found 1 CPU(s) with 8 core(s) each.
1752 12:45:00.786678 Error: Could not locate 'wifi_sar' in VPD.
1753 12:45:00.793087 Checking CBFS for default SAR values
1754 12:45:00.796481 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 12:45:00.800015 CBFS @ c08000 size 3f8000
1756 12:45:00.806873 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 12:45:00.809779 CBFS: Locating 'wifi_sar_defaults.hex'
1758 12:45:00.812961 CBFS: Found @ offset 5fac0 size 77
1759 12:45:00.816071 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 12:45:00.822994 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 12:45:00.826294 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 12:45:00.832942 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 12:45:00.836180 failed to find key in VPD: dsm_calib_r0_0
1764 12:45:00.846039 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 12:45:00.849751 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 12:45:00.853115 failed to find key in VPD: dsm_calib_r0_1
1767 12:45:00.862514 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 12:45:00.869233 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 12:45:00.872295 failed to find key in VPD: dsm_calib_r0_2
1770 12:45:00.882629 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 12:45:00.885793 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 12:45:00.892620 failed to find key in VPD: dsm_calib_r0_3
1773 12:45:00.898822 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 12:45:00.905806 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 12:45:00.909181 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 12:45:00.912654 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 12:45:00.916559 EC returned error result code 1
1778 12:45:00.923326 EC returned error result code 1
1779 12:45:00.926682 EC returned error result code 1
1780 12:45:00.930176 PS2K: Bad resp from EC. Vivaldi disabled!
1781 12:45:00.936281 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 12:45:00.940219 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 12:45:00.946496 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 12:45:00.949726 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 12:45:00.956281 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 12:45:00.963505 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 12:45:00.969671 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 12:45:00.976196 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 12:45:00.979687 ACPI: added table 2/32, length now 44
1790 12:45:00.980185 ACPI: * MCFG
1791 12:45:00.982803 ACPI: added table 3/32, length now 48
1792 12:45:00.986134 ACPI: * TPM2
1793 12:45:00.989355 TPM2 log created at 99a2d000
1794 12:45:00.992659 ACPI: added table 4/32, length now 52
1795 12:45:00.993293 ACPI: * MADT
1796 12:45:00.995801 SCI is IRQ9
1797 12:45:00.999558 ACPI: added table 5/32, length now 56
1798 12:45:01.002945 current = 99b43ac0
1799 12:45:01.003564 ACPI: * DMAR
1800 12:45:01.005928 ACPI: added table 6/32, length now 60
1801 12:45:01.009280 ACPI: * IGD OpRegion
1802 12:45:01.012648 GMA: Found VBT in CBFS
1803 12:45:01.013252 GMA: Found valid VBT in CBFS
1804 12:45:01.018985 ACPI: added table 7/32, length now 64
1805 12:45:01.019482 ACPI: * HPET
1806 12:45:01.022367 ACPI: added table 8/32, length now 68
1807 12:45:01.025460 ACPI: done.
1808 12:45:01.026060 ACPI tables: 31744 bytes.
1809 12:45:01.028951 smbios_write_tables: 99a2c000
1810 12:45:01.032432 EC returned error result code 3
1811 12:45:01.038806 Couldn't obtain OEM name from CBI
1812 12:45:01.039307 Create SMBIOS type 17
1813 12:45:01.042602 PCI: 00:00.0 (Intel Cannonlake)
1814 12:45:01.045545 PCI: 00:14.3 (Intel WiFi)
1815 12:45:01.049122 SMBIOS tables: 939 bytes.
1816 12:45:01.052074 Writing table forward entry at 0x00000500
1817 12:45:01.059399 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 12:45:01.062331 Writing coreboot table at 0x99b62000
1819 12:45:01.068704 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 12:45:01.071940 1. 0000000000001000-000000000009ffff: RAM
1821 12:45:01.078780 2. 00000000000a0000-00000000000fffff: RESERVED
1822 12:45:01.082015 3. 0000000000100000-0000000099a2bfff: RAM
1823 12:45:01.088601 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 12:45:01.091885 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 12:45:01.098523 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 12:45:01.102204 7. 000000009a000000-000000009f7fffff: RESERVED
1827 12:45:01.108623 8. 00000000e0000000-00000000efffffff: RESERVED
1828 12:45:01.112023 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 12:45:01.118747 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 12:45:01.121568 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 12:45:01.128398 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 12:45:01.131916 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 12:45:01.138298 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 12:45:01.141522 15. 0000000100000000-000000045e7fffff: RAM
1835 12:45:01.144680 Graphics framebuffer located at 0xc0000000
1836 12:45:01.147924 Passing 5 GPIOs to payload:
1837 12:45:01.154479 NAME | PORT | POLARITY | VALUE
1838 12:45:01.158074 write protect | undefined | high | low
1839 12:45:01.164621 lid | undefined | high | high
1840 12:45:01.168278 power | undefined | high | low
1841 12:45:01.174992 oprom | undefined | high | low
1842 12:45:01.178371 EC in RW | 0x000000cb | high | low
1843 12:45:01.181180 Board ID: 4
1844 12:45:01.184808 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 12:45:01.188279 CBFS @ c08000 size 3f8000
1846 12:45:01.194649 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 12:45:01.201328 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1848 12:45:01.204260 coreboot table: 1492 bytes.
1849 12:45:01.207757 IMD ROOT 0. 99fff000 00001000
1850 12:45:01.211301 IMD SMALL 1. 99ffe000 00001000
1851 12:45:01.214714 FSP MEMORY 2. 99c4e000 003b0000
1852 12:45:01.218139 CONSOLE 3. 99c2e000 00020000
1853 12:45:01.220810 FMAP 4. 99c2d000 0000054e
1854 12:45:01.224487 TIME STAMP 5. 99c2c000 00000910
1855 12:45:01.227719 VBOOT WORK 6. 99c18000 00014000
1856 12:45:01.230806 MRC DATA 7. 99c16000 00001958
1857 12:45:01.234463 ROMSTG STCK 8. 99c15000 00001000
1858 12:45:01.237627 AFTER CAR 9. 99c0b000 0000a000
1859 12:45:01.240817 RAMSTAGE 10. 99baf000 0005c000
1860 12:45:01.244151 REFCODE 11. 99b7a000 00035000
1861 12:45:01.247605 SMM BACKUP 12. 99b6a000 00010000
1862 12:45:01.250820 COREBOOT 13. 99b62000 00008000
1863 12:45:01.254265 ACPI 14. 99b3e000 00024000
1864 12:45:01.257561 ACPI GNVS 15. 99b3d000 00001000
1865 12:45:01.260853 RAMOOPS 16. 99a3d000 00100000
1866 12:45:01.264289 TPM2 TCGLOG17. 99a2d000 00010000
1867 12:45:01.267376 SMBIOS 18. 99a2c000 00000800
1868 12:45:01.267866 IMD small region:
1869 12:45:01.270637 IMD ROOT 0. 99ffec00 00000400
1870 12:45:01.274240 FSP RUNTIME 1. 99ffebe0 00000004
1871 12:45:01.277687 EC HOSTEVENT 2. 99ffebc0 00000008
1872 12:45:01.280558 POWER STATE 3. 99ffeb80 00000040
1873 12:45:01.287536 ROMSTAGE 4. 99ffeb60 00000004
1874 12:45:01.290684 MEM INFO 5. 99ffe9a0 000001b9
1875 12:45:01.294144 VPD 6. 99ffe920 0000006c
1876 12:45:01.297447 MTRR: Physical address space:
1877 12:45:01.301303 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 12:45:01.307393 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 12:45:01.314042 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 12:45:01.320999 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 12:45:01.327394 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 12:45:01.333882 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 12:45:01.340397 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 12:45:01.343743 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:45:01.347366 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:45:01.350558 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:45:01.357203 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:45:01.360519 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:45:01.363769 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:45:01.367117 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:45:01.373805 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:45:01.376816 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:45:01.380426 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:45:01.383688 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:45:01.386980 call enable_fixed_mtrr()
1896 12:45:01.390249 CPU physical address size: 39 bits
1897 12:45:01.397244 MTRR: default type WB/UC MTRR counts: 6/8.
1898 12:45:01.400410 MTRR: WB selected as default type.
1899 12:45:01.406874 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 12:45:01.410732 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 12:45:01.416926 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 12:45:01.423535 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 12:45:01.430578 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 12:45:01.436671 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 12:45:01.440227 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 12:45:01.446880 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 12:45:01.449900 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 12:45:01.453364 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 12:45:01.456989 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 12:45:01.463236 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 12:45:01.466553 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 12:45:01.469886 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 12:45:01.473104 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 12:45:01.479679 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 12:45:01.482905 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 12:45:01.483470
1917 12:45:01.483896 MTRR check
1918 12:45:01.486294 Fixed MTRRs : Enabled
1919 12:45:01.489539 Variable MTRRs: Enabled
1920 12:45:01.490090
1921 12:45:01.493087 call enable_fixed_mtrr()
1922 12:45:01.496133 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 12:45:01.499755 CPU physical address size: 39 bits
1924 12:45:01.506523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 12:45:01.509920 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:45:01.513011 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 12:45:01.520089 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 12:45:01.522850 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:45:01.526205 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:45:01.529307 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:45:01.536242 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:45:01.539705 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:45:01.543190 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:45:01.546444 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:45:01.549539 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:45:01.556032 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:45:01.559617 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 12:45:01.562925 call enable_fixed_mtrr()
1939 12:45:01.565847 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 12:45:01.568988 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 12:45:01.575653 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 12:45:01.578950 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 12:45:01.582863 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 12:45:01.585698 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 12:45:01.592025 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 12:45:01.595709 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 12:45:01.598770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 12:45:01.602381 CPU physical address size: 39 bits
1949 12:45:01.605558 call enable_fixed_mtrr()
1950 12:45:01.608803 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 12:45:01.612449 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 12:45:01.618939 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 12:45:01.622108 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 12:45:01.625121 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 12:45:01.629014 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 12:45:01.635309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 12:45:01.638953 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 12:45:01.641926 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 12:45:01.645158 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 12:45:01.651948 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 12:45:01.655265 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 12:45:01.658708 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 12:45:01.661435 call enable_fixed_mtrr()
1964 12:45:01.664945 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 12:45:01.668051 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 12:45:01.675383 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 12:45:01.678295 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 12:45:01.681775 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 12:45:01.684651 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 12:45:01.691297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 12:45:01.694674 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 12:45:01.698361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 12:45:01.701245 CPU physical address size: 39 bits
1974 12:45:01.704650 call enable_fixed_mtrr()
1975 12:45:01.708110 CPU physical address size: 39 bits
1976 12:45:01.710959 CBFS @ c08000 size 3f8000
1977 12:45:01.717961 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1978 12:45:01.721026 CPU physical address size: 39 bits
1979 12:45:01.724446 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 12:45:01.727658 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 12:45:01.731065 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 12:45:01.737428 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 12:45:01.741439 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 12:45:01.744368 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 12:45:01.747560 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 12:45:01.754331 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 12:45:01.757360 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 12:45:01.761102 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 12:45:01.763889 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 12:45:01.770740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 12:45:01.774259 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 12:45:01.777296 call enable_fixed_mtrr()
1993 12:45:01.780347 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 12:45:01.783931 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 12:45:01.786957 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 12:45:01.793866 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 12:45:01.797583 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 12:45:01.800856 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 12:45:01.804055 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 12:45:01.810434 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 12:45:01.813821 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 12:45:01.817463 CPU physical address size: 39 bits
2003 12:45:01.820157 call enable_fixed_mtrr()
2004 12:45:01.823376 CBFS: Locating 'fallback/payload'
2005 12:45:01.827130 CPU physical address size: 39 bits
2006 12:45:01.830608 CBFS: Found @ offset 1c96c0 size 3f798
2007 12:45:01.833540 Checking segment from ROM address 0xffdd16f8
2008 12:45:01.840375 Checking segment from ROM address 0xffdd1714
2009 12:45:01.843778 Loading segment from ROM address 0xffdd16f8
2010 12:45:01.846663 code (compression=0)
2011 12:45:01.853666 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 12:45:01.863715 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 12:45:01.866625 it's not compressed!
2014 12:45:01.957577 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 12:45:01.964059 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 12:45:01.967239 Loading segment from ROM address 0xffdd1714
2017 12:45:01.970571 Entry Point 0x30000000
2018 12:45:01.973995 Loaded segments
2019 12:45:01.979546 Finalizing chipset.
2020 12:45:01.982768 Finalizing SMM.
2021 12:45:01.986407 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2022 12:45:01.989632 mp_park_aps done after 0 msecs.
2023 12:45:01.995918 Jumping to boot code at 30000000(99b62000)
2024 12:45:02.002785 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 12:45:02.003245
2026 12:45:02.003634
2027 12:45:02.003970
2028 12:45:02.006122 Starting depthcharge on Helios...
2029 12:45:02.006597
2030 12:45:02.007677 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 12:45:02.008207 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 12:45:02.008697 Setting prompt string to ['hatch:']
2033 12:45:02.009122 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 12:45:02.016502 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 12:45:02.017122
2036 12:45:02.022370 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 12:45:02.022829
2038 12:45:02.029023 board_setup: Info: eMMC controller not present; skipping
2039 12:45:02.029482
2040 12:45:02.032366 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 12:45:02.032848
2042 12:45:02.038785 board_setup: Info: SDHCI controller not present; skipping
2043 12:45:02.039261
2044 12:45:02.045847 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 12:45:02.046405
2046 12:45:02.046766 Wipe memory regions:
2047 12:45:02.047165
2048 12:45:02.049053 [0x00000000001000, 0x000000000a0000)
2049 12:45:02.049509
2050 12:45:02.052563 [0x00000000100000, 0x00000030000000)
2051 12:45:02.118801
2052 12:45:02.121953 [0x00000030657430, 0x00000099a2c000)
2053 12:45:02.258882
2054 12:45:02.262600 [0x00000100000000, 0x0000045e800000)
2055 12:45:03.645848
2056 12:45:03.646415 R8152: Initializing
2057 12:45:03.646774
2058 12:45:03.648859 Version 9 (ocp_data = 6010)
2059 12:45:03.652851
2060 12:45:03.653349 R8152: Done initializing
2061 12:45:03.653709
2062 12:45:03.656184 Adding net device
2063 12:45:04.265695
2064 12:45:04.266239 R8152: Initializing
2065 12:45:04.266605
2066 12:45:04.268596 Version 6 (ocp_data = 5c30)
2067 12:45:04.269028
2068 12:45:04.272754 R8152: Done initializing
2069 12:45:04.273156
2070 12:45:04.275408 net_add_device: Attemp to include the same device
2071 12:45:04.278910
2072 12:45:04.285646 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 12:45:04.286098
2074 12:45:04.286438
2075 12:45:04.286829
2076 12:45:04.287660 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 12:45:04.389243 hatch: tftpboot 192.168.201.1 9729651/tftp-deploy-uwgtmfrs/kernel/bzImage 9729651/tftp-deploy-uwgtmfrs/kernel/cmdline 9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
2079 12:45:04.389790 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 12:45:04.390183 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 12:45:04.394407 tftpboot 192.168.201.1 9729651/tftp-deploy-uwgtmfrs/kernel/bzImoy-uwgtmfrs/kernel/cmdline 9729651/tftp-deploy-uwgtmfrs/ramdisk/ramdisk.cpio.gz
2082 12:45:04.394856
2083 12:45:04.395200 Waiting for link
2084 12:45:04.595145
2085 12:45:04.595569 done.
2086 12:45:04.595896
2087 12:45:04.596203 MAC: 00:24:32:50:1a:5f
2088 12:45:04.596640
2089 12:45:04.598856 Sending DHCP discover... done.
2090 12:45:04.599268
2091 12:45:04.601659 Waiting for reply... done.
2092 12:45:04.602198
2093 12:45:04.605593 Sending DHCP request... done.
2094 12:45:04.606039
2095 12:45:04.608628 Waiting for reply... done.
2096 12:45:04.609073
2097 12:45:04.611826 My ip is 192.168.201.21
2098 12:45:04.612272
2099 12:45:04.615028 The DHCP server ip is 192.168.201.1
2100 12:45:04.615474
2101 12:45:04.618659 TFTP server IP predefined by user: 192.168.201.1
2102 12:45:04.619108
2103 12:45:04.625093 Bootfile predefined by user: 9729651/tftp-deploy-uwgtmfrs/kernel/bzImage
2104 12:45:04.625543
2105 12:45:04.628951 Sending tftp read request... done.
2106 12:45:04.629468
2107 12:45:04.635983 Waiting for the transfer...
2108 12:45:04.636470
2109 12:45:05.265100 00000000 ################################################################
2110 12:45:05.265250
2111 12:45:05.872849 00080000 ################################################################
2112 12:45:05.873004
2113 12:45:06.481343 00100000 ################################################################
2114 12:45:06.481506
2115 12:45:07.095766 00180000 ################################################################
2116 12:45:07.095950
2117 12:45:07.705250 00200000 ################################################################
2118 12:45:07.705406
2119 12:45:08.338898 00280000 ################################################################
2120 12:45:08.339054
2121 12:45:08.959006 00300000 ################################################################
2122 12:45:08.959159
2123 12:45:09.552978 00380000 ################################################################
2124 12:45:09.553132
2125 12:45:10.155997 00400000 ################################################################
2126 12:45:10.156148
2127 12:45:10.763023 00480000 ################################################################
2128 12:45:10.763181
2129 12:45:11.380239 00500000 ################################################################
2130 12:45:11.380440
2131 12:45:11.989279 00580000 ################################################################
2132 12:45:11.989433
2133 12:45:12.602856 00600000 ################################################################
2134 12:45:12.603011
2135 12:45:13.240712 00680000 ################################################################
2136 12:45:13.240867
2137 12:45:13.870111 00700000 ################################################################
2138 12:45:13.870264
2139 12:45:14.486045 00780000 ################################################################
2140 12:45:14.486206
2141 12:45:15.092790 00800000 ################################################################
2142 12:45:15.092943
2143 12:45:15.710621 00880000 ################################################################
2144 12:45:15.710775
2145 12:45:16.325949 00900000 ################################################################
2146 12:45:16.326098
2147 12:45:16.914048 00980000 ################################################################
2148 12:45:16.914197
2149 12:45:17.501838 00a00000 ################################################################
2150 12:45:17.501989
2151 12:45:18.103463 00a80000 ################################################################
2152 12:45:18.103608
2153 12:45:18.238317 00b00000 ############## done.
2154 12:45:18.238449
2155 12:45:18.241342 The bootfile was 11646080 bytes long.
2156 12:45:18.241421
2157 12:45:18.244667 Sending tftp read request... done.
2158 12:45:18.244763
2159 12:45:18.247976 Waiting for the transfer...
2160 12:45:18.248110
2161 12:45:18.817286 00000000 ################################################################
2162 12:45:18.817438
2163 12:45:19.345414 00080000 ################################################################
2164 12:45:19.345564
2165 12:45:19.871730 00100000 ################################################################
2166 12:45:19.871879
2167 12:45:20.415965 00180000 ################################################################
2168 12:45:20.416113
2169 12:45:20.944468 00200000 ################################################################
2170 12:45:20.944612
2171 12:45:21.481154 00280000 ################################################################
2172 12:45:21.481300
2173 12:45:22.030046 00300000 ################################################################
2174 12:45:22.030189
2175 12:45:22.583911 00380000 ################################################################
2176 12:45:22.584050
2177 12:45:23.135828 00400000 ################################################################
2178 12:45:23.135968
2179 12:45:23.741169 00480000 ################################################################
2180 12:45:23.741307
2181 12:45:24.376991 00500000 ################################################################
2182 12:45:24.377664
2183 12:45:24.888342 00580000 ################################################# done.
2184 12:45:24.888949
2185 12:45:24.891586 Sending tftp read request... done.
2186 12:45:24.892092
2187 12:45:24.894858 Waiting for the transfer...
2188 12:45:24.895359
2189 12:45:24.895738 00000000 # done.
2190 12:45:24.896082
2191 12:45:24.904676 Command line loaded dynamically from TFTP file: 9729651/tftp-deploy-uwgtmfrs/kernel/cmdline
2192 12:45:24.905152
2193 12:45:24.931470 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729651/extract-nfsrootfs-y7yduoa1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 12:45:24.932087
2195 12:45:24.937545 ec_init(0): CrosEC protocol v3 supported (256, 256)
2196 12:45:24.941780
2197 12:45:24.944665 Shutting down all USB controllers.
2198 12:45:24.945164
2199 12:45:24.945550 Removing current net device
2200 12:45:24.952666
2201 12:45:24.953166 Finalizing coreboot
2202 12:45:24.953650
2203 12:45:24.959856 Exiting depthcharge with code 4 at timestamp: 30304831
2204 12:45:24.960481
2205 12:45:24.960874
2206 12:45:24.961234 Starting kernel ...
2207 12:45:24.961583
2208 12:45:24.961937
2209 12:45:24.963289 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2210 12:45:24.963847 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2211 12:45:24.964260 Setting prompt string to ['Linux version [0-9]']
2212 12:45:24.964680 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 12:45:24.965073 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 12:49:43.964855 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2217 12:49:43.966684 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2219 12:49:43.968104 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 12:49:43.970056 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 12:49:43.971320 Cleaning after the job
2225 12:49:43.971845 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/ramdisk
2226 12:49:43.974327 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/kernel
2227 12:49:43.978185 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/nfsrootfs
2228 12:49:44.049528 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729651/tftp-deploy-uwgtmfrs/modules
2229 12:49:44.050013 start: 4.1 power-off (timeout 00:00:30) [common]
2230 12:49:44.050193 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2231 12:49:44.125235 >> Command sent successfully.
2232 12:49:44.129560 Returned 0 in 0 seconds
2233 12:49:44.230985 end: 4.1 power-off (duration 00:00:00) [common]
2235 12:49:44.232790 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 12:49:44.234067 Listened to connection for namespace 'common' for up to 1s
2238 12:49:44.235594 Listened to connection for namespace 'common' for up to 1s
2239 12:49:45.236664 Finalising connection for namespace 'common'
2240 12:49:45.237414 Disconnecting from shell: Finalise
2241 12:49:45.237900
2242 12:49:45.339555 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 12:49:45.340226 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729651
2244 12:49:45.510684 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729651
2245 12:49:45.510893 JobError: Your job cannot terminate cleanly.