Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 13:00:52.128617 lava-dispatcher, installed at version: 2023.01
2 13:00:52.128804 start: 0 validate
3 13:00:52.128925 Start time: 2023-03-22 13:00:52.128920+00:00 (UTC)
4 13:00:52.129042 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:00:52.129177 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 13:00:52.425413 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:00:52.425588 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:00:52.722354 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:00:52.723083 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:00:57.568374 validate duration: 5.44
12 13:00:57.569923 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:00:57.570884 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:00:57.571571 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:00:57.572280 Not decompressing ramdisk as can be used compressed.
16 13:00:57.572953 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 13:00:57.573393 saving as /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/ramdisk/rootfs.cpio.gz
18 13:00:57.573813 total size: 8429740 (8MB)
19 13:00:58.293709 progress 0% (0MB)
20 13:00:58.305139 progress 5% (0MB)
21 13:00:58.316923 progress 10% (0MB)
22 13:00:58.325624 progress 15% (1MB)
23 13:00:58.331180 progress 20% (1MB)
24 13:00:58.335691 progress 25% (2MB)
25 13:00:58.339559 progress 30% (2MB)
26 13:00:58.342990 progress 35% (2MB)
27 13:00:58.346069 progress 40% (3MB)
28 13:00:58.348992 progress 45% (3MB)
29 13:00:58.351888 progress 50% (4MB)
30 13:00:58.354552 progress 55% (4MB)
31 13:00:58.357003 progress 60% (4MB)
32 13:00:58.359304 progress 65% (5MB)
33 13:00:58.361551 progress 70% (5MB)
34 13:00:58.363578 progress 75% (6MB)
35 13:00:58.365692 progress 80% (6MB)
36 13:00:58.367829 progress 85% (6MB)
37 13:00:58.369909 progress 90% (7MB)
38 13:00:58.371976 progress 95% (7MB)
39 13:00:58.374069 progress 100% (8MB)
40 13:00:58.374205 8MB downloaded in 0.80s (10.04MB/s)
41 13:00:58.374363 end: 1.1.1 http-download (duration 00:00:01) [common]
43 13:00:58.374628 end: 1.1 download-retry (duration 00:00:01) [common]
44 13:00:58.374719 start: 1.2 download-retry (timeout 00:09:59) [common]
45 13:00:58.374807 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 13:00:58.374917 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:00:58.374991 saving as /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/kernel/bzImage
48 13:00:58.375054 total size: 11644736 (11MB)
49 13:00:58.375128 No compression specified
50 13:00:58.376049 progress 0% (0MB)
51 13:00:58.378812 progress 5% (0MB)
52 13:00:58.381770 progress 10% (1MB)
53 13:00:58.384688 progress 15% (1MB)
54 13:00:58.387525 progress 20% (2MB)
55 13:00:58.390267 progress 25% (2MB)
56 13:00:58.393158 progress 30% (3MB)
57 13:00:58.396062 progress 35% (3MB)
58 13:00:58.398958 progress 40% (4MB)
59 13:00:58.401686 progress 45% (5MB)
60 13:00:58.404552 progress 50% (5MB)
61 13:00:58.407375 progress 55% (6MB)
62 13:00:58.410257 progress 60% (6MB)
63 13:00:58.412978 progress 65% (7MB)
64 13:00:58.415804 progress 70% (7MB)
65 13:00:58.418641 progress 75% (8MB)
66 13:00:58.421497 progress 80% (8MB)
67 13:00:58.424360 progress 85% (9MB)
68 13:00:58.427049 progress 90% (10MB)
69 13:00:58.429846 progress 95% (10MB)
70 13:00:58.432657 progress 100% (11MB)
71 13:00:58.432810 11MB downloaded in 0.06s (192.30MB/s)
72 13:00:58.432959 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:00:58.433199 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:00:58.433296 start: 1.3 download-retry (timeout 00:09:59) [common]
76 13:00:58.433387 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 13:00:58.433522 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:00:58.433596 saving as /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/modules/modules.tar
79 13:00:58.433673 total size: 497904 (0MB)
80 13:00:58.433738 Using unxz to decompress xz
81 13:00:58.436923 progress 6% (0MB)
82 13:00:58.437292 progress 13% (0MB)
83 13:00:58.437524 progress 19% (0MB)
84 13:00:58.438790 progress 26% (0MB)
85 13:00:58.440710 progress 32% (0MB)
86 13:00:58.442707 progress 39% (0MB)
87 13:00:58.444758 progress 46% (0MB)
88 13:00:58.446550 progress 52% (0MB)
89 13:00:58.448715 progress 59% (0MB)
90 13:00:58.450673 progress 65% (0MB)
91 13:00:58.452618 progress 72% (0MB)
92 13:00:58.454674 progress 78% (0MB)
93 13:00:58.456625 progress 85% (0MB)
94 13:00:58.458403 progress 92% (0MB)
95 13:00:58.460126 progress 98% (0MB)
96 13:00:58.467394 0MB downloaded in 0.03s (14.08MB/s)
97 13:00:58.467671 end: 1.3.1 http-download (duration 00:00:00) [common]
99 13:00:58.467971 end: 1.3 download-retry (duration 00:00:00) [common]
100 13:00:58.468072 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 13:00:58.468192 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 13:00:58.468283 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 13:00:58.468405 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 13:00:58.468593 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3
105 13:00:58.468708 makedir: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin
106 13:00:58.468816 makedir: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/tests
107 13:00:58.468910 makedir: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/results
108 13:00:58.469026 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-add-keys
109 13:00:58.469180 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-add-sources
110 13:00:58.469313 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-background-process-start
111 13:00:58.469437 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-background-process-stop
112 13:00:58.469568 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-common-functions
113 13:00:58.469689 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-echo-ipv4
114 13:00:58.469813 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-install-packages
115 13:00:58.469932 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-installed-packages
116 13:00:58.470056 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-os-build
117 13:00:58.470173 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-probe-channel
118 13:00:58.470287 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-probe-ip
119 13:00:58.470416 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-target-ip
120 13:00:58.470531 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-target-mac
121 13:00:58.470658 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-target-storage
122 13:00:58.470791 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-case
123 13:00:58.470914 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-event
124 13:00:58.471029 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-feedback
125 13:00:58.471145 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-raise
126 13:00:58.471269 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-reference
127 13:00:58.471389 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-runner
128 13:00:58.471505 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-set
129 13:00:58.471618 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-test-shell
130 13:00:58.471749 Updating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-install-packages (oe)
131 13:00:58.471872 Updating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/bin/lava-installed-packages (oe)
132 13:00:58.471976 Creating /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/environment
133 13:00:58.472071 LAVA metadata
134 13:00:58.472147 - LAVA_JOB_ID=9730016
135 13:00:58.472247 - LAVA_DISPATCHER_IP=192.168.201.1
136 13:00:58.472391 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 13:00:58.472474 skipped lava-vland-overlay
138 13:00:58.472556 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 13:00:58.472649 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 13:00:58.472718 skipped lava-multinode-overlay
141 13:00:58.472795 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 13:00:58.472888 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 13:00:58.472966 Loading test definitions
144 13:00:58.473072 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 13:00:58.473152 Using /lava-9730016 at stage 0
146 13:00:58.473450 uuid=9730016_1.4.2.3.1 testdef=None
147 13:00:58.473546 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 13:00:58.473643 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 13:00:58.474168 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 13:00:58.474447 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 13:00:58.475062 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 13:00:58.475319 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 13:00:58.475894 runner path: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/0/tests/0_dmesg test_uuid 9730016_1.4.2.3.1
156 13:00:58.476050 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 13:00:58.476381 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 13:00:58.476483 Using /lava-9730016 at stage 1
160 13:00:58.476741 uuid=9730016_1.4.2.3.5 testdef=None
161 13:00:58.476845 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 13:00:58.476936 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 13:00:58.477475 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 13:00:58.477722 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 13:00:58.478324 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 13:00:58.478570 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 13:00:58.479152 runner path: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/1/tests/1_bootrr test_uuid 9730016_1.4.2.3.5
170 13:00:58.479296 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 13:00:58.479534 Creating lava-test-runner.conf files
173 13:00:58.479602 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/0 for stage 0
174 13:00:58.479687 - 0_dmesg
175 13:00:58.479770 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9730016/lava-overlay-_77vp2_3/lava-9730016/1 for stage 1
176 13:00:58.479865 - 1_bootrr
177 13:00:58.479973 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 13:00:58.480066 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 13:00:58.486995 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 13:00:58.487125 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 13:00:58.487221 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 13:00:58.487311 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 13:00:58.487403 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 13:00:58.671020 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 13:00:58.671374 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 13:00:58.671495 extracting modules file /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9730016/extract-overlay-ramdisk-wy52dnvf/ramdisk
187 13:00:58.685105 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 13:00:58.685239 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 13:00:58.685334 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9730016/compress-overlay-mkf0mx0r/overlay-1.4.2.4.tar.gz to ramdisk
190 13:00:58.685410 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9730016/compress-overlay-mkf0mx0r/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9730016/extract-overlay-ramdisk-wy52dnvf/ramdisk
191 13:00:58.689493 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 13:00:58.689604 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 13:00:58.689698 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 13:00:58.689791 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 13:00:58.689869 Building ramdisk /var/lib/lava/dispatcher/tmp/9730016/extract-overlay-ramdisk-wy52dnvf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9730016/extract-overlay-ramdisk-wy52dnvf/ramdisk
196 13:00:58.760619 >> 53721 blocks
197 13:00:59.592614 rename /var/lib/lava/dispatcher/tmp/9730016/extract-overlay-ramdisk-wy52dnvf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
198 13:00:59.593004 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 13:00:59.593147 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 13:00:59.593264 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 13:00:59.593369 No mkimage arch provided, not using FIT.
202 13:00:59.593463 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 13:00:59.593556 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 13:00:59.593659 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 13:00:59.593754 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 13:00:59.593833 No LXC device requested
207 13:00:59.593918 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 13:00:59.594011 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 13:00:59.594121 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 13:00:59.594208 Checking files for TFTP limit of 4294967296 bytes.
211 13:00:59.594589 end: 1 tftp-deploy (duration 00:00:02) [common]
212 13:00:59.594696 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 13:00:59.594794 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 13:00:59.594921 substitutions:
215 13:00:59.594998 - {DTB}: None
216 13:00:59.595068 - {INITRD}: 9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
217 13:00:59.595131 - {KERNEL}: 9730016/tftp-deploy-9_jlp3i5/kernel/bzImage
218 13:00:59.595193 - {LAVA_MAC}: None
219 13:00:59.595253 - {PRESEED_CONFIG}: None
220 13:00:59.595312 - {PRESEED_LOCAL}: None
221 13:00:59.595370 - {RAMDISK}: 9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
222 13:00:59.595429 - {ROOT_PART}: None
223 13:00:59.595487 - {ROOT}: None
224 13:00:59.595550 - {SERVER_IP}: 192.168.201.1
225 13:00:59.595644 - {TEE}: None
226 13:00:59.595709 Parsed boot commands:
227 13:00:59.595766 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 13:00:59.595920 Parsed boot commands: tftpboot 192.168.201.1 9730016/tftp-deploy-9_jlp3i5/kernel/bzImage 9730016/tftp-deploy-9_jlp3i5/kernel/cmdline 9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
229 13:00:59.596015 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 13:00:59.596105 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 13:00:59.596203 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 13:00:59.596295 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 13:00:59.596410 Not connected, no need to disconnect.
234 13:00:59.596493 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 13:00:59.596592 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 13:00:59.596672 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
237 13:00:59.599564 Setting prompt string to ['lava-test: # ']
238 13:00:59.599906 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 13:00:59.600020 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 13:00:59.600119 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 13:00:59.600216 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 13:00:59.600437 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 13:01:04.738069 >> Command sent successfully.
244 13:01:04.740257 Returned 0 in 5 seconds
245 13:01:04.841056 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 13:01:04.841417 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 13:01:04.841528 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 13:01:04.841619 Setting prompt string to 'Starting depthcharge on Helios...'
250 13:01:04.841692 Changing prompt to 'Starting depthcharge on Helios...'
251 13:01:04.841766 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 13:01:04.842046 [Enter `^Ec?' for help]
253 13:01:05.461992
254 13:01:05.462539
255 13:01:05.471807 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 13:01:05.475062 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 13:01:05.481791 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 13:01:05.485155 CPU: AES supported, TXT NOT supported, VT supported
259 13:01:05.492622 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 13:01:05.495756 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 13:01:05.502780 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 13:01:05.505833 VBOOT: Loading verstage.
263 13:01:05.509095 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 13:01:05.515717 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 13:01:05.519135 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 13:01:05.522499 CBFS @ c08000 size 3f8000
267 13:01:05.528847 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 13:01:05.532541 CBFS: Locating 'fallback/verstage'
269 13:01:05.535592 CBFS: Found @ offset 10fb80 size 1072c
270 13:01:05.538673
271 13:01:05.539122
272 13:01:05.549121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 13:01:05.563457 Probing TPM: . done!
274 13:01:05.566224 TPM ready after 0 ms
275 13:01:05.569910 Connected to device vid:did:rid of 1ae0:0028:00
276 13:01:05.579957 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 13:01:05.583235 Initialized TPM device CR50 revision 0
278 13:01:05.627364 tlcl_send_startup: Startup return code is 0
279 13:01:05.627952 TPM: setup succeeded
280 13:01:05.639549 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 13:01:05.643209 Chrome EC: UHEPI supported
282 13:01:05.646617 Phase 1
283 13:01:05.649971 FMAP: area GBB found @ c05000 (12288 bytes)
284 13:01:05.656614 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 13:01:05.660072 Phase 2
286 13:01:05.660774 Phase 3
287 13:01:05.663002 FMAP: area GBB found @ c05000 (12288 bytes)
288 13:01:05.670460 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 13:01:05.676498 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 13:01:05.679838 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 13:01:05.686371 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 13:01:05.702294 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 13:01:05.705669 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 13:01:05.712350 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 13:01:05.716426 Phase 4
296 13:01:05.719920 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 13:01:05.726579 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 13:01:05.906002 VB2:vb2_rsa_verify_digest() Digest check failed!
299 13:01:05.912713 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 13:01:05.913255 Saving nvdata
301 13:01:05.915944 Reboot requested (10020007)
302 13:01:05.919242 board_reset() called!
303 13:01:05.919703 full_reset() called!
304 13:01:10.428591
305 13:01:10.428750
306 13:01:10.438607 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 13:01:10.441883 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 13:01:10.448881 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 13:01:10.451915 CPU: AES supported, TXT NOT supported, VT supported
310 13:01:10.458369 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 13:01:10.461688 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 13:01:10.468297 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 13:01:10.472180 VBOOT: Loading verstage.
314 13:01:10.475538 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 13:01:10.481851 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 13:01:10.485450 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 13:01:10.488791 CBFS @ c08000 size 3f8000
318 13:01:10.494952 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 13:01:10.498814 CBFS: Locating 'fallback/verstage'
320 13:01:10.501626 CBFS: Found @ offset 10fb80 size 1072c
321 13:01:10.505895
322 13:01:10.506138
323 13:01:10.515721 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 13:01:10.529940 Probing TPM: . done!
325 13:01:10.533340 TPM ready after 0 ms
326 13:01:10.536634 Connected to device vid:did:rid of 1ae0:0028:00
327 13:01:10.546924 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 13:01:10.550232 Initialized TPM device CR50 revision 0
329 13:01:10.593853 tlcl_send_startup: Startup return code is 0
330 13:01:10.594315 TPM: setup succeeded
331 13:01:10.606361 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 13:01:10.610643 Chrome EC: UHEPI supported
333 13:01:10.613834 Phase 1
334 13:01:10.617303 FMAP: area GBB found @ c05000 (12288 bytes)
335 13:01:10.623754 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 13:01:10.630373 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 13:01:10.633600 Recovery requested (1009000e)
338 13:01:10.639302 Saving nvdata
339 13:01:10.645237 tlcl_extend: response is 0
340 13:01:10.654209 tlcl_extend: response is 0
341 13:01:10.661229 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 13:01:10.664425 CBFS @ c08000 size 3f8000
343 13:01:10.671236 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 13:01:10.674449 CBFS: Locating 'fallback/romstage'
345 13:01:10.677735 CBFS: Found @ offset 80 size 145fc
346 13:01:10.681055 Accumulated console time in verstage 98 ms
347 13:01:10.681505
348 13:01:10.681861
349 13:01:10.694209 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 13:01:10.701078 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 13:01:10.704398 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 13:01:10.707616 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 13:01:10.714092 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 13:01:10.717731 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 13:01:10.721011 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 13:01:10.724261 TCO_STS: 0000 0000
357 13:01:10.727322 GEN_PMCON: e0015238 00000200
358 13:01:10.730675 GBLRST_CAUSE: 00000000 00000000
359 13:01:10.731128 prev_sleep_state 5
360 13:01:10.734177 Boot Count incremented to 58030
361 13:01:10.740604 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 13:01:10.744505 CBFS @ c08000 size 3f8000
363 13:01:10.750950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 13:01:10.751403 CBFS: Locating 'fspm.bin'
365 13:01:10.757496 CBFS: Found @ offset 5ffc0 size 71000
366 13:01:10.760713 Chrome EC: UHEPI supported
367 13:01:10.767427 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 13:01:10.771223 Probing TPM: done!
369 13:01:10.777780 Connected to device vid:did:rid of 1ae0:0028:00
370 13:01:10.787770 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 13:01:10.793572 Initialized TPM device CR50 revision 0
372 13:01:10.802505 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 13:01:10.809085 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 13:01:10.812300 MRC cache found, size 1948
375 13:01:10.816074 bootmode is set to: 2
376 13:01:10.819295 PRMRR disabled by config.
377 13:01:10.819745 SPD INDEX = 1
378 13:01:10.825864 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 13:01:10.829144 CBFS @ c08000 size 3f8000
380 13:01:10.836037 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 13:01:10.836672 CBFS: Locating 'spd.bin'
382 13:01:10.839101 CBFS: Found @ offset 5fb80 size 400
383 13:01:10.842323 SPD: module type is LPDDR3
384 13:01:10.846092 SPD: module part is
385 13:01:10.852210 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 13:01:10.856076 SPD: device width 4 bits, bus width 8 bits
387 13:01:10.859010 SPD: module size is 4096 MB (per channel)
388 13:01:10.862260 memory slot: 0 configuration done.
389 13:01:10.865547 memory slot: 2 configuration done.
390 13:01:10.917455 CBMEM:
391 13:01:10.920759 IMD: root @ 99fff000 254 entries.
392 13:01:10.923955 IMD: root @ 99ffec00 62 entries.
393 13:01:10.927223 External stage cache:
394 13:01:10.930629 IMD: root @ 9abff000 254 entries.
395 13:01:10.933975 IMD: root @ 9abfec00 62 entries.
396 13:01:10.937135 Chrome EC: clear events_b mask to 0x0000000020004000
397 13:01:10.952980 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 13:01:10.966193 tlcl_write: response is 0
399 13:01:10.975228 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 13:01:10.981845 MRC: TPM MRC hash updated successfully.
401 13:01:10.982288 2 DIMMs found
402 13:01:10.985807 SMM Memory Map
403 13:01:10.988889 SMRAM : 0x9a000000 0x1000000
404 13:01:10.992303 Subregion 0: 0x9a000000 0xa00000
405 13:01:10.995373 Subregion 1: 0x9aa00000 0x200000
406 13:01:10.998591 Subregion 2: 0x9ac00000 0x400000
407 13:01:11.002465 top_of_ram = 0x9a000000
408 13:01:11.005517 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 13:01:11.012123 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 13:01:11.015150 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 13:01:11.022383 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 13:01:11.025172 CBFS @ c08000 size 3f8000
413 13:01:11.028471 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 13:01:11.031838 CBFS: Locating 'fallback/postcar'
415 13:01:11.035544 CBFS: Found @ offset 107000 size 4b44
416 13:01:11.041999 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 13:01:11.054418 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 13:01:11.057608 Processing 180 relocs. Offset value of 0x97c0c000
419 13:01:11.065971 Accumulated console time in romstage 286 ms
420 13:01:11.066425
421 13:01:11.066778
422 13:01:11.076170 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 13:01:11.082845 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 13:01:11.086225 CBFS @ c08000 size 3f8000
425 13:01:11.089676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 13:01:11.096166 CBFS: Locating 'fallback/ramstage'
427 13:01:11.099646 CBFS: Found @ offset 43380 size 1b9e8
428 13:01:11.106385 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 13:01:11.137790 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 13:01:11.141144 Processing 3976 relocs. Offset value of 0x98db0000
431 13:01:11.148116 Accumulated console time in postcar 52 ms
432 13:01:11.148622
433 13:01:11.148990
434 13:01:11.158223 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 13:01:11.164781 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 13:01:11.168163 WARNING: RO_VPD is uninitialized or empty.
437 13:01:11.171550 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 13:01:11.178061 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 13:01:11.178555 Normal boot.
440 13:01:11.184452 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 13:01:11.187657 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 13:01:11.190884 CBFS @ c08000 size 3f8000
443 13:01:11.197496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 13:01:11.200769 CBFS: Locating 'cpu_microcode_blob.bin'
445 13:01:11.204557 CBFS: Found @ offset 14700 size 2ec00
446 13:01:11.207808 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 13:01:11.211116 Skip microcode update
448 13:01:11.214133 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 13:01:11.217178 CBFS @ c08000 size 3f8000
450 13:01:11.223876 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 13:01:11.227426 CBFS: Locating 'fsps.bin'
452 13:01:11.230881 CBFS: Found @ offset d1fc0 size 35000
453 13:01:11.256297 Detected 4 core, 8 thread CPU.
454 13:01:11.259835 Setting up SMI for CPU
455 13:01:11.262347 IED base = 0x9ac00000
456 13:01:11.262797 IED size = 0x00400000
457 13:01:11.266181 Will perform SMM setup.
458 13:01:11.272840 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 13:01:11.278935 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 13:01:11.282213 Processing 16 relocs. Offset value of 0x00030000
461 13:01:11.285879 Attempting to start 7 APs
462 13:01:11.289292 Waiting for 10ms after sending INIT.
463 13:01:11.306228 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 13:01:11.306776 done.
465 13:01:11.308988 AP: slot 4 apic_id 4.
466 13:01:11.312407 AP: slot 5 apic_id 5.
467 13:01:11.312881 AP: slot 1 apic_id 3.
468 13:01:11.315782 AP: slot 3 apic_id 2.
469 13:01:11.318955 Waiting for 2nd SIPI to complete...done.
470 13:01:11.322058 AP: slot 6 apic_id 6.
471 13:01:11.325815 AP: slot 7 apic_id 7.
472 13:01:11.332644 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 13:01:11.335800 Processing 13 relocs. Offset value of 0x00038000
474 13:01:11.342392 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 13:01:11.348941 Installing SMM handler to 0x9a000000
476 13:01:11.355653 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 13:01:11.358746 Processing 658 relocs. Offset value of 0x9a010000
478 13:01:11.368891 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 13:01:11.371988 Processing 13 relocs. Offset value of 0x9a008000
480 13:01:11.378627 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 13:01:11.385314 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 13:01:11.388613 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 13:01:11.395365 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 13:01:11.401813 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 13:01:11.408403 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 13:01:11.411616 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 13:01:11.418667 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 13:01:11.421696 Clearing SMI status registers
489 13:01:11.424931 SMI_STS: PM1
490 13:01:11.425397 PM1_STS: PWRBTN
491 13:01:11.428692 TCO_STS: SECOND_TO
492 13:01:11.431991 New SMBASE 0x9a000000
493 13:01:11.435222 In relocation handler: CPU 0
494 13:01:11.438344 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 13:01:11.442059 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 13:01:11.445414 Relocation complete.
497 13:01:11.448712 New SMBASE 0x99fff800
498 13:01:11.449179 In relocation handler: CPU 2
499 13:01:11.455564 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 13:01:11.458189 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 13:01:11.462001 Relocation complete.
502 13:01:11.465099 New SMBASE 0x99ffec00
503 13:01:11.465596 In relocation handler: CPU 5
504 13:01:11.471727 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
505 13:01:11.474941 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 13:01:11.478594 Relocation complete.
507 13:01:11.479040 New SMBASE 0x99fff000
508 13:01:11.481526 In relocation handler: CPU 4
509 13:01:11.488500 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 13:01:11.491828 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 13:01:11.495030 Relocation complete.
512 13:01:11.495474 New SMBASE 0x99fff400
513 13:01:11.498329 In relocation handler: CPU 3
514 13:01:11.501658 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
515 13:01:11.508368 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 13:01:11.511396 Relocation complete.
517 13:01:11.511856 New SMBASE 0x99fffc00
518 13:01:11.514751 In relocation handler: CPU 1
519 13:01:11.518199 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 13:01:11.525303 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 13:01:11.525800 Relocation complete.
522 13:01:11.528434 New SMBASE 0x99ffe400
523 13:01:11.531680 In relocation handler: CPU 7
524 13:01:11.534877 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
525 13:01:11.541516 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 13:01:11.541961 Relocation complete.
527 13:01:11.545299 New SMBASE 0x99ffe800
528 13:01:11.548417 In relocation handler: CPU 6
529 13:01:11.551617 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 13:01:11.558514 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 13:01:11.558959 Relocation complete.
532 13:01:11.561828 Initializing CPU #0
533 13:01:11.564823 CPU: vendor Intel device 806ec
534 13:01:11.568524 CPU: family 06, model 8e, stepping 0c
535 13:01:11.571705 Clearing out pending MCEs
536 13:01:11.575105 Setting up local APIC...
537 13:01:11.575545 apic_id: 0x00 done.
538 13:01:11.578244 Turbo is available but hidden
539 13:01:11.581463 Turbo is available and visible
540 13:01:11.584847 VMX status: enabled
541 13:01:11.588039 IA32_FEATURE_CONTROL status: locked
542 13:01:11.591290 Skip microcode update
543 13:01:11.591747 CPU #0 initialized
544 13:01:11.594674 Initializing CPU #2
545 13:01:11.595112 Initializing CPU #6
546 13:01:11.598401 Initializing CPU #7
547 13:01:11.601696 CPU: vendor Intel device 806ec
548 13:01:11.604924 CPU: family 06, model 8e, stepping 0c
549 13:01:11.608220 CPU: vendor Intel device 806ec
550 13:01:11.611603 CPU: family 06, model 8e, stepping 0c
551 13:01:11.614757 Clearing out pending MCEs
552 13:01:11.618453 CPU: vendor Intel device 806ec
553 13:01:11.621326 CPU: family 06, model 8e, stepping 0c
554 13:01:11.624743 Initializing CPU #1
555 13:01:11.625182 Initializing CPU #3
556 13:01:11.627943 CPU: vendor Intel device 806ec
557 13:01:11.631250 CPU: family 06, model 8e, stepping 0c
558 13:01:11.634391 CPU: vendor Intel device 806ec
559 13:01:11.637767 CPU: family 06, model 8e, stepping 0c
560 13:01:11.640947 Clearing out pending MCEs
561 13:01:11.644208 Clearing out pending MCEs
562 13:01:11.647573 Setting up local APIC...
563 13:01:11.651313 Clearing out pending MCEs
564 13:01:11.651754 Setting up local APIC...
565 13:01:11.654576 Setting up local APIC...
566 13:01:11.657682 Initializing CPU #4
567 13:01:11.658134 Initializing CPU #5
568 13:01:11.660967 CPU: vendor Intel device 806ec
569 13:01:11.664396 CPU: family 06, model 8e, stepping 0c
570 13:01:11.667688 Setting up local APIC...
571 13:01:11.671090 Clearing out pending MCEs
572 13:01:11.674576 apic_id: 0x07 done.
573 13:01:11.675127 apic_id: 0x06 done.
574 13:01:11.677919 VMX status: enabled
575 13:01:11.681054 VMX status: enabled
576 13:01:11.684543 IA32_FEATURE_CONTROL status: locked
577 13:01:11.687307 IA32_FEATURE_CONTROL status: locked
578 13:01:11.687749 Skip microcode update
579 13:01:11.690779 Skip microcode update
580 13:01:11.694175 CPU #7 initialized
581 13:01:11.694617 CPU #6 initialized
582 13:01:11.697453 apic_id: 0x02 done.
583 13:01:11.700625 apic_id: 0x03 done.
584 13:01:11.701066 VMX status: enabled
585 13:01:11.704004 VMX status: enabled
586 13:01:11.707270 IA32_FEATURE_CONTROL status: locked
587 13:01:11.710563 IA32_FEATURE_CONTROL status: locked
588 13:01:11.713802 Skip microcode update
589 13:01:11.714242 Skip microcode update
590 13:01:11.717148 CPU #3 initialized
591 13:01:11.720436 CPU #1 initialized
592 13:01:11.720893 Setting up local APIC...
593 13:01:11.724079 CPU: vendor Intel device 806ec
594 13:01:11.726876 CPU: family 06, model 8e, stepping 0c
595 13:01:11.730647 Clearing out pending MCEs
596 13:01:11.733914 Clearing out pending MCEs
597 13:01:11.737222 Setting up local APIC...
598 13:01:11.737663 apic_id: 0x01 done.
599 13:01:11.740451 Setting up local APIC...
600 13:01:11.743846 VMX status: enabled
601 13:01:11.744289 apic_id: 0x04 done.
602 13:01:11.747048 apic_id: 0x05 done.
603 13:01:11.749834 VMX status: enabled
604 13:01:11.749920 VMX status: enabled
605 13:01:11.753493 IA32_FEATURE_CONTROL status: locked
606 13:01:11.756673 IA32_FEATURE_CONTROL status: locked
607 13:01:11.759783 Skip microcode update
608 13:01:11.763134 IA32_FEATURE_CONTROL status: locked
609 13:01:11.766877 Skip microcode update
610 13:01:11.766963 CPU #4 initialized
611 13:01:11.770086 CPU #5 initialized
612 13:01:11.773237 Skip microcode update
613 13:01:11.773322 CPU #2 initialized
614 13:01:11.780115 bsp_do_flight_plan done after 457 msecs.
615 13:01:11.783215 CPU: frequency set to 4200 MHz
616 13:01:11.783301 Enabling SMIs.
617 13:01:11.783368 Locking SMM.
618 13:01:11.799718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 13:01:11.802892 CBFS @ c08000 size 3f8000
620 13:01:11.809875 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 13:01:11.809984 CBFS: Locating 'vbt.bin'
622 13:01:11.813125 CBFS: Found @ offset 5f5c0 size 499
623 13:01:11.819844 Found a VBT of 4608 bytes after decompression
624 13:01:12.003337 Display FSP Version Info HOB
625 13:01:12.007081 Reference Code - CPU = 9.0.1e.30
626 13:01:12.010485 uCode Version = 0.0.0.ca
627 13:01:12.013926 TXT ACM version = ff.ff.ff.ffff
628 13:01:12.017038 Display FSP Version Info HOB
629 13:01:12.020189 Reference Code - ME = 9.0.1e.30
630 13:01:12.023509 MEBx version = 0.0.0.0
631 13:01:12.026911 ME Firmware Version = Consumer SKU
632 13:01:12.029918 Display FSP Version Info HOB
633 13:01:12.033158 Reference Code - CML PCH = 9.0.1e.30
634 13:01:12.036452 PCH-CRID Status = Disabled
635 13:01:12.039973 PCH-CRID Original Value = ff.ff.ff.ffff
636 13:01:12.043520 PCH-CRID New Value = ff.ff.ff.ffff
637 13:01:12.046876 OPROM - RST - RAID = ff.ff.ff.ffff
638 13:01:12.049702 ChipsetInit Base Version = ff.ff.ff.ffff
639 13:01:12.053883 ChipsetInit Oem Version = ff.ff.ff.ffff
640 13:01:12.056892 Display FSP Version Info HOB
641 13:01:12.063503 Reference Code - SA - System Agent = 9.0.1e.30
642 13:01:12.066305 Reference Code - MRC = 0.7.1.6c
643 13:01:12.066840 SA - PCIe Version = 9.0.1e.30
644 13:01:12.070142 SA-CRID Status = Disabled
645 13:01:12.073270 SA-CRID Original Value = 0.0.0.c
646 13:01:12.076410 SA-CRID New Value = 0.0.0.c
647 13:01:12.079539 OPROM - VBIOS = ff.ff.ff.ffff
648 13:01:12.083171 RTC Init
649 13:01:12.086582 Set power on after power failure.
650 13:01:12.087080 Disabling Deep S3
651 13:01:12.089653 Disabling Deep S3
652 13:01:12.090144 Disabling Deep S4
653 13:01:12.092828 Disabling Deep S4
654 13:01:12.093275 Disabling Deep S5
655 13:01:12.096482 Disabling Deep S5
656 13:01:12.102662 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 194 exit 1
657 13:01:12.103114 Enumerating buses...
658 13:01:12.109793 Show all devs... Before device enumeration.
659 13:01:12.110242 Root Device: enabled 1
660 13:01:12.112617 CPU_CLUSTER: 0: enabled 1
661 13:01:12.116006 DOMAIN: 0000: enabled 1
662 13:01:12.119272 APIC: 00: enabled 1
663 13:01:12.119721 PCI: 00:00.0: enabled 1
664 13:01:12.122525 PCI: 00:02.0: enabled 1
665 13:01:12.125984 PCI: 00:04.0: enabled 0
666 13:01:12.129631 PCI: 00:05.0: enabled 0
667 13:01:12.130076 PCI: 00:12.0: enabled 1
668 13:01:12.132949 PCI: 00:12.5: enabled 0
669 13:01:12.136522 PCI: 00:12.6: enabled 0
670 13:01:12.136966 PCI: 00:14.0: enabled 1
671 13:01:12.139682 PCI: 00:14.1: enabled 0
672 13:01:12.142943 PCI: 00:14.3: enabled 1
673 13:01:12.146342 PCI: 00:14.5: enabled 0
674 13:01:12.146859 PCI: 00:15.0: enabled 1
675 13:01:12.149464 PCI: 00:15.1: enabled 1
676 13:01:12.152726 PCI: 00:15.2: enabled 0
677 13:01:12.156218 PCI: 00:15.3: enabled 0
678 13:01:12.156700 PCI: 00:16.0: enabled 1
679 13:01:12.159369 PCI: 00:16.1: enabled 0
680 13:01:12.162933 PCI: 00:16.2: enabled 0
681 13:01:12.163375 PCI: 00:16.3: enabled 0
682 13:01:12.166207 PCI: 00:16.4: enabled 0
683 13:01:12.169369 PCI: 00:16.5: enabled 0
684 13:01:12.172701 PCI: 00:17.0: enabled 1
685 13:01:12.173179 PCI: 00:19.0: enabled 1
686 13:01:12.175893 PCI: 00:19.1: enabled 0
687 13:01:12.179736 PCI: 00:19.2: enabled 0
688 13:01:12.183008 PCI: 00:1a.0: enabled 0
689 13:01:12.183478 PCI: 00:1c.0: enabled 0
690 13:01:12.186171 PCI: 00:1c.1: enabled 0
691 13:01:12.189513 PCI: 00:1c.2: enabled 0
692 13:01:12.192474 PCI: 00:1c.3: enabled 0
693 13:01:12.192949 PCI: 00:1c.4: enabled 0
694 13:01:12.196003 PCI: 00:1c.5: enabled 0
695 13:01:12.199126 PCI: 00:1c.6: enabled 0
696 13:01:12.199619 PCI: 00:1c.7: enabled 0
697 13:01:12.202799 PCI: 00:1d.0: enabled 1
698 13:01:12.205821 PCI: 00:1d.1: enabled 0
699 13:01:12.209424 PCI: 00:1d.2: enabled 0
700 13:01:12.209887 PCI: 00:1d.3: enabled 0
701 13:01:12.212578 PCI: 00:1d.4: enabled 0
702 13:01:12.215658 PCI: 00:1d.5: enabled 1
703 13:01:12.219037 PCI: 00:1e.0: enabled 1
704 13:01:12.219480 PCI: 00:1e.1: enabled 0
705 13:01:12.222457 PCI: 00:1e.2: enabled 1
706 13:01:12.225726 PCI: 00:1e.3: enabled 1
707 13:01:12.228973 PCI: 00:1f.0: enabled 1
708 13:01:12.229415 PCI: 00:1f.1: enabled 1
709 13:01:12.232393 PCI: 00:1f.2: enabled 1
710 13:01:12.235525 PCI: 00:1f.3: enabled 1
711 13:01:12.235964 PCI: 00:1f.4: enabled 1
712 13:01:12.239604 PCI: 00:1f.5: enabled 1
713 13:01:12.242778 PCI: 00:1f.6: enabled 0
714 13:01:12.246092 USB0 port 0: enabled 1
715 13:01:12.246544 I2C: 00:15: enabled 1
716 13:01:12.249146 I2C: 00:5d: enabled 1
717 13:01:12.252479 GENERIC: 0.0: enabled 1
718 13:01:12.252932 I2C: 00:1a: enabled 1
719 13:01:12.256056 I2C: 00:38: enabled 1
720 13:01:12.259397 I2C: 00:39: enabled 1
721 13:01:12.259952 I2C: 00:3a: enabled 1
722 13:01:12.262434 I2C: 00:3b: enabled 1
723 13:01:12.265736 PCI: 00:00.0: enabled 1
724 13:01:12.266185 SPI: 00: enabled 1
725 13:01:12.268926 SPI: 01: enabled 1
726 13:01:12.272193 PNP: 0c09.0: enabled 1
727 13:01:12.272709 USB2 port 0: enabled 1
728 13:01:12.275581 USB2 port 1: enabled 1
729 13:01:12.278932 USB2 port 2: enabled 0
730 13:01:12.282169 USB2 port 3: enabled 0
731 13:01:12.282621 USB2 port 5: enabled 0
732 13:01:12.286205 USB2 port 6: enabled 1
733 13:01:12.289021 USB2 port 9: enabled 1
734 13:01:12.289473 USB3 port 0: enabled 1
735 13:01:12.292823 USB3 port 1: enabled 1
736 13:01:12.295731 USB3 port 2: enabled 1
737 13:01:12.296182 USB3 port 3: enabled 1
738 13:01:12.298922 USB3 port 4: enabled 0
739 13:01:12.302070 APIC: 03: enabled 1
740 13:01:12.302594 APIC: 01: enabled 1
741 13:01:12.305667 APIC: 02: enabled 1
742 13:01:12.308874 APIC: 04: enabled 1
743 13:01:12.309321 APIC: 05: enabled 1
744 13:01:12.312173 APIC: 06: enabled 1
745 13:01:12.312772 APIC: 07: enabled 1
746 13:01:12.315364 Compare with tree...
747 13:01:12.319005 Root Device: enabled 1
748 13:01:12.322217 CPU_CLUSTER: 0: enabled 1
749 13:01:12.322792 APIC: 00: enabled 1
750 13:01:12.325287 APIC: 03: enabled 1
751 13:01:12.329260 APIC: 01: enabled 1
752 13:01:12.329805 APIC: 02: enabled 1
753 13:01:12.332396 APIC: 04: enabled 1
754 13:01:12.335801 APIC: 05: enabled 1
755 13:01:12.336388 APIC: 06: enabled 1
756 13:01:12.338921 APIC: 07: enabled 1
757 13:01:12.342212 DOMAIN: 0000: enabled 1
758 13:01:12.345394 PCI: 00:00.0: enabled 1
759 13:01:12.345845 PCI: 00:02.0: enabled 1
760 13:01:12.348573 PCI: 00:04.0: enabled 0
761 13:01:12.351805 PCI: 00:05.0: enabled 0
762 13:01:12.355568 PCI: 00:12.0: enabled 1
763 13:01:12.359014 PCI: 00:12.5: enabled 0
764 13:01:12.359556 PCI: 00:12.6: enabled 0
765 13:01:12.362357 PCI: 00:14.0: enabled 1
766 13:01:12.365541 USB0 port 0: enabled 1
767 13:01:12.368998 USB2 port 0: enabled 1
768 13:01:12.372361 USB2 port 1: enabled 1
769 13:01:12.372816 USB2 port 2: enabled 0
770 13:01:12.375944 USB2 port 3: enabled 0
771 13:01:12.378994 USB2 port 5: enabled 0
772 13:01:12.381862 USB2 port 6: enabled 1
773 13:01:12.385097 USB2 port 9: enabled 1
774 13:01:12.385550 USB3 port 0: enabled 1
775 13:01:12.388810 USB3 port 1: enabled 1
776 13:01:12.391940 USB3 port 2: enabled 1
777 13:01:12.395350 USB3 port 3: enabled 1
778 13:01:12.398394 USB3 port 4: enabled 0
779 13:01:12.401641 PCI: 00:14.1: enabled 0
780 13:01:12.402140 PCI: 00:14.3: enabled 1
781 13:01:12.404800 PCI: 00:14.5: enabled 0
782 13:01:12.408536 PCI: 00:15.0: enabled 1
783 13:01:12.411746 I2C: 00:15: enabled 1
784 13:01:12.412221 PCI: 00:15.1: enabled 1
785 13:01:12.415143 I2C: 00:5d: enabled 1
786 13:01:12.418276 GENERIC: 0.0: enabled 1
787 13:01:12.421799 PCI: 00:15.2: enabled 0
788 13:01:12.425209 PCI: 00:15.3: enabled 0
789 13:01:12.425717 PCI: 00:16.0: enabled 1
790 13:01:12.428354 PCI: 00:16.1: enabled 0
791 13:01:12.431493 PCI: 00:16.2: enabled 0
792 13:01:12.435192 PCI: 00:16.3: enabled 0
793 13:01:12.438017 PCI: 00:16.4: enabled 0
794 13:01:12.438469 PCI: 00:16.5: enabled 0
795 13:01:12.441775 PCI: 00:17.0: enabled 1
796 13:01:12.444565 PCI: 00:19.0: enabled 1
797 13:01:12.448392 I2C: 00:1a: enabled 1
798 13:01:12.451329 I2C: 00:38: enabled 1
799 13:01:12.451838 I2C: 00:39: enabled 1
800 13:01:12.455219 I2C: 00:3a: enabled 1
801 13:01:12.458410 I2C: 00:3b: enabled 1
802 13:01:12.461482 PCI: 00:19.1: enabled 0
803 13:01:12.461975 PCI: 00:19.2: enabled 0
804 13:01:12.464876 PCI: 00:1a.0: enabled 0
805 13:01:12.468220 PCI: 00:1c.0: enabled 0
806 13:01:12.471601 PCI: 00:1c.1: enabled 0
807 13:01:12.475277 PCI: 00:1c.2: enabled 0
808 13:01:12.475905 PCI: 00:1c.3: enabled 0
809 13:01:12.478133 PCI: 00:1c.4: enabled 0
810 13:01:12.481534 PCI: 00:1c.5: enabled 0
811 13:01:12.484976 PCI: 00:1c.6: enabled 0
812 13:01:12.487736 PCI: 00:1c.7: enabled 0
813 13:01:12.488248 PCI: 00:1d.0: enabled 1
814 13:01:12.491525 PCI: 00:1d.1: enabled 0
815 13:01:12.494596 PCI: 00:1d.2: enabled 0
816 13:01:12.497782 PCI: 00:1d.3: enabled 0
817 13:01:12.498232 PCI: 00:1d.4: enabled 0
818 13:01:12.501554 PCI: 00:1d.5: enabled 1
819 13:01:12.504402 PCI: 00:00.0: enabled 1
820 13:01:12.508095 PCI: 00:1e.0: enabled 1
821 13:01:12.511064 PCI: 00:1e.1: enabled 0
822 13:01:12.511542 PCI: 00:1e.2: enabled 1
823 13:01:12.514658 SPI: 00: enabled 1
824 13:01:12.517936 PCI: 00:1e.3: enabled 1
825 13:01:12.521259 SPI: 01: enabled 1
826 13:01:12.521704 PCI: 00:1f.0: enabled 1
827 13:01:12.524537 PNP: 0c09.0: enabled 1
828 13:01:12.527494 PCI: 00:1f.1: enabled 1
829 13:01:12.530871 PCI: 00:1f.2: enabled 1
830 13:01:12.534222 PCI: 00:1f.3: enabled 1
831 13:01:12.534673 PCI: 00:1f.4: enabled 1
832 13:01:12.537481 PCI: 00:1f.5: enabled 1
833 13:01:12.540722 PCI: 00:1f.6: enabled 0
834 13:01:12.544290 Root Device scanning...
835 13:01:12.547675 scan_static_bus for Root Device
836 13:01:12.548121 CPU_CLUSTER: 0 enabled
837 13:01:12.550882 DOMAIN: 0000 enabled
838 13:01:12.554283 DOMAIN: 0000 scanning...
839 13:01:12.557503 PCI: pci_scan_bus for bus 00
840 13:01:12.560779 PCI: 00:00.0 [8086/0000] ops
841 13:01:12.563962 PCI: 00:00.0 [8086/9b61] enabled
842 13:01:12.567149 PCI: 00:02.0 [8086/0000] bus ops
843 13:01:12.570472 PCI: 00:02.0 [8086/9b41] enabled
844 13:01:12.573839 PCI: 00:04.0 [8086/1903] disabled
845 13:01:12.577142 PCI: 00:08.0 [8086/1911] enabled
846 13:01:12.580418 PCI: 00:12.0 [8086/02f9] enabled
847 13:01:12.583671 PCI: 00:14.0 [8086/0000] bus ops
848 13:01:12.587462 PCI: 00:14.0 [8086/02ed] enabled
849 13:01:12.590787 PCI: 00:14.2 [8086/02ef] enabled
850 13:01:12.594246 PCI: 00:14.3 [8086/02f0] enabled
851 13:01:12.597578 PCI: 00:15.0 [8086/0000] bus ops
852 13:01:12.600765 PCI: 00:15.0 [8086/02e8] enabled
853 13:01:12.604042 PCI: 00:15.1 [8086/0000] bus ops
854 13:01:12.607372 PCI: 00:15.1 [8086/02e9] enabled
855 13:01:12.610756 PCI: 00:16.0 [8086/0000] ops
856 13:01:12.614121 PCI: 00:16.0 [8086/02e0] enabled
857 13:01:12.617342 PCI: 00:17.0 [8086/0000] ops
858 13:01:12.620617 PCI: 00:17.0 [8086/02d3] enabled
859 13:01:12.624518 PCI: 00:19.0 [8086/0000] bus ops
860 13:01:12.627209 PCI: 00:19.0 [8086/02c5] enabled
861 13:01:12.630937 PCI: 00:1d.0 [8086/0000] bus ops
862 13:01:12.634029 PCI: 00:1d.0 [8086/02b0] enabled
863 13:01:12.637365 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 13:01:12.640801 PCI: 00:1e.0 [8086/0000] ops
865 13:01:12.643897 PCI: 00:1e.0 [8086/02a8] enabled
866 13:01:12.647256 PCI: 00:1e.2 [8086/0000] bus ops
867 13:01:12.650571 PCI: 00:1e.2 [8086/02aa] enabled
868 13:01:12.653804 PCI: 00:1e.3 [8086/0000] bus ops
869 13:01:12.657235 PCI: 00:1e.3 [8086/02ab] enabled
870 13:01:12.660416 PCI: 00:1f.0 [8086/0000] bus ops
871 13:01:12.664100 PCI: 00:1f.0 [8086/0284] enabled
872 13:01:12.670556 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 13:01:12.676972 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 13:01:12.680416 PCI: 00:1f.3 [8086/0000] bus ops
875 13:01:12.683770 PCI: 00:1f.3 [8086/02c8] enabled
876 13:01:12.687237 PCI: 00:1f.4 [8086/0000] bus ops
877 13:01:12.690639 PCI: 00:1f.4 [8086/02a3] enabled
878 13:01:12.694367 PCI: 00:1f.5 [8086/0000] bus ops
879 13:01:12.697430 PCI: 00:1f.5 [8086/02a4] enabled
880 13:01:12.697881 PCI: Leftover static devices:
881 13:01:12.700732 PCI: 00:05.0
882 13:01:12.701177 PCI: 00:12.5
883 13:01:12.703885 PCI: 00:12.6
884 13:01:12.704369 PCI: 00:14.1
885 13:01:12.707048 PCI: 00:14.5
886 13:01:12.707589 PCI: 00:15.2
887 13:01:12.708020 PCI: 00:15.3
888 13:01:12.710355 PCI: 00:16.1
889 13:01:12.710802 PCI: 00:16.2
890 13:01:12.713670 PCI: 00:16.3
891 13:01:12.714113 PCI: 00:16.4
892 13:01:12.714460 PCI: 00:16.5
893 13:01:12.717416 PCI: 00:19.1
894 13:01:12.717861 PCI: 00:19.2
895 13:01:12.720776 PCI: 00:1a.0
896 13:01:12.721222 PCI: 00:1c.0
897 13:01:12.721571 PCI: 00:1c.1
898 13:01:12.723794 PCI: 00:1c.2
899 13:01:12.724236 PCI: 00:1c.3
900 13:01:12.727260 PCI: 00:1c.4
901 13:01:12.727706 PCI: 00:1c.5
902 13:01:12.730364 PCI: 00:1c.6
903 13:01:12.730807 PCI: 00:1c.7
904 13:01:12.731153 PCI: 00:1d.1
905 13:01:12.733706 PCI: 00:1d.2
906 13:01:12.734152 PCI: 00:1d.3
907 13:01:12.736895 PCI: 00:1d.4
908 13:01:12.737339 PCI: 00:1d.5
909 13:01:12.737688 PCI: 00:1e.1
910 13:01:12.740711 PCI: 00:1f.1
911 13:01:12.741260 PCI: 00:1f.2
912 13:01:12.743846 PCI: 00:1f.6
913 13:01:12.747068 PCI: Check your devicetree.cb.
914 13:01:12.747616 PCI: 00:02.0 scanning...
915 13:01:12.750884 scan_generic_bus for PCI: 00:02.0
916 13:01:12.756752 scan_generic_bus for PCI: 00:02.0 done
917 13:01:12.760062 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
918 13:01:12.764070 PCI: 00:14.0 scanning...
919 13:01:12.766686 scan_static_bus for PCI: 00:14.0
920 13:01:12.770067 USB0 port 0 enabled
921 13:01:12.770515 USB0 port 0 scanning...
922 13:01:12.773903 scan_static_bus for USB0 port 0
923 13:01:12.777004 USB2 port 0 enabled
924 13:01:12.780531 USB2 port 1 enabled
925 13:01:12.780978 USB2 port 2 disabled
926 13:01:12.783917 USB2 port 3 disabled
927 13:01:12.787640 USB2 port 5 disabled
928 13:01:12.788185 USB2 port 6 enabled
929 13:01:12.790496 USB2 port 9 enabled
930 13:01:12.790966 USB3 port 0 enabled
931 13:01:12.793735 USB3 port 1 enabled
932 13:01:12.797090 USB3 port 2 enabled
933 13:01:12.797533 USB3 port 3 enabled
934 13:01:12.800525 USB3 port 4 disabled
935 13:01:12.803994 USB2 port 0 scanning...
936 13:01:12.807212 scan_static_bus for USB2 port 0
937 13:01:12.810304 scan_static_bus for USB2 port 0 done
938 13:01:12.813918 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
939 13:01:12.816914 USB2 port 1 scanning...
940 13:01:12.820203 scan_static_bus for USB2 port 1
941 13:01:12.823801 scan_static_bus for USB2 port 1 done
942 13:01:12.830272 scan_bus: scanning of bus USB2 port 1 took 9690 usecs
943 13:01:12.833785 USB2 port 6 scanning...
944 13:01:12.837182 scan_static_bus for USB2 port 6
945 13:01:12.839953 scan_static_bus for USB2 port 6 done
946 13:01:12.846739 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
947 13:01:12.847229 USB2 port 9 scanning...
948 13:01:12.849931 scan_static_bus for USB2 port 9
949 13:01:12.853129 scan_static_bus for USB2 port 9 done
950 13:01:12.859669 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
951 13:01:12.863220 USB3 port 0 scanning...
952 13:01:12.866497 scan_static_bus for USB3 port 0
953 13:01:12.869650 scan_static_bus for USB3 port 0 done
954 13:01:12.876169 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
955 13:01:12.876683 USB3 port 1 scanning...
956 13:01:12.879859 scan_static_bus for USB3 port 1
957 13:01:12.886678 scan_static_bus for USB3 port 1 done
958 13:01:12.889480 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
959 13:01:12.893341 USB3 port 2 scanning...
960 13:01:12.896086 scan_static_bus for USB3 port 2
961 13:01:12.899900 scan_static_bus for USB3 port 2 done
962 13:01:12.905941 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
963 13:01:12.906387 USB3 port 3 scanning...
964 13:01:12.909795 scan_static_bus for USB3 port 3
965 13:01:12.915951 scan_static_bus for USB3 port 3 done
966 13:01:12.919281 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
967 13:01:12.922603 scan_static_bus for USB0 port 0 done
968 13:01:12.929706 scan_bus: scanning of bus USB0 port 0 took 155334 usecs
969 13:01:12.932605 scan_static_bus for PCI: 00:14.0 done
970 13:01:12.939084 scan_bus: scanning of bus PCI: 00:14.0 took 172960 usecs
971 13:01:12.942418 PCI: 00:15.0 scanning...
972 13:01:12.945964 scan_generic_bus for PCI: 00:15.0
973 13:01:12.949142 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 13:01:12.952788 scan_generic_bus for PCI: 00:15.0 done
975 13:01:12.959459 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
976 13:01:12.962597 PCI: 00:15.1 scanning...
977 13:01:12.965554 scan_generic_bus for PCI: 00:15.1
978 13:01:12.968864 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 13:01:12.971955 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 13:01:12.975328 scan_generic_bus for PCI: 00:15.1 done
981 13:01:12.982076 scan_bus: scanning of bus PCI: 00:15.1 took 18650 usecs
982 13:01:12.985777 PCI: 00:19.0 scanning...
983 13:01:12.988614 scan_generic_bus for PCI: 00:19.0
984 13:01:12.992030 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 13:01:12.995349 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 13:01:13.001979 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 13:01:13.005220 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 13:01:13.008412 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 13:01:13.011756 scan_generic_bus for PCI: 00:19.0 done
990 13:01:13.018340 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
991 13:01:13.022214 PCI: 00:1d.0 scanning...
992 13:01:13.025033 do_pci_scan_bridge for PCI: 00:1d.0
993 13:01:13.028292 PCI: pci_scan_bus for bus 01
994 13:01:13.032029 PCI: 01:00.0 [1c5c/1327] enabled
995 13:01:13.035302 Enabling Common Clock Configuration
996 13:01:13.038729 L1 Sub-State supported from root port 29
997 13:01:13.042046 L1 Sub-State Support = 0xf
998 13:01:13.045431 CommonModeRestoreTime = 0x28
999 13:01:13.048729 Power On Value = 0x16, Power On Scale = 0x0
1000 13:01:13.051961 ASPM: Enabled L1
1001 13:01:13.058678 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1002 13:01:13.059233 PCI: 00:1e.2 scanning...
1003 13:01:13.061818 scan_generic_bus for PCI: 00:1e.2
1004 13:01:13.068540 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 13:01:13.071886 scan_generic_bus for PCI: 00:1e.2 done
1006 13:01:13.075167 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1007 13:01:13.078745 PCI: 00:1e.3 scanning...
1008 13:01:13.082278 scan_generic_bus for PCI: 00:1e.3
1009 13:01:13.085673 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 13:01:13.092011 scan_generic_bus for PCI: 00:1e.3 done
1011 13:01:13.095237 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1012 13:01:13.098704 PCI: 00:1f.0 scanning...
1013 13:01:13.101847 scan_static_bus for PCI: 00:1f.0
1014 13:01:13.104907 PNP: 0c09.0 enabled
1015 13:01:13.108253 scan_static_bus for PCI: 00:1f.0 done
1016 13:01:13.114802 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1017 13:01:13.115283 PCI: 00:1f.3 scanning...
1018 13:01:13.121363 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1019 13:01:13.124486 PCI: 00:1f.4 scanning...
1020 13:01:13.127725 scan_generic_bus for PCI: 00:1f.4
1021 13:01:13.130666 scan_generic_bus for PCI: 00:1f.4 done
1022 13:01:13.137631 scan_bus: scanning of bus PCI: 00:1f.4 took 10192 usecs
1023 13:01:13.141047 PCI: 00:1f.5 scanning...
1024 13:01:13.144136 scan_generic_bus for PCI: 00:1f.5
1025 13:01:13.147549 scan_generic_bus for PCI: 00:1f.5 done
1026 13:01:13.154168 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1027 13:01:13.157380 scan_bus: scanning of bus DOMAIN: 0000 took 605062 usecs
1028 13:01:13.161234 scan_static_bus for Root Device done
1029 13:01:13.167758 scan_bus: scanning of bus Root Device took 624943 usecs
1030 13:01:13.167845 done
1031 13:01:13.170904 Chrome EC: UHEPI supported
1032 13:01:13.177465 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 13:01:13.184442 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 13:01:13.190847 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 13:01:13.197382 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 13:01:13.200638 SPI flash protection: WPSW=0 SRP0=0
1037 13:01:13.203908 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 13:01:13.210533 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 13:01:13.213882 found VGA at PCI: 00:02.0
1040 13:01:13.217324 Setting up VGA for PCI: 00:02.0
1041 13:01:13.220302 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 13:01:13.227417 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 13:01:13.230668 Allocating resources...
1044 13:01:13.230754 Reading resources...
1045 13:01:13.233945 Root Device read_resources bus 0 link: 0
1046 13:01:13.240658 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 13:01:13.243977 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 13:01:13.250443 DOMAIN: 0000 read_resources bus 0 link: 0
1049 13:01:13.253768 PCI: 00:14.0 read_resources bus 0 link: 0
1050 13:01:13.260737 USB0 port 0 read_resources bus 0 link: 0
1051 13:01:13.267963 USB0 port 0 read_resources bus 0 link: 0 done
1052 13:01:13.271253 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 13:01:13.278378 PCI: 00:15.0 read_resources bus 1 link: 0
1054 13:01:13.281861 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 13:01:13.288263 PCI: 00:15.1 read_resources bus 2 link: 0
1056 13:01:13.291314 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 13:01:13.299519 PCI: 00:19.0 read_resources bus 3 link: 0
1058 13:01:13.305784 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 13:01:13.309179 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 13:01:13.316034 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 13:01:13.319310 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 13:01:13.325941 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 13:01:13.329284 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 13:01:13.335861 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 13:01:13.339447 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 13:01:13.345938 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 13:01:13.352500 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 13:01:13.355613 Root Device read_resources bus 0 link: 0 done
1069 13:01:13.358983 Done reading resources.
1070 13:01:13.362285 Show resources in subtree (Root Device)...After reading.
1071 13:01:13.368819 Root Device child on link 0 CPU_CLUSTER: 0
1072 13:01:13.372199 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 13:01:13.372687 APIC: 00
1074 13:01:13.375882 APIC: 03
1075 13:01:13.376370 APIC: 01
1076 13:01:13.379237 APIC: 02
1077 13:01:13.379689 APIC: 04
1078 13:01:13.380047 APIC: 05
1079 13:01:13.382371 APIC: 06
1080 13:01:13.382821 APIC: 07
1081 13:01:13.385701 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 13:01:13.396013 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 13:01:13.448509 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 13:01:13.449063 PCI: 00:00.0
1085 13:01:13.449429 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 13:01:13.450254 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 13:01:13.450703 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 13:01:13.451065 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 13:01:13.498588 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 13:01:13.499152 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 13:01:13.499551 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 13:01:13.500298 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 13:01:13.500755 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 13:01:13.512856 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 13:01:13.513427 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 13:01:13.519025 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 13:01:13.529008 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 13:01:13.538758 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 13:01:13.548831 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 13:01:13.558565 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 13:01:13.559022 PCI: 00:02.0
1102 13:01:13.568406 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 13:01:13.578721 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 13:01:13.588568 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 13:01:13.589116 PCI: 00:04.0
1106 13:01:13.591874 PCI: 00:08.0
1107 13:01:13.602234 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 13:01:13.602843 PCI: 00:12.0
1109 13:01:13.612059 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 13:01:13.618689 PCI: 00:14.0 child on link 0 USB0 port 0
1111 13:01:13.628730 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 13:01:13.632188 USB0 port 0 child on link 0 USB2 port 0
1113 13:01:13.635481 USB2 port 0
1114 13:01:13.635931 USB2 port 1
1115 13:01:13.638252 USB2 port 2
1116 13:01:13.638702 USB2 port 3
1117 13:01:13.641529 USB2 port 5
1118 13:01:13.642009 USB2 port 6
1119 13:01:13.645424 USB2 port 9
1120 13:01:13.645878 USB3 port 0
1121 13:01:13.648601 USB3 port 1
1122 13:01:13.649194 USB3 port 2
1123 13:01:13.651600 USB3 port 3
1124 13:01:13.652058 USB3 port 4
1125 13:01:13.655236 PCI: 00:14.2
1126 13:01:13.665136 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 13:01:13.674753 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 13:01:13.675201 PCI: 00:14.3
1129 13:01:13.684671 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 13:01:13.691364 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 13:01:13.701474 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 13:01:13.702044 I2C: 01:15
1133 13:01:13.704798 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 13:01:13.714018 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 13:01:13.717701 I2C: 02:5d
1136 13:01:13.717787 GENERIC: 0.0
1137 13:01:13.720932 PCI: 00:16.0
1138 13:01:13.730539 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 13:01:13.730629 PCI: 00:17.0
1140 13:01:13.740492 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 13:01:13.750432 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 13:01:13.757585 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 13:01:13.767493 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 13:01:13.774271 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 13:01:13.783957 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 13:01:13.787213 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 13:01:13.797061 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 13:01:13.800553 I2C: 03:1a
1149 13:01:13.800993 I2C: 03:38
1150 13:01:13.803892 I2C: 03:39
1151 13:01:13.804381 I2C: 03:3a
1152 13:01:13.807129 I2C: 03:3b
1153 13:01:13.810820 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 13:01:13.820899 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 13:01:13.830598 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 13:01:13.837219 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 13:01:13.840238 PCI: 01:00.0
1158 13:01:13.850113 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 13:01:13.850596 PCI: 00:1e.0
1160 13:01:13.863557 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 13:01:13.873534 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 13:01:13.876701 PCI: 00:1e.2 child on link 0 SPI: 00
1163 13:01:13.886683 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 13:01:13.887162 SPI: 00
1165 13:01:13.893561 PCI: 00:1e.3 child on link 0 SPI: 01
1166 13:01:13.902986 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 13:01:13.903444 SPI: 01
1168 13:01:13.906293 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 13:01:13.916420 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 13:01:13.926384 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 13:01:13.926833 PNP: 0c09.0
1172 13:01:13.936696 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 13:01:13.937148 PCI: 00:1f.3
1174 13:01:13.946568 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 13:01:13.956404 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 13:01:13.959754 PCI: 00:1f.4
1177 13:01:13.969296 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 13:01:13.979266 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 13:01:13.979754 PCI: 00:1f.5
1180 13:01:13.989355 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 13:01:13.995819 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 13:01:14.002568 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 13:01:14.009187 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 13:01:14.012435 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 13:01:14.015792 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 13:01:14.018964 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 13:01:14.022350 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 13:01:14.029318 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 13:01:14.035926 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 13:01:14.042129 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 13:01:14.052386 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 13:01:14.058945 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 13:01:14.062242 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 13:01:14.071987 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 13:01:14.075364 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 13:01:14.078904 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 13:01:14.085729 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 13:01:14.089055 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 13:01:14.095206 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 13:01:14.098906 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 13:01:14.105411 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 13:01:14.109036 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 13:01:14.115732 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 13:01:14.119105 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 13:01:14.125739 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 13:01:14.129000 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 13:01:14.135281 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 13:01:14.138522 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 13:01:14.141762 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 13:01:14.148603 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 13:01:14.151581 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 13:01:14.158379 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 13:01:14.161619 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 13:01:14.168372 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 13:01:14.171742 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 13:01:14.178156 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 13:01:14.181714 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 13:01:14.191809 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 13:01:14.194945 avoid_fixed_resources: DOMAIN: 0000
1220 13:01:14.201612 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 13:01:14.204882 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 13:01:14.215134 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 13:01:14.221795 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 13:01:14.228097 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 13:01:14.237622 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 13:01:14.244685 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 13:01:14.250833 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 13:01:14.260970 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 13:01:14.267945 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 13:01:14.274264 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 13:01:14.280558 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 13:01:14.284306 Setting resources...
1233 13:01:14.290854 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 13:01:14.293990 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 13:01:14.297069 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 13:01:14.304029 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 13:01:14.307063 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 13:01:14.313639 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 13:01:14.320423 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 13:01:14.323585 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 13:01:14.333975 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 13:01:14.337362 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 13:01:14.343841 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 13:01:14.347198 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 13:01:14.353662 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 13:01:14.356947 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 13:01:14.364076 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 13:01:14.367040 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 13:01:14.373830 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 13:01:14.376739 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 13:01:14.383450 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 13:01:14.386628 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 13:01:14.390340 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 13:01:14.396958 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 13:01:14.400462 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 13:01:14.406511 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 13:01:14.410009 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 13:01:14.416432 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 13:01:14.419901 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 13:01:14.426375 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 13:01:14.430064 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 13:01:14.436766 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 13:01:14.439764 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 13:01:14.446465 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 13:01:14.453092 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 13:01:14.459672 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 13:01:14.466313 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 13:01:14.476060 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 13:01:14.479796 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 13:01:14.486532 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 13:01:14.490126 Root Device assign_resources, bus 0 link: 0
1272 13:01:14.496427 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 13:01:14.503190 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 13:01:14.513011 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 13:01:14.519731 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 13:01:14.529373 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 13:01:14.536060 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 13:01:14.545997 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 13:01:14.549293 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 13:01:14.555850 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 13:01:14.562562 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 13:01:14.572359 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 13:01:14.578993 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 13:01:14.589180 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 13:01:14.592357 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 13:01:14.596143 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 13:01:14.605481 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 13:01:14.608766 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 13:01:14.615331 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 13:01:14.622445 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 13:01:14.632373 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 13:01:14.638666 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 13:01:14.645442 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 13:01:14.655367 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 13:01:14.662077 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 13:01:14.668688 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 13:01:14.678589 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 13:01:14.681923 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 13:01:14.688159 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 13:01:14.695035 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 13:01:14.704901 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 13:01:14.711220 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 13:01:14.717702 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 13:01:14.724220 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 13:01:14.730881 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 13:01:14.737505 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 13:01:14.747506 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 13:01:14.751036 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 13:01:14.757733 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 13:01:14.764100 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 13:01:14.767455 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 13:01:14.774965 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 13:01:14.777280 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 13:01:14.784246 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 13:01:14.787302 LPC: Trying to open IO window from 800 size 1ff
1316 13:01:14.797287 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 13:01:14.803847 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 13:01:14.813973 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 13:01:14.820503 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 13:01:14.827305 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 13:01:14.830657 Root Device assign_resources, bus 0 link: 0
1322 13:01:14.834023 Done setting resources.
1323 13:01:14.840122 Show resources in subtree (Root Device)...After assigning values.
1324 13:01:14.843575 Root Device child on link 0 CPU_CLUSTER: 0
1325 13:01:14.847216 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 13:01:14.850468 APIC: 00
1327 13:01:14.850906 APIC: 03
1328 13:01:14.851251 APIC: 01
1329 13:01:14.853317 APIC: 02
1330 13:01:14.853691 APIC: 04
1331 13:01:14.857215 APIC: 05
1332 13:01:14.857648 APIC: 06
1333 13:01:14.857989 APIC: 07
1334 13:01:14.863987 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 13:01:14.873747 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 13:01:14.883574 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 13:01:14.884017 PCI: 00:00.0
1338 13:01:14.893509 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 13:01:14.903215 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 13:01:14.913444 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 13:01:14.922718 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 13:01:14.932823 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 13:01:14.942866 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 13:01:14.949544 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 13:01:14.959706 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 13:01:14.969313 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 13:01:14.980045 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 13:01:14.989574 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 13:01:14.995900 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 13:01:15.005769 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 13:01:15.015642 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 13:01:15.025491 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 13:01:15.035309 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 13:01:15.035763 PCI: 00:02.0
1355 13:01:15.048589 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 13:01:15.058591 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 13:01:15.068348 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 13:01:15.068836 PCI: 00:04.0
1359 13:01:15.071715 PCI: 00:08.0
1360 13:01:15.081810 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 13:01:15.082344 PCI: 00:12.0
1362 13:01:15.091959 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 13:01:15.098368 PCI: 00:14.0 child on link 0 USB0 port 0
1364 13:01:15.108165 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 13:01:15.111565 USB0 port 0 child on link 0 USB2 port 0
1366 13:01:15.114745 USB2 port 0
1367 13:01:15.115221 USB2 port 1
1368 13:01:15.118301 USB2 port 2
1369 13:01:15.118749 USB2 port 3
1370 13:01:15.121129 USB2 port 5
1371 13:01:15.121578 USB2 port 6
1372 13:01:15.124539 USB2 port 9
1373 13:01:15.124986 USB3 port 0
1374 13:01:15.127722 USB3 port 1
1375 13:01:15.128165 USB3 port 2
1376 13:01:15.131428 USB3 port 3
1377 13:01:15.131877 USB3 port 4
1378 13:01:15.134222 PCI: 00:14.2
1379 13:01:15.144533 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 13:01:15.154181 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 13:01:15.157587 PCI: 00:14.3
1382 13:01:15.167505 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 13:01:15.170871 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 13:01:15.180898 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 13:01:15.184119 I2C: 01:15
1386 13:01:15.187566 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 13:01:15.197013 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 13:01:15.200344 I2C: 02:5d
1389 13:01:15.200793 GENERIC: 0.0
1390 13:01:15.204085 PCI: 00:16.0
1391 13:01:15.213677 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 13:01:15.214189 PCI: 00:17.0
1393 13:01:15.223918 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 13:01:15.233833 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 13:01:15.243489 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 13:01:15.253196 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 13:01:15.263180 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 13:01:15.273187 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 13:01:15.276598 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 13:01:15.286613 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 13:01:15.290409 I2C: 03:1a
1402 13:01:15.290949 I2C: 03:38
1403 13:01:15.293156 I2C: 03:39
1404 13:01:15.293697 I2C: 03:3a
1405 13:01:15.296788 I2C: 03:3b
1406 13:01:15.299678 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 13:01:15.309507 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 13:01:15.319875 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 13:01:15.329690 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 13:01:15.330279 PCI: 01:00.0
1411 13:01:15.342672 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 13:01:15.343128 PCI: 00:1e.0
1413 13:01:15.352726 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 13:01:15.365845 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 13:01:15.369042 PCI: 00:1e.2 child on link 0 SPI: 00
1416 13:01:15.378780 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 13:01:15.379233 SPI: 00
1418 13:01:15.382125 PCI: 00:1e.3 child on link 0 SPI: 01
1419 13:01:15.395558 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 13:01:15.396014 SPI: 01
1421 13:01:15.398799 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 13:01:15.408862 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 13:01:15.418251 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 13:01:15.418342 PNP: 0c09.0
1425 13:01:15.428275 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 13:01:15.428406 PCI: 00:1f.3
1427 13:01:15.437964 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 13:01:15.451334 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 13:01:15.451448 PCI: 00:1f.4
1430 13:01:15.461335 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 13:01:15.471450 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 13:01:15.471618 PCI: 00:1f.5
1433 13:01:15.484359 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 13:01:15.484726 Done allocating resources.
1435 13:01:15.491541 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 13:01:15.494298 Enabling resources...
1437 13:01:15.497578 PCI: 00:00.0 subsystem <- 8086/9b61
1438 13:01:15.501392 PCI: 00:00.0 cmd <- 06
1439 13:01:15.504612 PCI: 00:02.0 subsystem <- 8086/9b41
1440 13:01:15.507425 PCI: 00:02.0 cmd <- 03
1441 13:01:15.511219 PCI: 00:08.0 cmd <- 06
1442 13:01:15.514231 PCI: 00:12.0 subsystem <- 8086/02f9
1443 13:01:15.517680 PCI: 00:12.0 cmd <- 02
1444 13:01:15.520825 PCI: 00:14.0 subsystem <- 8086/02ed
1445 13:01:15.521277 PCI: 00:14.0 cmd <- 02
1446 13:01:15.524294 PCI: 00:14.2 cmd <- 02
1447 13:01:15.527692 PCI: 00:14.3 subsystem <- 8086/02f0
1448 13:01:15.530832 PCI: 00:14.3 cmd <- 02
1449 13:01:15.534284 PCI: 00:15.0 subsystem <- 8086/02e8
1450 13:01:15.537544 PCI: 00:15.0 cmd <- 02
1451 13:01:15.540774 PCI: 00:15.1 subsystem <- 8086/02e9
1452 13:01:15.543889 PCI: 00:15.1 cmd <- 02
1453 13:01:15.547490 PCI: 00:16.0 subsystem <- 8086/02e0
1454 13:01:15.551019 PCI: 00:16.0 cmd <- 02
1455 13:01:15.554028 PCI: 00:17.0 subsystem <- 8086/02d3
1456 13:01:15.557140 PCI: 00:17.0 cmd <- 03
1457 13:01:15.560512 PCI: 00:19.0 subsystem <- 8086/02c5
1458 13:01:15.563790 PCI: 00:19.0 cmd <- 02
1459 13:01:15.567314 PCI: 00:1d.0 bridge ctrl <- 0013
1460 13:01:15.570238 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 13:01:15.570693 PCI: 00:1d.0 cmd <- 06
1462 13:01:15.577096 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 13:01:15.577547 PCI: 00:1e.0 cmd <- 06
1464 13:01:15.580409 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 13:01:15.583626 PCI: 00:1e.2 cmd <- 06
1466 13:01:15.587514 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 13:01:15.591191 PCI: 00:1e.3 cmd <- 02
1468 13:01:15.593674 PCI: 00:1f.0 subsystem <- 8086/0284
1469 13:01:15.597534 PCI: 00:1f.0 cmd <- 407
1470 13:01:15.600763 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 13:01:15.603928 PCI: 00:1f.3 cmd <- 02
1472 13:01:15.607310 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 13:01:15.610561 PCI: 00:1f.4 cmd <- 03
1474 13:01:15.614067 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 13:01:15.617120 PCI: 00:1f.5 cmd <- 406
1476 13:01:15.624825 PCI: 01:00.0 cmd <- 02
1477 13:01:15.630313 done.
1478 13:01:15.640290 ME: Version: 14.0.39.1367
1479 13:01:15.646862 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1480 13:01:15.650353 Initializing devices...
1481 13:01:15.650797 Root Device init ...
1482 13:01:15.656494 Chrome EC: Set SMI mask to 0x0000000000000000
1483 13:01:15.660265 Chrome EC: clear events_b mask to 0x0000000000000000
1484 13:01:15.666419 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 13:01:15.673325 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 13:01:15.679873 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 13:01:15.682967 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 13:01:15.686725 Root Device init finished in 35175 usecs
1489 13:01:15.689928 CPU_CLUSTER: 0 init ...
1490 13:01:15.696684 CPU_CLUSTER: 0 init finished in 2449 usecs
1491 13:01:15.700661 PCI: 00:00.0 init ...
1492 13:01:15.704014 CPU TDP: 15 Watts
1493 13:01:15.707905 CPU PL2 = 64 Watts
1494 13:01:15.711026 PCI: 00:00.0 init finished in 7082 usecs
1495 13:01:15.714323 PCI: 00:02.0 init ...
1496 13:01:15.717689 PCI: 00:02.0 init finished in 2255 usecs
1497 13:01:15.721055 PCI: 00:08.0 init ...
1498 13:01:15.724245 PCI: 00:08.0 init finished in 2253 usecs
1499 13:01:15.727414 PCI: 00:12.0 init ...
1500 13:01:15.730773 PCI: 00:12.0 init finished in 2253 usecs
1501 13:01:15.734266 PCI: 00:14.0 init ...
1502 13:01:15.737466 PCI: 00:14.0 init finished in 2244 usecs
1503 13:01:15.740786 PCI: 00:14.2 init ...
1504 13:01:15.744110 PCI: 00:14.2 init finished in 2253 usecs
1505 13:01:15.747294 PCI: 00:14.3 init ...
1506 13:01:15.750456 PCI: 00:14.3 init finished in 2270 usecs
1507 13:01:15.753828 PCI: 00:15.0 init ...
1508 13:01:15.757473 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 13:01:15.760831 PCI: 00:15.0 init finished in 5981 usecs
1510 13:01:15.764063 PCI: 00:15.1 init ...
1511 13:01:15.767326 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 13:01:15.770515 PCI: 00:15.1 init finished in 5971 usecs
1513 13:01:15.774238 PCI: 00:16.0 init ...
1514 13:01:15.777305 PCI: 00:16.0 init finished in 2253 usecs
1515 13:01:15.781178 PCI: 00:19.0 init ...
1516 13:01:15.784655 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 13:01:15.791101 PCI: 00:19.0 init finished in 5979 usecs
1518 13:01:15.791552 PCI: 00:1d.0 init ...
1519 13:01:15.794257 Initializing PCH PCIe bridge.
1520 13:01:15.800904 PCI: 00:1d.0 init finished in 5280 usecs
1521 13:01:15.804208 PCI: 00:1f.0 init ...
1522 13:01:15.807473 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 13:01:15.810773 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 13:01:15.814028 IOAPIC: ID = 0x02
1525 13:01:15.817299 IOAPIC: Dumping registers
1526 13:01:15.817808 reg 0x0000: 0x02000000
1527 13:01:15.820499 reg 0x0001: 0x00770020
1528 13:01:15.823711 reg 0x0002: 0x00000000
1529 13:01:15.827468 PCI: 00:1f.0 init finished in 23553 usecs
1530 13:01:15.831208 PCI: 00:1f.4 init ...
1531 13:01:15.834617 PCI: 00:1f.4 init finished in 2264 usecs
1532 13:01:15.846693 PCI: 01:00.0 init ...
1533 13:01:15.850011 PCI: 01:00.0 init finished in 2254 usecs
1534 13:01:15.854435 PNP: 0c09.0 init ...
1535 13:01:15.857810 Google Chrome EC uptime: 11.089 seconds
1536 13:01:15.864786 Google Chrome AP resets since EC boot: 0
1537 13:01:15.868102 Google Chrome most recent AP reset causes:
1538 13:01:15.874578 Google Chrome EC reset flags at last EC boot: reset-pin
1539 13:01:15.877841 PNP: 0c09.0 init finished in 20571 usecs
1540 13:01:15.880968 Devices initialized
1541 13:01:15.884670 Show all devs... After init.
1542 13:01:15.885204 Root Device: enabled 1
1543 13:01:15.887701 CPU_CLUSTER: 0: enabled 1
1544 13:01:15.890800 DOMAIN: 0000: enabled 1
1545 13:01:15.891255 APIC: 00: enabled 1
1546 13:01:15.894367 PCI: 00:00.0: enabled 1
1547 13:01:15.897346 PCI: 00:02.0: enabled 1
1548 13:01:15.900675 PCI: 00:04.0: enabled 0
1549 13:01:15.901184 PCI: 00:05.0: enabled 0
1550 13:01:15.904188 PCI: 00:12.0: enabled 1
1551 13:01:15.907610 PCI: 00:12.5: enabled 0
1552 13:01:15.910826 PCI: 00:12.6: enabled 0
1553 13:01:15.911307 PCI: 00:14.0: enabled 1
1554 13:01:15.914285 PCI: 00:14.1: enabled 0
1555 13:01:15.917563 PCI: 00:14.3: enabled 1
1556 13:01:15.918016 PCI: 00:14.5: enabled 0
1557 13:01:15.920571 PCI: 00:15.0: enabled 1
1558 13:01:15.923820 PCI: 00:15.1: enabled 1
1559 13:01:15.927403 PCI: 00:15.2: enabled 0
1560 13:01:15.927962 PCI: 00:15.3: enabled 0
1561 13:01:15.930482 PCI: 00:16.0: enabled 1
1562 13:01:15.933881 PCI: 00:16.1: enabled 0
1563 13:01:15.937128 PCI: 00:16.2: enabled 0
1564 13:01:15.937630 PCI: 00:16.3: enabled 0
1565 13:01:15.940393 PCI: 00:16.4: enabled 0
1566 13:01:15.943643 PCI: 00:16.5: enabled 0
1567 13:01:15.947054 PCI: 00:17.0: enabled 1
1568 13:01:15.947559 PCI: 00:19.0: enabled 1
1569 13:01:15.950335 PCI: 00:19.1: enabled 0
1570 13:01:15.953693 PCI: 00:19.2: enabled 0
1571 13:01:15.954184 PCI: 00:1a.0: enabled 0
1572 13:01:15.956934 PCI: 00:1c.0: enabled 0
1573 13:01:15.960041 PCI: 00:1c.1: enabled 0
1574 13:01:15.963622 PCI: 00:1c.2: enabled 0
1575 13:01:15.964185 PCI: 00:1c.3: enabled 0
1576 13:01:15.966784 PCI: 00:1c.4: enabled 0
1577 13:01:15.970280 PCI: 00:1c.5: enabled 0
1578 13:01:15.973673 PCI: 00:1c.6: enabled 0
1579 13:01:15.974171 PCI: 00:1c.7: enabled 0
1580 13:01:15.976787 PCI: 00:1d.0: enabled 1
1581 13:01:15.980154 PCI: 00:1d.1: enabled 0
1582 13:01:15.983832 PCI: 00:1d.2: enabled 0
1583 13:01:15.984369 PCI: 00:1d.3: enabled 0
1584 13:01:15.986651 PCI: 00:1d.4: enabled 0
1585 13:01:15.989935 PCI: 00:1d.5: enabled 0
1586 13:01:15.993790 PCI: 00:1e.0: enabled 1
1587 13:01:15.994363 PCI: 00:1e.1: enabled 0
1588 13:01:15.996908 PCI: 00:1e.2: enabled 1
1589 13:01:15.999938 PCI: 00:1e.3: enabled 1
1590 13:01:16.000518 PCI: 00:1f.0: enabled 1
1591 13:01:16.003498 PCI: 00:1f.1: enabled 0
1592 13:01:16.006639 PCI: 00:1f.2: enabled 0
1593 13:01:16.009882 PCI: 00:1f.3: enabled 1
1594 13:01:16.010308 PCI: 00:1f.4: enabled 1
1595 13:01:16.013294 PCI: 00:1f.5: enabled 1
1596 13:01:16.016585 PCI: 00:1f.6: enabled 0
1597 13:01:16.019898 USB0 port 0: enabled 1
1598 13:01:16.020415 I2C: 01:15: enabled 1
1599 13:01:16.023195 I2C: 02:5d: enabled 1
1600 13:01:16.026273 GENERIC: 0.0: enabled 1
1601 13:01:16.026740 I2C: 03:1a: enabled 1
1602 13:01:16.029903 I2C: 03:38: enabled 1
1603 13:01:16.033386 I2C: 03:39: enabled 1
1604 13:01:16.033854 I2C: 03:3a: enabled 1
1605 13:01:16.036666 I2C: 03:3b: enabled 1
1606 13:01:16.039795 PCI: 00:00.0: enabled 1
1607 13:01:16.040258 SPI: 00: enabled 1
1608 13:01:16.043144 SPI: 01: enabled 1
1609 13:01:16.046420 PNP: 0c09.0: enabled 1
1610 13:01:16.046830 USB2 port 0: enabled 1
1611 13:01:16.049810 USB2 port 1: enabled 1
1612 13:01:16.053019 USB2 port 2: enabled 0
1613 13:01:16.053461 USB2 port 3: enabled 0
1614 13:01:16.056437 USB2 port 5: enabled 0
1615 13:01:16.059591 USB2 port 6: enabled 1
1616 13:01:16.063009 USB2 port 9: enabled 1
1617 13:01:16.063459 USB3 port 0: enabled 1
1618 13:01:16.066233 USB3 port 1: enabled 1
1619 13:01:16.069347 USB3 port 2: enabled 1
1620 13:01:16.069833 USB3 port 3: enabled 1
1621 13:01:16.073278 USB3 port 4: enabled 0
1622 13:01:16.076481 APIC: 03: enabled 1
1623 13:01:16.076930 APIC: 01: enabled 1
1624 13:01:16.079793 APIC: 02: enabled 1
1625 13:01:16.083082 APIC: 04: enabled 1
1626 13:01:16.083533 APIC: 05: enabled 1
1627 13:01:16.086455 APIC: 06: enabled 1
1628 13:01:16.086904 APIC: 07: enabled 1
1629 13:01:16.089560 PCI: 00:08.0: enabled 1
1630 13:01:16.092804 PCI: 00:14.2: enabled 1
1631 13:01:16.096040 PCI: 01:00.0: enabled 1
1632 13:01:16.099659 Disabling ACPI via APMC:
1633 13:01:16.100108 done.
1634 13:01:16.106133 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 13:01:16.109727 ELOG: NV offset 0xaf0000 size 0x4000
1636 13:01:16.116360 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 13:01:16.122862 ELOG: Event(17) added with size 13 at 2023-03-22 13:01:15 UTC
1638 13:01:16.129672 ELOG: Event(92) added with size 9 at 2023-03-22 13:01:15 UTC
1639 13:01:16.136618 ELOG: Event(93) added with size 9 at 2023-03-22 13:01:15 UTC
1640 13:01:16.142662 ELOG: Event(9A) added with size 9 at 2023-03-22 13:01:15 UTC
1641 13:01:16.149550 ELOG: Event(9E) added with size 10 at 2023-03-22 13:01:15 UTC
1642 13:01:16.155962 ELOG: Event(9F) added with size 14 at 2023-03-22 13:01:15 UTC
1643 13:01:16.159284 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 13:01:16.166826 ELOG: Event(A1) added with size 10 at 2023-03-22 13:01:15 UTC
1645 13:01:16.176553 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 13:01:16.183196 ELOG: Event(A0) added with size 9 at 2023-03-22 13:01:15 UTC
1647 13:01:16.186795 elog_add_boot_reason: Logged dev mode boot
1648 13:01:16.189946 Finalize devices...
1649 13:01:16.190488 PCI: 00:17.0 final
1650 13:01:16.193210 Devices finalized
1651 13:01:16.196357 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 13:01:16.203270 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 13:01:16.206627 ME: HFSTS1 : 0x90000245
1654 13:01:16.209629 ME: HFSTS2 : 0x3B850126
1655 13:01:16.216265 ME: HFSTS3 : 0x00000020
1656 13:01:16.219622 ME: HFSTS4 : 0x00004800
1657 13:01:16.222764 ME: HFSTS5 : 0x00000000
1658 13:01:16.226203 ME: HFSTS6 : 0x40400006
1659 13:01:16.229849 ME: Manufacturing Mode : NO
1660 13:01:16.233031 ME: FW Partition Table : OK
1661 13:01:16.236438 ME: Bringup Loader Failure : NO
1662 13:01:16.239553 ME: Firmware Init Complete : YES
1663 13:01:16.242807 ME: Boot Options Present : NO
1664 13:01:16.246344 ME: Update In Progress : NO
1665 13:01:16.249509 ME: D0i3 Support : YES
1666 13:01:16.252726 ME: Low Power State Enabled : NO
1667 13:01:16.256163 ME: CPU Replaced : NO
1668 13:01:16.259334 ME: CPU Replacement Valid : YES
1669 13:01:16.262658 ME: Current Working State : 5
1670 13:01:16.265891 ME: Current Operation State : 1
1671 13:01:16.269445 ME: Current Operation Mode : 0
1672 13:01:16.272355 ME: Error Code : 0
1673 13:01:16.275699 ME: CPU Debug Disabled : YES
1674 13:01:16.279342 ME: TXT Support : NO
1675 13:01:16.285669 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 13:01:16.292278 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 13:01:16.292767 CBFS @ c08000 size 3f8000
1678 13:01:16.298979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 13:01:16.302223 CBFS: Locating 'fallback/dsdt.aml'
1680 13:01:16.305498 CBFS: Found @ offset 10bb80 size 3fa5
1681 13:01:16.312373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 13:01:16.315576 CBFS @ c08000 size 3f8000
1683 13:01:16.318799 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 13:01:16.322664 CBFS: Locating 'fallback/slic'
1685 13:01:16.330352 CBFS: 'fallback/slic' not found.
1686 13:01:16.333757 ACPI: Writing ACPI tables at 99b3e000.
1687 13:01:16.334219 ACPI: * FACS
1688 13:01:16.337060 ACPI: * DSDT
1689 13:01:16.340249 Ramoops buffer: 0x100000@0x99a3d000.
1690 13:01:16.344032 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 13:01:16.350889 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 13:01:16.353550 Google Chrome EC: version:
1693 13:01:16.356921 ro: helios_v2.0.2659-56403530b
1694 13:01:16.360060 rw: helios_v2.0.2849-c41de27e7d
1695 13:01:16.360554 running image: 1
1696 13:01:16.365097 ACPI: * FADT
1697 13:01:16.365821 SCI is IRQ9
1698 13:01:16.371395 ACPI: added table 1/32, length now 40
1699 13:01:16.371876 ACPI: * SSDT
1700 13:01:16.374573 Found 1 CPU(s) with 8 core(s) each.
1701 13:01:16.377872 Error: Could not locate 'wifi_sar' in VPD.
1702 13:01:16.384650 Checking CBFS for default SAR values
1703 13:01:16.387671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 13:01:16.391074 CBFS @ c08000 size 3f8000
1705 13:01:16.397581 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 13:01:16.401089 CBFS: Locating 'wifi_sar_defaults.hex'
1707 13:01:16.404262 CBFS: Found @ offset 5fac0 size 77
1708 13:01:16.407601 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 13:01:16.413923 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 13:01:16.417690 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 13:01:16.424338 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 13:01:16.427328 failed to find key in VPD: dsm_calib_r0_0
1713 13:01:16.437470 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 13:01:16.440605 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 13:01:16.443965 failed to find key in VPD: dsm_calib_r0_1
1716 13:01:16.454217 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 13:01:16.461060 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 13:01:16.464217 failed to find key in VPD: dsm_calib_r0_2
1719 13:01:16.474100 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 13:01:16.477339 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 13:01:16.484052 failed to find key in VPD: dsm_calib_r0_3
1722 13:01:16.490592 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 13:01:16.497374 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 13:01:16.500691 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 13:01:16.504067 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 13:01:16.507605 EC returned error result code 1
1727 13:01:16.511198 EC returned error result code 1
1728 13:01:16.515115 EC returned error result code 1
1729 13:01:16.521620 PS2K: Bad resp from EC. Vivaldi disabled!
1730 13:01:16.525627 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 13:01:16.531747 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 13:01:16.538567 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 13:01:16.541952 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 13:01:16.548453 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 13:01:16.555143 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 13:01:16.561666 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 13:01:16.565001 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 13:01:16.568256 ACPI: added table 2/32, length now 44
1739 13:01:16.571694 ACPI: * MCFG
1740 13:01:16.574772 ACPI: added table 3/32, length now 48
1741 13:01:16.577967 ACPI: * TPM2
1742 13:01:16.581788 TPM2 log created at 99a2d000
1743 13:01:16.584681 ACPI: added table 4/32, length now 52
1744 13:01:16.585206 ACPI: * MADT
1745 13:01:16.587889 SCI is IRQ9
1746 13:01:16.591244 ACPI: added table 5/32, length now 56
1747 13:01:16.591698 current = 99b43ac0
1748 13:01:16.594707 ACPI: * DMAR
1749 13:01:16.598007 ACPI: added table 6/32, length now 60
1750 13:01:16.601218 ACPI: * IGD OpRegion
1751 13:01:16.601671 GMA: Found VBT in CBFS
1752 13:01:16.604503 GMA: Found valid VBT in CBFS
1753 13:01:16.607948 ACPI: added table 7/32, length now 64
1754 13:01:16.611149 ACPI: * HPET
1755 13:01:16.614513 ACPI: added table 8/32, length now 68
1756 13:01:16.614966 ACPI: done.
1757 13:01:16.617725 ACPI tables: 31744 bytes.
1758 13:01:16.621604 smbios_write_tables: 99a2c000
1759 13:01:16.624840 EC returned error result code 3
1760 13:01:16.628163 Couldn't obtain OEM name from CBI
1761 13:01:16.631299 Create SMBIOS type 17
1762 13:01:16.634835 PCI: 00:00.0 (Intel Cannonlake)
1763 13:01:16.637953 PCI: 00:14.3 (Intel WiFi)
1764 13:01:16.641409 SMBIOS tables: 939 bytes.
1765 13:01:16.644467 Writing table forward entry at 0x00000500
1766 13:01:16.651086 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 13:01:16.654301 Writing coreboot table at 0x99b62000
1768 13:01:16.660890 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 13:01:16.664244 1. 0000000000001000-000000000009ffff: RAM
1770 13:01:16.667672 2. 00000000000a0000-00000000000fffff: RESERVED
1771 13:01:16.674567 3. 0000000000100000-0000000099a2bfff: RAM
1772 13:01:16.677592 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 13:01:16.684000 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 13:01:16.690645 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 13:01:16.693928 7. 000000009a000000-000000009f7fffff: RESERVED
1776 13:01:16.700664 8. 00000000e0000000-00000000efffffff: RESERVED
1777 13:01:16.704003 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 13:01:16.707389 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 13:01:16.714023 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 13:01:16.717305 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 13:01:16.723643 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 13:01:16.727402 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 13:01:16.733968 15. 0000000100000000-000000045e7fffff: RAM
1784 13:01:16.737231 Graphics framebuffer located at 0xc0000000
1785 13:01:16.740492 Passing 5 GPIOs to payload:
1786 13:01:16.743666 NAME | PORT | POLARITY | VALUE
1787 13:01:16.750282 write protect | undefined | high | low
1788 13:01:16.753835 lid | undefined | high | high
1789 13:01:16.760191 power | undefined | high | low
1790 13:01:16.766669 oprom | undefined | high | low
1791 13:01:16.770074 EC in RW | 0x000000cb | high | low
1792 13:01:16.773385 Board ID: 4
1793 13:01:16.777198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 13:01:16.780446 CBFS @ c08000 size 3f8000
1795 13:01:16.786498 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 13:01:16.793489 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 13:01:16.793636 coreboot table: 1492 bytes.
1798 13:01:16.796179 IMD ROOT 0. 99fff000 00001000
1799 13:01:16.799902 IMD SMALL 1. 99ffe000 00001000
1800 13:01:16.803001 FSP MEMORY 2. 99c4e000 003b0000
1801 13:01:16.806181 CONSOLE 3. 99c2e000 00020000
1802 13:01:16.809359 FMAP 4. 99c2d000 0000054e
1803 13:01:16.812807 TIME STAMP 5. 99c2c000 00000910
1804 13:01:16.816116 VBOOT WORK 6. 99c18000 00014000
1805 13:01:16.819391 MRC DATA 7. 99c16000 00001958
1806 13:01:16.822827 ROMSTG STCK 8. 99c15000 00001000
1807 13:01:16.826115 AFTER CAR 9. 99c0b000 0000a000
1808 13:01:16.829399 RAMSTAGE 10. 99baf000 0005c000
1809 13:01:16.832795 REFCODE 11. 99b7a000 00035000
1810 13:01:16.836140 SMM BACKUP 12. 99b6a000 00010000
1811 13:01:16.839249 COREBOOT 13. 99b62000 00008000
1812 13:01:16.842478 ACPI 14. 99b3e000 00024000
1813 13:01:16.846082 ACPI GNVS 15. 99b3d000 00001000
1814 13:01:16.849303 RAMOOPS 16. 99a3d000 00100000
1815 13:01:16.852372 TPM2 TCGLOG17. 99a2d000 00010000
1816 13:01:16.855900 SMBIOS 18. 99a2c000 00000800
1817 13:01:16.858979 IMD small region:
1818 13:01:16.862582 IMD ROOT 0. 99ffec00 00000400
1819 13:01:16.865891 FSP RUNTIME 1. 99ffebe0 00000004
1820 13:01:16.869027 EC HOSTEVENT 2. 99ffebc0 00000008
1821 13:01:16.872846 POWER STATE 3. 99ffeb80 00000040
1822 13:01:16.875694 ROMSTAGE 4. 99ffeb60 00000004
1823 13:01:16.879376 MEM INFO 5. 99ffe9a0 000001b9
1824 13:01:16.885563 VPD 6. 99ffe920 0000006c
1825 13:01:16.885652 MTRR: Physical address space:
1826 13:01:16.892349 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 13:01:16.898906 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 13:01:16.905454 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 13:01:16.912321 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 13:01:16.918979 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 13:01:16.925571 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 13:01:16.932056 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 13:01:16.935312 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 13:01:16.938819 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 13:01:16.942045 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 13:01:16.948664 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 13:01:16.951980 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 13:01:16.955346 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 13:01:16.958612 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 13:01:16.965031 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 13:01:16.968822 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 13:01:16.972088 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 13:01:16.975220 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 13:01:16.978481 call enable_fixed_mtrr()
1845 13:01:16.981701 CPU physical address size: 39 bits
1846 13:01:16.988569 MTRR: default type WB/UC MTRR counts: 6/8.
1847 13:01:16.991975 MTRR: WB selected as default type.
1848 13:01:16.998332 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 13:01:17.001712 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 13:01:17.008242 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 13:01:17.015213 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 13:01:17.022092 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 13:01:17.028262 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 13:01:17.031627 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 13:01:17.038214 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 13:01:17.041728 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 13:01:17.044901 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 13:01:17.048330 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 13:01:17.054788 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 13:01:17.057940 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 13:01:17.061317 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 13:01:17.064938 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 13:01:17.071668 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 13:01:17.074815 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 13:01:17.075319
1866 13:01:17.075684 MTRR check
1867 13:01:17.077946 call enable_fixed_mtrr()
1868 13:01:17.081587 Fixed MTRRs : Enabled
1869 13:01:17.084760 Variable MTRRs: Enabled
1870 13:01:17.085209
1871 13:01:17.088091 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 13:01:17.091440 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 13:01:17.094733 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 13:01:17.101305 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 13:01:17.104690 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 13:01:17.107866 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 13:01:17.111277 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 13:01:17.117784 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 13:01:17.121053 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 13:01:17.124270 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 13:01:17.127553 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 13:01:17.134744 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 13:01:17.135215 call enable_fixed_mtrr()
1884 13:01:17.141168 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 13:01:17.144567 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 13:01:17.147822 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 13:01:17.151173 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 13:01:17.157656 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 13:01:17.161020 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 13:01:17.164387 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 13:01:17.167517 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 13:01:17.171041 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 13:01:17.177363 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 13:01:17.181018 CPU physical address size: 39 bits
1895 13:01:17.184204 call enable_fixed_mtrr()
1896 13:01:17.187384 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 13:01:17.190816 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 13:01:17.194194 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 13:01:17.200782 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 13:01:17.204124 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 13:01:17.207367 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 13:01:17.210714 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 13:01:17.217453 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 13:01:17.220707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 13:01:17.223821 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 13:01:17.227114 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 13:01:17.233734 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 13:01:17.237249 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 13:01:17.240446 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 13:01:17.243946 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 13:01:17.250314 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 13:01:17.253671 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 13:01:17.257043 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 13:01:17.260372 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 13:01:17.266812 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 13:01:17.270161 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 13:01:17.273628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 13:01:17.276586 call enable_fixed_mtrr()
1919 13:01:17.280444 call enable_fixed_mtrr()
1920 13:01:17.283411 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1921 13:01:17.286894 CPU physical address size: 39 bits
1922 13:01:17.293502 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1923 13:01:17.296692 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 13:01:17.300407 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:01:17.306842 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 13:01:17.309931 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 13:01:17.313410 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 13:01:17.316984 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 13:01:17.320145 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 13:01:17.326790 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 13:01:17.330750 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 13:01:17.333732 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 13:01:17.337159 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 13:01:17.343866 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 13:01:17.346931 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 13:01:17.350557 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 13:01:17.353617 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 13:01:17.359634 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 13:01:17.363328 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 13:01:17.366534 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 13:01:17.369718 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 13:01:17.376378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 13:01:17.380125 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 13:01:17.383155 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 13:01:17.386624 call enable_fixed_mtrr()
1946 13:01:17.389308 call enable_fixed_mtrr()
1947 13:01:17.392999 CPU physical address size: 39 bits
1948 13:01:17.395839 CPU physical address size: 39 bits
1949 13:01:17.399555 CPU physical address size: 39 bits
1950 13:01:17.402623 CBFS @ c08000 size 3f8000
1951 13:01:17.409231 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1952 13:01:17.412544 CPU physical address size: 39 bits
1953 13:01:17.415847 CPU physical address size: 39 bits
1954 13:01:17.419601 CBFS: Locating 'fallback/payload'
1955 13:01:17.422875 CBFS: Found @ offset 1c96c0 size 3f798
1956 13:01:17.429484 Checking segment from ROM address 0xffdd16f8
1957 13:01:17.432549 Checking segment from ROM address 0xffdd1714
1958 13:01:17.435782 Loading segment from ROM address 0xffdd16f8
1959 13:01:17.439046 code (compression=0)
1960 13:01:17.448909 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 13:01:17.455770 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 13:01:17.458834 it's not compressed!
1963 13:01:17.550969 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 13:01:17.557736 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 13:01:17.561123 Loading segment from ROM address 0xffdd1714
1966 13:01:17.564345 Entry Point 0x30000000
1967 13:01:17.567481 Loaded segments
1968 13:01:17.572781 Finalizing chipset.
1969 13:01:17.576211 Finalizing SMM.
1970 13:01:17.579462 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1971 13:01:17.582753 mp_park_aps done after 0 msecs.
1972 13:01:17.589341 Jumping to boot code at 30000000(99b62000)
1973 13:01:17.596124 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 13:01:17.596717
1975 13:01:17.597157
1976 13:01:17.597490
1977 13:01:17.599728 Starting depthcharge on Helios...
1978 13:01:17.600166
1979 13:01:17.601298 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 13:01:17.601812 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 13:01:17.602240 Setting prompt string to ['hatch:']
1982 13:01:17.602649 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 13:01:17.609670 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 13:01:17.610118
1985 13:01:17.615812 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 13:01:17.616267
1987 13:01:17.622705 board_setup: Info: eMMC controller not present; skipping
1988 13:01:17.623151
1989 13:01:17.626117 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 13:01:17.626680
1991 13:01:17.632649 board_setup: Info: SDHCI controller not present; skipping
1992 13:01:17.633204
1993 13:01:17.639435 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 13:01:17.640049
1995 13:01:17.640469 Wipe memory regions:
1996 13:01:17.640810
1997 13:01:17.642173 [0x00000000001000, 0x000000000a0000)
1998 13:01:17.642621
1999 13:01:17.646010 [0x00000000100000, 0x00000030000000)
2000 13:01:17.711885
2001 13:01:17.715462 [0x00000030657430, 0x00000099a2c000)
2002 13:01:17.852429
2003 13:01:17.855365 [0x00000100000000, 0x0000045e800000)
2004 13:01:19.238418
2005 13:01:19.238961 R8152: Initializing
2006 13:01:19.239317
2007 13:01:19.241598 Version 9 (ocp_data = 6010)
2008 13:01:19.245426
2009 13:01:19.245871 R8152: Done initializing
2010 13:01:19.246224
2011 13:01:19.248700 Adding net device
2012 13:01:19.858455
2013 13:01:19.858992 R8152: Initializing
2014 13:01:19.859343
2015 13:01:19.861734 Version 6 (ocp_data = 5c30)
2016 13:01:19.862240
2017 13:01:19.864978 R8152: Done initializing
2018 13:01:19.865411
2019 13:01:19.871494 net_add_device: Attemp to include the same device
2020 13:01:19.871935
2021 13:01:19.878694 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 13:01:19.879135
2023 13:01:19.879476
2024 13:01:19.879792
2025 13:01:19.880540 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 13:01:19.982346 hatch: tftpboot 192.168.201.1 9730016/tftp-deploy-9_jlp3i5/kernel/bzImage 9730016/tftp-deploy-9_jlp3i5/kernel/cmdline 9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
2028 13:01:19.983037 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 13:01:19.983443 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 13:01:19.987979 tftpboot 192.168.201.1 9730016/tftp-deploy-9_jlp3i5/kernel/bzImoy-9_jlp3i5/kernel/cmdline 9730016/tftp-deploy-9_jlp3i5/ramdisk/ramdisk.cpio.gz
2031 13:01:19.988459
2032 13:01:19.988800 Waiting for link
2033 13:01:20.189060
2034 13:01:20.189602 done.
2035 13:01:20.189964
2036 13:01:20.190333 MAC: 00:24:32:50:1a:5f
2037 13:01:20.190766
2038 13:01:20.192139 Sending DHCP discover... done.
2039 13:01:20.192627
2040 13:01:20.195406 Waiting for reply... done.
2041 13:01:20.195852
2042 13:01:20.198876 Sending DHCP request... done.
2043 13:01:20.199323
2044 13:01:20.202110 Waiting for reply... done.
2045 13:01:20.202555
2046 13:01:20.205482 My ip is 192.168.201.21
2047 13:01:20.205924
2048 13:01:20.208702 The DHCP server ip is 192.168.201.1
2049 13:01:20.209149
2050 13:01:20.212047 TFTP server IP predefined by user: 192.168.201.1
2051 13:01:20.212526
2052 13:01:20.218664 Bootfile predefined by user: 9730016/tftp-deploy-9_jlp3i5/kernel/bzImage
2053 13:01:20.219120
2054 13:01:20.221589 Sending tftp read request... done.
2055 13:01:20.222114
2056 13:01:20.229241 Waiting for the transfer...
2057 13:01:20.229735
2058 13:01:20.823108 00000000 ################################################################
2059 13:01:20.823351
2060 13:01:21.493519 00080000 ################################################################
2061 13:01:21.494089
2062 13:01:22.176847 00100000 ################################################################
2063 13:01:22.177397
2064 13:01:22.805557 00180000 ################################################################
2065 13:01:22.805712
2066 13:01:23.342973 00200000 ################################################################
2067 13:01:23.343121
2068 13:01:23.912498 00280000 ################################################################
2069 13:01:23.912683
2070 13:01:24.476277 00300000 ################################################################
2071 13:01:24.476476
2072 13:01:25.014293 00380000 ################################################################
2073 13:01:25.014444
2074 13:01:25.647782 00400000 ################################################################
2075 13:01:25.647937
2076 13:01:26.161058 00480000 ################################################################
2077 13:01:26.161214
2078 13:01:26.781425 00500000 ################################################################
2079 13:01:26.781584
2080 13:01:27.314253 00580000 ################################################################
2081 13:01:27.314397
2082 13:01:27.944693 00600000 ################################################################
2083 13:01:27.944856
2084 13:01:28.467731 00680000 ################################################################
2085 13:01:28.467891
2086 13:01:29.000359 00700000 ################################################################
2087 13:01:29.000532
2088 13:01:29.568183 00780000 ################################################################
2089 13:01:29.568344
2090 13:01:30.250254 00800000 ################################################################
2091 13:01:30.250838
2092 13:01:30.904671 00880000 ################################################################
2093 13:01:30.904826
2094 13:01:31.529762 00900000 ################################################################
2095 13:01:31.530304
2096 13:01:32.200049 00980000 ################################################################
2097 13:01:32.200655
2098 13:01:32.805246 00a00000 ################################################################
2099 13:01:32.805397
2100 13:01:33.471237 00a80000 ################################################################
2101 13:01:33.471935
2102 13:01:33.603589 00b00000 ############## done.
2103 13:01:33.604119
2104 13:01:33.607043 The bootfile was 11644736 bytes long.
2105 13:01:33.607521
2106 13:01:33.610380 Sending tftp read request... done.
2107 13:01:33.610980
2108 13:01:33.613670 Waiting for the transfer...
2109 13:01:33.614146
2110 13:01:34.273328 00000000 ################################################################
2111 13:01:34.273990
2112 13:01:34.902612 00080000 ################################################################
2113 13:01:34.902808
2114 13:01:35.551694 00100000 ################################################################
2115 13:01:35.551879
2116 13:01:36.194381 00180000 ################################################################
2117 13:01:36.194943
2118 13:01:36.861693 00200000 ################################################################
2119 13:01:36.862288
2120 13:01:37.482507 00280000 ################################################################
2121 13:01:37.483052
2122 13:01:38.172373 00300000 ################################################################
2123 13:01:38.172937
2124 13:01:38.746848 00380000 ################################################################
2125 13:01:38.747000
2126 13:01:39.310801 00400000 ################################################################
2127 13:01:39.310958
2128 13:01:39.975125 00480000 ################################################################
2129 13:01:39.975671
2130 13:01:40.638763 00500000 ################################################################
2131 13:01:40.639310
2132 13:01:41.270557 00580000 ################################################################
2133 13:01:41.270712
2134 13:01:41.922571 00600000 ################################################################
2135 13:01:41.922767
2136 13:01:42.602821 00680000 ################################################################
2137 13:01:42.603362
2138 13:01:43.254829 00700000 ################################################################
2139 13:01:43.254989
2140 13:01:43.913730 00780000 ################################################################
2141 13:01:43.914315
2142 13:01:44.602840 00800000 ################################################################
2143 13:01:44.603388
2144 13:01:45.018516 00880000 ####################################### done.
2145 13:01:45.019087
2146 13:01:45.021990 Sending tftp read request... done.
2147 13:01:45.022438
2148 13:01:45.025199 Waiting for the transfer...
2149 13:01:45.025696
2150 13:01:45.026082 00000000 # done.
2151 13:01:45.026461
2152 13:01:45.034942 Command line loaded dynamically from TFTP file: 9730016/tftp-deploy-9_jlp3i5/kernel/cmdline
2153 13:01:45.035552
2154 13:01:45.051211 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 13:01:45.051797
2156 13:01:45.058062 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 13:01:45.062860
2158 13:01:45.066199 Shutting down all USB controllers.
2159 13:01:45.066687
2160 13:01:45.067075 Removing current net device
2161 13:01:45.074121
2162 13:01:45.074609 Finalizing coreboot
2163 13:01:45.075003
2164 13:01:45.080736 Exiting depthcharge with code 4 at timestamp: 34863096
2165 13:01:45.081231
2166 13:01:45.081609
2167 13:01:45.081935 Starting kernel ...
2168 13:01:45.082249
2169 13:01:45.082550
2170 13:01:45.083896 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2171 13:01:45.084460 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2172 13:01:45.084854 Setting prompt string to ['Linux version [0-9]']
2173 13:01:45.085213 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 13:01:45.085574 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2176 13:06:00.086050 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2178 13:06:00.087885 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2180 13:06:00.089378 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 13:06:00.089850 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 13:06:00.090083 Cleaning after the job
2186 13:06:00.090169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/ramdisk
2187 13:06:00.090855 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/kernel
2188 13:06:00.091615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730016/tftp-deploy-9_jlp3i5/modules
2189 13:06:00.091967 start: 5.1 power-off (timeout 00:00:30) [common]
2190 13:06:00.092120 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2191 13:06:00.172441 >> Command sent successfully.
2192 13:06:00.182602 Returned 0 in 0 seconds
2193 13:06:00.284530 end: 5.1 power-off (duration 00:00:00) [common]
2195 13:06:00.286261 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 13:06:00.287510 Listened to connection for namespace 'common' for up to 1s
2198 13:06:00.289076 Listened to connection for namespace 'common' for up to 1s
2199 13:06:01.288421 Finalising connection for namespace 'common'
2200 13:06:01.288608 Disconnecting from shell: Finalise
2201 13:06:01.288709
2202 13:06:01.389478 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 13:06:01.389632 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9730016
2204 13:06:01.395438 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9730016
2205 13:06:01.395577 JobError: Your job cannot terminate cleanly.