Boot log: dell-latitude-5400-8665U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 13:43:50.836024 lava-dispatcher, installed at version: 2023.01
2 13:43:50.836240 start: 0 validate
3 13:43:50.836371 Start time: 2023-03-22 13:43:50.836365+00:00 (UTC)
4 13:43:50.836498 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:43:50.836634 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 13:43:51.137336 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:43:51.138081 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:43:51.430643 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:43:51.431372 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:43:51.724809 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:43:51.725510 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 13:43:52.024826 validate duration: 1.19
14 13:43:52.026279 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:43:52.027139 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:43:52.027767 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:43:52.028335 Not decompressing ramdisk as can be used compressed.
18 13:43:52.028795 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 13:43:52.029160 saving as /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/ramdisk/initrd.cpio.gz
20 13:43:52.029501 total size: 5432123 (5MB)
21 13:43:52.033676 progress 0% (0MB)
22 13:43:52.042128 progress 5% (0MB)
23 13:43:52.048128 progress 10% (0MB)
24 13:43:52.052470 progress 15% (0MB)
25 13:43:52.056397 progress 20% (1MB)
26 13:43:52.059271 progress 25% (1MB)
27 13:43:52.062023 progress 30% (1MB)
28 13:43:52.064673 progress 35% (1MB)
29 13:43:52.066951 progress 40% (2MB)
30 13:43:52.068978 progress 45% (2MB)
31 13:43:52.070990 progress 50% (2MB)
32 13:43:52.073049 progress 55% (2MB)
33 13:43:52.074856 progress 60% (3MB)
34 13:43:52.076687 progress 65% (3MB)
35 13:43:52.078461 progress 70% (3MB)
36 13:43:52.080055 progress 75% (3MB)
37 13:43:52.081636 progress 80% (4MB)
38 13:43:52.083062 progress 85% (4MB)
39 13:43:52.084662 progress 90% (4MB)
40 13:43:52.086088 progress 95% (4MB)
41 13:43:52.087570 progress 100% (5MB)
42 13:43:52.087786 5MB downloaded in 0.06s (88.88MB/s)
43 13:43:52.087947 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:43:52.088211 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:43:52.088308 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:43:52.088402 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:43:52.088517 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 13:43:52.088593 saving as /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/kernel/bzImage
50 13:43:52.088661 total size: 11644736 (11MB)
51 13:43:52.088767 No compression specified
52 13:43:52.089716 progress 0% (0MB)
53 13:43:52.092850 progress 5% (0MB)
54 13:43:52.096080 progress 10% (1MB)
55 13:43:52.099283 progress 15% (1MB)
56 13:43:52.102433 progress 20% (2MB)
57 13:43:52.105465 progress 25% (2MB)
58 13:43:52.108665 progress 30% (3MB)
59 13:43:52.111828 progress 35% (3MB)
60 13:43:52.114972 progress 40% (4MB)
61 13:43:52.117996 progress 45% (5MB)
62 13:43:52.121189 progress 50% (5MB)
63 13:43:52.124339 progress 55% (6MB)
64 13:43:52.127552 progress 60% (6MB)
65 13:43:52.130533 progress 65% (7MB)
66 13:43:52.133714 progress 70% (7MB)
67 13:43:52.136835 progress 75% (8MB)
68 13:43:52.139975 progress 80% (8MB)
69 13:43:52.143090 progress 85% (9MB)
70 13:43:52.146030 progress 90% (10MB)
71 13:43:52.149153 progress 95% (10MB)
72 13:43:52.152281 progress 100% (11MB)
73 13:43:52.152444 11MB downloaded in 0.06s (174.13MB/s)
74 13:43:52.152607 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:43:52.152867 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:43:52.152966 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:43:52.153067 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:43:52.153190 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 13:43:52.153266 saving as /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/nfsrootfs/full.rootfs.tar
81 13:43:52.153334 total size: 133351768 (127MB)
82 13:43:52.153402 Using unxz to decompress xz
83 13:43:52.156803 progress 0% (0MB)
84 13:43:52.529006 progress 5% (6MB)
85 13:43:52.929348 progress 10% (12MB)
86 13:43:53.237370 progress 15% (19MB)
87 13:43:53.448513 progress 20% (25MB)
88 13:43:53.727721 progress 25% (31MB)
89 13:43:54.104575 progress 30% (38MB)
90 13:43:54.493135 progress 35% (44MB)
91 13:43:54.927670 progress 40% (50MB)
92 13:43:55.352228 progress 45% (57MB)
93 13:43:55.744662 progress 50% (63MB)
94 13:43:56.157366 progress 55% (69MB)
95 13:43:56.558213 progress 60% (76MB)
96 13:43:56.960954 progress 65% (82MB)
97 13:43:57.369567 progress 70% (89MB)
98 13:43:57.773964 progress 75% (95MB)
99 13:43:58.265258 progress 80% (101MB)
100 13:43:58.750786 progress 85% (108MB)
101 13:43:59.055651 progress 90% (114MB)
102 13:43:59.436382 progress 95% (120MB)
103 13:43:59.869367 progress 100% (127MB)
104 13:43:59.875748 127MB downloaded in 7.72s (16.47MB/s)
105 13:43:59.876086 end: 1.3.1 http-download (duration 00:00:08) [common]
107 13:43:59.876412 end: 1.3 download-retry (duration 00:00:08) [common]
108 13:43:59.876533 start: 1.4 download-retry (timeout 00:09:52) [common]
109 13:43:59.876651 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 13:43:59.876797 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 13:43:59.876884 saving as /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/modules/modules.tar
112 13:43:59.876976 total size: 497904 (0MB)
113 13:43:59.877066 Using unxz to decompress xz
114 13:43:59.880309 progress 6% (0MB)
115 13:43:59.880730 progress 13% (0MB)
116 13:43:59.881001 progress 19% (0MB)
117 13:43:59.882415 progress 26% (0MB)
118 13:43:59.884649 progress 32% (0MB)
119 13:43:59.886864 progress 39% (0MB)
120 13:43:59.889076 progress 46% (0MB)
121 13:43:59.891060 progress 52% (0MB)
122 13:43:59.893372 progress 59% (0MB)
123 13:43:59.895518 progress 65% (0MB)
124 13:43:59.897602 progress 72% (0MB)
125 13:43:59.899808 progress 78% (0MB)
126 13:43:59.901959 progress 85% (0MB)
127 13:43:59.904020 progress 92% (0MB)
128 13:43:59.905949 progress 98% (0MB)
129 13:43:59.914102 0MB downloaded in 0.04s (12.79MB/s)
130 13:43:59.914432 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:43:59.914754 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:43:59.914877 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 13:43:59.915001 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 13:44:01.299407 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9730034/extract-nfsrootfs-r6xpy8v7
136 13:44:01.299624 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
137 13:44:01.299741 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 13:44:01.299888 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe
139 13:44:01.300002 makedir: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin
140 13:44:01.300094 makedir: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/tests
141 13:44:01.300181 makedir: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/results
142 13:44:01.300287 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-add-keys
143 13:44:01.300430 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-add-sources
144 13:44:01.300556 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-background-process-start
145 13:44:01.300679 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-background-process-stop
146 13:44:01.300800 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-common-functions
147 13:44:01.300919 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-echo-ipv4
148 13:44:01.301040 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-install-packages
149 13:44:01.301159 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-installed-packages
150 13:44:01.301277 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-os-build
151 13:44:01.301395 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-probe-channel
152 13:44:01.301513 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-probe-ip
153 13:44:01.301632 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-target-ip
154 13:44:01.301749 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-target-mac
155 13:44:01.301864 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-target-storage
156 13:44:01.301987 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-case
157 13:44:01.302104 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-event
158 13:44:01.302221 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-feedback
159 13:44:01.302340 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-raise
160 13:44:01.302456 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-reference
161 13:44:01.302572 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-runner
162 13:44:01.302690 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-set
163 13:44:01.302807 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-test-shell
164 13:44:01.302925 Updating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-install-packages (oe)
165 13:44:01.303047 Updating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/bin/lava-installed-packages (oe)
166 13:44:01.303207 Creating /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/environment
167 13:44:01.303305 LAVA metadata
168 13:44:01.303379 - LAVA_JOB_ID=9730034
169 13:44:01.303449 - LAVA_DISPATCHER_IP=192.168.201.1
170 13:44:01.303555 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 13:44:01.303627 skipped lava-vland-overlay
172 13:44:01.303709 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 13:44:01.303797 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 13:44:01.303864 skipped lava-multinode-overlay
175 13:44:01.303943 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 13:44:01.304029 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 13:44:01.304106 Loading test definitions
178 13:44:01.304202 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 13:44:01.304278 Using /lava-9730034 at stage 0
180 13:44:01.304542 uuid=9730034_1.5.2.3.1 testdef=None
181 13:44:01.304639 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 13:44:01.304734 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 13:44:01.305250 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 13:44:01.305498 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 13:44:01.306114 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 13:44:01.306372 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 13:44:01.306960 runner path: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/0/tests/0_dmesg test_uuid 9730034_1.5.2.3.1
190 13:44:01.307171 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 13:44:01.307425 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 13:44:01.307504 Using /lava-9730034 at stage 1
194 13:44:01.307763 uuid=9730034_1.5.2.3.5 testdef=None
195 13:44:01.307859 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 13:44:01.307955 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 13:44:01.308436 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 13:44:01.308678 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 13:44:01.309299 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 13:44:01.309555 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 13:44:01.310151 runner path: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/1/tests/1_bootrr test_uuid 9730034_1.5.2.3.5
204 13:44:01.310305 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 13:44:01.310534 Creating lava-test-runner.conf files
207 13:44:01.310603 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/0 for stage 0
208 13:44:01.310692 - 0_dmesg
209 13:44:01.310771 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9730034/lava-overlay-rlpnjkpe/lava-9730034/1 for stage 1
210 13:44:01.310861 - 1_bootrr
211 13:44:01.310961 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 13:44:01.311054 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 13:44:01.317470 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 13:44:01.317585 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 13:44:01.317683 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 13:44:01.317777 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 13:44:01.317871 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 13:44:01.431567 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 13:44:01.431964 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 13:44:01.432246 extracting modules file /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9730034/extract-nfsrootfs-r6xpy8v7
221 13:44:01.446560 extracting modules file /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9730034/extract-overlay-ramdisk-mc159twa/ramdisk
222 13:44:01.460627 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 13:44:01.460820 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
224 13:44:01.460931 [common] Applying overlay to NFS
225 13:44:01.461012 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9730034/compress-overlay-4df2j0z9/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9730034/extract-nfsrootfs-r6xpy8v7
226 13:44:01.465434 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 13:44:01.465555 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
228 13:44:01.465654 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 13:44:01.465754 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
230 13:44:01.465842 Building ramdisk /var/lib/lava/dispatcher/tmp/9730034/extract-overlay-ramdisk-mc159twa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9730034/extract-overlay-ramdisk-mc159twa/ramdisk
231 13:44:01.510310 >> 30091 blocks
232 13:44:02.107020 rename /var/lib/lava/dispatcher/tmp/9730034/extract-overlay-ramdisk-mc159twa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
233 13:44:02.107549 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 13:44:02.107686 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 13:44:02.107801 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 13:44:02.107903 No mkimage arch provided, not using FIT.
237 13:44:02.108001 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 13:44:02.108099 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 13:44:02.108208 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
240 13:44:02.108308 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 13:44:02.108391 No LXC device requested
242 13:44:02.108483 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 13:44:02.108583 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 13:44:02.108673 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 13:44:02.108748 Checking files for TFTP limit of 4294967296 bytes.
246 13:44:02.109152 end: 1 tftp-deploy (duration 00:00:10) [common]
247 13:44:02.109269 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 13:44:02.109377 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 13:44:02.109522 substitutions:
250 13:44:02.109635 - {DTB}: None
251 13:44:02.109741 - {INITRD}: 9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
252 13:44:02.109809 - {KERNEL}: 9730034/tftp-deploy-n81ubop3/kernel/bzImage
253 13:44:02.109878 - {LAVA_MAC}: None
254 13:44:02.109942 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9730034/extract-nfsrootfs-r6xpy8v7
255 13:44:02.110009 - {NFS_SERVER_IP}: 192.168.201.1
256 13:44:02.110072 - {PRESEED_CONFIG}: None
257 13:44:02.110136 - {PRESEED_LOCAL}: None
258 13:44:02.110198 - {RAMDISK}: 9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
259 13:44:02.110260 - {ROOT_PART}: None
260 13:44:02.110321 - {ROOT}: None
261 13:44:02.110382 - {SERVER_IP}: 192.168.201.1
262 13:44:02.110444 - {TEE}: None
263 13:44:02.110505 Parsed boot commands:
264 13:44:02.110565 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 13:44:02.110734 Parsed boot commands: tftpboot 192.168.201.1 9730034/tftp-deploy-n81ubop3/kernel/bzImage 9730034/tftp-deploy-n81ubop3/kernel/cmdline 9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
266 13:44:02.110834 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 13:44:02.110929 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 13:44:02.111036 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 13:44:02.111178 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 13:44:02.111256 Not connected, no need to disconnect.
271 13:44:02.111341 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 13:44:02.111430 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 13:44:02.111505 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-0'
274 13:44:02.114697 Setting prompt string to ['lava-test: # ']
275 13:44:02.115031 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 13:44:02.115173 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 13:44:02.115283 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 13:44:02.115418 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 13:44:02.115616 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
280 13:44:23.814664 >> Command sent successfully.
281 13:44:23.820651 Returned 0 in 21 seconds
282 13:44:23.921792 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
284 13:44:23.923384 end: 2.2.2 reset-device (duration 00:00:22) [common]
285 13:44:23.923948 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
286 13:44:23.924449 Setting prompt string to 'Starting depthcharge on sarien...'
287 13:44:23.924822 Changing prompt to 'Starting depthcharge on sarien...'
288 13:44:23.925217 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
289 13:44:23.926495 [Enter `^Ec?' for help]
290 13:44:23.926582
291 13:44:23.926658
292 13:44:23.926727 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
293 13:44:23.926797 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
294 13:44:23.926862 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
295 13:44:23.926926 CPU: AES supported, TXT supported, VT supported
296 13:44:23.926988 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
297 13:44:23.927051 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
298 13:44:23.927166 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
299 13:44:23.927229 VBOOT: Loading verstage.
300 13:44:23.927291 CBFS @ 1d00000 size 300000
301 13:44:23.927354 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
302 13:44:23.927416 CBFS: Locating 'fallback/verstage'
303 13:44:23.927478 CBFS: Found @ offset 10f6c0 size 1435c
304 13:44:23.927539
305 13:44:23.927599
306 13:44:23.927661 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
307 13:44:23.927723 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
308 13:44:23.927785 done! DID_VID 0x00281ae0
309 13:44:23.927846 TPM ready after 0 ms
310 13:44:23.927907 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
311 13:44:23.927969 tlcl_send_startup: Startup return code is 0
312 13:44:23.928031 TPM: setup succeeded
313 13:44:23.928093 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
314 13:44:23.928155 Checking cr50 for recovery request
315 13:44:23.928232 Phase 1
316 13:44:23.928359 FMAP: Found "FLASH" version 1.1 at 1c10000.
317 13:44:23.928464 FMAP: base = fe000000 size = 2000000 #areas = 37
318 13:44:23.928556 FMAP: area GBB found @ 1c11000 (978944 bytes)
319 13:44:23.928617 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
320 13:44:23.928679 Phase 2
321 13:44:23.928739 Phase 3
322 13:44:23.928799 FMAP: area GBB found @ 1c11000 (978944 bytes)
323 13:44:23.928861 VB2:vb2_report_dev_firmware() This is developer signed firmware
324 13:44:23.928921 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
325 13:44:23.928982 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
326 13:44:23.929043 VB2:vb2_verify_keyblock() Checking key block signature...
327 13:44:23.929104 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
328 13:44:23.929165 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
329 13:44:23.929226 VB2:vb2_verify_fw_preamble() Verifying preamble.
330 13:44:23.929286 Phase 4
331 13:44:23.929357 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
332 13:44:23.929420 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
333 13:44:23.929482 VB2:vb2_rsa_verify_digest() Digest check failed!
334 13:44:23.929542 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
335 13:44:23.929604 Saving nvdata
336 13:44:23.929665 Reboot requested (10020007)
337 13:44:23.929725 board_reset() called!
338 13:44:23.929786 full_reset() called!
339 13:44:25.758121
340 13:44:25.758713
341 13:44:25.766795 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
342 13:44:25.771075 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
343 13:44:25.775642 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
344 13:44:25.780936 CPU: AES supported, TXT supported, VT supported
345 13:44:25.784982 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
346 13:44:25.791214 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
347 13:44:25.795560 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
348 13:44:25.799546 VBOOT: Loading verstage.
349 13:44:25.801685 CBFS @ 1d00000 size 300000
350 13:44:25.808512 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
351 13:44:25.812083 CBFS: Locating 'fallback/verstage'
352 13:44:25.815531 CBFS: Found @ offset 10f6c0 size 1435c
353 13:44:25.831250
354 13:44:25.831741
355 13:44:25.838634 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
356 13:44:25.846511 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
357 13:44:25.967970 .done! DID_VID 0x00281ae0
358 13:44:25.969699 TPM ready after 0 ms
359 13:44:25.972938 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
360 13:44:26.064503 tlcl_send_startup: Startup return code is 0
361 13:44:26.066356 TPM: setup succeeded
362 13:44:26.085736 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
363 13:44:26.088561 Checking cr50 for recovery request
364 13:44:26.098915 Phase 1
365 13:44:26.103834 FMAP: Found "FLASH" version 1.1 at 1c10000.
366 13:44:26.108255 FMAP: base = fe000000 size = 2000000 #areas = 37
367 13:44:26.113160 FMAP: area GBB found @ 1c11000 (978944 bytes)
368 13:44:26.120067 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
369 13:44:26.126585 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
370 13:44:26.129131 Recovery requested (1009000e)
371 13:44:26.131381 Saving nvdata
372 13:44:26.146054 tlcl_extend: response is 0
373 13:44:26.160379 tlcl_extend: response is 0
374 13:44:26.164406 CBFS @ 1d00000 size 300000
375 13:44:26.170537 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
376 13:44:26.173766 CBFS: Locating 'fallback/romstage'
377 13:44:26.177421 CBFS: Found @ offset 80 size 15b2c
378 13:44:26.178521
379 13:44:26.179254
380 13:44:26.187216 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
381 13:44:26.192110 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
382 13:44:26.196640 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 13:44:26.200734 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
384 13:44:26.204760 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 13:44:26.208840 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
386 13:44:26.210906 TCO_STS: 0000 0004
387 13:44:26.214582 GEN_PMCON: d0015209 00002200
388 13:44:26.217699 GBLRST_CAUSE: 00000000 00000000
389 13:44:26.220271 prev_sleep_state 5
390 13:44:26.224249 Boot Count incremented to 23122
391 13:44:26.226544 CBFS @ 1d00000 size 300000
392 13:44:26.233674 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
393 13:44:26.235793 CBFS: Locating 'fspm.bin'
394 13:44:26.238932 CBFS: Found @ offset 60fc0 size 70000
395 13:44:26.244343 FMAP: Found "FLASH" version 1.1 at 1c10000.
396 13:44:26.249990 FMAP: base = fe000000 size = 2000000 #areas = 37
397 13:44:26.255770 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
398 13:44:26.260965 Probing TPM I2C: done! DID_VID 0x00281ae0
399 13:44:26.264703 Locality already claimed
400 13:44:26.267780 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
401 13:44:26.287541 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
402 13:44:26.293331 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 13:44:26.296533 MRC cache found, size 18e0
404 13:44:26.299030 bootmode is set to :2
405 13:44:44.272102 CBMEM:
406 13:44:44.275003 IMD: root @ 89fff000 254 entries.
407 13:44:44.278220 IMD: root @ 89ffec00 62 entries.
408 13:44:44.281762 External stage cache:
409 13:44:44.285195 IMD: root @ 8abff000 254 entries.
410 13:44:44.289819 IMD: root @ 8abfec00 62 entries.
411 13:44:44.295001 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
412 13:44:44.298153 creating vboot_handoff structure
413 13:44:44.320320 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
414 13:44:44.377851 tlcl_write: response is 0
415 13:44:44.398487 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
416 13:44:44.401906 MRC: TPM MRC hash updated successfully.
417 13:44:44.403758 1 DIMMs found
418 13:44:44.406202 top_of_ram = 0x8a000000
419 13:44:44.411062 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
420 13:44:44.416147 MTRR Range: Start=ff000000 End=0 (Size 1000000)
421 13:44:44.418460 CBFS @ 1d00000 size 300000
422 13:44:44.425039 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
423 13:44:44.428069 CBFS: Locating 'fallback/postcar'
424 13:44:44.432139 CBFS: Found @ offset 107000 size 41a4
425 13:44:44.438838 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
426 13:44:44.448668 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
427 13:44:44.453132 Processing 126 relocs. Offset value of 0x87cdd000
428 13:44:44.456374
429 13:44:44.456829
430 13:44:44.464687 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
431 13:44:44.468150 CBFS @ 1d00000 size 300000
432 13:44:44.473859 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
433 13:44:44.478168 CBFS: Locating 'fallback/ramstage'
434 13:44:44.482135 CBFS: Found @ offset 458c0 size 1a8a8
435 13:44:44.487531 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
436 13:44:44.516688 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
437 13:44:44.520553 Processing 3754 relocs. Offset value of 0x88e81000
438 13:44:44.526767
439 13:44:44.527425
440 13:44:44.536108 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
441 13:44:44.539661 FMAP: Found "FLASH" version 1.1 at 1c10000.
442 13:44:44.544914 FMAP: base = fe000000 size = 2000000 #areas = 37
443 13:44:44.549510 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
444 13:44:44.554293 WARNING: RO_VPD is uninitialized or empty.
445 13:44:44.558298 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
446 13:44:44.563796 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
447 13:44:44.564597 Normal boot.
448 13:44:44.571860 BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1164
449 13:44:44.573941 CBFS @ 1d00000 size 300000
450 13:44:44.579948 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
451 13:44:44.585080 CBFS: Locating 'cpu_microcode_blob.bin'
452 13:44:44.588616 CBFS: Found @ offset 15c40 size 2fc00
453 13:44:44.592193 microcode: sig=0x806ec pf=0x80 revision=0xb7
454 13:44:44.595279 Skip microcode update
455 13:44:44.598447 CBFS @ 1d00000 size 300000
456 13:44:44.604078 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
457 13:44:44.606358 CBFS: Locating 'fsps.bin'
458 13:44:44.611479 CBFS: Found @ offset d1fc0 size 35000
459 13:44:44.641176 Detected 4 core, 8 thread CPU.
460 13:44:44.642975 Setting up SMI for CPU
461 13:44:44.645609 IED base = 0x8ac00000
462 13:44:44.647811 IED size = 0x00400000
463 13:44:44.650445 Will perform SMM setup.
464 13:44:44.656193 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
465 13:44:44.663522 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
466 13:44:44.668125 Processing 16 relocs. Offset value of 0x00030000
467 13:44:44.671110 Attempting to start 7 APs
468 13:44:44.675027 Waiting for 10ms after sending INIT.
469 13:44:44.690963 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
470 13:44:44.691491 done.
471 13:44:44.694063 AP: slot 4 apic_id 3.
472 13:44:44.695382 AP: slot 1 apic_id 2.
473 13:44:44.697813 AP: slot 6 apic_id 7.
474 13:44:44.699865 AP: slot 7 apic_id 6.
475 13:44:44.703556 Waiting for 2nd SIPI to complete...done.
476 13:44:44.706897 AP: slot 5 apic_id 5.
477 13:44:44.708559 AP: slot 2 apic_id 4.
478 13:44:44.716805 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
479 13:44:44.720730 Processing 13 relocs. Offset value of 0x00038000
480 13:44:44.728200 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
481 13:44:44.731265 Installing SMM handler to 0x8a000000
482 13:44:44.739728 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
483 13:44:44.745290 Processing 867 relocs. Offset value of 0x8a010000
484 13:44:44.753100 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
485 13:44:44.757954 Processing 13 relocs. Offset value of 0x8a008000
486 13:44:44.763498 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
487 13:44:44.769424 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
488 13:44:44.775339 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
489 13:44:44.780800 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
490 13:44:44.786040 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
491 13:44:44.792416 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
492 13:44:44.798590 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
493 13:44:44.805047 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
494 13:44:44.808241 Clearing SMI status registers
495 13:44:44.809050 SMI_STS: PM1
496 13:44:44.811813 PM1_STS: WAK PWRBTN TMROF
497 13:44:44.815438 TCO_STS: BOOT SECOND_TO
498 13:44:44.817508 GPE0 STD STS: eSPI
499 13:44:44.819447 New SMBASE 0x8a000000
500 13:44:44.822462 In relocation handler: CPU 0
501 13:44:44.825914 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
502 13:44:44.831185 Writing SMRR. base = 0x8a000006, mask=0xff000800
503 13:44:44.833337 Relocation complete.
504 13:44:44.835326 New SMBASE 0x89fff400
505 13:44:44.838262 In relocation handler: CPU 3
506 13:44:44.842319 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
507 13:44:44.847902 Writing SMRR. base = 0x8a000006, mask=0xff000800
508 13:44:44.849744 Relocation complete.
509 13:44:44.852008 New SMBASE 0x89ffec00
510 13:44:44.854199 In relocation handler: CPU 5
511 13:44:44.858836 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
512 13:44:44.863337 Writing SMRR. base = 0x8a000006, mask=0xff000800
513 13:44:44.865653 Relocation complete.
514 13:44:44.868876 New SMBASE 0x89fff800
515 13:44:44.871122 In relocation handler: CPU 2
516 13:44:44.875582 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
517 13:44:44.880222 Writing SMRR. base = 0x8a000006, mask=0xff000800
518 13:44:44.882742 Relocation complete.
519 13:44:44.884801 New SMBASE 0x89ffe400
520 13:44:44.886813 In relocation handler: CPU 7
521 13:44:44.890954 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
522 13:44:44.895927 Writing SMRR. base = 0x8a000006, mask=0xff000800
523 13:44:44.897982 Relocation complete.
524 13:44:44.900606 New SMBASE 0x89ffe800
525 13:44:44.903743 In relocation handler: CPU 6
526 13:44:44.908015 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
527 13:44:44.912543 Writing SMRR. base = 0x8a000006, mask=0xff000800
528 13:44:44.914741 Relocation complete.
529 13:44:44.916405 New SMBASE 0x89fff000
530 13:44:44.920259 In relocation handler: CPU 4
531 13:44:44.924412 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
532 13:44:44.928231 Writing SMRR. base = 0x8a000006, mask=0xff000800
533 13:44:44.930339 Relocation complete.
534 13:44:44.933798 New SMBASE 0x89fffc00
535 13:44:44.937128 In relocation handler: CPU 1
536 13:44:44.940407 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
537 13:44:44.945344 Writing SMRR. base = 0x8a000006, mask=0xff000800
538 13:44:44.947191 Relocation complete.
539 13:44:44.949021 Initializing CPU #0
540 13:44:44.952397 CPU: vendor Intel device 806ec
541 13:44:44.955904 CPU: family 06, model 8e, stepping 0c
542 13:44:44.959049 Clearing out pending MCEs
543 13:44:44.962985 Setting up local APIC... apic_id: 0x00 done.
544 13:44:44.966721 Turbo is available but hidden
545 13:44:44.968989 Turbo has been enabled
546 13:44:44.970412 VMX status: enabled
547 13:44:44.974606 IA32_FEATURE_CONTROL status: locked
548 13:44:44.977192 Skip microcode update
549 13:44:44.978882 CPU #0 initialized
550 13:44:44.980502 Initializing CPU #3
551 13:44:44.983154 Initializing CPU #4
552 13:44:44.985284 Initializing CPU #1
553 13:44:44.987634 CPU: vendor Intel device 806ec
554 13:44:44.991690 CPU: family 06, model 8e, stepping 0c
555 13:44:44.994345 CPU: vendor Intel device 806ec
556 13:44:44.998345 CPU: family 06, model 8e, stepping 0c
557 13:44:45.001313 Clearing out pending MCEs
558 13:44:45.004289 Clearing out pending MCEs
559 13:44:45.007990 Setting up local APIC...Initializing CPU #5
560 13:44:45.010647 Initializing CPU #2
561 13:44:45.014373 CPU: vendor Intel device 806ec
562 13:44:45.016975 CPU: family 06, model 8e, stepping 0c
563 13:44:45.019843 CPU: vendor Intel device 806ec
564 13:44:45.023867 CPU: family 06, model 8e, stepping 0c
565 13:44:45.026799 Clearing out pending MCEs
566 13:44:45.029496 Clearing out pending MCEs
567 13:44:45.033772 Setting up local APIC...Initializing CPU #7
568 13:44:45.036286 Initializing CPU #6
569 13:44:45.039006 CPU: vendor Intel device 806ec
570 13:44:45.043155 CPU: family 06, model 8e, stepping 0c
571 13:44:45.045729 CPU: vendor Intel device 806ec
572 13:44:45.049556 CPU: family 06, model 8e, stepping 0c
573 13:44:45.052606 Clearing out pending MCEs
574 13:44:45.055032 Clearing out pending MCEs
575 13:44:45.059913 Setting up local APIC... apic_id: 0x05 done.
576 13:44:45.064830 Setting up local APIC...CPU: vendor Intel device 806ec
577 13:44:45.068544 CPU: family 06, model 8e, stepping 0c
578 13:44:45.072664 Setting up local APIC... apic_id: 0x04 done.
579 13:44:45.075028 VMX status: enabled
580 13:44:45.077336 VMX status: enabled
581 13:44:45.080322 IA32_FEATURE_CONTROL status: locked
582 13:44:45.084240 IA32_FEATURE_CONTROL status: locked
583 13:44:45.086375 Skip microcode update
584 13:44:45.088617 Skip microcode update
585 13:44:45.090894 CPU #5 initialized
586 13:44:45.093454 CPU #2 initialized
587 13:44:45.097441 Setting up local APIC... apic_id: 0x02 done.
588 13:44:45.099665 apic_id: 0x03 done.
589 13:44:45.101360 VMX status: enabled
590 13:44:45.103743 VMX status: enabled
591 13:44:45.107160 IA32_FEATURE_CONTROL status: locked
592 13:44:45.110776 IA32_FEATURE_CONTROL status: locked
593 13:44:45.113124 Skip microcode update
594 13:44:45.115296 Skip microcode update
595 13:44:45.116998 CPU #1 initialized
596 13:44:45.118710 CPU #4 initialized
597 13:44:45.121417 Clearing out pending MCEs
598 13:44:45.123156 apic_id: 0x07 done.
599 13:44:45.125309 apic_id: 0x06 done.
600 13:44:45.127818 VMX status: enabled
601 13:44:45.130109 VMX status: enabled
602 13:44:45.133386 IA32_FEATURE_CONTROL status: locked
603 13:44:45.137169 IA32_FEATURE_CONTROL status: locked
604 13:44:45.138774 Skip microcode update
605 13:44:45.141749 Skip microcode update
606 13:44:45.144142 CPU #6 initialized
607 13:44:45.145303 CPU #7 initialized
608 13:44:45.150297 Setting up local APIC... apic_id: 0x01 done.
609 13:44:45.151761 VMX status: enabled
610 13:44:45.155438 IA32_FEATURE_CONTROL status: locked
611 13:44:45.157982 Skip microcode update
612 13:44:45.160362 CPU #3 initialized
613 13:44:45.164127 bsp_do_flight_plan done after 456 msecs.
614 13:44:45.166982 CPU: frequency set to 4800 MHz
615 13:44:45.168490 Enabling SMIs.
616 13:44:45.170425 Locking SMM.
617 13:44:45.173030 CBFS @ 1d00000 size 300000
618 13:44:45.179381 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
619 13:44:45.181839 CBFS: Locating 'vbt.bin'
620 13:44:45.186741 CBFS: Found @ offset 60a40 size 4a0
621 13:44:45.190532 Found a VBT of 4608 bytes after decompression
622 13:44:45.204055 FMAP: area GBB found @ 1c11000 (978944 bytes)
623 13:44:45.236014 Detected 4 core, 8 thread CPU.
624 13:44:45.238975 Detected 4 core, 8 thread CPU.
625 13:44:45.465764 Display FSP Version Info HOB
626 13:44:45.469736 Reference Code - CPU = 7.0.5e.40
627 13:44:45.471289 uCode Version = 0.0.0.b8
628 13:44:45.474426 Display FSP Version Info HOB
629 13:44:45.478147 Reference Code - ME = 7.0.5e.40
630 13:44:45.480280 MEBx version = 0.0.0.0
631 13:44:45.483785 ME Firmware Version = Consumer SKU
632 13:44:45.486844 Display FSP Version Info HOB
633 13:44:45.490697 Reference Code - CNL PCH = 7.0.5e.40
634 13:44:45.493348 PCH-CRID Status = Disabled
635 13:44:45.497425 CNL PCH H A0 Hsio Version = 2.0.0.0
636 13:44:45.499975 CNL PCH H Ax Hsio Version = 9.0.0.0
637 13:44:45.504129 CNL PCH H Bx Hsio Version = a.0.0.0
638 13:44:45.507815 CNL PCH LP B0 Hsio Version = 7.0.0.0
639 13:44:45.511454 CNL PCH LP Bx Hsio Version = 6.0.0.0
640 13:44:45.515775 CNL PCH LP Dx Hsio Version = 7.0.0.0
641 13:44:45.517877 Display FSP Version Info HOB
642 13:44:45.523011 Reference Code - SA - System Agent = 7.0.5e.40
643 13:44:45.525957 Reference Code - MRC = 0.7.1.68
644 13:44:45.528944 SA - PCIe Version = 7.0.5e.40
645 13:44:45.530937 SA-CRID Status = Disabled
646 13:44:45.534398 SA-CRID Original Value = 0.0.0.c
647 13:44:45.537968 SA-CRID New Value = 0.0.0.c
648 13:44:45.555989 RTC Init
649 13:44:45.560662 Set power off after power failure.
650 13:44:45.562718 Disabling Deep S3
651 13:44:45.563947 Disabling Deep S3
652 13:44:45.565046 Disabling Deep S4
653 13:44:45.567343 Disabling Deep S4
654 13:44:45.569364 Disabling Deep S5
655 13:44:45.571938 Disabling Deep S5
656 13:44:45.577230 BS: BS_DEV_INIT_CHIPS times (us): entry 598706 run 384367 exit 16233
657 13:44:45.580046 Enumerating buses...
658 13:44:45.585128 Show all devs... Before device enumeration.
659 13:44:45.586912 Root Device: enabled 1
660 13:44:45.588987 CPU_CLUSTER: 0: enabled 1
661 13:44:45.591787 DOMAIN: 0000: enabled 1
662 13:44:45.593860 APIC: 00: enabled 1
663 13:44:45.595683 PCI: 00:00.0: enabled 1
664 13:44:45.598254 PCI: 00:02.0: enabled 1
665 13:44:45.600803 PCI: 00:04.0: enabled 1
666 13:44:45.604176 PCI: 00:12.0: enabled 1
667 13:44:45.606075 PCI: 00:12.5: enabled 0
668 13:44:45.608502 PCI: 00:12.6: enabled 0
669 13:44:45.610619 PCI: 00:13.0: enabled 0
670 13:44:45.613342 PCI: 00:14.0: enabled 1
671 13:44:45.616357 PCI: 00:14.1: enabled 0
672 13:44:45.617914 PCI: 00:14.3: enabled 1
673 13:44:45.620203 PCI: 00:14.5: enabled 0
674 13:44:45.622936 PCI: 00:15.0: enabled 1
675 13:44:45.625030 PCI: 00:15.1: enabled 1
676 13:44:45.627952 PCI: 00:15.2: enabled 0
677 13:44:45.630394 PCI: 00:15.3: enabled 0
678 13:44:45.632962 PCI: 00:16.0: enabled 1
679 13:44:45.634826 PCI: 00:16.1: enabled 0
680 13:44:45.637619 PCI: 00:16.2: enabled 0
681 13:44:45.639640 PCI: 00:16.3: enabled 0
682 13:44:45.641848 PCI: 00:16.4: enabled 0
683 13:44:45.644272 PCI: 00:16.5: enabled 0
684 13:44:45.646698 PCI: 00:17.0: enabled 1
685 13:44:45.649209 PCI: 00:19.0: enabled 1
686 13:44:45.652182 PCI: 00:19.1: enabled 0
687 13:44:45.653890 PCI: 00:19.2: enabled 1
688 13:44:45.657611 PCI: 00:1a.0: enabled 0
689 13:44:45.660111 PCI: 00:1c.0: enabled 1
690 13:44:45.662320 PCI: 00:1c.1: enabled 0
691 13:44:45.665193 PCI: 00:1c.2: enabled 0
692 13:44:45.666426 PCI: 00:1c.3: enabled 0
693 13:44:45.669005 PCI: 00:1c.4: enabled 0
694 13:44:45.671518 PCI: 00:1c.5: enabled 0
695 13:44:45.674116 PCI: 00:1c.6: enabled 0
696 13:44:45.675747 PCI: 00:1c.7: enabled 1
697 13:44:45.678396 PCI: 00:1d.0: enabled 1
698 13:44:45.680826 PCI: 00:1d.1: enabled 1
699 13:44:45.683312 PCI: 00:1d.2: enabled 0
700 13:44:45.686209 PCI: 00:1d.3: enabled 0
701 13:44:45.687883 PCI: 00:1d.4: enabled 1
702 13:44:45.691438 PCI: 00:1e.0: enabled 0
703 13:44:45.693011 PCI: 00:1e.1: enabled 0
704 13:44:45.695606 PCI: 00:1e.2: enabled 0
705 13:44:45.698592 PCI: 00:1e.3: enabled 0
706 13:44:45.700169 PCI: 00:1f.0: enabled 1
707 13:44:45.703227 PCI: 00:1f.1: enabled 1
708 13:44:45.705254 PCI: 00:1f.2: enabled 1
709 13:44:45.707589 PCI: 00:1f.3: enabled 1
710 13:44:45.710695 PCI: 00:1f.4: enabled 1
711 13:44:45.713331 PCI: 00:1f.5: enabled 1
712 13:44:45.715313 PCI: 00:1f.6: enabled 1
713 13:44:45.717406 USB0 port 0: enabled 1
714 13:44:45.719653 I2C: 00:10: enabled 1
715 13:44:45.722236 I2C: 00:10: enabled 1
716 13:44:45.724887 I2C: 00:34: enabled 1
717 13:44:45.725981 I2C: 00:2c: enabled 1
718 13:44:45.728723 I2C: 00:50: enabled 1
719 13:44:45.730782 PNP: 0c09.0: enabled 1
720 13:44:45.733858 USB2 port 0: enabled 1
721 13:44:45.736323 USB2 port 1: enabled 1
722 13:44:45.737965 USB2 port 2: enabled 1
723 13:44:45.740761 USB2 port 4: enabled 1
724 13:44:45.743654 USB2 port 5: enabled 1
725 13:44:45.745298 USB2 port 6: enabled 1
726 13:44:45.747626 USB2 port 7: enabled 1
727 13:44:45.749453 USB2 port 8: enabled 1
728 13:44:45.752313 USB2 port 9: enabled 1
729 13:44:45.754704 USB3 port 0: enabled 1
730 13:44:45.756961 USB3 port 1: enabled 1
731 13:44:45.759227 USB3 port 2: enabled 1
732 13:44:45.761579 USB3 port 3: enabled 1
733 13:44:45.763813 USB3 port 4: enabled 1
734 13:44:45.766117 APIC: 02: enabled 1
735 13:44:45.767453 APIC: 04: enabled 1
736 13:44:45.769809 APIC: 01: enabled 1
737 13:44:45.771710 APIC: 03: enabled 1
738 13:44:45.773974 APIC: 05: enabled 1
739 13:44:45.776303 APIC: 07: enabled 1
740 13:44:45.778623 APIC: 06: enabled 1
741 13:44:45.780087 Compare with tree...
742 13:44:45.783444 Root Device: enabled 1
743 13:44:45.785101 CPU_CLUSTER: 0: enabled 1
744 13:44:45.788632 APIC: 00: enabled 1
745 13:44:45.789788 APIC: 02: enabled 1
746 13:44:45.792056 APIC: 04: enabled 1
747 13:44:45.794268 APIC: 01: enabled 1
748 13:44:45.796434 APIC: 03: enabled 1
749 13:44:45.798938 APIC: 05: enabled 1
750 13:44:45.800936 APIC: 07: enabled 1
751 13:44:45.802530 APIC: 06: enabled 1
752 13:44:45.805773 DOMAIN: 0000: enabled 1
753 13:44:45.809698 PCI: 00:00.0: enabled 1
754 13:44:45.810941 PCI: 00:02.0: enabled 1
755 13:44:45.814200 PCI: 00:04.0: enabled 1
756 13:44:45.815942 PCI: 00:12.0: enabled 1
757 13:44:45.818970 PCI: 00:12.5: enabled 0
758 13:44:45.821527 PCI: 00:12.6: enabled 0
759 13:44:45.824061 PCI: 00:13.0: enabled 0
760 13:44:45.826432 PCI: 00:14.0: enabled 1
761 13:44:45.829456 USB0 port 0: enabled 1
762 13:44:45.832170 USB2 port 0: enabled 1
763 13:44:45.834830 USB2 port 1: enabled 1
764 13:44:45.837240 USB2 port 2: enabled 1
765 13:44:45.840190 USB2 port 4: enabled 1
766 13:44:45.842799 USB2 port 5: enabled 1
767 13:44:45.845719 USB2 port 6: enabled 1
768 13:44:45.848484 USB2 port 7: enabled 1
769 13:44:45.851212 USB2 port 8: enabled 1
770 13:44:45.854114 USB2 port 9: enabled 1
771 13:44:45.856389 USB3 port 0: enabled 1
772 13:44:45.858711 USB3 port 1: enabled 1
773 13:44:45.862115 USB3 port 2: enabled 1
774 13:44:45.865588 USB3 port 3: enabled 1
775 13:44:45.867470 USB3 port 4: enabled 1
776 13:44:45.870158 PCI: 00:14.1: enabled 0
777 13:44:45.872677 PCI: 00:14.3: enabled 1
778 13:44:45.874924 PCI: 00:14.5: enabled 0
779 13:44:45.878455 PCI: 00:15.0: enabled 1
780 13:44:45.880490 I2C: 00:10: enabled 1
781 13:44:45.883425 I2C: 00:10: enabled 1
782 13:44:45.885029 I2C: 00:34: enabled 1
783 13:44:45.888243 PCI: 00:15.1: enabled 1
784 13:44:45.890161 I2C: 00:2c: enabled 1
785 13:44:45.893536 PCI: 00:15.2: enabled 0
786 13:44:45.896354 PCI: 00:15.3: enabled 0
787 13:44:45.898540 PCI: 00:16.0: enabled 1
788 13:44:45.900776 PCI: 00:16.1: enabled 0
789 13:44:45.903699 PCI: 00:16.2: enabled 0
790 13:44:45.907286 PCI: 00:16.3: enabled 0
791 13:44:45.910590 PCI: 00:16.4: enabled 0
792 13:44:45.911699 PCI: 00:16.5: enabled 0
793 13:44:45.915041 PCI: 00:17.0: enabled 1
794 13:44:45.916845 PCI: 00:19.0: enabled 1
795 13:44:45.919777 I2C: 00:50: enabled 1
796 13:44:45.922368 PCI: 00:19.1: enabled 0
797 13:44:45.924561 PCI: 00:19.2: enabled 1
798 13:44:45.927425 PCI: 00:1a.0: enabled 0
799 13:44:45.930375 PCI: 00:1c.0: enabled 1
800 13:44:45.932143 PCI: 00:1c.1: enabled 0
801 13:44:45.936442 PCI: 00:1c.2: enabled 0
802 13:44:45.937929 PCI: 00:1c.3: enabled 0
803 13:44:45.940819 PCI: 00:1c.4: enabled 0
804 13:44:45.943337 PCI: 00:1c.5: enabled 0
805 13:44:45.945506 PCI: 00:1c.6: enabled 0
806 13:44:45.948158 PCI: 00:1c.7: enabled 1
807 13:44:45.950788 PCI: 00:1d.0: enabled 1
808 13:44:45.953279 PCI: 00:1d.1: enabled 1
809 13:44:45.956070 PCI: 00:1d.2: enabled 0
810 13:44:45.958922 PCI: 00:1d.3: enabled 0
811 13:44:45.961664 PCI: 00:1d.4: enabled 1
812 13:44:45.964684 PCI: 00:1e.0: enabled 0
813 13:44:45.966514 PCI: 00:1e.1: enabled 0
814 13:44:45.969772 PCI: 00:1e.2: enabled 0
815 13:44:45.972624 PCI: 00:1e.3: enabled 0
816 13:44:45.974070 PCI: 00:1f.0: enabled 1
817 13:44:45.977705 PNP: 0c09.0: enabled 1
818 13:44:45.979781 PCI: 00:1f.1: enabled 1
819 13:44:45.983005 PCI: 00:1f.2: enabled 1
820 13:44:45.985722 PCI: 00:1f.3: enabled 1
821 13:44:45.987983 PCI: 00:1f.4: enabled 1
822 13:44:45.990338 PCI: 00:1f.5: enabled 1
823 13:44:45.993563 PCI: 00:1f.6: enabled 1
824 13:44:45.995498 Root Device scanning...
825 13:44:45.998751 root_dev_scan_bus for Root Device
826 13:44:46.001166 CPU_CLUSTER: 0 enabled
827 13:44:46.003876 DOMAIN: 0000 enabled
828 13:44:46.006021 DOMAIN: 0000 scanning...
829 13:44:46.008959 PCI: pci_scan_bus for bus 00
830 13:44:46.012173 PCI: 00:00.0 [8086/0000] ops
831 13:44:46.016741 PCI: 00:00.0 [8086/3e34] enabled
832 13:44:46.019149 PCI: 00:02.0 [8086/0000] ops
833 13:44:46.022080 PCI: 00:02.0 [8086/3ea0] enabled
834 13:44:46.025569 PCI: 00:04.0 [8086/1903] enabled
835 13:44:46.028218 PCI: 00:08.0 [8086/1911] enabled
836 13:44:46.031604 PCI: 00:12.0 [8086/9df9] enabled
837 13:44:46.035716 PCI: 00:14.0 [8086/0000] bus ops
838 13:44:46.039050 PCI: 00:14.0 [8086/9ded] enabled
839 13:44:46.042039 PCI: 00:14.2 [8086/9def] enabled
840 13:44:46.045187 PCI: 00:14.3 [8086/9df0] enabled
841 13:44:46.048207 PCI: 00:15.0 [8086/0000] bus ops
842 13:44:46.052214 PCI: 00:15.0 [8086/9de8] enabled
843 13:44:46.055343 PCI: 00:15.1 [8086/0000] bus ops
844 13:44:46.057897 PCI: 00:15.1 [8086/9de9] enabled
845 13:44:46.063869 PCI: Static device PCI: 00:16.0 not found, disabling it.
846 13:44:46.067637 PCI: 00:17.0 [8086/0000] ops
847 13:44:46.070587 PCI: 00:17.0 [8086/9dd3] enabled
848 13:44:46.074406 PCI: 00:19.0 [8086/0000] bus ops
849 13:44:46.077496 PCI: 00:19.0 [8086/9dc5] enabled
850 13:44:46.080019 PCI: 00:19.2 [8086/0000] ops
851 13:44:46.083519 PCI: 00:19.2 [8086/9dc7] enabled
852 13:44:46.086739 PCI: 00:1c.0 [8086/0000] bus ops
853 13:44:46.089683 PCI: 00:1c.0 [8086/9dbf] enabled
854 13:44:46.095423 PCI: Static device PCI: 00:1c.7 not found, disabling it.
855 13:44:46.098994 PCI: 00:1d.0 [8086/0000] bus ops
856 13:44:46.102913 PCI: 00:1d.0 [8086/9db4] enabled
857 13:44:46.108209 PCI: Static device PCI: 00:1d.1 not found, disabling it.
858 13:44:46.114252 PCI: Static device PCI: 00:1d.4 not found, disabling it.
859 13:44:46.117117 PCI: 00:1f.0 [8086/0000] bus ops
860 13:44:46.120911 PCI: 00:1f.0 [8086/9d84] enabled
861 13:44:46.126189 PCI: Static device PCI: 00:1f.1 not found, disabling it.
862 13:44:46.131673 PCI: Static device PCI: 00:1f.2 not found, disabling it.
863 13:44:46.134213 PCI: 00:1f.3 [8086/0000] bus ops
864 13:44:46.138295 PCI: 00:1f.3 [8086/9dc8] enabled
865 13:44:46.141386 PCI: 00:1f.4 [8086/0000] bus ops
866 13:44:46.144174 PCI: 00:1f.4 [8086/9da3] enabled
867 13:44:46.147550 PCI: 00:1f.5 [8086/0000] bus ops
868 13:44:46.151994 PCI: 00:1f.5 [8086/9da4] enabled
869 13:44:46.154816 PCI: 00:1f.6 [8086/15be] enabled
870 13:44:46.158069 PCI: Leftover static devices:
871 13:44:46.160055 PCI: 00:12.5
872 13:44:46.161755 PCI: 00:12.6
873 13:44:46.162692 PCI: 00:13.0
874 13:44:46.163951 PCI: 00:14.1
875 13:44:46.165047 PCI: 00:14.5
876 13:44:46.165775 PCI: 00:15.2
877 13:44:46.166991 PCI: 00:15.3
878 13:44:46.168918 PCI: 00:16.0
879 13:44:46.170148 PCI: 00:16.1
880 13:44:46.172242 PCI: 00:16.2
881 13:44:46.172623 PCI: 00:16.3
882 13:44:46.173798 PCI: 00:16.4
883 13:44:46.175601 PCI: 00:16.5
884 13:44:46.176515 PCI: 00:19.1
885 13:44:46.177691 PCI: 00:1a.0
886 13:44:46.179890 PCI: 00:1c.1
887 13:44:46.181009 PCI: 00:1c.2
888 13:44:46.182218 PCI: 00:1c.3
889 13:44:46.184168 PCI: 00:1c.4
890 13:44:46.185220 PCI: 00:1c.5
891 13:44:46.185920 PCI: 00:1c.6
892 13:44:46.188009 PCI: 00:1c.7
893 13:44:46.189182 PCI: 00:1d.1
894 13:44:46.190524 PCI: 00:1d.2
895 13:44:46.191813 PCI: 00:1d.3
896 13:44:46.192875 PCI: 00:1d.4
897 13:44:46.194818 PCI: 00:1e.0
898 13:44:46.195922 PCI: 00:1e.1
899 13:44:46.197215 PCI: 00:1e.2
900 13:44:46.199010 PCI: 00:1e.3
901 13:44:46.200102 PCI: 00:1f.1
902 13:44:46.201762 PCI: 00:1f.2
903 13:44:46.204153 PCI: Check your devicetree.cb.
904 13:44:46.207214 PCI: 00:14.0 scanning...
905 13:44:46.211360 scan_usb_bus for PCI: 00:14.0
906 13:44:46.212141 USB0 port 0 enabled
907 13:44:46.214854 USB0 port 0 scanning...
908 13:44:46.218145 scan_usb_bus for USB0 port 0
909 13:44:46.220386 USB2 port 0 enabled
910 13:44:46.222225 USB2 port 1 enabled
911 13:44:46.223845 USB2 port 2 enabled
912 13:44:46.226164 USB2 port 4 enabled
913 13:44:46.227867 USB2 port 5 enabled
914 13:44:46.230690 USB2 port 6 enabled
915 13:44:46.232507 USB2 port 7 enabled
916 13:44:46.234711 USB2 port 8 enabled
917 13:44:46.236755 USB2 port 9 enabled
918 13:44:46.238390 USB3 port 0 enabled
919 13:44:46.240837 USB3 port 1 enabled
920 13:44:46.242779 USB3 port 2 enabled
921 13:44:46.245415 USB3 port 3 enabled
922 13:44:46.246169 USB3 port 4 enabled
923 13:44:46.248781 USB2 port 0 scanning...
924 13:44:46.252396 scan_usb_bus for USB2 port 0
925 13:44:46.256576 scan_usb_bus for USB2 port 0 done
926 13:44:46.260790 scan_bus: scanning of bus USB2 port 0 took 9062 usecs
927 13:44:46.263787 USB2 port 1 scanning...
928 13:44:46.266215 scan_usb_bus for USB2 port 1
929 13:44:46.270020 scan_usb_bus for USB2 port 1 done
930 13:44:46.275052 scan_bus: scanning of bus USB2 port 1 took 9059 usecs
931 13:44:46.278345 USB2 port 2 scanning...
932 13:44:46.281579 scan_usb_bus for USB2 port 2
933 13:44:46.285388 scan_usb_bus for USB2 port 2 done
934 13:44:46.290188 scan_bus: scanning of bus USB2 port 2 took 9058 usecs
935 13:44:46.292361 USB2 port 4 scanning...
936 13:44:46.295491 scan_usb_bus for USB2 port 4
937 13:44:46.299164 scan_usb_bus for USB2 port 4 done
938 13:44:46.304469 scan_bus: scanning of bus USB2 port 4 took 9052 usecs
939 13:44:46.306220 USB2 port 5 scanning...
940 13:44:46.310380 scan_usb_bus for USB2 port 5
941 13:44:46.313354 scan_usb_bus for USB2 port 5 done
942 13:44:46.318546 scan_bus: scanning of bus USB2 port 5 took 9061 usecs
943 13:44:46.321233 USB2 port 6 scanning...
944 13:44:46.324651 scan_usb_bus for USB2 port 6
945 13:44:46.328096 scan_usb_bus for USB2 port 6 done
946 13:44:46.332665 scan_bus: scanning of bus USB2 port 6 took 9059 usecs
947 13:44:46.334969 USB2 port 7 scanning...
948 13:44:46.338963 scan_usb_bus for USB2 port 7
949 13:44:46.342000 scan_usb_bus for USB2 port 7 done
950 13:44:46.347235 scan_bus: scanning of bus USB2 port 7 took 9058 usecs
951 13:44:46.349785 USB2 port 8 scanning...
952 13:44:46.352742 scan_usb_bus for USB2 port 8
953 13:44:46.356610 scan_usb_bus for USB2 port 8 done
954 13:44:46.362173 scan_bus: scanning of bus USB2 port 8 took 9060 usecs
955 13:44:46.364377 USB2 port 9 scanning...
956 13:44:46.367583 scan_usb_bus for USB2 port 9
957 13:44:46.371174 scan_usb_bus for USB2 port 9 done
958 13:44:46.376468 scan_bus: scanning of bus USB2 port 9 took 9054 usecs
959 13:44:46.378994 USB3 port 0 scanning...
960 13:44:46.381853 scan_usb_bus for USB3 port 0
961 13:44:46.385453 scan_usb_bus for USB3 port 0 done
962 13:44:46.391095 scan_bus: scanning of bus USB3 port 0 took 9048 usecs
963 13:44:46.392777 USB3 port 1 scanning...
964 13:44:46.396404 scan_usb_bus for USB3 port 1
965 13:44:46.399539 scan_usb_bus for USB3 port 1 done
966 13:44:46.404576 scan_bus: scanning of bus USB3 port 1 took 9060 usecs
967 13:44:46.407778 USB3 port 2 scanning...
968 13:44:46.410179 scan_usb_bus for USB3 port 2
969 13:44:46.414304 scan_usb_bus for USB3 port 2 done
970 13:44:46.419536 scan_bus: scanning of bus USB3 port 2 took 9053 usecs
971 13:44:46.421772 USB3 port 3 scanning...
972 13:44:46.425508 scan_usb_bus for USB3 port 3
973 13:44:46.428890 scan_usb_bus for USB3 port 3 done
974 13:44:46.434098 scan_bus: scanning of bus USB3 port 3 took 9058 usecs
975 13:44:46.437442 USB3 port 4 scanning...
976 13:44:46.439228 scan_usb_bus for USB3 port 4
977 13:44:46.442841 scan_usb_bus for USB3 port 4 done
978 13:44:46.447755 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
979 13:44:46.451143 scan_usb_bus for USB0 port 0 done
980 13:44:46.456934 scan_bus: scanning of bus USB0 port 0 took 239254 usecs
981 13:44:46.461292 scan_usb_bus for PCI: 00:14.0 done
982 13:44:46.466030 scan_bus: scanning of bus PCI: 00:14.0 took 256187 usecs
983 13:44:46.468743 PCI: 00:15.0 scanning...
984 13:44:46.472149 scan_generic_bus for PCI: 00:15.0
985 13:44:46.476507 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
986 13:44:46.481028 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
987 13:44:46.484812 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
988 13:44:46.488423 scan_generic_bus for PCI: 00:15.0 done
989 13:44:46.495034 scan_bus: scanning of bus PCI: 00:15.0 took 22381 usecs
990 13:44:46.496902 PCI: 00:15.1 scanning...
991 13:44:46.500538 scan_generic_bus for PCI: 00:15.1
992 13:44:46.504101 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
993 13:44:46.508109 scan_generic_bus for PCI: 00:15.1 done
994 13:44:46.513974 scan_bus: scanning of bus PCI: 00:15.1 took 14214 usecs
995 13:44:46.516749 PCI: 00:19.0 scanning...
996 13:44:46.520936 scan_generic_bus for PCI: 00:19.0
997 13:44:46.524341 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
998 13:44:46.528025 scan_generic_bus for PCI: 00:19.0 done
999 13:44:46.533830 scan_bus: scanning of bus PCI: 00:19.0 took 14212 usecs
1000 13:44:46.537214 PCI: 00:1c.0 scanning...
1001 13:44:46.539871 do_pci_scan_bridge for PCI: 00:1c.0
1002 13:44:46.543314 PCI: pci_scan_bus for bus 01
1003 13:44:46.546949 PCI: 01:00.0 [10ec/525a] enabled
1004 13:44:46.549785 Capability: type 0x01 @ 0x80
1005 13:44:46.552433 Capability: type 0x05 @ 0x90
1006 13:44:46.555893 Capability: type 0x10 @ 0xb0
1007 13:44:46.558043 Capability: type 0x10 @ 0x40
1008 13:44:46.562326 Enabling Common Clock Configuration
1009 13:44:46.566547 L1 Sub-State supported from root port 28
1010 13:44:46.569002 L1 Sub-State Support = 0xf
1011 13:44:46.571392 CommonModeRestoreTime = 0x3c
1012 13:44:46.576068 Power On Value = 0x6, Power On Scale = 0x1
1013 13:44:46.579039 ASPM: Enabled L0s and L1
1014 13:44:46.581358 Capability: type 0x01 @ 0x80
1015 13:44:46.584603 Capability: type 0x05 @ 0x90
1016 13:44:46.587566 Capability: type 0x10 @ 0xb0
1017 13:44:46.593295 scan_bus: scanning of bus PCI: 00:1c.0 took 53647 usecs
1018 13:44:46.595913 PCI: 00:1d.0 scanning...
1019 13:44:46.599240 do_pci_scan_bridge for PCI: 00:1d.0
1020 13:44:46.602268 PCI: pci_scan_bus for bus 02
1021 13:44:46.605745 PCI: 02:00.0 [1217/8620] enabled
1022 13:44:46.608456 Capability: type 0x01 @ 0x6c
1023 13:44:46.611554 Capability: type 0x05 @ 0x48
1024 13:44:46.615339 Capability: type 0x10 @ 0x80
1025 13:44:46.617580 Capability: type 0x10 @ 0x40
1026 13:44:46.622075 L1 Sub-State supported from root port 29
1027 13:44:46.624086 L1 Sub-State Support = 0xf
1028 13:44:46.627498 CommonModeRestoreTime = 0x78
1029 13:44:46.632970 Power On Value = 0x16, Power On Scale = 0x0
1030 13:44:46.634452 ASPM: Enabled L1
1031 13:44:46.637665 Capability: type 0x01 @ 0x6c
1032 13:44:46.643574 Capability: type 0x05 @ 0x48
1033 13:44:46.647194 Capability: type 0x10 @ 0x80
1034 13:44:46.655068 scan_bus: scanning of bus PCI: 00:1d.0 took 56026 usecs
1035 13:44:46.657044 PCI: 00:1f.0 scanning...
1036 13:44:46.660399 scan_lpc_bus for PCI: 00:1f.0
1037 13:44:46.662227 PNP: 0c09.0 enabled
1038 13:44:46.665591 scan_lpc_bus for PCI: 00:1f.0 done
1039 13:44:46.671214 scan_bus: scanning of bus PCI: 00:1f.0 took 11399 usecs
1040 13:44:46.673970 PCI: 00:1f.3 scanning...
1041 13:44:46.679285 scan_bus: scanning of bus PCI: 00:1f.3 took 2842 usecs
1042 13:44:46.681799 PCI: 00:1f.4 scanning...
1043 13:44:46.686340 scan_generic_bus for PCI: 00:1f.4
1044 13:44:46.689743 scan_generic_bus for PCI: 00:1f.4 done
1045 13:44:46.695783 scan_bus: scanning of bus PCI: 00:1f.4 took 10132 usecs
1046 13:44:46.698303 PCI: 00:1f.5 scanning...
1047 13:44:46.702473 scan_generic_bus for PCI: 00:1f.5
1048 13:44:46.706005 scan_generic_bus for PCI: 00:1f.5 done
1049 13:44:46.711441 scan_bus: scanning of bus PCI: 00:1f.5 took 10134 usecs
1050 13:44:46.717203 scan_bus: scanning of bus DOMAIN: 0000 took 707507 usecs
1051 13:44:46.721403 root_dev_scan_bus for Root Device done
1052 13:44:46.726199 scan_bus: scanning of bus Root Device took 727648 usecs
1053 13:44:46.727284 done
1054 13:44:46.733377 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1055 13:44:46.739069 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 13:44:46.747149 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1057 13:44:46.752620 MRC: cache data 'RECOVERY_MRC_CACHE' needs update.
1058 13:44:46.769949 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1059 13:44:46.773746 ELOG: NV offset 0x1bf0000 size 0x4000
1060 13:44:46.781097 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1061 13:44:46.788100 ELOG: Event(17) added with size 13 at 2023-03-22 13:44:45 UTC
1062 13:44:46.793704 POST: Unexpected post code in previous boot: 0x92
1063 13:44:46.799606 ELOG: Event(A3) added with size 11 at 2023-03-22 13:44:45 UTC
1064 13:44:46.805425 ELOG: Event(AA) added with size 11 at 2023-03-22 13:44:45 UTC
1065 13:44:46.810870 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1066 13:44:46.815323 SPI flash protection: WPSW=0 SRP0=0
1067 13:44:46.819544 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 13:44:46.826298 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1149473 exit 86890
1069 13:44:46.829228 found VGA at PCI: 00:02.0
1070 13:44:46.832221 Setting up VGA for PCI: 00:02.0
1071 13:44:46.837364 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 13:44:46.842175 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 13:44:46.844515 Allocating resources...
1074 13:44:46.846722 Reading resources...
1075 13:44:46.850495 Root Device read_resources bus 0 link: 0
1076 13:44:46.855376 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 13:44:46.860265 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 13:44:46.865651 DOMAIN: 0000 read_resources bus 0 link: 0
1079 13:44:46.871323 PCI: 00:14.0 read_resources bus 0 link: 0
1080 13:44:46.875493 USB0 port 0 read_resources bus 0 link: 0
1081 13:44:46.885561 USB0 port 0 read_resources bus 0 link: 0 done
1082 13:44:46.890264 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 13:44:46.895402 PCI: 00:15.0 read_resources bus 1 link: 0
1084 13:44:46.901434 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 13:44:46.906070 PCI: 00:15.1 read_resources bus 2 link: 0
1086 13:44:46.911474 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 13:44:46.916194 PCI: 00:19.0 read_resources bus 3 link: 0
1088 13:44:46.921074 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 13:44:46.926238 PCI: 00:1c.0 read_resources bus 1 link: 0
1090 13:44:46.931699 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1091 13:44:46.935770 PCI: 00:1d.0 read_resources bus 2 link: 0
1092 13:44:46.942876 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1093 13:44:46.947135 PCI: 00:1f.0 read_resources bus 0 link: 0
1094 13:44:46.953178 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1095 13:44:46.960109 DOMAIN: 0000 read_resources bus 0 link: 0 done
1096 13:44:46.964466 Root Device read_resources bus 0 link: 0 done
1097 13:44:46.967173 Done reading resources.
1098 13:44:46.972662 Show resources in subtree (Root Device)...After reading.
1099 13:44:46.976124 Root Device child on link 0 CPU_CLUSTER: 0
1100 13:44:46.981132 CPU_CLUSTER: 0 child on link 0 APIC: 00
1101 13:44:46.982862 APIC: 00
1102 13:44:46.983743 APIC: 02
1103 13:44:46.984908 APIC: 04
1104 13:44:46.986345 APIC: 01
1105 13:44:46.987141 APIC: 03
1106 13:44:46.988135 APIC: 05
1107 13:44:46.989858 APIC: 07
1108 13:44:46.990728 APIC: 06
1109 13:44:46.995702 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1110 13:44:47.004792 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1111 13:44:47.014311 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1112 13:44:47.015771 PCI: 00:00.0
1113 13:44:47.025264 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1114 13:44:47.034773 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1115 13:44:47.044396 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1116 13:44:47.053907 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1117 13:44:47.062698 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1118 13:44:47.072170 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1119 13:44:47.082442 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1120 13:44:47.090557 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1121 13:44:47.099787 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1122 13:44:47.109678 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1123 13:44:47.119309 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1124 13:44:47.128882 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1125 13:44:47.138620 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1126 13:44:47.147836 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1127 13:44:47.149065 PCI: 00:02.0
1128 13:44:47.159055 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1129 13:44:47.169601 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1130 13:44:47.178585 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1131 13:44:47.179796 PCI: 00:04.0
1132 13:44:47.189236 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1133 13:44:47.191048 PCI: 00:08.0
1134 13:44:47.201593 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 13:44:47.202688 PCI: 00:12.0
1136 13:44:47.212831 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 13:44:47.217984 PCI: 00:14.0 child on link 0 USB0 port 0
1138 13:44:47.226836 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 13:44:47.231814 USB0 port 0 child on link 0 USB2 port 0
1140 13:44:47.232594 USB2 port 0
1141 13:44:47.234990 USB2 port 1
1142 13:44:47.236943 USB2 port 2
1143 13:44:47.238685 USB2 port 4
1144 13:44:47.240177 USB2 port 5
1145 13:44:47.242179 USB2 port 6
1146 13:44:47.243308 USB2 port 7
1147 13:44:47.245235 USB2 port 8
1148 13:44:47.247404 USB2 port 9
1149 13:44:47.249544 USB3 port 0
1150 13:44:47.250395 USB3 port 1
1151 13:44:47.252924 USB3 port 2
1152 13:44:47.254191 USB3 port 3
1153 13:44:47.256226 USB3 port 4
1154 13:44:47.257454 PCI: 00:14.2
1155 13:44:47.266817 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 13:44:47.277699 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 13:44:47.279814 PCI: 00:14.3
1158 13:44:47.288981 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 13:44:47.294128 PCI: 00:15.0 child on link 0 I2C: 01:10
1160 13:44:47.303251 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 13:44:47.304227 I2C: 01:10
1162 13:44:47.305591 I2C: 01:10
1163 13:44:47.307472 I2C: 01:34
1164 13:44:47.313057 PCI: 00:15.1 child on link 0 I2C: 02:2c
1165 13:44:47.321887 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 13:44:47.323433 I2C: 02:2c
1167 13:44:47.324857 PCI: 00:17.0
1168 13:44:47.334075 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1169 13:44:47.343330 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1170 13:44:47.351848 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1171 13:44:47.359744 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1172 13:44:47.368400 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1173 13:44:47.377606 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1174 13:44:47.381279 PCI: 00:19.0 child on link 0 I2C: 03:50
1175 13:44:47.391793 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 13:44:47.401208 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 13:44:47.403016 I2C: 03:50
1178 13:44:47.404100 PCI: 00:19.2
1179 13:44:47.415771 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1180 13:44:47.425912 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1181 13:44:47.429936 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1182 13:44:47.438174 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1183 13:44:47.449020 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1184 13:44:47.457018 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1185 13:44:47.458672 PCI: 01:00.0
1186 13:44:47.467787 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1187 13:44:47.472816 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1188 13:44:47.481630 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1189 13:44:47.491659 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1190 13:44:47.500099 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1191 13:44:47.502287 PCI: 02:00.0
1192 13:44:47.511509 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1193 13:44:47.520886 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1194 13:44:47.524943 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1195 13:44:47.533376 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1196 13:44:47.542981 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1197 13:44:47.543516 PNP: 0c09.0
1198 13:44:47.553140 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1199 13:44:47.561271 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1200 13:44:47.570926 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1201 13:44:47.571215 PCI: 00:1f.3
1202 13:44:47.581056 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 13:44:47.591693 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1204 13:44:47.593040 PCI: 00:1f.4
1205 13:44:47.601674 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1206 13:44:47.612197 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1207 13:44:47.613194 PCI: 00:1f.5
1208 13:44:47.622789 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1209 13:44:47.624803 PCI: 00:1f.6
1210 13:44:47.633407 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1211 13:44:47.639809 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 13:44:47.645749 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 13:44:47.653067 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 13:44:47.658999 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1215 13:44:47.666288 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1216 13:44:47.670216 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1217 13:44:47.673102 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1218 13:44:47.677754 PCI: 00:17.0 18 * [0x60 - 0x67] io
1219 13:44:47.681162 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1220 13:44:47.687638 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1221 13:44:47.695062 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1222 13:44:47.702557 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1223 13:44:47.711693 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1224 13:44:47.717536 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1225 13:44:47.721332 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1226 13:44:47.728886 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1227 13:44:47.737029 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 13:44:47.745636 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 13:44:47.752281 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 13:44:47.756513 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1231 13:44:47.759811 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1232 13:44:47.768339 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1233 13:44:47.772462 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1234 13:44:47.777805 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1235 13:44:47.781900 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1236 13:44:47.787320 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1237 13:44:47.792116 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1238 13:44:47.796372 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1239 13:44:47.801897 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1240 13:44:47.806890 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1241 13:44:47.812135 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1242 13:44:47.816812 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1243 13:44:47.820961 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1244 13:44:47.826360 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1245 13:44:47.831247 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1246 13:44:47.835682 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1247 13:44:47.840943 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1248 13:44:47.845040 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1249 13:44:47.849985 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1250 13:44:47.854890 PCI: 00:19.0 10 * [0x11349000 - 0x11349fff] mem
1251 13:44:47.859779 PCI: 00:19.0 18 * [0x1134a000 - 0x1134afff] mem
1252 13:44:47.865339 PCI: 00:19.2 18 * [0x1134b000 - 0x1134bfff] mem
1253 13:44:47.870456 PCI: 00:1f.5 10 * [0x1134c000 - 0x1134cfff] mem
1254 13:44:47.876096 PCI: 00:17.0 24 * [0x1134d000 - 0x1134d7ff] mem
1255 13:44:47.879350 PCI: 00:17.0 14 * [0x1134e000 - 0x1134e0ff] mem
1256 13:44:47.884368 PCI: 00:1f.4 10 * [0x1134f000 - 0x1134f0ff] mem
1257 13:44:47.893130 DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done
1258 13:44:47.896713 avoid_fixed_resources: DOMAIN: 0000
1259 13:44:47.902232 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1260 13:44:47.908139 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1261 13:44:47.915405 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1262 13:44:47.923940 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1263 13:44:47.931711 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1264 13:44:47.939500 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1265 13:44:47.946468 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1266 13:44:47.954807 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1267 13:44:47.961952 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1268 13:44:47.969117 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1269 13:44:47.977121 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1270 13:44:47.984198 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1271 13:44:47.987046 Setting resources...
1272 13:44:47.992386 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1273 13:44:47.996977 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1274 13:44:48.000370 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1275 13:44:48.004190 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1276 13:44:48.009135 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1277 13:44:48.015170 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1278 13:44:48.021021 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1279 13:44:48.027625 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1280 13:44:48.034131 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1281 13:44:48.040201 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1282 13:44:48.047480 DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff
1283 13:44:48.052960 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1284 13:44:48.057729 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1285 13:44:48.062741 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1286 13:44:48.068223 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1287 13:44:48.072249 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1288 13:44:48.077442 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1289 13:44:48.082203 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1290 13:44:48.086642 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1291 13:44:48.092500 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1292 13:44:48.096829 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1293 13:44:48.101839 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1294 13:44:48.106506 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1295 13:44:48.111595 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1296 13:44:48.116241 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1297 13:44:48.121272 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1298 13:44:48.125646 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1299 13:44:48.130623 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1300 13:44:48.135214 PCI: 00:19.0 10 * [0xd1349000 - 0xd1349fff] mem
1301 13:44:48.140441 PCI: 00:19.0 18 * [0xd134a000 - 0xd134afff] mem
1302 13:44:48.145159 PCI: 00:19.2 18 * [0xd134b000 - 0xd134bfff] mem
1303 13:44:48.150105 PCI: 00:1f.5 10 * [0xd134c000 - 0xd134cfff] mem
1304 13:44:48.155178 PCI: 00:17.0 24 * [0xd134d000 - 0xd134d7ff] mem
1305 13:44:48.160473 PCI: 00:17.0 14 * [0xd134e000 - 0xd134e0ff] mem
1306 13:44:48.164928 PCI: 00:1f.4 10 * [0xd134f000 - 0xd134f0ff] mem
1307 13:44:48.171693 DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done
1308 13:44:48.178834 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1309 13:44:48.186716 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1310 13:44:48.194452 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1311 13:44:48.199123 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1312 13:44:48.207251 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1313 13:44:48.214129 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1314 13:44:48.221434 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1315 13:44:48.228056 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1316 13:44:48.233519 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1317 13:44:48.237955 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1318 13:44:48.245629 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1319 13:44:48.249770 Root Device assign_resources, bus 0 link: 0
1320 13:44:48.254996 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 13:44:48.262909 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1322 13:44:48.272116 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1323 13:44:48.279583 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1324 13:44:48.288482 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1325 13:44:48.295549 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1326 13:44:48.304017 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1327 13:44:48.313159 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1328 13:44:48.316910 PCI: 00:14.0 assign_resources, bus 0 link: 0
1329 13:44:48.321596 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 13:44:48.330051 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1331 13:44:48.337986 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1332 13:44:48.346641 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1333 13:44:48.354698 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1334 13:44:48.359525 PCI: 00:15.0 assign_resources, bus 1 link: 0
1335 13:44:48.364300 PCI: 00:15.0 assign_resources, bus 1 link: 0
1336 13:44:48.372951 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1337 13:44:48.377135 PCI: 00:15.1 assign_resources, bus 2 link: 0
1338 13:44:48.382136 PCI: 00:15.1 assign_resources, bus 2 link: 0
1339 13:44:48.389500 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1340 13:44:48.397428 PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem
1341 13:44:48.404762 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1342 13:44:48.413130 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1343 13:44:48.420962 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1344 13:44:48.428063 PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem
1345 13:44:48.436067 PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1346 13:44:48.444274 PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1347 13:44:48.449436 PCI: 00:19.0 assign_resources, bus 3 link: 0
1348 13:44:48.454219 PCI: 00:19.0 assign_resources, bus 3 link: 0
1349 13:44:48.462101 PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1350 13:44:48.470567 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1351 13:44:48.479260 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1352 13:44:48.488109 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1353 13:44:48.492636 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1354 13:44:48.500668 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1355 13:44:48.505856 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1356 13:44:48.514531 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1357 13:44:48.522754 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1358 13:44:48.532240 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1359 13:44:48.536954 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1360 13:44:48.545408 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1361 13:44:48.555681 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1362 13:44:48.562002 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1363 13:44:48.566021 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1364 13:44:48.571807 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 13:44:48.576512 LPC: Trying to open IO window from 930 size 8
1366 13:44:48.581568 LPC: Trying to open IO window from 940 size 8
1367 13:44:48.585149 LPC: Trying to open IO window from 950 size 10
1368 13:44:48.593793 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1369 13:44:48.601370 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1370 13:44:48.609525 PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64
1371 13:44:48.617850 PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem
1372 13:44:48.626092 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1373 13:44:48.630800 DOMAIN: 0000 assign_resources, bus 0 link: 0
1374 13:44:48.636127 Root Device assign_resources, bus 0 link: 0
1375 13:44:48.637734 Done setting resources.
1376 13:44:48.644570 Show resources in subtree (Root Device)...After assigning values.
1377 13:44:48.648727 Root Device child on link 0 CPU_CLUSTER: 0
1378 13:44:48.652830 CPU_CLUSTER: 0 child on link 0 APIC: 00
1379 13:44:48.653755 APIC: 00
1380 13:44:48.655856 APIC: 02
1381 13:44:48.656924 APIC: 04
1382 13:44:48.658320 APIC: 01
1383 13:44:48.659696 APIC: 03
1384 13:44:48.661033 APIC: 05
1385 13:44:48.661909 APIC: 07
1386 13:44:48.663705 APIC: 06
1387 13:44:48.668247 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1388 13:44:48.677679 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1389 13:44:48.688206 DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1390 13:44:48.689634 PCI: 00:00.0
1391 13:44:48.699605 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1392 13:44:48.709282 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1393 13:44:48.718240 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1394 13:44:48.727740 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1395 13:44:48.737212 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1396 13:44:48.747215 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1397 13:44:48.755741 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1398 13:44:48.765022 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1399 13:44:48.773457 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1400 13:44:48.784185 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1401 13:44:48.793321 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1402 13:44:48.803545 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1403 13:44:48.812418 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1404 13:44:48.821166 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1405 13:44:48.823293 PCI: 00:02.0
1406 13:44:48.833185 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 13:44:48.844299 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 13:44:48.853630 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 13:44:48.855815 PCI: 00:04.0
1410 13:44:48.865247 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1411 13:44:48.867458 PCI: 00:08.0
1412 13:44:48.877178 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1413 13:44:48.878842 PCI: 00:12.0
1414 13:44:48.889664 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1415 13:44:48.893970 PCI: 00:14.0 child on link 0 USB0 port 0
1416 13:44:48.904030 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1417 13:44:48.908759 USB0 port 0 child on link 0 USB2 port 0
1418 13:44:48.910153 USB2 port 0
1419 13:44:48.912035 USB2 port 1
1420 13:44:48.913353 USB2 port 2
1421 13:44:48.915405 USB2 port 4
1422 13:44:48.917303 USB2 port 5
1423 13:44:48.919006 USB2 port 6
1424 13:44:48.921536 USB2 port 7
1425 13:44:48.922296 USB2 port 8
1426 13:44:48.923655 USB2 port 9
1427 13:44:48.925857 USB3 port 0
1428 13:44:48.927841 USB3 port 1
1429 13:44:48.929500 USB3 port 2
1430 13:44:48.931062 USB3 port 3
1431 13:44:48.932510 USB3 port 4
1432 13:44:48.934799 PCI: 00:14.2
1433 13:44:48.945011 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1434 13:44:48.955406 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1435 13:44:48.956644 PCI: 00:14.3
1436 13:44:48.966987 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1437 13:44:48.971536 PCI: 00:15.0 child on link 0 I2C: 01:10
1438 13:44:48.981992 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1439 13:44:48.982787 I2C: 01:10
1440 13:44:48.984928 I2C: 01:10
1441 13:44:48.986384 I2C: 01:34
1442 13:44:48.990620 PCI: 00:15.1 child on link 0 I2C: 02:2c
1443 13:44:49.000647 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1444 13:44:49.003187 I2C: 02:2c
1445 13:44:49.003983 PCI: 00:17.0
1446 13:44:49.014727 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1447 13:44:49.024425 PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14
1448 13:44:49.033949 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1449 13:44:49.042502 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1450 13:44:49.052125 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1451 13:44:49.062580 PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24
1452 13:44:49.066489 PCI: 00:19.0 child on link 0 I2C: 03:50
1453 13:44:49.077185 PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1454 13:44:49.087381 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18
1455 13:44:49.088534 I2C: 03:50
1456 13:44:49.089697 PCI: 00:19.2
1457 13:44:49.100993 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 13:44:49.112036 PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1459 13:44:49.115999 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1460 13:44:49.125351 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1461 13:44:49.135132 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1462 13:44:49.145195 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1463 13:44:49.147389 PCI: 01:00.0
1464 13:44:49.158246 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1465 13:44:49.162400 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1466 13:44:49.172200 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1467 13:44:49.181641 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1468 13:44:49.191694 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1469 13:44:49.194617 PCI: 02:00.0
1470 13:44:49.205081 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1471 13:44:49.214710 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1472 13:44:49.219168 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 13:44:49.227559 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 13:44:49.237130 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 13:44:49.238473 PNP: 0c09.0
1476 13:44:49.246902 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1477 13:44:49.254769 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1478 13:44:49.264158 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1479 13:44:49.266334 PCI: 00:1f.3
1480 13:44:49.276044 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1481 13:44:49.286711 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1482 13:44:49.288153 PCI: 00:1f.4
1483 13:44:49.296852 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1484 13:44:49.307298 PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10
1485 13:44:49.308320 PCI: 00:1f.5
1486 13:44:49.318603 PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10
1487 13:44:49.320574 PCI: 00:1f.6
1488 13:44:49.331002 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1489 13:44:49.333814 Done allocating resources.
1490 13:44:49.339717 BS: BS_DEV_RESOURCES times (us): entry 0 run 2507882 exit 14
1491 13:44:49.343899 Enabling resources...
1492 13:44:49.347765 PCI: 00:00.0 subsystem <- 1028/3e34
1493 13:44:49.349251 PCI: 00:00.0 cmd <- 06
1494 13:44:49.353626 PCI: 00:02.0 subsystem <- 1028/3ea0
1495 13:44:49.355703 PCI: 00:02.0 cmd <- 03
1496 13:44:49.360841 PCI: 00:04.0 subsystem <- 1028/1903
1497 13:44:49.362645 PCI: 00:04.0 cmd <- 02
1498 13:44:49.365061 PCI: 00:08.0 cmd <- 06
1499 13:44:49.368548 PCI: 00:12.0 subsystem <- 1028/9df9
1500 13:44:49.371350 PCI: 00:12.0 cmd <- 02
1501 13:44:49.375428 PCI: 00:14.0 subsystem <- 1028/9ded
1502 13:44:49.377000 PCI: 00:14.0 cmd <- 02
1503 13:44:49.380207 PCI: 00:14.2 cmd <- 02
1504 13:44:49.384105 PCI: 00:14.3 subsystem <- 1028/9df0
1505 13:44:49.385872 PCI: 00:14.3 cmd <- 02
1506 13:44:49.390299 PCI: 00:15.0 subsystem <- 1028/9de8
1507 13:44:49.392622 PCI: 00:15.0 cmd <- 02
1508 13:44:49.396769 PCI: 00:15.1 subsystem <- 1028/9de9
1509 13:44:49.399637 PCI: 00:15.1 cmd <- 02
1510 13:44:49.402466 PCI: 00:17.0 subsystem <- 1028/9dd3
1511 13:44:49.405096 PCI: 00:17.0 cmd <- 03
1512 13:44:49.408684 PCI: 00:19.0 subsystem <- 1028/9dc5
1513 13:44:49.411223 PCI: 00:19.0 cmd <- 06
1514 13:44:49.414581 PCI: 00:19.2 subsystem <- 1028/9dc7
1515 13:44:49.417240 PCI: 00:19.2 cmd <- 06
1516 13:44:49.421806 PCI: 00:1c.0 bridge ctrl <- 0003
1517 13:44:49.424888 PCI: 00:1c.0 subsystem <- 1028/9dbf
1518 13:44:49.427994 Capability: type 0x10 @ 0x40
1519 13:44:49.430895 Capability: type 0x05 @ 0x80
1520 13:44:49.433665 Capability: type 0x0d @ 0x90
1521 13:44:49.435627 PCI: 00:1c.0 cmd <- 06
1522 13:44:49.439178 PCI: 00:1d.0 bridge ctrl <- 0003
1523 13:44:49.443341 PCI: 00:1d.0 subsystem <- 1028/9db4
1524 13:44:49.445930 Capability: type 0x10 @ 0x40
1525 13:44:49.448854 Capability: type 0x05 @ 0x80
1526 13:44:49.451540 Capability: type 0x0d @ 0x90
1527 13:44:49.454129 PCI: 00:1d.0 cmd <- 06
1528 13:44:49.457679 PCI: 00:1f.0 subsystem <- 1028/9d84
1529 13:44:49.459852 PCI: 00:1f.0 cmd <- 407
1530 13:44:49.465056 PCI: 00:1f.3 subsystem <- 1028/9dc8
1531 13:44:49.466458 PCI: 00:1f.3 cmd <- 02
1532 13:44:49.471449 PCI: 00:1f.4 subsystem <- 1028/9da3
1533 13:44:49.474091 PCI: 00:1f.4 cmd <- 03
1534 13:44:49.477629 PCI: 00:1f.5 subsystem <- 1028/9da4
1535 13:44:49.479274 PCI: 00:1f.5 cmd <- 406
1536 13:44:49.483472 PCI: 00:1f.6 subsystem <- 1028/15be
1537 13:44:49.485258 PCI: 00:1f.6 cmd <- 02
1538 13:44:49.496248 PCI: 01:00.0 cmd <- 02
1539 13:44:49.500873 PCI: 02:00.0 cmd <- 06
1540 13:44:49.505310 done.
1541 13:44:49.510408 BS: BS_DEV_ENABLE times (us): entry 393 run 164190 exit 0
1542 13:44:49.512537 Initializing devices...
1543 13:44:49.515461 Root Device init ...
1544 13:44:49.518834 Root Device init finished in 2139 usecs
1545 13:44:49.521855 CPU_CLUSTER: 0 init ...
1546 13:44:49.525550 CPU_CLUSTER: 0 init finished in 2430 usecs
1547 13:44:49.532934 PCI: 00:00.0 init ...
1548 13:44:49.535556 CPU TDP: 15 Watts
1549 13:44:49.537630 CPU PL2 = 51 Watts
1550 13:44:49.541267 PCI: 00:00.0 init finished in 7028 usecs
1551 13:44:49.544007 PCI: 00:02.0 init ...
1552 13:44:49.548366 PCI: 00:02.0 init finished in 2235 usecs
1553 13:44:49.550627 PCI: 00:04.0 init ...
1554 13:44:49.554366 PCI: 00:04.0 init finished in 2235 usecs
1555 13:44:49.557417 PCI: 00:08.0 init ...
1556 13:44:49.561581 PCI: 00:08.0 init finished in 2235 usecs
1557 13:44:49.564382 PCI: 00:12.0 init ...
1558 13:44:49.567741 PCI: 00:12.0 init finished in 2236 usecs
1559 13:44:49.570874 PCI: 00:14.0 init ...
1560 13:44:49.574758 PCI: 00:14.0 init finished in 2235 usecs
1561 13:44:49.577002 PCI: 00:14.2 init ...
1562 13:44:49.581199 PCI: 00:14.2 init finished in 2235 usecs
1563 13:44:49.584227 PCI: 00:14.3 init ...
1564 13:44:49.588010 PCI: 00:14.3 init finished in 2240 usecs
1565 13:44:49.590990 PCI: 00:15.0 init ...
1566 13:44:49.595040 DW I2C bus 0 at 0xd1347000 (400 KHz)
1567 13:44:49.599215 PCI: 00:15.0 init finished in 5981 usecs
1568 13:44:49.601657 PCI: 00:15.1 init ...
1569 13:44:49.605254 DW I2C bus 1 at 0xd1348000 (400 KHz)
1570 13:44:49.609355 PCI: 00:15.1 init finished in 5935 usecs
1571 13:44:49.612240 PCI: 00:19.0 init ...
1572 13:44:49.616560 DW I2C bus 4 at 0xd1349000 (400 KHz)
1573 13:44:49.619557 PCI: 00:19.0 init finished in 5933 usecs
1574 13:44:49.622559 PCI: 00:1c.0 init ...
1575 13:44:49.626388 Initializing PCH PCIe bridge.
1576 13:44:49.629722 PCI: 00:1c.0 init finished in 5247 usecs
1577 13:44:49.632749 PCI: 00:1d.0 init ...
1578 13:44:49.635652 Initializing PCH PCIe bridge.
1579 13:44:49.640226 PCI: 00:1d.0 init finished in 5249 usecs
1580 13:44:49.642880 PCI: 00:1f.0 init ...
1581 13:44:49.646682 IOAPIC: Initializing IOAPIC at 0xfec00000
1582 13:44:49.650963 IOAPIC: Bootstrap Processor Local APIC = 0x00
1583 13:44:49.653192 IOAPIC: ID = 0x02
1584 13:44:49.656817 IOAPIC: Dumping registers
1585 13:44:49.658383 reg 0x0000: 0x02000000
1586 13:44:49.660356 reg 0x0001: 0x00770020
1587 13:44:49.663139 reg 0x0002: 0x00000000
1588 13:44:49.668976 PCI: 00:1f.0 init finished in 25019 usecs
1589 13:44:49.671675 PCI: 00:1f.3 init ...
1590 13:44:49.677307 HDA: codec_mask = 05
1591 13:44:49.679660 HDA: Initializing codec #2
1592 13:44:49.682432 HDA: codec viddid: 8086280b
1593 13:44:49.685589 HDA: No verb table entry found
1594 13:44:49.688974 HDA: Initializing codec #0
1595 13:44:49.691421 HDA: codec viddid: 10ec0236
1596 13:44:49.698802 HDA: verb loaded.
1597 13:44:49.702627 PCI: 00:1f.3 init finished in 28834 usecs
1598 13:44:49.705298 PCI: 00:1f.4 init ...
1599 13:44:49.709603 PCI: 00:1f.4 init finished in 2246 usecs
1600 13:44:49.712752 PCI: 00:1f.6 init ...
1601 13:44:49.716762 PCI: 00:1f.6 init finished in 2235 usecs
1602 13:44:49.727676 PCI: 01:00.0 init ...
1603 13:44:49.731711 PCI: 01:00.0 init finished in 2236 usecs
1604 13:44:49.734869 PCI: 02:00.0 init ...
1605 13:44:49.738569 PCI: 02:00.0 init finished in 2235 usecs
1606 13:44:49.740432 PNP: 0c09.0 init ...
1607 13:44:49.744359 EC Label : 00.00.20
1608 13:44:49.749142 EC Revision : 9ca674bba
1609 13:44:49.752136 EC Model Num : 08B9
1610 13:44:49.755237 EC Build Date : 05/10/19
1611 13:44:49.765175 PNP: 0c09.0 init finished in 21760 usecs
1612 13:44:49.767397 Devices initialized
1613 13:44:49.769343 Show all devs... After init.
1614 13:44:49.773147 Root Device: enabled 1
1615 13:44:49.775197 CPU_CLUSTER: 0: enabled 1
1616 13:44:49.777995 DOMAIN: 0000: enabled 1
1617 13:44:49.779079 APIC: 00: enabled 1
1618 13:44:49.781810 PCI: 00:00.0: enabled 1
1619 13:44:49.783850 PCI: 00:02.0: enabled 1
1620 13:44:49.786300 PCI: 00:04.0: enabled 1
1621 13:44:49.789454 PCI: 00:12.0: enabled 1
1622 13:44:49.792284 PCI: 00:12.5: enabled 0
1623 13:44:49.793578 PCI: 00:12.6: enabled 0
1624 13:44:49.796394 PCI: 00:13.0: enabled 0
1625 13:44:49.799162 PCI: 00:14.0: enabled 1
1626 13:44:49.801265 PCI: 00:14.1: enabled 0
1627 13:44:49.803552 PCI: 00:14.3: enabled 1
1628 13:44:49.805530 PCI: 00:14.5: enabled 0
1629 13:44:49.809191 PCI: 00:15.0: enabled 1
1630 13:44:49.811079 PCI: 00:15.1: enabled 1
1631 13:44:49.812974 PCI: 00:15.2: enabled 0
1632 13:44:49.816598 PCI: 00:15.3: enabled 0
1633 13:44:49.818219 PCI: 00:16.0: enabled 0
1634 13:44:49.820590 PCI: 00:16.1: enabled 0
1635 13:44:49.822647 PCI: 00:16.2: enabled 0
1636 13:44:49.824910 PCI: 00:16.3: enabled 0
1637 13:44:49.827681 PCI: 00:16.4: enabled 0
1638 13:44:49.830498 PCI: 00:16.5: enabled 0
1639 13:44:49.832749 PCI: 00:17.0: enabled 1
1640 13:44:49.834899 PCI: 00:19.0: enabled 1
1641 13:44:49.837896 PCI: 00:19.1: enabled 0
1642 13:44:49.839989 PCI: 00:19.2: enabled 1
1643 13:44:49.842224 PCI: 00:1a.0: enabled 0
1644 13:44:49.844592 PCI: 00:1c.0: enabled 1
1645 13:44:49.846610 PCI: 00:1c.1: enabled 0
1646 13:44:49.849303 PCI: 00:1c.2: enabled 0
1647 13:44:49.851736 PCI: 00:1c.3: enabled 0
1648 13:44:49.854982 PCI: 00:1c.4: enabled 0
1649 13:44:49.857040 PCI: 00:1c.5: enabled 0
1650 13:44:49.859317 PCI: 00:1c.6: enabled 0
1651 13:44:49.861507 PCI: 00:1c.7: enabled 0
1652 13:44:49.864495 PCI: 00:1d.0: enabled 1
1653 13:44:49.867485 PCI: 00:1d.1: enabled 0
1654 13:44:49.868822 PCI: 00:1d.2: enabled 0
1655 13:44:49.871391 PCI: 00:1d.3: enabled 0
1656 13:44:49.873429 PCI: 00:1d.4: enabled 0
1657 13:44:49.876507 PCI: 00:1e.0: enabled 0
1658 13:44:49.878873 PCI: 00:1e.1: enabled 0
1659 13:44:49.880493 PCI: 00:1e.2: enabled 0
1660 13:44:49.883261 PCI: 00:1e.3: enabled 0
1661 13:44:49.885543 PCI: 00:1f.0: enabled 1
1662 13:44:49.889193 PCI: 00:1f.1: enabled 0
1663 13:44:49.891292 PCI: 00:1f.2: enabled 0
1664 13:44:49.893319 PCI: 00:1f.3: enabled 1
1665 13:44:49.895127 PCI: 00:1f.4: enabled 1
1666 13:44:49.897958 PCI: 00:1f.5: enabled 1
1667 13:44:49.900915 PCI: 00:1f.6: enabled 1
1668 13:44:49.903569 USB0 port 0: enabled 1
1669 13:44:49.905111 I2C: 01:10: enabled 1
1670 13:44:49.907293 I2C: 01:10: enabled 1
1671 13:44:49.909773 I2C: 01:34: enabled 1
1672 13:44:49.911426 I2C: 02:2c: enabled 1
1673 13:44:49.913582 I2C: 03:50: enabled 1
1674 13:44:49.916492 PNP: 0c09.0: enabled 1
1675 13:44:49.919281 USB2 port 0: enabled 1
1676 13:44:49.920802 USB2 port 1: enabled 1
1677 13:44:49.923695 USB2 port 2: enabled 1
1678 13:44:49.926011 USB2 port 4: enabled 1
1679 13:44:49.927700 USB2 port 5: enabled 1
1680 13:44:49.930530 USB2 port 6: enabled 1
1681 13:44:49.932783 USB2 port 7: enabled 1
1682 13:44:49.934525 USB2 port 8: enabled 1
1683 13:44:49.937271 USB2 port 9: enabled 1
1684 13:44:49.939653 USB3 port 0: enabled 1
1685 13:44:49.942250 USB3 port 1: enabled 1
1686 13:44:49.944877 USB3 port 2: enabled 1
1687 13:44:49.947309 USB3 port 3: enabled 1
1688 13:44:49.949578 USB3 port 4: enabled 1
1689 13:44:49.951697 APIC: 02: enabled 1
1690 13:44:49.953209 APIC: 04: enabled 1
1691 13:44:49.955550 APIC: 01: enabled 1
1692 13:44:49.957932 APIC: 03: enabled 1
1693 13:44:49.960028 APIC: 05: enabled 1
1694 13:44:49.961568 APIC: 07: enabled 1
1695 13:44:49.963682 APIC: 06: enabled 1
1696 13:44:49.965862 PCI: 00:08.0: enabled 1
1697 13:44:49.968773 PCI: 00:14.2: enabled 1
1698 13:44:49.971062 PCI: 01:00.0: enabled 1
1699 13:44:49.973723 PCI: 02:00.0: enabled 1
1700 13:44:49.979168 Disabling ACPI via APMC:
1701 13:44:49.980321 done.
1702 13:44:49.986929 ELOG: Event(92) added with size 9 at 2023-03-22 13:44:49 UTC
1703 13:44:49.993035 ELOG: Event(93) added with size 9 at 2023-03-22 13:44:49 UTC
1704 13:44:49.999405 ELOG: Event(9A) added with size 9 at 2023-03-22 13:44:49 UTC
1705 13:44:50.005156 ELOG: Event(9E) added with size 10 at 2023-03-22 13:44:49 UTC
1706 13:44:50.011232 ELOG: Event(9F) added with size 14 at 2023-03-22 13:44:49 UTC
1707 13:44:50.017587 BS: BS_DEV_INIT times (us): entry 0 run 462910 exit 38345
1708 13:44:50.024341 ELOG: Event(A1) added with size 10 at 2023-03-22 13:44:49 UTC
1709 13:44:50.031780 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1710 13:44:50.038303 ELOG: Event(A0) added with size 9 at 2023-03-22 13:44:49 UTC
1711 13:44:50.042713 elog_add_boot_reason: Logged dev mode boot
1712 13:44:50.044386 Finalize devices...
1713 13:44:50.046547 PCI: 00:17.0 final
1714 13:44:50.048932 Devices finalized
1715 13:44:50.054598 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1716 13:44:50.059330 BS: BS_POST_DEVICE times (us): entry 24775 run 5924 exit 5366
1717 13:44:50.065029 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1718 13:44:50.073708 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1719 13:44:50.078149 disable_unused_touchscreen: Disable ACPI0C50
1720 13:44:50.083125 disable_unused_touchscreen: Enable ELAN900C
1721 13:44:50.085005 CBFS @ 1d00000 size 300000
1722 13:44:50.091389 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1723 13:44:50.094985 CBFS: Locating 'fallback/dsdt.aml'
1724 13:44:50.099719 CBFS: Found @ offset 10b200 size 4448
1725 13:44:50.102195 CBFS @ 1d00000 size 300000
1726 13:44:50.109229 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1727 13:44:50.111299 CBFS: Locating 'fallback/slic'
1728 13:44:50.117443 CBFS: 'fallback/slic' not found.
1729 13:44:50.120753 ACPI: Writing ACPI tables at 89c0f000.
1730 13:44:50.122482 ACPI: * FACS
1731 13:44:50.123609 ACPI: * DSDT
1732 13:44:50.128475 Ramoops buffer: 0x100000@0x89b0e000.
1733 13:44:50.132926 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1734 13:44:50.137708 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1735 13:44:50.141211 ACPI: * FADT
1736 13:44:50.142294 SCI is IRQ9
1737 13:44:50.146431 ACPI: added table 1/32, length now 40
1738 13:44:50.147818 ACPI: * SSDT
1739 13:44:50.150669 Found 1 CPU(s) with 8 core(s) each.
1740 13:44:50.155659 Error: Could not locate 'wifi_sar' in VPD.
1741 13:44:50.160365 Error: failed from getting SAR limits!
1742 13:44:50.163899 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1743 13:44:50.168066 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1744 13:44:50.171991 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1745 13:44:50.176052 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1746 13:44:50.181468 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1747 13:44:50.185833 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1748 13:44:50.191590 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1749 13:44:50.195385 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1750 13:44:50.201570 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1751 13:44:50.207021 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1752 13:44:50.213043 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1753 13:44:50.218987 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1754 13:44:50.223933 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1755 13:44:50.227918 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1756 13:44:50.232690 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1757 13:44:50.237874 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1758 13:44:50.243638 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 13:44:50.248903 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 13:44:50.255181 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1761 13:44:50.259941 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 13:44:50.265869 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1763 13:44:50.270991 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1764 13:44:50.274870 ACPI: added table 2/32, length now 44
1765 13:44:50.276637 ACPI: * MCFG
1766 13:44:50.279848 ACPI: added table 3/32, length now 48
1767 13:44:50.282314 ACPI: * TPM2
1768 13:44:50.285284 TPM2 log created at 89afe000
1769 13:44:50.288487 ACPI: added table 4/32, length now 52
1770 13:44:50.290449 ACPI: * MADT
1771 13:44:50.291154 SCI is IRQ9
1772 13:44:50.295332 ACPI: added table 5/32, length now 56
1773 13:44:50.297391 current = 89c14bd0
1774 13:44:50.299432 ACPI: * IGD OpRegion
1775 13:44:50.302624 GMA: Found VBT in CBFS
1776 13:44:50.304635 GMA: Found valid VBT in CBFS
1777 13:44:50.308743 ACPI: added table 6/32, length now 60
1778 13:44:50.310099 ACPI: * HPET
1779 13:44:50.313666 ACPI: added table 7/32, length now 64
1780 13:44:50.315742 ACPI: done.
1781 13:44:50.317766 ACPI tables: 31872 bytes.
1782 13:44:50.320978 smbios_write_tables: 89afd000
1783 13:44:50.322667 recv_ec_data: 0x01
1784 13:44:50.325377 Create SMBIOS type 17
1785 13:44:50.328193 PCI: 00:14.3 (Intel WiFi)
1786 13:44:50.330770 SMBIOS tables: 708 bytes.
1787 13:44:50.334875 Writing table forward entry at 0x00000500
1788 13:44:50.341074 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1789 13:44:50.344341 Writing coreboot table at 0x89c33000
1790 13:44:50.350201 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 13:44:50.354930 1. 0000000000001000-000000000009ffff: RAM
1792 13:44:50.359230 2. 00000000000a0000-00000000000fffff: RESERVED
1793 13:44:50.363597 3. 0000000000100000-0000000089afcfff: RAM
1794 13:44:50.369932 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1795 13:44:50.375043 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1796 13:44:50.380665 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1797 13:44:50.385922 7. 000000008a000000-000000008f7fffff: RESERVED
1798 13:44:50.389791 8. 00000000e0000000-00000000efffffff: RESERVED
1799 13:44:50.394871 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 13:44:50.399297 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 13:44:50.404158 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 13:44:50.409189 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 13:44:50.414009 13. 00000000feda0000-00000000feda1fff: RESERVED
1804 13:44:50.417785 14. 0000000100000000-000000026e7fffff: RAM
1805 13:44:50.422622 Graphics framebuffer located at 0xc0000000
1806 13:44:50.425314 Passing 6 GPIOs to payload:
1807 13:44:50.430641 NAME | PORT | POLARITY | VALUE
1808 13:44:50.435574 write protect | 0x000000dc | high | low
1809 13:44:50.440816 recovery | 0x000000d5 | low | high
1810 13:44:50.446368 lid | undefined | high | high
1811 13:44:50.451853 power | undefined | high | low
1812 13:44:50.456505 oprom | undefined | high | low
1813 13:44:50.462029 EC in RW | undefined | high | low
1814 13:44:50.465538 recv_ec_data: 0x01
1815 13:44:50.466169 SKU ID: 3
1816 13:44:50.468674 CBFS @ 1d00000 size 300000
1817 13:44:50.475101 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1818 13:44:50.480675 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 9691
1819 13:44:50.482855 coreboot table: 1484 bytes.
1820 13:44:50.487007 IMD ROOT 0. 89fff000 00001000
1821 13:44:50.490407 IMD SMALL 1. 89ffe000 00001000
1822 13:44:50.492959 FSP MEMORY 2. 89d0e000 002f0000
1823 13:44:50.497465 CONSOLE 3. 89cee000 00020000
1824 13:44:50.500481 TIME STAMP 4. 89ced000 00000910
1825 13:44:50.503492 VBOOT WORK 5. 89cea000 00003000
1826 13:44:50.506937 VBOOT 6. 89ce9000 00000c0c
1827 13:44:50.509775 MRC DATA 7. 89ce7000 000018f0
1828 13:44:50.513596 ROMSTG STCK 8. 89ce6000 00000400
1829 13:44:50.516452 AFTER CAR 9. 89cdc000 0000a000
1830 13:44:50.520462 RAMSTAGE 10. 89c80000 0005c000
1831 13:44:50.524279 REFCODE 11. 89c4b000 00035000
1832 13:44:50.526393 SMM BACKUP 12. 89c3b000 00010000
1833 13:44:50.529640 COREBOOT 13. 89c33000 00008000
1834 13:44:50.532920 ACPI 14. 89c0f000 00024000
1835 13:44:50.536580 ACPI GNVS 15. 89c0e000 00001000
1836 13:44:50.539678 RAMOOPS 16. 89b0e000 00100000
1837 13:44:50.543240 TPM2 TCGLOG17. 89afe000 00010000
1838 13:44:50.546235 SMBIOS 18. 89afd000 00000800
1839 13:44:50.548353 IMD small region:
1840 13:44:50.551721 IMD ROOT 0. 89ffec00 00000400
1841 13:44:50.555846 FSP RUNTIME 1. 89ffebe0 00000004
1842 13:44:50.558508 POWER STATE 2. 89ffeba0 00000040
1843 13:44:50.562458 ROMSTAGE 3. 89ffeb80 00000004
1844 13:44:50.566134 MEM INFO 4. 89ffe9c0 000001a9
1845 13:44:50.569573 VPD 5. 89ffe980 00000031
1846 13:44:50.573251 COREBOOTFWD 6. 89ffe940 00000028
1847 13:44:50.576679 MTRR: Physical address space:
1848 13:44:50.581870 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 13:44:50.588749 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 13:44:50.594869 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1851 13:44:50.601448 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1852 13:44:50.607330 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 13:44:50.613611 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 13:44:50.620520 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1855 13:44:50.623663 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 13:44:50.627493 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 13:44:50.632078 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 13:44:50.635648 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 13:44:50.641070 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 13:44:50.644150 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 13:44:50.648290 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 13:44:50.651640 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 13:44:50.656177 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 13:44:50.660462 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 13:44:50.664079 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 13:44:50.667268 call enable_fixed_mtrr()
1867 13:44:50.671823 CPU physical address size: 39 bits
1868 13:44:50.675780 MTRR: default type WB/UC MTRR counts: 7/7.
1869 13:44:50.679552 MTRR: UC selected as default type.
1870 13:44:50.685623 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1871 13:44:50.692644 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1872 13:44:50.697144 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1873 13:44:50.704179 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1874 13:44:50.710572 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 13:44:50.716033 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1876 13:44:50.722744 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1877 13:44:50.724097
1878 13:44:50.725714 MTRR check
1879 13:44:50.727312 Fixed MTRRs : Enabled
1880 13:44:50.729655 Variable MTRRs: Enabled
1881 13:44:50.730096
1882 13:44:50.734122 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 13:44:50.738162 MTRR: Fixed MSR 0x258 0x0606060606060606
1884 13:44:50.742765 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 13:44:50.746152 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 13:44:50.750124 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 13:44:50.754314 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 13:44:50.758334 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 13:44:50.762109 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 13:44:50.766076 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 13:44:50.770279 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 13:44:50.775436 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 13:44:50.781401 BS: BS_WRITE_TABLES times (us): entry 17194 run 490202 exit 157180
1894 13:44:50.784001 call enable_fixed_mtrr()
1895 13:44:50.787368 CBFS @ 1d00000 size 300000
1896 13:44:50.794013 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1897 13:44:50.797185 CPU physical address size: 39 bits
1898 13:44:50.800133 CBFS: Locating 'fallback/payload'
1899 13:44:50.804724 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 13:44:50.809312 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 13:44:50.813307 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 13:44:50.817333 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 13:44:50.820400 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 13:44:50.825428 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 13:44:50.829295 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 13:44:50.833703 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 13:44:50.837363 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 13:44:50.842476 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 13:44:50.845465 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 13:44:50.849833 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 13:44:50.854562 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 13:44:50.856359 call enable_fixed_mtrr()
1913 13:44:50.860706 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 13:44:50.864988 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 13:44:50.869696 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 13:44:50.873106 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 13:44:50.877152 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 13:44:50.880357 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 13:44:50.884921 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 13:44:50.888737 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 13:44:50.893001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 13:44:50.897919 CPU physical address size: 39 bits
1923 13:44:50.900259 call enable_fixed_mtrr()
1924 13:44:50.903980 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 13:44:50.908137 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 13:44:50.912038 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 13:44:50.917571 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 13:44:50.920329 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 13:44:50.924022 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 13:44:50.929841 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 13:44:50.933014 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 13:44:50.936640 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 13:44:50.941113 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 13:44:50.945399 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 13:44:50.949888 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 13:44:50.953490 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 13:44:50.955935 call enable_fixed_mtrr()
1938 13:44:50.960318 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 13:44:50.964077 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 13:44:50.967979 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 13:44:50.972907 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 13:44:50.976412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 13:44:50.980653 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 13:44:50.983958 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 13:44:50.988802 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 13:44:50.993032 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 13:44:50.996493 CPU physical address size: 39 bits
1948 13:44:50.999706 call enable_fixed_mtrr()
1949 13:44:51.002512 CPU physical address size: 39 bits
1950 13:44:51.007197 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 13:44:51.011055 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 13:44:51.015192 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 13:44:51.020316 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 13:44:51.023522 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 13:44:51.028180 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 13:44:51.031605 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 13:44:51.035612 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 13:44:51.039824 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 13:44:51.043965 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 13:44:51.048545 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 13:44:51.051538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 13:44:51.055895 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:44:51.060039 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:44:51.064171 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:44:51.068788 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:44:51.073225 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:44:51.077097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:44:51.080918 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:44:51.084935 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:44:51.089431 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:44:51.093655 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:44:51.096743 call enable_fixed_mtrr()
1973 13:44:51.098658 call enable_fixed_mtrr()
1974 13:44:51.102072 CPU physical address size: 39 bits
1975 13:44:51.105310 CPU physical address size: 39 bits
1976 13:44:51.108760 CPU physical address size: 39 bits
1977 13:44:51.113373 CBFS: Found @ offset 1cf4c0 size 3a954
1978 13:44:51.118092 Checking segment from ROM address 0xffecf4f8
1979 13:44:51.122368 Checking segment from ROM address 0xffecf514
1980 13:44:51.126686 Loading segment from ROM address 0xffecf4f8
1981 13:44:51.129292 code (compression=0)
1982 13:44:51.136834 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1983 13:44:51.146292 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1984 13:44:51.148673 it's not compressed!
1985 13:44:51.229315 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1986 13:44:51.236332 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1987 13:44:51.244733 Loading segment from ROM address 0xffecf514
1988 13:44:51.247428 Entry Point 0x30100018
1989 13:44:51.249702 Loaded segments
1990 13:44:51.253873 Finalizing chipset.
1991 13:44:51.254652 Finalizing SMM.
1992 13:44:51.261576 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467061 exit 5990
1993 13:44:51.265389 mp_park_aps done after 0 msecs.
1994 13:44:51.268099 Jumping to boot code at 30100018(89c33000)
1995 13:44:51.277723 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1996 13:44:51.278207
1997 13:44:51.278692
1998 13:44:51.279142
1999 13:44:51.281245 Starting depthcharge on sarien...
2000 13:44:51.281702
2001 13:44:51.283700 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
2002 13:44:51.284326 start: 2.2.4 bootloader-commands (timeout 00:04:11) [common]
2003 13:44:51.284867 Setting prompt string to ['sarien:']
2004 13:44:51.285374 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:11)
2005 13:44:51.288923 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 13:44:51.289528
2007 13:44:51.295452 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 13:44:51.296220
2009 13:44:51.304205 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2010 13:44:51.304691
2011 13:44:51.305625 BIOS MMAP details:
2012 13:44:51.305997
2013 13:44:51.308567 IFD Base Offset : 0x1000000
2014 13:44:51.309318
2015 13:44:51.312218 IFD End Offset : 0x2000000
2016 13:44:51.312669
2017 13:44:51.314253 MMAP Size : 0x1000000
2018 13:44:51.314669
2019 13:44:51.317390 MMAP Start : 0xff000000
2020 13:44:51.318153
2021 13:44:51.323993 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2022 13:44:51.328872
2023 13:44:51.332950 New NVMe Controller 0x3214e128 @ 00:1d:04
2024 13:44:51.333718
2025 13:44:51.337441 New NVMe Controller 0x3214e1f0 @ 00:1d:00
2026 13:44:51.338211
2027 13:44:51.342989 The GBB signature is at 0x30000014 and is: 24 47 42 42
2028 13:44:51.346887
2029 13:44:51.348979 Wipe memory regions:
2030 13:44:51.349738
2031 13:44:51.352281 [0x00000000001000, 0x000000000a0000)
2032 13:44:51.352730
2033 13:44:51.356957 [0x00000000100000, 0x00000030000000)
2034 13:44:51.439323
2035 13:44:51.442659 [0x00000032751910, 0x00000089afd000)
2036 13:44:51.592249
2037 13:44:51.595874 [0x00000100000000, 0x0000026e800000)
2038 13:44:52.607335
2039 13:44:52.608802 R8152: Initializing
2040 13:44:52.609309
2041 13:44:52.611467 Version 6 (ocp_data = 5c30)
2042 13:44:52.612695
2043 13:44:52.615262 R8152: Done initializing
2044 13:44:52.615749
2045 13:44:52.617537 Adding net device
2046 13:44:52.618124
2047 13:44:52.623164 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2048 13:44:52.623595
2049 13:44:52.624254
2050 13:44:52.624620
2051 13:44:52.625323 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 13:44:52.726966 sarien: tftpboot 192.168.201.1 9730034/tftp-deploy-n81ubop3/kernel/bzImage 9730034/tftp-deploy-n81ubop3/kernel/cmdline 9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
2054 13:44:52.727632 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 13:44:52.728051 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:09)
2056 13:44:52.731105 tftpboot 192.168.201.1 9730034/tftp-deploy-n81ubop3/kernel/bzImage 9730034/tftp-deploy-n81ubop3/kernel/cmdline 9730034/tftp-deploy-n81ubop3/ramdisk/ramdisk.cpio.gz
2057 13:44:52.731587
2058 13:44:52.732602 Waiting for link
2059 13:44:52.931688
2060 13:44:52.932738 done.
2061 13:44:52.933214
2062 13:44:52.934823 MAC: 00:24:32:30:7b:ce
2063 13:44:52.935403
2064 13:44:52.937124 Sending DHCP discover... done.
2065 13:44:52.938065
2066 13:44:52.940277 Waiting for reply... done.
2067 13:44:52.940759
2068 13:44:52.944093 Sending DHCP request... done.
2069 13:44:52.944885
2070 13:44:52.950097 Waiting for reply... done.
2071 13:44:52.950568
2072 13:44:52.952427 My ip is 192.168.201.162
2073 13:44:52.952856
2074 13:44:52.956149 The DHCP server ip is 192.168.201.1
2075 13:44:52.956601
2076 13:44:52.961519 TFTP server IP predefined by user: 192.168.201.1
2077 13:44:52.961958
2078 13:44:52.968725 Bootfile predefined by user: 9730034/tftp-deploy-n81ubop3/kernel/bzImage
2079 13:44:52.969511
2080 13:44:52.972050 Sending tftp read request... done.
2081 13:44:52.972632
2082 13:44:52.976473 Waiting for the transfer...
2083 13:44:52.977342
2084 13:44:53.645870 00000000 ################################################################
2085 13:44:53.646444
2086 13:44:54.317439 00080000 ################################################################
2087 13:44:54.318373
2088 13:44:54.985330 00100000 ################################################################
2089 13:44:54.986299
2090 13:44:55.670750 00180000 ################################################################
2091 13:44:55.671398
2092 13:44:56.316292 00200000 ################################################################
2093 13:44:56.317254
2094 13:44:56.987842 00280000 ################################################################
2095 13:44:56.989396
2096 13:44:57.665237 00300000 ################################################################
2097 13:44:57.666256
2098 13:44:58.325219 00380000 ################################################################
2099 13:44:58.326292
2100 13:44:58.991602 00400000 ################################################################
2101 13:44:58.992595
2102 13:44:59.649271 00480000 ################################################################
2103 13:44:59.650392
2104 13:45:00.321215 00500000 ################################################################
2105 13:45:00.322383
2106 13:45:01.007481 00580000 ################################################################
2107 13:45:01.008112
2108 13:45:01.692389 00600000 ################################################################
2109 13:45:01.692975
2110 13:45:02.373414 00680000 ################################################################
2111 13:45:02.374453
2112 13:45:03.040360 00700000 ################################################################
2113 13:45:03.040944
2114 13:45:03.714699 00780000 ################################################################
2115 13:45:03.715881
2116 13:45:04.392093 00800000 ################################################################
2117 13:45:04.393226
2118 13:45:05.062220 00880000 ################################################################
2119 13:45:05.063338
2120 13:45:05.742028 00900000 ################################################################
2121 13:45:05.743181
2122 13:45:06.421500 00980000 ################################################################
2123 13:45:06.422640
2124 13:45:07.084327 00a00000 ################################################################
2125 13:45:07.085461
2126 13:45:07.768698 00a80000 ################################################################
2127 13:45:07.769829
2128 13:45:07.913686 00b00000 ############## done.
2129 13:45:07.914178
2130 13:45:07.917522 The bootfile was 11644736 bytes long.
2131 13:45:07.917949
2132 13:45:07.920688 Sending tftp read request... done.
2133 13:45:07.921140
2134 13:45:07.923401 Waiting for the transfer...
2135 13:45:07.924431
2136 13:45:08.651777 00000000 ################################################################
2137 13:45:08.652979
2138 13:45:09.349071 00080000 ################################################################
2139 13:45:09.350231
2140 13:45:10.027189 00100000 ################################################################
2141 13:45:10.028452
2142 13:45:10.715837 00180000 ################################################################
2143 13:45:10.717376
2144 13:45:11.419450 00200000 ################################################################
2145 13:45:11.420770
2146 13:45:12.117004 00280000 ################################################################
2147 13:45:12.117613
2148 13:45:12.818480 00300000 ################################################################
2149 13:45:12.819677
2150 13:45:13.532693 00380000 ################################################################
2151 13:45:13.533899
2152 13:45:14.253346 00400000 ################################################################
2153 13:45:14.253978
2154 13:45:14.980924 00480000 ################################################################
2155 13:45:14.981457
2156 13:45:15.696049 00500000 ################################################################
2157 13:45:15.696661
2158 13:45:16.244873 00580000 ################################################# done.
2159 13:45:16.245403
2160 13:45:16.247248 Sending tftp read request... done.
2161 13:45:16.247649
2162 13:45:16.249941 Waiting for the transfer...
2163 13:45:16.250373
2164 13:45:16.252192 00000000 # done.
2165 13:45:16.253253
2166 13:45:16.261529 Command line loaded dynamically from TFTP file: 9730034/tftp-deploy-n81ubop3/kernel/cmdline
2167 13:45:16.261961
2168 13:45:16.287847 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9730034/extract-nfsrootfs-r6xpy8v7,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2169 13:45:16.291825
2170 13:45:16.296422 Shutting down all USB controllers.
2171 13:45:16.296832
2172 13:45:16.297895 Removing current net device
2173 13:45:16.299115
2174 13:45:16.301624 EC: exit firmware mode
2175 13:45:16.302729
2176 13:45:16.304581 Finalizing coreboot
2177 13:45:16.305688
2178 13:45:16.310360 Exiting depthcharge with code 4 at timestamp: 50563663
2179 13:45:16.310768
2180 13:45:16.311183
2181 13:45:16.312256 Starting kernel ...
2182 13:45:16.312611
2183 13:45:16.313899 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2184 13:45:16.314392 start: 2.2.5 auto-login-action (timeout 00:03:46) [common]
2185 13:45:16.314778 Setting prompt string to ['Linux version [0-9]']
2186 13:45:16.315372 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 13:45:16.315770 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2188 13:45:16.316643
2190 13:49:02.315419 end: 2.2.5 auto-login-action (duration 00:03:46) [common]
2192 13:49:02.316567 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 226 seconds'
2194 13:49:02.317460 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2197 13:49:02.318816 end: 2 depthcharge-action (duration 00:05:00) [common]
2199 13:49:02.319656 Cleaning after the job
2200 13:49:02.319754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/ramdisk
2201 13:49:02.320321 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/kernel
2202 13:49:02.321180 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/nfsrootfs
2203 13:49:02.356712 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9730034/tftp-deploy-n81ubop3/modules
2204 13:49:02.357223 start: 5.1 power-off (timeout 00:00:30) [common]
2205 13:49:02.357415 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
2206 13:49:09.757992 >> Command sent successfully.
2207 13:49:09.764187 Returned 0 in 7 seconds
2208 13:49:09.865366 end: 5.1 power-off (duration 00:00:08) [common]
2210 13:49:09.866976 start: 5.2 read-feedback (timeout 00:09:52) [common]
2211 13:49:09.868199 Listened to connection for namespace 'common' for up to 1s
2212 13:49:10.871348 Finalising connection for namespace 'common'
2213 13:49:10.872092 Disconnecting from shell: Finalise
2214 13:49:10.872608
2215 13:49:10.974142 end: 5.2 read-feedback (duration 00:00:01) [common]
2216 13:49:10.974803 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9730034
2217 13:49:11.114985 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9730034
2218 13:49:11.115252 JobError: Your job cannot terminate cleanly.