Boot log: asus-C436FA-Flip-hatch

    1 12:51:09.352722  lava-dispatcher, installed at version: 2023.01
    2 12:51:09.352931  start: 0 validate
    3 12:51:09.353057  Start time: 2023-03-22 12:51:09.353048+00:00 (UTC)
    4 12:51:09.353185  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:09.353308  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:51:09.644371  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:09.644609  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:15.146076  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:15.146251  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:51:15.433211  validate duration: 6.08
   12 12:51:15.433500  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:51:15.433671  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:51:15.433785  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:51:15.433889  Not decompressing ramdisk as can be used compressed.
   16 12:51:15.433986  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
   17 12:51:15.434053  saving as /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/ramdisk/rootfs.cpio.gz
   18 12:51:15.434161  total size: 8429740 (8MB)
   19 12:51:16.433246  progress   0% (0MB)
   20 12:51:16.435431  progress   5% (0MB)
   21 12:51:16.437517  progress  10% (0MB)
   22 12:51:16.439737  progress  15% (1MB)
   23 12:51:16.442105  progress  20% (1MB)
   24 12:51:16.444259  progress  25% (2MB)
   25 12:51:16.446509  progress  30% (2MB)
   26 12:51:16.448799  progress  35% (2MB)
   27 12:51:16.450769  progress  40% (3MB)
   28 12:51:16.452901  progress  45% (3MB)
   29 12:51:16.455220  progress  50% (4MB)
   30 12:51:16.457501  progress  55% (4MB)
   31 12:51:16.459678  progress  60% (4MB)
   32 12:51:16.461826  progress  65% (5MB)
   33 12:51:16.463967  progress  70% (5MB)
   34 12:51:16.465838  progress  75% (6MB)
   35 12:51:16.467897  progress  80% (6MB)
   36 12:51:16.469894  progress  85% (6MB)
   37 12:51:16.471967  progress  90% (7MB)
   38 12:51:16.474024  progress  95% (7MB)
   39 12:51:16.476103  progress 100% (8MB)
   40 12:51:16.476241  8MB downloaded in 1.04s (7.71MB/s)
   41 12:51:16.476396  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 12:51:16.476638  end: 1.1 download-retry (duration 00:00:01) [common]
   44 12:51:16.476727  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 12:51:16.476813  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 12:51:16.476919  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   47 12:51:16.476986  saving as /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/kernel/bzImage
   48 12:51:16.477046  total size: 11878592 (11MB)
   49 12:51:16.477106  No compression specified
   50 12:51:16.478021  progress   0% (0MB)
   51 12:51:16.480972  progress   5% (0MB)
   52 12:51:16.483844  progress  10% (1MB)
   53 12:51:16.486815  progress  15% (1MB)
   54 12:51:16.489610  progress  20% (2MB)
   55 12:51:16.492463  progress  25% (2MB)
   56 12:51:16.495290  progress  30% (3MB)
   57 12:51:16.498144  progress  35% (3MB)
   58 12:51:16.501222  progress  40% (4MB)
   59 12:51:16.504077  progress  45% (5MB)
   60 12:51:16.506931  progress  50% (5MB)
   61 12:51:16.509771  progress  55% (6MB)
   62 12:51:16.512617  progress  60% (6MB)
   63 12:51:16.515469  progress  65% (7MB)
   64 12:51:16.518293  progress  70% (7MB)
   65 12:51:16.521093  progress  75% (8MB)
   66 12:51:16.524040  progress  80% (9MB)
   67 12:51:16.526863  progress  85% (9MB)
   68 12:51:16.529748  progress  90% (10MB)
   69 12:51:16.532612  progress  95% (10MB)
   70 12:51:16.535470  progress 100% (11MB)
   71 12:51:16.535641  11MB downloaded in 0.06s (193.35MB/s)
   72 12:51:16.535797  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:51:16.536040  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:51:16.536132  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 12:51:16.536223  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 12:51:16.536328  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
   78 12:51:16.536398  saving as /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/modules/modules.tar
   79 12:51:16.536460  total size: 1255052 (1MB)
   80 12:51:16.536521  Using unxz to decompress xz
   81 12:51:16.539682  progress   2% (0MB)
   82 12:51:16.540201  progress   7% (0MB)
   83 12:51:16.543661  progress  13% (0MB)
   84 12:51:16.547609  progress  18% (0MB)
   85 12:51:16.551444  progress  23% (0MB)
   86 12:51:16.555295  progress  28% (0MB)
   87 12:51:16.559138  progress  33% (0MB)
   88 12:51:16.563049  progress  39% (0MB)
   89 12:51:16.567117  progress  44% (0MB)
   90 12:51:16.570886  progress  49% (0MB)
   91 12:51:16.574839  progress  54% (0MB)
   92 12:51:16.578620  progress  60% (0MB)
   93 12:51:16.582486  progress  65% (0MB)
   94 12:51:16.586238  progress  70% (0MB)
   95 12:51:16.590055  progress  75% (0MB)
   96 12:51:16.593750  progress  80% (0MB)
   97 12:51:16.597770  progress  86% (1MB)
   98 12:51:16.601606  progress  91% (1MB)
   99 12:51:16.605552  progress  96% (1MB)
  100 12:51:16.614782  1MB downloaded in 0.08s (15.28MB/s)
  101 12:51:16.615089  end: 1.3.1 http-download (duration 00:00:00) [common]
  103 12:51:16.615364  end: 1.3 download-retry (duration 00:00:00) [common]
  104 12:51:16.615462  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  105 12:51:16.615558  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  106 12:51:16.615644  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  107 12:51:16.615734  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  108 12:51:16.615912  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2
  109 12:51:16.616021  makedir: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin
  110 12:51:16.616110  makedir: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/tests
  111 12:51:16.616191  makedir: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/results
  112 12:51:16.616299  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-add-keys
  113 12:51:16.616435  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-add-sources
  114 12:51:16.616549  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-background-process-start
  115 12:51:16.616662  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-background-process-stop
  116 12:51:16.616773  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-common-functions
  117 12:51:16.616887  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-echo-ipv4
  118 12:51:16.616998  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-install-packages
  119 12:51:16.617107  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-installed-packages
  120 12:51:16.617214  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-os-build
  121 12:51:16.617321  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-probe-channel
  122 12:51:16.617432  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-probe-ip
  123 12:51:16.617540  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-target-ip
  124 12:51:16.617647  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-target-mac
  125 12:51:16.617754  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-target-storage
  126 12:51:16.617864  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-case
  127 12:51:16.617971  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-event
  128 12:51:16.618086  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-feedback
  129 12:51:16.618196  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-raise
  130 12:51:16.618306  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-reference
  131 12:51:16.618413  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-runner
  132 12:51:16.618520  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-set
  133 12:51:16.618627  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-test-shell
  134 12:51:16.618736  Updating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-install-packages (oe)
  135 12:51:16.618848  Updating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/bin/lava-installed-packages (oe)
  136 12:51:16.618945  Creating /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/environment
  137 12:51:16.619034  LAVA metadata
  138 12:51:16.619102  - LAVA_JOB_ID=9729812
  139 12:51:16.619165  - LAVA_DISPATCHER_IP=192.168.201.1
  140 12:51:16.619266  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  141 12:51:16.619334  skipped lava-vland-overlay
  142 12:51:16.619411  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  143 12:51:16.619496  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  144 12:51:16.619562  skipped lava-multinode-overlay
  145 12:51:16.619638  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  146 12:51:16.619723  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  147 12:51:16.619800  Loading test definitions
  148 12:51:16.619894  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  149 12:51:16.619972  Using /lava-9729812 at stage 0
  150 12:51:16.620234  uuid=9729812_1.4.2.3.1 testdef=None
  151 12:51:16.620326  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  152 12:51:16.620416  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  153 12:51:16.620910  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  155 12:51:16.621142  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  156 12:51:16.621700  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  158 12:51:16.621939  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  159 12:51:16.622514  runner path: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/0/tests/0_dmesg test_uuid 9729812_1.4.2.3.1
  160 12:51:16.622659  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  162 12:51:16.622892  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  163 12:51:16.622966  Using /lava-9729812 at stage 1
  164 12:51:16.623204  uuid=9729812_1.4.2.3.5 testdef=None
  165 12:51:16.623293  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  166 12:51:16.623381  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  167 12:51:16.623891  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  169 12:51:16.624115  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  170 12:51:16.624678  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  172 12:51:16.624911  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  173 12:51:16.625446  runner path: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/1/tests/1_bootrr test_uuid 9729812_1.4.2.3.5
  174 12:51:16.625586  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  176 12:51:16.625795  Creating lava-test-runner.conf files
  177 12:51:16.625858  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/0 for stage 0
  178 12:51:16.625939  - 0_dmesg
  179 12:51:16.626014  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729812/lava-overlay-6l1t43v2/lava-9729812/1 for stage 1
  180 12:51:16.626121  - 1_bootrr
  181 12:51:16.626224  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  182 12:51:16.626311  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  183 12:51:16.632739  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  184 12:51:16.632862  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  185 12:51:16.632956  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 12:51:16.633047  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  187 12:51:16.633137  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  188 12:51:16.822450  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  189 12:51:16.822796  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  190 12:51:16.822908  extracting modules file /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729812/extract-overlay-ramdisk-sjg13t73/ramdisk
  191 12:51:16.849813  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  192 12:51:16.849997  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  193 12:51:16.850142  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729812/compress-overlay-tax6q2wj/overlay-1.4.2.4.tar.gz to ramdisk
  194 12:51:16.850216  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729812/compress-overlay-tax6q2wj/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729812/extract-overlay-ramdisk-sjg13t73/ramdisk
  195 12:51:16.854327  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 12:51:16.854446  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  197 12:51:16.854546  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  198 12:51:16.854635  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  199 12:51:16.854718  Building ramdisk /var/lib/lava/dispatcher/tmp/9729812/extract-overlay-ramdisk-sjg13t73/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729812/extract-overlay-ramdisk-sjg13t73/ramdisk
  200 12:51:16.940132  >> 62739 blocks

  201 12:51:17.930199  rename /var/lib/lava/dispatcher/tmp/9729812/extract-overlay-ramdisk-sjg13t73/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz
  202 12:51:17.930680  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  203 12:51:17.930879  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  204 12:51:17.930989  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  205 12:51:17.931084  No mkimage arch provided, not using FIT.
  206 12:51:17.931179  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  207 12:51:17.931270  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  208 12:51:17.931370  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  209 12:51:17.931470  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  210 12:51:17.931551  No LXC device requested
  211 12:51:17.931637  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  212 12:51:17.931731  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  213 12:51:17.931818  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  214 12:51:17.931888  Checking files for TFTP limit of 4294967296 bytes.
  215 12:51:17.932282  end: 1 tftp-deploy (duration 00:00:02) [common]
  216 12:51:17.932401  start: 2 depthcharge-action (timeout 00:05:00) [common]
  217 12:51:17.932495  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  218 12:51:17.932624  substitutions:
  219 12:51:17.932694  - {DTB}: None
  220 12:51:17.932763  - {INITRD}: 9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz
  221 12:51:17.932826  - {KERNEL}: 9729812/tftp-deploy-o78wulno/kernel/bzImage
  222 12:51:17.932885  - {LAVA_MAC}: None
  223 12:51:17.932943  - {PRESEED_CONFIG}: None
  224 12:51:17.933000  - {PRESEED_LOCAL}: None
  225 12:51:17.933055  - {RAMDISK}: 9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz
  226 12:51:17.933112  - {ROOT_PART}: None
  227 12:51:17.933168  - {ROOT}: None
  228 12:51:17.933226  - {SERVER_IP}: 192.168.201.1
  229 12:51:17.933283  - {TEE}: None
  230 12:51:17.933338  Parsed boot commands:
  231 12:51:17.933393  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  232 12:51:17.933547  Parsed boot commands: tftpboot 192.168.201.1 9729812/tftp-deploy-o78wulno/kernel/bzImage 9729812/tftp-deploy-o78wulno/kernel/cmdline 9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz
  233 12:51:17.933639  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  234 12:51:17.933755  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  235 12:51:17.933890  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  236 12:51:17.933998  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  237 12:51:17.934092  Not connected, no need to disconnect.
  238 12:51:17.934198  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  239 12:51:17.934285  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  240 12:51:17.934351  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
  241 12:51:17.937495  Setting prompt string to ['lava-test: # ']
  242 12:51:17.937905  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  243 12:51:17.938018  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  244 12:51:17.938149  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  245 12:51:17.938266  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  246 12:51:17.938549  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  247 12:51:23.058952  >> Command sent successfully.

  248 12:51:23.061791  Returned 0 in 5 seconds
  249 12:51:23.162338  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  251 12:51:23.162756  end: 2.2.2 reset-device (duration 00:00:05) [common]
  252 12:51:23.162888  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  253 12:51:23.162990  Setting prompt string to 'Starting depthcharge on Helios...'
  254 12:51:23.163071  Changing prompt to 'Starting depthcharge on Helios...'
  255 12:51:23.163157  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  256 12:51:23.163445  [Enter `^Ec?' for help]

  257 12:51:23.783950  

  258 12:51:23.784106  

  259 12:51:23.793464  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  260 12:51:23.796600  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  261 12:51:23.803771  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  262 12:51:23.807032  CPU: AES supported, TXT NOT supported, VT supported

  263 12:51:23.813482  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  264 12:51:23.816553  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  265 12:51:23.823659  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  266 12:51:23.826859  VBOOT: Loading verstage.

  267 12:51:23.830077  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  268 12:51:23.836380  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  269 12:51:23.840070  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  270 12:51:23.843140  CBFS @ c08000 size 3f8000

  271 12:51:23.849539  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  272 12:51:23.853121  CBFS: Locating 'fallback/verstage'

  273 12:51:23.856213  CBFS: Found @ offset 10fb80 size 1072c

  274 12:51:23.860298  

  275 12:51:23.860392  

  276 12:51:23.870169  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  277 12:51:23.884907  Probing TPM: . done!

  278 12:51:23.887648  TPM ready after 0 ms

  279 12:51:23.891061  Connected to device vid:did:rid of 1ae0:0028:00

  280 12:51:23.901281  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  281 12:51:23.905085  Initialized TPM device CR50 revision 0

  282 12:51:23.946694  tlcl_send_startup: Startup return code is 0

  283 12:51:23.946854  TPM: setup succeeded

  284 12:51:23.959868  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  285 12:51:23.963461  Chrome EC: UHEPI supported

  286 12:51:23.966956  Phase 1

  287 12:51:23.969888  FMAP: area GBB found @ c05000 (12288 bytes)

  288 12:51:23.976589  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  289 12:51:23.979593  Phase 2

  290 12:51:23.979727  Phase 3

  291 12:51:23.983465  FMAP: area GBB found @ c05000 (12288 bytes)

  292 12:51:23.989874  VB2:vb2_report_dev_firmware() This is developer signed firmware

  293 12:51:23.996495  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  294 12:51:23.999579  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  295 12:51:24.005976  VB2:vb2_verify_keyblock() Checking keyblock signature...

  296 12:51:24.021940  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  297 12:51:24.025100  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  298 12:51:24.032114  VB2:vb2_verify_fw_preamble() Verifying preamble.

  299 12:51:24.036128  Phase 4

  300 12:51:24.040114  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  301 12:51:24.046443  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  302 12:51:24.226059  VB2:vb2_rsa_verify_digest() Digest check failed!

  303 12:51:24.232603  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  304 12:51:24.232724  Saving nvdata

  305 12:51:24.235899  Reboot requested (10020007)

  306 12:51:24.239051  board_reset() called!

  307 12:51:24.239143  full_reset() called!

  308 12:51:28.755181  

  309 12:51:28.755369  

  310 12:51:28.761723  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  311 12:51:28.765046  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  312 12:51:28.768964  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  313 12:51:28.776435  CPU: AES supported, TXT NOT supported, VT supported

  314 12:51:28.780192  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  315 12:51:28.787393  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  316 12:51:28.791067  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  317 12:51:28.794166  VBOOT: Loading verstage.

  318 12:51:28.797888  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  319 12:51:28.805010  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  320 12:51:28.808724  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  321 12:51:28.812106  CBFS @ c08000 size 3f8000

  322 12:51:28.816165  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  323 12:51:28.820308  CBFS: Locating 'fallback/verstage'

  324 12:51:28.823396  CBFS: Found @ offset 10fb80 size 1072c

  325 12:51:28.828039  

  326 12:51:28.828160  

  327 12:51:28.838440  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  328 12:51:28.852167  Probing TPM: . done!

  329 12:51:28.855442  TPM ready after 0 ms

  330 12:51:28.858680  Connected to device vid:did:rid of 1ae0:0028:00

  331 12:51:28.869774  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  332 12:51:28.919778  Initialized TPM device CR50 revision 0

  333 12:51:28.928468  tlcl_send_startup: Startup return code is 0

  334 12:51:28.928607  TPM: setup succeeded

  335 12:51:28.941346  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  336 12:51:28.945150  Chrome EC: UHEPI supported

  337 12:51:28.948732  Phase 1

  338 12:51:28.951718  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:51:28.958824  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  340 12:51:28.965435  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  341 12:51:28.968660  Recovery requested (1009000e)

  342 12:51:28.973926  Saving nvdata

  343 12:51:28.980312  tlcl_extend: response is 0

  344 12:51:28.988825  tlcl_extend: response is 0

  345 12:51:28.996154  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  346 12:51:28.999199  CBFS @ c08000 size 3f8000

  347 12:51:29.005540  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  348 12:51:29.009289  CBFS: Locating 'fallback/romstage'

  349 12:51:29.012471  CBFS: Found @ offset 80 size 145fc

  350 12:51:29.015311  Accumulated console time in verstage 98 ms

  351 12:51:29.015416  

  352 12:51:29.015487  

  353 12:51:29.028941  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  354 12:51:29.035493  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  355 12:51:29.038728  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  356 12:51:29.042021  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  357 12:51:29.048561  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  358 12:51:29.051810  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  359 12:51:29.054940  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  360 12:51:29.058594  TCO_STS:   0000 0000

  361 12:51:29.061787  GEN_PMCON: e0015238 00000200

  362 12:51:29.065122  GBLRST_CAUSE: 00000000 00000000

  363 12:51:29.065228  prev_sleep_state 5

  364 12:51:29.068598  Boot Count incremented to 51555

  365 12:51:29.075858  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  366 12:51:29.079133  CBFS @ c08000 size 3f8000

  367 12:51:29.085646  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  368 12:51:29.085754  CBFS: Locating 'fspm.bin'

  369 12:51:29.091740  CBFS: Found @ offset 5ffc0 size 71000

  370 12:51:29.095410  Chrome EC: UHEPI supported

  371 12:51:29.101849  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  372 12:51:29.105133  Probing TPM:  done!

  373 12:51:29.112051  Connected to device vid:did:rid of 1ae0:0028:00

  374 12:51:29.121905  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  375 12:51:29.127874  Initialized TPM device CR50 revision 0

  376 12:51:29.137125  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  377 12:51:29.146809  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  378 12:51:29.146936  MRC cache found, size 1948

  379 12:51:29.150119  bootmode is set to: 2

  380 12:51:29.153291  PRMRR disabled by config.

  381 12:51:29.156579  SPD INDEX = 1

  382 12:51:29.159626  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  383 12:51:29.163392  CBFS @ c08000 size 3f8000

  384 12:51:29.169772  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  385 12:51:29.169874  CBFS: Locating 'spd.bin'

  386 12:51:29.173011  CBFS: Found @ offset 5fb80 size 400

  387 12:51:29.176586  SPD: module type is LPDDR3

  388 12:51:29.179635  SPD: module part is 

  389 12:51:29.186174  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  390 12:51:29.190181  SPD: device width 4 bits, bus width 8 bits

  391 12:51:29.193242  SPD: module size is 4096 MB (per channel)

  392 12:51:29.196505  memory slot: 0 configuration done.

  393 12:51:29.199989  memory slot: 2 configuration done.

  394 12:51:29.251675  CBMEM:

  395 12:51:29.254951  IMD: root @ 99fff000 254 entries.

  396 12:51:29.258481  IMD: root @ 99ffec00 62 entries.

  397 12:51:29.261494  External stage cache:

  398 12:51:29.264559  IMD: root @ 9abff000 254 entries.

  399 12:51:29.268302  IMD: root @ 9abfec00 62 entries.

  400 12:51:29.274811  Chrome EC: clear events_b mask to 0x0000000020004000

  401 12:51:29.287239  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  402 12:51:29.300941  tlcl_write: response is 0

  403 12:51:29.309395  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  404 12:51:29.316225  MRC: TPM MRC hash updated successfully.

  405 12:51:29.316337  2 DIMMs found

  406 12:51:29.319503  SMM Memory Map

  407 12:51:29.322394  SMRAM       : 0x9a000000 0x1000000

  408 12:51:29.326228   Subregion 0: 0x9a000000 0xa00000

  409 12:51:29.329355   Subregion 1: 0x9aa00000 0x200000

  410 12:51:29.332565   Subregion 2: 0x9ac00000 0x400000

  411 12:51:29.335614  top_of_ram = 0x9a000000

  412 12:51:29.339339  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  413 12:51:29.345581  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  414 12:51:29.349330  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  415 12:51:29.355446  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  416 12:51:29.359074  CBFS @ c08000 size 3f8000

  417 12:51:29.362298  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  418 12:51:29.369012  CBFS: Locating 'fallback/postcar'

  419 12:51:29.372262  CBFS: Found @ offset 107000 size 4b44

  420 12:51:29.378671  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  421 12:51:29.388589  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  422 12:51:29.391781  Processing 180 relocs. Offset value of 0x97c0c000

  423 12:51:29.400662  Accumulated console time in romstage 286 ms

  424 12:51:29.400749  

  425 12:51:29.400818  

  426 12:51:29.409976  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  427 12:51:29.417114  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  428 12:51:29.420146  CBFS @ c08000 size 3f8000

  429 12:51:29.426799  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  430 12:51:29.429896  CBFS: Locating 'fallback/ramstage'

  431 12:51:29.432975  CBFS: Found @ offset 43380 size 1b9e8

  432 12:51:29.439737  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  433 12:51:29.471933  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  434 12:51:29.478895  Processing 3976 relocs. Offset value of 0x98db0000

  435 12:51:29.482169  Accumulated console time in postcar 52 ms

  436 12:51:29.482262  

  437 12:51:29.482329  

  438 12:51:29.491482  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  439 12:51:29.498016  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  440 12:51:29.501802  WARNING: RO_VPD is uninitialized or empty.

  441 12:51:29.505149  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  442 12:51:29.511136  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  443 12:51:29.511258  Normal boot.

  444 12:51:29.517657  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  445 12:51:29.520919  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  446 12:51:29.524648  CBFS @ c08000 size 3f8000

  447 12:51:29.530833  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  448 12:51:29.534049  CBFS: Locating 'cpu_microcode_blob.bin'

  449 12:51:29.538025  CBFS: Found @ offset 14700 size 2ec00

  450 12:51:29.544221  microcode: sig=0x806ec pf=0x4 revision=0xc9

  451 12:51:29.544303  Skip microcode update

  452 12:51:29.551109  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  453 12:51:29.553996  CBFS @ c08000 size 3f8000

  454 12:51:29.557265  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  455 12:51:29.560995  CBFS: Locating 'fsps.bin'

  456 12:51:29.563801  CBFS: Found @ offset d1fc0 size 35000

  457 12:51:29.589961  Detected 4 core, 8 thread CPU.

  458 12:51:29.593232  Setting up SMI for CPU

  459 12:51:29.596579  IED base = 0x9ac00000

  460 12:51:29.600449  IED size = 0x00400000

  461 12:51:29.600528  Will perform SMM setup.

  462 12:51:29.606641  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  463 12:51:29.613209  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  464 12:51:29.619659  Processing 16 relocs. Offset value of 0x00030000

  465 12:51:29.619745  Attempting to start 7 APs

  466 12:51:29.626219  Waiting for 10ms after sending INIT.

  467 12:51:29.639773  Waiting for 1st SIPI to complete...done.

  468 12:51:29.639878  AP: slot 2 apic_id 1.

  469 12:51:29.646254  Waiting for 2nd SIPI to complete...done.

  470 12:51:29.646341  AP: slot 5 apic_id 5.

  471 12:51:29.649979  AP: slot 4 apic_id 4.

  472 12:51:29.652941  AP: slot 3 apic_id 2.

  473 12:51:29.653070  AP: slot 1 apic_id 3.

  474 12:51:29.656732  AP: slot 6 apic_id 6.

  475 12:51:29.659750  AP: slot 7 apic_id 7.

  476 12:51:29.666503  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  477 12:51:29.672929  Processing 13 relocs. Offset value of 0x00038000

  478 12:51:29.679370  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  479 12:51:29.682964  Installing SMM handler to 0x9a000000

  480 12:51:29.689242  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  481 12:51:29.695952  Processing 658 relocs. Offset value of 0x9a010000

  482 12:51:29.702268  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  483 12:51:29.705731  Processing 13 relocs. Offset value of 0x9a008000

  484 12:51:29.712050  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  485 12:51:29.718929  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  486 12:51:29.725305  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  487 12:51:29.728638  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  488 12:51:29.735170  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  489 12:51:29.741720  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  490 12:51:29.748332  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  491 12:51:29.755138  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  492 12:51:29.758113  Clearing SMI status registers

  493 12:51:29.758222  SMI_STS: PM1 

  494 12:51:29.761821  PM1_STS: PWRBTN 

  495 12:51:29.761907  TCO_STS: SECOND_TO 

  496 12:51:29.765008  New SMBASE 0x9a000000

  497 12:51:29.768526  In relocation handler: CPU 0

  498 12:51:29.771566  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  499 12:51:29.778313  Writing SMRR. base = 0x9a000006, mask=0xff000800

  500 12:51:29.778418  Relocation complete.

  501 12:51:29.781322  New SMBASE 0x99fff800

  502 12:51:29.784941  In relocation handler: CPU 2

  503 12:51:29.787954  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  504 12:51:29.794780  Writing SMRR. base = 0x9a000006, mask=0xff000800

  505 12:51:29.794868  Relocation complete.

  506 12:51:29.798164  New SMBASE 0x99ffec00

  507 12:51:29.801492  In relocation handler: CPU 5

  508 12:51:29.804876  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  509 12:51:29.811480  Writing SMRR. base = 0x9a000006, mask=0xff000800

  510 12:51:29.811570  Relocation complete.

  511 12:51:29.814592  New SMBASE 0x99fff400

  512 12:51:29.817814  In relocation handler: CPU 3

  513 12:51:29.821133  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  514 12:51:29.824385  Writing SMRR. base = 0x9a000006, mask=0xff000800

  515 12:51:29.827601  Relocation complete.

  516 12:51:29.830974  New SMBASE 0x99fffc00

  517 12:51:29.834200  In relocation handler: CPU 1

  518 12:51:29.837693  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  519 12:51:29.840831  Writing SMRR. base = 0x9a000006, mask=0xff000800

  520 12:51:29.844115  Relocation complete.

  521 12:51:29.847415  New SMBASE 0x99ffe400

  522 12:51:29.850708  In relocation handler: CPU 7

  523 12:51:29.854318  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  524 12:51:29.857432  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 12:51:29.860457  Relocation complete.

  526 12:51:29.864307  New SMBASE 0x99ffe800

  527 12:51:29.867489  In relocation handler: CPU 6

  528 12:51:29.870600  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  529 12:51:29.873864  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 12:51:29.877329  Relocation complete.

  531 12:51:29.880309  New SMBASE 0x99fff000

  532 12:51:29.883362  In relocation handler: CPU 4

  533 12:51:29.886998  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  534 12:51:29.889957  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 12:51:29.893502  Relocation complete.

  536 12:51:29.896540  Initializing CPU #0

  537 12:51:29.900118  CPU: vendor Intel device 806ec

  538 12:51:29.903288  CPU: family 06, model 8e, stepping 0c

  539 12:51:29.906627  Clearing out pending MCEs

  540 12:51:29.906725  Setting up local APIC...

  541 12:51:29.909841   apic_id: 0x00 done.

  542 12:51:29.913239  Turbo is available but hidden

  543 12:51:29.916426  Turbo is available and visible

  544 12:51:29.916513  VMX status: enabled

  545 12:51:29.923466  IA32_FEATURE_CONTROL status: locked

  546 12:51:29.923592  Skip microcode update

  547 12:51:29.926200  CPU #0 initialized

  548 12:51:29.929438  Initializing CPU #2

  549 12:51:29.929566  Initializing CPU #6

  550 12:51:29.932857  Initializing CPU #7

  551 12:51:29.936151  CPU: vendor Intel device 806ec

  552 12:51:29.939364  CPU: family 06, model 8e, stepping 0c

  553 12:51:29.942733  CPU: vendor Intel device 806ec

  554 12:51:29.945855  CPU: family 06, model 8e, stepping 0c

  555 12:51:29.949669  Clearing out pending MCEs

  556 12:51:29.952913  Clearing out pending MCEs

  557 12:51:29.952991  Setting up local APIC...

  558 12:51:29.956082  CPU: vendor Intel device 806ec

  559 12:51:29.958996  CPU: family 06, model 8e, stepping 0c

  560 12:51:29.962213  Clearing out pending MCEs

  561 12:51:29.965987   apic_id: 0x06 done.

  562 12:51:29.969123  Setting up local APIC...

  563 12:51:29.969198  Setting up local APIC...

  564 12:51:29.972294  Initializing CPU #4

  565 12:51:29.975523  Initializing CPU #5

  566 12:51:29.979198  CPU: vendor Intel device 806ec

  567 12:51:29.982022  CPU: family 06, model 8e, stepping 0c

  568 12:51:29.985809  CPU: vendor Intel device 806ec

  569 12:51:29.988690  CPU: family 06, model 8e, stepping 0c

  570 12:51:29.992454  Clearing out pending MCEs

  571 12:51:29.992534  Clearing out pending MCEs

  572 12:51:29.995513  Setting up local APIC...

  573 12:51:29.999135  Initializing CPU #1

  574 12:51:29.999220  Initializing CPU #3

  575 12:51:30.002333  CPU: vendor Intel device 806ec

  576 12:51:30.008835  CPU: family 06, model 8e, stepping 0c

  577 12:51:30.012114  CPU: vendor Intel device 806ec

  578 12:51:30.015409  CPU: family 06, model 8e, stepping 0c

  579 12:51:30.015495  Clearing out pending MCEs

  580 12:51:30.018795  Clearing out pending MCEs

  581 12:51:30.021857  Setting up local APIC...

  582 12:51:30.025629   apic_id: 0x07 done.

  583 12:51:30.025729   apic_id: 0x01 done.

  584 12:51:30.028990   apic_id: 0x04 done.

  585 12:51:30.032172  Setting up local APIC...

  586 12:51:30.032257  VMX status: enabled

  587 12:51:30.035502  VMX status: enabled

  588 12:51:30.038645  IA32_FEATURE_CONTROL status: locked

  589 12:51:30.041895  IA32_FEATURE_CONTROL status: locked

  590 12:51:30.045042  Skip microcode update

  591 12:51:30.048337  Skip microcode update

  592 12:51:30.048422  CPU #6 initialized

  593 12:51:30.051646  CPU #7 initialized

  594 12:51:30.051731  VMX status: enabled

  595 12:51:30.054726  VMX status: enabled

  596 12:51:30.058039   apic_id: 0x05 done.

  597 12:51:30.061890  IA32_FEATURE_CONTROL status: locked

  598 12:51:30.061984  VMX status: enabled

  599 12:51:30.065209  Skip microcode update

  600 12:51:30.068478  IA32_FEATURE_CONTROL status: locked

  601 12:51:30.071852  CPU #4 initialized

  602 12:51:30.071933  Skip microcode update

  603 12:51:30.074805  IA32_FEATURE_CONTROL status: locked

  604 12:51:30.077934  Setting up local APIC...

  605 12:51:30.081766  CPU #5 initialized

  606 12:51:30.081849  Skip microcode update

  607 12:51:30.085044   apic_id: 0x03 done.

  608 12:51:30.088311   apic_id: 0x02 done.

  609 12:51:30.088393  VMX status: enabled

  610 12:51:30.091510  VMX status: enabled

  611 12:51:30.094491  IA32_FEATURE_CONTROL status: locked

  612 12:51:30.097786  IA32_FEATURE_CONTROL status: locked

  613 12:51:30.101576  Skip microcode update

  614 12:51:30.104603  Skip microcode update

  615 12:51:30.104686  CPU #1 initialized

  616 12:51:30.108095  CPU #3 initialized

  617 12:51:30.108190  CPU #2 initialized

  618 12:51:30.114210  bsp_do_flight_plan done after 465 msecs.

  619 12:51:30.114294  CPU: frequency set to 4200 MHz

  620 12:51:30.117961  Enabling SMIs.

  621 12:51:30.118044  Locking SMM.

  622 12:51:30.133961  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  623 12:51:30.137292  CBFS @ c08000 size 3f8000

  624 12:51:30.143803  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  625 12:51:30.143889  CBFS: Locating 'vbt.bin'

  626 12:51:30.147100  CBFS: Found @ offset 5f5c0 size 499

  627 12:51:30.153523  Found a VBT of 4608 bytes after decompression

  628 12:51:30.334079  Display FSP Version Info HOB

  629 12:51:30.337535  Reference Code - CPU = 9.0.1e.30

  630 12:51:30.340529  uCode Version = 0.0.0.ca

  631 12:51:30.343760  TXT ACM version = ff.ff.ff.ffff

  632 12:51:30.347561  Display FSP Version Info HOB

  633 12:51:30.350866  Reference Code - ME = 9.0.1e.30

  634 12:51:30.353502  MEBx version = 0.0.0.0

  635 12:51:30.357445  ME Firmware Version = Consumer SKU

  636 12:51:30.360048  Display FSP Version Info HOB

  637 12:51:30.363354  Reference Code - CML PCH = 9.0.1e.30

  638 12:51:30.367171  PCH-CRID Status = Disabled

  639 12:51:30.370389  PCH-CRID Original Value = ff.ff.ff.ffff

  640 12:51:30.373616  PCH-CRID New Value = ff.ff.ff.ffff

  641 12:51:30.376782  OPROM - RST - RAID = ff.ff.ff.ffff

  642 12:51:30.379907  ChipsetInit Base Version = ff.ff.ff.ffff

  643 12:51:30.386473  ChipsetInit Oem Version = ff.ff.ff.ffff

  644 12:51:30.386573  Display FSP Version Info HOB

  645 12:51:30.392943  Reference Code - SA - System Agent = 9.0.1e.30

  646 12:51:30.396434  Reference Code - MRC = 0.7.1.6c

  647 12:51:30.399360  SA - PCIe Version = 9.0.1e.30

  648 12:51:30.403137  SA-CRID Status = Disabled

  649 12:51:30.406384  SA-CRID Original Value = 0.0.0.c

  650 12:51:30.406469  SA-CRID New Value = 0.0.0.c

  651 12:51:30.409608  OPROM - VBIOS = ff.ff.ff.ffff

  652 12:51:30.413307  RTC Init

  653 12:51:30.416661  Set power on after power failure.

  654 12:51:30.416744  Disabling Deep S3

  655 12:51:30.419761  Disabling Deep S3

  656 12:51:30.422896  Disabling Deep S4

  657 12:51:30.422977  Disabling Deep S4

  658 12:51:30.426020  Disabling Deep S5

  659 12:51:30.426118  Disabling Deep S5

  660 12:51:30.432793  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1

  661 12:51:30.435980  Enumerating buses...

  662 12:51:30.439217  Show all devs... Before device enumeration.

  663 12:51:30.443051  Root Device: enabled 1

  664 12:51:30.446156  CPU_CLUSTER: 0: enabled 1

  665 12:51:30.446307  DOMAIN: 0000: enabled 1

  666 12:51:30.449424  APIC: 00: enabled 1

  667 12:51:30.452710  PCI: 00:00.0: enabled 1

  668 12:51:30.452820  PCI: 00:02.0: enabled 1

  669 12:51:30.455951  PCI: 00:04.0: enabled 0

  670 12:51:30.459201  PCI: 00:05.0: enabled 0

  671 12:51:30.462547  PCI: 00:12.0: enabled 1

  672 12:51:30.462640  PCI: 00:12.5: enabled 0

  673 12:51:30.465741  PCI: 00:12.6: enabled 0

  674 12:51:30.468945  PCI: 00:14.0: enabled 1

  675 12:51:30.472227  PCI: 00:14.1: enabled 0

  676 12:51:30.472312  PCI: 00:14.3: enabled 1

  677 12:51:30.475455  PCI: 00:14.5: enabled 0

  678 12:51:30.478842  PCI: 00:15.0: enabled 1

  679 12:51:30.482438  PCI: 00:15.1: enabled 1

  680 12:51:30.482532  PCI: 00:15.2: enabled 0

  681 12:51:30.485530  PCI: 00:15.3: enabled 0

  682 12:51:30.488832  PCI: 00:16.0: enabled 1

  683 12:51:30.492091  PCI: 00:16.1: enabled 0

  684 12:51:30.492177  PCI: 00:16.2: enabled 0

  685 12:51:30.495376  PCI: 00:16.3: enabled 0

  686 12:51:30.498726  PCI: 00:16.4: enabled 0

  687 12:51:30.501444  PCI: 00:16.5: enabled 0

  688 12:51:30.501524  PCI: 00:17.0: enabled 1

  689 12:51:30.505127  PCI: 00:19.0: enabled 1

  690 12:51:30.508309  PCI: 00:19.1: enabled 0

  691 12:51:30.508400  PCI: 00:19.2: enabled 0

  692 12:51:30.511258  PCI: 00:1a.0: enabled 0

  693 12:51:30.514898  PCI: 00:1c.0: enabled 0

  694 12:51:30.518049  PCI: 00:1c.1: enabled 0

  695 12:51:30.518142  PCI: 00:1c.2: enabled 0

  696 12:51:30.521336  PCI: 00:1c.3: enabled 0

  697 12:51:30.524555  PCI: 00:1c.4: enabled 0

  698 12:51:30.527854  PCI: 00:1c.5: enabled 0

  699 12:51:30.527930  PCI: 00:1c.6: enabled 0

  700 12:51:30.531643  PCI: 00:1c.7: enabled 0

  701 12:51:30.534545  PCI: 00:1d.0: enabled 1

  702 12:51:30.537575  PCI: 00:1d.1: enabled 0

  703 12:51:30.537665  PCI: 00:1d.2: enabled 0

  704 12:51:30.541429  PCI: 00:1d.3: enabled 0

  705 12:51:30.544311  PCI: 00:1d.4: enabled 0

  706 12:51:30.547907  PCI: 00:1d.5: enabled 1

  707 12:51:30.547988  PCI: 00:1e.0: enabled 1

  708 12:51:30.550947  PCI: 00:1e.1: enabled 0

  709 12:51:30.553965  PCI: 00:1e.2: enabled 1

  710 12:51:30.557649  PCI: 00:1e.3: enabled 1

  711 12:51:30.557746  PCI: 00:1f.0: enabled 1

  712 12:51:30.560295  PCI: 00:1f.1: enabled 1

  713 12:51:30.564093  PCI: 00:1f.2: enabled 1

  714 12:51:30.567392  PCI: 00:1f.3: enabled 1

  715 12:51:30.567482  PCI: 00:1f.4: enabled 1

  716 12:51:30.570571  PCI: 00:1f.5: enabled 1

  717 12:51:30.573816  PCI: 00:1f.6: enabled 0

  718 12:51:30.577192  USB0 port 0: enabled 1

  719 12:51:30.577282  I2C: 00:15: enabled 1

  720 12:51:30.580509  I2C: 00:5d: enabled 1

  721 12:51:30.583608  GENERIC: 0.0: enabled 1

  722 12:51:30.583697  I2C: 00:1a: enabled 1

  723 12:51:30.586808  I2C: 00:38: enabled 1

  724 12:51:30.589979  I2C: 00:39: enabled 1

  725 12:51:30.590074  I2C: 00:3a: enabled 1

  726 12:51:30.593173  I2C: 00:3b: enabled 1

  727 12:51:30.596439  PCI: 00:00.0: enabled 1

  728 12:51:30.596524  SPI: 00: enabled 1

  729 12:51:30.599713  SPI: 01: enabled 1

  730 12:51:30.603067  PNP: 0c09.0: enabled 1

  731 12:51:30.603185  USB2 port 0: enabled 1

  732 12:51:30.606360  USB2 port 1: enabled 1

  733 12:51:30.609580  USB2 port 2: enabled 0

  734 12:51:30.612624  USB2 port 3: enabled 0

  735 12:51:30.612708  USB2 port 5: enabled 0

  736 12:51:30.616375  USB2 port 6: enabled 1

  737 12:51:30.619426  USB2 port 9: enabled 1

  738 12:51:30.619513  USB3 port 0: enabled 1

  739 12:51:30.622530  USB3 port 1: enabled 1

  740 12:51:30.625766  USB3 port 2: enabled 1

  741 12:51:30.629030  USB3 port 3: enabled 1

  742 12:51:30.629119  USB3 port 4: enabled 0

  743 12:51:30.632306  APIC: 03: enabled 1

  744 12:51:30.635601  APIC: 01: enabled 1

  745 12:51:30.635685  APIC: 02: enabled 1

  746 12:51:30.639485  APIC: 04: enabled 1

  747 12:51:30.639567  APIC: 05: enabled 1

  748 12:51:30.642358  APIC: 06: enabled 1

  749 12:51:30.646020  APIC: 07: enabled 1

  750 12:51:30.646112  Compare with tree...

  751 12:51:30.649198  Root Device: enabled 1

  752 12:51:30.652286   CPU_CLUSTER: 0: enabled 1

  753 12:51:30.652380    APIC: 00: enabled 1

  754 12:51:30.655292    APIC: 03: enabled 1

  755 12:51:30.658894    APIC: 01: enabled 1

  756 12:51:30.662011    APIC: 02: enabled 1

  757 12:51:30.662116    APIC: 04: enabled 1

  758 12:51:30.665064    APIC: 05: enabled 1

  759 12:51:30.668999    APIC: 06: enabled 1

  760 12:51:30.669088    APIC: 07: enabled 1

  761 12:51:30.672295   DOMAIN: 0000: enabled 1

  762 12:51:30.675516    PCI: 00:00.0: enabled 1

  763 12:51:30.678929    PCI: 00:02.0: enabled 1

  764 12:51:30.679019    PCI: 00:04.0: enabled 0

  765 12:51:30.681536    PCI: 00:05.0: enabled 0

  766 12:51:30.684728    PCI: 00:12.0: enabled 1

  767 12:51:30.688608    PCI: 00:12.5: enabled 0

  768 12:51:30.691682    PCI: 00:12.6: enabled 0

  769 12:51:30.691775    PCI: 00:14.0: enabled 1

  770 12:51:30.694895     USB0 port 0: enabled 1

  771 12:51:30.698141      USB2 port 0: enabled 1

  772 12:51:30.701413      USB2 port 1: enabled 1

  773 12:51:30.704753      USB2 port 2: enabled 0

  774 12:51:30.708062      USB2 port 3: enabled 0

  775 12:51:30.708150      USB2 port 5: enabled 0

  776 12:51:30.711316      USB2 port 6: enabled 1

  777 12:51:30.714571      USB2 port 9: enabled 1

  778 12:51:30.717722      USB3 port 0: enabled 1

  779 12:51:30.720893      USB3 port 1: enabled 1

  780 12:51:30.724604      USB3 port 2: enabled 1

  781 12:51:30.724700      USB3 port 3: enabled 1

  782 12:51:30.727542      USB3 port 4: enabled 0

  783 12:51:30.730787    PCI: 00:14.1: enabled 0

  784 12:51:30.734165    PCI: 00:14.3: enabled 1

  785 12:51:30.737457    PCI: 00:14.5: enabled 0

  786 12:51:30.737542    PCI: 00:15.0: enabled 1

  787 12:51:30.740827     I2C: 00:15: enabled 1

  788 12:51:30.744315    PCI: 00:15.1: enabled 1

  789 12:51:30.747107     I2C: 00:5d: enabled 1

  790 12:51:30.750312     GENERIC: 0.0: enabled 1

  791 12:51:30.750400    PCI: 00:15.2: enabled 0

  792 12:51:30.754045    PCI: 00:15.3: enabled 0

  793 12:51:30.757215    PCI: 00:16.0: enabled 1

  794 12:51:30.760298    PCI: 00:16.1: enabled 0

  795 12:51:30.763277    PCI: 00:16.2: enabled 0

  796 12:51:30.763366    PCI: 00:16.3: enabled 0

  797 12:51:30.766974    PCI: 00:16.4: enabled 0

  798 12:51:30.769898    PCI: 00:16.5: enabled 0

  799 12:51:30.773411    PCI: 00:17.0: enabled 1

  800 12:51:30.776511    PCI: 00:19.0: enabled 1

  801 12:51:30.776594     I2C: 00:1a: enabled 1

  802 12:51:30.779715     I2C: 00:38: enabled 1

  803 12:51:30.783028     I2C: 00:39: enabled 1

  804 12:51:30.786281     I2C: 00:3a: enabled 1

  805 12:51:30.789601     I2C: 00:3b: enabled 1

  806 12:51:30.789686    PCI: 00:19.1: enabled 0

  807 12:51:30.793263    PCI: 00:19.2: enabled 0

  808 12:51:30.796399    PCI: 00:1a.0: enabled 0

  809 12:51:30.799673    PCI: 00:1c.0: enabled 0

  810 12:51:30.802969    PCI: 00:1c.1: enabled 0

  811 12:51:30.803052    PCI: 00:1c.2: enabled 0

  812 12:51:30.806279    PCI: 00:1c.3: enabled 0

  813 12:51:30.809514    PCI: 00:1c.4: enabled 0

  814 12:51:30.812722    PCI: 00:1c.5: enabled 0

  815 12:51:30.816062    PCI: 00:1c.6: enabled 0

  816 12:51:30.816143    PCI: 00:1c.7: enabled 0

  817 12:51:30.819318    PCI: 00:1d.0: enabled 1

  818 12:51:30.822620    PCI: 00:1d.1: enabled 0

  819 12:51:30.825971    PCI: 00:1d.2: enabled 0

  820 12:51:30.829252    PCI: 00:1d.3: enabled 0

  821 12:51:30.829331    PCI: 00:1d.4: enabled 0

  822 12:51:30.832218    PCI: 00:1d.5: enabled 1

  823 12:51:30.835295     PCI: 00:00.0: enabled 1

  824 12:51:30.838518    PCI: 00:1e.0: enabled 1

  825 12:51:30.841980    PCI: 00:1e.1: enabled 0

  826 12:51:30.842077    PCI: 00:1e.2: enabled 1

  827 12:51:30.845314     SPI: 00: enabled 1

  828 12:51:30.848462    PCI: 00:1e.3: enabled 1

  829 12:51:30.851735     SPI: 01: enabled 1

  830 12:51:30.851836    PCI: 00:1f.0: enabled 1

  831 12:51:30.854994     PNP: 0c09.0: enabled 1

  832 12:51:30.858846    PCI: 00:1f.1: enabled 1

  833 12:51:30.861956    PCI: 00:1f.2: enabled 1

  834 12:51:30.865264    PCI: 00:1f.3: enabled 1

  835 12:51:30.865348    PCI: 00:1f.4: enabled 1

  836 12:51:30.868295    PCI: 00:1f.5: enabled 1

  837 12:51:30.871388    PCI: 00:1f.6: enabled 0

  838 12:51:30.875124  Root Device scanning...

  839 12:51:30.878183  scan_static_bus for Root Device

  840 12:51:30.878271  CPU_CLUSTER: 0 enabled

  841 12:51:30.881768  DOMAIN: 0000 enabled

  842 12:51:30.885082  DOMAIN: 0000 scanning...

  843 12:51:30.888259  PCI: pci_scan_bus for bus 00

  844 12:51:30.891746  PCI: 00:00.0 [8086/0000] ops

  845 12:51:30.894769  PCI: 00:00.0 [8086/9b61] enabled

  846 12:51:30.897956  PCI: 00:02.0 [8086/0000] bus ops

  847 12:51:30.901057  PCI: 00:02.0 [8086/9b41] enabled

  848 12:51:30.904285  PCI: 00:04.0 [8086/1903] disabled

  849 12:51:30.907508  PCI: 00:08.0 [8086/1911] enabled

  850 12:51:30.911134  PCI: 00:12.0 [8086/02f9] enabled

  851 12:51:30.914611  PCI: 00:14.0 [8086/0000] bus ops

  852 12:51:30.917523  PCI: 00:14.0 [8086/02ed] enabled

  853 12:51:30.921154  PCI: 00:14.2 [8086/02ef] enabled

  854 12:51:30.924456  PCI: 00:14.3 [8086/02f0] enabled

  855 12:51:30.927620  PCI: 00:15.0 [8086/0000] bus ops

  856 12:51:30.930888  PCI: 00:15.0 [8086/02e8] enabled

  857 12:51:30.934011  PCI: 00:15.1 [8086/0000] bus ops

  858 12:51:30.937106  PCI: 00:15.1 [8086/02e9] enabled

  859 12:51:30.940682  PCI: 00:16.0 [8086/0000] ops

  860 12:51:30.943797  PCI: 00:16.0 [8086/02e0] enabled

  861 12:51:30.947043  PCI: 00:17.0 [8086/0000] ops

  862 12:51:30.950210  PCI: 00:17.0 [8086/02d3] enabled

  863 12:51:30.953490  PCI: 00:19.0 [8086/0000] bus ops

  864 12:51:30.956614  PCI: 00:19.0 [8086/02c5] enabled

  865 12:51:30.959935  PCI: 00:1d.0 [8086/0000] bus ops

  866 12:51:30.963204  PCI: 00:1d.0 [8086/02b0] enabled

  867 12:51:30.970001  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  868 12:51:30.972979  PCI: 00:1e.0 [8086/0000] ops

  869 12:51:30.976714  PCI: 00:1e.0 [8086/02a8] enabled

  870 12:51:30.979808  PCI: 00:1e.2 [8086/0000] bus ops

  871 12:51:30.982949  PCI: 00:1e.2 [8086/02aa] enabled

  872 12:51:30.985962  PCI: 00:1e.3 [8086/0000] bus ops

  873 12:51:30.989815  PCI: 00:1e.3 [8086/02ab] enabled

  874 12:51:30.992975  PCI: 00:1f.0 [8086/0000] bus ops

  875 12:51:30.996263  PCI: 00:1f.0 [8086/0284] enabled

  876 12:51:30.999546  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  877 12:51:31.005867  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  878 12:51:31.008909  PCI: 00:1f.3 [8086/0000] bus ops

  879 12:51:31.012194  PCI: 00:1f.3 [8086/02c8] enabled

  880 12:51:31.015383  PCI: 00:1f.4 [8086/0000] bus ops

  881 12:51:31.018564  PCI: 00:1f.4 [8086/02a3] enabled

  882 12:51:31.022426  PCI: 00:1f.5 [8086/0000] bus ops

  883 12:51:31.025073  PCI: 00:1f.5 [8086/02a4] enabled

  884 12:51:31.028293  PCI: Leftover static devices:

  885 12:51:31.031708  PCI: 00:05.0

  886 12:51:31.031795  PCI: 00:12.5

  887 12:51:31.031865  PCI: 00:12.6

  888 12:51:31.034973  PCI: 00:14.1

  889 12:51:31.035052  PCI: 00:14.5

  890 12:51:31.038775  PCI: 00:15.2

  891 12:51:31.038854  PCI: 00:15.3

  892 12:51:31.041963  PCI: 00:16.1

  893 12:51:31.042038  PCI: 00:16.2

  894 12:51:31.042112  PCI: 00:16.3

  895 12:51:31.045050  PCI: 00:16.4

  896 12:51:31.045133  PCI: 00:16.5

  897 12:51:31.048059  PCI: 00:19.1

  898 12:51:31.048145  PCI: 00:19.2

  899 12:51:31.048217  PCI: 00:1a.0

  900 12:51:31.051609  PCI: 00:1c.0

  901 12:51:31.051693  PCI: 00:1c.1

  902 12:51:31.054876  PCI: 00:1c.2

  903 12:51:31.054966  PCI: 00:1c.3

  904 12:51:31.058085  PCI: 00:1c.4

  905 12:51:31.058182  PCI: 00:1c.5

  906 12:51:31.058255  PCI: 00:1c.6

  907 12:51:31.061294  PCI: 00:1c.7

  908 12:51:31.061383  PCI: 00:1d.1

  909 12:51:31.064515  PCI: 00:1d.2

  910 12:51:31.064606  PCI: 00:1d.3

  911 12:51:31.064676  PCI: 00:1d.4

  912 12:51:31.067796  PCI: 00:1d.5

  913 12:51:31.067883  PCI: 00:1e.1

  914 12:51:31.071143  PCI: 00:1f.1

  915 12:51:31.071227  PCI: 00:1f.2

  916 12:51:31.074907  PCI: 00:1f.6

  917 12:51:31.074994  PCI: Check your devicetree.cb.

  918 12:51:31.077893  PCI: 00:02.0 scanning...

  919 12:51:31.080904  scan_generic_bus for PCI: 00:02.0

  920 12:51:31.087697  scan_generic_bus for PCI: 00:02.0 done

  921 12:51:31.090764  scan_bus: scanning of bus PCI: 00:02.0 took 10174 usecs

  922 12:51:31.094709  PCI: 00:14.0 scanning...

  923 12:51:31.097526  scan_static_bus for PCI: 00:14.0

  924 12:51:31.100751  USB0 port 0 enabled

  925 12:51:31.103770  USB0 port 0 scanning...

  926 12:51:31.107182  scan_static_bus for USB0 port 0

  927 12:51:31.107267  USB2 port 0 enabled

  928 12:51:31.110316  USB2 port 1 enabled

  929 12:51:31.113415  USB2 port 2 disabled

  930 12:51:31.113501  USB2 port 3 disabled

  931 12:51:31.116705  USB2 port 5 disabled

  932 12:51:31.116791  USB2 port 6 enabled

  933 12:51:31.119961  USB2 port 9 enabled

  934 12:51:31.123217  USB3 port 0 enabled

  935 12:51:31.123310  USB3 port 1 enabled

  936 12:51:31.127394  USB3 port 2 enabled

  937 12:51:31.130442  USB3 port 3 enabled

  938 12:51:31.130527  USB3 port 4 disabled

  939 12:51:31.133661  USB2 port 0 scanning...

  940 12:51:31.136874  scan_static_bus for USB2 port 0

  941 12:51:31.140396  scan_static_bus for USB2 port 0 done

  942 12:51:31.146776  scan_bus: scanning of bus USB2 port 0 took 9701 usecs

  943 12:51:31.150087  USB2 port 1 scanning...

  944 12:51:31.153105  scan_static_bus for USB2 port 1

  945 12:51:31.156497  scan_static_bus for USB2 port 1 done

  946 12:51:31.159474  scan_bus: scanning of bus USB2 port 1 took 9702 usecs

  947 12:51:31.162537  USB2 port 6 scanning...

  948 12:51:31.166184  scan_static_bus for USB2 port 6

  949 12:51:31.169349  scan_static_bus for USB2 port 6 done

  950 12:51:31.175847  scan_bus: scanning of bus USB2 port 6 took 9704 usecs

  951 12:51:31.179149  USB2 port 9 scanning...

  952 12:51:31.182260  scan_static_bus for USB2 port 9

  953 12:51:31.185956  scan_static_bus for USB2 port 9 done

  954 12:51:31.192494  scan_bus: scanning of bus USB2 port 9 took 9705 usecs

  955 12:51:31.192621  USB3 port 0 scanning...

  956 12:51:31.195699  scan_static_bus for USB3 port 0

  957 12:51:31.201745  scan_static_bus for USB3 port 0 done

  958 12:51:31.205246  scan_bus: scanning of bus USB3 port 0 took 9706 usecs

  959 12:51:31.208804  USB3 port 1 scanning...

  960 12:51:31.211750  scan_static_bus for USB3 port 1

  961 12:51:31.214799  scan_static_bus for USB3 port 1 done

  962 12:51:31.221777  scan_bus: scanning of bus USB3 port 1 took 9689 usecs

  963 12:51:31.225040  USB3 port 2 scanning...

  964 12:51:31.228326  scan_static_bus for USB3 port 2

  965 12:51:31.231624  scan_static_bus for USB3 port 2 done

  966 12:51:31.234296  scan_bus: scanning of bus USB3 port 2 took 9703 usecs

  967 12:51:31.238113  USB3 port 3 scanning...

  968 12:51:31.241341  scan_static_bus for USB3 port 3

  969 12:51:31.244601  scan_static_bus for USB3 port 3 done

  970 12:51:31.251070  scan_bus: scanning of bus USB3 port 3 took 9695 usecs

  971 12:51:31.254400  scan_static_bus for USB0 port 0 done

  972 12:51:31.260571  scan_bus: scanning of bus USB0 port 0 took 155388 usecs

  973 12:51:31.263887  scan_static_bus for PCI: 00:14.0 done

  974 12:51:31.270627  scan_bus: scanning of bus PCI: 00:14.0 took 173017 usecs

  975 12:51:31.270797  PCI: 00:15.0 scanning...

  976 12:51:31.277848  scan_generic_bus for PCI: 00:15.0

  977 12:51:31.280441  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  978 12:51:31.283778  scan_generic_bus for PCI: 00:15.0 done

  979 12:51:31.290168  scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs

  980 12:51:31.290310  PCI: 00:15.1 scanning...

  981 12:51:31.297462  scan_generic_bus for PCI: 00:15.1

  982 12:51:31.300435  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  983 12:51:31.304051  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  984 12:51:31.307145  scan_generic_bus for PCI: 00:15.1 done

  985 12:51:31.313776  scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs

  986 12:51:31.316701  PCI: 00:19.0 scanning...

  987 12:51:31.319789  scan_generic_bus for PCI: 00:19.0

  988 12:51:31.323218  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  989 12:51:31.326690  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  990 12:51:31.333188  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  991 12:51:31.336496  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  992 12:51:31.339655  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  993 12:51:31.343072  scan_generic_bus for PCI: 00:19.0 done

  994 12:51:31.349658  scan_bus: scanning of bus PCI: 00:19.0 took 30723 usecs

  995 12:51:31.353003  PCI: 00:1d.0 scanning...

  996 12:51:31.356233  do_pci_scan_bridge for PCI: 00:1d.0

  997 12:51:31.359489  PCI: pci_scan_bus for bus 01

  998 12:51:31.362719  PCI: 01:00.0 [1c5c/1327] enabled

  999 12:51:31.365750  Enabling Common Clock Configuration

 1000 12:51:31.369082  L1 Sub-State supported from root port 29

 1001 12:51:31.372415  L1 Sub-State Support = 0xf

 1002 12:51:31.375584  CommonModeRestoreTime = 0x28

 1003 12:51:31.379161  Power On Value = 0x16, Power On Scale = 0x0

 1004 12:51:31.382218  ASPM: Enabled L1

 1005 12:51:31.389158  scan_bus: scanning of bus PCI: 00:1d.0 took 32781 usecs

 1006 12:51:31.389273  PCI: 00:1e.2 scanning...

 1007 12:51:31.395713  scan_generic_bus for PCI: 00:1e.2

 1008 12:51:31.398941  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1009 12:51:31.402020  scan_generic_bus for PCI: 00:1e.2 done

 1010 12:51:31.408623  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1011 12:51:31.408735  PCI: 00:1e.3 scanning...

 1012 12:51:31.414738  scan_generic_bus for PCI: 00:1e.3

 1013 12:51:31.418362  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1014 12:51:31.421318  scan_generic_bus for PCI: 00:1e.3 done

 1015 12:51:31.427979  scan_bus: scanning of bus PCI: 00:1e.3 took 13991 usecs

 1016 12:51:31.428091  PCI: 00:1f.0 scanning...

 1017 12:51:31.431582  scan_static_bus for PCI: 00:1f.0

 1018 12:51:31.434623  PNP: 0c09.0 enabled

 1019 12:51:31.438203  scan_static_bus for PCI: 00:1f.0 done

 1020 12:51:31.444764  scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs

 1021 12:51:31.447995  PCI: 00:1f.3 scanning...

 1022 12:51:31.451207  scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs

 1023 12:51:31.454362  PCI: 00:1f.4 scanning...

 1024 12:51:31.457573  scan_generic_bus for PCI: 00:1f.4

 1025 12:51:31.460940  scan_generic_bus for PCI: 00:1f.4 done

 1026 12:51:31.467835  scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs

 1027 12:51:31.471012  PCI: 00:1f.5 scanning...

 1028 12:51:31.474195  scan_generic_bus for PCI: 00:1f.5

 1029 12:51:31.477441  scan_generic_bus for PCI: 00:1f.5 done

 1030 12:51:31.483856  scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs

 1031 12:51:31.490791  scan_bus: scanning of bus DOMAIN: 0000 took 605013 usecs

 1032 12:51:31.493770  scan_static_bus for Root Device done

 1033 12:51:31.500324  scan_bus: scanning of bus Root Device took 624921 usecs

 1034 12:51:31.500415  done

 1035 12:51:31.503502  Chrome EC: UHEPI supported

 1036 12:51:31.509936  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1037 12:51:31.513204  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1038 12:51:31.519791  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1039 12:51:31.527168  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1040 12:51:31.530446  SPI flash protection: WPSW=0 SRP0=1

 1041 12:51:31.537120  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1042 12:51:31.540054  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1043 12:51:31.543637  found VGA at PCI: 00:02.0

 1044 12:51:31.546747  Setting up VGA for PCI: 00:02.0

 1045 12:51:31.553219  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1046 12:51:31.556479  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1047 12:51:31.559704  Allocating resources...

 1048 12:51:31.562969  Reading resources...

 1049 12:51:31.566265  Root Device read_resources bus 0 link: 0

 1050 12:51:31.569395  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1051 12:51:31.576419  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1052 12:51:31.579626  DOMAIN: 0000 read_resources bus 0 link: 0

 1053 12:51:31.587438  PCI: 00:14.0 read_resources bus 0 link: 0

 1054 12:51:31.590643  USB0 port 0 read_resources bus 0 link: 0

 1055 12:51:31.598947  USB0 port 0 read_resources bus 0 link: 0 done

 1056 12:51:31.602007  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1057 12:51:31.609204  PCI: 00:15.0 read_resources bus 1 link: 0

 1058 12:51:31.612616  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1059 12:51:31.618954  PCI: 00:15.1 read_resources bus 2 link: 0

 1060 12:51:31.622740  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1061 12:51:31.630200  PCI: 00:19.0 read_resources bus 3 link: 0

 1062 12:51:31.636570  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1063 12:51:31.640406  PCI: 00:1d.0 read_resources bus 1 link: 0

 1064 12:51:31.646694  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1065 12:51:31.649944  PCI: 00:1e.2 read_resources bus 4 link: 0

 1066 12:51:31.655963  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1067 12:51:31.659342  PCI: 00:1e.3 read_resources bus 5 link: 0

 1068 12:51:31.666417  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1069 12:51:31.669121  PCI: 00:1f.0 read_resources bus 0 link: 0

 1070 12:51:31.675737  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1071 12:51:31.682637  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1072 12:51:31.686111  Root Device read_resources bus 0 link: 0 done

 1073 12:51:31.689186  Done reading resources.

 1074 12:51:31.695700  Show resources in subtree (Root Device)...After reading.

 1075 12:51:31.698975   Root Device child on link 0 CPU_CLUSTER: 0

 1076 12:51:31.702391    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1077 12:51:31.705358     APIC: 00

 1078 12:51:31.705469     APIC: 03

 1079 12:51:31.708456     APIC: 01

 1080 12:51:31.708545     APIC: 02

 1081 12:51:31.708623     APIC: 04

 1082 12:51:31.711923     APIC: 05

 1083 12:51:31.712002     APIC: 06

 1084 12:51:31.712076     APIC: 07

 1085 12:51:31.718460    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1086 12:51:31.774995    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1087 12:51:31.775367    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1088 12:51:31.775455     PCI: 00:00.0

 1089 12:51:31.776138     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1090 12:51:31.776806     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1091 12:51:31.777365     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1092 12:51:31.777622     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1093 12:51:31.796795     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1094 12:51:31.797094     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1095 12:51:31.802971     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1096 12:51:31.812631     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1097 12:51:31.822267     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1098 12:51:31.832195     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1099 12:51:31.842395     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1100 12:51:31.852217     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1101 12:51:31.858385     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1102 12:51:31.868419     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1103 12:51:31.878519     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1104 12:51:31.887946     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1105 12:51:31.891154     PCI: 00:02.0

 1106 12:51:31.900844     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1107 12:51:31.910666     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1108 12:51:31.917185     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1109 12:51:31.920422     PCI: 00:04.0

 1110 12:51:31.920511     PCI: 00:08.0

 1111 12:51:31.930841     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1112 12:51:31.933990     PCI: 00:12.0

 1113 12:51:31.943796     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1114 12:51:31.946808     PCI: 00:14.0 child on link 0 USB0 port 0

 1115 12:51:31.956765     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1116 12:51:31.963431      USB0 port 0 child on link 0 USB2 port 0

 1117 12:51:31.963554       USB2 port 0

 1118 12:51:31.966455       USB2 port 1

 1119 12:51:31.966550       USB2 port 2

 1120 12:51:31.969602       USB2 port 3

 1121 12:51:31.969680       USB2 port 5

 1122 12:51:31.972777       USB2 port 6

 1123 12:51:31.975954       USB2 port 9

 1124 12:51:31.976043       USB3 port 0

 1125 12:51:31.979872       USB3 port 1

 1126 12:51:31.979960       USB3 port 2

 1127 12:51:31.982947       USB3 port 3

 1128 12:51:31.983034       USB3 port 4

 1129 12:51:31.986154     PCI: 00:14.2

 1130 12:51:31.995749     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1131 12:51:32.005719     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1132 12:51:32.005820     PCI: 00:14.3

 1133 12:51:32.015558     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1134 12:51:32.022142     PCI: 00:15.0 child on link 0 I2C: 01:15

 1135 12:51:32.031714     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1136 12:51:32.031814      I2C: 01:15

 1137 12:51:32.034964     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1138 12:51:32.044908     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 12:51:32.048102      I2C: 02:5d

 1140 12:51:32.051705      GENERIC: 0.0

 1141 12:51:32.051795     PCI: 00:16.0

 1142 12:51:32.061309     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1143 12:51:32.064549     PCI: 00:17.0

 1144 12:51:32.071347     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1145 12:51:32.081235     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1146 12:51:32.090655     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1147 12:51:32.097646     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1148 12:51:32.107467     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1149 12:51:32.114020     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1150 12:51:32.120369     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1151 12:51:32.130083     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1152 12:51:32.130206      I2C: 03:1a

 1153 12:51:32.133539      I2C: 03:38

 1154 12:51:32.133653      I2C: 03:39

 1155 12:51:32.136520      I2C: 03:3a

 1156 12:51:32.136634      I2C: 03:3b

 1157 12:51:32.139781     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1158 12:51:32.150007     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1159 12:51:32.160325     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1160 12:51:32.169857     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1161 12:51:32.169999      PCI: 01:00.0

 1162 12:51:32.179096      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1163 12:51:32.182873     PCI: 00:1e.0

 1164 12:51:32.192494     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1165 12:51:32.202542     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1166 12:51:32.208836     PCI: 00:1e.2 child on link 0 SPI: 00

 1167 12:51:32.218524     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 12:51:32.218653      SPI: 00

 1169 12:51:32.221974     PCI: 00:1e.3 child on link 0 SPI: 01

 1170 12:51:32.231717     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1171 12:51:32.234959      SPI: 01

 1172 12:51:32.238163     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1173 12:51:32.248100     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1174 12:51:32.254544     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1175 12:51:32.257642      PNP: 0c09.0

 1176 12:51:32.267625      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1177 12:51:32.267771     PCI: 00:1f.3

 1178 12:51:32.277597     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1179 12:51:32.287515     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1180 12:51:32.290691     PCI: 00:1f.4

 1181 12:51:32.296950     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1182 12:51:32.306962     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1183 12:51:32.310647     PCI: 00:1f.5

 1184 12:51:32.320297     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1185 12:51:32.326866  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1186 12:51:32.332869  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1187 12:51:32.339621  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1188 12:51:32.342794  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1189 12:51:32.345975  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1190 12:51:32.349577  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1191 12:51:32.352760  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1192 12:51:32.359364  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1193 12:51:32.365570  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1194 12:51:32.375579  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1195 12:51:32.382099  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1196 12:51:32.388779  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1197 12:51:32.391933  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1198 12:51:32.401945  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1199 12:51:32.405080  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1200 12:51:32.411351  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1201 12:51:32.415012  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1202 12:51:32.421244  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1203 12:51:32.424372  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1204 12:51:32.431328  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1205 12:51:32.434618  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1206 12:51:32.441132  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1207 12:51:32.444459  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1208 12:51:32.450806  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1209 12:51:32.454094  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1210 12:51:32.460451  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1211 12:51:32.463709  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1212 12:51:32.470526  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1213 12:51:32.473636  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1214 12:51:32.480009  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1215 12:51:32.483458  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1216 12:51:32.489966  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1217 12:51:32.493272  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1218 12:51:32.499577  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1219 12:51:32.503307  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1220 12:51:32.506385  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1221 12:51:32.512783  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1222 12:51:32.522704  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1223 12:51:32.525787  avoid_fixed_resources: DOMAIN: 0000

 1224 12:51:32.528981  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1225 12:51:32.535616  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1226 12:51:32.545520  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1227 12:51:32.551954  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1228 12:51:32.558767  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1229 12:51:32.568353  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1230 12:51:32.575237  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1231 12:51:32.581843  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1232 12:51:32.591696  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1233 12:51:32.598197  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1234 12:51:32.604776  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1235 12:51:32.610809  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1236 12:51:32.614455  Setting resources...

 1237 12:51:32.620790  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1238 12:51:32.624020  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1239 12:51:32.627068  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1240 12:51:32.633797  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1241 12:51:32.637060  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1242 12:51:32.643748  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1243 12:51:32.650242  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1244 12:51:32.656757  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1245 12:51:32.663373  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1246 12:51:32.669766  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1247 12:51:32.673296  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1248 12:51:32.679677  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1249 12:51:32.682730  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1250 12:51:32.689320  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1251 12:51:32.692570  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1252 12:51:32.695859  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1253 12:51:32.702344  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1254 12:51:32.705621  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1255 12:51:32.712741  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1256 12:51:32.715898  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1257 12:51:32.722575  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1258 12:51:32.725516  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1259 12:51:32.732336  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1260 12:51:32.735416  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1261 12:51:32.741849  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1262 12:51:32.745432  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1263 12:51:32.751971  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1264 12:51:32.755235  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1265 12:51:32.761495  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1266 12:51:32.764796  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1267 12:51:32.771211  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1268 12:51:32.774463  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1269 12:51:32.781480  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1270 12:51:32.791088  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1271 12:51:32.797480  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1272 12:51:32.804248  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1273 12:51:32.810834  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1274 12:51:32.817225  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1275 12:51:32.820399  Root Device assign_resources, bus 0 link: 0

 1276 12:51:32.827304  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1277 12:51:32.833389  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1278 12:51:32.843771  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1279 12:51:32.849991  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1280 12:51:32.859669  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1281 12:51:32.866201  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1282 12:51:32.876001  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1283 12:51:32.879169  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1284 12:51:32.885739  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1285 12:51:32.892605  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1286 12:51:32.902162  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1287 12:51:32.909209  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1288 12:51:32.918513  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1289 12:51:32.921751  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1290 12:51:32.928687  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1291 12:51:32.934986  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1292 12:51:32.941822  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1293 12:51:32.945014  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1294 12:51:32.954341  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1295 12:51:32.961125  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1296 12:51:32.967629  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1297 12:51:32.977526  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1298 12:51:32.984045  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1299 12:51:32.990638  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1300 12:51:33.000489  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1301 12:51:33.006740  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1302 12:51:33.013753  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1303 12:51:33.016956  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1304 12:51:33.026689  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1305 12:51:33.036165  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1306 12:51:33.043306  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1307 12:51:33.046479  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1308 12:51:33.056473  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1309 12:51:33.059477  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1310 12:51:33.069281  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1311 12:51:33.075963  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1312 12:51:33.082350  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1313 12:51:33.085564  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1314 12:51:33.095383  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1315 12:51:33.098696  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1316 12:51:33.105650  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1317 12:51:33.108632  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1318 12:51:33.114929  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1319 12:51:33.118761  LPC: Trying to open IO window from 800 size 1ff

 1320 12:51:33.128475  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1321 12:51:33.135206  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1322 12:51:33.144371  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1323 12:51:33.151420  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1324 12:51:33.157733  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1325 12:51:33.160862  Root Device assign_resources, bus 0 link: 0

 1326 12:51:33.164040  Done setting resources.

 1327 12:51:33.170806  Show resources in subtree (Root Device)...After assigning values.

 1328 12:51:33.173677   Root Device child on link 0 CPU_CLUSTER: 0

 1329 12:51:33.177472    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1330 12:51:33.180707     APIC: 00

 1331 12:51:33.180822     APIC: 03

 1332 12:51:33.184119     APIC: 01

 1333 12:51:33.184233     APIC: 02

 1334 12:51:33.184333     APIC: 04

 1335 12:51:33.187350     APIC: 05

 1336 12:51:33.187463     APIC: 06

 1337 12:51:33.187564     APIC: 07

 1338 12:51:33.193720    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1339 12:51:33.203472    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1340 12:51:33.213510    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1341 12:51:33.216674     PCI: 00:00.0

 1342 12:51:33.226050     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1343 12:51:33.232617     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1344 12:51:33.242290     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1345 12:51:33.252216     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1346 12:51:33.262011     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1347 12:51:33.272224     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1348 12:51:33.282178     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1349 12:51:33.291858     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1350 12:51:33.298501     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1351 12:51:33.308439     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1352 12:51:33.317863     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1353 12:51:33.327909     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1354 12:51:33.337865     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1355 12:51:33.347481     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1356 12:51:33.357231     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1357 12:51:33.363725     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1358 12:51:33.366903     PCI: 00:02.0

 1359 12:51:33.377187     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1360 12:51:33.386760     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1361 12:51:33.396721     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1362 12:51:33.400266     PCI: 00:04.0

 1363 12:51:33.400361     PCI: 00:08.0

 1364 12:51:33.409717     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1365 12:51:33.413384     PCI: 00:12.0

 1366 12:51:33.422715     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1367 12:51:33.425867     PCI: 00:14.0 child on link 0 USB0 port 0

 1368 12:51:33.439318     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1369 12:51:33.442583      USB0 port 0 child on link 0 USB2 port 0

 1370 12:51:33.442674       USB2 port 0

 1371 12:51:33.445814       USB2 port 1

 1372 12:51:33.449033       USB2 port 2

 1373 12:51:33.449116       USB2 port 3

 1374 12:51:33.452445       USB2 port 5

 1375 12:51:33.452531       USB2 port 6

 1376 12:51:33.455457       USB2 port 9

 1377 12:51:33.455586       USB3 port 0

 1378 12:51:33.458593       USB3 port 1

 1379 12:51:33.458674       USB3 port 2

 1380 12:51:33.461812       USB3 port 3

 1381 12:51:33.461902       USB3 port 4

 1382 12:51:33.465097     PCI: 00:14.2

 1383 12:51:33.474960     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1384 12:51:33.484930     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1385 12:51:33.488515     PCI: 00:14.3

 1386 12:51:33.498420     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1387 12:51:33.501397     PCI: 00:15.0 child on link 0 I2C: 01:15

 1388 12:51:33.511341     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1389 12:51:33.514733      I2C: 01:15

 1390 12:51:33.517825     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1391 12:51:33.527631     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1392 12:51:33.531114      I2C: 02:5d

 1393 12:51:33.531238      GENERIC: 0.0

 1394 12:51:33.534382     PCI: 00:16.0

 1395 12:51:33.544338     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1396 12:51:33.544464     PCI: 00:17.0

 1397 12:51:33.554370     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1398 12:51:33.567174     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1399 12:51:33.573655     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1400 12:51:33.583317     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1401 12:51:33.592897     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1402 12:51:33.602992     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1403 12:51:33.605999     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1404 12:51:33.616180     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1405 12:51:33.619796      I2C: 03:1a

 1406 12:51:33.619917      I2C: 03:38

 1407 12:51:33.622262      I2C: 03:39

 1408 12:51:33.622378      I2C: 03:3a

 1409 12:51:33.626091      I2C: 03:3b

 1410 12:51:33.629324     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1411 12:51:33.638691     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1412 12:51:33.648711     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1413 12:51:33.658468     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1414 12:51:33.661669      PCI: 01:00.0

 1415 12:51:33.671225      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1416 12:51:33.674399     PCI: 00:1e.0

 1417 12:51:33.684259     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1418 12:51:33.694531     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1419 12:51:33.697766     PCI: 00:1e.2 child on link 0 SPI: 00

 1420 12:51:33.707175     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1421 12:51:33.710694      SPI: 00

 1422 12:51:33.713824     PCI: 00:1e.3 child on link 0 SPI: 01

 1423 12:51:33.723863     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1424 12:51:33.727070      SPI: 01

 1425 12:51:33.730354     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1426 12:51:33.740066     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1427 12:51:33.746979     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1428 12:51:33.749952      PNP: 0c09.0

 1429 12:51:33.756583      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1430 12:51:33.759897     PCI: 00:1f.3

 1431 12:51:33.769486     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1432 12:51:33.779218     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1433 12:51:33.783143     PCI: 00:1f.4

 1434 12:51:33.792803     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1435 12:51:33.802326     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1436 12:51:33.802429     PCI: 00:1f.5

 1437 12:51:33.812410     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1438 12:51:33.815299  Done allocating resources.

 1439 12:51:33.821975  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1440 12:51:33.825510  Enabling resources...

 1441 12:51:33.828595  PCI: 00:00.0 subsystem <- 8086/9b61

 1442 12:51:33.831846  PCI: 00:00.0 cmd <- 06

 1443 12:51:33.835183  PCI: 00:02.0 subsystem <- 8086/9b41

 1444 12:51:33.838417  PCI: 00:02.0 cmd <- 03

 1445 12:51:33.838505  PCI: 00:08.0 cmd <- 06

 1446 12:51:33.845475  PCI: 00:12.0 subsystem <- 8086/02f9

 1447 12:51:33.845563  PCI: 00:12.0 cmd <- 02

 1448 12:51:33.851747  PCI: 00:14.0 subsystem <- 8086/02ed

 1449 12:51:33.851836  PCI: 00:14.0 cmd <- 02

 1450 12:51:33.855524  PCI: 00:14.2 cmd <- 02

 1451 12:51:33.858120  PCI: 00:14.3 subsystem <- 8086/02f0

 1452 12:51:33.861928  PCI: 00:14.3 cmd <- 02

 1453 12:51:33.864930  PCI: 00:15.0 subsystem <- 8086/02e8

 1454 12:51:33.868165  PCI: 00:15.0 cmd <- 02

 1455 12:51:33.871390  PCI: 00:15.1 subsystem <- 8086/02e9

 1456 12:51:33.874751  PCI: 00:15.1 cmd <- 02

 1457 12:51:33.877955  PCI: 00:16.0 subsystem <- 8086/02e0

 1458 12:51:33.881061  PCI: 00:16.0 cmd <- 02

 1459 12:51:33.885050  PCI: 00:17.0 subsystem <- 8086/02d3

 1460 12:51:33.887527  PCI: 00:17.0 cmd <- 03

 1461 12:51:33.890800  PCI: 00:19.0 subsystem <- 8086/02c5

 1462 12:51:33.894745  PCI: 00:19.0 cmd <- 02

 1463 12:51:33.897795  PCI: 00:1d.0 bridge ctrl <- 0013

 1464 12:51:33.900935  PCI: 00:1d.0 subsystem <- 8086/02b0

 1465 12:51:33.901044  PCI: 00:1d.0 cmd <- 06

 1466 12:51:33.907468  PCI: 00:1e.0 subsystem <- 8086/02a8

 1467 12:51:33.907554  PCI: 00:1e.0 cmd <- 06

 1468 12:51:33.910759  PCI: 00:1e.2 subsystem <- 8086/02aa

 1469 12:51:33.914166  PCI: 00:1e.2 cmd <- 06

 1470 12:51:33.917351  PCI: 00:1e.3 subsystem <- 8086/02ab

 1471 12:51:33.920538  PCI: 00:1e.3 cmd <- 02

 1472 12:51:33.924133  PCI: 00:1f.0 subsystem <- 8086/0284

 1473 12:51:33.927646  PCI: 00:1f.0 cmd <- 407

 1474 12:51:33.930547  PCI: 00:1f.3 subsystem <- 8086/02c8

 1475 12:51:33.933949  PCI: 00:1f.3 cmd <- 02

 1476 12:51:33.937359  PCI: 00:1f.4 subsystem <- 8086/02a3

 1477 12:51:33.940502  PCI: 00:1f.4 cmd <- 03

 1478 12:51:33.943807  PCI: 00:1f.5 subsystem <- 8086/02a4

 1479 12:51:33.947064  PCI: 00:1f.5 cmd <- 406

 1480 12:51:33.955354  PCI: 01:00.0 cmd <- 02

 1481 12:51:33.960490  done.

 1482 12:51:33.974069  ME: Version: 14.0.39.1367

 1483 12:51:33.980046  BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 13

 1484 12:51:33.983327  Initializing devices...

 1485 12:51:33.983417  Root Device init ...

 1486 12:51:33.989778  Chrome EC: Set SMI mask to 0x0000000000000000

 1487 12:51:33.996781  Chrome EC: clear events_b mask to 0x0000000000000000

 1488 12:51:33.999605  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1489 12:51:34.006426  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1490 12:51:34.013231  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1491 12:51:34.016481  Chrome EC: Set WAKE mask to 0x0000000000000000

 1492 12:51:34.022780  Root Device init finished in 35207 usecs

 1493 12:51:34.026022  CPU_CLUSTER: 0 init ...

 1494 12:51:34.029245  CPU_CLUSTER: 0 init finished in 2448 usecs

 1495 12:51:34.034795  PCI: 00:00.0 init ...

 1496 12:51:34.037725  CPU TDP: 15 Watts

 1497 12:51:34.041252  CPU PL2 = 64 Watts

 1498 12:51:34.044320  PCI: 00:00.0 init finished in 7082 usecs

 1499 12:51:34.047675  PCI: 00:02.0 init ...

 1500 12:51:34.050925  PCI: 00:02.0 init finished in 2254 usecs

 1501 12:51:34.054184  PCI: 00:08.0 init ...

 1502 12:51:34.057484  PCI: 00:08.0 init finished in 2251 usecs

 1503 12:51:34.060780  PCI: 00:12.0 init ...

 1504 12:51:34.064465  PCI: 00:12.0 init finished in 2254 usecs

 1505 12:51:34.067587  PCI: 00:14.0 init ...

 1506 12:51:34.070709  PCI: 00:14.0 init finished in 2253 usecs

 1507 12:51:34.073857  PCI: 00:14.2 init ...

 1508 12:51:34.076952  PCI: 00:14.2 init finished in 2252 usecs

 1509 12:51:34.080801  PCI: 00:14.3 init ...

 1510 12:51:34.083760  PCI: 00:14.3 init finished in 2271 usecs

 1511 12:51:34.086903  PCI: 00:15.0 init ...

 1512 12:51:34.090054  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1513 12:51:34.097133  PCI: 00:15.0 init finished in 5978 usecs

 1514 12:51:34.097221  PCI: 00:15.1 init ...

 1515 12:51:34.103636  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1516 12:51:34.106908  PCI: 00:15.1 init finished in 5978 usecs

 1517 12:51:34.110046  PCI: 00:16.0 init ...

 1518 12:51:34.113185  PCI: 00:16.0 init finished in 2253 usecs

 1519 12:51:34.116503  PCI: 00:19.0 init ...

 1520 12:51:34.119657  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1521 12:51:34.122946  PCI: 00:19.0 init finished in 5980 usecs

 1522 12:51:34.126015  PCI: 00:1d.0 init ...

 1523 12:51:34.129253  Initializing PCH PCIe bridge.

 1524 12:51:34.132460  PCI: 00:1d.0 init finished in 5279 usecs

 1525 12:51:34.136509  PCI: 00:1f.0 init ...

 1526 12:51:34.139522  IOAPIC: Initializing IOAPIC at 0xfec00000

 1527 12:51:34.146352  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1528 12:51:34.146445  IOAPIC: ID = 0x02

 1529 12:51:34.149264  IOAPIC: Dumping registers

 1530 12:51:34.153024    reg 0x0000: 0x02000000

 1531 12:51:34.156197    reg 0x0001: 0x00770020

 1532 12:51:34.159557    reg 0x0002: 0x00000000

 1533 12:51:34.162753  PCI: 00:1f.0 init finished in 23542 usecs

 1534 12:51:34.165925  PCI: 00:1f.4 init ...

 1535 12:51:34.168905  PCI: 00:1f.4 init finished in 2263 usecs

 1536 12:51:34.180822  PCI: 01:00.0 init ...

 1537 12:51:34.183932  PCI: 01:00.0 init finished in 2252 usecs

 1538 12:51:34.188066  PNP: 0c09.0 init ...

 1539 12:51:34.191330  Google Chrome EC uptime: 11.102 seconds

 1540 12:51:34.198170  Google Chrome AP resets since EC boot: 0

 1541 12:51:34.201453  Google Chrome most recent AP reset causes:

 1542 12:51:34.207892  Google Chrome EC reset flags at last EC boot: reset-pin

 1543 12:51:34.211026  PNP: 0c09.0 init finished in 20567 usecs

 1544 12:51:34.214184  Devices initialized

 1545 12:51:34.217570  Show all devs... After init.

 1546 12:51:34.217663  Root Device: enabled 1

 1547 12:51:34.221274  CPU_CLUSTER: 0: enabled 1

 1548 12:51:34.223919  DOMAIN: 0000: enabled 1

 1549 12:51:34.224007  APIC: 00: enabled 1

 1550 12:51:34.227731  PCI: 00:00.0: enabled 1

 1551 12:51:34.231209  PCI: 00:02.0: enabled 1

 1552 12:51:34.234359  PCI: 00:04.0: enabled 0

 1553 12:51:34.234447  PCI: 00:05.0: enabled 0

 1554 12:51:34.237091  PCI: 00:12.0: enabled 1

 1555 12:51:34.240964  PCI: 00:12.5: enabled 0

 1556 12:51:34.243580  PCI: 00:12.6: enabled 0

 1557 12:51:34.243673  PCI: 00:14.0: enabled 1

 1558 12:51:34.246748  PCI: 00:14.1: enabled 0

 1559 12:51:34.250479  PCI: 00:14.3: enabled 1

 1560 12:51:34.253640  PCI: 00:14.5: enabled 0

 1561 12:51:34.253728  PCI: 00:15.0: enabled 1

 1562 12:51:34.256608  PCI: 00:15.1: enabled 1

 1563 12:51:34.260098  PCI: 00:15.2: enabled 0

 1564 12:51:34.263250  PCI: 00:15.3: enabled 0

 1565 12:51:34.263342  PCI: 00:16.0: enabled 1

 1566 12:51:34.266577  PCI: 00:16.1: enabled 0

 1567 12:51:34.269812  PCI: 00:16.2: enabled 0

 1568 12:51:34.273049  PCI: 00:16.3: enabled 0

 1569 12:51:34.273140  PCI: 00:16.4: enabled 0

 1570 12:51:34.276366  PCI: 00:16.5: enabled 0

 1571 12:51:34.279817  PCI: 00:17.0: enabled 1

 1572 12:51:34.282919  PCI: 00:19.0: enabled 1

 1573 12:51:34.283007  PCI: 00:19.1: enabled 0

 1574 12:51:34.286003  PCI: 00:19.2: enabled 0

 1575 12:51:34.289159  PCI: 00:1a.0: enabled 0

 1576 12:51:34.293000  PCI: 00:1c.0: enabled 0

 1577 12:51:34.293087  PCI: 00:1c.1: enabled 0

 1578 12:51:34.295971  PCI: 00:1c.2: enabled 0

 1579 12:51:34.299049  PCI: 00:1c.3: enabled 0

 1580 12:51:34.302155  PCI: 00:1c.4: enabled 0

 1581 12:51:34.302232  PCI: 00:1c.5: enabled 0

 1582 12:51:34.305401  PCI: 00:1c.6: enabled 0

 1583 12:51:34.309213  PCI: 00:1c.7: enabled 0

 1584 12:51:34.311889  PCI: 00:1d.0: enabled 1

 1585 12:51:34.311976  PCI: 00:1d.1: enabled 0

 1586 12:51:34.315320  PCI: 00:1d.2: enabled 0

 1587 12:51:34.319011  PCI: 00:1d.3: enabled 0

 1588 12:51:34.322542  PCI: 00:1d.4: enabled 0

 1589 12:51:34.322642  PCI: 00:1d.5: enabled 0

 1590 12:51:34.325066  PCI: 00:1e.0: enabled 1

 1591 12:51:34.328332  PCI: 00:1e.1: enabled 0

 1592 12:51:34.331556  PCI: 00:1e.2: enabled 1

 1593 12:51:34.331638  PCI: 00:1e.3: enabled 1

 1594 12:51:34.335489  PCI: 00:1f.0: enabled 1

 1595 12:51:34.338762  PCI: 00:1f.1: enabled 0

 1596 12:51:34.342040  PCI: 00:1f.2: enabled 0

 1597 12:51:34.342126  PCI: 00:1f.3: enabled 1

 1598 12:51:34.344697  PCI: 00:1f.4: enabled 1

 1599 12:51:34.347983  PCI: 00:1f.5: enabled 1

 1600 12:51:34.351811  PCI: 00:1f.6: enabled 0

 1601 12:51:34.351901  USB0 port 0: enabled 1

 1602 12:51:34.355068  I2C: 01:15: enabled 1

 1603 12:51:34.358351  I2C: 02:5d: enabled 1

 1604 12:51:34.358434  GENERIC: 0.0: enabled 1

 1605 12:51:34.361400  I2C: 03:1a: enabled 1

 1606 12:51:34.364543  I2C: 03:38: enabled 1

 1607 12:51:34.364641  I2C: 03:39: enabled 1

 1608 12:51:34.367737  I2C: 03:3a: enabled 1

 1609 12:51:34.370934  I2C: 03:3b: enabled 1

 1610 12:51:34.374177  PCI: 00:00.0: enabled 1

 1611 12:51:34.374258  SPI: 00: enabled 1

 1612 12:51:34.377404  SPI: 01: enabled 1

 1613 12:51:34.377485  PNP: 0c09.0: enabled 1

 1614 12:51:34.380615  USB2 port 0: enabled 1

 1615 12:51:34.383968  USB2 port 1: enabled 1

 1616 12:51:34.387544  USB2 port 2: enabled 0

 1617 12:51:34.387623  USB2 port 3: enabled 0

 1618 12:51:34.390618  USB2 port 5: enabled 0

 1619 12:51:34.394182  USB2 port 6: enabled 1

 1620 12:51:34.394266  USB2 port 9: enabled 1

 1621 12:51:34.397394  USB3 port 0: enabled 1

 1622 12:51:34.400534  USB3 port 1: enabled 1

 1623 12:51:34.403442  USB3 port 2: enabled 1

 1624 12:51:34.403521  USB3 port 3: enabled 1

 1625 12:51:34.406958  USB3 port 4: enabled 0

 1626 12:51:34.410161  APIC: 03: enabled 1

 1627 12:51:34.410246  APIC: 01: enabled 1

 1628 12:51:34.413603  APIC: 02: enabled 1

 1629 12:51:34.416823  APIC: 04: enabled 1

 1630 12:51:34.416930  APIC: 05: enabled 1

 1631 12:51:34.419967  APIC: 06: enabled 1

 1632 12:51:34.420048  APIC: 07: enabled 1

 1633 12:51:34.423474  PCI: 00:08.0: enabled 1

 1634 12:51:34.426325  PCI: 00:14.2: enabled 1

 1635 12:51:34.430260  PCI: 01:00.0: enabled 1

 1636 12:51:34.433537  Disabling ACPI via APMC:

 1637 12:51:34.433619  done.

 1638 12:51:34.440160  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1639 12:51:34.443374  ELOG: NV offset 0xaf0000 size 0x4000

 1640 12:51:34.449953  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1641 12:51:34.456431  ELOG: Event(17) added with size 13 at 2023-03-22 12:51:34 UTC

 1642 12:51:34.462888  POST: Unexpected post code in previous boot: 0x73

 1643 12:51:34.469872  ELOG: Event(A3) added with size 11 at 2023-03-22 12:51:34 UTC

 1644 12:51:34.476009  ELOG: Event(A6) added with size 13 at 2023-03-22 12:51:34 UTC

 1645 12:51:34.482725  ELOG: Event(92) added with size 9 at 2023-03-22 12:51:34 UTC

 1646 12:51:34.489206  ELOG: Event(93) added with size 9 at 2023-03-22 12:51:34 UTC

 1647 12:51:34.495594  ELOG: Event(9A) added with size 9 at 2023-03-22 12:51:34 UTC

 1648 12:51:34.499267  ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:34 UTC

 1649 12:51:34.505487  ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:34 UTC

 1650 12:51:34.512189  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1651 12:51:34.518555  ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:34 UTC

 1652 12:51:34.528054  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1653 12:51:34.531283  ELOG: Event(A0) added with size 9 at 2023-03-22 12:51:34 UTC

 1654 12:51:34.538284  elog_add_boot_reason: Logged dev mode boot

 1655 12:51:34.538377  Finalize devices...

 1656 12:51:34.541479  PCI: 00:17.0 final

 1657 12:51:34.544919  Devices finalized

 1658 12:51:34.548070  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1659 12:51:34.554693  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1660 12:51:34.557943  ME: HFSTS1                  : 0x90000245

 1661 12:51:34.561249  ME: HFSTS2                  : 0x3B850126

 1662 12:51:34.567728  ME: HFSTS3                  : 0x00000020

 1663 12:51:34.570847  ME: HFSTS4                  : 0x00004800

 1664 12:51:34.574072  ME: HFSTS5                  : 0x00000000

 1665 12:51:34.577387  ME: HFSTS6                  : 0x40400006

 1666 12:51:34.580278  ME: Manufacturing Mode      : NO

 1667 12:51:34.584091  ME: FW Partition Table      : OK

 1668 12:51:34.587281  ME: Bringup Loader Failure  : NO

 1669 12:51:34.590551  ME: Firmware Init Complete  : YES

 1670 12:51:34.593857  ME: Boot Options Present    : NO

 1671 12:51:34.597097  ME: Update In Progress      : NO

 1672 12:51:34.600319  ME: D0i3 Support            : YES

 1673 12:51:34.603434  ME: Low Power State Enabled : NO

 1674 12:51:34.606454  ME: CPU Replaced            : NO

 1675 12:51:34.613245  ME: CPU Replacement Valid   : YES

 1676 12:51:34.613367  ME: Current Working State   : 5

 1677 12:51:34.616357  ME: Current Operation State : 1

 1678 12:51:34.619986  ME: Current Operation Mode  : 0

 1679 12:51:34.623047  ME: Error Code              : 0

 1680 12:51:34.626288  ME: CPU Debug Disabled      : YES

 1681 12:51:34.629441  ME: TXT Support             : NO

 1682 12:51:34.636372  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1683 12:51:34.643195  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1684 12:51:34.646281  CBFS @ c08000 size 3f8000

 1685 12:51:34.649563  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1686 12:51:34.652758  CBFS: Locating 'fallback/dsdt.aml'

 1687 12:51:34.659321  CBFS: Found @ offset 10bb80 size 3fa5

 1688 12:51:34.662664  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1689 12:51:34.665757  CBFS @ c08000 size 3f8000

 1690 12:51:34.672236  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1691 12:51:34.675329  CBFS: Locating 'fallback/slic'

 1692 12:51:34.678671  CBFS: 'fallback/slic' not found.

 1693 12:51:34.685255  ACPI: Writing ACPI tables at 99b3e000.

 1694 12:51:34.685346  ACPI:    * FACS

 1695 12:51:34.688553  ACPI:    * DSDT

 1696 12:51:34.691974  Ramoops buffer: 0x100000@0x99a3d000.

 1697 12:51:34.695105  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1698 12:51:34.701615  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1699 12:51:34.704807  Google Chrome EC: version:

 1700 12:51:34.708263  	ro: helios_v2.0.2659-56403530b

 1701 12:51:34.711726  	rw: helios_v2.0.2849-c41de27e7d

 1702 12:51:34.711816    running image: 1

 1703 12:51:34.716059  ACPI:    * FADT

 1704 12:51:34.716148  SCI is IRQ9

 1705 12:51:34.722304  ACPI: added table 1/32, length now 40

 1706 12:51:34.722394  ACPI:     * SSDT

 1707 12:51:34.725781  Found 1 CPU(s) with 8 core(s) each.

 1708 12:51:34.729070  Error: Could not locate 'wifi_sar' in VPD.

 1709 12:51:34.735668  Checking CBFS for default SAR values

 1710 12:51:34.738618  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1711 12:51:34.741917  CBFS @ c08000 size 3f8000

 1712 12:51:34.748415  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1713 12:51:34.751773  CBFS: Locating 'wifi_sar_defaults.hex'

 1714 12:51:34.755144  CBFS: Found @ offset 5fac0 size 77

 1715 12:51:34.758366  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1716 12:51:34.764923  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1717 12:51:34.768049  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1718 12:51:34.774592  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1719 12:51:34.778202  failed to find key in VPD: dsm_calib_r0_0

 1720 12:51:34.787948  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1721 12:51:34.791264  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1722 12:51:34.797425  failed to find key in VPD: dsm_calib_r0_1

 1723 12:51:34.804358  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1724 12:51:34.810916  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1725 12:51:34.813967  failed to find key in VPD: dsm_calib_r0_2

 1726 12:51:34.823406  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1727 12:51:34.830209  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1728 12:51:34.833258  failed to find key in VPD: dsm_calib_r0_3

 1729 12:51:34.843082  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1730 12:51:34.846678  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1731 12:51:34.853145  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1732 12:51:34.856445  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1733 12:51:34.859792  EC returned error result code 1

 1734 12:51:34.863058  EC returned error result code 1

 1735 12:51:34.866894  EC returned error result code 1

 1736 12:51:34.873589  PS2K: Bad resp from EC. Vivaldi disabled!

 1737 12:51:34.876733  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1738 12:51:34.883312  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1739 12:51:34.889950  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1740 12:51:34.892936  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1741 12:51:34.899438  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1742 12:51:34.905943  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1743 12:51:34.912805  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1744 12:51:34.916161  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1745 12:51:34.922539  ACPI: added table 2/32, length now 44

 1746 12:51:34.922631  ACPI:    * MCFG

 1747 12:51:34.925633  ACPI: added table 3/32, length now 48

 1748 12:51:34.928995  ACPI:    * TPM2

 1749 12:51:34.932148  TPM2 log created at 99a2d000

 1750 12:51:34.935141  ACPI: added table 4/32, length now 52

 1751 12:51:34.935242  ACPI:    * MADT

 1752 12:51:34.938380  SCI is IRQ9

 1753 12:51:34.942036  ACPI: added table 5/32, length now 56

 1754 12:51:34.942133  current = 99b43ac0

 1755 12:51:34.945159  ACPI:    * DMAR

 1756 12:51:34.948183  ACPI: added table 6/32, length now 60

 1757 12:51:34.951830  ACPI:    * IGD OpRegion

 1758 12:51:34.955160  GMA: Found VBT in CBFS

 1759 12:51:34.955249  GMA: Found valid VBT in CBFS

 1760 12:51:34.961136  ACPI: added table 7/32, length now 64

 1761 12:51:34.961257  ACPI:    * HPET

 1762 12:51:34.964482  ACPI: added table 8/32, length now 68

 1763 12:51:34.967719  ACPI: done.

 1764 12:51:34.970984  ACPI tables: 31744 bytes.

 1765 12:51:34.971102  smbios_write_tables: 99a2c000

 1766 12:51:34.974928  EC returned error result code 3

 1767 12:51:34.981197  Couldn't obtain OEM name from CBI

 1768 12:51:34.981321  Create SMBIOS type 17

 1769 12:51:34.984440  PCI: 00:00.0 (Intel Cannonlake)

 1770 12:51:34.987563  PCI: 00:14.3 (Intel WiFi)

 1771 12:51:34.990900  SMBIOS tables: 939 bytes.

 1772 12:51:34.994107  Writing table forward entry at 0x00000500

 1773 12:51:35.000667  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1774 12:51:35.004015  Writing coreboot table at 0x99b62000

 1775 12:51:35.010623   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1776 12:51:35.013754   1. 0000000000001000-000000000009ffff: RAM

 1777 12:51:35.020444   2. 00000000000a0000-00000000000fffff: RESERVED

 1778 12:51:35.023802   3. 0000000000100000-0000000099a2bfff: RAM

 1779 12:51:35.030309   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1780 12:51:35.033821   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1781 12:51:35.039798   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1782 12:51:35.046456   7. 000000009a000000-000000009f7fffff: RESERVED

 1783 12:51:35.049491   8. 00000000e0000000-00000000efffffff: RESERVED

 1784 12:51:35.056534   9. 00000000fc000000-00000000fc000fff: RESERVED

 1785 12:51:35.059517  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1786 12:51:35.066445  11. 00000000fed10000-00000000fed17fff: RESERVED

 1787 12:51:35.069927  12. 00000000fed80000-00000000fed83fff: RESERVED

 1788 12:51:35.072880  13. 00000000fed90000-00000000fed91fff: RESERVED

 1789 12:51:35.079466  14. 00000000feda0000-00000000feda1fff: RESERVED

 1790 12:51:35.082711  15. 0000000100000000-000000045e7fffff: RAM

 1791 12:51:35.089131  Graphics framebuffer located at 0xc0000000

 1792 12:51:35.089250  Passing 5 GPIOs to payload:

 1793 12:51:35.095630              NAME |       PORT | POLARITY |     VALUE

 1794 12:51:35.102434     write protect |  undefined |     high |       low

 1795 12:51:35.105680               lid |  undefined |     high |      high

 1796 12:51:35.112211             power |  undefined |     high |       low

 1797 12:51:35.115409             oprom |  undefined |     high |       low

 1798 12:51:35.121892          EC in RW | 0x000000cb |     high |       low

 1799 12:51:35.122010  Board ID: 4

 1800 12:51:35.128190  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1801 12:51:35.131457  CBFS @ c08000 size 3f8000

 1802 12:51:35.137918  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1803 12:51:35.141097  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87

 1804 12:51:35.144383  coreboot table: 1492 bytes.

 1805 12:51:35.147944  IMD ROOT    0. 99fff000 00001000

 1806 12:51:35.150885  IMD SMALL   1. 99ffe000 00001000

 1807 12:51:35.154818  FSP MEMORY  2. 99c4e000 003b0000

 1808 12:51:35.157701  CONSOLE     3. 99c2e000 00020000

 1809 12:51:35.161237  FMAP        4. 99c2d000 0000054e

 1810 12:51:35.164324  TIME STAMP  5. 99c2c000 00000910

 1811 12:51:35.167391  VBOOT WORK  6. 99c18000 00014000

 1812 12:51:35.170405  MRC DATA    7. 99c16000 00001958

 1813 12:51:35.174299  ROMSTG STCK 8. 99c15000 00001000

 1814 12:51:35.177499  AFTER CAR   9. 99c0b000 0000a000

 1815 12:51:35.184021  RAMSTAGE   10. 99baf000 0005c000

 1816 12:51:35.187229  REFCODE    11. 99b7a000 00035000

 1817 12:51:35.190539  SMM BACKUP 12. 99b6a000 00010000

 1818 12:51:35.193743  COREBOOT   13. 99b62000 00008000

 1819 12:51:35.196902  ACPI       14. 99b3e000 00024000

 1820 12:51:35.200026  ACPI GNVS  15. 99b3d000 00001000

 1821 12:51:35.203313  RAMOOPS    16. 99a3d000 00100000

 1822 12:51:35.207146  TPM2 TCGLOG17. 99a2d000 00010000

 1823 12:51:35.210306  SMBIOS     18. 99a2c000 00000800

 1824 12:51:35.210421  IMD small region:

 1825 12:51:35.213699    IMD ROOT    0. 99ffec00 00000400

 1826 12:51:35.216224    FSP RUNTIME 1. 99ffebe0 00000004

 1827 12:51:35.220029    EC HOSTEVENT 2. 99ffebc0 00000008

 1828 12:51:35.226489    POWER STATE 3. 99ffeb80 00000040

 1829 12:51:35.229647    ROMSTAGE    4. 99ffeb60 00000004

 1830 12:51:35.233030    MEM INFO    5. 99ffe9a0 000001b9

 1831 12:51:35.236077    VPD         6. 99ffe920 0000006c

 1832 12:51:35.239393  MTRR: Physical address space:

 1833 12:51:35.245695  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1834 12:51:35.252306  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1835 12:51:35.255770  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1836 12:51:35.262233  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1837 12:51:35.268861  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1838 12:51:35.274993  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1839 12:51:35.282025  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1840 12:51:35.285248  MTRR: Fixed MSR 0x250 0x0606060606060606

 1841 12:51:35.291722  MTRR: Fixed MSR 0x258 0x0606060606060606

 1842 12:51:35.294982  MTRR: Fixed MSR 0x259 0x0000000000000000

 1843 12:51:35.298235  MTRR: Fixed MSR 0x268 0x0606060606060606

 1844 12:51:35.301366  MTRR: Fixed MSR 0x269 0x0606060606060606

 1845 12:51:35.308264  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1846 12:51:35.311415  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1847 12:51:35.314692  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1848 12:51:35.318076  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1849 12:51:35.324069  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1850 12:51:35.327277  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1851 12:51:35.330669  call enable_fixed_mtrr()

 1852 12:51:35.333914  CPU physical address size: 39 bits

 1853 12:51:35.337697  MTRR: default type WB/UC MTRR counts: 6/8.

 1854 12:51:35.340891  MTRR: WB selected as default type.

 1855 12:51:35.347264  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1856 12:51:35.353737  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1857 12:51:35.360334  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1858 12:51:35.366516  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1859 12:51:35.373195  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1860 12:51:35.379895  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1861 12:51:35.383042  MTRR: Fixed MSR 0x250 0x0606060606060606

 1862 12:51:35.389682  MTRR: Fixed MSR 0x258 0x0606060606060606

 1863 12:51:35.392951  MTRR: Fixed MSR 0x259 0x0000000000000000

 1864 12:51:35.396280  MTRR: Fixed MSR 0x268 0x0606060606060606

 1865 12:51:35.399508  MTRR: Fixed MSR 0x269 0x0606060606060606

 1866 12:51:35.405819  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1867 12:51:35.409599  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1868 12:51:35.413025  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1869 12:51:35.416179  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1870 12:51:35.422548  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1871 12:51:35.425898  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1872 12:51:35.425993  

 1873 12:51:35.426073  MTRR check

 1874 12:51:35.429108  Fixed MTRRs   : Enabled

 1875 12:51:35.432424  Variable MTRRs: Enabled

 1876 12:51:35.432507  

 1877 12:51:35.435176  call enable_fixed_mtrr()

 1878 12:51:35.438388  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1879 12:51:35.442261  CPU physical address size: 39 bits

 1880 12:51:35.448613  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1881 12:51:35.451935  CBFS @ c08000 size 3f8000

 1882 12:51:35.458400  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1883 12:51:35.461634  CBFS: Locating 'fallback/payload'

 1884 12:51:35.464832  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:51:35.468060  MTRR: Fixed MSR 0x250 0x0606060606060606

 1886 12:51:35.471212  MTRR: Fixed MSR 0x258 0x0606060606060606

 1887 12:51:35.478159  MTRR: Fixed MSR 0x259 0x0000000000000000

 1888 12:51:35.481234  MTRR: Fixed MSR 0x268 0x0606060606060606

 1889 12:51:35.484834  MTRR: Fixed MSR 0x269 0x0606060606060606

 1890 12:51:35.487692  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1891 12:51:35.494360  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1892 12:51:35.497562  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1893 12:51:35.500678  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1894 12:51:35.503921  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1895 12:51:35.510447  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1896 12:51:35.513843  MTRR: Fixed MSR 0x258 0x0606060606060606

 1897 12:51:35.517280  MTRR: Fixed MSR 0x259 0x0000000000000000

 1898 12:51:35.520779  MTRR: Fixed MSR 0x268 0x0606060606060606

 1899 12:51:35.527119  MTRR: Fixed MSR 0x269 0x0606060606060606

 1900 12:51:35.530309  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1901 12:51:35.533635  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1902 12:51:35.536902  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1903 12:51:35.543310  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1904 12:51:35.546651  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1905 12:51:35.550116  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1906 12:51:35.553128  call enable_fixed_mtrr()

 1907 12:51:35.556215  call enable_fixed_mtrr()

 1908 12:51:35.559611  CPU physical address size: 39 bits

 1909 12:51:35.562740  CPU physical address size: 39 bits

 1910 12:51:35.566019  CBFS: Found @ offset 1c96c0 size 3f798

 1911 12:51:35.573192  MTRR: Fixed MSR 0x250 0x0606060606060606

 1912 12:51:35.576162  MTRR: Fixed MSR 0x250 0x0606060606060606

 1913 12:51:35.579295  MTRR: Fixed MSR 0x258 0x0606060606060606

 1914 12:51:35.582558  MTRR: Fixed MSR 0x259 0x0000000000000000

 1915 12:51:35.589393  MTRR: Fixed MSR 0x268 0x0606060606060606

 1916 12:51:35.592518  MTRR: Fixed MSR 0x269 0x0606060606060606

 1917 12:51:35.595418  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1918 12:51:35.599058  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1919 12:51:35.605624  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1920 12:51:35.608645  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1921 12:51:35.611793  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1922 12:51:35.615023  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1923 12:51:35.621928  MTRR: Fixed MSR 0x258 0x0606060606060606

 1924 12:51:35.622019  call enable_fixed_mtrr()

 1925 12:51:35.628346  MTRR: Fixed MSR 0x259 0x0000000000000000

 1926 12:51:35.631772  MTRR: Fixed MSR 0x268 0x0606060606060606

 1927 12:51:35.635058  MTRR: Fixed MSR 0x269 0x0606060606060606

 1928 12:51:35.638323  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1929 12:51:35.644867  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1930 12:51:35.648818  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1931 12:51:35.651884  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1932 12:51:35.655050  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1933 12:51:35.661618  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1934 12:51:35.665001  CPU physical address size: 39 bits

 1935 12:51:35.668126  call enable_fixed_mtrr()

 1936 12:51:35.671341  Checking segment from ROM address 0xffdd16f8

 1937 12:51:35.674617  CPU physical address size: 39 bits

 1938 12:51:35.677835  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 12:51:35.684686  MTRR: Fixed MSR 0x250 0x0606060606060606

 1940 12:51:35.688105  MTRR: Fixed MSR 0x258 0x0606060606060606

 1941 12:51:35.691344  MTRR: Fixed MSR 0x259 0x0000000000000000

 1942 12:51:35.694473  MTRR: Fixed MSR 0x268 0x0606060606060606

 1943 12:51:35.700845  MTRR: Fixed MSR 0x269 0x0606060606060606

 1944 12:51:35.703975  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1945 12:51:35.707728  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1946 12:51:35.710814  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1947 12:51:35.713935  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1948 12:51:35.720637  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1949 12:51:35.723646  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1950 12:51:35.726758  MTRR: Fixed MSR 0x258 0x0606060606060606

 1951 12:51:35.733476  MTRR: Fixed MSR 0x259 0x0000000000000000

 1952 12:51:35.736672  MTRR: Fixed MSR 0x268 0x0606060606060606

 1953 12:51:35.739996  MTRR: Fixed MSR 0x269 0x0606060606060606

 1954 12:51:35.743157  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1955 12:51:35.749729  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1956 12:51:35.753104  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1957 12:51:35.756414  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1958 12:51:35.759722  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1959 12:51:35.765886  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1960 12:51:35.769147  call enable_fixed_mtrr()

 1961 12:51:35.769237  call enable_fixed_mtrr()

 1962 12:51:35.772428  CPU physical address size: 39 bits

 1963 12:51:35.778939  CPU physical address size: 39 bits

 1964 12:51:35.782215  Checking segment from ROM address 0xffdd1714

 1965 12:51:35.786028  Loading segment from ROM address 0xffdd16f8

 1966 12:51:35.789122    code (compression=0)

 1967 12:51:35.798906    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1968 12:51:35.805200  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1969 12:51:35.808725  it's not compressed!

 1970 12:51:35.900358  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1971 12:51:35.906700  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1972 12:51:35.913160  Loading segment from ROM address 0xffdd1714

 1973 12:51:35.913247    Entry Point 0x30000000

 1974 12:51:35.916252  Loaded segments

 1975 12:51:35.922447  Finalizing chipset.

 1976 12:51:35.925535  Finalizing SMM.

 1977 12:51:35.929157  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1978 12:51:35.932520  mp_park_aps done after 0 msecs.

 1979 12:51:35.938726  Jumping to boot code at 30000000(99b62000)

 1980 12:51:35.945274  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1981 12:51:35.945389  

 1982 12:51:35.945494  

 1983 12:51:35.945585  

 1984 12:51:35.948452  Starting depthcharge on Helios...

 1985 12:51:35.948562  

 1986 12:51:35.948958  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1987 12:51:35.949097  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1988 12:51:35.949212  Setting prompt string to ['hatch:']
 1989 12:51:35.949328  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1990 12:51:35.958236  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1991 12:51:35.958347  

 1992 12:51:35.964727  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1993 12:51:35.964841  

 1994 12:51:35.971290  board_setup: Info: eMMC controller not present; skipping

 1995 12:51:35.971407  

 1996 12:51:35.974376  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1997 12:51:35.974486  

 1998 12:51:35.981195  board_setup: Info: SDHCI controller not present; skipping

 1999 12:51:35.981309  

 2000 12:51:35.987585  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2001 12:51:35.987699  

 2002 12:51:35.987795  Wipe memory regions:

 2003 12:51:35.987886  

 2004 12:51:35.994595  	[0x00000000001000, 0x000000000a0000)

 2005 12:51:35.994711  

 2006 12:51:35.997712  	[0x00000000100000, 0x00000030000000)

 2007 12:51:36.061422  

 2008 12:51:36.064601  	[0x00000030657430, 0x00000099a2c000)

 2009 12:51:36.201457  

 2010 12:51:36.204637  	[0x00000100000000, 0x0000045e800000)

 2011 12:51:37.587209  

 2012 12:51:37.587455  R8152: Initializing

 2013 12:51:37.587561  

 2014 12:51:37.590378  Version 9 (ocp_data = 6010)

 2015 12:51:37.594931  

 2016 12:51:37.595031  R8152: Done initializing

 2017 12:51:37.595116  

 2018 12:51:37.598247  Adding net device

 2019 12:51:38.080896  

 2020 12:51:38.081044  R8152: Initializing

 2021 12:51:38.081117  

 2022 12:51:38.084006  Version 6 (ocp_data = 5c30)

 2023 12:51:38.084099  

 2024 12:51:38.087293  R8152: Done initializing

 2025 12:51:38.087381  

 2026 12:51:38.094017  net_add_device: Attemp to include the same device

 2027 12:51:38.094144  

 2028 12:51:38.100813  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2029 12:51:38.100970  

 2030 12:51:38.101082  

 2031 12:51:38.101175  

 2032 12:51:38.101451  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2034 12:51:38.202095  hatch: tftpboot 192.168.201.1 9729812/tftp-deploy-o78wulno/kernel/bzImage 9729812/tftp-deploy-o78wulno/kernel/cmdline 9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz

 2035 12:51:38.202265  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2036 12:51:38.202366  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2037 12:51:38.206343  tftpboot 192.168.201.1 9729812/tftp-deploy-o78wulno/kernel/bzImoy-o78wulno/kernel/cmdline 9729812/tftp-deploy-o78wulno/ramdisk/ramdisk.cpio.gz

 2038 12:51:38.206438  

 2039 12:51:38.206509  Waiting for link

 2040 12:51:38.407450  

 2041 12:51:38.407591  done.

 2042 12:51:38.407665  

 2043 12:51:38.407732  MAC: 00:24:32:50:19:be

 2044 12:51:38.407799  

 2045 12:51:38.410716  Sending DHCP discover... done.

 2046 12:51:38.410802  

 2047 12:51:38.413944  Waiting for reply... done.

 2048 12:51:38.414027  

 2049 12:51:38.416968  Sending DHCP request... done.

 2050 12:51:38.417053  

 2051 12:51:38.420653  Waiting for reply... done.

 2052 12:51:38.420739  

 2053 12:51:38.423725  My ip is 192.168.201.15

 2054 12:51:38.423814  

 2055 12:51:38.426950  The DHCP server ip is 192.168.201.1

 2056 12:51:38.427032  

 2057 12:51:38.429949  TFTP server IP predefined by user: 192.168.201.1

 2058 12:51:38.430031  

 2059 12:51:38.436712  Bootfile predefined by user: 9729812/tftp-deploy-o78wulno/kernel/bzImage

 2060 12:51:38.436807  

 2061 12:51:38.440018  Sending tftp read request... done.

 2062 12:51:38.443308  

 2063 12:51:38.447090  Waiting for the transfer... 

 2064 12:51:38.447175  

 2065 12:51:38.980577  00000000 ################################################################

 2066 12:51:38.980724  

 2067 12:51:39.498332  00080000 ################################################################

 2068 12:51:39.498478  

 2069 12:51:40.006696  00100000 ################################################################

 2070 12:51:40.006900  

 2071 12:51:40.540942  00180000 ################################################################

 2072 12:51:40.541087  

 2073 12:51:41.051131  00200000 ################################################################

 2074 12:51:41.051295  

 2075 12:51:41.589864  00280000 ################################################################

 2076 12:51:41.590027  

 2077 12:51:42.126159  00300000 ################################################################

 2078 12:51:42.126300  

 2079 12:51:42.663973  00380000 ################################################################

 2080 12:51:42.664123  

 2081 12:51:43.191550  00400000 ################################################################

 2082 12:51:43.191700  

 2083 12:51:43.697740  00480000 ################################################################

 2084 12:51:43.697904  

 2085 12:51:44.219975  00500000 ################################################################

 2086 12:51:44.220131  

 2087 12:51:44.740665  00580000 ################################################################

 2088 12:51:44.740842  

 2089 12:51:45.266276  00600000 ################################################################

 2090 12:51:45.266436  

 2091 12:51:45.792449  00680000 ################################################################

 2092 12:51:45.792601  

 2093 12:51:46.314537  00700000 ################################################################

 2094 12:51:46.314689  

 2095 12:51:46.844881  00780000 ################################################################

 2096 12:51:46.845049  

 2097 12:51:47.378380  00800000 ################################################################

 2098 12:51:47.378520  

 2099 12:51:47.909061  00880000 ################################################################

 2100 12:51:47.909205  

 2101 12:51:48.430927  00900000 ################################################################

 2102 12:51:48.431074  

 2103 12:51:48.961601  00980000 ################################################################

 2104 12:51:48.961752  

 2105 12:51:49.483268  00a00000 ################################################################

 2106 12:51:49.483412  

 2107 12:51:50.019356  00a80000 ################################################################

 2108 12:51:50.019517  

 2109 12:51:50.370552  00b00000 ########################################### done.

 2110 12:51:50.370702  

 2111 12:51:50.373858  The bootfile was 11878592 bytes long.

 2112 12:51:50.373948  

 2113 12:51:50.376728  Sending tftp read request... done.

 2114 12:51:50.376811  

 2115 12:51:50.379865  Waiting for the transfer... 

 2116 12:51:50.379955  

 2117 12:51:50.909895  00000000 ################################################################

 2118 12:51:50.910077  

 2119 12:51:51.447833  00080000 ################################################################

 2120 12:51:51.447976  

 2121 12:51:51.995868  00100000 ################################################################

 2122 12:51:51.996042  

 2123 12:51:52.576038  00180000 ################################################################

 2124 12:51:52.576572  

 2125 12:51:53.198880  00200000 ################################################################

 2126 12:51:53.199025  

 2127 12:51:53.766389  00280000 ################################################################

 2128 12:51:53.766529  

 2129 12:51:54.422708  00300000 ################################################################

 2130 12:51:54.423221  

 2131 12:51:55.095452  00380000 ################################################################

 2132 12:51:55.096005  

 2133 12:51:55.676045  00400000 ################################################################

 2134 12:51:55.676184  

 2135 12:51:56.341312  00480000 ################################################################

 2136 12:51:56.341823  

 2137 12:51:56.977469  00500000 ################################################################

 2138 12:51:56.978175  

 2139 12:51:57.548434  00580000 ################################################################

 2140 12:51:57.548570  

 2141 12:51:58.172712  00600000 ################################################################

 2142 12:51:58.173231  

 2143 12:51:58.806489  00680000 ################################################################

 2144 12:51:58.807138  

 2145 12:51:59.383578  00700000 ################################################################

 2146 12:51:59.383716  

 2147 12:51:59.926738  00780000 ################################################################

 2148 12:51:59.926874  

 2149 12:52:00.457771  00800000 ################################################################

 2150 12:52:00.457908  

 2151 12:52:00.971113  00880000 ################################################################

 2152 12:52:00.971266  

 2153 12:52:01.502953  00900000 ################################################################

 2154 12:52:01.503095  

 2155 12:52:01.972790  00980000 ######################################################### done.

 2156 12:52:01.972926  

 2157 12:52:01.976276  Sending tftp read request... done.

 2158 12:52:01.976358  

 2159 12:52:01.979504  Waiting for the transfer... 

 2160 12:52:01.979580  

 2161 12:52:01.979644  00000000 # done.

 2162 12:52:01.979715  

 2163 12:52:01.989412  Command line loaded dynamically from TFTP file: 9729812/tftp-deploy-o78wulno/kernel/cmdline

 2164 12:52:01.989500  

 2165 12:52:02.005695  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2166 12:52:02.005786  

 2167 12:52:02.011835  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2168 12:52:02.017433  

 2169 12:52:02.020720  Shutting down all USB controllers.

 2170 12:52:02.020810  

 2171 12:52:02.020878  Removing current net device

 2172 12:52:02.024560  

 2173 12:52:02.024648  Finalizing coreboot

 2174 12:52:02.024718  

 2175 12:52:02.030969  Exiting depthcharge with code 4 at timestamp: 33484033

 2176 12:52:02.031058  

 2177 12:52:02.031126  

 2178 12:52:02.031191  Starting kernel ...

 2179 12:52:02.031252  

 2180 12:52:02.031312  

 2181 12:52:02.031701  end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
 2182 12:52:02.031806  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2183 12:52:02.031884  Setting prompt string to ['Linux version [0-9]']
 2184 12:52:02.031969  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2185 12:52:02.032068  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2187 12:56:18.032172  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2189 12:56:18.032380  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2191 12:56:18.032538  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2194 12:56:18.032800  end: 2 depthcharge-action (duration 00:05:00) [common]
 2196 12:56:18.033035  Cleaning after the job
 2197 12:56:18.033124  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/ramdisk
 2198 12:56:18.033995  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/kernel
 2199 12:56:18.034864  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729812/tftp-deploy-o78wulno/modules
 2200 12:56:18.035514  start: 5.1 power-off (timeout 00:00:30) [common]
 2201 12:56:18.035710  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2202 12:56:18.103731  >> Command sent successfully.

 2203 12:56:18.105800  Returned 0 in 0 seconds
 2204 12:56:18.206254  end: 5.1 power-off (duration 00:00:00) [common]
 2206 12:56:18.206627  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2207 12:56:18.206874  Listened to connection for namespace 'common' for up to 1s
 2209 12:56:18.207298  Listened to connection for namespace 'common' for up to 1s
 2210 12:56:18.207597  Listened to connection for namespace 'common' for up to 1s
 2211 12:56:18.211073  Listened to connection for namespace 'common' for up to 1s
 2212 12:56:18.214140  Listened to connection for namespace 'common' for up to 1s
 2213 12:56:18.217943  Listened to connection for namespace 'common' for up to 1s
 2214 12:56:18.220548  Listened to connection for namespace 'common' for up to 1s
 2215 12:56:18.224511  Listened to connection for namespace 'common' for up to 1s
 2216 12:56:18.227159  Listened to connection for namespace 'common' for up to 1s
 2217 12:56:18.230647  Listened to connection for namespace 'common' for up to 1s
 2218 12:56:18.233676  Listened to connection for namespace 'common' for up to 1s
 2219 12:56:18.237095  Listened to connection for namespace 'common' for up to 1s
 2220 12:56:18.240348  Listened to connection for namespace 'common' for up to 1s
 2221 12:56:18.243692  Listened to connection for namespace 'common' for up to 1s
 2222 12:56:18.246914  Listened to connection for namespace 'common' for up to 1s
 2223 12:56:18.250282  Listened to connection for namespace 'common' for up to 1s
 2224 12:56:18.253542  Listened to connection for namespace 'common' for up to 1s
 2225 12:56:18.256968  Listened to connection for namespace 'common' for up to 1s
 2226 12:56:18.260337  Listened to connection for namespace 'common' for up to 1s
 2227 12:56:18.263607  Listened to connection for namespace 'common' for up to 1s
 2228 12:56:18.266873  Listened to connection for namespace 'common' for up to 1s
 2229 12:56:18.270180  Listened to connection for namespace 'common' for up to 1s
 2230 12:56:18.273503  Listened to connection for namespace 'common' for up to 1s
 2231 12:56:18.276731  Listened to connection for namespace 'common' for up to 1s
 2232 12:56:18.279939  Listened to connection for namespace 'common' for up to 1s
 2233 12:56:18.283288  Listened to connection for namespace 'common' for up to 1s
 2234 12:56:18.286803  Listened to connection for namespace 'common' for up to 1s
 2235 12:56:18.289864  Listened to connection for namespace 'common' for up to 1s
 2236 12:56:18.293176  Listened to connection for namespace 'common' for up to 1s
 2237 12:56:18.296492  Listened to connection for namespace 'common' for up to 1s
 2238 12:56:18.300160  Listened to connection for namespace 'common' for up to 1s
 2239 12:56:18.303065  Listened to connection for namespace 'common' for up to 1s
 2240 12:56:18.306192  Listened to connection for namespace 'common' for up to 1s
 2241 12:56:18.309934  Listened to connection for namespace 'common' for up to 1s
 2242 12:56:18.313077  Listened to connection for namespace 'common' for up to 1s
 2243 12:56:18.316338  Listened to connection for namespace 'common' for up to 1s
 2244 12:56:18.319543  Listened to connection for namespace 'common' for up to 1s
 2245 12:56:18.322732  Listened to connection for namespace 'common' for up to 1s
 2246 12:56:18.325770  Listened to connection for namespace 'common' for up to 1s
 2247 12:56:18.329489  Listened to connection for namespace 'common' for up to 1s
 2248 12:56:18.332852  Listened to connection for namespace 'common' for up to 1s
 2249 12:56:18.336270  Listened to connection for namespace 'common' for up to 1s
 2250 12:56:18.339512  Listened to connection for namespace 'common' for up to 1s
 2251 12:56:18.342177  Listened to connection for namespace 'common' for up to 1s
 2252 12:56:18.345592  Listened to connection for namespace 'common' for up to 1s
 2253 12:56:18.348845  Listened to connection for namespace 'common' for up to 1s
 2254 12:56:18.352227  Listened to connection for namespace 'common' for up to 1s
 2255 12:56:18.355379  Listened to connection for namespace 'common' for up to 1s
 2256 12:56:18.359319  Listened to connection for namespace 'common' for up to 1s
 2257 12:56:18.362196  Listened to connection for namespace 'common' for up to 1s
 2258 12:56:18.366055  Listened to connection for namespace 'common' for up to 1s
 2259 12:56:18.368684  Listened to connection for namespace 'common' for up to 1s
 2260 12:56:18.371949  Listened to connection for namespace 'common' for up to 1s
 2261 12:56:18.375931  Listened to connection for namespace 'common' for up to 1s
 2262 12:56:18.378569  Listened to connection for namespace 'common' for up to 1s
 2263 12:56:18.381933  Listened to connection for namespace 'common' for up to 1s
 2264 12:56:18.385291  Listened to connection for namespace 'common' for up to 1s
 2265 12:56:18.388733  Listened to connection for namespace 'common' for up to 1s
 2266 12:56:18.391831  Listened to connection for namespace 'common' for up to 1s
 2267 12:56:18.395075  Listened to connection for namespace 'common' for up to 1s
 2268 12:56:18.398352  Listened to connection for namespace 'common' for up to 1s
 2269 12:56:18.401626  Listened to connection for namespace 'common' for up to 1s
 2270 12:56:18.405000  Listened to connection for namespace 'common' for up to 1s
 2271 12:56:18.408362  Listened to connection for namespace 'common' for up to 1s
 2272 12:56:18.411626  Listened to connection for namespace 'common' for up to 1s
 2273 12:56:18.414792  Listened to connection for namespace 'common' for up to 1s
 2274 12:56:18.418565  Listened to connection for namespace 'common' for up to 1s
 2275 12:56:18.421660  Listened to connection for namespace 'common' for up to 1s
 2276 12:56:18.424922  Listened to connection for namespace 'common' for up to 1s
 2277 12:56:18.428238  Listened to connection for namespace 'common' for up to 1s
 2278 12:56:18.431493  Listened to connection for namespace 'common' for up to 1s
 2279 12:56:18.434616  Listened to connection for namespace 'common' for up to 1s
 2280 12:56:18.437928  Listened to connection for namespace 'common' for up to 1s
 2281 12:56:18.441205  Listened to connection for namespace 'common' for up to 1s
 2282 12:56:18.444503  Listened to connection for namespace 'common' for up to 1s
 2283 12:56:18.447698  Listened to connection for namespace 'common' for up to 1s
 2284 12:56:18.451147  Listened to connection for namespace 'common' for up to 1s
 2285 12:56:18.454503  Listened to connection for namespace 'common' for up to 1s
 2286 12:56:18.457807  Listened to connection for namespace 'common' for up to 1s
 2287 12:56:18.461142  Listened to connection for namespace 'common' for up to 1s
 2288 12:56:18.464443  Listened to connection for namespace 'common' for up to 1s
 2289 12:56:18.467757  Listened to connection for namespace 'common' for up to 1s
 2290 12:56:18.471090  Listened to connection for namespace 'common' for up to 1s
 2291 12:56:18.474486  Listened to connection for namespace 'common' for up to 1s
 2292 12:56:18.477779  Listened to connection for namespace 'common' for up to 1s
 2293 12:56:18.481191  Listened to connection for namespace 'common' for up to 1s
 2294 12:56:18.483942  Listened to connection for namespace 'common' for up to 1s
 2295 12:56:18.487335  Listened to connection for namespace 'common' for up to 1s
 2296 12:56:18.490719  Listened to connection for namespace 'common' for up to 1s
 2297 12:56:18.493989  Listened to connection for namespace 'common' for up to 1s
 2298 12:56:18.497380  Listened to connection for namespace 'common' for up to 1s
 2299 12:56:18.500501  Listened to connection for namespace 'common' for up to 1s
 2300 12:56:18.503693  Listened to connection for namespace 'common' for up to 1s
 2301 12:56:18.507113  Listened to connection for namespace 'common' for up to 1s
 2302 12:56:18.510416  Listened to connection for namespace 'common' for up to 1s
 2303 12:56:18.513754  Listened to connection for namespace 'common' for up to 1s
 2304 12:56:18.517138  Listened to connection for namespace 'common' for up to 1s
 2305 12:56:18.520408  Listened to connection for namespace 'common' for up to 1s
 2306 12:56:18.523605  Listened to connection for namespace 'common' for up to 1s
 2307 12:56:18.526682  Listened to connection for namespace 'common' for up to 1s
 2308 12:56:18.529899  Listened to connection for namespace 'common' for up to 1s
 2309 12:56:18.533373  Listened to connection for namespace 'common' for up to 1s
 2310 12:56:18.536470  Listened to connection for namespace 'common' for up to 1s
 2311 12:56:18.539757  Listened to connection for namespace 'common' for up to 1s
 2312 12:56:18.542992  Listened to connection for namespace 'common' for up to 1s
 2313 12:56:18.546774  Listened to connection for namespace 'common' for up to 1s
 2314 12:56:18.550080  Listened to connection for namespace 'common' for up to 1s
 2315 12:56:18.553376  Listened to connection for namespace 'common' for up to 1s
 2316 12:56:18.556042  Listened to connection for namespace 'common' for up to 1s
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 2513 12:56:19.204449  Listened to connection for namespace 'common' for up to 1s
 2514 12:56:19.206859  Finalising connection for namespace 'common'
 2515 12:56:19.206969  Disconnecting from shell: Finalise
 2516 12:56:19.207042  
 2517 12:56:19.307917  end: 5.2 read-feedback (duration 00:00:01) [common]
 2518 12:56:19.308064  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729812
 2519 12:56:19.314703  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729812
 2520 12:56:19.314831  JobError: Your job cannot terminate cleanly.