Boot log: dell-latitude-5400-4305U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:51:09.201286 lava-dispatcher, installed at version: 2023.01
2 12:51:09.201509 start: 0 validate
3 12:51:09.201657 Start time: 2023-03-22 12:51:09.201650+00:00 (UTC)
4 12:51:09.201806 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:51:09.201956 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:51:09.204508 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:51:09.204675 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:51:13.705026 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:51:13.705266 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
10 12:51:15.207211 validate duration: 6.01
12 12:51:15.207563 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:51:15.207774 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:51:15.207887 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:51:15.208003 Not decompressing ramdisk as can be used compressed.
16 12:51:15.208112 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:51:15.208188 saving as /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/ramdisk/rootfs.cpio.gz
18 12:51:15.208259 total size: 8429740 (8MB)
19 12:51:15.209276 progress 0% (0MB)
20 12:51:15.211762 progress 5% (0MB)
21 12:51:15.214260 progress 10% (0MB)
22 12:51:15.216743 progress 15% (1MB)
23 12:51:15.219219 progress 20% (1MB)
24 12:51:15.221764 progress 25% (2MB)
25 12:51:15.224268 progress 30% (2MB)
26 12:51:15.226740 progress 35% (2MB)
27 12:51:15.229079 progress 40% (3MB)
28 12:51:15.231758 progress 45% (3MB)
29 12:51:15.234236 progress 50% (4MB)
30 12:51:15.236751 progress 55% (4MB)
31 12:51:15.239067 progress 60% (4MB)
32 12:51:15.241615 progress 65% (5MB)
33 12:51:15.244853 progress 70% (5MB)
34 12:51:15.247146 progress 75% (6MB)
35 12:51:15.249587 progress 80% (6MB)
36 12:51:15.251887 progress 85% (6MB)
37 12:51:15.254212 progress 90% (7MB)
38 12:51:15.256493 progress 95% (7MB)
39 12:51:15.258779 progress 100% (8MB)
40 12:51:15.258932 8MB downloaded in 0.05s (158.66MB/s)
41 12:51:15.259109 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:51:15.259428 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:51:15.259528 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:51:15.259624 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:51:15.259744 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
47 12:51:15.259819 saving as /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/kernel/bzImage
48 12:51:15.259891 total size: 11878592 (11MB)
49 12:51:15.259959 No compression specified
50 12:51:15.260909 progress 0% (0MB)
51 12:51:15.264690 progress 5% (0MB)
52 12:51:15.267865 progress 10% (1MB)
53 12:51:15.271184 progress 15% (1MB)
54 12:51:15.274595 progress 20% (2MB)
55 12:51:15.277997 progress 25% (2MB)
56 12:51:15.281381 progress 30% (3MB)
57 12:51:15.284702 progress 35% (3MB)
58 12:51:15.288281 progress 40% (4MB)
59 12:51:15.291683 progress 45% (5MB)
60 12:51:15.295060 progress 50% (5MB)
61 12:51:15.298381 progress 55% (6MB)
62 12:51:15.301800 progress 60% (6MB)
63 12:51:15.305225 progress 65% (7MB)
64 12:51:15.308485 progress 70% (7MB)
65 12:51:15.311825 progress 75% (8MB)
66 12:51:15.315330 progress 80% (9MB)
67 12:51:15.318696 progress 85% (9MB)
68 12:51:15.321866 progress 90% (10MB)
69 12:51:15.325131 progress 95% (10MB)
70 12:51:15.328819 progress 100% (11MB)
71 12:51:15.329110 11MB downloaded in 0.07s (163.68MB/s)
72 12:51:15.329334 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:51:15.329612 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:51:15.329716 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:51:15.329819 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:51:15.329939 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
78 12:51:15.330021 saving as /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/modules/modules.tar
79 12:51:15.330095 total size: 1255052 (1MB)
80 12:51:15.330190 Using unxz to decompress xz
81 12:51:15.333451 progress 2% (0MB)
82 12:51:15.334170 progress 7% (0MB)
83 12:51:15.337868 progress 13% (0MB)
84 12:51:15.342545 progress 18% (0MB)
85 12:51:15.347035 progress 23% (0MB)
86 12:51:15.351500 progress 28% (0MB)
87 12:51:15.355993 progress 33% (0MB)
88 12:51:15.360424 progress 39% (0MB)
89 12:51:15.365260 progress 44% (0MB)
90 12:51:15.369659 progress 49% (0MB)
91 12:51:15.374211 progress 54% (0MB)
92 12:51:15.378634 progress 60% (0MB)
93 12:51:15.383017 progress 65% (0MB)
94 12:51:15.387560 progress 70% (0MB)
95 12:51:15.392066 progress 75% (0MB)
96 12:51:15.396486 progress 80% (0MB)
97 12:51:15.401203 progress 86% (1MB)
98 12:51:15.405728 progress 91% (1MB)
99 12:51:15.410212 progress 96% (1MB)
100 12:51:15.421214 1MB downloaded in 0.09s (13.14MB/s)
101 12:51:15.421807 end: 1.3.1 http-download (duration 00:00:00) [common]
103 12:51:15.422388 end: 1.3 download-retry (duration 00:00:00) [common]
104 12:51:15.422582 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
105 12:51:15.422778 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
106 12:51:15.422959 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
107 12:51:15.423154 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
108 12:51:15.423483 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny
109 12:51:15.423707 makedir: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin
110 12:51:15.423895 makedir: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/tests
111 12:51:15.424070 makedir: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/results
112 12:51:15.424283 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-add-keys
113 12:51:15.424536 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-add-sources
114 12:51:15.424769 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-background-process-start
115 12:51:15.425003 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-background-process-stop
116 12:51:15.425230 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-common-functions
117 12:51:15.425452 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-echo-ipv4
118 12:51:15.425686 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-install-packages
119 12:51:15.425901 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-installed-packages
120 12:51:15.426116 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-os-build
121 12:51:15.426337 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-probe-channel
122 12:51:15.426555 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-probe-ip
123 12:51:15.426789 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-target-ip
124 12:51:15.427017 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-target-mac
125 12:51:15.427256 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-target-storage
126 12:51:15.427497 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-case
127 12:51:15.427724 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-event
128 12:51:15.427951 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-feedback
129 12:51:15.428181 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-raise
130 12:51:15.428410 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-reference
131 12:51:15.428634 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-runner
132 12:51:15.428855 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-set
133 12:51:15.429079 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-test-shell
134 12:51:15.429315 Updating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-install-packages (oe)
135 12:51:15.429549 Updating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/bin/lava-installed-packages (oe)
136 12:51:15.429756 Creating /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/environment
137 12:51:15.429942 LAVA metadata
138 12:51:15.430098 - LAVA_JOB_ID=9729841
139 12:51:15.430245 - LAVA_DISPATCHER_IP=192.168.201.1
140 12:51:15.430470 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
141 12:51:15.430617 skipped lava-vland-overlay
142 12:51:15.430785 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
143 12:51:15.430969 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
144 12:51:15.431111 skipped lava-multinode-overlay
145 12:51:15.431271 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
146 12:51:15.431454 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
147 12:51:15.431619 Loading test definitions
148 12:51:15.431827 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
149 12:51:15.431988 Using /lava-9729841 at stage 0
150 12:51:15.432544 uuid=9729841_1.4.2.3.1 testdef=None
151 12:51:15.432734 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
152 12:51:15.432957 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
153 12:51:15.433989 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
155 12:51:15.434495 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
156 12:51:15.435721 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
158 12:51:15.436253 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
159 12:51:15.437448 runner path: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/0/tests/0_dmesg test_uuid 9729841_1.4.2.3.1
160 12:51:15.437742 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
162 12:51:15.438257 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
163 12:51:15.438415 Using /lava-9729841 at stage 1
164 12:51:15.438941 uuid=9729841_1.4.2.3.5 testdef=None
165 12:51:15.439130 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
166 12:51:15.439312 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
167 12:51:15.440390 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
169 12:51:15.440885 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
170 12:51:15.442111 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
172 12:51:15.442632 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
173 12:51:15.443810 runner path: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/1/tests/1_bootrr test_uuid 9729841_1.4.2.3.5
174 12:51:15.444091 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
176 12:51:15.444565 Creating lava-test-runner.conf files
177 12:51:15.444707 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/0 for stage 0
178 12:51:15.444879 - 0_dmesg
179 12:51:15.445037 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729841/lava-overlay-1ydthrny/lava-9729841/1 for stage 1
180 12:51:15.445211 - 1_bootrr
181 12:51:15.445401 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
182 12:51:15.445583 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
183 12:51:15.457929 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
184 12:51:15.458200 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
185 12:51:15.458392 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 12:51:15.458570 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
187 12:51:15.458728 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
188 12:51:15.666589 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 12:51:15.666971 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
190 12:51:15.667111 extracting modules file /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729841/extract-overlay-ramdisk-ig5e0h4w/ramdisk
191 12:51:15.697039 end: 1.4.4 extract-modules (duration 00:00:00) [common]
192 12:51:15.697223 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
193 12:51:15.697339 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729841/compress-overlay-d4xfzz73/overlay-1.4.2.4.tar.gz to ramdisk
194 12:51:15.697424 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729841/compress-overlay-d4xfzz73/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729841/extract-overlay-ramdisk-ig5e0h4w/ramdisk
195 12:51:15.702061 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
196 12:51:15.702217 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
197 12:51:15.702328 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
198 12:51:15.702429 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
199 12:51:15.702528 Building ramdisk /var/lib/lava/dispatcher/tmp/9729841/extract-overlay-ramdisk-ig5e0h4w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729841/extract-overlay-ramdisk-ig5e0h4w/ramdisk
200 12:51:15.797191 >> 62739 blocks
201 12:51:16.915338 rename /var/lib/lava/dispatcher/tmp/9729841/extract-overlay-ramdisk-ig5e0h4w/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
202 12:51:16.915790 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
203 12:51:16.915937 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
204 12:51:16.916058 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
205 12:51:16.916165 No mkimage arch provided, not using FIT.
206 12:51:16.916267 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
207 12:51:16.916371 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
208 12:51:16.916483 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
209 12:51:16.916588 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
210 12:51:16.916680 No LXC device requested
211 12:51:16.916775 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
212 12:51:16.916879 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
213 12:51:16.916975 end: 1.6 deploy-device-env (duration 00:00:00) [common]
214 12:51:16.917054 Checking files for TFTP limit of 4294967296 bytes.
215 12:51:16.917480 end: 1 tftp-deploy (duration 00:00:02) [common]
216 12:51:16.917602 start: 2 depthcharge-action (timeout 00:05:00) [common]
217 12:51:16.917710 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
218 12:51:16.917852 substitutions:
219 12:51:16.917933 - {DTB}: None
220 12:51:16.918008 - {INITRD}: 9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
221 12:51:16.918079 - {KERNEL}: 9729841/tftp-deploy-pypcys15/kernel/bzImage
222 12:51:16.918147 - {LAVA_MAC}: None
223 12:51:16.918213 - {PRESEED_CONFIG}: None
224 12:51:16.918280 - {PRESEED_LOCAL}: None
225 12:51:16.918345 - {RAMDISK}: 9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
226 12:51:16.918412 - {ROOT_PART}: None
227 12:51:16.918477 - {ROOT}: None
228 12:51:16.918542 - {SERVER_IP}: 192.168.201.1
229 12:51:16.918606 - {TEE}: None
230 12:51:16.918670 Parsed boot commands:
231 12:51:16.918737 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
232 12:51:16.918914 Parsed boot commands: tftpboot 192.168.201.1 9729841/tftp-deploy-pypcys15/kernel/bzImage 9729841/tftp-deploy-pypcys15/kernel/cmdline 9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
233 12:51:16.919020 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
234 12:51:16.919134 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
235 12:51:16.919245 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
236 12:51:16.919347 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
237 12:51:16.919430 Not connected, no need to disconnect.
238 12:51:16.919520 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
239 12:51:16.919615 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
240 12:51:16.919693 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-1'
241 12:51:16.922973 Setting prompt string to ['lava-test: # ']
242 12:51:16.923356 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
243 12:51:16.923482 end: 2.2.1 reset-connection (duration 00:00:00) [common]
244 12:51:16.923595 start: 2.2.2 reset-device (timeout 00:05:00) [common]
245 12:51:16.923702 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
246 12:51:16.923918 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
247 12:51:38.364316 >> Command sent successfully.
248 12:51:38.366886 Returned 0 in 21 seconds
249 12:51:38.467214 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
251 12:51:38.467585 end: 2.2.2 reset-device (duration 00:00:22) [common]
252 12:51:38.467706 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
253 12:51:38.467810 Setting prompt string to 'Starting depthcharge on sarien...'
254 12:51:38.467884 Changing prompt to 'Starting depthcharge on sarien...'
255 12:51:38.467974 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
256 12:51:38.468283 [Enter `^Ec?' for help]
257 12:51:38.468381
258 12:51:38.468483
259 12:51:38.468564 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
260 12:51:38.468639 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
261 12:51:38.468722 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
262 12:51:38.468792 CPU: AES supported, TXT NOT supported, VT supported
263 12:51:38.468861 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
264 12:51:38.468928 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
265 12:51:38.469005 IGD: device id 3ea1 (rev 02) is Unknown
266 12:51:38.469072 VBOOT: Loading verstage.
267 12:51:38.469138 CBFS @ 1d00000 size 300000
268 12:51:38.469202 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
269 12:51:38.469286 CBFS: Locating 'fallback/verstage'
270 12:51:38.469352 CBFS: Found @ offset 10f6c0 size 1435c
271 12:51:38.469417
272 12:51:38.469481
273 12:51:38.469563 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
274 12:51:38.469630 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
275 12:51:38.469696 done! DID_VID 0x00281ae0
276 12:51:38.469762 TPM ready after 0 ms
277 12:51:38.469837 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
278 12:51:38.469902 tlcl_send_startup: Startup return code is 0
279 12:51:38.469966 TPM: setup succeeded
280 12:51:38.470040 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
281 12:51:38.470106 Checking cr50 for recovery request
282 12:51:38.470171 Phase 1
283 12:51:38.470234 FMAP: Found "FLASH" version 1.1 at 1c10000.
284 12:51:38.470312 FMAP: base = fe000000 size = 2000000 #areas = 37
285 12:51:38.470385 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 12:51:38.470454 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 12:51:38.470530 Phase 2
288 12:51:38.470598 Phase 3
289 12:51:38.470666 FMAP: area GBB found @ 1c11000 (978944 bytes)
290 12:51:38.470731 VB2:vb2_report_dev_firmware() This is developer signed firmware
291 12:51:38.470808 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
292 12:51:38.470874 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
293 12:51:38.470939 VB2:vb2_verify_keyblock() Checking key block signature...
294 12:51:38.471011 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
295 12:51:38.471079 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
296 12:51:38.471160 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 12:51:38.471223 Phase 4
298 12:51:38.471301 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
299 12:51:38.471374 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
300 12:51:38.471440 VB2:vb2_rsa_verify_digest() Digest check failed!
301 12:51:38.471515 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
302 12:51:38.471580 Saving nvdata
303 12:51:38.471644 Reboot requested (10020007)
304 12:51:38.471708 board_reset() called!
305 12:51:38.471785 full_reset() called!
306 12:51:40.531759
307 12:51:40.531912
308 12:51:40.540153 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
309 12:51:40.544285 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
310 12:51:40.549431 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
311 12:51:40.554970 CPU: AES supported, TXT NOT supported, VT supported
312 12:51:40.559915 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
313 12:51:40.564469 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
314 12:51:40.569413 IGD: device id 3ea1 (rev 02) is Unknown
315 12:51:40.572927 VBOOT: Loading verstage.
316 12:51:40.575726 CBFS @ 1d00000 size 300000
317 12:51:40.581050 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
318 12:51:40.585061 CBFS: Locating 'fallback/verstage'
319 12:51:40.588835 CBFS: Found @ offset 10f6c0 size 1435c
320 12:51:40.603058
321 12:51:40.603191
322 12:51:40.611448 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
323 12:51:40.618159 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
324 12:51:40.621701 done! DID_VID 0x00281ae0
325 12:51:40.623690 TPM ready after 0 ms
326 12:51:40.627363 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
327 12:51:40.717549 tlcl_send_startup: Startup return code is 0
328 12:51:40.719639 TPM: setup succeeded
329 12:51:40.737164 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
330 12:51:40.740810 Checking cr50 for recovery request
331 12:51:40.750127 Phase 1
332 12:51:40.754522 FMAP: Found "FLASH" version 1.1 at 1c10000.
333 12:51:40.759304 FMAP: base = fe000000 size = 2000000 #areas = 37
334 12:51:40.763820 FMAP: area GBB found @ 1c11000 (978944 bytes)
335 12:51:40.771554 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 12:51:40.778163 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 12:51:40.781209 Recovery requested (1009000e)
338 12:51:40.782765 Saving nvdata
339 12:51:40.798394 tlcl_extend: response is 0
340 12:51:40.814132 tlcl_extend: response is 0
341 12:51:40.817729 CBFS @ 1d00000 size 300000
342 12:51:40.823571 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
343 12:51:40.827690 CBFS: Locating 'fallback/romstage'
344 12:51:40.831162 CBFS: Found @ offset 80 size 15b2c
345 12:51:40.832463
346 12:51:40.833152
347 12:51:40.841501 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
348 12:51:40.846442 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
349 12:51:40.850185 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
350 12:51:40.854394 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
351 12:51:40.859268 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
352 12:51:40.863427 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
353 12:51:40.865553 TCO_STS: 0000 0004
354 12:51:40.868341 GEN_PMCON: d0015209 00002200
355 12:51:40.871456 GBLRST_CAUSE: 00000000 00000000
356 12:51:40.873653 prev_sleep_state 5
357 12:51:40.877243 Boot Count incremented to 17976
358 12:51:40.880697 CBFS @ 1d00000 size 300000
359 12:51:40.886522 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
360 12:51:40.889404 CBFS: Locating 'fspm.bin'
361 12:51:40.893653 CBFS: Found @ offset 60fc0 size 70000
362 12:51:40.898618 FMAP: Found "FLASH" version 1.1 at 1c10000.
363 12:51:40.903657 FMAP: base = fe000000 size = 2000000 #areas = 37
364 12:51:40.909799 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
365 12:51:40.915697 Probing TPM I2C: done! DID_VID 0x00281ae0
366 12:51:40.918441 Locality already claimed
367 12:51:40.921881 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
368 12:51:40.939864 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
369 12:51:40.946928 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
370 12:51:40.949787 MRC cache found, size 18e0
371 12:51:40.951419 bootmode is set to :2
372 12:51:41.040413 CBMEM:
373 12:51:41.043167 IMD: root @ 89fff000 254 entries.
374 12:51:41.046712 IMD: root @ 89ffec00 62 entries.
375 12:51:41.049557 External stage cache:
376 12:51:41.052928 IMD: root @ 8abff000 254 entries.
377 12:51:41.056485 IMD: root @ 8abfec00 62 entries.
378 12:51:41.062030 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
379 12:51:41.065542 creating vboot_handoff structure
380 12:51:41.086867 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
381 12:51:41.102148 tlcl_write: response is 0
382 12:51:41.120810 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
383 12:51:41.125613 MRC: TPM MRC hash updated successfully.
384 12:51:41.126969 1 DIMMs found
385 12:51:41.128567 top_of_ram = 0x8a000000
386 12:51:41.134419 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
387 12:51:41.139244 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 12:51:41.141933 CBFS @ 1d00000 size 300000
389 12:51:41.148373 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
390 12:51:41.151777 CBFS: Locating 'fallback/postcar'
391 12:51:41.156033 CBFS: Found @ offset 107000 size 41a4
392 12:51:41.162324 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
393 12:51:41.172824 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
394 12:51:41.177825 Processing 126 relocs. Offset value of 0x87cdd000
395 12:51:41.179422
396 12:51:41.179515
397 12:51:41.188249 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
398 12:51:41.190444 CBFS @ 1d00000 size 300000
399 12:51:41.197270 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
400 12:51:41.200927 CBFS: Locating 'fallback/ramstage'
401 12:51:41.205198 CBFS: Found @ offset 458c0 size 1a8a8
402 12:51:41.211595 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
403 12:51:41.238244 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
404 12:51:41.243059 Processing 3754 relocs. Offset value of 0x88e81000
405 12:51:41.249032
406 12:51:41.249136
407 12:51:41.257498 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
408 12:51:41.261294 FMAP: Found "FLASH" version 1.1 at 1c10000.
409 12:51:41.266015 FMAP: base = fe000000 size = 2000000 #areas = 37
410 12:51:41.271824 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
411 12:51:41.276146 WARNING: RO_VPD is uninitialized or empty.
412 12:51:41.280507 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
413 12:51:41.285047 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
414 12:51:41.286955 Normal boot.
415 12:51:41.293161 BS: BS_PRE_DEVICE times (us): entry 0 run 56 exit 1161
416 12:51:41.295904 CBFS @ 1d00000 size 300000
417 12:51:41.302743 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
418 12:51:41.306395 CBFS: Locating 'cpu_microcode_blob.bin'
419 12:51:41.310697 CBFS: Found @ offset 15c40 size 2fc00
420 12:51:41.314565 microcode: sig=0x806ec pf=0x80 revision=0xb7
421 12:51:41.317254 Skip microcode update
422 12:51:41.319994 CBFS @ 1d00000 size 300000
423 12:51:41.326333 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
424 12:51:41.329166 CBFS: Locating 'fsps.bin'
425 12:51:41.333428 CBFS: Found @ offset d1fc0 size 35000
426 12:51:41.367208 Detected 2 core, 2 thread CPU.
427 12:51:41.369260 Setting up SMI for CPU
428 12:51:41.371567 IED base = 0x8ac00000
429 12:51:41.374369 IED size = 0x00400000
430 12:51:41.377240 Will perform SMM setup.
431 12:51:41.381586 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
432 12:51:41.389461 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
433 12:51:41.394407 Processing 16 relocs. Offset value of 0x00030000
434 12:51:41.397200 Attempting to start 1 APs
435 12:51:41.400675 Waiting for 10ms after sending INIT.
436 12:51:41.414560 Waiting for 1st SIPI to complete...done.
437 12:51:41.416120 AP: slot 1 apic_id 2.
438 12:51:41.420914 Waiting for 2nd SIPI to complete...done.
439 12:51:41.428783 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
440 12:51:41.433933 Processing 13 relocs. Offset value of 0x00038000
441 12:51:41.440433 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
442 12:51:41.443765 Installing SMM handler to 0x8a000000
443 12:51:41.451793 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
444 12:51:41.457337 Processing 867 relocs. Offset value of 0x8a010000
445 12:51:41.465558 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
446 12:51:41.470501 Processing 13 relocs. Offset value of 0x8a008000
447 12:51:41.476185 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
448 12:51:41.482659 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
449 12:51:41.485465 Clearing SMI status registers
450 12:51:41.486872 SMI_STS: PM1
451 12:51:41.489030 PM1_STS: WAK PWRBTN
452 12:51:41.491930 TCO_STS: BOOT SECOND_TO
453 12:51:41.493591 GPE0 STD STS: eSPI
454 12:51:41.496252 New SMBASE 0x8a000000
455 12:51:41.499141 In relocation handler: CPU 0
456 12:51:41.503371 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
457 12:51:41.508195 Writing SMRR. base = 0x8a000006, mask=0xff000800
458 12:51:41.510227 Relocation complete.
459 12:51:41.511809 New SMBASE 0x89fffc00
460 12:51:41.514688 In relocation handler: CPU 1
461 12:51:41.519109 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
462 12:51:41.524005 Writing SMRR. base = 0x8a000006, mask=0xff000800
463 12:51:41.526211 Relocation complete.
464 12:51:41.527801 Initializing CPU #0
465 12:51:41.531840 CPU: vendor Intel device 806ec
466 12:51:41.535514 CPU: family 06, model 8e, stepping 0c
467 12:51:41.538385 Clearing out pending MCEs
468 12:51:41.542605 Setting up local APIC... apic_id: 0x00 done.
469 12:51:41.545525 Turbo is available but hidden
470 12:51:41.548147 Turbo has been enabled
471 12:51:41.550214 VMX status: enabled
472 12:51:41.553594 IA32_FEATURE_CONTROL status: locked
473 12:51:41.555125 Skip microcode update
474 12:51:41.558376 CPU #0 initialized
475 12:51:41.559966 Initializing CPU #1
476 12:51:41.563140 CPU: vendor Intel device 806ec
477 12:51:41.567041 CPU: family 06, model 8e, stepping 0c
478 12:51:41.569857 Clearing out pending MCEs
479 12:51:41.574216 Setting up local APIC... apic_id: 0x02 done.
480 12:51:41.576404 VMX status: enabled
481 12:51:41.580033 IA32_FEATURE_CONTROL status: locked
482 12:51:41.582206 Skip microcode update
483 12:51:41.584383 CPU #1 initialized
484 12:51:41.588134 bsp_do_flight_plan done after 163 msecs.
485 12:51:41.591563 CPU: frequency set to 2200 MHz
486 12:51:41.592945 Enabling SMIs.
487 12:51:41.594353 Locking SMM.
488 12:51:41.597902 CBFS @ 1d00000 size 300000
489 12:51:41.603124 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
490 12:51:41.606492 CBFS: Locating 'vbt.bin'
491 12:51:41.609901 CBFS: Found @ offset 60a40 size 4a0
492 12:51:41.615699 Found a VBT of 4608 bytes after decompression
493 12:51:41.628241 FMAP: area GBB found @ 1c11000 (978944 bytes)
494 12:51:41.745331 Detected 2 core, 2 thread CPU.
495 12:51:41.749694 Detected 2 core, 2 thread CPU.
496 12:51:41.976452 Display FSP Version Info HOB
497 12:51:41.979115 Reference Code - CPU = 7.0.5e.40
498 12:51:41.982090 uCode Version = 0.0.0.b8
499 12:51:41.985370 Display FSP Version Info HOB
500 12:51:41.988708 Reference Code - ME = 7.0.5e.40
501 12:51:41.990807 MEBx version = 0.0.0.0
502 12:51:41.994389 ME Firmware Version = Consumer SKU
503 12:51:41.997167 Display FSP Version Info HOB
504 12:51:42.000745 Reference Code - CNL PCH = 7.0.5e.40
505 12:51:42.003598 PCH-CRID Status = Disabled
506 12:51:42.007268 CNL PCH H A0 Hsio Version = 2.0.0.0
507 12:51:42.010463 CNL PCH H Ax Hsio Version = 9.0.0.0
508 12:51:42.014594 CNL PCH H Bx Hsio Version = a.0.0.0
509 12:51:42.018137 CNL PCH LP B0 Hsio Version = 7.0.0.0
510 12:51:42.021643 CNL PCH LP Bx Hsio Version = 6.0.0.0
511 12:51:42.024831 CNL PCH LP Dx Hsio Version = 7.0.0.0
512 12:51:42.028154 Display FSP Version Info HOB
513 12:51:42.033245 Reference Code - SA - System Agent = 7.0.5e.40
514 12:51:42.036040 Reference Code - MRC = 0.7.1.68
515 12:51:42.039040 SA - PCIe Version = 7.0.5e.40
516 12:51:42.042217 SA-CRID Status = Disabled
517 12:51:42.045142 SA-CRID Original Value = 0.0.0.c
518 12:51:42.047874 SA-CRID New Value = 0.0.0.c
519 12:51:42.066152 RTC Init
520 12:51:42.071245 Set power off after power failure.
521 12:51:42.072741 Disabling Deep S3
522 12:51:42.073982 Disabling Deep S3
523 12:51:42.076099 Disabling Deep S4
524 12:51:42.076972 Disabling Deep S4
525 12:51:42.079577 Disabling Deep S5
526 12:51:42.081679 Disabling Deep S5
527 12:51:42.088087 BS: BS_DEV_INIT_CHIPS times (us): entry 301031 run 470615 exit 16231
528 12:51:42.090670 Enumerating buses...
529 12:51:42.094886 Show all devs... Before device enumeration.
530 12:51:42.096426 Root Device: enabled 1
531 12:51:42.099399 CPU_CLUSTER: 0: enabled 1
532 12:51:42.102120 DOMAIN: 0000: enabled 1
533 12:51:42.104258 APIC: 00: enabled 1
534 12:51:42.106575 PCI: 00:00.0: enabled 1
535 12:51:42.109265 PCI: 00:02.0: enabled 1
536 12:51:42.110715 PCI: 00:04.0: enabled 1
537 12:51:42.114209 PCI: 00:12.0: enabled 1
538 12:51:42.116303 PCI: 00:12.5: enabled 0
539 12:51:42.119195 PCI: 00:12.6: enabled 0
540 12:51:42.121263 PCI: 00:13.0: enabled 0
541 12:51:42.124218 PCI: 00:14.0: enabled 1
542 12:51:42.126232 PCI: 00:14.1: enabled 0
543 12:51:42.128456 PCI: 00:14.3: enabled 1
544 12:51:42.131185 PCI: 00:14.5: enabled 0
545 12:51:42.132784 PCI: 00:15.0: enabled 1
546 12:51:42.136205 PCI: 00:15.1: enabled 1
547 12:51:42.138377 PCI: 00:15.2: enabled 0
548 12:51:42.141079 PCI: 00:15.3: enabled 0
549 12:51:42.142519 PCI: 00:16.0: enabled 1
550 12:51:42.145479 PCI: 00:16.1: enabled 0
551 12:51:42.148312 PCI: 00:16.2: enabled 0
552 12:51:42.150267 PCI: 00:16.3: enabled 0
553 12:51:42.152467 PCI: 00:16.4: enabled 0
554 12:51:42.155667 PCI: 00:16.5: enabled 0
555 12:51:42.157764 PCI: 00:17.0: enabled 1
556 12:51:42.160449 PCI: 00:19.0: enabled 1
557 12:51:42.161960 PCI: 00:19.1: enabled 0
558 12:51:42.164747 PCI: 00:19.2: enabled 1
559 12:51:42.166828 PCI: 00:1a.0: enabled 0
560 12:51:42.169914 PCI: 00:1c.0: enabled 1
561 12:51:42.172277 PCI: 00:1c.1: enabled 0
562 12:51:42.174401 PCI: 00:1c.2: enabled 0
563 12:51:42.177131 PCI: 00:1c.3: enabled 0
564 12:51:42.179310 PCI: 00:1c.4: enabled 0
565 12:51:42.182085 PCI: 00:1c.5: enabled 0
566 12:51:42.184742 PCI: 00:1c.6: enabled 0
567 12:51:42.186926 PCI: 00:1c.7: enabled 1
568 12:51:42.189003 PCI: 00:1d.0: enabled 1
569 12:51:42.191709 PCI: 00:1d.1: enabled 1
570 12:51:42.194464 PCI: 00:1d.2: enabled 0
571 12:51:42.196072 PCI: 00:1d.3: enabled 0
572 12:51:42.199440 PCI: 00:1d.4: enabled 1
573 12:51:42.201611 PCI: 00:1e.0: enabled 0
574 12:51:42.204448 PCI: 00:1e.1: enabled 0
575 12:51:42.206481 PCI: 00:1e.2: enabled 0
576 12:51:42.208691 PCI: 00:1e.3: enabled 0
577 12:51:42.211661 PCI: 00:1f.0: enabled 1
578 12:51:42.213729 PCI: 00:1f.1: enabled 1
579 12:51:42.216527 PCI: 00:1f.2: enabled 1
580 12:51:42.218610 PCI: 00:1f.3: enabled 1
581 12:51:42.221467 PCI: 00:1f.4: enabled 1
582 12:51:42.223568 PCI: 00:1f.5: enabled 1
583 12:51:42.225588 PCI: 00:1f.6: enabled 1
584 12:51:42.228441 USB0 port 0: enabled 1
585 12:51:42.230618 I2C: 00:10: enabled 1
586 12:51:42.232223 I2C: 00:10: enabled 1
587 12:51:42.234362 I2C: 00:34: enabled 1
588 12:51:42.237087 I2C: 00:2c: enabled 1
589 12:51:42.239148 I2C: 00:50: enabled 1
590 12:51:42.241471 PNP: 0c09.0: enabled 1
591 12:51:42.244094 USB2 port 0: enabled 1
592 12:51:42.246133 USB2 port 1: enabled 1
593 12:51:42.249149 USB2 port 2: enabled 1
594 12:51:42.251320 USB2 port 4: enabled 1
595 12:51:42.253490 USB2 port 5: enabled 1
596 12:51:42.255109 USB2 port 6: enabled 1
597 12:51:42.258419 USB2 port 7: enabled 1
598 12:51:42.260514 USB2 port 8: enabled 1
599 12:51:42.262479 USB2 port 9: enabled 1
600 12:51:42.265228 USB3 port 0: enabled 1
601 12:51:42.267297 USB3 port 1: enabled 1
602 12:51:42.269392 USB3 port 2: enabled 1
603 12:51:42.271920 USB3 port 3: enabled 1
604 12:51:42.274092 USB3 port 4: enabled 1
605 12:51:42.276091 APIC: 02: enabled 1
606 12:51:42.278604 Compare with tree...
607 12:51:42.281280 Root Device: enabled 1
608 12:51:42.283403 CPU_CLUSTER: 0: enabled 1
609 12:51:42.286103 APIC: 00: enabled 1
610 12:51:42.288198 APIC: 02: enabled 1
611 12:51:42.290930 DOMAIN: 0000: enabled 1
612 12:51:42.293649 PCI: 00:00.0: enabled 1
613 12:51:42.295102 PCI: 00:02.0: enabled 1
614 12:51:42.298451 PCI: 00:04.0: enabled 1
615 12:51:42.301512 PCI: 00:12.0: enabled 1
616 12:51:42.303114 PCI: 00:12.5: enabled 0
617 12:51:42.306438 PCI: 00:12.6: enabled 0
618 12:51:42.309303 PCI: 00:13.0: enabled 0
619 12:51:42.311503 PCI: 00:14.0: enabled 1
620 12:51:42.314063 USB0 port 0: enabled 1
621 12:51:42.317036 USB2 port 0: enabled 1
622 12:51:42.319831 USB2 port 1: enabled 1
623 12:51:42.322694 USB2 port 2: enabled 1
624 12:51:42.325028 USB2 port 4: enabled 1
625 12:51:42.328432 USB2 port 5: enabled 1
626 12:51:42.330602 USB2 port 6: enabled 1
627 12:51:42.333494 USB2 port 7: enabled 1
628 12:51:42.336273 USB2 port 8: enabled 1
629 12:51:42.339027 USB2 port 9: enabled 1
630 12:51:42.341224 USB3 port 0: enabled 1
631 12:51:42.344146 USB3 port 1: enabled 1
632 12:51:42.346969 USB3 port 2: enabled 1
633 12:51:42.349771 USB3 port 3: enabled 1
634 12:51:42.352613 USB3 port 4: enabled 1
635 12:51:42.354810 PCI: 00:14.1: enabled 0
636 12:51:42.357615 PCI: 00:14.3: enabled 1
637 12:51:42.360626 PCI: 00:14.5: enabled 0
638 12:51:42.362108 PCI: 00:15.0: enabled 1
639 12:51:42.364944 I2C: 00:10: enabled 1
640 12:51:42.368285 I2C: 00:10: enabled 1
641 12:51:42.370393 I2C: 00:34: enabled 1
642 12:51:42.372961 PCI: 00:15.1: enabled 1
643 12:51:42.375557 I2C: 00:2c: enabled 1
644 12:51:42.377689 PCI: 00:15.2: enabled 0
645 12:51:42.380862 PCI: 00:15.3: enabled 0
646 12:51:42.383189 PCI: 00:16.0: enabled 1
647 12:51:42.386460 PCI: 00:16.1: enabled 0
648 12:51:42.388512 PCI: 00:16.2: enabled 0
649 12:51:42.390785 PCI: 00:16.3: enabled 0
650 12:51:42.394125 PCI: 00:16.4: enabled 0
651 12:51:42.396920 PCI: 00:16.5: enabled 0
652 12:51:42.399531 PCI: 00:17.0: enabled 1
653 12:51:42.401718 PCI: 00:19.0: enabled 1
654 12:51:42.404130 I2C: 00:50: enabled 1
655 12:51:42.406902 PCI: 00:19.1: enabled 0
656 12:51:42.409806 PCI: 00:19.2: enabled 1
657 12:51:42.411919 PCI: 00:1a.0: enabled 0
658 12:51:42.414812 PCI: 00:1c.0: enabled 1
659 12:51:42.417750 PCI: 00:1c.1: enabled 0
660 12:51:42.419872 PCI: 00:1c.2: enabled 0
661 12:51:42.422705 PCI: 00:1c.3: enabled 0
662 12:51:42.425027 PCI: 00:1c.4: enabled 0
663 12:51:42.427220 PCI: 00:1c.5: enabled 0
664 12:51:42.430599 PCI: 00:1c.6: enabled 0
665 12:51:42.433514 PCI: 00:1c.7: enabled 1
666 12:51:42.435125 PCI: 00:1d.0: enabled 1
667 12:51:42.438618 PCI: 00:1d.1: enabled 1
668 12:51:42.441425 PCI: 00:1d.2: enabled 0
669 12:51:42.443611 PCI: 00:1d.3: enabled 0
670 12:51:42.446394 PCI: 00:1d.4: enabled 1
671 12:51:42.449209 PCI: 00:1e.0: enabled 0
672 12:51:42.451984 PCI: 00:1e.1: enabled 0
673 12:51:42.454141 PCI: 00:1e.2: enabled 0
674 12:51:42.456975 PCI: 00:1e.3: enabled 0
675 12:51:42.459832 PCI: 00:1f.0: enabled 1
676 12:51:42.461825 PNP: 0c09.0: enabled 1
677 12:51:42.464650 PCI: 00:1f.1: enabled 1
678 12:51:42.467573 PCI: 00:1f.2: enabled 1
679 12:51:42.470445 PCI: 00:1f.3: enabled 1
680 12:51:42.472425 PCI: 00:1f.4: enabled 1
681 12:51:42.475217 PCI: 00:1f.5: enabled 1
682 12:51:42.477785 PCI: 00:1f.6: enabled 1
683 12:51:42.480586 Root Device scanning...
684 12:51:42.483828 root_dev_scan_bus for Root Device
685 12:51:42.485906 CPU_CLUSTER: 0 enabled
686 12:51:42.488133 DOMAIN: 0000 enabled
687 12:51:42.490838 DOMAIN: 0000 scanning...
688 12:51:42.493802 PCI: pci_scan_bus for bus 00
689 12:51:42.496650 PCI: 00:00.0 [8086/0000] ops
690 12:51:42.500534 PCI: 00:00.0 [8086/3e35] enabled
691 12:51:42.502727 PCI: 00:02.0 [8086/0000] ops
692 12:51:42.506683 PCI: 00:02.0 [8086/3ea1] enabled
693 12:51:42.509435 PCI: 00:04.0 [8086/1903] enabled
694 12:51:42.513621 PCI: 00:08.0 [8086/1911] enabled
695 12:51:42.517085 PCI: 00:12.0 [8086/9df9] enabled
696 12:51:42.519498 PCI: 00:14.0 [8086/0000] bus ops
697 12:51:42.523602 PCI: 00:14.0 [8086/9ded] enabled
698 12:51:42.526537 PCI: 00:14.2 [8086/9def] enabled
699 12:51:42.530166 PCI: 00:14.3 [8086/9df0] enabled
700 12:51:42.533183 PCI: 00:15.0 [8086/0000] bus ops
701 12:51:42.536564 PCI: 00:15.0 [8086/9de8] enabled
702 12:51:42.540113 PCI: 00:15.1 [8086/0000] bus ops
703 12:51:42.543715 PCI: 00:15.1 [8086/9de9] enabled
704 12:51:42.546528 PCI: 00:16.0 [8086/0000] ops
705 12:51:42.548715 PCI: 00:16.0 [8086/9de0] enabled
706 12:51:42.552859 PCI: 00:17.0 [8086/0000] ops
707 12:51:42.555720 PCI: 00:17.0 [8086/9dd3] enabled
708 12:51:42.559424 PCI: 00:19.0 [8086/0000] bus ops
709 12:51:42.562219 PCI: 00:19.0 [8086/9dc5] enabled
710 12:51:42.565261 PCI: 00:19.2 [8086/0000] ops
711 12:51:42.568676 PCI: 00:19.2 [8086/9dc7] enabled
712 12:51:42.572203 PCI: 00:1c.0 [8086/0000] bus ops
713 12:51:42.575668 PCI: 00:1c.0 [8086/9dbf] enabled
714 12:51:42.581076 PCI: Static device PCI: 00:1c.7 not found, disabling it.
715 12:51:42.584000 PCI: 00:1d.0 [8086/0000] bus ops
716 12:51:42.587424 PCI: 00:1d.0 [8086/9db4] enabled
717 12:51:42.593475 PCI: Static device PCI: 00:1d.1 not found, disabling it.
718 12:51:42.598930 PCI: Static device PCI: 00:1d.4 not found, disabling it.
719 12:51:42.602008 PCI: 00:1f.0 [8086/0000] bus ops
720 12:51:42.604927 PCI: 00:1f.0 [8086/9d84] enabled
721 12:51:42.611181 PCI: Static device PCI: 00:1f.1 not found, disabling it.
722 12:51:42.616788 PCI: Static device PCI: 00:1f.2 not found, disabling it.
723 12:51:42.620328 PCI: 00:1f.3 [8086/0000] bus ops
724 12:51:42.623825 PCI: 00:1f.3 [8086/9dc8] enabled
725 12:51:42.626186 PCI: 00:1f.4 [8086/0000] bus ops
726 12:51:42.630394 PCI: 00:1f.4 [8086/9da3] enabled
727 12:51:42.633185 PCI: 00:1f.5 [8086/0000] bus ops
728 12:51:42.636760 PCI: 00:1f.5 [8086/9da4] enabled
729 12:51:42.640386 PCI: 00:1f.6 [8086/15be] enabled
730 12:51:42.643244 PCI: Leftover static devices:
731 12:51:42.644667 PCI: 00:12.5
732 12:51:42.645566 PCI: 00:12.6
733 12:51:42.647538 PCI: 00:13.0
734 12:51:42.648963 PCI: 00:14.1
735 12:51:42.650397 PCI: 00:14.5
736 12:51:42.650665 PCI: 00:15.2
737 12:51:42.651948 PCI: 00:15.3
738 12:51:42.653915 PCI: 00:16.1
739 12:51:42.655370 PCI: 00:16.2
740 12:51:42.656677 PCI: 00:16.3
741 12:51:42.658026 PCI: 00:16.4
742 12:51:42.659433 PCI: 00:16.5
743 12:51:42.660869 PCI: 00:19.1
744 12:51:42.662321 PCI: 00:1a.0
745 12:51:42.663718 PCI: 00:1c.1
746 12:51:42.665075 PCI: 00:1c.2
747 12:51:42.665998 PCI: 00:1c.3
748 12:51:42.668019 PCI: 00:1c.4
749 12:51:42.669464 PCI: 00:1c.5
750 12:51:42.670149 PCI: 00:1c.6
751 12:51:42.671598 PCI: 00:1c.7
752 12:51:42.672570 PCI: 00:1d.1
753 12:51:42.674369 PCI: 00:1d.2
754 12:51:42.675764 PCI: 00:1d.3
755 12:51:42.676615 PCI: 00:1d.4
756 12:51:42.678397 PCI: 00:1e.0
757 12:51:42.679828 PCI: 00:1e.1
758 12:51:42.681188 PCI: 00:1e.2
759 12:51:42.682698 PCI: 00:1e.3
760 12:51:42.684138 PCI: 00:1f.1
761 12:51:42.685539 PCI: 00:1f.2
762 12:51:42.688202 PCI: Check your devicetree.cb.
763 12:51:42.690899 PCI: 00:14.0 scanning...
764 12:51:42.694377 scan_usb_bus for PCI: 00:14.0
765 12:51:42.696490 USB0 port 0 enabled
766 12:51:42.698038 USB0 port 0 scanning...
767 12:51:42.701912 scan_usb_bus for USB0 port 0
768 12:51:42.703385 USB2 port 0 enabled
769 12:51:42.705988 USB2 port 1 enabled
770 12:51:42.708046 USB2 port 2 enabled
771 12:51:42.710112 USB2 port 4 enabled
772 12:51:42.711988 USB2 port 5 enabled
773 12:51:42.713969 USB2 port 6 enabled
774 12:51:42.715576 USB2 port 7 enabled
775 12:51:42.718748 USB2 port 8 enabled
776 12:51:42.720099 USB2 port 9 enabled
777 12:51:42.722144 USB3 port 0 enabled
778 12:51:42.724264 USB3 port 1 enabled
779 12:51:42.726324 USB3 port 2 enabled
780 12:51:42.728516 USB3 port 3 enabled
781 12:51:42.730679 USB3 port 4 enabled
782 12:51:42.733521 USB2 port 0 scanning...
783 12:51:42.736458 scan_usb_bus for USB2 port 0
784 12:51:42.739967 scan_usb_bus for USB2 port 0 done
785 12:51:42.745075 scan_bus: scanning of bus USB2 port 0 took 9060 usecs
786 12:51:42.747360 USB2 port 1 scanning...
787 12:51:42.750900 scan_usb_bus for USB2 port 1
788 12:51:42.754540 scan_usb_bus for USB2 port 1 done
789 12:51:42.759543 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
790 12:51:42.761196 USB2 port 2 scanning...
791 12:51:42.765353 scan_usb_bus for USB2 port 2
792 12:51:42.768283 scan_usb_bus for USB2 port 2 done
793 12:51:42.773577 scan_bus: scanning of bus USB2 port 2 took 9060 usecs
794 12:51:42.775788 USB2 port 4 scanning...
795 12:51:42.779862 scan_usb_bus for USB2 port 4
796 12:51:42.783414 scan_usb_bus for USB2 port 4 done
797 12:51:42.788459 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
798 12:51:42.790578 USB2 port 5 scanning...
799 12:51:42.794150 scan_usb_bus for USB2 port 5
800 12:51:42.797688 scan_usb_bus for USB2 port 5 done
801 12:51:42.802547 scan_bus: scanning of bus USB2 port 5 took 9061 usecs
802 12:51:42.805334 USB2 port 6 scanning...
803 12:51:42.808657 scan_usb_bus for USB2 port 6
804 12:51:42.811888 scan_usb_bus for USB2 port 6 done
805 12:51:42.816728 scan_bus: scanning of bus USB2 port 6 took 9062 usecs
806 12:51:42.819775 USB2 port 7 scanning...
807 12:51:42.823125 scan_usb_bus for USB2 port 7
808 12:51:42.825882 scan_usb_bus for USB2 port 7 done
809 12:51:42.831553 scan_bus: scanning of bus USB2 port 7 took 9062 usecs
810 12:51:42.834315 USB2 port 8 scanning...
811 12:51:42.837099 scan_usb_bus for USB2 port 8
812 12:51:42.840508 scan_usb_bus for USB2 port 8 done
813 12:51:42.846264 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
814 12:51:42.848425 USB2 port 9 scanning...
815 12:51:42.851954 scan_usb_bus for USB2 port 9
816 12:51:42.855387 scan_usb_bus for USB2 port 9 done
817 12:51:42.860079 scan_bus: scanning of bus USB2 port 9 took 9061 usecs
818 12:51:42.862835 USB3 port 0 scanning...
819 12:51:42.866422 scan_usb_bus for USB3 port 0
820 12:51:42.869260 scan_usb_bus for USB3 port 0 done
821 12:51:42.875009 scan_bus: scanning of bus USB3 port 0 took 9060 usecs
822 12:51:42.877275 USB3 port 1 scanning...
823 12:51:42.880136 scan_usb_bus for USB3 port 1
824 12:51:42.883732 scan_usb_bus for USB3 port 1 done
825 12:51:42.889445 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
826 12:51:42.891532 USB3 port 2 scanning...
827 12:51:42.895013 scan_usb_bus for USB3 port 2
828 12:51:42.897858 scan_usb_bus for USB3 port 2 done
829 12:51:42.903584 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
830 12:51:42.905711 USB3 port 3 scanning...
831 12:51:42.909028 scan_usb_bus for USB3 port 3
832 12:51:42.912441 scan_usb_bus for USB3 port 3 done
833 12:51:42.917972 scan_bus: scanning of bus USB3 port 3 took 9062 usecs
834 12:51:42.920629 USB3 port 4 scanning...
835 12:51:42.923211 scan_usb_bus for USB3 port 4
836 12:51:42.927180 scan_usb_bus for USB3 port 4 done
837 12:51:42.932737 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
838 12:51:42.934941 scan_usb_bus for USB0 port 0 done
839 12:51:42.941014 scan_bus: scanning of bus USB0 port 0 took 239317 usecs
840 12:51:42.945117 scan_usb_bus for PCI: 00:14.0 done
841 12:51:42.950559 scan_bus: scanning of bus PCI: 00:14.0 took 256250 usecs
842 12:51:42.952652 PCI: 00:15.0 scanning...
843 12:51:42.956894 scan_generic_bus for PCI: 00:15.0
844 12:51:42.960463 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
845 12:51:42.964624 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
846 12:51:42.968899 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
847 12:51:42.972553 scan_generic_bus for PCI: 00:15.0 done
848 12:51:42.978311 scan_bus: scanning of bus PCI: 00:15.0 took 22383 usecs
849 12:51:42.981172 PCI: 00:15.1 scanning...
850 12:51:42.984738 scan_generic_bus for PCI: 00:15.1
851 12:51:42.988892 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
852 12:51:42.992408 scan_generic_bus for PCI: 00:15.1 done
853 12:51:42.997590 scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs
854 12:51:43.000910 PCI: 00:19.0 scanning...
855 12:51:43.004440 scan_generic_bus for PCI: 00:19.0
856 12:51:43.008549 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
857 12:51:43.012164 scan_generic_bus for PCI: 00:19.0 done
858 12:51:43.017822 scan_bus: scanning of bus PCI: 00:19.0 took 14324 usecs
859 12:51:43.020617 PCI: 00:1c.0 scanning...
860 12:51:43.024605 do_pci_scan_bridge for PCI: 00:1c.0
861 12:51:43.027275 PCI: pci_scan_bus for bus 01
862 12:51:43.030664 PCI: 01:00.0 [10ec/525a] enabled
863 12:51:43.033978 Capability: type 0x01 @ 0x80
864 12:51:43.036579 Capability: type 0x05 @ 0x90
865 12:51:43.038976 Capability: type 0x10 @ 0xb0
866 12:51:43.041755 Capability: type 0x10 @ 0x40
867 12:51:43.046580 Enabling Common Clock Configuration
868 12:51:43.049689 L1 Sub-State supported from root port 28
869 12:51:43.052883 L1 Sub-State Support = 0xf
870 12:51:43.056234 CommonModeRestoreTime = 0x3c
871 12:51:43.059999 Power On Value = 0x6, Power On Scale = 0x1
872 12:51:43.062023 ASPM: Enabled L0s and L1
873 12:51:43.065521 Capability: type 0x01 @ 0x80
874 12:51:43.069110 Capability: type 0x05 @ 0x90
875 12:51:43.071887 Capability: type 0x10 @ 0xb0
876 12:51:43.077576 scan_bus: scanning of bus PCI: 00:1c.0 took 53662 usecs
877 12:51:43.079751 PCI: 00:1d.0 scanning...
878 12:51:43.083420 do_pci_scan_bridge for PCI: 00:1d.0
879 12:51:43.086817 PCI: pci_scan_bus for bus 02
880 12:51:43.089081 PCI: 02:00.0 [1e95/9100] enabled
881 12:51:43.092589 Capability: type 0x01 @ 0x40
882 12:51:43.095881 Capability: type 0x05 @ 0x50
883 12:51:43.098702 Capability: type 0x10 @ 0x70
884 12:51:43.101011 Capability: type 0x10 @ 0x40
885 12:51:43.105098 Enabling Common Clock Configuration
886 12:51:43.109283 L1 Sub-State supported from root port 29
887 12:51:43.111567 L1 Sub-State Support = 0xf
888 12:51:43.115684 CommonModeRestoreTime = 0x28
889 12:51:43.119914 Power On Value = 0x16, Power On Scale = 0x0
890 12:51:43.120803 ASPM: Enabled L1
891 12:51:43.124050 Capability: type 0x01 @ 0x40
892 12:51:43.126799 Capability: type 0x05 @ 0x50
893 12:51:43.130163 Capability: type 0x10 @ 0x70
894 12:51:43.135714 scan_bus: scanning of bus PCI: 00:1d.0 took 52965 usecs
895 12:51:43.138858 PCI: 00:1f.0 scanning...
896 12:51:43.141583 scan_lpc_bus for PCI: 00:1f.0
897 12:51:43.143571 PNP: 0c09.0 enabled
898 12:51:43.146767 scan_lpc_bus for PCI: 00:1f.0 done
899 12:51:43.152434 scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
900 12:51:43.154788 PCI: 00:1f.3 scanning...
901 12:51:43.160235 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
902 12:51:43.163533 PCI: 00:1f.4 scanning...
903 12:51:43.166979 scan_generic_bus for PCI: 00:1f.4
904 12:51:43.171407 scan_generic_bus for PCI: 00:1f.4 done
905 12:51:43.176397 scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs
906 12:51:43.179116 PCI: 00:1f.5 scanning...
907 12:51:43.182688 scan_generic_bus for PCI: 00:1f.5
908 12:51:43.186901 scan_generic_bus for PCI: 00:1f.5 done
909 12:51:43.191874 scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs
910 12:51:43.198129 scan_bus: scanning of bus DOMAIN: 0000 took 703789 usecs
911 12:51:43.201765 root_dev_scan_bus for Root Device done
912 12:51:43.207418 scan_bus: scanning of bus Root Device took 723927 usecs
913 12:51:43.208125 done
914 12:51:43.214403 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
915 12:51:43.220050 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
916 12:51:43.227872 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
917 12:51:43.234922 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
918 12:51:43.238479 SPI flash protection: WPSW=1 SRP0=1
919 12:51:43.245489 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
920 12:51:43.250401 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
921 12:51:43.256499 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1120036 exit 42703
922 12:51:43.260114 found VGA at PCI: 00:02.0
923 12:51:43.262894 Setting up VGA for PCI: 00:02.0
924 12:51:43.267885 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
925 12:51:43.273167 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
926 12:51:43.275831 Allocating resources...
927 12:51:43.277504 Reading resources...
928 12:51:43.282192 Root Device read_resources bus 0 link: 0
929 12:51:43.285964 CPU_CLUSTER: 0 read_resources bus 0 link: 0
930 12:51:43.291420 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
931 12:51:43.296327 DOMAIN: 0000 read_resources bus 0 link: 0
932 12:51:43.301953 PCI: 00:14.0 read_resources bus 0 link: 0
933 12:51:43.307035 USB0 port 0 read_resources bus 0 link: 0
934 12:51:43.316218 USB0 port 0 read_resources bus 0 link: 0 done
935 12:51:43.321293 PCI: 00:14.0 read_resources bus 0 link: 0 done
936 12:51:43.326074 PCI: 00:15.0 read_resources bus 1 link: 0
937 12:51:43.332317 PCI: 00:15.0 read_resources bus 1 link: 0 done
938 12:51:43.337140 PCI: 00:15.1 read_resources bus 2 link: 0
939 12:51:43.342088 PCI: 00:15.1 read_resources bus 2 link: 0 done
940 12:51:43.346647 PCI: 00:19.0 read_resources bus 3 link: 0
941 12:51:43.352623 PCI: 00:19.0 read_resources bus 3 link: 0 done
942 12:51:43.357454 PCI: 00:1c.0 read_resources bus 1 link: 0
943 12:51:43.362861 PCI: 00:1c.0 read_resources bus 1 link: 0 done
944 12:51:43.367716 PCI: 00:1d.0 read_resources bus 2 link: 0
945 12:51:43.372263 PCI: 00:1d.0 read_resources bus 2 link: 0 done
946 12:51:43.377632 PCI: 00:1f.0 read_resources bus 0 link: 0
947 12:51:43.381892 PCI: 00:1f.0 read_resources bus 0 link: 0 done
948 12:51:43.389363 DOMAIN: 0000 read_resources bus 0 link: 0 done
949 12:51:43.393707 Root Device read_resources bus 0 link: 0 done
950 12:51:43.396480 Done reading resources.
951 12:51:43.402092 Show resources in subtree (Root Device)...After reading.
952 12:51:43.406309 Root Device child on link 0 CPU_CLUSTER: 0
953 12:51:43.410733 CPU_CLUSTER: 0 child on link 0 APIC: 00
954 12:51:43.412177 APIC: 00
955 12:51:43.412894 APIC: 02
956 12:51:43.417290 DOMAIN: 0000 child on link 0 PCI: 00:00.0
957 12:51:43.427112 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
958 12:51:43.436179 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
959 12:51:43.438243 PCI: 00:00.0
960 12:51:43.447345 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
961 12:51:43.457042 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
962 12:51:43.466612 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
963 12:51:43.475521 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
964 12:51:43.484750 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
965 12:51:43.494315 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
966 12:51:43.503463 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
967 12:51:43.512693 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
968 12:51:43.521898 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
969 12:51:43.531776 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
970 12:51:43.541529 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
971 12:51:43.550785 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
972 12:51:43.560077 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
973 12:51:43.569204 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
974 12:51:43.570615 PCI: 00:02.0
975 12:51:43.580834 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
976 12:51:43.591664 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
977 12:51:43.599913 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
978 12:51:43.601322 PCI: 00:04.0
979 12:51:43.611391 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
980 12:51:43.613517 PCI: 00:08.0
981 12:51:43.622903 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
982 12:51:43.624839 PCI: 00:12.0
983 12:51:43.634717 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
984 12:51:43.638892 PCI: 00:14.0 child on link 0 USB0 port 0
985 12:51:43.648782 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
986 12:51:43.653131 USB0 port 0 child on link 0 USB2 port 0
987 12:51:43.655205 USB2 port 0
988 12:51:43.656625 USB2 port 1
989 12:51:43.658809 USB2 port 2
990 12:51:43.659598 USB2 port 4
991 12:51:43.661885 USB2 port 5
992 12:51:43.663900 USB2 port 6
993 12:51:43.665356 USB2 port 7
994 12:51:43.667501 USB2 port 8
995 12:51:43.668889 USB2 port 9
996 12:51:43.670412 USB3 port 0
997 12:51:43.671910 USB3 port 1
998 12:51:43.674019 USB3 port 2
999 12:51:43.675856 USB3 port 3
1000 12:51:43.677440 USB3 port 4
1001 12:51:43.679362 PCI: 00:14.2
1002 12:51:43.688920 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1003 12:51:43.699211 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1004 12:51:43.701350 PCI: 00:14.3
1005 12:51:43.710516 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1006 12:51:43.714734 PCI: 00:15.0 child on link 0 I2C: 01:10
1007 12:51:43.724434 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1008 12:51:43.726444 I2C: 01:10
1009 12:51:43.727897 I2C: 01:10
1010 12:51:43.729339 I2C: 01:34
1011 12:51:43.734341 PCI: 00:15.1 child on link 0 I2C: 02:2c
1012 12:51:43.743586 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:51:43.745528 I2C: 02:2c
1014 12:51:43.746389 PCI: 00:16.0
1015 12:51:43.756540 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1016 12:51:43.759079 PCI: 00:17.0
1017 12:51:43.767763 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1018 12:51:43.776432 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1019 12:51:43.785103 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1020 12:51:43.793131 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1021 12:51:43.801473 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1022 12:51:43.810972 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1023 12:51:43.815022 PCI: 00:19.0 child on link 0 I2C: 03:50
1024 12:51:43.824552 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:51:43.835213 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1026 12:51:43.835943 I2C: 03:50
1027 12:51:43.838043 PCI: 00:19.2
1028 12:51:43.849366 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1029 12:51:43.859266 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1030 12:51:43.863545 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1031 12:51:43.871763 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1032 12:51:43.882417 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1033 12:51:43.891279 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1034 12:51:43.892641 PCI: 01:00.0
1035 12:51:43.902108 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1036 12:51:43.906362 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1037 12:51:43.914782 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1038 12:51:43.924356 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1039 12:51:43.934169 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1040 12:51:43.935641 PCI: 02:00.0
1041 12:51:43.945432 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 12:51:43.950294 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1043 12:51:43.958719 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1044 12:51:43.967362 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1045 12:51:43.969446 PNP: 0c09.0
1046 12:51:43.978031 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1047 12:51:43.986577 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1048 12:51:43.994569 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1049 12:51:43.996512 PCI: 00:1f.3
1050 12:51:44.006612 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1051 12:51:44.015976 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1052 12:51:44.017907 PCI: 00:1f.4
1053 12:51:44.027331 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1054 12:51:44.036553 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1055 12:51:44.039279 PCI: 00:1f.5
1056 12:51:44.048184 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1057 12:51:44.049542 PCI: 00:1f.6
1058 12:51:44.058171 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1059 12:51:44.064533 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1060 12:51:44.071596 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1061 12:51:44.078564 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1062 12:51:44.085035 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1063 12:51:44.091444 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1064 12:51:44.094863 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1065 12:51:44.097994 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1066 12:51:44.101544 PCI: 00:17.0 18 * [0x60 - 0x67] io
1067 12:51:44.105564 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1068 12:51:44.112366 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1069 12:51:44.118793 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1070 12:51:44.126978 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1071 12:51:44.135613 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1072 12:51:44.142442 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1073 12:51:44.146544 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1074 12:51:44.154155 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1075 12:51:44.161976 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1076 12:51:44.170423 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1077 12:51:44.177491 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1078 12:51:44.181016 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1079 12:51:44.189555 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1080 12:51:44.193767 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1081 12:51:44.198810 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1082 12:51:44.203767 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1083 12:51:44.208077 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1084 12:51:44.213549 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1085 12:51:44.218275 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1086 12:51:44.222733 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1087 12:51:44.227027 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1088 12:51:44.232394 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1089 12:51:44.237342 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1090 12:51:44.242270 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1091 12:51:44.246541 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1092 12:51:44.251844 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1093 12:51:44.256846 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1094 12:51:44.261906 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1095 12:51:44.266458 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1096 12:51:44.271459 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1097 12:51:44.276366 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1098 12:51:44.281427 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1099 12:51:44.286452 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1100 12:51:44.291392 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1101 12:51:44.295807 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1102 12:51:44.300821 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1103 12:51:44.305684 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1104 12:51:44.310701 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1105 12:51:44.319252 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1106 12:51:44.322638 avoid_fixed_resources: DOMAIN: 0000
1107 12:51:44.328098 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1108 12:51:44.334152 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1109 12:51:44.342180 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1110 12:51:44.349702 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1111 12:51:44.357272 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1112 12:51:44.365066 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1113 12:51:44.372839 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1114 12:51:44.380630 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1115 12:51:44.387699 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1116 12:51:44.394944 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1117 12:51:44.402920 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1118 12:51:44.410102 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1119 12:51:44.412176 Setting resources...
1120 12:51:44.418642 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1121 12:51:44.422765 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1122 12:51:44.426346 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1123 12:51:44.430495 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1124 12:51:44.434637 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1125 12:51:44.440699 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1126 12:51:44.446855 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1127 12:51:44.453616 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1128 12:51:44.459160 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1129 12:51:44.465551 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1130 12:51:44.473151 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1131 12:51:44.478955 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1132 12:51:44.483350 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1133 12:51:44.488310 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1134 12:51:44.493338 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1135 12:51:44.498463 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1136 12:51:44.502729 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1137 12:51:44.507820 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1138 12:51:44.512743 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1139 12:51:44.517816 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1140 12:51:44.522116 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1141 12:51:44.527063 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1142 12:51:44.532041 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1143 12:51:44.536835 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1144 12:51:44.541753 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1145 12:51:44.546975 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1146 12:51:44.551875 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1147 12:51:44.555703 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1148 12:51:44.561158 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1149 12:51:44.566399 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1150 12:51:44.570460 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1151 12:51:44.575879 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1152 12:51:44.580832 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1153 12:51:44.585395 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1154 12:51:44.590417 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1155 12:51:44.595412 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1156 12:51:44.602646 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1157 12:51:44.610460 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1158 12:51:44.617540 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1159 12:51:44.625375 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1160 12:51:44.629543 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1161 12:51:44.637248 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1162 12:51:44.644186 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1163 12:51:44.651660 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1164 12:51:44.659010 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1165 12:51:44.663377 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1166 12:51:44.671112 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1167 12:51:44.675708 Root Device assign_resources, bus 0 link: 0
1168 12:51:44.680631 DOMAIN: 0000 assign_resources, bus 0 link: 0
1169 12:51:44.689123 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1170 12:51:44.697741 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1171 12:51:44.705752 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1172 12:51:44.713657 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1173 12:51:44.722332 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1174 12:51:44.730330 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1175 12:51:44.738689 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1176 12:51:44.742983 PCI: 00:14.0 assign_resources, bus 0 link: 0
1177 12:51:44.748033 PCI: 00:14.0 assign_resources, bus 0 link: 0
1178 12:51:44.756331 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1179 12:51:44.763932 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1180 12:51:44.771600 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1181 12:51:44.780361 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1182 12:51:44.784672 PCI: 00:15.0 assign_resources, bus 1 link: 0
1183 12:51:44.789370 PCI: 00:15.0 assign_resources, bus 1 link: 0
1184 12:51:44.798487 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1185 12:51:44.802848 PCI: 00:15.1 assign_resources, bus 2 link: 0
1186 12:51:44.807135 PCI: 00:15.1 assign_resources, bus 2 link: 0
1187 12:51:44.815802 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1188 12:51:44.823685 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1189 12:51:44.831538 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1190 12:51:44.839200 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1191 12:51:44.847071 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1192 12:51:44.853729 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1193 12:51:44.862098 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1194 12:51:44.870389 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1195 12:51:44.878566 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1196 12:51:44.882700 PCI: 00:19.0 assign_resources, bus 3 link: 0
1197 12:51:44.887586 PCI: 00:19.0 assign_resources, bus 3 link: 0
1198 12:51:44.895486 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1199 12:51:44.904975 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1200 12:51:44.913570 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1201 12:51:44.922111 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1202 12:51:44.926307 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1203 12:51:44.934795 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1204 12:51:44.939047 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1205 12:51:44.948298 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1206 12:51:44.956875 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1207 12:51:44.964781 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1208 12:51:44.969082 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1209 12:51:44.978408 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1210 12:51:44.983231 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1211 12:51:44.987418 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1212 12:51:44.992772 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1213 12:51:44.997531 LPC: Trying to open IO window from 930 size 8
1214 12:51:45.001707 LPC: Trying to open IO window from 940 size 8
1215 12:51:45.006586 LPC: Trying to open IO window from 950 size 10
1216 12:51:45.014426 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1217 12:51:45.022713 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1218 12:51:45.031263 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1219 12:51:45.039340 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1220 12:51:45.047231 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1221 12:51:45.052220 DOMAIN: 0000 assign_resources, bus 0 link: 0
1222 12:51:45.056558 Root Device assign_resources, bus 0 link: 0
1223 12:51:45.059421 Done setting resources.
1224 12:51:45.065397 Show resources in subtree (Root Device)...After assigning values.
1225 12:51:45.070207 Root Device child on link 0 CPU_CLUSTER: 0
1226 12:51:45.074477 CPU_CLUSTER: 0 child on link 0 APIC: 00
1227 12:51:45.075844 APIC: 00
1228 12:51:45.077314 APIC: 02
1229 12:51:45.081331 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1230 12:51:45.090396 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1231 12:51:45.101462 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1232 12:51:45.103448 PCI: 00:00.0
1233 12:51:45.112962 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1234 12:51:45.122867 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1235 12:51:45.132139 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1236 12:51:45.141406 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1237 12:51:45.150497 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1238 12:51:45.160364 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1239 12:51:45.169904 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1240 12:51:45.178410 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1241 12:51:45.187669 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1242 12:51:45.196431 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1243 12:51:45.206082 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1244 12:51:45.216529 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1245 12:51:45.226053 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1246 12:51:45.235268 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1247 12:51:45.236717 PCI: 00:02.0
1248 12:51:45.247568 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1249 12:51:45.258185 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1250 12:51:45.267383 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1251 12:51:45.268842 PCI: 00:04.0
1252 12:51:45.278968 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1253 12:51:45.280413 PCI: 00:08.0
1254 12:51:45.291253 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1255 12:51:45.292717 PCI: 00:12.0
1256 12:51:45.302920 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1257 12:51:45.306512 PCI: 00:14.0 child on link 0 USB0 port 0
1258 12:51:45.317032 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1259 12:51:45.321881 USB0 port 0 child on link 0 USB2 port 0
1260 12:51:45.323957 USB2 port 0
1261 12:51:45.325406 USB2 port 1
1262 12:51:45.327498 USB2 port 2
1263 12:51:45.328850 USB2 port 4
1264 12:51:45.330863 USB2 port 5
1265 12:51:45.332310 USB2 port 6
1266 12:51:45.334264 USB2 port 7
1267 12:51:45.336385 USB2 port 8
1268 12:51:45.337852 USB2 port 9
1269 12:51:45.339169 USB3 port 0
1270 12:51:45.341405 USB3 port 1
1271 12:51:45.342834 USB3 port 2
1272 12:51:45.344944 USB3 port 3
1273 12:51:45.346453 USB3 port 4
1274 12:51:45.348625 PCI: 00:14.2
1275 12:51:45.358520 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1276 12:51:45.368640 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1277 12:51:45.369998 PCI: 00:14.3
1278 12:51:45.380580 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1279 12:51:45.384392 PCI: 00:15.0 child on link 0 I2C: 01:10
1280 12:51:45.394866 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1281 12:51:45.396993 I2C: 01:10
1282 12:51:45.398515 I2C: 01:10
1283 12:51:45.399402 I2C: 01:34
1284 12:51:45.404235 PCI: 00:15.1 child on link 0 I2C: 02:2c
1285 12:51:45.414860 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1286 12:51:45.415768 I2C: 02:2c
1287 12:51:45.417715 PCI: 00:16.0
1288 12:51:45.427708 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1289 12:51:45.429725 PCI: 00:17.0
1290 12:51:45.439980 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1291 12:51:45.450505 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1292 12:51:45.458455 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1293 12:51:45.468144 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1294 12:51:45.477401 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1295 12:51:45.487367 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1296 12:51:45.491623 PCI: 00:19.0 child on link 0 I2C: 03:50
1297 12:51:45.501552 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1298 12:51:45.512794 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1299 12:51:45.514115 I2C: 03:50
1300 12:51:45.515574 PCI: 00:19.2
1301 12:51:45.526625 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1302 12:51:45.537210 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1303 12:51:45.541533 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1304 12:51:45.550775 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1305 12:51:45.560566 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1306 12:51:45.571231 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1307 12:51:45.572714 PCI: 01:00.0
1308 12:51:45.582924 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1309 12:51:45.587905 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1310 12:51:45.597055 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1311 12:51:45.606994 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1312 12:51:45.617551 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1313 12:51:45.618994 PCI: 02:00.0
1314 12:51:45.629753 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1315 12:51:45.634447 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1316 12:51:45.642745 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1317 12:51:45.651709 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1318 12:51:45.652560 PNP: 0c09.0
1319 12:51:45.661566 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1320 12:51:45.670185 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1321 12:51:45.679368 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1322 12:51:45.680198 PCI: 00:1f.3
1323 12:51:45.691446 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1324 12:51:45.701328 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1325 12:51:45.703268 PCI: 00:1f.4
1326 12:51:45.712653 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1327 12:51:45.721965 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1328 12:51:45.723924 PCI: 00:1f.5
1329 12:51:45.734492 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1330 12:51:45.735788 PCI: 00:1f.6
1331 12:51:45.746529 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1332 12:51:45.748770 Done allocating resources.
1333 12:51:45.754998 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491831 exit 13
1334 12:51:45.757605 Enabling resources...
1335 12:51:45.762036 PCI: 00:00.0 subsystem <- 1028/3e35
1336 12:51:45.763978 PCI: 00:00.0 cmd <- 06
1337 12:51:45.768776 PCI: 00:02.0 subsystem <- 1028/3ea1
1338 12:51:45.770349 PCI: 00:02.0 cmd <- 03
1339 12:51:45.775119 PCI: 00:04.0 subsystem <- 1028/1903
1340 12:51:45.777256 PCI: 00:04.0 cmd <- 02
1341 12:51:45.779624 PCI: 00:08.0 cmd <- 06
1342 12:51:45.783724 PCI: 00:12.0 subsystem <- 1028/9df9
1343 12:51:45.786588 PCI: 00:12.0 cmd <- 02
1344 12:51:45.790233 PCI: 00:14.0 subsystem <- 1028/9ded
1345 12:51:45.792357 PCI: 00:14.0 cmd <- 02
1346 12:51:45.795053 PCI: 00:14.2 cmd <- 02
1347 12:51:45.799162 PCI: 00:14.3 subsystem <- 1028/9df0
1348 12:51:45.801372 PCI: 00:14.3 cmd <- 02
1349 12:51:45.804452 PCI: 00:15.0 subsystem <- 1028/9de8
1350 12:51:45.807218 PCI: 00:15.0 cmd <- 02
1351 12:51:45.811432 PCI: 00:15.1 subsystem <- 1028/9de9
1352 12:51:45.814312 PCI: 00:15.1 cmd <- 02
1353 12:51:45.817678 PCI: 00:16.0 subsystem <- 1028/9de0
1354 12:51:45.819847 PCI: 00:16.0 cmd <- 02
1355 12:51:45.824138 PCI: 00:17.0 subsystem <- 1028/9dd3
1356 12:51:45.826324 PCI: 00:17.0 cmd <- 03
1357 12:51:45.830553 PCI: 00:19.0 subsystem <- 1028/9dc5
1358 12:51:45.832776 PCI: 00:19.0 cmd <- 06
1359 12:51:45.835860 PCI: 00:19.2 subsystem <- 1028/9dc7
1360 12:51:45.838530 PCI: 00:19.2 cmd <- 06
1361 12:51:45.842051 PCI: 00:1c.0 bridge ctrl <- 0003
1362 12:51:45.846174 PCI: 00:1c.0 subsystem <- 1028/9dbf
1363 12:51:45.848390 Capability: type 0x10 @ 0x40
1364 12:51:45.851046 Capability: type 0x05 @ 0x80
1365 12:51:45.854116 Capability: type 0x0d @ 0x90
1366 12:51:45.856335 PCI: 00:1c.0 cmd <- 06
1367 12:51:45.861002 PCI: 00:1d.0 bridge ctrl <- 0003
1368 12:51:45.864400 PCI: 00:1d.0 subsystem <- 1028/9db4
1369 12:51:45.867104 Capability: type 0x10 @ 0x40
1370 12:51:45.869458 Capability: type 0x05 @ 0x80
1371 12:51:45.873451 Capability: type 0x0d @ 0x90
1372 12:51:45.874995 PCI: 00:1d.0 cmd <- 06
1373 12:51:45.878985 PCI: 00:1f.0 subsystem <- 1028/9d84
1374 12:51:45.881655 PCI: 00:1f.0 cmd <- 407
1375 12:51:45.885985 PCI: 00:1f.3 subsystem <- 1028/9dc8
1376 12:51:45.888036 PCI: 00:1f.3 cmd <- 02
1377 12:51:45.892260 PCI: 00:1f.4 subsystem <- 1028/9da3
1378 12:51:45.894414 PCI: 00:1f.4 cmd <- 03
1379 12:51:45.897432 PCI: 00:1f.5 subsystem <- 1028/9da4
1380 12:51:45.900868 PCI: 00:1f.5 cmd <- 406
1381 12:51:45.904436 PCI: 00:1f.6 subsystem <- 1028/15be
1382 12:51:45.907290 PCI: 00:1f.6 cmd <- 02
1383 12:51:45.917324 PCI: 01:00.0 cmd <- 02
1384 12:51:45.920766 PCI: 02:00.0 cmd <- 02
1385 12:51:45.922883 done.
1386 12:51:45.928548 BS: BS_DEV_ENABLE times (us): entry 411 run 167106 exit 0
1387 12:51:45.930730 Initializing devices...
1388 12:51:45.932856 Root Device init ...
1389 12:51:45.937116 Root Device init finished in 2140 usecs
1390 12:51:45.939840 CPU_CLUSTER: 0 init ...
1391 12:51:45.943580 CPU_CLUSTER: 0 init finished in 2431 usecs
1392 12:51:45.948358 PCI: 00:00.0 init ...
1393 12:51:45.951099 CPU TDP: 15 Watts
1394 12:51:45.953186 CPU PL2 = 51 Watts
1395 12:51:45.956757 PCI: 00:00.0 init finished in 7037 usecs
1396 12:51:45.959886 PCI: 00:02.0 init ...
1397 12:51:45.963362 PCI: 00:02.0 init finished in 2237 usecs
1398 12:51:45.965602 PCI: 00:04.0 init ...
1399 12:51:45.969645 PCI: 00:04.0 init finished in 2237 usecs
1400 12:51:45.972343 PCI: 00:08.0 init ...
1401 12:51:45.976700 PCI: 00:08.0 init finished in 2235 usecs
1402 12:51:45.979567 PCI: 00:12.0 init ...
1403 12:51:45.984048 PCI: 00:12.0 init finished in 2236 usecs
1404 12:51:45.986201 PCI: 00:14.0 init ...
1405 12:51:45.990642 PCI: 00:14.0 init finished in 2236 usecs
1406 12:51:45.993444 PCI: 00:14.2 init ...
1407 12:51:45.997635 PCI: 00:14.2 init finished in 2236 usecs
1408 12:51:45.999766 PCI: 00:14.3 init ...
1409 12:51:46.003401 PCI: 00:14.3 init finished in 2240 usecs
1410 12:51:46.006767 PCI: 00:15.0 init ...
1411 12:51:46.010285 DW I2C bus 0 at 0xd1347000 (400 KHz)
1412 12:51:46.014029 PCI: 00:15.0 init finished in 5938 usecs
1413 12:51:46.017501 PCI: 00:15.1 init ...
1414 12:51:46.021112 DW I2C bus 1 at 0xd1348000 (400 KHz)
1415 12:51:46.025317 PCI: 00:15.1 init finished in 5934 usecs
1416 12:51:46.026878 PCI: 00:16.0 init ...
1417 12:51:46.031666 PCI: 00:16.0 init finished in 2235 usecs
1418 12:51:46.034533 PCI: 00:19.0 init ...
1419 12:51:46.038013 DW I2C bus 4 at 0xd134a000 (400 KHz)
1420 12:51:46.042406 PCI: 00:19.0 init finished in 5933 usecs
1421 12:51:46.045406 PCI: 00:1c.0 init ...
1422 12:51:46.048989 Initializing PCH PCIe bridge.
1423 12:51:46.052557 PCI: 00:1c.0 init finished in 5248 usecs
1424 12:51:46.055430 PCI: 00:1d.0 init ...
1425 12:51:46.058157 Initializing PCH PCIe bridge.
1426 12:51:46.062423 PCI: 00:1d.0 init finished in 5248 usecs
1427 12:51:46.065138 PCI: 00:1f.0 init ...
1428 12:51:46.068863 IOAPIC: Initializing IOAPIC at 0xfec00000
1429 12:51:46.073679 IOAPIC: Bootstrap Processor Local APIC = 0x00
1430 12:51:46.075750 IOAPIC: ID = 0x02
1431 12:51:46.078498 IOAPIC: Dumping registers
1432 12:51:46.080521 reg 0x0000: 0x02000000
1433 12:51:46.083190 reg 0x0001: 0x00770020
1434 12:51:46.085954 reg 0x0002: 0x00000000
1435 12:51:46.090563 PCI: 00:1f.0 init finished in 23309 usecs
1436 12:51:46.093226 PCI: 00:1f.3 init ...
1437 12:51:46.097566 HDA: codec_mask = 05
1438 12:51:46.101247 HDA: Initializing codec #2
1439 12:51:46.102904 HDA: codec viddid: 8086280b
1440 12:51:46.106206 HDA: No verb table entry found
1441 12:51:46.108975 HDA: Initializing codec #0
1442 12:51:46.112411 HDA: codec viddid: 10ec0236
1443 12:51:46.119717 HDA: verb loaded.
1444 12:51:46.123959 PCI: 00:1f.3 init finished in 28838 usecs
1445 12:51:46.126079 PCI: 00:1f.4 init ...
1446 12:51:46.130289 PCI: 00:1f.4 init finished in 2246 usecs
1447 12:51:46.133749 PCI: 00:1f.6 init ...
1448 12:51:46.137357 PCI: 00:1f.6 init finished in 2237 usecs
1449 12:51:46.148358 PCI: 01:00.0 init ...
1450 12:51:46.152597 PCI: 01:00.0 init finished in 2236 usecs
1451 12:51:46.155263 PCI: 02:00.0 init ...
1452 12:51:46.159627 PCI: 02:00.0 init finished in 2235 usecs
1453 12:51:46.161820 PNP: 0c09.0 init ...
1454 12:51:46.168102 EC Label : 00.00.20
1455 12:51:46.171608 EC Revision : 9ca674bba
1456 12:51:46.174751 EC Model Num : 08B9
1457 12:51:46.178795 EC Build Date : 05/10/19
1458 12:51:46.187181 PNP: 0c09.0 init finished in 23748 usecs
1459 12:51:46.189854 Devices initialized
1460 12:51:46.191985 Show all devs... After init.
1461 12:51:46.194840 Root Device: enabled 1
1462 12:51:46.197391 CPU_CLUSTER: 0: enabled 1
1463 12:51:46.200041 DOMAIN: 0000: enabled 1
1464 12:51:46.202204 APIC: 00: enabled 1
1465 12:51:46.204429 PCI: 00:00.0: enabled 1
1466 12:51:46.206655 PCI: 00:02.0: enabled 1
1467 12:51:46.209261 PCI: 00:04.0: enabled 1
1468 12:51:46.211460 PCI: 00:12.0: enabled 1
1469 12:51:46.214187 PCI: 00:12.5: enabled 0
1470 12:51:46.216875 PCI: 00:12.6: enabled 0
1471 12:51:46.219022 PCI: 00:13.0: enabled 0
1472 12:51:46.221910 PCI: 00:14.0: enabled 1
1473 12:51:46.223970 PCI: 00:14.1: enabled 0
1474 12:51:46.226820 PCI: 00:14.3: enabled 1
1475 12:51:46.228376 PCI: 00:14.5: enabled 0
1476 12:51:46.231109 PCI: 00:15.0: enabled 1
1477 12:51:46.233910 PCI: 00:15.1: enabled 1
1478 12:51:46.236090 PCI: 00:15.2: enabled 0
1479 12:51:46.238881 PCI: 00:15.3: enabled 0
1480 12:51:46.241016 PCI: 00:16.0: enabled 1
1481 12:51:46.244031 PCI: 00:16.1: enabled 0
1482 12:51:46.246232 PCI: 00:16.2: enabled 0
1483 12:51:46.248412 PCI: 00:16.3: enabled 0
1484 12:51:46.251079 PCI: 00:16.4: enabled 0
1485 12:51:46.253342 PCI: 00:16.5: enabled 0
1486 12:51:46.255065 PCI: 00:17.0: enabled 1
1487 12:51:46.258574 PCI: 00:19.0: enabled 1
1488 12:51:46.260618 PCI: 00:19.1: enabled 0
1489 12:51:46.262751 PCI: 00:19.2: enabled 1
1490 12:51:46.265662 PCI: 00:1a.0: enabled 0
1491 12:51:46.267885 PCI: 00:1c.0: enabled 1
1492 12:51:46.269912 PCI: 00:1c.1: enabled 0
1493 12:51:46.272736 PCI: 00:1c.2: enabled 0
1494 12:51:46.275626 PCI: 00:1c.3: enabled 0
1495 12:51:46.277068 PCI: 00:1c.4: enabled 0
1496 12:51:46.279959 PCI: 00:1c.5: enabled 0
1497 12:51:46.282246 PCI: 00:1c.6: enabled 0
1498 12:51:46.284973 PCI: 00:1c.7: enabled 0
1499 12:51:46.286997 PCI: 00:1d.0: enabled 1
1500 12:51:46.289292 PCI: 00:1d.1: enabled 0
1501 12:51:46.291457 PCI: 00:1d.2: enabled 0
1502 12:51:46.294095 PCI: 00:1d.3: enabled 0
1503 12:51:46.296903 PCI: 00:1d.4: enabled 0
1504 12:51:46.299073 PCI: 00:1e.0: enabled 0
1505 12:51:46.301150 PCI: 00:1e.1: enabled 0
1506 12:51:46.304490 PCI: 00:1e.2: enabled 0
1507 12:51:46.306556 PCI: 00:1e.3: enabled 0
1508 12:51:46.309414 PCI: 00:1f.0: enabled 1
1509 12:51:46.310857 PCI: 00:1f.1: enabled 0
1510 12:51:46.314470 PCI: 00:1f.2: enabled 0
1511 12:51:46.316473 PCI: 00:1f.3: enabled 1
1512 12:51:46.319249 PCI: 00:1f.4: enabled 1
1513 12:51:46.321203 PCI: 00:1f.5: enabled 1
1514 12:51:46.323230 PCI: 00:1f.6: enabled 1
1515 12:51:46.325960 USB0 port 0: enabled 1
1516 12:51:46.328089 I2C: 01:10: enabled 1
1517 12:51:46.330501 I2C: 01:10: enabled 1
1518 12:51:46.333217 I2C: 01:34: enabled 1
1519 12:51:46.334189 I2C: 02:2c: enabled 1
1520 12:51:46.337603 I2C: 03:50: enabled 1
1521 12:51:46.339684 PNP: 0c09.0: enabled 1
1522 12:51:46.341825 USB2 port 0: enabled 1
1523 12:51:46.343573 USB2 port 1: enabled 1
1524 12:51:46.346868 USB2 port 2: enabled 1
1525 12:51:46.349025 USB2 port 4: enabled 1
1526 12:51:46.351142 USB2 port 5: enabled 1
1527 12:51:46.353410 USB2 port 6: enabled 1
1528 12:51:46.356073 USB2 port 7: enabled 1
1529 12:51:46.358216 USB2 port 8: enabled 1
1530 12:51:46.360318 USB2 port 9: enabled 1
1531 12:51:46.363204 USB3 port 0: enabled 1
1532 12:51:46.365406 USB3 port 1: enabled 1
1533 12:51:46.366861 USB3 port 2: enabled 1
1534 12:51:46.369725 USB3 port 3: enabled 1
1535 12:51:46.372629 USB3 port 4: enabled 1
1536 12:51:46.373366 APIC: 02: enabled 1
1537 12:51:46.376395 PCI: 00:08.0: enabled 1
1538 12:51:46.379026 PCI: 00:14.2: enabled 1
1539 12:51:46.381818 PCI: 01:00.0: enabled 1
1540 12:51:46.383966 PCI: 02:00.0: enabled 1
1541 12:51:46.389013 Disabling ACPI via APMC:
1542 12:51:46.390998 done.
1543 12:51:46.395490 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1544 12:51:46.400078 ELOG: NV offset 0x1bf0000 size 0x4000
1545 12:51:46.407803 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1546 12:51:46.413986 ELOG: Event(17) added with size 13 at 2023-03-22 12:51:46 UTC
1547 12:51:46.418428 POST: Unexpected post code in previous boot: 0x75
1548 12:51:46.425088 ELOG: Event(A3) added with size 11 at 2023-03-22 12:51:46 UTC
1549 12:51:46.431205 ELOG: Event(A6) added with size 13 at 2023-03-22 12:51:46 UTC
1550 12:51:46.438191 ELOG: Event(92) added with size 9 at 2023-03-22 12:51:46 UTC
1551 12:51:46.443976 ELOG: Event(93) added with size 9 at 2023-03-22 12:51:46 UTC
1552 12:51:46.450351 ELOG: Event(9A) added with size 9 at 2023-03-22 12:51:46 UTC
1553 12:51:46.456773 ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:46 UTC
1554 12:51:46.463054 ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:46 UTC
1555 12:51:46.468723 BS: BS_DEV_INIT times (us): entry 0 run 455558 exit 78863
1556 12:51:46.475362 ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:46 UTC
1557 12:51:46.481783 ELOG: Event(16) added with size 11 at 2023-03-22 12:51:46 UTC
1558 12:51:46.485277 Erasing flash addr 1bf0000 + 4 KiB
1559 12:51:46.544669 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1560 12:51:46.551249 ELOG: Event(A0) added with size 9 at 2023-03-22 12:51:46 UTC
1561 12:51:46.554894 elog_add_boot_reason: Logged dev mode boot
1562 12:51:46.557012 Finalize devices...
1563 12:51:46.559087 PCI: 00:17.0 final
1564 12:51:46.561225 Devices finalized
1565 12:51:46.566222 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1566 12:51:46.572651 BS: BS_POST_DEVICE times (us): entry 62723 run 5936 exit 5370
1567 12:51:46.578366 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1568 12:51:46.586370 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1569 12:51:46.590348 disable_unused_touchscreen: Disable ACPI0C50
1570 12:51:46.596097 disable_unused_touchscreen: Enable ELAN900C
1571 12:51:46.598944 CBFS @ 1d00000 size 300000
1572 12:51:46.605242 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1573 12:51:46.607610 CBFS: Locating 'fallback/dsdt.aml'
1574 12:51:46.612431 CBFS: Found @ offset 10b200 size 4448
1575 12:51:46.615175 CBFS @ 1d00000 size 300000
1576 12:51:46.621455 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1577 12:51:46.624317 CBFS: Locating 'fallback/slic'
1578 12:51:46.629244 CBFS: 'fallback/slic' not found.
1579 12:51:46.633273 ACPI: Writing ACPI tables at 89c0f000.
1580 12:51:46.635464 ACPI: * FACS
1581 12:51:46.636799 ACPI: * DSDT
1582 12:51:46.640860 Ramoops buffer: 0x100000@0x89b0e000.
1583 12:51:46.645685 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1584 12:51:46.649514 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1585 12:51:46.652991 ACPI: * FADT
1586 12:51:46.655049 SCI is IRQ9
1587 12:51:46.659299 ACPI: added table 1/32, length now 40
1588 12:51:46.660670 ACPI: * SSDT
1589 12:51:46.664365 Found 1 CPU(s) with 2 core(s) each.
1590 12:51:46.668592 Error: Could not locate 'wifi_sar' in VPD.
1591 12:51:46.672201 Error: failed from getting SAR limits!
1592 12:51:46.676536 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1593 12:51:46.680068 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1594 12:51:46.684246 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1595 12:51:46.688598 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1596 12:51:46.693470 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1597 12:51:46.699157 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1598 12:51:46.703438 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1599 12:51:46.707704 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1600 12:51:46.714121 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1601 12:51:46.719271 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1602 12:51:46.725606 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1603 12:51:46.731741 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1604 12:51:46.736826 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1605 12:51:46.741546 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1606 12:51:46.745085 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1607 12:51:46.751176 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1608 12:51:46.756103 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1609 12:51:46.761890 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1610 12:51:46.767541 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1611 12:51:46.773190 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1612 12:51:46.779744 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1613 12:51:46.783265 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1614 12:51:46.787581 ACPI: added table 2/32, length now 44
1615 12:51:46.789738 ACPI: * MCFG
1616 12:51:46.793369 ACPI: added table 3/32, length now 48
1617 12:51:46.794778 ACPI: * TPM2
1618 12:51:46.797610 TPM2 log created at 89afe000
1619 12:51:46.801647 ACPI: added table 4/32, length now 52
1620 12:51:46.802991 ACPI: * MADT
1621 12:51:46.804456 SCI is IRQ9
1622 12:51:46.808076 ACPI: added table 5/32, length now 56
1623 12:51:46.810329 current = 89c14720
1624 12:51:46.812461 ACPI: * IGD OpRegion
1625 12:51:46.815318 GMA: Found VBT in CBFS
1626 12:51:46.818227 GMA: Found valid VBT in CBFS
1627 12:51:46.821789 ACPI: added table 6/32, length now 60
1628 12:51:46.823321 ACPI: * HPET
1629 12:51:46.826413 ACPI: added table 7/32, length now 64
1630 12:51:46.828420 ACPI: done.
1631 12:51:46.831212 ACPI tables: 30672 bytes.
1632 12:51:46.833502 smbios_write_tables: 89afd000
1633 12:51:46.836025 recv_ec_data: 0x01
1634 12:51:46.838711 Create SMBIOS type 17
1635 12:51:46.841474 PCI: 00:14.3 (Intel WiFi)
1636 12:51:46.843125 SMBIOS tables: 707 bytes.
1637 12:51:46.847323 Writing table forward entry at 0x00000500
1638 12:51:46.853855 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1639 12:51:46.857970 Writing coreboot table at 0x89c33000
1640 12:51:46.863427 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1641 12:51:46.867785 1. 0000000000001000-000000000009ffff: RAM
1642 12:51:46.872760 2. 00000000000a0000-00000000000fffff: RESERVED
1643 12:51:46.877014 3. 0000000000100000-0000000089afcfff: RAM
1644 12:51:46.882825 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1645 12:51:46.887812 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1646 12:51:46.893624 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1647 12:51:46.898577 7. 000000008a000000-000000008f7fffff: RESERVED
1648 12:51:46.902888 8. 00000000e0000000-00000000efffffff: RESERVED
1649 12:51:46.908238 9. 00000000fc000000-00000000fc000fff: RESERVED
1650 12:51:46.913027 10. 00000000fe000000-00000000fe00ffff: RESERVED
1651 12:51:46.917395 11. 00000000fed10000-00000000fed17fff: RESERVED
1652 12:51:46.921924 12. 00000000fed80000-00000000fed83fff: RESERVED
1653 12:51:46.926073 13. 00000000feda0000-00000000feda1fff: RESERVED
1654 12:51:46.931623 14. 0000000100000000-000000016e7fffff: RAM
1655 12:51:46.935257 Graphics framebuffer located at 0xc0000000
1656 12:51:46.937977 Passing 6 GPIOs to payload:
1657 12:51:46.943658 NAME | PORT | POLARITY | VALUE
1658 12:51:46.949045 write protect | 0x000000dc | high | high
1659 12:51:46.953833 recovery | 0x000000d5 | low | high
1660 12:51:46.959203 lid | undefined | high | high
1661 12:51:46.964715 power | undefined | high | low
1662 12:51:46.969065 oprom | undefined | high | low
1663 12:51:46.974576 EC in RW | undefined | high | low
1664 12:51:46.977184 recv_ec_data: 0x01
1665 12:51:46.978150 SKU ID: 3
1666 12:51:46.981579 CBFS @ 1d00000 size 300000
1667 12:51:46.987494 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1668 12:51:46.993437 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum d61e
1669 12:51:46.996924 coreboot table: 1484 bytes.
1670 12:51:46.999769 IMD ROOT 0. 89fff000 00001000
1671 12:51:47.003200 IMD SMALL 1. 89ffe000 00001000
1672 12:51:47.006119 FSP MEMORY 2. 89d0e000 002f0000
1673 12:51:47.009594 CONSOLE 3. 89cee000 00020000
1674 12:51:47.012424 TIME STAMP 4. 89ced000 00000910
1675 12:51:47.016468 VBOOT WORK 5. 89cea000 00003000
1676 12:51:47.019556 VBOOT 6. 89ce9000 00000c0c
1677 12:51:47.022343 MRC DATA 7. 89ce7000 000018f0
1678 12:51:47.025837 ROMSTG STCK 8. 89ce6000 00000400
1679 12:51:47.029495 AFTER CAR 9. 89cdc000 0000a000
1680 12:51:47.032973 RAMSTAGE 10. 89c80000 0005c000
1681 12:51:47.036634 REFCODE 11. 89c4b000 00035000
1682 12:51:47.039511 SMM BACKUP 12. 89c3b000 00010000
1683 12:51:47.043105 COREBOOT 13. 89c33000 00008000
1684 12:51:47.046102 ACPI 14. 89c0f000 00024000
1685 12:51:47.049624 ACPI GNVS 15. 89c0e000 00001000
1686 12:51:47.053218 RAMOOPS 16. 89b0e000 00100000
1687 12:51:47.055883 TPM2 TCGLOG17. 89afe000 00010000
1688 12:51:47.059247 SMBIOS 18. 89afd000 00000800
1689 12:51:47.061472 IMD small region:
1690 12:51:47.064108 IMD ROOT 0. 89ffec00 00000400
1691 12:51:47.068428 FSP RUNTIME 1. 89ffebe0 00000004
1692 12:51:47.071200 POWER STATE 2. 89ffeba0 00000040
1693 12:51:47.075470 ROMSTAGE 3. 89ffeb80 00000004
1694 12:51:47.078899 MEM INFO 4. 89ffe9c0 000001a9
1695 12:51:47.082501 VPD 5. 89ffe980 00000031
1696 12:51:47.085456 COREBOOTFWD 6. 89ffe940 00000028
1697 12:51:47.088917 MTRR: Physical address space:
1698 12:51:47.094672 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1699 12:51:47.101253 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1700 12:51:47.107775 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1701 12:51:47.114117 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1702 12:51:47.119712 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1703 12:51:47.125978 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1704 12:51:47.132364 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1705 12:51:47.136652 MTRR: Fixed MSR 0x250 0x0606060606060606
1706 12:51:47.140250 MTRR: Fixed MSR 0x258 0x0606060606060606
1707 12:51:47.144497 MTRR: Fixed MSR 0x259 0x0000000000000000
1708 12:51:47.148782 MTRR: Fixed MSR 0x268 0x0606060606060606
1709 12:51:47.153064 MTRR: Fixed MSR 0x269 0x0606060606060606
1710 12:51:47.157283 MTRR: Fixed MSR 0x26a 0x0606060606060606
1711 12:51:47.160755 MTRR: Fixed MSR 0x26b 0x0606060606060606
1712 12:51:47.164167 MTRR: Fixed MSR 0x26c 0x0606060606060606
1713 12:51:47.168556 MTRR: Fixed MSR 0x26d 0x0606060606060606
1714 12:51:47.172594 MTRR: Fixed MSR 0x26e 0x0606060606060606
1715 12:51:47.176431 MTRR: Fixed MSR 0x26f 0x0606060606060606
1716 12:51:47.180218 call enable_fixed_mtrr()
1717 12:51:47.183687 CPU physical address size: 39 bits
1718 12:51:47.187822 MTRR: default type WB/UC MTRR counts: 7/6.
1719 12:51:47.190802 MTRR: UC selected as default type.
1720 12:51:47.197988 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1721 12:51:47.203766 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1722 12:51:47.210296 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1723 12:51:47.216555 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1724 12:51:47.222401 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1725 12:51:47.228682 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1726 12:51:47.229453
1727 12:51:47.230259 MTRR check
1728 12:51:47.232931 Fixed MTRRs : Enabled
1729 12:51:47.235755 Variable MTRRs: Enabled
1730 12:51:47.235851
1731 12:51:47.239960 MTRR: Fixed MSR 0x250 0x0606060606060606
1732 12:51:47.243577 MTRR: Fixed MSR 0x258 0x0606060606060606
1733 12:51:47.248017 MTRR: Fixed MSR 0x259 0x0000000000000000
1734 12:51:47.252409 MTRR: Fixed MSR 0x268 0x0606060606060606
1735 12:51:47.256056 MTRR: Fixed MSR 0x269 0x0606060606060606
1736 12:51:47.260394 MTRR: Fixed MSR 0x26a 0x0606060606060606
1737 12:51:47.263356 MTRR: Fixed MSR 0x26b 0x0606060606060606
1738 12:51:47.268131 MTRR: Fixed MSR 0x26c 0x0606060606060606
1739 12:51:47.271936 MTRR: Fixed MSR 0x26d 0x0606060606060606
1740 12:51:47.276534 MTRR: Fixed MSR 0x26e 0x0606060606060606
1741 12:51:47.280795 MTRR: Fixed MSR 0x26f 0x0606060606060606
1742 12:51:47.286959 BS: BS_WRITE_TABLES times (us): entry 17197 run 490182 exit 150015
1743 12:51:47.289774 call enable_fixed_mtrr()
1744 12:51:47.292450 CBFS @ 1d00000 size 300000
1745 12:51:47.298393 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1746 12:51:47.302459 CBFS: Locating 'fallback/payload'
1747 12:51:47.306040 CPU physical address size: 39 bits
1748 12:51:47.309751 CBFS: Found @ offset 1cf4c0 size 3a954
1749 12:51:47.313603 Checking segment from ROM address 0xffecf4f8
1750 12:51:47.318454 Checking segment from ROM address 0xffecf514
1751 12:51:47.322481 Loading segment from ROM address 0xffecf4f8
1752 12:51:47.325191 code (compression=0)
1753 12:51:47.333704 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1754 12:51:47.342178 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1755 12:51:47.344373 it's not compressed!
1756 12:51:47.425855 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1757 12:51:47.432138 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1758 12:51:47.441657 Loading segment from ROM address 0xffecf514
1759 12:51:47.443801 Entry Point 0x30100018
1760 12:51:47.445413 Loaded segments
1761 12:51:47.455818 Finalizing chipset.
1762 12:51:47.457279 Finalizing SMM.
1763 12:51:47.463733 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158349 exit 11803
1764 12:51:47.466061 mp_park_aps done after 0 msecs.
1765 12:51:47.470925 Jumping to boot code at 30100018(89c33000)
1766 12:51:47.479467 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1767 12:51:47.480170
1768 12:51:47.480272
1769 12:51:47.480352
1770 12:51:47.483762 Starting depthcharge on sarien...
1771 12:51:47.483854
1772 12:51:47.484357 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1773 12:51:47.484482 start: 2.2.4 bootloader-commands (timeout 00:04:29) [common]
1774 12:51:47.484589 Setting prompt string to ['sarien:']
1775 12:51:47.484687 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:29)
1776 12:51:47.490699 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1777 12:51:47.491334
1778 12:51:47.498155 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1779 12:51:47.498856
1780 12:51:47.505825 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1781 12:51:47.506304
1782 12:51:47.508331 BIOS MMAP details:
1783 12:51:47.508420
1784 12:51:47.511141 IFD Base Offset : 0x1000000
1785 12:51:47.511806
1786 12:51:47.513902 IFD End Offset : 0x2000000
1787 12:51:47.514669
1788 12:51:47.516890 MMAP Size : 0x1000000
1789 12:51:47.517577
1790 12:51:47.520494 MMAP Start : 0xff000000
1791 12:51:47.521147
1792 12:51:47.526934 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1793 12:51:47.529058
1794 12:51:47.533962 Failed to find BH720 with VID/DID 1217:8620
1795 12:51:47.534071
1796 12:51:47.538137 New NVMe Controller 0x3214e050 @ 00:1d:04
1797 12:51:47.538234
1798 12:51:47.542530 New NVMe Controller 0x3214e118 @ 00:1d:00
1799 12:51:47.543317
1800 12:51:47.547793 The GBB signature is at 0x30000014 and is: 24 47 42 42
1801 12:51:47.552122
1802 12:51:47.554305 Wipe memory regions:
1803 12:51:47.554401
1804 12:51:47.557406 [0x00000000001000, 0x000000000a0000)
1805 12:51:47.558718
1806 12:51:47.561698 [0x00000000100000, 0x00000030000000)
1807 12:51:47.644140
1808 12:51:47.648432 [0x00000032751910, 0x00000089afd000)
1809 12:51:47.798292
1810 12:51:47.801793 [0x00000100000000, 0x0000016e800000)
1811 12:51:48.572038
1812 12:51:48.573490 R8152: Initializing
1813 12:51:48.573968
1814 12:51:48.576801 Version 6 (ocp_data = 5c30)
1815 12:51:48.577448
1816 12:51:48.580280 R8152: Done initializing
1817 12:51:48.580567
1818 12:51:48.581817 Adding net device
1819 12:51:48.582569
1820 12:51:48.587970 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1821 12:51:48.588659
1822 12:51:48.588754
1823 12:51:48.588831
1824 12:51:48.589559 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1826 12:51:48.690332 sarien: tftpboot 192.168.201.1 9729841/tftp-deploy-pypcys15/kernel/bzImage 9729841/tftp-deploy-pypcys15/kernel/cmdline 9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
1827 12:51:48.690502 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1828 12:51:48.690595 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:28)
1829 12:51:48.692290 tftpboot 192.168.201.1 9729841/tftp-deploy-pypcys15/kernel/bzImage 9729841/tftp-deploy-pypcys15/kernel/cmdline 9729841/tftp-deploy-pypcys15/ramdisk/ramdisk.cpio.gz
1830 12:51:48.692391
1831 12:51:48.693636 Waiting for link
1832 12:51:48.893403
1833 12:51:48.894046 done.
1834 12:51:48.894809
1835 12:51:48.897007 MAC: 00:24:32:30:77:df
1836 12:51:48.897106
1837 12:51:48.899849 Sending DHCP discover... done.
1838 12:51:48.899950
1839 12:51:48.902189 Waiting for reply... done.
1840 12:51:48.902287
1841 12:51:48.904851 Sending DHCP request... done.
1842 12:51:48.904952
1843 12:51:48.908332 Waiting for reply... done.
1844 12:51:48.908427
1845 12:51:48.911110 My ip is 192.168.201.221
1846 12:51:48.911215
1847 12:51:48.914499 The DHCP server ip is 192.168.201.1
1848 12:51:48.914598
1849 12:51:48.919158 TFTP server IP predefined by user: 192.168.201.1
1850 12:51:48.919259
1851 12:51:48.926684 Bootfile predefined by user: 9729841/tftp-deploy-pypcys15/kernel/bzImage
1852 12:51:48.926786
1853 12:51:48.930063 Sending tftp read request... done.
1854 12:51:48.930161
1855 12:51:48.933710 Waiting for the transfer...
1856 12:51:48.933818
1857 12:51:49.404873 00000000 ################################################################
1858 12:51:49.405570
1859 12:51:49.874861 00080000 ################################################################
1860 12:51:49.875540
1861 12:51:50.346382 00100000 ################################################################
1862 12:51:50.347742
1863 12:51:50.812306 00180000 ################################################################
1864 12:51:50.813029
1865 12:51:51.294615 00200000 ################################################################
1866 12:51:51.295305
1867 12:51:51.780117 00280000 ################################################################
1868 12:51:51.780840
1869 12:51:52.255828 00300000 ################################################################
1870 12:51:52.256605
1871 12:51:52.835925 00380000 ################################################################
1872 12:51:52.836640
1873 12:51:53.381639 00400000 ################################################################
1874 12:51:53.382014
1875 12:51:53.883966 00480000 ################################################################
1876 12:51:53.884700
1877 12:51:54.393878 00500000 ################################################################
1878 12:51:54.394485
1879 12:51:54.886852 00580000 ################################################################
1880 12:51:54.887563
1881 12:51:55.475949 00600000 ################################################################
1882 12:51:55.477155
1883 12:51:56.041347 00680000 ################################################################
1884 12:51:56.042088
1885 12:51:56.588342 00700000 ################################################################
1886 12:51:56.589644
1887 12:51:57.163195 00780000 ################################################################
1888 12:51:57.163872
1889 12:51:57.733797 00800000 ################################################################
1890 12:51:57.734386
1891 12:51:58.400002 00880000 ################################################################
1892 12:51:58.401097
1893 12:51:59.014854 00900000 ################################################################
1894 12:51:59.015558
1895 12:51:59.520511 00980000 ################################################################
1896 12:51:59.521477
1897 12:52:00.007744 00a00000 ################################################################
1898 12:52:00.007901
1899 12:52:00.495103 00a80000 ################################################################
1900 12:52:00.495894
1901 12:52:00.815434 00b00000 ########################################### done.
1902 12:52:00.815597
1903 12:52:00.819220 The bootfile was 11878592 bytes long.
1904 12:52:00.819352
1905 12:52:00.822607 Sending tftp read request... done.
1906 12:52:00.822698
1907 12:52:00.825344 Waiting for the transfer...
1908 12:52:00.826051
1909 12:52:01.301937 00000000 ################################################################
1910 12:52:01.302359
1911 12:52:01.782831 00080000 ################################################################
1912 12:52:01.783240
1913 12:52:02.280955 00100000 ################################################################
1914 12:52:02.281554
1915 12:52:02.857453 00180000 ################################################################
1916 12:52:02.858083
1917 12:52:03.423597 00200000 ################################################################
1918 12:52:03.424289
1919 12:52:03.997770 00280000 ################################################################
1920 12:52:03.998494
1921 12:52:04.573713 00300000 ################################################################
1922 12:52:04.573868
1923 12:52:05.129008 00380000 ################################################################
1924 12:52:05.129680
1925 12:52:05.692281 00400000 ################################################################
1926 12:52:05.692707
1927 12:52:06.246634 00480000 ################################################################
1928 12:52:06.247298
1929 12:52:06.803860 00500000 ################################################################
1930 12:52:06.805218
1931 12:52:07.374611 00580000 ################################################################
1932 12:52:07.375035
1933 12:52:07.936188 00600000 ################################################################
1934 12:52:07.936843
1935 12:52:08.507791 00680000 ################################################################
1936 12:52:08.508530
1937 12:52:09.064636 00700000 ################################################################
1938 12:52:09.065185
1939 12:52:09.666526 00780000 ################################################################
1940 12:52:09.667077
1941 12:52:10.266599 00800000 ################################################################
1942 12:52:10.267235
1943 12:52:10.867784 00880000 ################################################################
1944 12:52:10.868445
1945 12:52:11.374255 00900000 ################################################################
1946 12:52:11.374822
1947 12:52:11.817715 00980000 ######################################################### done.
1948 12:52:11.818400
1949 12:52:11.821878 Sending tftp read request... done.
1950 12:52:11.821977
1951 12:52:11.824558 Waiting for the transfer...
1952 12:52:11.824656
1953 12:52:11.826600 00000000 # done.
1954 12:52:11.826699
1955 12:52:11.835096 Command line loaded dynamically from TFTP file: 9729841/tftp-deploy-pypcys15/kernel/cmdline
1956 12:52:11.835489
1957 12:52:11.852763 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1958 12:52:11.857497
1959 12:52:11.860857 Shutting down all USB controllers.
1960 12:52:11.861233
1961 12:52:11.864025 Removing current net device
1962 12:52:11.865270
1963 12:52:11.867837 EC: exit firmware mode
1964 12:52:11.868480
1965 12:52:11.871142 Finalizing coreboot
1966 12:52:11.871233
1967 12:52:11.876410 Exiting depthcharge with code 4 at timestamp: 31364488
1968 12:52:11.876509
1969 12:52:11.877113
1970 12:52:11.878062 Starting kernel ...
1971 12:52:11.878519 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
1972 12:52:11.878635 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
1973 12:52:11.878732 Setting prompt string to ['Linux version [0-9]']
1974 12:52:11.878816 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1975 12:52:11.878898 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1976 12:52:11.879120
1977 12:52:11.879205
1979 12:56:16.879101 end: 2.2.5 auto-login-action (duration 00:04:05) [common]
1981 12:56:16.879551 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 245 seconds'
1983 12:56:16.879929 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1986 12:56:16.880605 end: 2 depthcharge-action (duration 00:05:00) [common]
1988 12:56:16.881153 Cleaning after the job
1989 12:56:16.881356 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/ramdisk
1990 12:56:16.882795 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/kernel
1991 12:56:16.884384 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729841/tftp-deploy-pypcys15/modules
1992 12:56:16.885866 start: 5.1 power-off (timeout 00:00:30) [common]
1993 12:56:16.886297 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
1994 12:56:24.219262 >> Command sent successfully.
1995 12:56:24.221564 Returned 0 in 7 seconds
1996 12:56:24.322364 end: 5.1 power-off (duration 00:00:07) [common]
1998 12:56:24.322748 start: 5.2 read-feedback (timeout 00:09:53) [common]
1999 12:56:24.323033 Listened to connection for namespace 'common' for up to 1s
2000 12:56:25.328013 Finalising connection for namespace 'common'
2001 12:56:25.328217 Disconnecting from shell: Finalise
2002 12:56:25.328310
2003 12:56:25.429060 end: 5.2 read-feedback (duration 00:00:01) [common]
2004 12:56:25.429227 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729841
2005 12:56:25.436266 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729841
2006 12:56:25.436406 JobError: Your job cannot terminate cleanly.