Boot log: dell-latitude-5400-8665U-sarien

    1 12:51:09.500394  lava-dispatcher, installed at version: 2023.01
    2 12:51:09.500628  start: 0 validate
    3 12:51:09.500775  Start time: 2023-03-22 12:51:09.500768+00:00 (UTC)
    4 12:51:09.500925  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:09.501071  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:51:09.503646  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:09.503822  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:14.007530  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:14.007704  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:51:15.011513  validate duration: 5.51
   12 12:51:15.011825  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:51:15.012012  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:51:15.012127  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:51:15.012247  Not decompressing ramdisk as can be used compressed.
   16 12:51:15.012352  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
   17 12:51:15.012429  saving as /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/ramdisk/rootfs.cpio.gz
   18 12:51:15.012500  total size: 8429740 (8MB)
   19 12:51:15.013561  progress   0% (0MB)
   20 12:51:15.016076  progress   5% (0MB)
   21 12:51:15.018546  progress  10% (0MB)
   22 12:51:15.021031  progress  15% (1MB)
   23 12:51:15.023408  progress  20% (1MB)
   24 12:51:15.025806  progress  25% (2MB)
   25 12:51:15.028293  progress  30% (2MB)
   26 12:51:15.030963  progress  35% (2MB)
   27 12:51:15.033317  progress  40% (3MB)
   28 12:51:15.035809  progress  45% (3MB)
   29 12:51:15.038276  progress  50% (4MB)
   30 12:51:15.040625  progress  55% (4MB)
   31 12:51:15.043020  progress  60% (4MB)
   32 12:51:15.045366  progress  65% (5MB)
   33 12:51:15.047677  progress  70% (5MB)
   34 12:51:15.049848  progress  75% (6MB)
   35 12:51:15.052158  progress  80% (6MB)
   36 12:51:15.054457  progress  85% (6MB)
   37 12:51:15.056762  progress  90% (7MB)
   38 12:51:15.059047  progress  95% (7MB)
   39 12:51:15.061344  progress 100% (8MB)
   40 12:51:15.061502  8MB downloaded in 0.05s (164.08MB/s)
   41 12:51:15.061670  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:51:15.061949  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:51:15.062062  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:51:15.062162  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:51:15.062275  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   47 12:51:15.062355  saving as /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/kernel/bzImage
   48 12:51:15.062428  total size: 11878592 (11MB)
   49 12:51:15.062508  No compression specified
   50 12:51:15.063495  progress   0% (0MB)
   51 12:51:15.066750  progress   5% (0MB)
   52 12:51:15.069944  progress  10% (1MB)
   53 12:51:15.073119  progress  15% (1MB)
   54 12:51:15.076290  progress  20% (2MB)
   55 12:51:15.079465  progress  25% (2MB)
   56 12:51:15.082651  progress  30% (3MB)
   57 12:51:15.085879  progress  35% (3MB)
   58 12:51:15.089350  progress  40% (4MB)
   59 12:51:15.092579  progress  45% (5MB)
   60 12:51:15.095763  progress  50% (5MB)
   61 12:51:15.098954  progress  55% (6MB)
   62 12:51:15.102149  progress  60% (6MB)
   63 12:51:15.105389  progress  65% (7MB)
   64 12:51:15.108604  progress  70% (7MB)
   65 12:51:15.111807  progress  75% (8MB)
   66 12:51:15.115142  progress  80% (9MB)
   67 12:51:15.118384  progress  85% (9MB)
   68 12:51:15.121568  progress  90% (10MB)
   69 12:51:15.124755  progress  95% (10MB)
   70 12:51:15.127992  progress 100% (11MB)
   71 12:51:15.128194  11MB downloaded in 0.07s (172.27MB/s)
   72 12:51:15.128379  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:51:15.128650  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:51:15.128752  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 12:51:15.128858  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 12:51:15.129045  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
   78 12:51:15.129130  saving as /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/modules/modules.tar
   79 12:51:15.129207  total size: 1255052 (1MB)
   80 12:51:15.129279  Using unxz to decompress xz
   81 12:51:15.132550  progress   2% (0MB)
   82 12:51:15.133153  progress   7% (0MB)
   83 12:51:15.136752  progress  13% (0MB)
   84 12:51:15.141260  progress  18% (0MB)
   85 12:51:15.145742  progress  23% (0MB)
   86 12:51:15.150084  progress  28% (0MB)
   87 12:51:15.154644  progress  33% (0MB)
   88 12:51:15.159089  progress  39% (0MB)
   89 12:51:15.163762  progress  44% (0MB)
   90 12:51:15.168299  progress  49% (0MB)
   91 12:51:15.172832  progress  54% (0MB)
   92 12:51:15.177265  progress  60% (0MB)
   93 12:51:15.181671  progress  65% (0MB)
   94 12:51:15.186071  progress  70% (0MB)
   95 12:51:15.190712  progress  75% (0MB)
   96 12:51:15.195122  progress  80% (0MB)
   97 12:51:15.199800  progress  86% (1MB)
   98 12:51:15.204344  progress  91% (1MB)
   99 12:51:15.208930  progress  96% (1MB)
  100 12:51:15.219945  1MB downloaded in 0.09s (13.19MB/s)
  101 12:51:15.220307  end: 1.3.1 http-download (duration 00:00:00) [common]
  103 12:51:15.220647  end: 1.3 download-retry (duration 00:00:00) [common]
  104 12:51:15.220756  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  105 12:51:15.220865  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  106 12:51:15.220964  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  107 12:51:15.221080  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  108 12:51:15.221319  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554
  109 12:51:15.221448  makedir: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin
  110 12:51:15.221549  makedir: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/tests
  111 12:51:15.221643  makedir: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/results
  112 12:51:15.221764  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-add-keys
  113 12:51:15.221957  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-add-sources
  114 12:51:15.222096  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-background-process-start
  115 12:51:15.222226  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-background-process-stop
  116 12:51:15.222355  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-common-functions
  117 12:51:15.222481  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-echo-ipv4
  118 12:51:15.222610  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-install-packages
  119 12:51:15.222737  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-installed-packages
  120 12:51:15.222860  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-os-build
  121 12:51:15.222985  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-probe-channel
  122 12:51:15.223136  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-probe-ip
  123 12:51:15.223264  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-target-ip
  124 12:51:15.223388  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-target-mac
  125 12:51:15.223512  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-target-storage
  126 12:51:15.223641  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-case
  127 12:51:15.223765  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-event
  128 12:51:15.223888  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-feedback
  129 12:51:15.224013  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-raise
  130 12:51:15.224140  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-reference
  131 12:51:15.224270  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-runner
  132 12:51:15.224393  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-set
  133 12:51:15.224515  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-test-shell
  134 12:51:15.224644  Updating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-install-packages (oe)
  135 12:51:15.224773  Updating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/bin/lava-installed-packages (oe)
  136 12:51:15.224887  Creating /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/environment
  137 12:51:15.224987  LAVA metadata
  138 12:51:15.225092  - LAVA_JOB_ID=9729821
  139 12:51:15.225186  - LAVA_DISPATCHER_IP=192.168.201.1
  140 12:51:15.225315  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  141 12:51:15.225394  skipped lava-vland-overlay
  142 12:51:15.225485  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  143 12:51:15.225582  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  144 12:51:15.225658  skipped lava-multinode-overlay
  145 12:51:15.225747  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  146 12:51:15.225848  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  147 12:51:15.225937  Loading test definitions
  148 12:51:15.226046  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  149 12:51:15.226133  Using /lava-9729821 at stage 0
  150 12:51:15.226424  uuid=9729821_1.4.2.3.1 testdef=None
  151 12:51:15.226531  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  152 12:51:15.226635  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  153 12:51:15.227381  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  155 12:51:15.227647  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  156 12:51:15.228324  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  158 12:51:15.228607  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  159 12:51:15.229278  runner path: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/0/tests/0_dmesg test_uuid 9729821_1.4.2.3.1
  160 12:51:15.229452  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  162 12:51:15.229720  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  163 12:51:15.229805  Using /lava-9729821 at stage 1
  164 12:51:15.230091  uuid=9729821_1.4.2.3.5 testdef=None
  165 12:51:15.230194  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  166 12:51:15.230293  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  167 12:51:15.230876  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  169 12:51:15.231154  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  170 12:51:15.231799  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  172 12:51:15.232094  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  173 12:51:15.232718  runner path: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/1/tests/1_bootrr test_uuid 9729821_1.4.2.3.5
  174 12:51:15.232879  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  176 12:51:15.233128  Creating lava-test-runner.conf files
  177 12:51:15.233203  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/0 for stage 0
  178 12:51:15.233297  - 0_dmesg
  179 12:51:15.233381  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729821/lava-overlay-ewas6554/lava-9729821/1 for stage 1
  180 12:51:15.233474  - 1_bootrr
  181 12:51:15.233578  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  182 12:51:15.233677  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  183 12:51:15.241050  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  184 12:51:15.241217  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  185 12:51:15.241333  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 12:51:15.241438  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  187 12:51:15.241542  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  188 12:51:15.459101  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  189 12:51:15.459484  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  190 12:51:15.459620  extracting modules file /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729821/extract-overlay-ramdisk-0vgsoclr/ramdisk
  191 12:51:15.490503  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  192 12:51:15.490676  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  193 12:51:15.490787  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729821/compress-overlay-h48t6tcy/overlay-1.4.2.4.tar.gz to ramdisk
  194 12:51:15.490871  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729821/compress-overlay-h48t6tcy/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729821/extract-overlay-ramdisk-0vgsoclr/ramdisk
  195 12:51:15.495736  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 12:51:15.495868  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  197 12:51:15.495973  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  198 12:51:15.496086  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  199 12:51:15.496175  Building ramdisk /var/lib/lava/dispatcher/tmp/9729821/extract-overlay-ramdisk-0vgsoclr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729821/extract-overlay-ramdisk-0vgsoclr/ramdisk
  200 12:51:15.587464  >> 62739 blocks

  201 12:51:16.664089  rename /var/lib/lava/dispatcher/tmp/9729821/extract-overlay-ramdisk-0vgsoclr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz
  202 12:51:16.664564  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  203 12:51:16.664725  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  204 12:51:16.664863  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  205 12:51:16.664986  No mkimage arch provided, not using FIT.
  206 12:51:16.665106  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  207 12:51:16.665230  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  208 12:51:16.665364  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  209 12:51:16.665492  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  210 12:51:16.665595  No LXC device requested
  211 12:51:16.665715  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  212 12:51:16.665839  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  213 12:51:16.665951  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  214 12:51:16.666043  Checking files for TFTP limit of 4294967296 bytes.
  215 12:51:16.666506  end: 1 tftp-deploy (duration 00:00:02) [common]
  216 12:51:16.666645  start: 2 depthcharge-action (timeout 00:05:00) [common]
  217 12:51:16.666772  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  218 12:51:16.666930  substitutions:
  219 12:51:16.667032  - {DTB}: None
  220 12:51:16.667146  - {INITRD}: 9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz
  221 12:51:16.667239  - {KERNEL}: 9729821/tftp-deploy-etfrtypg/kernel/bzImage
  222 12:51:16.667329  - {LAVA_MAC}: None
  223 12:51:16.667417  - {PRESEED_CONFIG}: None
  224 12:51:16.667506  - {PRESEED_LOCAL}: None
  225 12:51:16.667592  - {RAMDISK}: 9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz
  226 12:51:16.667680  - {ROOT_PART}: None
  227 12:51:16.667765  - {ROOT}: None
  228 12:51:16.667851  - {SERVER_IP}: 192.168.201.1
  229 12:51:16.667936  - {TEE}: None
  230 12:51:16.668020  Parsed boot commands:
  231 12:51:16.668102  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  232 12:51:16.668320  Parsed boot commands: tftpboot 192.168.201.1 9729821/tftp-deploy-etfrtypg/kernel/bzImage 9729821/tftp-deploy-etfrtypg/kernel/cmdline 9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz
  233 12:51:16.668447  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  234 12:51:16.668575  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  235 12:51:16.668707  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  236 12:51:16.668829  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  237 12:51:16.668919  Not connected, no need to disconnect.
  238 12:51:16.669036  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  239 12:51:16.669155  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  240 12:51:16.669247  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-0'
  241 12:51:16.672705  Setting prompt string to ['lava-test: # ']
  242 12:51:16.673124  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  243 12:51:16.673273  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  244 12:51:16.673407  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  245 12:51:16.673530  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  246 12:51:16.673772  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=reboot'
  247 12:51:38.250003  >> Command sent successfully.

  248 12:51:38.252544  Returned 0 in 21 seconds
  249 12:51:38.353332  end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
  251 12:51:38.353693  end: 2.2.2 reset-device (duration 00:00:22) [common]
  252 12:51:38.353811  start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
  253 12:51:38.353916  Setting prompt string to 'Starting depthcharge on sarien...'
  254 12:51:38.353990  Changing prompt to 'Starting depthcharge on sarien...'
  255 12:51:38.354069  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  256 12:51:38.354369  [Enter `^Ec?' for help]

  257 12:51:38.354461  

  258 12:51:38.354537  

  259 12:51:38.354617  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  260 12:51:38.354692  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  261 12:51:38.354761  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  262 12:51:38.354828  CPU: AES supported, TXT supported, VT supported

  263 12:51:38.354894  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  264 12:51:38.354966  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  265 12:51:38.355032  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  266 12:51:38.355108  VBOOT: Loading verstage.

  267 12:51:38.355179  CBFS @ 1d00000 size 300000

  268 12:51:38.355250  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  269 12:51:38.355320  CBFS: Locating 'fallback/verstage'

  270 12:51:38.355385  CBFS: Found @ offset 10f6c0 size 1435c

  271 12:51:38.355449  

  272 12:51:38.355512  

  273 12:51:38.355578  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  274 12:51:38.355645  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  275 12:51:38.355709  done! DID_VID 0x00281ae0

  276 12:51:38.355773  TPM ready after 0 ms

  277 12:51:38.355837  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  278 12:51:38.355901  tlcl_send_startup: Startup return code is 0

  279 12:51:38.355969  TPM: setup succeeded

  280 12:51:38.356034  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  281 12:51:38.356098  Checking cr50 for recovery request

  282 12:51:38.356162  Phase 1

  283 12:51:38.356225  FMAP: Found "FLASH" version 1.1 at 1c10000.

  284 12:51:38.356289  FMAP: base = fe000000 size = 2000000 #areas = 37

  285 12:51:38.356368  FMAP: area GBB found @ 1c11000 (978944 bytes)

  286 12:51:38.356438  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  287 12:51:38.356506  Phase 2

  288 12:51:38.356579  Phase 3

  289 12:51:38.356644  FMAP: area GBB found @ 1c11000 (978944 bytes)

  290 12:51:38.356708  VB2:vb2_report_dev_firmware() This is developer signed firmware

  291 12:51:38.356777  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  292 12:51:38.356855  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  293 12:51:38.356920  VB2:vb2_verify_keyblock() Checking key block signature...

  294 12:51:38.356984  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  295 12:51:38.357051  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  296 12:51:38.357125  VB2:vb2_verify_fw_preamble() Verifying preamble.

  297 12:51:38.357189  Phase 4

  298 12:51:38.357253  FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)

  299 12:51:38.357329  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  300 12:51:38.357394  VB2:vb2_rsa_verify_digest() Digest check failed!

  301 12:51:38.357463  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  302 12:51:38.357527  Saving nvdata

  303 12:51:38.357602  Reboot requested (10020007)

  304 12:51:38.357681  board_reset() called!

  305 12:51:38.357750  full_reset() called!

  306 12:51:40.289746  

  307 12:51:40.289911  

  308 12:51:40.298539  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  309 12:51:40.302833  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  310 12:51:40.307308  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  311 12:51:40.311968  CPU: AES supported, TXT supported, VT supported

  312 12:51:40.317388  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  313 12:51:40.322754  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  314 12:51:40.327584  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  315 12:51:40.331712  VBOOT: Loading verstage.

  316 12:51:40.333903  CBFS @ 1d00000 size 300000

  317 12:51:40.339780  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  318 12:51:40.343384  CBFS: Locating 'fallback/verstage'

  319 12:51:40.347966  CBFS: Found @ offset 10f6c0 size 1435c

  320 12:51:40.362677  

  321 12:51:40.362783  

  322 12:51:40.370660  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  323 12:51:40.377607  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  324 12:51:40.504026  .done! DID_VID 0x00281ae0

  325 12:51:40.506117  TPM ready after 0 ms

  326 12:51:40.509946  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  327 12:51:40.580801  tlcl_send_startup: Startup return code is 0

  328 12:51:40.582940  TPM: setup succeeded

  329 12:51:40.602088  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  330 12:51:40.605230  Checking cr50 for recovery request

  331 12:51:40.615120  Phase 1

  332 12:51:40.619567  FMAP: Found "FLASH" version 1.1 at 1c10000.

  333 12:51:40.625009  FMAP: base = fe000000 size = 2000000 #areas = 37

  334 12:51:40.629573  FMAP: area GBB found @ 1c11000 (978944 bytes)

  335 12:51:40.637223  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  336 12:51:40.643725  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  337 12:51:40.645940  Recovery requested (1009000e)

  338 12:51:40.647384  Saving nvdata

  339 12:51:40.663003  tlcl_extend: response is 0

  340 12:51:40.677529  tlcl_extend: response is 0

  341 12:51:40.680667  CBFS @ 1d00000 size 300000

  342 12:51:40.687113  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  343 12:51:40.690575  CBFS: Locating 'fallback/romstage'

  344 12:51:40.694006  CBFS: Found @ offset 80 size 15b2c

  345 12:51:40.695546  

  346 12:51:40.695634  

  347 12:51:40.704044  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  348 12:51:40.708909  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  349 12:51:40.713809  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  350 12:51:40.718083  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  351 12:51:40.721807  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  352 12:51:40.726781  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  353 12:51:40.729083  TCO_STS:   0000 0004

  354 12:51:40.731353  GEN_PMCON: d0015209 00002200

  355 12:51:40.734330  GBLRST_CAUSE: 00000000 00000000

  356 12:51:40.737076  prev_sleep_state 5

  357 12:51:40.740148  Boot Count incremented to 23116

  358 12:51:40.743436  CBFS @ 1d00000 size 300000

  359 12:51:40.749914  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  360 12:51:40.752029  CBFS: Locating 'fspm.bin'

  361 12:51:40.755888  CBFS: Found @ offset 60fc0 size 70000

  362 12:51:40.761437  FMAP: Found "FLASH" version 1.1 at 1c10000.

  363 12:51:40.766344  FMAP: base = fe000000 size = 2000000 #areas = 37

  364 12:51:40.772889  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  365 12:51:40.778198  Probing TPM I2C: done! DID_VID 0x00281ae0

  366 12:51:40.780450  Locality already claimed

  367 12:51:40.784784  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  368 12:51:40.803531  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  369 12:51:40.810560  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  370 12:51:40.813483  MRC cache found, size 18e0

  371 12:51:40.816135  bootmode is set to :2

  372 12:51:58.731581  CBMEM:

  373 12:51:58.734206  IMD: root @ 89fff000 254 entries.

  374 12:51:58.738182  IMD: root @ 89ffec00 62 entries.

  375 12:51:58.740882  External stage cache:

  376 12:51:58.744337  IMD: root @ 8abff000 254 entries.

  377 12:51:58.746905  IMD: root @ 8abfec00 62 entries.

  378 12:51:58.752879  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  379 12:51:58.756912  creating vboot_handoff structure

  380 12:51:58.779816  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  381 12:51:58.826366  tlcl_write: response is 0

  382 12:51:58.846917  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  383 12:51:58.851604  MRC: TPM MRC hash updated successfully.

  384 12:51:58.852443  1 DIMMs found

  385 12:51:58.855177  top_of_ram = 0x8a000000

  386 12:51:58.860107  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  387 12:51:58.865358  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  388 12:51:58.868171  CBFS @ 1d00000 size 300000

  389 12:51:58.873720  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  390 12:51:58.877855  CBFS: Locating 'fallback/postcar'

  391 12:51:58.881286  CBFS: Found @ offset 107000 size 41a4

  392 12:51:58.887741  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  393 12:51:58.898080  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  394 12:51:58.903258  Processing 126 relocs. Offset value of 0x87cdd000

  395 12:51:58.905266  

  396 12:51:58.905716  

  397 12:51:58.913643  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  398 12:51:58.916582  CBFS @ 1d00000 size 300000

  399 12:51:58.923660  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  400 12:51:58.926333  CBFS: Locating 'fallback/ramstage'

  401 12:51:58.929926  CBFS: Found @ offset 458c0 size 1a8a8

  402 12:51:58.936508  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  403 12:51:58.965021  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  404 12:51:58.969858  Processing 3754 relocs. Offset value of 0x88e81000

  405 12:51:58.976583  

  406 12:51:58.977115  

  407 12:51:58.984858  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  408 12:51:58.989729  FMAP: Found "FLASH" version 1.1 at 1c10000.

  409 12:51:58.994839  FMAP: base = fe000000 size = 2000000 #areas = 37

  410 12:51:58.998947  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  411 12:51:59.004015  WARNING: RO_VPD is uninitialized or empty.

  412 12:51:59.007732  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  413 12:51:59.012713  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  414 12:51:59.014547  Normal boot.

  415 12:51:59.020654  BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1164

  416 12:51:59.023823  CBFS @ 1d00000 size 300000

  417 12:51:59.029583  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  418 12:51:59.033700  CBFS: Locating 'cpu_microcode_blob.bin'

  419 12:51:59.037634  CBFS: Found @ offset 15c40 size 2fc00

  420 12:51:59.041865  microcode: sig=0x806ec pf=0x80 revision=0xb7

  421 12:51:59.044021  Skip microcode update

  422 12:51:59.047452  CBFS @ 1d00000 size 300000

  423 12:51:59.053684  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  424 12:51:59.056094  CBFS: Locating 'fsps.bin'

  425 12:51:59.060176  CBFS: Found @ offset d1fc0 size 35000

  426 12:51:59.090690  Detected 4 core, 8 thread CPU.

  427 12:51:59.092677  Setting up SMI for CPU

  428 12:51:59.095518  IED base = 0x8ac00000

  429 12:51:59.096759  IED size = 0x00400000

  430 12:51:59.100161  Will perform SMM setup.

  431 12:51:59.103964  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.

  432 12:51:59.112107  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  433 12:51:59.116580  Processing 16 relocs. Offset value of 0x00030000

  434 12:51:59.119972  Attempting to start 7 APs

  435 12:51:59.123722  Waiting for 10ms after sending INIT.

  436 12:51:59.139528  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  437 12:51:59.139820  done.

  438 12:51:59.141892  AP: slot 2 apic_id 7.

  439 12:51:59.144595  AP: slot 5 apic_id 6.

  440 12:51:59.148299  Waiting for 2nd SIPI to complete...done.

  441 12:51:59.150839  AP: slot 7 apic_id 4.

  442 12:51:59.153205  AP: slot 6 apic_id 5.

  443 12:51:59.155441  AP: slot 4 apic_id 2.

  444 12:51:59.158046  AP: slot 1 apic_id 3.

  445 12:51:59.165871  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  446 12:51:59.170583  Processing 13 relocs. Offset value of 0x00038000

  447 12:51:59.176781  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  448 12:51:59.180778  Installing SMM handler to 0x8a000000

  449 12:51:59.188747  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  450 12:51:59.194149  Processing 867 relocs. Offset value of 0x8a010000

  451 12:51:59.201703  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  452 12:51:59.207386  Processing 13 relocs. Offset value of 0x8a008000

  453 12:51:59.213085  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  454 12:51:59.218261  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd

  455 12:51:59.224483  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd

  456 12:51:59.229518  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd

  457 12:51:59.235328  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd

  458 12:51:59.242159  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd

  459 12:51:59.247121  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd

  460 12:51:59.254375  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  461 12:51:59.256703  Clearing SMI status registers

  462 12:51:59.258762  SMI_STS: PM1 

  463 12:51:59.261670  PM1_STS: WAK PWRBTN TMROF 

  464 12:51:59.263978  TCO_STS: BOOT SECOND_TO 

  465 12:51:59.265767  GPE0 STD STS: eSPI 

  466 12:51:59.268629  New SMBASE 0x8a000000

  467 12:51:59.270924  In relocation handler: CPU 0

  468 12:51:59.275723  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  469 12:51:59.280006  Writing SMRR. base = 0x8a000006, mask=0xff000800

  470 12:51:59.282032  Relocation complete.

  471 12:51:59.284755  New SMBASE 0x89fff400

  472 12:51:59.287469  In relocation handler: CPU 3

  473 12:51:59.291097  New SMBASE=0x89fff400 IEDBASE=0x8ac00000

  474 12:51:59.297034  Writing SMRR. base = 0x8a000006, mask=0xff000800

  475 12:51:59.299228  Relocation complete.

  476 12:51:59.301274  New SMBASE 0x89fff000

  477 12:51:59.303543  In relocation handler: CPU 4

  478 12:51:59.308139  New SMBASE=0x89fff000 IEDBASE=0x8ac00000

  479 12:51:59.313084  Writing SMRR. base = 0x8a000006, mask=0xff000800

  480 12:51:59.314648  Relocation complete.

  481 12:51:59.316771  New SMBASE 0x89fffc00

  482 12:51:59.320318  In relocation handler: CPU 1

  483 12:51:59.324478  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  484 12:51:59.328845  Writing SMRR. base = 0x8a000006, mask=0xff000800

  485 12:51:59.330888  Relocation complete.

  486 12:51:59.333477  New SMBASE 0x89fff800

  487 12:51:59.336389  In relocation handler: CPU 2

  488 12:51:59.340023  New SMBASE=0x89fff800 IEDBASE=0x8ac00000

  489 12:51:59.344859  Writing SMRR. base = 0x8a000006, mask=0xff000800

  490 12:51:59.347578  Relocation complete.

  491 12:51:59.349697  New SMBASE 0x89ffec00

  492 12:51:59.352613  In relocation handler: CPU 5

  493 12:51:59.356952  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000

  494 12:51:59.361954  Writing SMRR. base = 0x8a000006, mask=0xff000800

  495 12:51:59.363438  Relocation complete.

  496 12:51:59.366207  New SMBASE 0x89ffe800

  497 12:51:59.369052  In relocation handler: CPU 6

  498 12:51:59.372715  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000

  499 12:51:59.377795  Writing SMRR. base = 0x8a000006, mask=0xff000800

  500 12:51:59.379997  Relocation complete.

  501 12:51:59.382130  New SMBASE 0x89ffe400

  502 12:51:59.385359  In relocation handler: CPU 7

  503 12:51:59.389017  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000

  504 12:51:59.394367  Writing SMRR. base = 0x8a000006, mask=0xff000800

  505 12:51:59.396335  Relocation complete.

  506 12:51:59.398905  Initializing CPU #0

  507 12:51:59.401320  CPU: vendor Intel device 806ec

  508 12:51:59.405495  CPU: family 06, model 8e, stepping 0c

  509 12:51:59.407615  Clearing out pending MCEs

  510 12:51:59.412905  Setting up local APIC... apic_id: 0x00 done.

  511 12:51:59.415679  Turbo is available but hidden

  512 12:51:59.418446  Turbo has been enabled

  513 12:51:59.420436  VMX status: enabled

  514 12:51:59.423924  IA32_FEATURE_CONTROL status: locked

  515 12:51:59.425975  Skip microcode update

  516 12:51:59.428169  CPU #0 initialized

  517 12:51:59.430245  Initializing CPU #3

  518 12:51:59.431804  Initializing CPU #7

  519 12:51:59.433978  Initializing CPU #6

  520 12:51:59.436928  CPU: vendor Intel device 806ec

  521 12:51:59.441082  CPU: family 06, model 8e, stepping 0c

  522 12:51:59.444109  CPU: vendor Intel device 806ec

  523 12:51:59.447860  CPU: family 06, model 8e, stepping 0c

  524 12:51:59.450656  Clearing out pending MCEs

  525 12:51:59.453042  Clearing out pending MCEs

  526 12:51:59.457231  Setting up local APIC...Initializing CPU #2

  527 12:51:59.459381  Initializing CPU #5

  528 12:51:59.462208  CPU: vendor Intel device 806ec

  529 12:51:59.466359  CPU: family 06, model 8e, stepping 0c

  530 12:51:59.469138  CPU: vendor Intel device 806ec

  531 12:51:59.472915  CPU: family 06, model 8e, stepping 0c

  532 12:51:59.476163  Clearing out pending MCEs

  533 12:51:59.478667  Clearing out pending MCEs

  534 12:51:59.483452  Setting up local APIC...Initializing CPU #1

  535 12:51:59.484946  Initializing CPU #4

  536 12:51:59.488377  CPU: vendor Intel device 806ec

  537 12:51:59.491702  CPU: family 06, model 8e, stepping 0c

  538 12:51:59.494676  CPU: vendor Intel device 806ec

  539 12:51:59.499329  CPU: family 06, model 8e, stepping 0c

  540 12:51:59.501300  Clearing out pending MCEs

  541 12:51:59.503548  Clearing out pending MCEs

  542 12:51:59.508610  Setting up local APIC... apic_id: 0x04 done.

  543 12:51:59.514282  Setting up local APIC...CPU: vendor Intel device 806ec

  544 12:51:59.517702  CPU: family 06, model 8e, stepping 0c

  545 12:51:59.520406  Clearing out pending MCEs

  546 12:51:59.522628   apic_id: 0x05 done.

  547 12:51:59.525167  VMX status: enabled

  548 12:51:59.526606  VMX status: enabled

  549 12:51:59.530114  IA32_FEATURE_CONTROL status: locked

  550 12:51:59.533854  IA32_FEATURE_CONTROL status: locked

  551 12:51:59.535927  Skip microcode update

  552 12:51:59.538754  Skip microcode update

  553 12:51:59.540119  CPU #7 initialized

  554 12:51:59.542303  CPU #6 initialized

  555 12:51:59.549045  Setting up local APIC...Setting up local APIC... apic_id: 0x03 done.

  556 12:51:59.550906   apic_id: 0x02 done.

  557 12:51:59.553730  VMX status: enabled

  558 12:51:59.555285  VMX status: enabled

  559 12:51:59.558713  IA32_FEATURE_CONTROL status: locked

  560 12:51:59.562368  IA32_FEATURE_CONTROL status: locked

  561 12:51:59.564530  Skip microcode update

  562 12:51:59.566890  Skip microcode update

  563 12:51:59.568242  CPU #1 initialized

  564 12:51:59.570980  CPU #4 initialized

  565 12:51:59.572487   apic_id: 0x07 done.

  566 12:51:59.577598  Setting up local APIC... apic_id: 0x01 done.

  567 12:51:59.579045  VMX status: enabled

  568 12:51:59.581234   apic_id: 0x06 done.

  569 12:51:59.584921  IA32_FEATURE_CONTROL status: locked

  570 12:51:59.586991  VMX status: enabled

  571 12:51:59.588991  Skip microcode update

  572 12:51:59.592863  IA32_FEATURE_CONTROL status: locked

  573 12:51:59.595531  CPU #2 initialized

  574 12:51:59.597687  Skip microcode update

  575 12:51:59.599695  VMX status: enabled

  576 12:51:59.601644  CPU #5 initialized

  577 12:51:59.604923  IA32_FEATURE_CONTROL status: locked

  578 12:51:59.606521  Skip microcode update

  579 12:51:59.609667  CPU #3 initialized

  580 12:51:59.613572  bsp_do_flight_plan done after 460 msecs.

  581 12:51:59.616467  CPU: frequency set to 4800 MHz

  582 12:51:59.618243  Enabling SMIs.

  583 12:51:59.619435  Locking SMM.

  584 12:51:59.622315  CBFS @ 1d00000 size 300000

  585 12:51:59.628766  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  586 12:51:59.630967  CBFS: Locating 'vbt.bin'

  587 12:51:59.635112  CBFS: Found @ offset 60a40 size 4a0

  588 12:51:59.639336  Found a VBT of 4608 bytes after decompression

  589 12:51:59.653462  FMAP: area GBB found @ 1c11000 (978944 bytes)

  590 12:51:59.684313  Detected 4 core, 8 thread CPU.

  591 12:51:59.688375  Detected 4 core, 8 thread CPU.

  592 12:51:59.914866  Display FSP Version Info HOB

  593 12:51:59.917820  Reference Code - CPU = 7.0.5e.40

  594 12:51:59.920649  uCode Version = 0.0.0.b8

  595 12:51:59.923936  Display FSP Version Info HOB

  596 12:51:59.926769  Reference Code - ME = 7.0.5e.40

  597 12:51:59.929609  MEBx version = 0.0.0.0

  598 12:51:59.932380  ME Firmware Version = Consumer SKU

  599 12:51:59.935283  Display FSP Version Info HOB

  600 12:51:59.939097  Reference Code - CNL PCH = 7.0.5e.40

  601 12:51:59.941872  PCH-CRID Status = Disabled

  602 12:51:59.945843  CNL PCH H A0 Hsio Version = 2.0.0.0

  603 12:51:59.948732  CNL PCH H Ax Hsio Version = 9.0.0.0

  604 12:51:59.953309  CNL PCH H Bx Hsio Version = a.0.0.0

  605 12:51:59.956859  CNL PCH LP B0 Hsio Version = 7.0.0.0

  606 12:51:59.959760  CNL PCH LP Bx Hsio Version = 6.0.0.0

  607 12:51:59.963938  CNL PCH LP Dx Hsio Version = 7.0.0.0

  608 12:51:59.966631  Display FSP Version Info HOB

  609 12:51:59.970887  Reference Code - SA - System Agent = 7.0.5e.40

  610 12:51:59.974857  Reference Code - MRC = 0.7.1.68

  611 12:51:59.977214  SA - PCIe Version = 7.0.5e.40

  612 12:51:59.980156  SA-CRID Status = Disabled

  613 12:51:59.983013  SA-CRID Original Value = 0.0.0.c

  614 12:51:59.986399  SA-CRID New Value = 0.0.0.c

  615 12:52:00.004564  RTC Init

  616 12:52:00.008950  Set power off after power failure.

  617 12:52:00.010406  Disabling Deep S3

  618 12:52:00.012668  Disabling Deep S3

  619 12:52:00.014014  Disabling Deep S4

  620 12:52:00.016208  Disabling Deep S4

  621 12:52:00.017701  Disabling Deep S5

  622 12:52:00.019290  Disabling Deep S5

  623 12:52:00.026861  BS: BS_DEV_INIT_CHIPS times (us): entry 598635 run 384005 exit 16221

  624 12:52:00.028933  Enumerating buses...

  625 12:52:00.032592  Show all devs... Before device enumeration.

  626 12:52:00.035890  Root Device: enabled 1

  627 12:52:00.037890  CPU_CLUSTER: 0: enabled 1

  628 12:52:00.040019  DOMAIN: 0000: enabled 1

  629 12:52:00.042871  APIC: 00: enabled 1

  630 12:52:00.045448  PCI: 00:00.0: enabled 1

  631 12:52:00.047536  PCI: 00:02.0: enabled 1

  632 12:52:00.049554  PCI: 00:04.0: enabled 1

  633 12:52:00.052222  PCI: 00:12.0: enabled 1

  634 12:52:00.054610  PCI: 00:12.5: enabled 0

  635 12:52:00.057356  PCI: 00:12.6: enabled 0

  636 12:52:00.059071  PCI: 00:13.0: enabled 0

  637 12:52:00.062060  PCI: 00:14.0: enabled 1

  638 12:52:00.064362  PCI: 00:14.1: enabled 0

  639 12:52:00.066425  PCI: 00:14.3: enabled 1

  640 12:52:00.069045  PCI: 00:14.5: enabled 0

  641 12:52:00.072088  PCI: 00:15.0: enabled 1

  642 12:52:00.074250  PCI: 00:15.1: enabled 1

  643 12:52:00.076786  PCI: 00:15.2: enabled 0

  644 12:52:00.078902  PCI: 00:15.3: enabled 0

  645 12:52:00.081417  PCI: 00:16.0: enabled 1

  646 12:52:00.083591  PCI: 00:16.1: enabled 0

  647 12:52:00.086088  PCI: 00:16.2: enabled 0

  648 12:52:00.088894  PCI: 00:16.3: enabled 0

  649 12:52:00.091013  PCI: 00:16.4: enabled 0

  650 12:52:00.093891  PCI: 00:16.5: enabled 0

  651 12:52:00.095872  PCI: 00:17.0: enabled 1

  652 12:52:00.098365  PCI: 00:19.0: enabled 1

  653 12:52:00.100476  PCI: 00:19.1: enabled 0

  654 12:52:00.103259  PCI: 00:19.2: enabled 1

  655 12:52:00.105474  PCI: 00:1a.0: enabled 0

  656 12:52:00.107704  PCI: 00:1c.0: enabled 1

  657 12:52:00.110319  PCI: 00:1c.1: enabled 0

  658 12:52:00.113229  PCI: 00:1c.2: enabled 0

  659 12:52:00.115530  PCI: 00:1c.3: enabled 0

  660 12:52:00.118421  PCI: 00:1c.4: enabled 0

  661 12:52:00.120119  PCI: 00:1c.5: enabled 0

  662 12:52:00.122616  PCI: 00:1c.6: enabled 0

  663 12:52:00.125370  PCI: 00:1c.7: enabled 1

  664 12:52:00.127441  PCI: 00:1d.0: enabled 1

  665 12:52:00.129737  PCI: 00:1d.1: enabled 1

  666 12:52:00.131918  PCI: 00:1d.2: enabled 0

  667 12:52:00.134716  PCI: 00:1d.3: enabled 0

  668 12:52:00.136944  PCI: 00:1d.4: enabled 1

  669 12:52:00.139501  PCI: 00:1e.0: enabled 0

  670 12:52:00.142394  PCI: 00:1e.1: enabled 0

  671 12:52:00.144570  PCI: 00:1e.2: enabled 0

  672 12:52:00.146585  PCI: 00:1e.3: enabled 0

  673 12:52:00.149288  PCI: 00:1f.0: enabled 1

  674 12:52:00.151596  PCI: 00:1f.1: enabled 1

  675 12:52:00.153641  PCI: 00:1f.2: enabled 1

  676 12:52:00.156331  PCI: 00:1f.3: enabled 1

  677 12:52:00.159587  PCI: 00:1f.4: enabled 1

  678 12:52:00.161007  PCI: 00:1f.5: enabled 1

  679 12:52:00.163690  PCI: 00:1f.6: enabled 1

  680 12:52:00.165781  USB0 port 0: enabled 1

  681 12:52:00.168920  I2C: 00:10: enabled 1

  682 12:52:00.170479  I2C: 00:10: enabled 1

  683 12:52:00.172351  I2C: 00:34: enabled 1

  684 12:52:00.175070  I2C: 00:2c: enabled 1

  685 12:52:00.177977  I2C: 00:50: enabled 1

  686 12:52:00.179596  PNP: 0c09.0: enabled 1

  687 12:52:00.181604  USB2 port 0: enabled 1

  688 12:52:00.184338  USB2 port 1: enabled 1

  689 12:52:00.186514  USB2 port 2: enabled 1

  690 12:52:00.189260  USB2 port 4: enabled 1

  691 12:52:00.191524  USB2 port 5: enabled 1

  692 12:52:00.194105  USB2 port 6: enabled 1

  693 12:52:00.196287  USB2 port 7: enabled 1

  694 12:52:00.198622  USB2 port 8: enabled 1

  695 12:52:00.201094  USB2 port 9: enabled 1

  696 12:52:00.203280  USB3 port 0: enabled 1

  697 12:52:00.205413  USB3 port 1: enabled 1

  698 12:52:00.208292  USB3 port 2: enabled 1

  699 12:52:00.210476  USB3 port 3: enabled 1

  700 12:52:00.211987  USB3 port 4: enabled 1

  701 12:52:00.214196  APIC: 03: enabled 1

  702 12:52:00.217004  APIC: 07: enabled 1

  703 12:52:00.218588  APIC: 01: enabled 1

  704 12:52:00.220575  APIC: 02: enabled 1

  705 12:52:00.222691  APIC: 06: enabled 1

  706 12:52:00.224825  APIC: 05: enabled 1

  707 12:52:00.226500  APIC: 04: enabled 1

  708 12:52:00.228485  Compare with tree...

  709 12:52:00.230823  Root Device: enabled 1

  710 12:52:00.233386   CPU_CLUSTER: 0: enabled 1

  711 12:52:00.236119    APIC: 00: enabled 1

  712 12:52:00.238471    APIC: 03: enabled 1

  713 12:52:00.240592    APIC: 07: enabled 1

  714 12:52:00.242500    APIC: 01: enabled 1

  715 12:52:00.245391    APIC: 02: enabled 1

  716 12:52:00.246859    APIC: 06: enabled 1

  717 12:52:00.249783    APIC: 05: enabled 1

  718 12:52:00.251326    APIC: 04: enabled 1

  719 12:52:00.254640   DOMAIN: 0000: enabled 1

  720 12:52:00.256594    PCI: 00:00.0: enabled 1

  721 12:52:00.259573    PCI: 00:02.0: enabled 1

  722 12:52:00.261610    PCI: 00:04.0: enabled 1

  723 12:52:00.264811    PCI: 00:12.0: enabled 1

  724 12:52:00.267465    PCI: 00:12.5: enabled 0

  725 12:52:00.269549    PCI: 00:12.6: enabled 0

  726 12:52:00.272789    PCI: 00:13.0: enabled 0

  727 12:52:00.275588    PCI: 00:14.0: enabled 1

  728 12:52:00.277672     USB0 port 0: enabled 1

  729 12:52:00.280367      USB2 port 0: enabled 1

  730 12:52:00.283181      USB2 port 1: enabled 1

  731 12:52:00.285746      USB2 port 2: enabled 1

  732 12:52:00.288878      USB2 port 4: enabled 1

  733 12:52:00.291324      USB2 port 5: enabled 1

  734 12:52:00.294687      USB2 port 6: enabled 1

  735 12:52:00.297356      USB2 port 7: enabled 1

  736 12:52:00.300072      USB2 port 8: enabled 1

  737 12:52:00.302309      USB2 port 9: enabled 1

  738 12:52:00.305621      USB3 port 0: enabled 1

  739 12:52:00.307274      USB3 port 1: enabled 1

  740 12:52:00.310795      USB3 port 2: enabled 1

  741 12:52:00.312948      USB3 port 3: enabled 1

  742 12:52:00.315481      USB3 port 4: enabled 1

  743 12:52:00.318103    PCI: 00:14.1: enabled 0

  744 12:52:00.321120    PCI: 00:14.3: enabled 1

  745 12:52:00.323543    PCI: 00:14.5: enabled 0

  746 12:52:00.326781    PCI: 00:15.0: enabled 1

  747 12:52:00.329671     I2C: 00:10: enabled 1

  748 12:52:00.331853     I2C: 00:10: enabled 1

  749 12:52:00.334110     I2C: 00:34: enabled 1

  750 12:52:00.336757    PCI: 00:15.1: enabled 1

  751 12:52:00.339037     I2C: 00:2c: enabled 1

  752 12:52:00.341911    PCI: 00:15.2: enabled 0

  753 12:52:00.344083    PCI: 00:15.3: enabled 0

  754 12:52:00.346927    PCI: 00:16.0: enabled 1

  755 12:52:00.350390    PCI: 00:16.1: enabled 0

  756 12:52:00.351959    PCI: 00:16.2: enabled 0

  757 12:52:00.354889    PCI: 00:16.3: enabled 0

  758 12:52:00.358115    PCI: 00:16.4: enabled 0

  759 12:52:00.359671    PCI: 00:16.5: enabled 0

  760 12:52:00.362340    PCI: 00:17.0: enabled 1

  761 12:52:00.365517    PCI: 00:19.0: enabled 1

  762 12:52:00.368183     I2C: 00:50: enabled 1

  763 12:52:00.370317    PCI: 00:19.1: enabled 0

  764 12:52:00.373561    PCI: 00:19.2: enabled 1

  765 12:52:00.375765    PCI: 00:1a.0: enabled 0

  766 12:52:00.378931    PCI: 00:1c.0: enabled 1

  767 12:52:00.381137    PCI: 00:1c.1: enabled 0

  768 12:52:00.383261    PCI: 00:1c.2: enabled 0

  769 12:52:00.386223    PCI: 00:1c.3: enabled 0

  770 12:52:00.388515    PCI: 00:1c.4: enabled 0

  771 12:52:00.391787    PCI: 00:1c.5: enabled 0

  772 12:52:00.394444    PCI: 00:1c.6: enabled 0

  773 12:52:00.396650    PCI: 00:1c.7: enabled 1

  774 12:52:00.399944    PCI: 00:1d.0: enabled 1

  775 12:52:00.402093    PCI: 00:1d.1: enabled 1

  776 12:52:00.404799    PCI: 00:1d.2: enabled 0

  777 12:52:00.406907    PCI: 00:1d.3: enabled 0

  778 12:52:00.409493    PCI: 00:1d.4: enabled 1

  779 12:52:00.412990    PCI: 00:1e.0: enabled 0

  780 12:52:00.415222    PCI: 00:1e.1: enabled 0

  781 12:52:00.417925    PCI: 00:1e.2: enabled 0

  782 12:52:00.420281    PCI: 00:1e.3: enabled 0

  783 12:52:00.423156    PCI: 00:1f.0: enabled 1

  784 12:52:00.426072     PNP: 0c09.0: enabled 1

  785 12:52:00.428294    PCI: 00:1f.1: enabled 1

  786 12:52:00.431057    PCI: 00:1f.2: enabled 1

  787 12:52:00.433369    PCI: 00:1f.3: enabled 1

  788 12:52:00.436071    PCI: 00:1f.4: enabled 1

  789 12:52:00.438465    PCI: 00:1f.5: enabled 1

  790 12:52:00.441107    PCI: 00:1f.6: enabled 1

  791 12:52:00.444430  Root Device scanning...

  792 12:52:00.447605  root_dev_scan_bus for Root Device

  793 12:52:00.450261  CPU_CLUSTER: 0 enabled

  794 12:52:00.451828  DOMAIN: 0000 enabled

  795 12:52:00.454621  DOMAIN: 0000 scanning...

  796 12:52:00.457677  PCI: pci_scan_bus for bus 00

  797 12:52:00.460425  PCI: 00:00.0 [8086/0000] ops

  798 12:52:00.464516  PCI: 00:00.0 [8086/3e34] enabled

  799 12:52:00.466764  PCI: 00:02.0 [8086/0000] ops

  800 12:52:00.470760  PCI: 00:02.0 [8086/3ea0] enabled

  801 12:52:00.473494  PCI: 00:04.0 [8086/1903] enabled

  802 12:52:00.477384  PCI: 00:08.0 [8086/1911] enabled

  803 12:52:00.480754  PCI: 00:12.0 [8086/9df9] enabled

  804 12:52:00.483289  PCI: 00:14.0 [8086/0000] bus ops

  805 12:52:00.486694  PCI: 00:14.0 [8086/9ded] enabled

  806 12:52:00.490270  PCI: 00:14.2 [8086/9def] enabled

  807 12:52:00.493169  PCI: 00:14.3 [8086/9df0] enabled

  808 12:52:00.496597  PCI: 00:15.0 [8086/0000] bus ops

  809 12:52:00.500093  PCI: 00:15.0 [8086/9de8] enabled

  810 12:52:00.504018  PCI: 00:15.1 [8086/0000] bus ops

  811 12:52:00.506740  PCI: 00:15.1 [8086/9de9] enabled

  812 12:52:00.512529  PCI: Static device PCI: 00:16.0 not found, disabling it.

  813 12:52:00.515922  PCI: 00:17.0 [8086/0000] ops

  814 12:52:00.519519  PCI: 00:17.0 [8086/9dd3] enabled

  815 12:52:00.521768  PCI: 00:19.0 [8086/0000] bus ops

  816 12:52:00.525349  PCI: 00:19.0 [8086/9dc5] enabled

  817 12:52:00.528148  PCI: 00:19.2 [8086/0000] ops

  818 12:52:00.531717  PCI: 00:19.2 [8086/9dc7] enabled

  819 12:52:00.535256  PCI: 00:1c.0 [8086/0000] bus ops

  820 12:52:00.538259  PCI: 00:1c.0 [8086/9dbf] enabled

  821 12:52:00.543717  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  822 12:52:00.546955  PCI: 00:1d.0 [8086/0000] bus ops

  823 12:52:00.550331  PCI: 00:1d.0 [8086/9db4] enabled

  824 12:52:00.555989  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  825 12:52:00.561787  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  826 12:52:00.565356  PCI: 00:1f.0 [8086/0000] bus ops

  827 12:52:00.568079  PCI: 00:1f.0 [8086/9d84] enabled

  828 12:52:00.574117  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  829 12:52:00.579840  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  830 12:52:00.582532  PCI: 00:1f.3 [8086/0000] bus ops

  831 12:52:00.585860  PCI: 00:1f.3 [8086/9dc8] enabled

  832 12:52:00.590205  PCI: 00:1f.4 [8086/0000] bus ops

  833 12:52:00.593007  PCI: 00:1f.4 [8086/9da3] enabled

  834 12:52:00.596486  PCI: 00:1f.5 [8086/0000] bus ops

  835 12:52:00.599683  PCI: 00:1f.5 [8086/9da4] enabled

  836 12:52:00.603007  PCI: 00:1f.6 [8086/15be] enabled

  837 12:52:00.605831  PCI: Leftover static devices:

  838 12:52:00.607740  PCI: 00:12.5

  839 12:52:00.608635  PCI: 00:12.6

  840 12:52:00.610331  PCI: 00:13.0

  841 12:52:00.611715  PCI: 00:14.1

  842 12:52:00.612561  PCI: 00:14.5

  843 12:52:00.614276  PCI: 00:15.2

  844 12:52:00.615715  PCI: 00:15.3

  845 12:52:00.616937  PCI: 00:16.0

  846 12:52:00.617716  PCI: 00:16.1

  847 12:52:00.619650  PCI: 00:16.2

  848 12:52:00.621050  PCI: 00:16.3

  849 12:52:00.621932  PCI: 00:16.4

  850 12:52:00.623382  PCI: 00:16.5

  851 12:52:00.624874  PCI: 00:19.1

  852 12:52:00.626813  PCI: 00:1a.0

  853 12:52:00.627755  PCI: 00:1c.1

  854 12:52:00.629134  PCI: 00:1c.2

  855 12:52:00.630483  PCI: 00:1c.3

  856 12:52:00.632469  PCI: 00:1c.4

  857 12:52:00.633273  PCI: 00:1c.5

  858 12:52:00.635348  PCI: 00:1c.6

  859 12:52:00.636096  PCI: 00:1c.7

  860 12:52:00.636969  PCI: 00:1d.1

  861 12:52:00.638370  PCI: 00:1d.2

  862 12:52:00.639610  PCI: 00:1d.3

  863 12:52:00.641187  PCI: 00:1d.4

  864 12:52:00.643211  PCI: 00:1e.0

  865 12:52:00.644688  PCI: 00:1e.1

  866 12:52:00.645496  PCI: 00:1e.2

  867 12:52:00.647470  PCI: 00:1e.3

  868 12:52:00.648430  PCI: 00:1f.1

  869 12:52:00.649615  PCI: 00:1f.2

  870 12:52:00.652572  PCI: Check your devicetree.cb.

  871 12:52:00.655884  PCI: 00:14.0 scanning...

  872 12:52:00.658813  scan_usb_bus for PCI: 00:14.0

  873 12:52:00.661001  USB0 port 0 enabled

  874 12:52:00.663043  USB0 port 0 scanning...

  875 12:52:00.666168  scan_usb_bus for USB0 port 0

  876 12:52:00.668305  USB2 port 0 enabled

  877 12:52:00.670819  USB2 port 1 enabled

  878 12:52:00.672973  USB2 port 2 enabled

  879 12:52:00.674700  USB2 port 4 enabled

  880 12:52:00.676198  USB2 port 5 enabled

  881 12:52:00.678505  USB2 port 6 enabled

  882 12:52:00.681200  USB2 port 7 enabled

  883 12:52:00.682557  USB2 port 8 enabled

  884 12:52:00.684667  USB2 port 9 enabled

  885 12:52:00.686133  USB3 port 0 enabled

  886 12:52:00.688723  USB3 port 1 enabled

  887 12:52:00.690401  USB3 port 2 enabled

  888 12:52:00.692736  USB3 port 3 enabled

  889 12:52:00.694715  USB3 port 4 enabled

  890 12:52:00.697035  USB2 port 0 scanning...

  891 12:52:00.700935  scan_usb_bus for USB2 port 0

  892 12:52:00.703810  scan_usb_bus for USB2 port 0 done

  893 12:52:00.708904  scan_bus: scanning of bus USB2 port 0 took 9056 usecs

  894 12:52:00.712059  USB2 port 1 scanning...

  895 12:52:00.715286  scan_usb_bus for USB2 port 1

  896 12:52:00.718042  scan_usb_bus for USB2 port 1 done

  897 12:52:00.723630  scan_bus: scanning of bus USB2 port 1 took 9057 usecs

  898 12:52:00.726254  USB2 port 2 scanning...

  899 12:52:00.729054  scan_usb_bus for USB2 port 2

  900 12:52:00.732568  scan_usb_bus for USB2 port 2 done

  901 12:52:00.737502  scan_bus: scanning of bus USB2 port 2 took 9056 usecs

  902 12:52:00.740796  USB2 port 4 scanning...

  903 12:52:00.743896  scan_usb_bus for USB2 port 4

  904 12:52:00.747244  scan_usb_bus for USB2 port 4 done

  905 12:52:00.752362  scan_bus: scanning of bus USB2 port 4 took 9055 usecs

  906 12:52:00.754634  USB2 port 5 scanning...

  907 12:52:00.758156  scan_usb_bus for USB2 port 5

  908 12:52:00.761606  scan_usb_bus for USB2 port 5 done

  909 12:52:00.767164  scan_bus: scanning of bus USB2 port 5 took 9057 usecs

  910 12:52:00.768812  USB2 port 6 scanning...

  911 12:52:00.772946  scan_usb_bus for USB2 port 6

  912 12:52:00.776386  scan_usb_bus for USB2 port 6 done

  913 12:52:00.780907  scan_bus: scanning of bus USB2 port 6 took 9056 usecs

  914 12:52:00.783645  USB2 port 7 scanning...

  915 12:52:00.786565  scan_usb_bus for USB2 port 7

  916 12:52:00.790479  scan_usb_bus for USB2 port 7 done

  917 12:52:00.795961  scan_bus: scanning of bus USB2 port 7 took 9057 usecs

  918 12:52:00.798120  USB2 port 8 scanning...

  919 12:52:00.801064  scan_usb_bus for USB2 port 8

  920 12:52:00.804701  scan_usb_bus for USB2 port 8 done

  921 12:52:00.810366  scan_bus: scanning of bus USB2 port 8 took 9058 usecs

  922 12:52:00.811964  USB2 port 9 scanning...

  923 12:52:00.815468  scan_usb_bus for USB2 port 9

  924 12:52:00.819110  scan_usb_bus for USB2 port 9 done

  925 12:52:00.824554  scan_bus: scanning of bus USB2 port 9 took 9056 usecs

  926 12:52:00.827264  USB3 port 0 scanning...

  927 12:52:00.829923  scan_usb_bus for USB3 port 0

  928 12:52:00.833684  scan_usb_bus for USB3 port 0 done

  929 12:52:00.838591  scan_bus: scanning of bus USB3 port 0 took 9057 usecs

  930 12:52:00.841444  USB3 port 1 scanning...

  931 12:52:00.844969  scan_usb_bus for USB3 port 1

  932 12:52:00.848063  scan_usb_bus for USB3 port 1 done

  933 12:52:00.852989  scan_bus: scanning of bus USB3 port 1 took 9058 usecs

  934 12:52:00.856388  USB3 port 2 scanning...

  935 12:52:00.859205  scan_usb_bus for USB3 port 2

  936 12:52:00.862013  scan_usb_bus for USB3 port 2 done

  937 12:52:00.867674  scan_bus: scanning of bus USB3 port 2 took 9059 usecs

  938 12:52:00.870021  USB3 port 3 scanning...

  939 12:52:00.872891  scan_usb_bus for USB3 port 3

  940 12:52:00.876989  scan_usb_bus for USB3 port 3 done

  941 12:52:00.882207  scan_bus: scanning of bus USB3 port 3 took 9057 usecs

  942 12:52:00.884350  USB3 port 4 scanning...

  943 12:52:00.887275  scan_usb_bus for USB3 port 4

  944 12:52:00.890944  scan_usb_bus for USB3 port 4 done

  945 12:52:00.896606  scan_bus: scanning of bus USB3 port 4 took 9058 usecs

  946 12:52:00.899864  scan_usb_bus for USB0 port 0 done

  947 12:52:00.905336  scan_bus: scanning of bus USB0 port 0 took 239206 usecs

  948 12:52:00.909298  scan_usb_bus for PCI: 00:14.0 done

  949 12:52:00.914635  scan_bus: scanning of bus PCI: 00:14.0 took 256131 usecs

  950 12:52:00.916900  PCI: 00:15.0 scanning...

  951 12:52:00.920914  scan_generic_bus for PCI: 00:15.0

  952 12:52:00.924944  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  953 12:52:00.929117  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  954 12:52:00.933299  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  955 12:52:00.936336  scan_generic_bus for PCI: 00:15.0 done

  956 12:52:00.943042  scan_bus: scanning of bus PCI: 00:15.0 took 22379 usecs

  957 12:52:00.944642  PCI: 00:15.1 scanning...

  958 12:52:00.948672  scan_generic_bus for PCI: 00:15.1

  959 12:52:00.952393  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  960 12:52:00.956707  scan_generic_bus for PCI: 00:15.1 done

  961 12:52:00.962776  scan_bus: scanning of bus PCI: 00:15.1 took 14210 usecs

  962 12:52:00.964868  PCI: 00:19.0 scanning...

  963 12:52:00.969026  scan_generic_bus for PCI: 00:19.0

  964 12:52:00.973287  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

  965 12:52:00.976659  scan_generic_bus for PCI: 00:19.0 done

  966 12:52:00.982394  scan_bus: scanning of bus PCI: 00:19.0 took 14203 usecs

  967 12:52:00.984061  PCI: 00:1c.0 scanning...

  968 12:52:00.988271  do_pci_scan_bridge for PCI: 00:1c.0

  969 12:52:00.991163  PCI: pci_scan_bus for bus 01

  970 12:52:00.994707  PCI: 01:00.0 [10ec/525a] enabled

  971 12:52:00.997971  Capability: type 0x01 @ 0x80

  972 12:52:01.000399  Capability: type 0x05 @ 0x90

  973 12:52:01.003870  Capability: type 0x10 @ 0xb0

  974 12:52:01.006567  Capability: type 0x10 @ 0x40

  975 12:52:01.010234  Enabling Common Clock Configuration

  976 12:52:01.014895  L1 Sub-State supported from root port 28

  977 12:52:01.017484  L1 Sub-State Support = 0xf

  978 12:52:01.019766  CommonModeRestoreTime = 0x3c

  979 12:52:01.024306  Power On Value = 0x6, Power On Scale = 0x1

  980 12:52:01.026385  ASPM: Enabled L0s and L1

  981 12:52:01.030184  Capability: type 0x01 @ 0x80

  982 12:52:01.032238  Capability: type 0x05 @ 0x90

  983 12:52:01.035409  Capability: type 0x10 @ 0xb0

  984 12:52:01.041481  scan_bus: scanning of bus PCI: 00:1c.0 took 53649 usecs

  985 12:52:01.043784  PCI: 00:1d.0 scanning...

  986 12:52:01.047466  do_pci_scan_bridge for PCI: 00:1d.0

  987 12:52:01.050867  PCI: pci_scan_bus for bus 02

  988 12:52:01.053733  PCI: 02:00.0 [1217/8620] enabled

  989 12:52:01.056811  Capability: type 0x01 @ 0x6c

  990 12:52:01.059964  Capability: type 0x05 @ 0x48

  991 12:52:01.062855  Capability: type 0x10 @ 0x80

  992 12:52:01.065243  Capability: type 0x10 @ 0x40

  993 12:52:01.070027  L1 Sub-State supported from root port 29

  994 12:52:01.072194  L1 Sub-State Support = 0xf

  995 12:52:01.075398  CommonModeRestoreTime = 0x78

  996 12:52:01.079380  Power On Value = 0x16, Power On Scale = 0x0

  997 12:52:01.081855  ASPM: Enabled L1

  998 12:52:01.086359  Capability: type 0x01 @ 0x6c

  999 12:52:01.090692  Capability: type 0x05 @ 0x48

 1000 12:52:01.095486  Capability: type 0x10 @ 0x80

 1001 12:52:01.102909  scan_bus: scanning of bus PCI: 00:1d.0 took 56011 usecs

 1002 12:52:01.105082  PCI: 00:1f.0 scanning...

 1003 12:52:01.109194  scan_lpc_bus for PCI: 00:1f.0

 1004 12:52:01.110514  PNP: 0c09.0 enabled

 1005 12:52:01.114014  scan_lpc_bus for PCI: 00:1f.0 done

 1006 12:52:01.119528  scan_bus: scanning of bus PCI: 00:1f.0 took 11424 usecs

 1007 12:52:01.121825  PCI: 00:1f.3 scanning...

 1008 12:52:01.128322  scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs

 1009 12:52:01.130900  PCI: 00:1f.4 scanning...

 1010 12:52:01.134405  scan_generic_bus for PCI: 00:1f.4

 1011 12:52:01.137932  scan_generic_bus for PCI: 00:1f.4 done

 1012 12:52:01.143966  scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs

 1013 12:52:01.146826  PCI: 00:1f.5 scanning...

 1014 12:52:01.149725  scan_generic_bus for PCI: 00:1f.5

 1015 12:52:01.153349  scan_generic_bus for PCI: 00:1f.5 done

 1016 12:52:01.159090  scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs

 1017 12:52:01.164825  scan_bus: scanning of bus DOMAIN: 0000 took 707312 usecs

 1018 12:52:01.168966  root_dev_scan_bus for Root Device done

 1019 12:52:01.174948  scan_bus: scanning of bus Root Device took 727445 usecs

 1020 12:52:01.175741  done

 1021 12:52:01.180770  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

 1022 12:52:01.187773  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1023 12:52:01.194751  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

 1024 12:52:01.201137  MRC: cache data 'RECOVERY_MRC_CACHE' needs update.

 1025 12:52:01.217584  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1026 12:52:01.222239  ELOG: NV offset 0x1bf0000 size 0x4000

 1027 12:52:01.229769  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1028 12:52:01.235881  ELOG: Event(17) added with size 13 at 2023-03-22 12:52:00 UTC

 1029 12:52:01.240669  POST: Unexpected post code in previous boot: 0x92

 1030 12:52:01.247891  ELOG: Event(A3) added with size 11 at 2023-03-22 12:52:00 UTC

 1031 12:52:01.254159  ELOG: Event(AA) added with size 11 at 2023-03-22 12:52:00 UTC

 1032 12:52:01.259687  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

 1033 12:52:01.263511  SPI flash protection: WPSW=0 SRP0=0

 1034 12:52:01.268404  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1035 12:52:01.274361  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148961 exit 86956

 1036 12:52:01.276556  found VGA at PCI: 00:02.0

 1037 12:52:01.280030  Setting up VGA for PCI: 00:02.0

 1038 12:52:01.285314  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1039 12:52:01.290304  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1040 12:52:01.292685  Allocating resources...

 1041 12:52:01.294772  Reading resources...

 1042 12:52:01.298783  Root Device read_resources bus 0 link: 0

 1043 12:52:01.303944  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1044 12:52:01.308234  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1045 12:52:01.313322  DOMAIN: 0000 read_resources bus 0 link: 0

 1046 12:52:01.319585  PCI: 00:14.0 read_resources bus 0 link: 0

 1047 12:52:01.323232  USB0 port 0 read_resources bus 0 link: 0

 1048 12:52:01.332959  USB0 port 0 read_resources bus 0 link: 0 done

 1049 12:52:01.337862  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1050 12:52:01.343308  PCI: 00:15.0 read_resources bus 1 link: 0

 1051 12:52:01.349854  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1052 12:52:01.353438  PCI: 00:15.1 read_resources bus 2 link: 0

 1053 12:52:01.359388  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1054 12:52:01.363583  PCI: 00:19.0 read_resources bus 3 link: 0

 1055 12:52:01.369637  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1056 12:52:01.374764  PCI: 00:1c.0 read_resources bus 1 link: 0

 1057 12:52:01.379065  PCI: 00:1c.0 read_resources bus 1 link: 0 done

 1058 12:52:01.384519  PCI: 00:1d.0 read_resources bus 2 link: 0

 1059 12:52:01.390815  PCI: 00:1d.0 read_resources bus 2 link: 0 done

 1060 12:52:01.395027  PCI: 00:1f.0 read_resources bus 0 link: 0

 1061 12:52:01.400240  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1062 12:52:01.406963  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1063 12:52:01.411941  Root Device read_resources bus 0 link: 0 done

 1064 12:52:01.414723  Done reading resources.

 1065 12:52:01.420385  Show resources in subtree (Root Device)...After reading.

 1066 12:52:01.425086   Root Device child on link 0 CPU_CLUSTER: 0

 1067 12:52:01.428868    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1068 12:52:01.430058     APIC: 00

 1069 12:52:01.431484     APIC: 03

 1070 12:52:01.432858     APIC: 07

 1071 12:52:01.433708     APIC: 01

 1072 12:52:01.435586     APIC: 02

 1073 12:52:01.436473     APIC: 06

 1074 12:52:01.437786     APIC: 05

 1075 12:52:01.438969     APIC: 04

 1076 12:52:01.443162    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1077 12:52:01.452118    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1078 12:52:01.461688    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1079 12:52:01.463251     PCI: 00:00.0

 1080 12:52:01.473727     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1081 12:52:01.483402     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1082 12:52:01.492680     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1083 12:52:01.502109     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1084 12:52:01.510892     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1085 12:52:01.520726     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1086 12:52:01.529478     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1087 12:52:01.538122     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1088 12:52:01.548321     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1089 12:52:01.557340     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1090 12:52:01.566488     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1091 12:52:01.576758     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1092 12:52:01.585739     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1093 12:52:01.594599     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1094 12:52:01.596855     PCI: 00:02.0

 1095 12:52:01.607247     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1096 12:52:01.617316     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1097 12:52:01.625789     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1098 12:52:01.627963     PCI: 00:04.0

 1099 12:52:01.637496     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1100 12:52:01.639652     PCI: 00:08.0

 1101 12:52:01.648955     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1102 12:52:01.650430     PCI: 00:12.0

 1103 12:52:01.661013     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1104 12:52:01.665149     PCI: 00:14.0 child on link 0 USB0 port 0

 1105 12:52:01.675063     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1106 12:52:01.679323      USB0 port 0 child on link 0 USB2 port 0

 1107 12:52:01.680784       USB2 port 0

 1108 12:52:01.682650       USB2 port 1

 1109 12:52:01.684649       USB2 port 2

 1110 12:52:01.686203       USB2 port 4

 1111 12:52:01.687735       USB2 port 5

 1112 12:52:01.690193       USB2 port 6

 1113 12:52:01.691637       USB2 port 7

 1114 12:52:01.693696       USB2 port 8

 1115 12:52:01.695659       USB2 port 9

 1116 12:52:01.697024       USB3 port 0

 1117 12:52:01.698605       USB3 port 1

 1118 12:52:01.699980       USB3 port 2

 1119 12:52:01.701875       USB3 port 3

 1120 12:52:01.703533       USB3 port 4

 1121 12:52:01.705531     PCI: 00:14.2

 1122 12:52:01.715457     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1123 12:52:01.724920     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1124 12:52:01.726452     PCI: 00:14.3

 1125 12:52:01.736544     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1126 12:52:01.741482     PCI: 00:15.0 child on link 0 I2C: 01:10

 1127 12:52:01.751619     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1128 12:52:01.752359      I2C: 01:10

 1129 12:52:01.753666      I2C: 01:10

 1130 12:52:01.755307      I2C: 01:34

 1131 12:52:01.760070     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1132 12:52:01.770184     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1133 12:52:01.771537      I2C: 02:2c

 1134 12:52:01.773193     PCI: 00:17.0

 1135 12:52:01.782062     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1136 12:52:01.791062     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1137 12:52:01.799113     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1138 12:52:01.807127     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1139 12:52:01.815804     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1140 12:52:01.824939     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1141 12:52:01.829095     PCI: 00:19.0 child on link 0 I2C: 03:50

 1142 12:52:01.839114     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1143 12:52:01.848990     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1144 12:52:01.850381      I2C: 03:50

 1145 12:52:01.851860     PCI: 00:19.2

 1146 12:52:01.863418     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1147 12:52:01.873151     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1148 12:52:01.877692     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1149 12:52:01.885950     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1150 12:52:01.896115     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1151 12:52:01.905401     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1152 12:52:01.906532      PCI: 01:00.0

 1153 12:52:01.916707      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1154 12:52:01.920775     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1155 12:52:01.929103     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1156 12:52:01.939841     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1157 12:52:01.948435     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1158 12:52:01.950010      PCI: 02:00.0

 1159 12:52:01.959461      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1160 12:52:01.967951      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14

 1161 12:52:01.973456     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1162 12:52:01.981830     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1163 12:52:01.990117     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1164 12:52:01.991946      PNP: 0c09.0

 1165 12:52:02.000069      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1166 12:52:02.008844      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1167 12:52:02.017569      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1168 12:52:02.019346     PCI: 00:1f.3

 1169 12:52:02.029179     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1170 12:52:02.039789     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1171 12:52:02.040756     PCI: 00:1f.4

 1172 12:52:02.050208     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1173 12:52:02.060065     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1174 12:52:02.061487     PCI: 00:1f.5

 1175 12:52:02.070727     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1176 12:52:02.072206     PCI: 00:1f.6

 1177 12:52:02.081886     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1178 12:52:02.087609  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1179 12:52:02.094699  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1180 12:52:02.101325  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1181 12:52:02.108201  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1182 12:52:02.113792  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1183 12:52:02.118351  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1184 12:52:02.121201  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1185 12:52:02.125078  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1186 12:52:02.128569  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1187 12:52:02.136215  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1188 12:52:02.142345  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1189 12:52:02.149476  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1190 12:52:02.158769  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1191 12:52:02.165292  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1192 12:52:02.169021  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1193 12:52:02.176789  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1194 12:52:02.184745  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1195 12:52:02.193980  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1196 12:52:02.199801  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1197 12:52:02.203378  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem

 1198 12:52:02.208457  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem

 1199 12:52:02.215893  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1200 12:52:02.220728  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1201 12:52:02.224938  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1202 12:52:02.230224  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1203 12:52:02.234523  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1204 12:52:02.239517  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1205 12:52:02.244405  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1206 12:52:02.249634  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1207 12:52:02.255034  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1208 12:52:02.259385  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1209 12:52:02.263751  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1210 12:52:02.268889  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1211 12:52:02.274398  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1212 12:52:02.278224  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1213 12:52:02.283674  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1214 12:52:02.288527  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1215 12:52:02.293349  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1216 12:52:02.298264  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1217 12:52:02.303241  PCI: 00:19.0 10 *  [0x11349000 - 0x11349fff] mem

 1218 12:52:02.307580  PCI: 00:19.0 18 *  [0x1134a000 - 0x1134afff] mem

 1219 12:52:02.312462  PCI: 00:19.2 18 *  [0x1134b000 - 0x1134bfff] mem

 1220 12:52:02.317973  PCI: 00:1f.5 10 *  [0x1134c000 - 0x1134cfff] mem

 1221 12:52:02.322638  PCI: 00:17.0 24 *  [0x1134d000 - 0x1134d7ff] mem

 1222 12:52:02.326865  PCI: 00:17.0 14 *  [0x1134e000 - 0x1134e0ff] mem

 1223 12:52:02.331907  PCI: 00:1f.4 10 *  [0x1134f000 - 0x1134f0ff] mem

 1224 12:52:02.340918  DOMAIN: 0000 mem: base: 1134f100 size: 1134f100 align: 28 gran: 0 limit: ffffffff done

 1225 12:52:02.344065  avoid_fixed_resources: DOMAIN: 0000

 1226 12:52:02.350210  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1227 12:52:02.356312  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1228 12:52:02.363708  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1229 12:52:02.371527  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1230 12:52:02.379191  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1231 12:52:02.386858  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1232 12:52:02.394669  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1233 12:52:02.402364  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1234 12:52:02.410133  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1235 12:52:02.417332  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1236 12:52:02.424590  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1237 12:52:02.431541  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1238 12:52:02.433951  Setting resources...

 1239 12:52:02.440115  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1240 12:52:02.444055  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1241 12:52:02.448107  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1242 12:52:02.452408  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1243 12:52:02.456707  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1244 12:52:02.462258  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1245 12:52:02.468859  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1246 12:52:02.475218  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1247 12:52:02.481170  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1248 12:52:02.488210  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1249 12:52:02.495233  DOMAIN: 0000 mem: base:c0000000 size:1134f100 align:28 gran:0 limit:dfffffff

 1250 12:52:02.500856  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1251 12:52:02.505543  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1252 12:52:02.510033  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1253 12:52:02.515108  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1254 12:52:02.520024  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1255 12:52:02.524274  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1256 12:52:02.529961  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1257 12:52:02.534331  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1258 12:52:02.538959  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1259 12:52:02.544051  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1260 12:52:02.549776  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1261 12:52:02.554508  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1262 12:52:02.559248  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1263 12:52:02.563608  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1264 12:52:02.568248  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1265 12:52:02.573461  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1266 12:52:02.578419  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1267 12:52:02.583119  PCI: 00:19.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1268 12:52:02.588187  PCI: 00:19.0 18 *  [0xd134a000 - 0xd134afff] mem

 1269 12:52:02.593062  PCI: 00:19.2 18 *  [0xd134b000 - 0xd134bfff] mem

 1270 12:52:02.597740  PCI: 00:1f.5 10 *  [0xd134c000 - 0xd134cfff] mem

 1271 12:52:02.602729  PCI: 00:17.0 24 *  [0xd134d000 - 0xd134d7ff] mem

 1272 12:52:02.607566  PCI: 00:17.0 14 *  [0xd134e000 - 0xd134e0ff] mem

 1273 12:52:02.611913  PCI: 00:1f.4 10 *  [0xd134f000 - 0xd134f0ff] mem

 1274 12:52:02.619862  DOMAIN: 0000 mem: next_base: d134f100 size: 1134f100 align: 28 gran: 0 done

 1275 12:52:02.627380  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1276 12:52:02.633978  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1277 12:52:02.641769  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1278 12:52:02.646636  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1279 12:52:02.654653  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1280 12:52:02.661534  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1281 12:52:02.668498  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1282 12:52:02.676529  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1283 12:52:02.680954  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem

 1284 12:52:02.685687  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem

 1285 12:52:02.693592  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done

 1286 12:52:02.697763  Root Device assign_resources, bus 0 link: 0

 1287 12:52:02.703000  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1288 12:52:02.710846  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1289 12:52:02.720018  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1290 12:52:02.727249  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1291 12:52:02.735042  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1292 12:52:02.743684  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1293 12:52:02.752341  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1294 12:52:02.760484  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1295 12:52:02.764810  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1296 12:52:02.769540  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1297 12:52:02.777780  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1298 12:52:02.785905  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1299 12:52:02.793888  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1300 12:52:02.802541  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1301 12:52:02.807239  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1302 12:52:02.812063  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1303 12:52:02.819884  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1304 12:52:02.824079  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1305 12:52:02.829803  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1306 12:52:02.837009  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1307 12:52:02.844793  PCI: 00:17.0 14 <- [0x00d134e000 - 0x00d134e0ff] size 0x00000100 gran 0x08 mem

 1308 12:52:02.853297  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1309 12:52:02.860344  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1310 12:52:02.867851  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1311 12:52:02.876143  PCI: 00:17.0 24 <- [0x00d134d000 - 0x00d134d7ff] size 0x00000800 gran 0x0b mem

 1312 12:52:02.884329  PCI: 00:19.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1313 12:52:02.892313  PCI: 00:19.0 18 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1314 12:52:02.897228  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1315 12:52:02.901463  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1316 12:52:02.909305  PCI: 00:19.2 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1317 12:52:02.918350  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1318 12:52:02.927299  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1319 12:52:02.935118  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1320 12:52:02.940645  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1321 12:52:02.947927  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1322 12:52:02.952822  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1323 12:52:02.962250  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1324 12:52:02.970676  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1325 12:52:02.979572  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1326 12:52:02.983198  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1327 12:52:02.993175  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem

 1328 12:52:03.002534  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem

 1329 12:52:03.009149  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1330 12:52:03.013435  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1331 12:52:03.018991  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1332 12:52:03.023468  LPC: Trying to open IO window from 930 size 8

 1333 12:52:03.028185  LPC: Trying to open IO window from 940 size 8

 1334 12:52:03.033253  LPC: Trying to open IO window from 950 size 10

 1335 12:52:03.041252  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1336 12:52:03.049117  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1337 12:52:03.057976  PCI: 00:1f.4 10 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem64

 1338 12:52:03.065105  PCI: 00:1f.5 10 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem

 1339 12:52:03.073954  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1340 12:52:03.078447  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1341 12:52:03.083138  Root Device assign_resources, bus 0 link: 0

 1342 12:52:03.085437  Done setting resources.

 1343 12:52:03.091959  Show resources in subtree (Root Device)...After assigning values.

 1344 12:52:03.096799   Root Device child on link 0 CPU_CLUSTER: 0

 1345 12:52:03.100981    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1346 12:52:03.102268     APIC: 00

 1347 12:52:03.103687     APIC: 03

 1348 12:52:03.104232     APIC: 07

 1349 12:52:03.105537     APIC: 01

 1350 12:52:03.107436     APIC: 02

 1351 12:52:03.108047     APIC: 06

 1352 12:52:03.109431     APIC: 05

 1353 12:52:03.110276     APIC: 04

 1354 12:52:03.115710    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1355 12:52:03.124485    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1356 12:52:03.135285    DOMAIN: 0000 resource base c0000000 size 1134f100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1357 12:52:03.137316     PCI: 00:00.0

 1358 12:52:03.147489     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1359 12:52:03.156575     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1360 12:52:03.165359     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1361 12:52:03.174781     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1362 12:52:03.184270     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1363 12:52:03.194395     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1364 12:52:03.203190     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1365 12:52:03.212032     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1366 12:52:03.221543     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1367 12:52:03.230999     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1368 12:52:03.240496     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1369 12:52:03.250941     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1370 12:52:03.259357     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1371 12:52:03.269125     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1372 12:52:03.270003     PCI: 00:02.0

 1373 12:52:03.280961     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1374 12:52:03.292215     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1375 12:52:03.300549     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1376 12:52:03.301930     PCI: 00:04.0

 1377 12:52:03.313257     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1378 12:52:03.314139     PCI: 00:08.0

 1379 12:52:03.324364     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1380 12:52:03.326259     PCI: 00:12.0

 1381 12:52:03.337145     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1382 12:52:03.340955     PCI: 00:14.0 child on link 0 USB0 port 0

 1383 12:52:03.351760     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1384 12:52:03.355398      USB0 port 0 child on link 0 USB2 port 0

 1385 12:52:03.357882       USB2 port 0

 1386 12:52:03.359460       USB2 port 1

 1387 12:52:03.360956       USB2 port 2

 1388 12:52:03.362961       USB2 port 4

 1389 12:52:03.365098       USB2 port 5

 1390 12:52:03.366579       USB2 port 6

 1391 12:52:03.368091       USB2 port 7

 1392 12:52:03.370087       USB2 port 8

 1393 12:52:03.371025       USB2 port 9

 1394 12:52:03.373125       USB3 port 0

 1395 12:52:03.375145       USB3 port 1

 1396 12:52:03.377286       USB3 port 2

 1397 12:52:03.378228       USB3 port 3

 1398 12:52:03.380739       USB3 port 4

 1399 12:52:03.382641     PCI: 00:14.2

 1400 12:52:03.392454     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1401 12:52:03.402943     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1402 12:52:03.404333     PCI: 00:14.3

 1403 12:52:03.414486     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1404 12:52:03.419224     PCI: 00:15.0 child on link 0 I2C: 01:10

 1405 12:52:03.429602     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1406 12:52:03.430321      I2C: 01:10

 1407 12:52:03.431684      I2C: 01:10

 1408 12:52:03.434478      I2C: 01:34

 1409 12:52:03.438122     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1410 12:52:03.448440     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1411 12:52:03.449893      I2C: 02:2c

 1412 12:52:03.451887     PCI: 00:17.0

 1413 12:52:03.461843     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1414 12:52:03.471855     PCI: 00:17.0 resource base d134e000 size 100 align 12 gran 8 limit d134e0ff flags 60000200 index 14

 1415 12:52:03.481021     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1416 12:52:03.490213     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1417 12:52:03.499088     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1418 12:52:03.509235     PCI: 00:17.0 resource base d134d000 size 800 align 12 gran 11 limit d134d7ff flags 60000200 index 24

 1419 12:52:03.513737     PCI: 00:19.0 child on link 0 I2C: 03:50

 1420 12:52:03.523766     PCI: 00:19.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1421 12:52:03.534450     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 18

 1422 12:52:03.535844      I2C: 03:50

 1423 12:52:03.537444     PCI: 00:19.2

 1424 12:52:03.548847     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1425 12:52:03.558774     PCI: 00:19.2 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1426 12:52:03.563603     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1427 12:52:03.572431     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1428 12:52:03.582804     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1429 12:52:03.592805     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1430 12:52:03.594973      PCI: 01:00.0

 1431 12:52:03.604783      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1432 12:52:03.609819     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1433 12:52:03.619819     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1434 12:52:03.629294     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1435 12:52:03.639239     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1436 12:52:03.641176      PCI: 02:00.0

 1437 12:52:03.651801      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10

 1438 12:52:03.661592      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14

 1439 12:52:03.665860     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1440 12:52:03.674505     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1441 12:52:03.684023     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1442 12:52:03.686064      PNP: 0c09.0

 1443 12:52:03.693586      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1444 12:52:03.702704      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1445 12:52:03.710679      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1446 12:52:03.712318     PCI: 00:1f.3

 1447 12:52:03.722843     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1448 12:52:03.734065     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1449 12:52:03.735485     PCI: 00:1f.4

 1450 12:52:03.744388     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1451 12:52:03.754632     PCI: 00:1f.4 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000201 index 10

 1452 12:52:03.756150     PCI: 00:1f.5

 1453 12:52:03.766678     PCI: 00:1f.5 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000200 index 10

 1454 12:52:03.768148     PCI: 00:1f.6

 1455 12:52:03.778211     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1456 12:52:03.781593  Done allocating resources.

 1457 12:52:03.787315  BS: BS_DEV_RESOURCES times (us): entry 0 run 2506949 exit 21

 1458 12:52:03.790212  Enabling resources...

 1459 12:52:03.794571  PCI: 00:00.0 subsystem <- 1028/3e34

 1460 12:52:03.796769  PCI: 00:00.0 cmd <- 06

 1461 12:52:03.800386  PCI: 00:02.0 subsystem <- 1028/3ea0

 1462 12:52:03.803381  PCI: 00:02.0 cmd <- 03

 1463 12:52:03.807574  PCI: 00:04.0 subsystem <- 1028/1903

 1464 12:52:03.809200  PCI: 00:04.0 cmd <- 02

 1465 12:52:03.812078  PCI: 00:08.0 cmd <- 06

 1466 12:52:03.816201  PCI: 00:12.0 subsystem <- 1028/9df9

 1467 12:52:03.817901  PCI: 00:12.0 cmd <- 02

 1468 12:52:03.822050  PCI: 00:14.0 subsystem <- 1028/9ded

 1469 12:52:03.824873  PCI: 00:14.0 cmd <- 02

 1470 12:52:03.827742  PCI: 00:14.2 cmd <- 02

 1471 12:52:03.830740  PCI: 00:14.3 subsystem <- 1028/9df0

 1472 12:52:03.833432  PCI: 00:14.3 cmd <- 02

 1473 12:52:03.837334  PCI: 00:15.0 subsystem <- 1028/9de8

 1474 12:52:03.839430  PCI: 00:15.0 cmd <- 02

 1475 12:52:03.843086  PCI: 00:15.1 subsystem <- 1028/9de9

 1476 12:52:03.846315  PCI: 00:15.1 cmd <- 02

 1477 12:52:03.849829  PCI: 00:17.0 subsystem <- 1028/9dd3

 1478 12:52:03.852588  PCI: 00:17.0 cmd <- 03

 1479 12:52:03.855725  PCI: 00:19.0 subsystem <- 1028/9dc5

 1480 12:52:03.858401  PCI: 00:19.0 cmd <- 06

 1481 12:52:03.861956  PCI: 00:19.2 subsystem <- 1028/9dc7

 1482 12:52:03.864605  PCI: 00:19.2 cmd <- 06

 1483 12:52:03.868205  PCI: 00:1c.0 bridge ctrl <- 0003

 1484 12:52:03.872222  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1485 12:52:03.875007  Capability: type 0x10 @ 0x40

 1486 12:52:03.877903  Capability: type 0x05 @ 0x80

 1487 12:52:03.880208  Capability: type 0x0d @ 0x90

 1488 12:52:03.883118  PCI: 00:1c.0 cmd <- 06

 1489 12:52:03.886569  PCI: 00:1d.0 bridge ctrl <- 0003

 1490 12:52:03.890167  PCI: 00:1d.0 subsystem <- 1028/9db4

 1491 12:52:03.893368  Capability: type 0x10 @ 0x40

 1492 12:52:03.896334  Capability: type 0x05 @ 0x80

 1493 12:52:03.898659  Capability: type 0x0d @ 0x90

 1494 12:52:03.900850  PCI: 00:1d.0 cmd <- 06

 1495 12:52:03.905555  PCI: 00:1f.0 subsystem <- 1028/9d84

 1496 12:52:03.907683  PCI: 00:1f.0 cmd <- 407

 1497 12:52:03.911442  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1498 12:52:03.913511  PCI: 00:1f.3 cmd <- 02

 1499 12:52:03.917830  PCI: 00:1f.4 subsystem <- 1028/9da3

 1500 12:52:03.919883  PCI: 00:1f.4 cmd <- 03

 1501 12:52:03.924726  PCI: 00:1f.5 subsystem <- 1028/9da4

 1502 12:52:03.926258  PCI: 00:1f.5 cmd <- 406

 1503 12:52:03.930628  PCI: 00:1f.6 subsystem <- 1028/15be

 1504 12:52:03.933050  PCI: 00:1f.6 cmd <- 02

 1505 12:52:03.943350  PCI: 01:00.0 cmd <- 02

 1506 12:52:03.947932  PCI: 02:00.0 cmd <- 06

 1507 12:52:03.951407  done.

 1508 12:52:03.957623  BS: BS_DEV_ENABLE times (us): entry 405 run 164202 exit 0

 1509 12:52:03.960055  Initializing devices...

 1510 12:52:03.962349  Root Device init ...

 1511 12:52:03.965902  Root Device init finished in 2139 usecs

 1512 12:52:03.968590  CPU_CLUSTER: 0 init ...

 1513 12:52:03.973065  CPU_CLUSTER: 0 init finished in 2430 usecs

 1514 12:52:03.979525  PCI: 00:00.0 init ...

 1515 12:52:03.982694  CPU TDP: 15 Watts

 1516 12:52:03.984244  CPU PL2 = 51 Watts

 1517 12:52:03.989020  PCI: 00:00.0 init finished in 7039 usecs

 1518 12:52:03.991848  PCI: 00:02.0 init ...

 1519 12:52:03.995487  PCI: 00:02.0 init finished in 2237 usecs

 1520 12:52:03.998301  PCI: 00:04.0 init ...

 1521 12:52:04.002636  PCI: 00:04.0 init finished in 2237 usecs

 1522 12:52:04.004912  PCI: 00:08.0 init ...

 1523 12:52:04.009171  PCI: 00:08.0 init finished in 2237 usecs

 1524 12:52:04.011407  PCI: 00:12.0 init ...

 1525 12:52:04.015509  PCI: 00:12.0 init finished in 2237 usecs

 1526 12:52:04.017977  PCI: 00:14.0 init ...

 1527 12:52:04.022319  PCI: 00:14.0 init finished in 2237 usecs

 1528 12:52:04.024355  PCI: 00:14.2 init ...

 1529 12:52:04.028844  PCI: 00:14.2 init finished in 2228 usecs

 1530 12:52:04.032222  PCI: 00:14.3 init ...

 1531 12:52:04.035033  PCI: 00:14.3 init finished in 2241 usecs

 1532 12:52:04.038598  PCI: 00:15.0 init ...

 1533 12:52:04.042098  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1534 12:52:04.045611  PCI: 00:15.0 init finished in 5937 usecs

 1535 12:52:04.049003  PCI: 00:15.1 init ...

 1536 12:52:04.052420  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1537 12:52:04.056632  PCI: 00:15.1 init finished in 5927 usecs

 1538 12:52:04.059764  PCI: 00:19.0 init ...

 1539 12:52:04.062848  DW I2C bus 4 at 0xd1349000 (400 KHz)

 1540 12:52:04.067041  PCI: 00:19.0 init finished in 5927 usecs

 1541 12:52:04.070247  PCI: 00:1c.0 init ...

 1542 12:52:04.073654  Initializing PCH PCIe bridge.

 1543 12:52:04.077224  PCI: 00:1c.0 init finished in 5250 usecs

 1544 12:52:04.079822  PCI: 00:1d.0 init ...

 1545 12:52:04.083171  Initializing PCH PCIe bridge.

 1546 12:52:04.087094  PCI: 00:1d.0 init finished in 5250 usecs

 1547 12:52:04.089976  PCI: 00:1f.0 init ...

 1548 12:52:04.094692  IOAPIC: Initializing IOAPIC at 0xfec00000

 1549 12:52:04.098971  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1550 12:52:04.100642  IOAPIC: ID = 0x02

 1551 12:52:04.103390  IOAPIC: Dumping registers

 1552 12:52:04.105080    reg 0x0000: 0x02000000

 1553 12:52:04.108392    reg 0x0001: 0x00770020

 1554 12:52:04.110699    reg 0x0002: 0x00000000

 1555 12:52:04.116328  PCI: 00:1f.0 init finished in 25039 usecs

 1556 12:52:04.119115  PCI: 00:1f.3 init ...

 1557 12:52:04.124677  HDA: codec_mask = 05

 1558 12:52:04.127008  HDA: Initializing codec #2

 1559 12:52:04.130421  HDA: codec viddid: 8086280b

 1560 12:52:04.133935  HDA: No verb table entry found

 1561 12:52:04.136191  HDA: Initializing codec #0

 1562 12:52:04.138277  HDA: codec viddid: 10ec0236

 1563 12:52:04.145216  HDA: verb loaded.

 1564 12:52:04.150235  PCI: 00:1f.3 init finished in 28835 usecs

 1565 12:52:04.152431  PCI: 00:1f.4 init ...

 1566 12:52:04.156966  PCI: 00:1f.4 init finished in 2246 usecs

 1567 12:52:04.159931  PCI: 00:1f.6 init ...

 1568 12:52:04.164199  PCI: 00:1f.6 init finished in 2236 usecs

 1569 12:52:04.174658  PCI: 01:00.0 init ...

 1570 12:52:04.179300  PCI: 01:00.0 init finished in 2237 usecs

 1571 12:52:04.181407  PCI: 02:00.0 init ...

 1572 12:52:04.185383  PCI: 02:00.0 init finished in 2237 usecs

 1573 12:52:04.188198  PNP: 0c09.0 init ...

 1574 12:52:04.192214  EC Label      : 00.00.20

 1575 12:52:04.196209  EC Revision   : 9ca674bba

 1576 12:52:04.199183  EC Model Num  : 08B9

 1577 12:52:04.203547  EC Build Date : 05/10/19

 1578 12:52:04.212011  PNP: 0c09.0 init finished in 21746 usecs

 1579 12:52:04.214273  Devices initialized

 1580 12:52:04.216537  Show all devs... After init.

 1581 12:52:04.219229  Root Device: enabled 1

 1582 12:52:04.221929  CPU_CLUSTER: 0: enabled 1

 1583 12:52:04.224051  DOMAIN: 0000: enabled 1

 1584 12:52:04.226795  APIC: 00: enabled 1

 1585 12:52:04.228498  PCI: 00:00.0: enabled 1

 1586 12:52:04.231476  PCI: 00:02.0: enabled 1

 1587 12:52:04.233693  PCI: 00:04.0: enabled 1

 1588 12:52:04.236357  PCI: 00:12.0: enabled 1

 1589 12:52:04.239185  PCI: 00:12.5: enabled 0

 1590 12:52:04.241291  PCI: 00:12.6: enabled 0

 1591 12:52:04.242923  PCI: 00:13.0: enabled 0

 1592 12:52:04.245756  PCI: 00:14.0: enabled 1

 1593 12:52:04.248469  PCI: 00:14.1: enabled 0

 1594 12:52:04.250753  PCI: 00:14.3: enabled 1

 1595 12:52:04.253296  PCI: 00:14.5: enabled 0

 1596 12:52:04.256116  PCI: 00:15.0: enabled 1

 1597 12:52:04.257629  PCI: 00:15.1: enabled 1

 1598 12:52:04.260353  PCI: 00:15.2: enabled 0

 1599 12:52:04.262907  PCI: 00:15.3: enabled 0

 1600 12:52:04.265844  PCI: 00:16.0: enabled 0

 1601 12:52:04.267906  PCI: 00:16.1: enabled 0

 1602 12:52:04.270754  PCI: 00:16.2: enabled 0

 1603 12:52:04.272250  PCI: 00:16.3: enabled 0

 1604 12:52:04.275484  PCI: 00:16.4: enabled 0

 1605 12:52:04.277080  PCI: 00:16.5: enabled 0

 1606 12:52:04.280335  PCI: 00:17.0: enabled 1

 1607 12:52:04.282342  PCI: 00:19.0: enabled 1

 1608 12:52:04.284911  PCI: 00:19.1: enabled 0

 1609 12:52:04.287111  PCI: 00:19.2: enabled 1

 1610 12:52:04.289663  PCI: 00:1a.0: enabled 0

 1611 12:52:04.292343  PCI: 00:1c.0: enabled 1

 1612 12:52:04.294963  PCI: 00:1c.1: enabled 0

 1613 12:52:04.296969  PCI: 00:1c.2: enabled 0

 1614 12:52:04.299105  PCI: 00:1c.3: enabled 0

 1615 12:52:04.301615  PCI: 00:1c.4: enabled 0

 1616 12:52:04.303862  PCI: 00:1c.5: enabled 0

 1617 12:52:04.307038  PCI: 00:1c.6: enabled 0

 1618 12:52:04.309302  PCI: 00:1c.7: enabled 0

 1619 12:52:04.311308  PCI: 00:1d.0: enabled 1

 1620 12:52:04.313492  PCI: 00:1d.1: enabled 0

 1621 12:52:04.316014  PCI: 00:1d.2: enabled 0

 1622 12:52:04.319069  PCI: 00:1d.3: enabled 0

 1623 12:52:04.321303  PCI: 00:1d.4: enabled 0

 1624 12:52:04.323796  PCI: 00:1e.0: enabled 0

 1625 12:52:04.326681  PCI: 00:1e.1: enabled 0

 1626 12:52:04.328277  PCI: 00:1e.2: enabled 0

 1627 12:52:04.330433  PCI: 00:1e.3: enabled 0

 1628 12:52:04.333231  PCI: 00:1f.0: enabled 1

 1629 12:52:04.335476  PCI: 00:1f.1: enabled 0

 1630 12:52:04.338318  PCI: 00:1f.2: enabled 0

 1631 12:52:04.340932  PCI: 00:1f.3: enabled 1

 1632 12:52:04.343031  PCI: 00:1f.4: enabled 1

 1633 12:52:04.345879  PCI: 00:1f.5: enabled 1

 1634 12:52:04.347522  PCI: 00:1f.6: enabled 1

 1635 12:52:04.351062  USB0 port 0: enabled 1

 1636 12:52:04.352690  I2C: 01:10: enabled 1

 1637 12:52:04.354812  I2C: 01:10: enabled 1

 1638 12:52:04.357464  I2C: 01:34: enabled 1

 1639 12:52:04.359121  I2C: 02:2c: enabled 1

 1640 12:52:04.361240  I2C: 03:50: enabled 1

 1641 12:52:04.363378  PNP: 0c09.0: enabled 1

 1642 12:52:04.366288  USB2 port 0: enabled 1

 1643 12:52:04.368496  USB2 port 1: enabled 1

 1644 12:52:04.370592  USB2 port 2: enabled 1

 1645 12:52:04.373264  USB2 port 4: enabled 1

 1646 12:52:04.376052  USB2 port 5: enabled 1

 1647 12:52:04.377612  USB2 port 6: enabled 1

 1648 12:52:04.379724  USB2 port 7: enabled 1

 1649 12:52:04.383073  USB2 port 8: enabled 1

 1650 12:52:04.384624  USB2 port 9: enabled 1

 1651 12:52:04.386603  USB3 port 0: enabled 1

 1652 12:52:04.389315  USB3 port 1: enabled 1

 1653 12:52:04.391855  USB3 port 2: enabled 1

 1654 12:52:04.394484  USB3 port 3: enabled 1

 1655 12:52:04.396085  USB3 port 4: enabled 1

 1656 12:52:04.398483  APIC: 03: enabled 1

 1657 12:52:04.400565  APIC: 07: enabled 1

 1658 12:52:04.402069  APIC: 01: enabled 1

 1659 12:52:04.405252  APIC: 02: enabled 1

 1660 12:52:04.406733  APIC: 06: enabled 1

 1661 12:52:04.408619  APIC: 05: enabled 1

 1662 12:52:04.411255  APIC: 04: enabled 1

 1663 12:52:04.412879  PCI: 00:08.0: enabled 1

 1664 12:52:04.415526  PCI: 00:14.2: enabled 1

 1665 12:52:04.418288  PCI: 01:00.0: enabled 1

 1666 12:52:04.420947  PCI: 02:00.0: enabled 1

 1667 12:52:04.425153  Disabling ACPI via APMC:

 1668 12:52:04.427267  done.

 1669 12:52:04.434235  ELOG: Event(92) added with size 9 at 2023-03-22 12:52:03 UTC

 1670 12:52:04.440697  ELOG: Event(93) added with size 9 at 2023-03-22 12:52:03 UTC

 1671 12:52:04.446233  ELOG: Event(9A) added with size 9 at 2023-03-22 12:52:03 UTC

 1672 12:52:04.452813  ELOG: Event(9E) added with size 10 at 2023-03-22 12:52:03 UTC

 1673 12:52:04.458574  ELOG: Event(9F) added with size 14 at 2023-03-22 12:52:03 UTC

 1674 12:52:04.464801  BS: BS_DEV_INIT times (us): entry 0 run 462880 exit 38327

 1675 12:52:04.471577  ELOG: Event(A1) added with size 10 at 2023-03-22 12:52:03 UTC

 1676 12:52:04.479319  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1677 12:52:04.484691  ELOG: Event(A0) added with size 9 at 2023-03-22 12:52:03 UTC

 1678 12:52:04.489821  elog_add_boot_reason: Logged dev mode boot

 1679 12:52:04.491377  Finalize devices...

 1680 12:52:04.493854  PCI: 00:17.0 final

 1681 12:52:04.495381  Devices finalized

 1682 12:52:04.501272  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1683 12:52:04.507316  BS: BS_POST_DEVICE times (us): entry 24784 run 5940 exit 5367

 1684 12:52:04.512740  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 90 exit 0

 1685 12:52:04.520939  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1686 12:52:04.525540  disable_unused_touchscreen: Disable ACPI0C50

 1687 12:52:04.529824  disable_unused_touchscreen: Enable ELAN900C

 1688 12:52:04.532665  CBFS @ 1d00000 size 300000

 1689 12:52:04.538956  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1690 12:52:04.542974  CBFS: Locating 'fallback/dsdt.aml'

 1691 12:52:04.546565  CBFS: Found @ offset 10b200 size 4448

 1692 12:52:04.548992  CBFS @ 1d00000 size 300000

 1693 12:52:04.555326  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1694 12:52:04.558726  CBFS: Locating 'fallback/slic'

 1695 12:52:04.563518  CBFS: 'fallback/slic' not found.

 1696 12:52:04.567955  ACPI: Writing ACPI tables at 89c0f000.

 1697 12:52:04.569245  ACPI:    * FACS

 1698 12:52:04.571437  ACPI:    * DSDT

 1699 12:52:04.574867  Ramoops buffer: 0x100000@0x89b0e000.

 1700 12:52:04.579454  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1701 12:52:04.584298  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1702 12:52:04.587855  ACPI:    * FADT

 1703 12:52:04.589072  SCI is IRQ9

 1704 12:52:04.593339  ACPI: added table 1/32, length now 40

 1705 12:52:04.595425  ACPI:     * SSDT

 1706 12:52:04.598238  Found 1 CPU(s) with 8 core(s) each.

 1707 12:52:04.602982  Error: Could not locate 'wifi_sar' in VPD.

 1708 12:52:04.606736  Error: failed from getting SAR limits!

 1709 12:52:04.610436  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1710 12:52:04.614659  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1711 12:52:04.619209  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1712 12:52:04.623462  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1713 12:52:04.627709  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1714 12:52:04.633557  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1715 12:52:04.638438  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1716 12:52:04.642655  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1717 12:52:04.648263  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1718 12:52:04.653970  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1719 12:52:04.659875  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1720 12:52:04.666082  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1721 12:52:04.671697  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1722 12:52:04.675353  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1723 12:52:04.680007  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1724 12:52:04.685721  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1725 12:52:04.690213  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1726 12:52:04.695755  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1727 12:52:04.702370  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1728 12:52:04.707899  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1729 12:52:04.713652  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1730 12:52:04.718662  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1731 12:52:04.722654  ACPI: added table 2/32, length now 44

 1732 12:52:04.723553  ACPI:    * MCFG

 1733 12:52:04.727552  ACPI: added table 3/32, length now 48

 1734 12:52:04.729445  ACPI:    * TPM2

 1735 12:52:04.732624  TPM2 log created at 89afe000

 1736 12:52:04.736066  ACPI: added table 4/32, length now 52

 1737 12:52:04.737808  ACPI:    * MADT

 1738 12:52:04.739156  SCI is IRQ9

 1739 12:52:04.742644  ACPI: added table 5/32, length now 56

 1740 12:52:04.744710  current = 89c14bd0

 1741 12:52:04.746968  ACPI:    * IGD OpRegion

 1742 12:52:04.749718  GMA: Found VBT in CBFS

 1743 12:52:04.751990  GMA: Found valid VBT in CBFS

 1744 12:52:04.756810  ACPI: added table 6/32, length now 60

 1745 12:52:04.757748  ACPI:    * HPET

 1746 12:52:04.761353  ACPI: added table 7/32, length now 64

 1747 12:52:04.763294  ACPI: done.

 1748 12:52:04.765547  ACPI tables: 31872 bytes.

 1749 12:52:04.768372  smbios_write_tables: 89afd000

 1750 12:52:04.771127  recv_ec_data: 0x01

 1751 12:52:04.773099  Create SMBIOS type 17

 1752 12:52:04.775481  PCI: 00:14.3 (Intel WiFi)

 1753 12:52:04.778221  SMBIOS tables: 708 bytes.

 1754 12:52:04.782541  Writing table forward entry at 0x00000500

 1755 12:52:04.788672  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1756 12:52:04.792095  Writing coreboot table at 0x89c33000

 1757 12:52:04.797877   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1758 12:52:04.802050   1. 0000000000001000-000000000009ffff: RAM

 1759 12:52:04.807459   2. 00000000000a0000-00000000000fffff: RESERVED

 1760 12:52:04.811116   3. 0000000000100000-0000000089afcfff: RAM

 1761 12:52:04.817078   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1762 12:52:04.822151   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1763 12:52:04.828290   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1764 12:52:04.833225   7. 000000008a000000-000000008f7fffff: RESERVED

 1765 12:52:04.837797   8. 00000000e0000000-00000000efffffff: RESERVED

 1766 12:52:04.842082   9. 00000000fc000000-00000000fc000fff: RESERVED

 1767 12:52:04.847035  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1768 12:52:04.852323  11. 00000000fed10000-00000000fed17fff: RESERVED

 1769 12:52:04.856853  12. 00000000fed80000-00000000fed83fff: RESERVED

 1770 12:52:04.861046  13. 00000000feda0000-00000000feda1fff: RESERVED

 1771 12:52:04.865788  14. 0000000100000000-000000026e7fffff: RAM

 1772 12:52:04.869574  Graphics framebuffer located at 0xc0000000

 1773 12:52:04.872784  Passing 6 GPIOs to payload:

 1774 12:52:04.877787              NAME |       PORT | POLARITY |     VALUE

 1775 12:52:04.882911     write protect | 0x000000dc |     high |       low

 1776 12:52:04.888549          recovery | 0x000000d5 |      low |      high

 1777 12:52:04.893492               lid |  undefined |     high |      high

 1778 12:52:04.899391             power |  undefined |     high |       low

 1779 12:52:04.904923             oprom |  undefined |     high |       low

 1780 12:52:04.909409          EC in RW |  undefined |     high |       low

 1781 12:52:04.911632  recv_ec_data: 0x01

 1782 12:52:04.913042  SKU ID: 3

 1783 12:52:04.915646  CBFS @ 1d00000 size 300000

 1784 12:52:04.922007  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1785 12:52:04.928166  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 296d

 1786 12:52:04.931158  coreboot table: 1484 bytes.

 1787 12:52:04.934481  IMD ROOT    0. 89fff000 00001000

 1788 12:52:04.937255  IMD SMALL   1. 89ffe000 00001000

 1789 12:52:04.940687  FSP MEMORY  2. 89d0e000 002f0000

 1790 12:52:04.943938  CONSOLE     3. 89cee000 00020000

 1791 12:52:04.947810  TIME STAMP  4. 89ced000 00000910

 1792 12:52:04.950754  VBOOT WORK  5. 89cea000 00003000

 1793 12:52:04.954049  VBOOT       6. 89ce9000 00000c0c

 1794 12:52:04.957331  MRC DATA    7. 89ce7000 000018f0

 1795 12:52:04.960357  ROMSTG STCK 8. 89ce6000 00000400

 1796 12:52:04.964203  AFTER CAR   9. 89cdc000 0000a000

 1797 12:52:04.967773  RAMSTAGE   10. 89c80000 0005c000

 1798 12:52:04.970245  REFCODE    11. 89c4b000 00035000

 1799 12:52:04.974181  SMM BACKUP 12. 89c3b000 00010000

 1800 12:52:04.977747  COREBOOT   13. 89c33000 00008000

 1801 12:52:04.981183  ACPI       14. 89c0f000 00024000

 1802 12:52:04.984000  ACPI GNVS  15. 89c0e000 00001000

 1803 12:52:04.987520  RAMOOPS    16. 89b0e000 00100000

 1804 12:52:04.990570  TPM2 TCGLOG17. 89afe000 00010000

 1805 12:52:04.994012  SMBIOS     18. 89afd000 00000800

 1806 12:52:04.995532  IMD small region:

 1807 12:52:04.999533    IMD ROOT    0. 89ffec00 00000400

 1808 12:52:05.002471    FSP RUNTIME 1. 89ffebe0 00000004

 1809 12:52:05.006738    POWER STATE 2. 89ffeba0 00000040

 1810 12:52:05.010190    ROMSTAGE    3. 89ffeb80 00000004

 1811 12:52:05.013287    MEM INFO    4. 89ffe9c0 000001a9

 1812 12:52:05.016728    VPD         5. 89ffe980 00000031

 1813 12:52:05.020274    COREBOOTFWD 6. 89ffe940 00000028

 1814 12:52:05.023684  MTRR: Physical address space:

 1815 12:52:05.029775  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1816 12:52:05.035555  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1817 12:52:05.042160  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1818 12:52:05.047829  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1819 12:52:05.054470  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1820 12:52:05.060225  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1821 12:52:05.067121  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6

 1822 12:52:05.071518  MTRR: Fixed MSR 0x250 0x0606060606060606

 1823 12:52:05.075232  MTRR: Fixed MSR 0x258 0x0606060606060606

 1824 12:52:05.078922  MTRR: Fixed MSR 0x259 0x0000000000000000

 1825 12:52:05.083647  MTRR: Fixed MSR 0x268 0x0606060606060606

 1826 12:52:05.087798  MTRR: Fixed MSR 0x269 0x0606060606060606

 1827 12:52:05.091593  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1828 12:52:05.095712  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1829 12:52:05.099286  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1830 12:52:05.103779  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1831 12:52:05.108451  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1832 12:52:05.111480  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1833 12:52:05.115525  call enable_fixed_mtrr()

 1834 12:52:05.118933  CPU physical address size: 39 bits

 1835 12:52:05.123240  MTRR: default type WB/UC MTRR counts: 7/7.

 1836 12:52:05.126071  MTRR: UC selected as default type.

 1837 12:52:05.132571  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1838 12:52:05.139401  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1839 12:52:05.145632  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1840 12:52:05.151310  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1841 12:52:05.158016  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1842 12:52:05.163769  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1843 12:52:05.170210  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 1844 12:52:05.171433  

 1845 12:52:05.172764  MTRR check

 1846 12:52:05.174872  Fixed MTRRs   : Enabled

 1847 12:52:05.176762  Variable MTRRs: Enabled

 1848 12:52:05.177036  

 1849 12:52:05.181393  MTRR: Fixed MSR 0x250 0x0606060606060606

 1850 12:52:05.185738  MTRR: Fixed MSR 0x258 0x0606060606060606

 1851 12:52:05.189246  MTRR: Fixed MSR 0x259 0x0000000000000000

 1852 12:52:05.194185  MTRR: Fixed MSR 0x268 0x0606060606060606

 1853 12:52:05.197772  MTRR: Fixed MSR 0x269 0x0606060606060606

 1854 12:52:05.201868  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1855 12:52:05.205552  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1856 12:52:05.209673  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1857 12:52:05.213801  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1858 12:52:05.218651  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1859 12:52:05.222250  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1860 12:52:05.229795  BS: BS_WRITE_TABLES times (us): entry 17201 run 490455 exit 157241

 1861 12:52:05.231391  call enable_fixed_mtrr()

 1862 12:52:05.234690  CBFS @ 1d00000 size 300000

 1863 12:52:05.240407  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1864 12:52:05.244536  CPU physical address size: 39 bits

 1865 12:52:05.248045  CBFS: Locating 'fallback/payload'

 1866 12:52:05.252705  MTRR: Fixed MSR 0x250 0x0606060606060606

 1867 12:52:05.256298  MTRR: Fixed MSR 0x250 0x0606060606060606

 1868 12:52:05.260276  MTRR: Fixed MSR 0x258 0x0606060606060606

 1869 12:52:05.263985  MTRR: Fixed MSR 0x259 0x0000000000000000

 1870 12:52:05.268651  MTRR: Fixed MSR 0x268 0x0606060606060606

 1871 12:52:05.273442  MTRR: Fixed MSR 0x269 0x0606060606060606

 1872 12:52:05.276362  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1873 12:52:05.280414  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1874 12:52:05.285293  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1875 12:52:05.288763  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1876 12:52:05.293417  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1877 12:52:05.297218  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1878 12:52:05.302231  MTRR: Fixed MSR 0x258 0x0606060606060606

 1879 12:52:05.304279  call enable_fixed_mtrr()

 1880 12:52:05.307736  MTRR: Fixed MSR 0x259 0x0000000000000000

 1881 12:52:05.311952  MTRR: Fixed MSR 0x268 0x0606060606060606

 1882 12:52:05.316743  MTRR: Fixed MSR 0x269 0x0606060606060606

 1883 12:52:05.320803  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1884 12:52:05.324592  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1885 12:52:05.328161  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1886 12:52:05.332592  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1887 12:52:05.336316  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1888 12:52:05.340398  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1889 12:52:05.344868  CPU physical address size: 39 bits

 1890 12:52:05.347799  call enable_fixed_mtrr()

 1891 12:52:05.351524  MTRR: Fixed MSR 0x250 0x0606060606060606

 1892 12:52:05.356207  MTRR: Fixed MSR 0x250 0x0606060606060606

 1893 12:52:05.360367  MTRR: Fixed MSR 0x258 0x0606060606060606

 1894 12:52:05.364605  MTRR: Fixed MSR 0x259 0x0000000000000000

 1895 12:52:05.367635  MTRR: Fixed MSR 0x268 0x0606060606060606

 1896 12:52:05.372190  MTRR: Fixed MSR 0x269 0x0606060606060606

 1897 12:52:05.375610  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1898 12:52:05.380603  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1899 12:52:05.384125  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1900 12:52:05.388293  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1901 12:52:05.392776  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1902 12:52:05.396329  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1903 12:52:05.401215  MTRR: Fixed MSR 0x258 0x0606060606060606

 1904 12:52:05.404799  MTRR: Fixed MSR 0x259 0x0000000000000000

 1905 12:52:05.408958  MTRR: Fixed MSR 0x268 0x0606060606060606

 1906 12:52:05.413299  MTRR: Fixed MSR 0x269 0x0606060606060606

 1907 12:52:05.417381  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1908 12:52:05.421751  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1909 12:52:05.425385  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1910 12:52:05.429591  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1911 12:52:05.433318  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1912 12:52:05.437622  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1913 12:52:05.440962  call enable_fixed_mtrr()

 1914 12:52:05.443237  call enable_fixed_mtrr()

 1915 12:52:05.447282  CPU physical address size: 39 bits

 1916 12:52:05.449963  CPU physical address size: 39 bits

 1917 12:52:05.454234  MTRR: Fixed MSR 0x250 0x0606060606060606

 1918 12:52:05.458861  MTRR: Fixed MSR 0x250 0x0606060606060606

 1919 12:52:05.463175  MTRR: Fixed MSR 0x258 0x0606060606060606

 1920 12:52:05.466419  MTRR: Fixed MSR 0x259 0x0000000000000000

 1921 12:52:05.470621  MTRR: Fixed MSR 0x268 0x0606060606060606

 1922 12:52:05.474728  MTRR: Fixed MSR 0x269 0x0606060606060606

 1923 12:52:05.478799  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1924 12:52:05.482950  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1925 12:52:05.487026  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1926 12:52:05.490931  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1927 12:52:05.495493  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1928 12:52:05.499164  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1929 12:52:05.504157  MTRR: Fixed MSR 0x258 0x0606060606060606

 1930 12:52:05.506494  call enable_fixed_mtrr()

 1931 12:52:05.511246  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 12:52:05.514294  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 12:52:05.518432  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 12:52:05.522582  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 12:52:05.527329  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 12:52:05.530888  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 12:52:05.534755  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 12:52:05.539579  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 12:52:05.543092  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 12:52:05.547276  CPU physical address size: 39 bits

 1941 12:52:05.549968  call enable_fixed_mtrr()

 1942 12:52:05.553116  CPU physical address size: 39 bits

 1943 12:52:05.557617  CBFS: Found @ offset 1cf4c0 size 3a954

 1944 12:52:05.561172  CPU physical address size: 39 bits

 1945 12:52:05.564949  Checking segment from ROM address 0xffecf4f8

 1946 12:52:05.569794  Checking segment from ROM address 0xffecf514

 1947 12:52:05.574643  Loading segment from ROM address 0xffecf4f8

 1948 12:52:05.576567    code (compression=0)

 1949 12:52:05.585002    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1950 12:52:05.594401  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1951 12:52:05.595759  it's not compressed!

 1952 12:52:05.677282  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 1953 12:52:05.684034  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 1954 12:52:05.692142  Loading segment from ROM address 0xffecf514

 1955 12:52:05.694882    Entry Point 0x30100018

 1956 12:52:05.696797  Loaded segments

 1957 12:52:05.700669  Finalizing chipset.

 1958 12:52:05.702542  Finalizing SMM.

 1959 12:52:05.708895  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 467013 exit 5970

 1960 12:52:05.711287  mp_park_aps done after 0 msecs.

 1961 12:52:05.716002  Jumping to boot code at 30100018(89c33000)

 1962 12:52:05.725189  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 1963 12:52:05.725292  

 1964 12:52:05.725379  

 1965 12:52:05.725451  

 1966 12:52:05.728215  Starting depthcharge on sarien...

 1967 12:52:05.728310  

 1968 12:52:05.728887  end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
 1969 12:52:05.729008  start: 2.2.4 bootloader-commands (timeout 00:04:11) [common]
 1970 12:52:05.729104  Setting prompt string to ['sarien:']
 1971 12:52:05.729195  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:11)
 1972 12:52:05.735964  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1973 12:52:05.736060  

 1974 12:52:05.743572  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1975 12:52:05.744318  

 1976 12:52:05.751444  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 1977 12:52:05.751727  

 1978 12:52:05.753510  BIOS MMAP details:

 1979 12:52:05.753792  

 1980 12:52:05.755792  IFD Base Offset  : 0x1000000

 1981 12:52:05.756477  

 1982 12:52:05.759326  IFD End Offset   : 0x2000000

 1983 12:52:05.759421  

 1984 12:52:05.762670  MMAP Size        : 0x1000000

 1985 12:52:05.762766  

 1986 12:52:05.765330  MMAP Start       : 0xff000000

 1987 12:52:05.768669  

 1988 12:52:05.774595  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 1989 12:52:05.779331  

 1990 12:52:05.783055  New NVMe Controller 0x3214e128 @ 00:1d:04

 1991 12:52:05.783165  

 1992 12:52:05.787690  New NVMe Controller 0x3214e1f0 @ 00:1d:00

 1993 12:52:05.788399  

 1994 12:52:05.793529  The GBB signature is at 0x30000014 and is:  24 47 42 42

 1995 12:52:05.797277  

 1996 12:52:05.799435  Wipe memory regions:

 1997 12:52:05.799529  

 1998 12:52:05.803305  	[0x00000000001000, 0x000000000a0000)

 1999 12:52:05.803402  

 2000 12:52:05.806764  	[0x00000000100000, 0x00000030000000)

 2001 12:52:05.889350  

 2002 12:52:05.892814  	[0x00000032751910, 0x00000089afd000)

 2003 12:52:06.042553  

 2004 12:52:06.046712  	[0x00000100000000, 0x0000026e800000)

 2005 12:52:07.055828  

 2006 12:52:07.057404  R8152: Initializing

 2007 12:52:07.057513  

 2008 12:52:07.060000  Version 6 (ocp_data = 5c30)

 2009 12:52:07.061364  

 2010 12:52:07.063758  R8152: Done initializing

 2011 12:52:07.063870  

 2012 12:52:07.066307  Adding net device

 2013 12:52:07.066398  

 2014 12:52:07.071929  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 2015 12:52:07.072218  

 2016 12:52:07.072303  

 2017 12:52:07.072377  

 2018 12:52:07.073017  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2020 12:52:07.173585  sarien: tftpboot 192.168.201.1 9729821/tftp-deploy-etfrtypg/kernel/bzImage 9729821/tftp-deploy-etfrtypg/kernel/cmdline 9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz

 2021 12:52:07.173776  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2022 12:52:07.173886  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:09)
 2023 12:52:07.175898  tftpboot 192.168.201.1 9729821/tftp-deploy-etfrtypg/kernel/bzImage 9729821/tftp-deploy-etfrtypg/kernel/cmdline 9729821/tftp-deploy-etfrtypg/ramdisk/ramdisk.cpio.gz

 2024 12:52:07.175998  

 2025 12:52:07.177160  Waiting for link

 2026 12:52:07.377275  

 2027 12:52:07.377632  done.

 2028 12:52:07.377930  

 2029 12:52:07.379574  MAC: 00:24:32:30:7b:ce

 2030 12:52:07.380039  

 2031 12:52:07.383379  Sending DHCP discover... done.

 2032 12:52:07.383491  

 2033 12:52:07.385725  Waiting for reply... done.

 2034 12:52:07.385831  

 2035 12:52:07.389196  Sending DHCP request... done.

 2036 12:52:07.389303  

 2037 12:52:07.391994  Waiting for reply... done.

 2038 12:52:07.392091  

 2039 12:52:07.394262  My ip is 192.168.201.162

 2040 12:52:07.394896  

 2041 12:52:07.397607  The DHCP server ip is 192.168.201.1

 2042 12:52:07.398422  

 2043 12:52:07.402215  TFTP server IP predefined by user: 192.168.201.1

 2044 12:52:07.402314  

 2045 12:52:07.410390  Bootfile predefined by user: 9729821/tftp-deploy-etfrtypg/kernel/bzImage

 2046 12:52:07.410492  

 2047 12:52:07.413135  Sending tftp read request... done.

 2048 12:52:07.413435  

 2049 12:52:07.416692  Waiting for the transfer... 

 2050 12:52:07.416791  

 2051 12:52:07.940843  00000000 ################################################################

 2052 12:52:07.941424  

 2053 12:52:08.469730  00080000 ################################################################

 2054 12:52:08.470303  

 2055 12:52:09.001319  00100000 ################################################################

 2056 12:52:09.002031  

 2057 12:52:09.523092  00180000 ################################################################

 2058 12:52:09.523504  

 2059 12:52:10.059442  00200000 ################################################################

 2060 12:52:10.060075  

 2061 12:52:10.596190  00280000 ################################################################

 2062 12:52:10.596797  

 2063 12:52:11.133500  00300000 ################################################################

 2064 12:52:11.133882  

 2065 12:52:11.693913  00380000 ################################################################

 2066 12:52:11.694312  

 2067 12:52:12.235814  00400000 ################################################################

 2068 12:52:12.236204  

 2069 12:52:12.758599  00480000 ################################################################

 2070 12:52:12.758773  

 2071 12:52:13.283374  00500000 ################################################################

 2072 12:52:13.283768  

 2073 12:52:13.801326  00580000 ################################################################

 2074 12:52:13.801932  

 2075 12:52:14.326468  00600000 ################################################################

 2076 12:52:14.327188  

 2077 12:52:14.857241  00680000 ################################################################

 2078 12:52:14.857953  

 2079 12:52:15.430870  00700000 ################################################################

 2080 12:52:15.431259  

 2081 12:52:15.951201  00780000 ################################################################

 2082 12:52:15.951808  

 2083 12:52:16.479690  00800000 ################################################################

 2084 12:52:16.480300  

 2085 12:52:17.023930  00880000 ################################################################

 2086 12:52:17.024595  

 2087 12:52:17.588418  00900000 ################################################################

 2088 12:52:17.589049  

 2089 12:52:18.168594  00980000 ################################################################

 2090 12:52:18.169248  

 2091 12:52:18.713598  00a00000 ################################################################

 2092 12:52:18.714305  

 2093 12:52:19.236418  00a80000 ################################################################

 2094 12:52:19.236833  

 2095 12:52:19.579784  00b00000 ########################################### done.

 2096 12:52:19.579954  

 2097 12:52:19.582681  The bootfile was 11878592 bytes long.

 2098 12:52:19.583228  

 2099 12:52:19.586120  Sending tftp read request... done.

 2100 12:52:19.586654  

 2101 12:52:19.589919  Waiting for the transfer... 

 2102 12:52:19.590039  

 2103 12:52:20.111014  00000000 ################################################################

 2104 12:52:20.111430  

 2105 12:52:20.680502  00080000 ################################################################

 2106 12:52:20.680932  

 2107 12:52:21.229595  00100000 ################################################################

 2108 12:52:21.229773  

 2109 12:52:21.763070  00180000 ################################################################

 2110 12:52:21.763739  

 2111 12:52:22.302324  00200000 ################################################################

 2112 12:52:22.302746  

 2113 12:52:22.823935  00280000 ################################################################

 2114 12:52:22.824522  

 2115 12:52:23.364548  00300000 ################################################################

 2116 12:52:23.364719  

 2117 12:52:23.952562  00380000 ################################################################

 2118 12:52:23.953275  

 2119 12:52:24.497397  00400000 ################################################################

 2120 12:52:24.497858  

 2121 12:52:25.022053  00480000 ################################################################

 2122 12:52:25.022692  

 2123 12:52:25.562131  00500000 ################################################################

 2124 12:52:25.562603  

 2125 12:52:26.088180  00580000 ################################################################

 2126 12:52:26.088811  

 2127 12:52:26.609157  00600000 ################################################################

 2128 12:52:26.609842  

 2129 12:52:27.178580  00680000 ################################################################

 2130 12:52:27.179157  

 2131 12:52:27.731632  00700000 ################################################################

 2132 12:52:27.732073  

 2133 12:52:28.287548  00780000 ################################################################

 2134 12:52:28.287992  

 2135 12:52:28.855845  00800000 ################################################################

 2136 12:52:28.856028  

 2137 12:52:29.404128  00880000 ################################################################

 2138 12:52:29.404352  

 2139 12:52:29.932032  00900000 ################################################################

 2140 12:52:29.932206  

 2141 12:52:30.397132  00980000 ######################################################### done.

 2142 12:52:30.397310  

 2143 12:52:30.400237  Sending tftp read request... done.

 2144 12:52:30.400411  

 2145 12:52:30.403204  Waiting for the transfer... 

 2146 12:52:30.403359  

 2147 12:52:30.404156  00000000 # done.

 2148 12:52:30.404635  

 2149 12:52:30.413377  Command line loaded dynamically from TFTP file: 9729821/tftp-deploy-etfrtypg/kernel/cmdline

 2150 12:52:30.413577  

 2151 12:52:30.431576  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2152 12:52:30.436280  

 2153 12:52:30.439619  Shutting down all USB controllers.

 2154 12:52:30.440053  

 2155 12:52:30.442369  Removing current net device

 2156 12:52:30.444138  

 2157 12:52:30.446146  EC: exit firmware mode

 2158 12:52:30.447389  

 2159 12:52:30.449882  Finalizing coreboot

 2160 12:52:30.450011  

 2161 12:52:30.454609  Exiting depthcharge with code 4 at timestamp: 50182930

 2162 12:52:30.454763  

 2163 12:52:30.454847  

 2164 12:52:30.456874  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2165 12:52:30.457007  start: 2.2.5 auto-login-action (timeout 00:03:46) [common]
 2166 12:52:30.457100  Setting prompt string to ['Linux version [0-9]']
 2167 12:52:30.457182  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2168 12:52:30.457263  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2169 12:52:30.457487  Starting kernel ...

 2170 12:52:30.457576  

 2171 12:52:30.457810  

 2173 12:56:16.457957  end: 2.2.5 auto-login-action (duration 00:03:46) [common]
 2175 12:56:16.459013  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 226 seconds'
 2177 12:56:16.459913  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2180 12:56:16.461308  end: 2 depthcharge-action (duration 00:05:00) [common]
 2182 12:56:16.462478  Cleaning after the job
 2183 12:56:16.462905  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/ramdisk
 2184 12:56:16.466191  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/kernel
 2185 12:56:16.469795  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729821/tftp-deploy-etfrtypg/modules
 2186 12:56:16.472655  start: 5.1 power-off (timeout 00:00:30) [common]
 2187 12:56:16.473587  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-0' '--port=1' '--command=off'
 2188 12:56:23.848851  >> Command sent successfully.

 2189 12:56:23.851311  Returned 0 in 7 seconds
 2190 12:56:23.952095  end: 5.1 power-off (duration 00:00:07) [common]
 2192 12:56:23.952470  start: 5.2 read-feedback (timeout 00:09:53) [common]
 2193 12:56:23.952739  Listened to connection for namespace 'common' for up to 1s
 2194 12:56:24.955705  Finalising connection for namespace 'common'
 2195 12:56:24.956353  Disconnecting from shell: Finalise
 2196 12:56:24.956741  

 2197 12:56:25.058060  end: 5.2 read-feedback (duration 00:00:01) [common]
 2198 12:56:25.058664  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729821
 2199 12:56:25.090302  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729821
 2200 12:56:25.090786  JobError: Your job cannot terminate cleanly.