Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:51:12.197429 lava-dispatcher, installed at version: 2023.01
2 12:51:12.197620 start: 0 validate
3 12:51:12.197738 Start time: 2023-03-22 12:51:12.197732+00:00 (UTC)
4 12:51:12.197851 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:51:12.197977 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:51:12.495036 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:51:12.495832 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:51:17.001010 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:51:17.001698 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:51:17.005571 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:51:17.006198 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 12:51:18.512246 validate duration: 6.31
14 12:51:18.512559 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:51:18.512833 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:51:18.512930 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:51:18.513056 Not decompressing ramdisk as can be used compressed.
18 12:51:18.513139 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 12:51:18.513203 saving as /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/ramdisk/initrd.cpio.gz
20 12:51:18.513264 total size: 5432123 (5MB)
21 12:51:18.514201 progress 0% (0MB)
22 12:51:18.515753 progress 5% (0MB)
23 12:51:18.517163 progress 10% (0MB)
24 12:51:18.518503 progress 15% (0MB)
25 12:51:18.520013 progress 20% (1MB)
26 12:51:18.521398 progress 25% (1MB)
27 12:51:18.522720 progress 30% (1MB)
28 12:51:18.524217 progress 35% (1MB)
29 12:51:18.525524 progress 40% (2MB)
30 12:51:18.526947 progress 45% (2MB)
31 12:51:18.528285 progress 50% (2MB)
32 12:51:18.529822 progress 55% (2MB)
33 12:51:18.531176 progress 60% (3MB)
34 12:51:18.532533 progress 65% (3MB)
35 12:51:18.533995 progress 70% (3MB)
36 12:51:18.535334 progress 75% (3MB)
37 12:51:18.536717 progress 80% (4MB)
38 12:51:18.538126 progress 85% (4MB)
39 12:51:18.539679 progress 90% (4MB)
40 12:51:18.541091 progress 95% (4MB)
41 12:51:18.542410 progress 100% (5MB)
42 12:51:18.542613 5MB downloaded in 0.03s (176.55MB/s)
43 12:51:18.542768 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:51:18.543014 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:51:18.543102 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:51:18.543192 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:51:18.543300 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 12:51:18.543370 saving as /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/kernel/bzImage
50 12:51:18.543432 total size: 11878592 (11MB)
51 12:51:18.543491 No compression specified
52 12:51:18.544482 progress 0% (0MB)
53 12:51:18.547587 progress 5% (0MB)
54 12:51:18.550601 progress 10% (1MB)
55 12:51:18.553634 progress 15% (1MB)
56 12:51:18.556625 progress 20% (2MB)
57 12:51:18.559482 progress 25% (2MB)
58 12:51:18.562521 progress 30% (3MB)
59 12:51:18.565467 progress 35% (3MB)
60 12:51:18.568508 progress 40% (4MB)
61 12:51:18.571444 progress 45% (5MB)
62 12:51:18.574329 progress 50% (5MB)
63 12:51:18.577211 progress 55% (6MB)
64 12:51:18.580102 progress 60% (6MB)
65 12:51:18.582970 progress 65% (7MB)
66 12:51:18.585824 progress 70% (7MB)
67 12:51:18.588713 progress 75% (8MB)
68 12:51:18.591645 progress 80% (9MB)
69 12:51:18.594495 progress 85% (9MB)
70 12:51:18.597392 progress 90% (10MB)
71 12:51:18.600225 progress 95% (10MB)
72 12:51:18.603092 progress 100% (11MB)
73 12:51:18.603263 11MB downloaded in 0.06s (189.36MB/s)
74 12:51:18.603415 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:51:18.603683 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:51:18.603856 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:51:18.603963 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:51:18.604111 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 12:51:18.604181 saving as /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/nfsrootfs/full.rootfs.tar
81 12:51:18.604246 total size: 133351768 (127MB)
82 12:51:18.604308 Using unxz to decompress xz
83 12:51:18.607763 progress 0% (0MB)
84 12:51:18.967816 progress 5% (6MB)
85 12:51:19.342623 progress 10% (12MB)
86 12:51:19.631809 progress 15% (19MB)
87 12:51:19.827502 progress 20% (25MB)
88 12:51:20.089667 progress 25% (31MB)
89 12:51:20.441456 progress 30% (38MB)
90 12:51:20.802697 progress 35% (44MB)
91 12:51:21.203658 progress 40% (50MB)
92 12:51:21.591478 progress 45% (57MB)
93 12:51:21.951483 progress 50% (63MB)
94 12:51:22.330338 progress 55% (69MB)
95 12:51:22.700416 progress 60% (76MB)
96 12:51:23.071757 progress 65% (82MB)
97 12:51:23.442015 progress 70% (89MB)
98 12:51:23.814784 progress 75% (95MB)
99 12:51:24.271070 progress 80% (101MB)
100 12:51:24.726631 progress 85% (108MB)
101 12:51:25.008863 progress 90% (114MB)
102 12:51:25.365922 progress 95% (120MB)
103 12:51:25.767774 progress 100% (127MB)
104 12:51:25.773693 127MB downloaded in 7.17s (17.74MB/s)
105 12:51:25.774026 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:51:25.774307 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:51:25.774401 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:51:25.774494 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:51:25.774612 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 12:51:25.774686 saving as /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/modules/modules.tar
112 12:51:25.774750 total size: 1255052 (1MB)
113 12:51:25.774813 Using unxz to decompress xz
114 12:51:25.777902 progress 2% (0MB)
115 12:51:25.778431 progress 7% (0MB)
116 12:51:25.781758 progress 13% (0MB)
117 12:51:25.785619 progress 18% (0MB)
118 12:51:25.789459 progress 23% (0MB)
119 12:51:25.793345 progress 28% (0MB)
120 12:51:25.797205 progress 33% (0MB)
121 12:51:25.801139 progress 39% (0MB)
122 12:51:25.805176 progress 44% (0MB)
123 12:51:25.808954 progress 49% (0MB)
124 12:51:25.812783 progress 54% (0MB)
125 12:51:25.816514 progress 60% (0MB)
126 12:51:25.820449 progress 65% (0MB)
127 12:51:25.824278 progress 70% (0MB)
128 12:51:25.828075 progress 75% (0MB)
129 12:51:25.831756 progress 80% (0MB)
130 12:51:25.835945 progress 86% (1MB)
131 12:51:25.839893 progress 91% (1MB)
132 12:51:25.843912 progress 96% (1MB)
133 12:51:25.853935 1MB downloaded in 0.08s (15.12MB/s)
134 12:51:25.854267 end: 1.4.1 http-download (duration 00:00:00) [common]
136 12:51:25.854586 end: 1.4 download-retry (duration 00:00:00) [common]
137 12:51:25.854714 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
138 12:51:25.854844 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
139 12:51:27.165011 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729794/extract-nfsrootfs-u6i86wl9
140 12:51:27.165234 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
141 12:51:27.165339 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
142 12:51:27.165487 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59
143 12:51:27.165602 makedir: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin
144 12:51:27.165690 makedir: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/tests
145 12:51:27.165780 makedir: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/results
146 12:51:27.165881 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-add-keys
147 12:51:27.166024 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-add-sources
148 12:51:27.166161 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-background-process-start
149 12:51:27.166282 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-background-process-stop
150 12:51:27.166417 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-common-functions
151 12:51:27.166543 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-echo-ipv4
152 12:51:27.166659 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-install-packages
153 12:51:27.166781 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-installed-packages
154 12:51:27.166893 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-os-build
155 12:51:27.167045 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-probe-channel
156 12:51:27.167166 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-probe-ip
157 12:51:27.167282 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-target-ip
158 12:51:27.167404 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-target-mac
159 12:51:27.167522 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-target-storage
160 12:51:27.167638 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-case
161 12:51:27.167911 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-event
162 12:51:27.168027 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-feedback
163 12:51:27.168155 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-raise
164 12:51:27.168268 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-reference
165 12:51:27.168389 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-runner
166 12:51:27.168509 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-set
167 12:51:27.168621 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-test-shell
168 12:51:27.168743 Updating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-install-packages (oe)
169 12:51:27.168870 Updating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/bin/lava-installed-packages (oe)
170 12:51:27.168970 Creating /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/environment
171 12:51:27.169071 LAVA metadata
172 12:51:27.169143 - LAVA_JOB_ID=9729794
173 12:51:27.169208 - LAVA_DISPATCHER_IP=192.168.201.1
174 12:51:27.169318 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
175 12:51:27.169386 skipped lava-vland-overlay
176 12:51:27.169472 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
177 12:51:27.169558 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
178 12:51:27.169629 skipped lava-multinode-overlay
179 12:51:27.169709 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
180 12:51:27.169791 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
181 12:51:27.169874 Loading test definitions
182 12:51:27.169967 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
183 12:51:27.170048 Using /lava-9729794 at stage 0
184 12:51:27.170308 uuid=9729794_1.5.2.3.1 testdef=None
185 12:51:27.170407 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
186 12:51:27.170500 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
187 12:51:27.171008 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 12:51:27.171249 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
190 12:51:27.171897 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 12:51:27.172172 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
193 12:51:27.172738 runner path: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/0/tests/0_dmesg test_uuid 9729794_1.5.2.3.1
194 12:51:27.172911 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
196 12:51:27.173276 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
197 12:51:27.173352 Using /lava-9729794 at stage 1
198 12:51:27.173671 uuid=9729794_1.5.2.3.5 testdef=None
199 12:51:27.173770 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
200 12:51:27.173863 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
201 12:51:27.174408 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
203 12:51:27.174682 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
204 12:51:27.175331 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
206 12:51:27.175613 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
207 12:51:27.176274 runner path: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/1/tests/1_bootrr test_uuid 9729794_1.5.2.3.5
208 12:51:27.176424 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
210 12:51:27.176684 Creating lava-test-runner.conf files
211 12:51:27.176750 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/0 for stage 0
212 12:51:27.176840 - 0_dmesg
213 12:51:27.176947 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729794/lava-overlay-ys9ibf59/lava-9729794/1 for stage 1
214 12:51:27.177040 - 1_bootrr
215 12:51:27.177135 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
216 12:51:27.177231 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
217 12:51:27.183850 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
218 12:51:27.183961 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
219 12:51:27.184063 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 12:51:27.184153 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
221 12:51:27.184248 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
222 12:51:27.292377 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 12:51:27.292739 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
224 12:51:27.293021 extracting modules file /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729794/extract-nfsrootfs-u6i86wl9
225 12:51:27.321674 extracting modules file /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729794/extract-overlay-ramdisk-njei2qyz/ramdisk
226 12:51:27.350210 end: 1.5.4 extract-modules (duration 00:00:00) [common]
227 12:51:27.350381 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
228 12:51:27.350491 [common] Applying overlay to NFS
229 12:51:27.350568 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729794/compress-overlay-da9ligi4/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729794/extract-nfsrootfs-u6i86wl9
230 12:51:27.355027 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
231 12:51:27.355154 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
232 12:51:27.355254 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
233 12:51:27.355362 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
234 12:51:27.355446 Building ramdisk /var/lib/lava/dispatcher/tmp/9729794/extract-overlay-ramdisk-njei2qyz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729794/extract-overlay-ramdisk-njei2qyz/ramdisk
235 12:51:27.408440 >> 39111 blocks
236 12:51:28.097096 rename /var/lib/lava/dispatcher/tmp/9729794/extract-overlay-ramdisk-njei2qyz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
237 12:51:28.097496 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
238 12:51:28.097615 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
239 12:51:28.097721 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
240 12:51:28.097814 No mkimage arch provided, not using FIT.
241 12:51:28.097905 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
242 12:51:28.097990 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
243 12:51:28.098093 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
244 12:51:28.098185 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
245 12:51:28.098262 No LXC device requested
246 12:51:28.098346 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
247 12:51:28.098437 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
248 12:51:28.098525 end: 1.7 deploy-device-env (duration 00:00:00) [common]
249 12:51:28.098594 Checking files for TFTP limit of 4294967296 bytes.
250 12:51:28.098980 end: 1 tftp-deploy (duration 00:00:10) [common]
251 12:51:28.099088 start: 2 depthcharge-action (timeout 00:05:00) [common]
252 12:51:28.099186 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
253 12:51:28.099375 substitutions:
254 12:51:28.099474 - {DTB}: None
255 12:51:28.099544 - {INITRD}: 9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
256 12:51:28.099613 - {KERNEL}: 9729794/tftp-deploy-62pzqmlu/kernel/bzImage
257 12:51:28.099685 - {LAVA_MAC}: None
258 12:51:28.099749 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729794/extract-nfsrootfs-u6i86wl9
259 12:51:28.099809 - {NFS_SERVER_IP}: 192.168.201.1
260 12:51:28.099867 - {PRESEED_CONFIG}: None
261 12:51:28.099924 - {PRESEED_LOCAL}: None
262 12:51:28.099979 - {RAMDISK}: 9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
263 12:51:28.100036 - {ROOT_PART}: None
264 12:51:28.100093 - {ROOT}: None
265 12:51:28.100151 - {SERVER_IP}: 192.168.201.1
266 12:51:28.100208 - {TEE}: None
267 12:51:28.100267 Parsed boot commands:
268 12:51:28.100321 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
269 12:51:28.100479 Parsed boot commands: tftpboot 192.168.201.1 9729794/tftp-deploy-62pzqmlu/kernel/bzImage 9729794/tftp-deploy-62pzqmlu/kernel/cmdline 9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
270 12:51:28.100574 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
271 12:51:28.100664 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
272 12:51:28.100759 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
273 12:51:28.100848 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
274 12:51:28.100916 Not connected, no need to disconnect.
275 12:51:28.100993 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
276 12:51:28.101075 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
277 12:51:28.101144 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
278 12:51:28.104088 Setting prompt string to ['lava-test: # ']
279 12:51:28.104378 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
280 12:51:28.104487 end: 2.2.1 reset-connection (duration 00:00:00) [common]
281 12:51:28.104588 start: 2.2.2 reset-device (timeout 00:05:00) [common]
282 12:51:28.104682 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
283 12:51:28.104859 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
284 12:51:33.243256 >> Command sent successfully.
285 12:51:33.252381 Returned 0 in 5 seconds
286 12:51:33.353996 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
288 12:51:33.355831 end: 2.2.2 reset-device (duration 00:00:05) [common]
289 12:51:33.356359 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
290 12:51:33.356807 Setting prompt string to 'Starting depthcharge on Voema...'
291 12:51:33.357147 Changing prompt to 'Starting depthcharge on Voema...'
292 12:51:33.357501 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
293 12:51:33.358885 [Enter `^Ec?' for help]
294 12:51:34.947542
295 12:51:34.948222
296 12:51:34.957816 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
297 12:51:34.964484 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
298 12:51:34.967750 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
299 12:51:34.970754 CPU: AES supported, TXT NOT supported, VT supported
300 12:51:34.977309 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
301 12:51:34.984199 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
302 12:51:34.987328 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
303 12:51:34.990523 VBOOT: Loading verstage.
304 12:51:34.997252 FMAP: Found "FLASH" version 1.1 at 0x1804000.
305 12:51:35.000633 FMAP: base = 0x0 size = 0x2000000 #areas = 32
306 12:51:35.007146 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 12:51:35.013360 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
308 12:51:35.020016 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
309 12:51:35.023524
310 12:51:35.024181
311 12:51:35.033478 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
312 12:51:35.048087 Probing TPM: . done!
313 12:51:35.051087 TPM ready after 0 ms
314 12:51:35.054719 Connected to device vid:did:rid of 1ae0:0028:00
315 12:51:35.065572 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
316 12:51:35.072299 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
317 12:51:35.075602 Initialized TPM device CR50 revision 0
318 12:51:35.127248 tlcl_send_startup: Startup return code is 0
319 12:51:35.127381 TPM: setup succeeded
320 12:51:35.142535 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
321 12:51:35.156944 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
322 12:51:35.169390 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
323 12:51:35.179396 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
324 12:51:35.183168 Chrome EC: UHEPI supported
325 12:51:35.186454 Phase 1
326 12:51:35.189612 FMAP: area GBB found @ 1805000 (458752 bytes)
327 12:51:35.199995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 12:51:35.206181 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 12:51:35.212822 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
330 12:51:35.219336 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
331 12:51:35.222738 Recovery requested (1009000e)
332 12:51:35.226316 TPM: Extending digest for VBOOT: boot mode into PCR 0
333 12:51:35.237725 tlcl_extend: response is 0
334 12:51:35.244333 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
335 12:51:35.254376 tlcl_extend: response is 0
336 12:51:35.260721 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
337 12:51:35.267533 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
338 12:51:35.274579 BS: verstage times (exec / console): total (unknown) / 142 ms
339 12:51:35.274673
340 12:51:35.274744
341 12:51:35.287651 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
342 12:51:35.294367 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
343 12:51:35.297408 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
344 12:51:35.300982 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
345 12:51:35.307436 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
346 12:51:35.310769 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
347 12:51:35.314844 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
348 12:51:35.317649 TCO_STS: 0000 0000
349 12:51:35.320608 GEN_PMCON: d0015038 00002200
350 12:51:35.324133 GBLRST_CAUSE: 00000000 00000000
351 12:51:35.327588 HPR_CAUSE0: 00000000
352 12:51:35.328274 prev_sleep_state 5
353 12:51:35.331394 Boot Count incremented to 17290
354 12:51:35.337302 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
355 12:51:35.344094 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
356 12:51:35.353673 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
357 12:51:35.360914 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
358 12:51:35.363877 Chrome EC: UHEPI supported
359 12:51:35.370462 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
360 12:51:35.381818 Probing TPM: done!
361 12:51:35.389418 Connected to device vid:did:rid of 1ae0:0028:00
362 12:51:35.399256 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
363 12:51:35.402740 Initialized TPM device CR50 revision 0
364 12:51:35.417116 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
365 12:51:35.423616 MRC: Hash idx 0x100b comparison successful.
366 12:51:35.426881 MRC cache found, size faa8
367 12:51:35.427322 bootmode is set to: 2
368 12:51:35.430834 SPD index = 0
369 12:51:35.437167 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
370 12:51:35.440630 SPD: module type is LPDDR4X
371 12:51:35.443767 SPD: module part number is MT53E512M64D4NW-046
372 12:51:35.450634 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
373 12:51:35.456918 SPD: device width 16 bits, bus width 16 bits
374 12:51:35.460295 SPD: module size is 1024 MB (per channel)
375 12:51:35.893177 CBMEM:
376 12:51:35.896655 IMD: root @ 0x76fff000 254 entries.
377 12:51:35.899961 IMD: root @ 0x76ffec00 62 entries.
378 12:51:35.902986 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
379 12:51:35.909625 FMAP: area RW_VPD found @ f35000 (8192 bytes)
380 12:51:35.913225 External stage cache:
381 12:51:35.916401 IMD: root @ 0x7b3ff000 254 entries.
382 12:51:35.919277 IMD: root @ 0x7b3fec00 62 entries.
383 12:51:35.935318 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
384 12:51:35.941462 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
385 12:51:35.948072 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
386 12:51:35.962580 MRC: 'RECOVERY_MRC_CACHE' does not need update.
387 12:51:35.965843 cse_lite: Skip switching to RW in the recovery path
388 12:51:35.969878 8 DIMMs found
389 12:51:35.970375 SMM Memory Map
390 12:51:35.973612 SMRAM : 0x7b000000 0x800000
391 12:51:35.976767 Subregion 0: 0x7b000000 0x200000
392 12:51:35.980140 Subregion 1: 0x7b200000 0x200000
393 12:51:35.983300 Subregion 2: 0x7b400000 0x400000
394 12:51:35.986948 top_of_ram = 0x77000000
395 12:51:35.993145 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
396 12:51:35.996933 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
397 12:51:36.003610 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
398 12:51:36.006661 MTRR Range: Start=ff000000 End=0 (Size 1000000)
399 12:51:36.016343 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
400 12:51:36.023176 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
401 12:51:36.033063 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
402 12:51:36.036459 Processing 211 relocs. Offset value of 0x74c0b000
403 12:51:36.045152 BS: romstage times (exec / console): total (unknown) / 277 ms
404 12:51:36.051266
405 12:51:36.051738
406 12:51:36.061057 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
407 12:51:36.064348 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
408 12:51:36.074546 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
409 12:51:36.080928 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
410 12:51:36.087365 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
411 12:51:36.094389 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
412 12:51:36.141535 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
413 12:51:36.148035 Processing 5008 relocs. Offset value of 0x75d98000
414 12:51:36.151318 BS: postcar times (exec / console): total (unknown) / 59 ms
415 12:51:36.154482
416 12:51:36.155044
417 12:51:36.164980 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
418 12:51:36.165436 Normal boot
419 12:51:36.168311 FW_CONFIG value is 0x804c02
420 12:51:36.171400 PCI: 00:07.0 disabled by fw_config
421 12:51:36.174835 PCI: 00:07.1 disabled by fw_config
422 12:51:36.178055 PCI: 00:0d.2 disabled by fw_config
423 12:51:36.181724 PCI: 00:1c.7 disabled by fw_config
424 12:51:36.188432 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
425 12:51:36.194983 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
426 12:51:36.198476 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
427 12:51:36.201677 GENERIC: 0.0 disabled by fw_config
428 12:51:36.205037 GENERIC: 1.0 disabled by fw_config
429 12:51:36.211245 fw_config match found: DB_USB=USB3_ACTIVE
430 12:51:36.214940 fw_config match found: DB_USB=USB3_ACTIVE
431 12:51:36.218049 fw_config match found: DB_USB=USB3_ACTIVE
432 12:51:36.225004 fw_config match found: DB_USB=USB3_ACTIVE
433 12:51:36.227988 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
434 12:51:36.234571 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
435 12:51:36.244253 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
436 12:51:36.251013 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
437 12:51:36.254543 microcode: sig=0x806c1 pf=0x80 revision=0x86
438 12:51:36.261184 microcode: Update skipped, already up-to-date
439 12:51:36.267321 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
440 12:51:36.294944 Detected 4 core, 8 thread CPU.
441 12:51:36.298105 Setting up SMI for CPU
442 12:51:36.301773 IED base = 0x7b400000
443 12:51:36.302245 IED size = 0x00400000
444 12:51:36.305051 Will perform SMM setup.
445 12:51:36.311517 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
446 12:51:36.318056 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
447 12:51:36.324516 Processing 16 relocs. Offset value of 0x00030000
448 12:51:36.327965 Attempting to start 7 APs
449 12:51:36.331110 Waiting for 10ms after sending INIT.
450 12:51:36.346772 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
451 12:51:36.350398 AP: slot 6 apic_id 2.
452 12:51:36.353709 AP: slot 3 apic_id 7.
453 12:51:36.354151 AP: slot 2 apic_id 3.
454 12:51:36.357151 AP: slot 4 apic_id 5.
455 12:51:36.360417 AP: slot 5 apic_id 4.
456 12:51:36.360855 AP: slot 7 apic_id 6.
457 12:51:36.361200 done.
458 12:51:36.367416 Waiting for 2nd SIPI to complete...done.
459 12:51:36.373506 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
460 12:51:36.380345 Processing 13 relocs. Offset value of 0x00038000
461 12:51:36.383750 Unable to locate Global NVS
462 12:51:36.390144 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
463 12:51:36.393235 Installing permanent SMM handler to 0x7b000000
464 12:51:36.403441 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
465 12:51:36.406536 Processing 794 relocs. Offset value of 0x7b010000
466 12:51:36.416620 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
467 12:51:36.419943 Processing 13 relocs. Offset value of 0x7b008000
468 12:51:36.426557 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
469 12:51:36.433581 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
470 12:51:36.436795 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
471 12:51:36.443088 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
472 12:51:36.449605 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
473 12:51:36.456722 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
474 12:51:36.463317 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
475 12:51:36.463800 Unable to locate Global NVS
476 12:51:36.472995 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
477 12:51:36.476359 Clearing SMI status registers
478 12:51:36.476796 SMI_STS: PM1
479 12:51:36.479556 PM1_STS: PWRBTN
480 12:51:36.486074 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
481 12:51:36.489428 In relocation handler: CPU 0
482 12:51:36.492805 New SMBASE=0x7b000000 IEDBASE=0x7b400000
483 12:51:36.499107 Writing SMRR. base = 0x7b000006, mask=0xff800c00
484 12:51:36.499576 Relocation complete.
485 12:51:36.509270 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
486 12:51:36.512544 In relocation handler: CPU 1
487 12:51:36.515989 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
488 12:51:36.516465 Relocation complete.
489 12:51:36.526002 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
490 12:51:36.529324 In relocation handler: CPU 3
491 12:51:36.532659 New SMBASE=0x7afff400 IEDBASE=0x7b400000
492 12:51:36.533108 Relocation complete.
493 12:51:36.542411 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:51:36.545497 In relocation handler: CPU 7
495 12:51:36.549001 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:51:36.552214 Writing SMRR. base = 0x7b000006, mask=0xff800c00
497 12:51:36.555358 Relocation complete.
498 12:51:36.562065 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
499 12:51:36.565491 In relocation handler: CPU 4
500 12:51:36.569182 New SMBASE=0x7afff000 IEDBASE=0x7b400000
501 12:51:36.572101 Relocation complete.
502 12:51:36.578481 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
503 12:51:36.581784 In relocation handler: CPU 5
504 12:51:36.585171 New SMBASE=0x7affec00 IEDBASE=0x7b400000
505 12:51:36.591979 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 12:51:36.592547 Relocation complete.
507 12:51:36.601575 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
508 12:51:36.602018 In relocation handler: CPU 6
509 12:51:36.608455 New SMBASE=0x7affe800 IEDBASE=0x7b400000
510 12:51:36.611776 Writing SMRR. base = 0x7b000006, mask=0xff800c00
511 12:51:36.614898 Relocation complete.
512 12:51:36.621444 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
513 12:51:36.624678 In relocation handler: CPU 2
514 12:51:36.627906 New SMBASE=0x7afff800 IEDBASE=0x7b400000
515 12:51:36.631735 Relocation complete.
516 12:51:36.632169 Initializing CPU #0
517 12:51:36.635796 CPU: vendor Intel device 806c1
518 12:51:36.638795 CPU: family 06, model 8c, stepping 01
519 12:51:36.642509 Clearing out pending MCEs
520 12:51:36.645841 Setting up local APIC...
521 12:51:36.648769 apic_id: 0x00 done.
522 12:51:36.652338 Turbo is available but hidden
523 12:51:36.655548 Turbo is available and visible
524 12:51:36.658606 microcode: Update skipped, already up-to-date
525 12:51:36.661788 CPU #0 initialized
526 12:51:36.662233 Initializing CPU #6
527 12:51:36.665573 Initializing CPU #3
528 12:51:36.666016 Initializing CPU #4
529 12:51:36.668493 Initializing CPU #5
530 12:51:36.672107 CPU: vendor Intel device 806c1
531 12:51:36.675426 CPU: family 06, model 8c, stepping 01
532 12:51:36.678729 CPU: vendor Intel device 806c1
533 12:51:36.681865 CPU: family 06, model 8c, stepping 01
534 12:51:36.684997 Clearing out pending MCEs
535 12:51:36.688349 Clearing out pending MCEs
536 12:51:36.692256 Setting up local APIC...
537 12:51:36.692716 Initializing CPU #2
538 12:51:36.695184 CPU: vendor Intel device 806c1
539 12:51:36.698492 CPU: family 06, model 8c, stepping 01
540 12:51:36.701626 CPU: vendor Intel device 806c1
541 12:51:36.705424 CPU: family 06, model 8c, stepping 01
542 12:51:36.708651 Initializing CPU #7
543 12:51:36.711958 Clearing out pending MCEs
544 12:51:36.714930 CPU: vendor Intel device 806c1
545 12:51:36.718173 CPU: family 06, model 8c, stepping 01
546 12:51:36.721510 Clearing out pending MCEs
547 12:51:36.721983 Setting up local APIC...
548 12:51:36.724864 Clearing out pending MCEs
549 12:51:36.728556 CPU: vendor Intel device 806c1
550 12:51:36.731589 CPU: family 06, model 8c, stepping 01
551 12:51:36.734894 Clearing out pending MCEs
552 12:51:36.738211 Setting up local APIC...
553 12:51:36.741737 apic_id: 0x05 done.
554 12:51:36.742241 Setting up local APIC...
555 12:51:36.745306 apic_id: 0x07 done.
556 12:51:36.748413 Setting up local APIC...
557 12:51:36.748935 apic_id: 0x04 done.
558 12:51:36.755213 microcode: Update skipped, already up-to-date
559 12:51:36.758371 microcode: Update skipped, already up-to-date
560 12:51:36.761743 CPU #4 initialized
561 12:51:36.762248 CPU #5 initialized
562 12:51:36.768282 microcode: Update skipped, already up-to-date
563 12:51:36.768732 apic_id: 0x06 done.
564 12:51:36.771641 CPU #3 initialized
565 12:51:36.774798 microcode: Update skipped, already up-to-date
566 12:51:36.778064 Setting up local APIC...
567 12:51:36.781468 CPU #7 initialized
568 12:51:36.781943 Initializing CPU #1
569 12:51:36.784503 apic_id: 0x02 done.
570 12:51:36.788136 apic_id: 0x03 done.
571 12:51:36.791392 CPU: vendor Intel device 806c1
572 12:51:36.794664 CPU: family 06, model 8c, stepping 01
573 12:51:36.795147 Clearing out pending MCEs
574 12:51:36.801052 microcode: Update skipped, already up-to-date
575 12:51:36.804887 microcode: Update skipped, already up-to-date
576 12:51:36.808254 CPU #6 initialized
577 12:51:36.808738 CPU #2 initialized
578 12:51:36.811534 Setting up local APIC...
579 12:51:36.814551 apic_id: 0x01 done.
580 12:51:36.817761 microcode: Update skipped, already up-to-date
581 12:51:36.821011 CPU #1 initialized
582 12:51:36.824116 bsp_do_flight_plan done after 455 msecs.
583 12:51:36.827920 CPU: frequency set to 4000 MHz
584 12:51:36.831136 Enabling SMIs.
585 12:51:36.837369 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
586 12:51:36.852246 SATAXPCIE1 indicates PCIe NVMe is present
587 12:51:36.855684 Probing TPM: done!
588 12:51:36.859040 Connected to device vid:did:rid of 1ae0:0028:00
589 12:51:36.869546 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
590 12:51:36.872674 Initialized TPM device CR50 revision 0
591 12:51:36.875845 Enabling S0i3.4
592 12:51:36.882477 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
593 12:51:36.886254 Found a VBT of 8704 bytes after decompression
594 12:51:36.892493 cse_lite: CSE RO boot. HybridStorageMode disabled
595 12:51:36.899024 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
596 12:51:36.975331 FSPS returned 0
597 12:51:36.978691 Executing Phase 1 of FspMultiPhaseSiInit
598 12:51:36.988434 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
599 12:51:36.991625 port C0 DISC req: usage 1 usb3 1 usb2 5
600 12:51:36.994806 Raw Buffer output 0 00000511
601 12:51:36.998691 Raw Buffer output 1 00000000
602 12:51:37.001925 pmc_send_ipc_cmd succeeded
603 12:51:37.008746 port C1 DISC req: usage 1 usb3 2 usb2 3
604 12:51:37.009305 Raw Buffer output 0 00000321
605 12:51:37.011785 Raw Buffer output 1 00000000
606 12:51:37.016262 pmc_send_ipc_cmd succeeded
607 12:51:37.021609 Detected 4 core, 8 thread CPU.
608 12:51:37.024944 Detected 4 core, 8 thread CPU.
609 12:51:37.258825 Display FSP Version Info HOB
610 12:51:37.261962 Reference Code - CPU = a.0.4c.31
611 12:51:37.265378 uCode Version = 0.0.0.86
612 12:51:37.268536 TXT ACM version = ff.ff.ff.ffff
613 12:51:37.271604 Reference Code - ME = a.0.4c.31
614 12:51:37.275533 MEBx version = 0.0.0.0
615 12:51:37.278844 ME Firmware Version = Consumer SKU
616 12:51:37.282011 Reference Code - PCH = a.0.4c.31
617 12:51:37.285365 PCH-CRID Status = Disabled
618 12:51:37.288591 PCH-CRID Original Value = ff.ff.ff.ffff
619 12:51:37.291763 PCH-CRID New Value = ff.ff.ff.ffff
620 12:51:37.294980 OPROM - RST - RAID = ff.ff.ff.ffff
621 12:51:37.298153 PCH Hsio Version = 4.0.0.0
622 12:51:37.301512 Reference Code - SA - System Agent = a.0.4c.31
623 12:51:37.304814 Reference Code - MRC = 2.0.0.1
624 12:51:37.308278 SA - PCIe Version = a.0.4c.31
625 12:51:37.311542 SA-CRID Status = Disabled
626 12:51:37.314702 SA-CRID Original Value = 0.0.0.1
627 12:51:37.318250 SA-CRID New Value = 0.0.0.1
628 12:51:37.321588 OPROM - VBIOS = ff.ff.ff.ffff
629 12:51:37.324558 IO Manageability Engine FW Version = 11.1.4.0
630 12:51:37.327746 PHY Build Version = 0.0.0.e0
631 12:51:37.331248 Thunderbolt(TM) FW Version = 0.0.0.0
632 12:51:37.337716 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
633 12:51:37.340995 ITSS IRQ Polarities Before:
634 12:51:37.341454 IPC0: 0xffffffff
635 12:51:37.344111 IPC1: 0xffffffff
636 12:51:37.347893 IPC2: 0xffffffff
637 12:51:37.348331 IPC3: 0xffffffff
638 12:51:37.351271 ITSS IRQ Polarities After:
639 12:51:37.351754 IPC0: 0xffffffff
640 12:51:37.353971 IPC1: 0xffffffff
641 12:51:37.357498 IPC2: 0xffffffff
642 12:51:37.357954 IPC3: 0xffffffff
643 12:51:37.360879 Found PCIe Root Port #9 at PCI: 00:1d.0.
644 12:51:37.373786 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
645 12:51:37.387070 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
646 12:51:37.397200 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
647 12:51:37.403686 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
648 12:51:37.406948 Enumerating buses...
649 12:51:37.410314 Show all devs... Before device enumeration.
650 12:51:37.413332 Root Device: enabled 1
651 12:51:37.416951 DOMAIN: 0000: enabled 1
652 12:51:37.417402 CPU_CLUSTER: 0: enabled 1
653 12:51:37.420283 PCI: 00:00.0: enabled 1
654 12:51:37.423402 PCI: 00:02.0: enabled 1
655 12:51:37.427057 PCI: 00:04.0: enabled 1
656 12:51:37.427505 PCI: 00:05.0: enabled 1
657 12:51:37.429748 PCI: 00:06.0: enabled 0
658 12:51:37.433447 PCI: 00:07.0: enabled 0
659 12:51:37.436453 PCI: 00:07.1: enabled 0
660 12:51:37.436939 PCI: 00:07.2: enabled 0
661 12:51:37.439597 PCI: 00:07.3: enabled 0
662 12:51:37.443176 PCI: 00:08.0: enabled 1
663 12:51:37.446272 PCI: 00:09.0: enabled 0
664 12:51:37.446358 PCI: 00:0a.0: enabled 0
665 12:51:37.449435 PCI: 00:0d.0: enabled 1
666 12:51:37.452735 PCI: 00:0d.1: enabled 0
667 12:51:37.455999 PCI: 00:0d.2: enabled 0
668 12:51:37.456085 PCI: 00:0d.3: enabled 0
669 12:51:37.459635 PCI: 00:0e.0: enabled 0
670 12:51:37.462832 PCI: 00:10.2: enabled 1
671 12:51:37.466182 PCI: 00:10.6: enabled 0
672 12:51:37.466267 PCI: 00:10.7: enabled 0
673 12:51:37.469570 PCI: 00:12.0: enabled 0
674 12:51:37.472802 PCI: 00:12.6: enabled 0
675 12:51:37.472887 PCI: 00:13.0: enabled 0
676 12:51:37.476024 PCI: 00:14.0: enabled 1
677 12:51:37.479128 PCI: 00:14.1: enabled 0
678 12:51:37.482742 PCI: 00:14.2: enabled 1
679 12:51:37.482828 PCI: 00:14.3: enabled 1
680 12:51:37.485902 PCI: 00:15.0: enabled 1
681 12:51:37.489291 PCI: 00:15.1: enabled 1
682 12:51:37.492518 PCI: 00:15.2: enabled 1
683 12:51:37.492593 PCI: 00:15.3: enabled 1
684 12:51:37.495679 PCI: 00:16.0: enabled 1
685 12:51:37.499003 PCI: 00:16.1: enabled 0
686 12:51:37.502290 PCI: 00:16.2: enabled 0
687 12:51:37.502377 PCI: 00:16.3: enabled 0
688 12:51:37.505564 PCI: 00:16.4: enabled 0
689 12:51:37.508838 PCI: 00:16.5: enabled 0
690 12:51:37.512152 PCI: 00:17.0: enabled 1
691 12:51:37.512237 PCI: 00:19.0: enabled 0
692 12:51:37.515350 PCI: 00:19.1: enabled 1
693 12:51:37.519015 PCI: 00:19.2: enabled 0
694 12:51:37.522290 PCI: 00:1c.0: enabled 1
695 12:51:37.522376 PCI: 00:1c.1: enabled 0
696 12:51:37.525554 PCI: 00:1c.2: enabled 0
697 12:51:37.528824 PCI: 00:1c.3: enabled 0
698 12:51:37.528910 PCI: 00:1c.4: enabled 0
699 12:51:37.532285 PCI: 00:1c.5: enabled 0
700 12:51:37.535896 PCI: 00:1c.6: enabled 1
701 12:51:37.538693 PCI: 00:1c.7: enabled 0
702 12:51:37.538779 PCI: 00:1d.0: enabled 1
703 12:51:37.541931 PCI: 00:1d.1: enabled 0
704 12:51:37.545186 PCI: 00:1d.2: enabled 1
705 12:51:37.548466 PCI: 00:1d.3: enabled 0
706 12:51:37.548552 PCI: 00:1e.0: enabled 1
707 12:51:37.552067 PCI: 00:1e.1: enabled 0
708 12:51:37.554993 PCI: 00:1e.2: enabled 1
709 12:51:37.558376 PCI: 00:1e.3: enabled 1
710 12:51:37.558456 PCI: 00:1f.0: enabled 1
711 12:51:37.561890 PCI: 00:1f.1: enabled 0
712 12:51:37.564822 PCI: 00:1f.2: enabled 1
713 12:51:37.568351 PCI: 00:1f.3: enabled 1
714 12:51:37.568434 PCI: 00:1f.4: enabled 0
715 12:51:37.571676 PCI: 00:1f.5: enabled 1
716 12:51:37.574992 PCI: 00:1f.6: enabled 0
717 12:51:37.578410 PCI: 00:1f.7: enabled 0
718 12:51:37.578494 APIC: 00: enabled 1
719 12:51:37.581866 GENERIC: 0.0: enabled 1
720 12:51:37.584810 GENERIC: 0.0: enabled 1
721 12:51:37.584894 GENERIC: 1.0: enabled 1
722 12:51:37.587916 GENERIC: 0.0: enabled 1
723 12:51:37.591801 GENERIC: 1.0: enabled 1
724 12:51:37.594965 USB0 port 0: enabled 1
725 12:51:37.595059 GENERIC: 0.0: enabled 1
726 12:51:37.597788 USB0 port 0: enabled 1
727 12:51:37.601441 GENERIC: 0.0: enabled 1
728 12:51:37.601525 I2C: 00:1a: enabled 1
729 12:51:37.604842 I2C: 00:31: enabled 1
730 12:51:37.608153 I2C: 00:32: enabled 1
731 12:51:37.608268 I2C: 00:10: enabled 1
732 12:51:37.611367 I2C: 00:15: enabled 1
733 12:51:37.614522 GENERIC: 0.0: enabled 0
734 12:51:37.617896 GENERIC: 1.0: enabled 0
735 12:51:37.617980 GENERIC: 0.0: enabled 1
736 12:51:37.621212 SPI: 00: enabled 1
737 12:51:37.624830 SPI: 00: enabled 1
738 12:51:37.624920 PNP: 0c09.0: enabled 1
739 12:51:37.627602 GENERIC: 0.0: enabled 1
740 12:51:37.630806 USB3 port 0: enabled 1
741 12:51:37.630884 USB3 port 1: enabled 1
742 12:51:37.634402 USB3 port 2: enabled 0
743 12:51:37.637956 USB3 port 3: enabled 0
744 12:51:37.640914 USB2 port 0: enabled 0
745 12:51:37.641002 USB2 port 1: enabled 1
746 12:51:37.644600 USB2 port 2: enabled 1
747 12:51:37.647852 USB2 port 3: enabled 0
748 12:51:37.647941 USB2 port 4: enabled 1
749 12:51:37.650845 USB2 port 5: enabled 0
750 12:51:37.653782 USB2 port 6: enabled 0
751 12:51:37.657360 USB2 port 7: enabled 0
752 12:51:37.657443 USB2 port 8: enabled 0
753 12:51:37.660516 USB2 port 9: enabled 0
754 12:51:37.663855 USB3 port 0: enabled 0
755 12:51:37.663933 USB3 port 1: enabled 1
756 12:51:37.667248 USB3 port 2: enabled 0
757 12:51:37.670898 USB3 port 3: enabled 0
758 12:51:37.674058 GENERIC: 0.0: enabled 1
759 12:51:37.674149 GENERIC: 1.0: enabled 1
760 12:51:37.677351 APIC: 01: enabled 1
761 12:51:37.680520 APIC: 03: enabled 1
762 12:51:37.680608 APIC: 07: enabled 1
763 12:51:37.683798 APIC: 05: enabled 1
764 12:51:37.683887 APIC: 04: enabled 1
765 12:51:37.687107 APIC: 02: enabled 1
766 12:51:37.690965 APIC: 06: enabled 1
767 12:51:37.691082 Compare with tree...
768 12:51:37.693946 Root Device: enabled 1
769 12:51:37.697120 DOMAIN: 0000: enabled 1
770 12:51:37.700536 PCI: 00:00.0: enabled 1
771 12:51:37.700669 PCI: 00:02.0: enabled 1
772 12:51:37.703635 PCI: 00:04.0: enabled 1
773 12:51:37.707032 GENERIC: 0.0: enabled 1
774 12:51:37.710328 PCI: 00:05.0: enabled 1
775 12:51:37.713599 PCI: 00:06.0: enabled 0
776 12:51:37.713754 PCI: 00:07.0: enabled 0
777 12:51:37.717040 GENERIC: 0.0: enabled 1
778 12:51:37.720322 PCI: 00:07.1: enabled 0
779 12:51:37.723746 GENERIC: 1.0: enabled 1
780 12:51:37.726898 PCI: 00:07.2: enabled 0
781 12:51:37.730205 GENERIC: 0.0: enabled 1
782 12:51:37.730586 PCI: 00:07.3: enabled 0
783 12:51:37.733598 GENERIC: 1.0: enabled 1
784 12:51:37.736948 PCI: 00:08.0: enabled 1
785 12:51:37.740460 PCI: 00:09.0: enabled 0
786 12:51:37.743487 PCI: 00:0a.0: enabled 0
787 12:51:37.743902 PCI: 00:0d.0: enabled 1
788 12:51:37.747367 USB0 port 0: enabled 1
789 12:51:37.750168 USB3 port 0: enabled 1
790 12:51:37.753619 USB3 port 1: enabled 1
791 12:51:37.756899 USB3 port 2: enabled 0
792 12:51:37.757340 USB3 port 3: enabled 0
793 12:51:37.759872 PCI: 00:0d.1: enabled 0
794 12:51:37.763399 PCI: 00:0d.2: enabled 0
795 12:51:37.766533 GENERIC: 0.0: enabled 1
796 12:51:37.769736 PCI: 00:0d.3: enabled 0
797 12:51:37.770178 PCI: 00:0e.0: enabled 0
798 12:51:37.773101 PCI: 00:10.2: enabled 1
799 12:51:37.776876 PCI: 00:10.6: enabled 0
800 12:51:37.780151 PCI: 00:10.7: enabled 0
801 12:51:37.783448 PCI: 00:12.0: enabled 0
802 12:51:37.783919 PCI: 00:12.6: enabled 0
803 12:51:37.786726 PCI: 00:13.0: enabled 0
804 12:51:37.789658 PCI: 00:14.0: enabled 1
805 12:51:37.793036 USB0 port 0: enabled 1
806 12:51:37.796378 USB2 port 0: enabled 0
807 12:51:37.799630 USB2 port 1: enabled 1
808 12:51:37.800149 USB2 port 2: enabled 1
809 12:51:37.802727 USB2 port 3: enabled 0
810 12:51:37.806810 USB2 port 4: enabled 1
811 12:51:37.809538 USB2 port 5: enabled 0
812 12:51:37.812865 USB2 port 6: enabled 0
813 12:51:37.813308 USB2 port 7: enabled 0
814 12:51:37.816139 USB2 port 8: enabled 0
815 12:51:37.819337 USB2 port 9: enabled 0
816 12:51:37.822821 USB3 port 0: enabled 0
817 12:51:37.826098 USB3 port 1: enabled 1
818 12:51:37.829614 USB3 port 2: enabled 0
819 12:51:37.830096 USB3 port 3: enabled 0
820 12:51:37.833032 PCI: 00:14.1: enabled 0
821 12:51:37.836277 PCI: 00:14.2: enabled 1
822 12:51:37.839654 PCI: 00:14.3: enabled 1
823 12:51:37.842970 GENERIC: 0.0: enabled 1
824 12:51:37.843412 PCI: 00:15.0: enabled 1
825 12:51:37.846176 I2C: 00:1a: enabled 1
826 12:51:37.849468 I2C: 00:31: enabled 1
827 12:51:37.852698 I2C: 00:32: enabled 1
828 12:51:37.856154 PCI: 00:15.1: enabled 1
829 12:51:37.856602 I2C: 00:10: enabled 1
830 12:51:37.859393 PCI: 00:15.2: enabled 1
831 12:51:37.862619 PCI: 00:15.3: enabled 1
832 12:51:37.866157 PCI: 00:16.0: enabled 1
833 12:51:37.866680 PCI: 00:16.1: enabled 0
834 12:51:37.869513 PCI: 00:16.2: enabled 0
835 12:51:37.873256 PCI: 00:16.3: enabled 0
836 12:51:37.877092 PCI: 00:16.4: enabled 0
837 12:51:37.877567 PCI: 00:16.5: enabled 0
838 12:51:37.880260 PCI: 00:17.0: enabled 1
839 12:51:37.883601 PCI: 00:19.0: enabled 0
840 12:51:37.886876 PCI: 00:19.1: enabled 1
841 12:51:37.890532 I2C: 00:15: enabled 1
842 12:51:37.890990 PCI: 00:19.2: enabled 0
843 12:51:37.893559 PCI: 00:1d.0: enabled 1
844 12:51:37.896920 GENERIC: 0.0: enabled 1
845 12:51:37.946442 PCI: 00:1e.0: enabled 1
846 12:51:37.946988 PCI: 00:1e.1: enabled 0
847 12:51:37.947349 PCI: 00:1e.2: enabled 1
848 12:51:37.947720 SPI: 00: enabled 1
849 12:51:37.948065 PCI: 00:1e.3: enabled 1
850 12:51:37.948726 SPI: 00: enabled 1
851 12:51:37.949065 PCI: 00:1f.0: enabled 1
852 12:51:37.949396 PNP: 0c09.0: enabled 1
853 12:51:37.949737 PCI: 00:1f.1: enabled 0
854 12:51:37.950057 PCI: 00:1f.2: enabled 1
855 12:51:37.950359 GENERIC: 0.0: enabled 1
856 12:51:37.950672 GENERIC: 0.0: enabled 1
857 12:51:37.950979 GENERIC: 1.0: enabled 1
858 12:51:37.951297 PCI: 00:1f.3: enabled 1
859 12:51:37.951589 PCI: 00:1f.4: enabled 0
860 12:51:37.951967 PCI: 00:1f.5: enabled 1
861 12:51:37.952263 PCI: 00:1f.6: enabled 0
862 12:51:37.952567 PCI: 00:1f.7: enabled 0
863 12:51:37.952885 CPU_CLUSTER: 0: enabled 1
864 12:51:37.999045 APIC: 00: enabled 1
865 12:51:37.999545 APIC: 01: enabled 1
866 12:51:38.000038 APIC: 03: enabled 1
867 12:51:38.000410 APIC: 07: enabled 1
868 12:51:38.000741 APIC: 05: enabled 1
869 12:51:38.001059 APIC: 04: enabled 1
870 12:51:38.001774 APIC: 02: enabled 1
871 12:51:38.002124 APIC: 06: enabled 1
872 12:51:38.002438 Root Device scanning...
873 12:51:38.002748 scan_static_bus for Root Device
874 12:51:38.003050 DOMAIN: 0000 enabled
875 12:51:38.003349 CPU_CLUSTER: 0 enabled
876 12:51:38.003788 DOMAIN: 0000 scanning...
877 12:51:38.004119 PCI: pci_scan_bus for bus 00
878 12:51:38.004419 PCI: 00:00.0 [8086/0000] ops
879 12:51:38.004717 PCI: 00:00.0 [8086/9a12] enabled
880 12:51:38.005070 PCI: 00:02.0 [8086/0000] bus ops
881 12:51:38.005373 PCI: 00:02.0 [8086/9a40] enabled
882 12:51:38.005712 PCI: 00:04.0 [8086/0000] bus ops
883 12:51:38.049156 PCI: 00:04.0 [8086/9a03] enabled
884 12:51:38.049625 PCI: 00:05.0 [8086/9a19] enabled
885 12:51:38.050061 PCI: 00:07.0 [0000/0000] hidden
886 12:51:38.050465 PCI: 00:08.0 [8086/9a11] enabled
887 12:51:38.051163 PCI: 00:0a.0 [8086/9a0d] disabled
888 12:51:38.051528 PCI: 00:0d.0 [8086/0000] bus ops
889 12:51:38.051923 PCI: 00:0d.0 [8086/9a13] enabled
890 12:51:38.052240 PCI: 00:14.0 [8086/0000] bus ops
891 12:51:38.052555 PCI: 00:14.0 [8086/a0ed] enabled
892 12:51:38.052855 PCI: 00:14.2 [8086/a0ef] enabled
893 12:51:38.053183 PCI: 00:14.3 [8086/0000] bus ops
894 12:51:38.053514 PCI: 00:14.3 [8086/a0f0] enabled
895 12:51:38.053840 PCI: 00:15.0 [8086/0000] bus ops
896 12:51:38.054480 PCI: 00:15.0 [8086/a0e8] enabled
897 12:51:38.054851 PCI: 00:15.1 [8086/0000] bus ops
898 12:51:38.071512 PCI: 00:15.1 [8086/a0e9] enabled
899 12:51:38.072004 PCI: 00:15.2 [8086/0000] bus ops
900 12:51:38.072747 PCI: 00:15.2 [8086/a0ea] enabled
901 12:51:38.073123 PCI: 00:15.3 [8086/0000] bus ops
902 12:51:38.073453 PCI: 00:15.3 [8086/a0eb] enabled
903 12:51:38.073784 PCI: 00:16.0 [8086/0000] ops
904 12:51:38.075239 PCI: 00:16.0 [8086/a0e0] enabled
905 12:51:38.078177 PCI: Static device PCI: 00:17.0 not found, disabling it.
906 12:51:38.081633 PCI: 00:19.0 [8086/0000] bus ops
907 12:51:38.084710 PCI: 00:19.0 [8086/a0c5] disabled
908 12:51:38.088140 PCI: 00:19.1 [8086/0000] bus ops
909 12:51:38.091367 PCI: 00:19.1 [8086/a0c6] enabled
910 12:51:38.094854 PCI: 00:1d.0 [8086/0000] bus ops
911 12:51:38.097995 PCI: 00:1d.0 [8086/a0b0] enabled
912 12:51:38.101450 PCI: 00:1e.0 [8086/0000] ops
913 12:51:38.104709 PCI: 00:1e.0 [8086/a0a8] enabled
914 12:51:38.107972 PCI: 00:1e.2 [8086/0000] bus ops
915 12:51:38.111317 PCI: 00:1e.2 [8086/a0aa] enabled
916 12:51:38.114407 PCI: 00:1e.3 [8086/0000] bus ops
917 12:51:38.117756 PCI: 00:1e.3 [8086/a0ab] enabled
918 12:51:38.121501 PCI: 00:1f.0 [8086/0000] bus ops
919 12:51:38.124265 PCI: 00:1f.0 [8086/a087] enabled
920 12:51:38.124716 RTC Init
921 12:51:38.127572 Set power on after power failure.
922 12:51:38.130946 Disabling Deep S3
923 12:51:38.131492 Disabling Deep S3
924 12:51:38.134178 Disabling Deep S4
925 12:51:38.134614 Disabling Deep S4
926 12:51:38.137347 Disabling Deep S5
927 12:51:38.140778 Disabling Deep S5
928 12:51:38.144448 PCI: 00:1f.2 [0000/0000] hidden
929 12:51:38.147914 PCI: 00:1f.3 [8086/0000] bus ops
930 12:51:38.150691 PCI: 00:1f.3 [8086/a0c8] enabled
931 12:51:38.154694 PCI: 00:1f.5 [8086/0000] bus ops
932 12:51:38.157251 PCI: 00:1f.5 [8086/a0a4] enabled
933 12:51:38.157688 PCI: Leftover static devices:
934 12:51:38.160521 PCI: 00:10.2
935 12:51:38.161034 PCI: 00:10.6
936 12:51:38.164354 PCI: 00:10.7
937 12:51:38.164828 PCI: 00:06.0
938 12:51:38.167177 PCI: 00:07.1
939 12:51:38.167679 PCI: 00:07.2
940 12:51:38.168066 PCI: 00:07.3
941 12:51:38.170843 PCI: 00:09.0
942 12:51:38.171395 PCI: 00:0d.1
943 12:51:38.174040 PCI: 00:0d.2
944 12:51:38.174476 PCI: 00:0d.3
945 12:51:38.174858 PCI: 00:0e.0
946 12:51:38.177272 PCI: 00:12.0
947 12:51:38.177708 PCI: 00:12.6
948 12:51:38.180458 PCI: 00:13.0
949 12:51:38.180893 PCI: 00:14.1
950 12:51:38.183782 PCI: 00:16.1
951 12:51:38.184221 PCI: 00:16.2
952 12:51:38.184602 PCI: 00:16.3
953 12:51:38.187414 PCI: 00:16.4
954 12:51:38.187920 PCI: 00:16.5
955 12:51:38.190670 PCI: 00:17.0
956 12:51:38.191164 PCI: 00:19.2
957 12:51:38.191625 PCI: 00:1e.1
958 12:51:38.193924 PCI: 00:1f.1
959 12:51:38.194357 PCI: 00:1f.4
960 12:51:38.196948 PCI: 00:1f.6
961 12:51:38.197454 PCI: 00:1f.7
962 12:51:38.200533 PCI: Check your devicetree.cb.
963 12:51:38.203473 PCI: 00:02.0 scanning...
964 12:51:38.207011 scan_generic_bus for PCI: 00:02.0
965 12:51:38.210585 scan_generic_bus for PCI: 00:02.0 done
966 12:51:38.216750 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
967 12:51:38.217188 PCI: 00:04.0 scanning...
968 12:51:38.220348 scan_generic_bus for PCI: 00:04.0
969 12:51:38.223766 GENERIC: 0.0 enabled
970 12:51:38.230122 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
971 12:51:38.233452 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
972 12:51:38.236674 PCI: 00:0d.0 scanning...
973 12:51:38.240017 scan_static_bus for PCI: 00:0d.0
974 12:51:38.243226 USB0 port 0 enabled
975 12:51:38.246247 USB0 port 0 scanning...
976 12:51:38.249575 scan_static_bus for USB0 port 0
977 12:51:38.249660 USB3 port 0 enabled
978 12:51:38.252871 USB3 port 1 enabled
979 12:51:38.256428 USB3 port 2 disabled
980 12:51:38.256513 USB3 port 3 disabled
981 12:51:38.259597 USB3 port 0 scanning...
982 12:51:38.262972 scan_static_bus for USB3 port 0
983 12:51:38.266056 scan_static_bus for USB3 port 0 done
984 12:51:38.269683 scan_bus: bus USB3 port 0 finished in 6 msecs
985 12:51:38.272587 USB3 port 1 scanning...
986 12:51:38.276032 scan_static_bus for USB3 port 1
987 12:51:38.279308 scan_static_bus for USB3 port 1 done
988 12:51:38.286070 scan_bus: bus USB3 port 1 finished in 6 msecs
989 12:51:38.289385 scan_static_bus for USB0 port 0 done
990 12:51:38.292616 scan_bus: bus USB0 port 0 finished in 43 msecs
991 12:51:38.295853 scan_static_bus for PCI: 00:0d.0 done
992 12:51:38.302430 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
993 12:51:38.305632 PCI: 00:14.0 scanning...
994 12:51:38.309184 scan_static_bus for PCI: 00:14.0
995 12:51:38.309274 USB0 port 0 enabled
996 12:51:38.312039 USB0 port 0 scanning...
997 12:51:38.316104 scan_static_bus for USB0 port 0
998 12:51:38.319015 USB2 port 0 disabled
999 12:51:38.319097 USB2 port 1 enabled
1000 12:51:38.322080 USB2 port 2 enabled
1001 12:51:38.325461 USB2 port 3 disabled
1002 12:51:38.325550 USB2 port 4 enabled
1003 12:51:38.328592 USB2 port 5 disabled
1004 12:51:38.331984 USB2 port 6 disabled
1005 12:51:38.332072 USB2 port 7 disabled
1006 12:51:38.335339 USB2 port 8 disabled
1007 12:51:38.338623 USB2 port 9 disabled
1008 12:51:38.338710 USB3 port 0 disabled
1009 12:51:38.341972 USB3 port 1 enabled
1010 12:51:38.345811 USB3 port 2 disabled
1011 12:51:38.345895 USB3 port 3 disabled
1012 12:51:38.349127 USB2 port 1 scanning...
1013 12:51:38.352195 scan_static_bus for USB2 port 1
1014 12:51:38.355481 scan_static_bus for USB2 port 1 done
1015 12:51:38.358770 scan_bus: bus USB2 port 1 finished in 6 msecs
1016 12:51:38.361998 USB2 port 2 scanning...
1017 12:51:38.365329 scan_static_bus for USB2 port 2
1018 12:51:38.368633 scan_static_bus for USB2 port 2 done
1019 12:51:38.375243 scan_bus: bus USB2 port 2 finished in 6 msecs
1020 12:51:38.375420 USB2 port 4 scanning...
1021 12:51:38.379072 scan_static_bus for USB2 port 4
1022 12:51:38.385711 scan_static_bus for USB2 port 4 done
1023 12:51:38.388921 scan_bus: bus USB2 port 4 finished in 6 msecs
1024 12:51:38.391974 USB3 port 1 scanning...
1025 12:51:38.395321 scan_static_bus for USB3 port 1
1026 12:51:38.398678 scan_static_bus for USB3 port 1 done
1027 12:51:38.401914 scan_bus: bus USB3 port 1 finished in 6 msecs
1028 12:51:38.405103 scan_static_bus for USB0 port 0 done
1029 12:51:38.411757 scan_bus: bus USB0 port 0 finished in 93 msecs
1030 12:51:38.415290 scan_static_bus for PCI: 00:14.0 done
1031 12:51:38.418756 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1032 12:51:38.421979 PCI: 00:14.3 scanning...
1033 12:51:38.425263 scan_static_bus for PCI: 00:14.3
1034 12:51:38.428922 GENERIC: 0.0 enabled
1035 12:51:38.432181 scan_static_bus for PCI: 00:14.3 done
1036 12:51:38.438370 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1037 12:51:38.438916 PCI: 00:15.0 scanning...
1038 12:51:38.441591 scan_static_bus for PCI: 00:15.0
1039 12:51:38.444952 I2C: 00:1a enabled
1040 12:51:38.448262 I2C: 00:31 enabled
1041 12:51:38.448757 I2C: 00:32 enabled
1042 12:51:38.452170 scan_static_bus for PCI: 00:15.0 done
1043 12:51:38.458442 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1044 12:51:38.458911 PCI: 00:15.1 scanning...
1045 12:51:38.462237 scan_static_bus for PCI: 00:15.1
1046 12:51:38.465561 I2C: 00:10 enabled
1047 12:51:38.468780 scan_static_bus for PCI: 00:15.1 done
1048 12:51:38.475275 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1049 12:51:38.475755 PCI: 00:15.2 scanning...
1050 12:51:38.478667 scan_static_bus for PCI: 00:15.2
1051 12:51:38.485617 scan_static_bus for PCI: 00:15.2 done
1052 12:51:38.488249 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1053 12:51:38.492018 PCI: 00:15.3 scanning...
1054 12:51:38.495142 scan_static_bus for PCI: 00:15.3
1055 12:51:38.498778 scan_static_bus for PCI: 00:15.3 done
1056 12:51:38.501832 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1057 12:51:38.505296 PCI: 00:19.1 scanning...
1058 12:51:38.508242 scan_static_bus for PCI: 00:19.1
1059 12:51:38.511497 I2C: 00:15 enabled
1060 12:51:38.514848 scan_static_bus for PCI: 00:19.1 done
1061 12:51:38.518141 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1062 12:51:38.521637 PCI: 00:1d.0 scanning...
1063 12:51:38.524546 do_pci_scan_bridge for PCI: 00:1d.0
1064 12:51:38.527648 PCI: pci_scan_bus for bus 01
1065 12:51:38.530951 PCI: 01:00.0 [1c5c/174a] enabled
1066 12:51:38.534214 GENERIC: 0.0 enabled
1067 12:51:38.537722 Enabling Common Clock Configuration
1068 12:51:38.541315 L1 Sub-State supported from root port 29
1069 12:51:38.544633 L1 Sub-State Support = 0xf
1070 12:51:38.547555 CommonModeRestoreTime = 0x28
1071 12:51:38.550749 Power On Value = 0x16, Power On Scale = 0x0
1072 12:51:38.554273 ASPM: Enabled L1
1073 12:51:38.557810 PCIe: Max_Payload_Size adjusted to 128
1074 12:51:38.564366 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1075 12:51:38.564526 PCI: 00:1e.2 scanning...
1076 12:51:38.570976 scan_generic_bus for PCI: 00:1e.2
1077 12:51:38.571158 SPI: 00 enabled
1078 12:51:38.577755 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1079 12:51:38.581073 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1080 12:51:38.584386 PCI: 00:1e.3 scanning...
1081 12:51:38.587646 scan_generic_bus for PCI: 00:1e.3
1082 12:51:38.590965 SPI: 00 enabled
1083 12:51:38.594243 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1084 12:51:38.600577 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1085 12:51:38.603979 PCI: 00:1f.0 scanning...
1086 12:51:38.607336 scan_static_bus for PCI: 00:1f.0
1087 12:51:38.607796 PNP: 0c09.0 enabled
1088 12:51:38.610712 PNP: 0c09.0 scanning...
1089 12:51:38.613847 scan_static_bus for PNP: 0c09.0
1090 12:51:38.616951 scan_static_bus for PNP: 0c09.0 done
1091 12:51:38.624085 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1092 12:51:38.626926 scan_static_bus for PCI: 00:1f.0 done
1093 12:51:38.630268 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1094 12:51:38.633713 PCI: 00:1f.2 scanning...
1095 12:51:38.637196 scan_static_bus for PCI: 00:1f.2
1096 12:51:38.640215 GENERIC: 0.0 enabled
1097 12:51:38.643757 GENERIC: 0.0 scanning...
1098 12:51:38.647086 scan_static_bus for GENERIC: 0.0
1099 12:51:38.647547 GENERIC: 0.0 enabled
1100 12:51:38.650175 GENERIC: 1.0 enabled
1101 12:51:38.653773 scan_static_bus for GENERIC: 0.0 done
1102 12:51:38.659811 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1103 12:51:38.663872 scan_static_bus for PCI: 00:1f.2 done
1104 12:51:38.666737 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1105 12:51:38.669886 PCI: 00:1f.3 scanning...
1106 12:51:38.673300 scan_static_bus for PCI: 00:1f.3
1107 12:51:38.676572 scan_static_bus for PCI: 00:1f.3 done
1108 12:51:38.683098 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1109 12:51:38.683538 PCI: 00:1f.5 scanning...
1110 12:51:38.686753 scan_generic_bus for PCI: 00:1f.5
1111 12:51:38.693490 scan_generic_bus for PCI: 00:1f.5 done
1112 12:51:38.696730 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1113 12:51:38.703060 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1114 12:51:38.706544 scan_static_bus for Root Device done
1115 12:51:38.709650 scan_bus: bus Root Device finished in 736 msecs
1116 12:51:38.710103 done
1117 12:51:38.716312 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1118 12:51:38.720217 Chrome EC: UHEPI supported
1119 12:51:38.726809 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1120 12:51:38.733290 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1121 12:51:38.736542 SPI flash protection: WPSW=0 SRP0=0
1122 12:51:38.743103 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1123 12:51:38.746357 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1124 12:51:38.749527 found VGA at PCI: 00:02.0
1125 12:51:38.753508 Setting up VGA for PCI: 00:02.0
1126 12:51:38.759833 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1127 12:51:38.762814 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1128 12:51:38.766326 Allocating resources...
1129 12:51:38.769942 Reading resources...
1130 12:51:38.772730 Root Device read_resources bus 0 link: 0
1131 12:51:38.776159 DOMAIN: 0000 read_resources bus 0 link: 0
1132 12:51:38.782865 PCI: 00:04.0 read_resources bus 1 link: 0
1133 12:51:38.786221 PCI: 00:04.0 read_resources bus 1 link: 0 done
1134 12:51:38.792894 PCI: 00:0d.0 read_resources bus 0 link: 0
1135 12:51:38.795941 USB0 port 0 read_resources bus 0 link: 0
1136 12:51:38.802429 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:51:38.806079 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1138 12:51:38.812759 PCI: 00:14.0 read_resources bus 0 link: 0
1139 12:51:38.815657 USB0 port 0 read_resources bus 0 link: 0
1140 12:51:38.822291 USB0 port 0 read_resources bus 0 link: 0 done
1141 12:51:38.825868 PCI: 00:14.0 read_resources bus 0 link: 0 done
1142 12:51:38.832202 PCI: 00:14.3 read_resources bus 0 link: 0
1143 12:51:38.835633 PCI: 00:14.3 read_resources bus 0 link: 0 done
1144 12:51:38.838785 PCI: 00:15.0 read_resources bus 0 link: 0
1145 12:51:38.846191 PCI: 00:15.0 read_resources bus 0 link: 0 done
1146 12:51:38.849176 PCI: 00:15.1 read_resources bus 0 link: 0
1147 12:51:38.856020 PCI: 00:15.1 read_resources bus 0 link: 0 done
1148 12:51:38.859559 PCI: 00:19.1 read_resources bus 0 link: 0
1149 12:51:38.866674 PCI: 00:19.1 read_resources bus 0 link: 0 done
1150 12:51:38.870057 PCI: 00:1d.0 read_resources bus 1 link: 0
1151 12:51:38.876517 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1152 12:51:38.879927 PCI: 00:1e.2 read_resources bus 2 link: 0
1153 12:51:38.886443 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1154 12:51:38.889726 PCI: 00:1e.3 read_resources bus 3 link: 0
1155 12:51:38.896387 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1156 12:51:38.899664 PCI: 00:1f.0 read_resources bus 0 link: 0
1157 12:51:38.906263 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1158 12:51:38.909461 PCI: 00:1f.2 read_resources bus 0 link: 0
1159 12:51:38.916456 GENERIC: 0.0 read_resources bus 0 link: 0
1160 12:51:38.919313 GENERIC: 0.0 read_resources bus 0 link: 0 done
1161 12:51:38.925968 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1162 12:51:38.929085 DOMAIN: 0000 read_resources bus 0 link: 0 done
1163 12:51:38.935613 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1164 12:51:38.939002 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1165 12:51:38.945594 Root Device read_resources bus 0 link: 0 done
1166 12:51:38.948789 Done reading resources.
1167 12:51:38.952189 Show resources in subtree (Root Device)...After reading.
1168 12:51:38.958519 Root Device child on link 0 DOMAIN: 0000
1169 12:51:38.962019 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1170 12:51:38.971860 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1171 12:51:38.981763 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1172 12:51:38.981854 PCI: 00:00.0
1173 12:51:38.991470 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1174 12:51:39.001392 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1175 12:51:39.011647 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1176 12:51:39.021403 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1177 12:51:39.031060 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1178 12:51:39.038114 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1179 12:51:39.047617 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1180 12:51:39.057752 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1181 12:51:39.067806 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1182 12:51:39.077761 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1183 12:51:39.084146 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1184 12:51:39.094187 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1185 12:51:39.104118 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1186 12:51:39.114425 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1187 12:51:39.123907 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1188 12:51:39.133978 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1189 12:51:39.143622 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1190 12:51:39.150186 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1191 12:51:39.160491 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1192 12:51:39.170388 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1193 12:51:39.173444 PCI: 00:02.0
1194 12:51:39.183551 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1195 12:51:39.193558 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1196 12:51:39.200049 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1197 12:51:39.206247 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1198 12:51:39.216207 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1199 12:51:39.216303 GENERIC: 0.0
1200 12:51:39.219632 PCI: 00:05.0
1201 12:51:39.229884 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1202 12:51:39.233077 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1203 12:51:39.236353 GENERIC: 0.0
1204 12:51:39.236448 PCI: 00:08.0
1205 12:51:39.246224 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:51:39.249551 PCI: 00:0a.0
1207 12:51:39.252651 PCI: 00:0d.0 child on link 0 USB0 port 0
1208 12:51:39.262532 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1209 12:51:39.269220 USB0 port 0 child on link 0 USB3 port 0
1210 12:51:39.269308 USB3 port 0
1211 12:51:39.272536 USB3 port 1
1212 12:51:39.272624 USB3 port 2
1213 12:51:39.275701 USB3 port 3
1214 12:51:39.279229 PCI: 00:14.0 child on link 0 USB0 port 0
1215 12:51:39.289354 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1216 12:51:39.292320 USB0 port 0 child on link 0 USB2 port 0
1217 12:51:39.295922 USB2 port 0
1218 12:51:39.298911 USB2 port 1
1219 12:51:39.298999 USB2 port 2
1220 12:51:39.302655 USB2 port 3
1221 12:51:39.302751 USB2 port 4
1222 12:51:39.305896 USB2 port 5
1223 12:51:39.305983 USB2 port 6
1224 12:51:39.309069 USB2 port 7
1225 12:51:39.309156 USB2 port 8
1226 12:51:39.312344 USB2 port 9
1227 12:51:39.312430 USB3 port 0
1228 12:51:39.315668 USB3 port 1
1229 12:51:39.315785 USB3 port 2
1230 12:51:39.318978 USB3 port 3
1231 12:51:39.319069 PCI: 00:14.2
1232 12:51:39.328677 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 12:51:39.338508 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1234 12:51:39.345108 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1235 12:51:39.354906 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 12:51:39.355006 GENERIC: 0.0
1237 12:51:39.361451 PCI: 00:15.0 child on link 0 I2C: 00:1a
1238 12:51:39.371935 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:51:39.372031 I2C: 00:1a
1240 12:51:39.374810 I2C: 00:31
1241 12:51:39.374889 I2C: 00:32
1242 12:51:39.378220 PCI: 00:15.1 child on link 0 I2C: 00:10
1243 12:51:39.388251 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 12:51:39.391179 I2C: 00:10
1245 12:51:39.391267 PCI: 00:15.2
1246 12:51:39.401159 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:51:39.405037 PCI: 00:15.3
1248 12:51:39.414583 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:51:39.414675 PCI: 00:16.0
1250 12:51:39.424519 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 12:51:39.427704 PCI: 00:19.0
1252 12:51:39.431039 PCI: 00:19.1 child on link 0 I2C: 00:15
1253 12:51:39.441381 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:51:39.444409 I2C: 00:15
1255 12:51:39.447810 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1256 12:51:39.457559 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1257 12:51:39.467465 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1258 12:51:39.474048 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1259 12:51:39.477235 GENERIC: 0.0
1260 12:51:39.480647 PCI: 01:00.0
1261 12:51:39.490673 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1262 12:51:39.497036 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1263 12:51:39.506903 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1264 12:51:39.510439 PCI: 00:1e.0
1265 12:51:39.520212 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1266 12:51:39.523493 PCI: 00:1e.2 child on link 0 SPI: 00
1267 12:51:39.533692 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1268 12:51:39.536852 SPI: 00
1269 12:51:39.540235 PCI: 00:1e.3 child on link 0 SPI: 00
1270 12:51:39.550070 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 12:51:39.550159 SPI: 00
1272 12:51:39.556349 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1273 12:51:39.563103 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1274 12:51:39.566414 PNP: 0c09.0
1275 12:51:39.573082 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1276 12:51:39.580102 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1277 12:51:39.590073 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1278 12:51:39.596252 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1279 12:51:39.602767 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1280 12:51:39.602857 GENERIC: 0.0
1281 12:51:39.606167 GENERIC: 1.0
1282 12:51:39.606250 PCI: 00:1f.3
1283 12:51:39.616221 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1284 12:51:39.629324 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1285 12:51:39.629410 PCI: 00:1f.5
1286 12:51:39.639433 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1287 12:51:39.642592 CPU_CLUSTER: 0 child on link 0 APIC: 00
1288 12:51:39.642679 APIC: 00
1289 12:51:39.646031 APIC: 01
1290 12:51:39.646121 APIC: 03
1291 12:51:39.649261 APIC: 07
1292 12:51:39.649354 APIC: 05
1293 12:51:39.649426 APIC: 04
1294 12:51:39.652782 APIC: 02
1295 12:51:39.652952 APIC: 06
1296 12:51:39.659057 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1297 12:51:39.665554 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1298 12:51:39.672811 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1299 12:51:39.679345 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1300 12:51:39.682721 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1301 12:51:39.686072 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1302 12:51:39.692071 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1303 12:51:39.698716 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1304 12:51:39.705417 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1305 12:51:39.711987 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1306 12:51:39.722843 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1307 12:51:39.728657 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1308 12:51:39.735665 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1309 12:51:39.742021 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1310 12:51:39.748610 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1311 12:51:39.752152 DOMAIN: 0000: Resource ranges:
1312 12:51:39.755528 * Base: 1000, Size: 800, Tag: 100
1313 12:51:39.762021 * Base: 1900, Size: e700, Tag: 100
1314 12:51:39.765128 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1315 12:51:39.771541 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1316 12:51:39.778342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1317 12:51:39.788679 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1318 12:51:39.794714 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1319 12:51:39.801365 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1320 12:51:39.811427 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1321 12:51:39.818069 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1322 12:51:39.824968 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1323 12:51:39.834786 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1324 12:51:39.841524 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1325 12:51:39.848184 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1326 12:51:39.857752 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1327 12:51:39.864405 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1328 12:51:39.871227 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1329 12:51:39.880603 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1330 12:51:39.887245 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1331 12:51:39.894230 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1332 12:51:39.904177 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1333 12:51:39.910689 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1334 12:51:39.917265 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1335 12:51:39.926764 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1336 12:51:39.933556 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1337 12:51:39.940521 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1338 12:51:39.949901 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1339 12:51:39.953703 DOMAIN: 0000: Resource ranges:
1340 12:51:39.956526 * Base: 7fc00000, Size: 40400000, Tag: 200
1341 12:51:39.960044 * Base: d0000000, Size: 28000000, Tag: 200
1342 12:51:39.966421 * Base: fa000000, Size: 1000000, Tag: 200
1343 12:51:39.969760 * Base: fb001000, Size: 2fff000, Tag: 200
1344 12:51:39.973082 * Base: fe010000, Size: 2e000, Tag: 200
1345 12:51:39.976739 * Base: fe03f000, Size: d41000, Tag: 200
1346 12:51:39.983331 * Base: fed88000, Size: 8000, Tag: 200
1347 12:51:39.986597 * Base: fed93000, Size: d000, Tag: 200
1348 12:51:39.989907 * Base: feda2000, Size: 1e000, Tag: 200
1349 12:51:39.993343 * Base: fede0000, Size: 1220000, Tag: 200
1350 12:51:39.999479 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1351 12:51:40.006613 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1352 12:51:40.013116 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1353 12:51:40.019409 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1354 12:51:40.026394 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1355 12:51:40.032437 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1356 12:51:40.038806 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1357 12:51:40.045648 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1358 12:51:40.052170 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1359 12:51:40.058737 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1360 12:51:40.065708 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1361 12:51:40.071873 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1362 12:51:40.078424 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1363 12:51:40.085224 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1364 12:51:40.091887 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1365 12:51:40.098546 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1366 12:51:40.105321 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1367 12:51:40.112194 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1368 12:51:40.118324 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1369 12:51:40.124697 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1370 12:51:40.131245 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1371 12:51:40.138021 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1372 12:51:40.144763 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1373 12:51:40.151337 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1374 12:51:40.161237 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1375 12:51:40.164485 PCI: 00:1d.0: Resource ranges:
1376 12:51:40.167733 * Base: 7fc00000, Size: 100000, Tag: 200
1377 12:51:40.174759 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1378 12:51:40.181144 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1379 12:51:40.187521 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1380 12:51:40.197471 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1381 12:51:40.204119 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1382 12:51:40.207518 Root Device assign_resources, bus 0 link: 0
1383 12:51:40.210892 DOMAIN: 0000 assign_resources, bus 0 link: 0
1384 12:51:40.220945 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1385 12:51:40.227933 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1386 12:51:40.237833 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1387 12:51:40.244172 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1388 12:51:40.250701 PCI: 00:04.0 assign_resources, bus 1 link: 0
1389 12:51:40.253712 PCI: 00:04.0 assign_resources, bus 1 link: 0
1390 12:51:40.263939 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1391 12:51:40.270398 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1392 12:51:40.280122 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1393 12:51:40.283292 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1394 12:51:40.286497 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1395 12:51:40.296865 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1396 12:51:40.300101 PCI: 00:14.0 assign_resources, bus 0 link: 0
1397 12:51:40.306703 PCI: 00:14.0 assign_resources, bus 0 link: 0
1398 12:51:40.313289 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1399 12:51:40.323593 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1400 12:51:40.329605 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1401 12:51:40.332861 PCI: 00:14.3 assign_resources, bus 0 link: 0
1402 12:51:40.340059 PCI: 00:14.3 assign_resources, bus 0 link: 0
1403 12:51:40.346390 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1404 12:51:40.353242 PCI: 00:15.0 assign_resources, bus 0 link: 0
1405 12:51:40.356563 PCI: 00:15.0 assign_resources, bus 0 link: 0
1406 12:51:40.366400 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1407 12:51:40.369572 PCI: 00:15.1 assign_resources, bus 0 link: 0
1408 12:51:40.372595 PCI: 00:15.1 assign_resources, bus 0 link: 0
1409 12:51:40.382837 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1410 12:51:40.389591 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1411 12:51:40.399222 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1412 12:51:40.406549 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1413 12:51:40.412978 PCI: 00:19.1 assign_resources, bus 0 link: 0
1414 12:51:40.416270 PCI: 00:19.1 assign_resources, bus 0 link: 0
1415 12:51:40.425700 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1416 12:51:40.435679 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1417 12:51:40.442214 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1418 12:51:40.448749 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 12:51:40.455718 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1420 12:51:40.465524 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1421 12:51:40.471912 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1422 12:51:40.475321 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1423 12:51:40.485528 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1424 12:51:40.488986 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1425 12:51:40.495293 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1426 12:51:40.502422 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1427 12:51:40.508873 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1428 12:51:40.512158 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1429 12:51:40.515428 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1430 12:51:40.522155 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1431 12:51:40.525407 LPC: Trying to open IO window from 800 size 1ff
1432 12:51:40.535369 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1433 12:51:40.542084 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1434 12:51:40.551571 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1435 12:51:40.555298 DOMAIN: 0000 assign_resources, bus 0 link: 0
1436 12:51:40.561999 Root Device assign_resources, bus 0 link: 0
1437 12:51:40.562086 Done setting resources.
1438 12:51:40.568376 Show resources in subtree (Root Device)...After assigning values.
1439 12:51:40.574959 Root Device child on link 0 DOMAIN: 0000
1440 12:51:40.578498 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1441 12:51:40.588029 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1442 12:51:40.598068 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1443 12:51:40.598160 PCI: 00:00.0
1444 12:51:40.608595 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1445 12:51:40.618345 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1446 12:51:40.628659 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1447 12:51:40.637770 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1448 12:51:40.644933 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1449 12:51:40.654789 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1450 12:51:40.664563 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1451 12:51:40.674670 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1452 12:51:40.684257 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1453 12:51:40.694514 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1454 12:51:40.701102 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1455 12:51:40.710769 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1456 12:51:40.720969 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1457 12:51:40.730821 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1458 12:51:40.740656 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1459 12:51:40.747299 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1460 12:51:40.757245 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1461 12:51:40.766939 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1462 12:51:40.776998 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1463 12:51:40.787393 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1464 12:51:40.790312 PCI: 00:02.0
1465 12:51:40.799970 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1466 12:51:40.809849 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1467 12:51:40.820010 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1468 12:51:40.823079 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1469 12:51:40.832967 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1470 12:51:40.836355 GENERIC: 0.0
1471 12:51:40.836444 PCI: 00:05.0
1472 12:51:40.849795 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1473 12:51:40.853098 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1474 12:51:40.853185 GENERIC: 0.0
1475 12:51:40.856465 PCI: 00:08.0
1476 12:51:40.866031 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1477 12:51:40.869349 PCI: 00:0a.0
1478 12:51:40.872686 PCI: 00:0d.0 child on link 0 USB0 port 0
1479 12:51:40.882701 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1480 12:51:40.886330 USB0 port 0 child on link 0 USB3 port 0
1481 12:51:40.889124 USB3 port 0
1482 12:51:40.892719 USB3 port 1
1483 12:51:40.892805 USB3 port 2
1484 12:51:40.895629 USB3 port 3
1485 12:51:40.899274 PCI: 00:14.0 child on link 0 USB0 port 0
1486 12:51:40.908861 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1487 12:51:40.912354 USB0 port 0 child on link 0 USB2 port 0
1488 12:51:40.915532 USB2 port 0
1489 12:51:40.919051 USB2 port 1
1490 12:51:40.919139 USB2 port 2
1491 12:51:40.922175 USB2 port 3
1492 12:51:40.922260 USB2 port 4
1493 12:51:40.925746 USB2 port 5
1494 12:51:40.925863 USB2 port 6
1495 12:51:40.928796 USB2 port 7
1496 12:51:40.928882 USB2 port 8
1497 12:51:40.931913 USB2 port 9
1498 12:51:40.932035 USB3 port 0
1499 12:51:40.935884 USB3 port 1
1500 12:51:40.935971 USB3 port 2
1501 12:51:40.938915 USB3 port 3
1502 12:51:40.939000 PCI: 00:14.2
1503 12:51:40.952168 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1504 12:51:40.962137 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1505 12:51:40.965467 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1506 12:51:40.975069 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1507 12:51:40.978353 GENERIC: 0.0
1508 12:51:40.981617 PCI: 00:15.0 child on link 0 I2C: 00:1a
1509 12:51:40.992186 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1510 12:51:40.995283 I2C: 00:1a
1511 12:51:40.995369 I2C: 00:31
1512 12:51:40.998568 I2C: 00:32
1513 12:51:41.001755 PCI: 00:15.1 child on link 0 I2C: 00:10
1514 12:51:41.011673 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1515 12:51:41.011802 I2C: 00:10
1516 12:51:41.014635 PCI: 00:15.2
1517 12:51:41.024895 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1518 12:51:41.028163 PCI: 00:15.3
1519 12:51:41.037935 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1520 12:51:41.038030 PCI: 00:16.0
1521 12:51:41.047759 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1522 12:51:41.051026 PCI: 00:19.0
1523 12:51:41.054363 PCI: 00:19.1 child on link 0 I2C: 00:15
1524 12:51:41.064241 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1525 12:51:41.067571 I2C: 00:15
1526 12:51:41.070856 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1527 12:51:41.081253 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1528 12:51:41.090978 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1529 12:51:41.104363 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1530 12:51:41.104452 GENERIC: 0.0
1531 12:51:41.107360 PCI: 01:00.0
1532 12:51:41.117623 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1533 12:51:41.127155 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1534 12:51:41.136866 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1535 12:51:41.140462 PCI: 00:1e.0
1536 12:51:41.150174 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1537 12:51:41.153838 PCI: 00:1e.2 child on link 0 SPI: 00
1538 12:51:41.163253 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1539 12:51:41.166547 SPI: 00
1540 12:51:41.169866 PCI: 00:1e.3 child on link 0 SPI: 00
1541 12:51:41.180172 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1542 12:51:41.183444 SPI: 00
1543 12:51:41.186705 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1544 12:51:41.193250 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1545 12:51:41.196587 PNP: 0c09.0
1546 12:51:41.206429 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1547 12:51:41.209805 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1548 12:51:41.219565 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1549 12:51:41.229725 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1550 12:51:41.233052 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1551 12:51:41.236014 GENERIC: 0.0
1552 12:51:41.236100 GENERIC: 1.0
1553 12:51:41.239720 PCI: 00:1f.3
1554 12:51:41.249467 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1555 12:51:41.259155 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1556 12:51:41.259242 PCI: 00:1f.5
1557 12:51:41.272238 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1558 12:51:41.275567 CPU_CLUSTER: 0 child on link 0 APIC: 00
1559 12:51:41.275645 APIC: 00
1560 12:51:41.279312 APIC: 01
1561 12:51:41.279448 APIC: 03
1562 12:51:41.279509 APIC: 07
1563 12:51:41.282572 APIC: 05
1564 12:51:41.282688 APIC: 04
1565 12:51:41.285983 APIC: 02
1566 12:51:41.286126 APIC: 06
1567 12:51:41.289495 Done allocating resources.
1568 12:51:41.295942 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1569 12:51:41.299097 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1570 12:51:41.305663 Configure GPIOs for I2S audio on UP4.
1571 12:51:41.312207 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1572 12:51:41.315420 Enabling resources...
1573 12:51:41.318728 PCI: 00:00.0 subsystem <- 8086/9a12
1574 12:51:41.318807 PCI: 00:00.0 cmd <- 06
1575 12:51:41.325444 PCI: 00:02.0 subsystem <- 8086/9a40
1576 12:51:41.325528 PCI: 00:02.0 cmd <- 03
1577 12:51:41.328305 PCI: 00:04.0 subsystem <- 8086/9a03
1578 12:51:41.331994 PCI: 00:04.0 cmd <- 02
1579 12:51:41.335080 PCI: 00:05.0 subsystem <- 8086/9a19
1580 12:51:41.338333 PCI: 00:05.0 cmd <- 02
1581 12:51:41.341712 PCI: 00:08.0 subsystem <- 8086/9a11
1582 12:51:41.345420 PCI: 00:08.0 cmd <- 06
1583 12:51:41.348040 PCI: 00:0d.0 subsystem <- 8086/9a13
1584 12:51:41.351476 PCI: 00:0d.0 cmd <- 02
1585 12:51:41.355063 PCI: 00:14.0 subsystem <- 8086/a0ed
1586 12:51:41.358016 PCI: 00:14.0 cmd <- 02
1587 12:51:41.361553 PCI: 00:14.2 subsystem <- 8086/a0ef
1588 12:51:41.364654 PCI: 00:14.2 cmd <- 02
1589 12:51:41.367665 PCI: 00:14.3 subsystem <- 8086/a0f0
1590 12:51:41.371419 PCI: 00:14.3 cmd <- 02
1591 12:51:41.374795 PCI: 00:15.0 subsystem <- 8086/a0e8
1592 12:51:41.374885 PCI: 00:15.0 cmd <- 02
1593 12:51:41.380876 PCI: 00:15.1 subsystem <- 8086/a0e9
1594 12:51:41.380964 PCI: 00:15.1 cmd <- 02
1595 12:51:41.384777 PCI: 00:15.2 subsystem <- 8086/a0ea
1596 12:51:41.388072 PCI: 00:15.2 cmd <- 02
1597 12:51:41.391063 PCI: 00:15.3 subsystem <- 8086/a0eb
1598 12:51:41.394343 PCI: 00:15.3 cmd <- 02
1599 12:51:41.397784 PCI: 00:16.0 subsystem <- 8086/a0e0
1600 12:51:41.401042 PCI: 00:16.0 cmd <- 02
1601 12:51:41.404045 PCI: 00:19.1 subsystem <- 8086/a0c6
1602 12:51:41.407875 PCI: 00:19.1 cmd <- 02
1603 12:51:41.410668 PCI: 00:1d.0 bridge ctrl <- 0013
1604 12:51:41.414497 PCI: 00:1d.0 subsystem <- 8086/a0b0
1605 12:51:41.417194 PCI: 00:1d.0 cmd <- 06
1606 12:51:41.420866 PCI: 00:1e.0 subsystem <- 8086/a0a8
1607 12:51:41.423613 PCI: 00:1e.0 cmd <- 06
1608 12:51:41.427493 PCI: 00:1e.2 subsystem <- 8086/a0aa
1609 12:51:41.430345 PCI: 00:1e.2 cmd <- 06
1610 12:51:41.433576 PCI: 00:1e.3 subsystem <- 8086/a0ab
1611 12:51:41.433655 PCI: 00:1e.3 cmd <- 02
1612 12:51:41.440321 PCI: 00:1f.0 subsystem <- 8086/a087
1613 12:51:41.440400 PCI: 00:1f.0 cmd <- 407
1614 12:51:41.443391 PCI: 00:1f.3 subsystem <- 8086/a0c8
1615 12:51:41.447460 PCI: 00:1f.3 cmd <- 02
1616 12:51:41.450329 PCI: 00:1f.5 subsystem <- 8086/a0a4
1617 12:51:41.453737 PCI: 00:1f.5 cmd <- 406
1618 12:51:41.458087 PCI: 01:00.0 cmd <- 02
1619 12:51:41.462656 done.
1620 12:51:41.466292 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1621 12:51:41.469290 Initializing devices...
1622 12:51:41.472687 Root Device init
1623 12:51:41.475830 Chrome EC: Set SMI mask to 0x0000000000000000
1624 12:51:41.482670 Chrome EC: clear events_b mask to 0x0000000000000000
1625 12:51:41.489300 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1626 12:51:41.492312 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1627 12:51:41.499458 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1628 12:51:41.505898 Chrome EC: Set WAKE mask to 0x0000000000000000
1629 12:51:41.508936 fw_config match found: DB_USB=USB3_ACTIVE
1630 12:51:41.515525 Configure Right Type-C port orientation for retimer
1631 12:51:41.518877 Root Device init finished in 42 msecs
1632 12:51:41.522134 PCI: 00:00.0 init
1633 12:51:41.525393 CPU TDP = 9 Watts
1634 12:51:41.525470 CPU PL1 = 9 Watts
1635 12:51:41.528775 CPU PL2 = 40 Watts
1636 12:51:41.528845 CPU PL4 = 83 Watts
1637 12:51:41.535436 PCI: 00:00.0 init finished in 8 msecs
1638 12:51:41.535526 PCI: 00:02.0 init
1639 12:51:41.538960 GMA: Found VBT in CBFS
1640 12:51:41.541931 GMA: Found valid VBT in CBFS
1641 12:51:41.548850 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1642 12:51:41.555314 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1643 12:51:41.559114 PCI: 00:02.0 init finished in 18 msecs
1644 12:51:41.561748 PCI: 00:05.0 init
1645 12:51:41.565457 PCI: 00:05.0 init finished in 0 msecs
1646 12:51:41.568539 PCI: 00:08.0 init
1647 12:51:41.571720 PCI: 00:08.0 init finished in 0 msecs
1648 12:51:41.574800 PCI: 00:14.0 init
1649 12:51:41.578421 PCI: 00:14.0 init finished in 0 msecs
1650 12:51:41.578503 PCI: 00:14.2 init
1651 12:51:41.584656 PCI: 00:14.2 init finished in 0 msecs
1652 12:51:41.584738 PCI: 00:15.0 init
1653 12:51:41.588404 I2C bus 0 version 0x3230302a
1654 12:51:41.591627 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1655 12:51:41.598266 PCI: 00:15.0 init finished in 6 msecs
1656 12:51:41.598348 PCI: 00:15.1 init
1657 12:51:41.601194 I2C bus 1 version 0x3230302a
1658 12:51:41.604770 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1659 12:51:41.608034 PCI: 00:15.1 init finished in 6 msecs
1660 12:51:41.611223 PCI: 00:15.2 init
1661 12:51:41.614512 I2C bus 2 version 0x3230302a
1662 12:51:41.617734 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1663 12:51:41.621026 PCI: 00:15.2 init finished in 6 msecs
1664 12:51:41.624381 PCI: 00:15.3 init
1665 12:51:41.627704 I2C bus 3 version 0x3230302a
1666 12:51:41.631331 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1667 12:51:41.634772 PCI: 00:15.3 init finished in 6 msecs
1668 12:51:41.638048 PCI: 00:16.0 init
1669 12:51:41.640818 PCI: 00:16.0 init finished in 0 msecs
1670 12:51:41.644120 PCI: 00:19.1 init
1671 12:51:41.644209 I2C bus 5 version 0x3230302a
1672 12:51:41.650795 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1673 12:51:41.654090 PCI: 00:19.1 init finished in 6 msecs
1674 12:51:41.654185 PCI: 00:1d.0 init
1675 12:51:41.657458 Initializing PCH PCIe bridge.
1676 12:51:41.660429 PCI: 00:1d.0 init finished in 3 msecs
1677 12:51:41.665034 PCI: 00:1f.0 init
1678 12:51:41.668407 IOAPIC: Initializing IOAPIC at 0xfec00000
1679 12:51:41.675020 IOAPIC: Bootstrap Processor Local APIC = 0x00
1680 12:51:41.675107 IOAPIC: ID = 0x02
1681 12:51:41.678739 IOAPIC: Dumping registers
1682 12:51:41.681932 reg 0x0000: 0x02000000
1683 12:51:41.684817 reg 0x0001: 0x00770020
1684 12:51:41.684932 reg 0x0002: 0x00000000
1685 12:51:41.691547 PCI: 00:1f.0 init finished in 21 msecs
1686 12:51:41.691630 PCI: 00:1f.2 init
1687 12:51:41.694640 Disabling ACPI via APMC.
1688 12:51:41.699978 APMC done.
1689 12:51:41.703090 PCI: 00:1f.2 init finished in 6 msecs
1690 12:51:41.715029 PCI: 01:00.0 init
1691 12:51:41.717964 PCI: 01:00.0 init finished in 0 msecs
1692 12:51:41.721236 PNP: 0c09.0 init
1693 12:51:41.728614 Google Chrome EC uptime: 8.414 seconds
1694 12:51:41.731718 Google Chrome AP resets since EC boot: 1
1695 12:51:41.735117 Google Chrome most recent AP reset causes:
1696 12:51:41.738727 0.349: 32775 shutdown: entering G3
1697 12:51:41.745327 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1698 12:51:41.748764 PNP: 0c09.0 init finished in 24 msecs
1699 12:51:41.755252 Devices initialized
1700 12:51:41.758983 Show all devs... After init.
1701 12:51:41.761846 Root Device: enabled 1
1702 12:51:41.761926 DOMAIN: 0000: enabled 1
1703 12:51:41.764851 CPU_CLUSTER: 0: enabled 1
1704 12:51:41.768567 PCI: 00:00.0: enabled 1
1705 12:51:41.771807 PCI: 00:02.0: enabled 1
1706 12:51:41.771890 PCI: 00:04.0: enabled 1
1707 12:51:41.775320 PCI: 00:05.0: enabled 1
1708 12:51:41.778278 PCI: 00:06.0: enabled 0
1709 12:51:41.781623 PCI: 00:07.0: enabled 0
1710 12:51:41.781709 PCI: 00:07.1: enabled 0
1711 12:51:41.784854 PCI: 00:07.2: enabled 0
1712 12:51:41.788194 PCI: 00:07.3: enabled 0
1713 12:51:41.791372 PCI: 00:08.0: enabled 1
1714 12:51:41.791456 PCI: 00:09.0: enabled 0
1715 12:51:41.795008 PCI: 00:0a.0: enabled 0
1716 12:51:41.798033 PCI: 00:0d.0: enabled 1
1717 12:51:41.801709 PCI: 00:0d.1: enabled 0
1718 12:51:41.801791 PCI: 00:0d.2: enabled 0
1719 12:51:41.804846 PCI: 00:0d.3: enabled 0
1720 12:51:41.807983 PCI: 00:0e.0: enabled 0
1721 12:51:41.811237 PCI: 00:10.2: enabled 1
1722 12:51:41.811318 PCI: 00:10.6: enabled 0
1723 12:51:41.814487 PCI: 00:10.7: enabled 0
1724 12:51:41.817821 PCI: 00:12.0: enabled 0
1725 12:51:41.817901 PCI: 00:12.6: enabled 0
1726 12:51:41.821509 PCI: 00:13.0: enabled 0
1727 12:51:41.824732 PCI: 00:14.0: enabled 1
1728 12:51:41.828205 PCI: 00:14.1: enabled 0
1729 12:51:41.828285 PCI: 00:14.2: enabled 1
1730 12:51:41.831459 PCI: 00:14.3: enabled 1
1731 12:51:41.834544 PCI: 00:15.0: enabled 1
1732 12:51:41.837986 PCI: 00:15.1: enabled 1
1733 12:51:41.838063 PCI: 00:15.2: enabled 1
1734 12:51:41.841246 PCI: 00:15.3: enabled 1
1735 12:51:41.844451 PCI: 00:16.0: enabled 1
1736 12:51:41.847810 PCI: 00:16.1: enabled 0
1737 12:51:41.847889 PCI: 00:16.2: enabled 0
1738 12:51:41.851196 PCI: 00:16.3: enabled 0
1739 12:51:41.854484 PCI: 00:16.4: enabled 0
1740 12:51:41.854559 PCI: 00:16.5: enabled 0
1741 12:51:41.857748 PCI: 00:17.0: enabled 0
1742 12:51:41.861468 PCI: 00:19.0: enabled 0
1743 12:51:41.864938 PCI: 00:19.1: enabled 1
1744 12:51:41.865018 PCI: 00:19.2: enabled 0
1745 12:51:41.868162 PCI: 00:1c.0: enabled 1
1746 12:51:41.871522 PCI: 00:1c.1: enabled 0
1747 12:51:41.874594 PCI: 00:1c.2: enabled 0
1748 12:51:41.874671 PCI: 00:1c.3: enabled 0
1749 12:51:41.877684 PCI: 00:1c.4: enabled 0
1750 12:51:41.880999 PCI: 00:1c.5: enabled 0
1751 12:51:41.884514 PCI: 00:1c.6: enabled 1
1752 12:51:41.884592 PCI: 00:1c.7: enabled 0
1753 12:51:41.887604 PCI: 00:1d.0: enabled 1
1754 12:51:41.891432 PCI: 00:1d.1: enabled 0
1755 12:51:41.894523 PCI: 00:1d.2: enabled 1
1756 12:51:41.894604 PCI: 00:1d.3: enabled 0
1757 12:51:41.897730 PCI: 00:1e.0: enabled 1
1758 12:51:41.901094 PCI: 00:1e.1: enabled 0
1759 12:51:41.901178 PCI: 00:1e.2: enabled 1
1760 12:51:41.904521 PCI: 00:1e.3: enabled 1
1761 12:51:41.908160 PCI: 00:1f.0: enabled 1
1762 12:51:41.910872 PCI: 00:1f.1: enabled 0
1763 12:51:41.910956 PCI: 00:1f.2: enabled 1
1764 12:51:41.914495 PCI: 00:1f.3: enabled 1
1765 12:51:41.917730 PCI: 00:1f.4: enabled 0
1766 12:51:41.921056 PCI: 00:1f.5: enabled 1
1767 12:51:41.921149 PCI: 00:1f.6: enabled 0
1768 12:51:41.924177 PCI: 00:1f.7: enabled 0
1769 12:51:41.927623 APIC: 00: enabled 1
1770 12:51:41.927717 GENERIC: 0.0: enabled 1
1771 12:51:41.930927 GENERIC: 0.0: enabled 1
1772 12:51:41.934178 GENERIC: 1.0: enabled 1
1773 12:51:41.938093 GENERIC: 0.0: enabled 1
1774 12:51:41.938181 GENERIC: 1.0: enabled 1
1775 12:51:41.941241 USB0 port 0: enabled 1
1776 12:51:41.944462 GENERIC: 0.0: enabled 1
1777 12:51:41.947400 USB0 port 0: enabled 1
1778 12:51:41.947487 GENERIC: 0.0: enabled 1
1779 12:51:41.951067 I2C: 00:1a: enabled 1
1780 12:51:41.954405 I2C: 00:31: enabled 1
1781 12:51:41.954489 I2C: 00:32: enabled 1
1782 12:51:41.957786 I2C: 00:10: enabled 1
1783 12:51:41.961086 I2C: 00:15: enabled 1
1784 12:51:41.961169 GENERIC: 0.0: enabled 0
1785 12:51:41.964235 GENERIC: 1.0: enabled 0
1786 12:51:41.967137 GENERIC: 0.0: enabled 1
1787 12:51:41.967218 SPI: 00: enabled 1
1788 12:51:41.970950 SPI: 00: enabled 1
1789 12:51:41.973859 PNP: 0c09.0: enabled 1
1790 12:51:41.973940 GENERIC: 0.0: enabled 1
1791 12:51:41.977134 USB3 port 0: enabled 1
1792 12:51:41.980692 USB3 port 1: enabled 1
1793 12:51:41.984092 USB3 port 2: enabled 0
1794 12:51:41.984174 USB3 port 3: enabled 0
1795 12:51:41.987023 USB2 port 0: enabled 0
1796 12:51:41.990342 USB2 port 1: enabled 1
1797 12:51:41.990426 USB2 port 2: enabled 1
1798 12:51:41.993717 USB2 port 3: enabled 0
1799 12:51:41.997267 USB2 port 4: enabled 1
1800 12:51:42.000919 USB2 port 5: enabled 0
1801 12:51:42.001007 USB2 port 6: enabled 0
1802 12:51:42.003664 USB2 port 7: enabled 0
1803 12:51:42.006874 USB2 port 8: enabled 0
1804 12:51:42.006963 USB2 port 9: enabled 0
1805 12:51:42.010265 USB3 port 0: enabled 0
1806 12:51:42.013701 USB3 port 1: enabled 1
1807 12:51:42.017242 USB3 port 2: enabled 0
1808 12:51:42.017331 USB3 port 3: enabled 0
1809 12:51:42.020274 GENERIC: 0.0: enabled 1
1810 12:51:42.023352 GENERIC: 1.0: enabled 1
1811 12:51:42.023442 APIC: 01: enabled 1
1812 12:51:42.027072 APIC: 03: enabled 1
1813 12:51:42.030130 APIC: 07: enabled 1
1814 12:51:42.030218 APIC: 05: enabled 1
1815 12:51:42.033588 APIC: 04: enabled 1
1816 12:51:42.033675 APIC: 02: enabled 1
1817 12:51:42.036831 APIC: 06: enabled 1
1818 12:51:42.040349 PCI: 01:00.0: enabled 1
1819 12:51:42.043171 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1820 12:51:42.049831 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1821 12:51:42.053115 ELOG: NV offset 0xf30000 size 0x1000
1822 12:51:42.060412 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1823 12:51:42.066629 ELOG: Event(17) added with size 13 at 2023-03-22 12:51:42 UTC
1824 12:51:42.073390 ELOG: Event(92) added with size 9 at 2023-03-22 12:51:42 UTC
1825 12:51:42.079893 ELOG: Event(93) added with size 9 at 2023-03-22 12:51:42 UTC
1826 12:51:42.086610 ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:42 UTC
1827 12:51:42.093214 ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:42 UTC
1828 12:51:42.099924 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1829 12:51:42.106785 ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:42 UTC
1830 12:51:42.109750 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1831 12:51:42.116622 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1832 12:51:42.119855 Finalize devices...
1833 12:51:42.119939 Devices finalized
1834 12:51:42.126003 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1835 12:51:42.132805 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1836 12:51:42.136365 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1837 12:51:42.142781 ME: HFSTS1 : 0x80030055
1838 12:51:42.145977 ME: HFSTS2 : 0x30280116
1839 12:51:42.153143 ME: HFSTS3 : 0x00000050
1840 12:51:42.155947 ME: HFSTS4 : 0x00004000
1841 12:51:42.159289 ME: HFSTS5 : 0x00000000
1842 12:51:42.166044 ME: HFSTS6 : 0x00400006
1843 12:51:42.168926 ME: Manufacturing Mode : YES
1844 12:51:42.172062 ME: SPI Protection Mode Enabled : NO
1845 12:51:42.175384 ME: FW Partition Table : OK
1846 12:51:42.178809 ME: Bringup Loader Failure : NO
1847 12:51:42.182122 ME: Firmware Init Complete : NO
1848 12:51:42.185616 ME: Boot Options Present : NO
1849 12:51:42.192199 ME: Update In Progress : NO
1850 12:51:42.195449 ME: D0i3 Support : YES
1851 12:51:42.198738 ME: Low Power State Enabled : NO
1852 12:51:42.201708 ME: CPU Replaced : YES
1853 12:51:42.205243 ME: CPU Replacement Valid : YES
1854 12:51:42.208433 ME: Current Working State : 5
1855 12:51:42.212003 ME: Current Operation State : 1
1856 12:51:42.215312 ME: Current Operation Mode : 3
1857 12:51:42.221509 ME: Error Code : 0
1858 12:51:42.225187 ME: Enhanced Debug Mode : NO
1859 12:51:42.228218 ME: CPU Debug Disabled : YES
1860 12:51:42.231637 ME: TXT Support : NO
1861 12:51:42.238381 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1862 12:51:42.244793 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1863 12:51:42.248369 CBFS: 'fallback/slic' not found.
1864 12:51:42.251715 ACPI: Writing ACPI tables at 76b01000.
1865 12:51:42.254857 ACPI: * FACS
1866 12:51:42.254946 ACPI: * DSDT
1867 12:51:42.258289 Ramoops buffer: 0x100000@0x76a00000.
1868 12:51:42.264369 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1869 12:51:42.267975 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1870 12:51:42.271659 Google Chrome EC: version:
1871 12:51:42.275053 ro: voema_v2.0.7540-147f8d37d1
1872 12:51:42.278310 rw: voema_v2.0.7540-147f8d37d1
1873 12:51:42.281590 running image: 2
1874 12:51:42.288108 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1875 12:51:42.291993 ACPI: * FADT
1876 12:51:42.292079 SCI is IRQ9
1877 12:51:42.295172 ACPI: added table 1/32, length now 40
1878 12:51:42.298275 ACPI: * SSDT
1879 12:51:42.301627 Found 1 CPU(s) with 8 core(s) each.
1880 12:51:42.304748 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1881 12:51:42.311343 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1882 12:51:42.315041 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1883 12:51:42.318187 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1884 12:51:42.324665 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1885 12:51:42.331614 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1886 12:51:42.334690 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1887 12:51:42.341188 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1888 12:51:42.348348 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1889 12:51:42.350984 \_SB.PCI0.RP09: Added StorageD3Enable property
1890 12:51:42.354644 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1891 12:51:42.361330 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1892 12:51:42.367589 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1893 12:51:42.370961 PS2K: Passing 80 keymaps to kernel
1894 12:51:42.377444 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1895 12:51:42.384250 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1896 12:51:42.390737 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1897 12:51:42.397181 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1898 12:51:42.404393 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1899 12:51:42.410553 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1900 12:51:42.417661 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1901 12:51:42.423962 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1902 12:51:42.427628 ACPI: added table 2/32, length now 44
1903 12:51:42.427725 ACPI: * MCFG
1904 12:51:42.431541 ACPI: added table 3/32, length now 48
1905 12:51:42.434135 ACPI: * TPM2
1906 12:51:42.437580 TPM2 log created at 0x769f0000
1907 12:51:42.440674 ACPI: added table 4/32, length now 52
1908 12:51:42.440761 ACPI: * MADT
1909 12:51:42.444069 SCI is IRQ9
1910 12:51:42.447300 ACPI: added table 5/32, length now 56
1911 12:51:42.450703 current = 76b09850
1912 12:51:42.450785 ACPI: * DMAR
1913 12:51:42.454169 ACPI: added table 6/32, length now 60
1914 12:51:42.457447 ACPI: added table 7/32, length now 64
1915 12:51:42.460499 ACPI: * HPET
1916 12:51:42.463940 ACPI: added table 8/32, length now 68
1917 12:51:42.464018 ACPI: done.
1918 12:51:42.467402 ACPI tables: 35216 bytes.
1919 12:51:42.470558 smbios_write_tables: 769ef000
1920 12:51:42.473887 EC returned error result code 3
1921 12:51:42.477183 Couldn't obtain OEM name from CBI
1922 12:51:42.481147 Create SMBIOS type 16
1923 12:51:42.484343 Create SMBIOS type 17
1924 12:51:42.487597 GENERIC: 0.0 (WIFI Device)
1925 12:51:42.487674 SMBIOS tables: 1750 bytes.
1926 12:51:42.494255 Writing table forward entry at 0x00000500
1927 12:51:42.500893 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1928 12:51:42.504345 Writing coreboot table at 0x76b25000
1929 12:51:42.510864 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1930 12:51:42.514195 1. 0000000000001000-000000000009ffff: RAM
1931 12:51:42.517303 2. 00000000000a0000-00000000000fffff: RESERVED
1932 12:51:42.523842 3. 0000000000100000-00000000769eefff: RAM
1933 12:51:42.527466 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1934 12:51:42.534211 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1935 12:51:42.541101 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1936 12:51:42.543914 7. 0000000077000000-000000007fbfffff: RESERVED
1937 12:51:42.550451 8. 00000000c0000000-00000000cfffffff: RESERVED
1938 12:51:42.554018 9. 00000000f8000000-00000000f9ffffff: RESERVED
1939 12:51:42.556966 10. 00000000fb000000-00000000fb000fff: RESERVED
1940 12:51:42.563978 11. 00000000fe000000-00000000fe00ffff: RESERVED
1941 12:51:42.567072 12. 00000000fed80000-00000000fed87fff: RESERVED
1942 12:51:42.573915 13. 00000000fed90000-00000000fed92fff: RESERVED
1943 12:51:42.576929 14. 00000000feda0000-00000000feda1fff: RESERVED
1944 12:51:42.583564 15. 00000000fedc0000-00000000feddffff: RESERVED
1945 12:51:42.586985 16. 0000000100000000-00000002803fffff: RAM
1946 12:51:42.590209 Passing 4 GPIOs to payload:
1947 12:51:42.593609 NAME | PORT | POLARITY | VALUE
1948 12:51:42.600268 lid | undefined | high | high
1949 12:51:42.606702 power | undefined | high | low
1950 12:51:42.610146 oprom | undefined | high | low
1951 12:51:42.616757 EC in RW | 0x000000e5 | high | high
1952 12:51:42.623224 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4bc4
1953 12:51:42.626453 coreboot table: 1576 bytes.
1954 12:51:42.629825 IMD ROOT 0. 0x76fff000 0x00001000
1955 12:51:42.633091 IMD SMALL 1. 0x76ffe000 0x00001000
1956 12:51:42.636218 FSP MEMORY 2. 0x76c4e000 0x003b0000
1957 12:51:42.639758 VPD 3. 0x76c4d000 0x00000367
1958 12:51:42.642712 RO MCACHE 4. 0x76c4c000 0x00000fdc
1959 12:51:42.646620 CONSOLE 5. 0x76c2c000 0x00020000
1960 12:51:42.649906 FMAP 6. 0x76c2b000 0x00000578
1961 12:51:42.656314 TIME STAMP 7. 0x76c2a000 0x00000910
1962 12:51:42.659458 VBOOT WORK 8. 0x76c16000 0x00014000
1963 12:51:42.662931 ROMSTG STCK 9. 0x76c15000 0x00001000
1964 12:51:42.666299 AFTER CAR 10. 0x76c0a000 0x0000b000
1965 12:51:42.669418 RAMSTAGE 11. 0x76b97000 0x00073000
1966 12:51:42.673185 REFCODE 12. 0x76b42000 0x00055000
1967 12:51:42.676043 SMM BACKUP 13. 0x76b32000 0x00010000
1968 12:51:42.682647 4f444749 14. 0x76b30000 0x00002000
1969 12:51:42.685950 EXT VBT15. 0x76b2d000 0x0000219f
1970 12:51:42.689314 COREBOOT 16. 0x76b25000 0x00008000
1971 12:51:42.692504 ACPI 17. 0x76b01000 0x00024000
1972 12:51:42.695944 ACPI GNVS 18. 0x76b00000 0x00001000
1973 12:51:42.699182 RAMOOPS 19. 0x76a00000 0x00100000
1974 12:51:42.702529 TPM2 TCGLOG20. 0x769f0000 0x00010000
1975 12:51:42.705876 SMBIOS 21. 0x769ef000 0x00000800
1976 12:51:42.709050 IMD small region:
1977 12:51:42.712309 IMD ROOT 0. 0x76ffec00 0x00000400
1978 12:51:42.715937 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1979 12:51:42.719000 POWER STATE 2. 0x76ffeb80 0x00000044
1980 12:51:42.725512 ROMSTAGE 3. 0x76ffeb60 0x00000004
1981 12:51:42.728666 MEM INFO 4. 0x76ffe980 0x000001e0
1982 12:51:42.735356 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1983 12:51:42.735437 MTRR: Physical address space:
1984 12:51:42.742175 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1985 12:51:42.748800 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1986 12:51:42.755176 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1987 12:51:42.761646 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1988 12:51:42.768777 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1989 12:51:42.775072 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1990 12:51:42.781636 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1991 12:51:42.785144 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 12:51:42.788508 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 12:51:42.791800 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 12:51:42.798548 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 12:51:42.801714 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 12:51:42.804883 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 12:51:42.808175 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 12:51:42.814762 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 12:51:42.818307 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 12:51:42.821329 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 12:51:42.824581 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 12:51:42.829040 call enable_fixed_mtrr()
2003 12:51:42.832113 CPU physical address size: 39 bits
2004 12:51:42.839085 MTRR: default type WB/UC MTRR counts: 6/6.
2005 12:51:42.842049 MTRR: UC selected as default type.
2006 12:51:42.849054 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2007 12:51:42.852533 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2008 12:51:42.858782 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2009 12:51:42.865295 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2010 12:51:42.872334 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2011 12:51:42.878413 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2012 12:51:42.878501
2013 12:51:42.881996 MTRR check
2014 12:51:42.885038 Fixed MTRRs : Enabled
2015 12:51:42.885124 Variable MTRRs: Enabled
2016 12:51:42.885192
2017 12:51:42.891961 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 12:51:42.895210 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 12:51:42.898643 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 12:51:42.901999 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 12:51:42.908464 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 12:51:42.911734 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 12:51:42.915228 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 12:51:42.918423 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 12:51:42.921782 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 12:51:42.928202 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 12:51:42.931451 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 12:51:42.938467 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2029 12:51:42.941851 call enable_fixed_mtrr()
2030 12:51:42.944668 Checking cr50 for pending updates
2031 12:51:42.949652 CPU physical address size: 39 bits
2032 12:51:42.952946 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 12:51:42.956184 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 12:51:42.959432 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 12:51:42.962686 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 12:51:42.969582 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 12:51:42.972572 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 12:51:42.976328 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 12:51:42.979190 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 12:51:42.985705 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 12:51:42.989093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 12:51:42.992706 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 12:51:42.995877 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 12:51:43.003329 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 12:51:43.006556 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 12:51:43.009824 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 12:51:43.013109 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 12:51:43.019723 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 12:51:43.023610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 12:51:43.026726 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 12:51:43.030057 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 12:51:43.036267 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 12:51:43.040021 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 12:51:43.042888 call enable_fixed_mtrr()
2055 12:51:43.046775 call enable_fixed_mtrr()
2056 12:51:43.049510 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 12:51:43.053250 MTRR: Fixed MSR 0x250 0x0606060606060606
2058 12:51:43.056367 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:51:43.063045 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 12:51:43.066406 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 12:51:43.069572 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 12:51:43.072903 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 12:51:43.079372 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 12:51:43.083201 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 12:51:43.086270 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 12:51:43.089498 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 12:51:43.092669 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 12:51:43.099654 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 12:51:43.102746 MTRR: Fixed MSR 0x259 0x0000000000000000
2070 12:51:43.109430 MTRR: Fixed MSR 0x268 0x0606060606060606
2071 12:51:43.112723 MTRR: Fixed MSR 0x269 0x0606060606060606
2072 12:51:43.116114 MTRR: Fixed MSR 0x26a 0x0606060606060606
2073 12:51:43.119448 MTRR: Fixed MSR 0x26b 0x0606060606060606
2074 12:51:43.122968 MTRR: Fixed MSR 0x26c 0x0606060606060606
2075 12:51:43.129291 MTRR: Fixed MSR 0x26d 0x0606060606060606
2076 12:51:43.132518 MTRR: Fixed MSR 0x26e 0x0606060606060606
2077 12:51:43.135883 MTRR: Fixed MSR 0x26f 0x0606060606060606
2078 12:51:43.139637 call enable_fixed_mtrr()
2079 12:51:43.142660 call enable_fixed_mtrr()
2080 12:51:43.146493 CPU physical address size: 39 bits
2081 12:51:43.149417 CPU physical address size: 39 bits
2082 12:51:43.156059 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 12:51:43.159424 MTRR: Fixed MSR 0x250 0x0606060606060606
2084 12:51:43.162625 MTRR: Fixed MSR 0x258 0x0606060606060606
2085 12:51:43.165993 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 12:51:43.172681 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 12:51:43.175897 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 12:51:43.179137 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 12:51:43.182743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 12:51:43.189107 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 12:51:43.192511 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 12:51:43.196002 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 12:51:43.198921 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 12:51:43.206066 MTRR: Fixed MSR 0x258 0x0606060606060606
2095 12:51:43.206154 call enable_fixed_mtrr()
2096 12:51:43.212772 MTRR: Fixed MSR 0x259 0x0000000000000000
2097 12:51:43.216345 MTRR: Fixed MSR 0x268 0x0606060606060606
2098 12:51:43.219027 MTRR: Fixed MSR 0x269 0x0606060606060606
2099 12:51:43.222346 MTRR: Fixed MSR 0x26a 0x0606060606060606
2100 12:51:43.229211 MTRR: Fixed MSR 0x26b 0x0606060606060606
2101 12:51:43.232816 MTRR: Fixed MSR 0x26c 0x0606060606060606
2102 12:51:43.236258 MTRR: Fixed MSR 0x26d 0x0606060606060606
2103 12:51:43.239462 MTRR: Fixed MSR 0x26e 0x0606060606060606
2104 12:51:43.246272 MTRR: Fixed MSR 0x26f 0x0606060606060606
2105 12:51:43.249049 CPU physical address size: 39 bits
2106 12:51:43.252259 call enable_fixed_mtrr()
2107 12:51:43.256562 Reading cr50 TPM mode
2108 12:51:43.259472 CPU physical address size: 39 bits
2109 12:51:43.262628 CPU physical address size: 39 bits
2110 12:51:43.269240 BS: BS_PAYLOAD_LOAD entry times (exec / console): 315 / 6 ms
2111 12:51:43.272599 CPU physical address size: 39 bits
2112 12:51:43.279244 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2113 12:51:43.285990 Checking segment from ROM address 0xffc02b38
2114 12:51:43.289363 Checking segment from ROM address 0xffc02b54
2115 12:51:43.292175 Loading segment from ROM address 0xffc02b38
2116 12:51:43.295648 code (compression=0)
2117 12:51:43.305953 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2118 12:51:43.312466 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2119 12:51:43.315283 it's not compressed!
2120 12:51:43.453884 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2121 12:51:43.460490 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2122 12:51:43.467081 Loading segment from ROM address 0xffc02b54
2123 12:51:43.470321 Entry Point 0x30000000
2124 12:51:43.470403 Loaded segments
2125 12:51:43.476857 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2126 12:51:43.520539 Finalizing chipset.
2127 12:51:43.523412 Finalizing SMM.
2128 12:51:43.523550 APMC done.
2129 12:51:43.530050 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2130 12:51:43.533091 mp_park_aps done after 0 msecs.
2131 12:51:43.536699 Jumping to boot code at 0x30000000(0x76b25000)
2132 12:51:43.546543 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2133 12:51:43.546629
2134 12:51:43.546701
2135 12:51:43.550002
2136 12:51:43.550080 Starting depthcharge on Voema...
2137 12:51:43.550416 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2138 12:51:43.550515 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2139 12:51:43.550636 Setting prompt string to ['volteer:']
2140 12:51:43.550724 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2141 12:51:43.553252
2142 12:51:43.559924 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2143 12:51:43.560019
2144 12:51:43.566397 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2145 12:51:43.566477
2146 12:51:43.573063 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2147 12:51:43.573141
2148 12:51:43.576189 Failed to find eMMC card reader
2149 12:51:43.576261
2150 12:51:43.576327 Wipe memory regions:
2151 12:51:43.579660
2152 12:51:43.582969 [0x00000000001000, 0x000000000a0000)
2153 12:51:43.583042
2154 12:51:43.586151 [0x00000000100000, 0x00000030000000)
2155 12:51:43.611358
2156 12:51:43.614675 [0x00000032662db0, 0x000000769ef000)
2157 12:51:43.650354
2158 12:51:43.653694 [0x00000100000000, 0x00000280400000)
2159 12:51:43.853847
2160 12:51:43.857276 ec_init: CrosEC protocol v3 supported (256, 256)
2161 12:51:43.857383
2162 12:51:43.863904 update_port_state: port C0 state: usb enable 1 mux conn 0
2163 12:51:43.864008
2164 12:51:43.870709 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2165 12:51:43.873743
2166 12:51:43.877059 pmc_check_ipc_sts: STS_BUSY done after 1618 us
2167 12:51:43.877143
2168 12:51:43.883427 send_conn_disc_msg: pmc_send_cmd succeeded
2169 12:51:44.313527
2170 12:51:44.313668 R8152: Initializing
2171 12:51:44.313765
2172 12:51:44.316782 Version 6 (ocp_data = 5c30)
2173 12:51:44.316863
2174 12:51:44.320117 R8152: Done initializing
2175 12:51:44.320201
2176 12:51:44.323202 Adding net device
2177 12:51:44.624766
2178 12:51:44.627655 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2179 12:51:44.627779
2180 12:51:44.627858
2181 12:51:44.627921
2182 12:51:44.631218 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2184 12:51:44.731997 volteer: tftpboot 192.168.201.1 9729794/tftp-deploy-62pzqmlu/kernel/bzImage 9729794/tftp-deploy-62pzqmlu/kernel/cmdline 9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
2185 12:51:44.732167 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2186 12:51:44.732254 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2187 12:51:44.737018 tftpboot 192.168.201.1 9729794/tftp-deploy-62pzqmlu/kernel/bzImay-62pzqmlu/kernel/cmdline 9729794/tftp-deploy-62pzqmlu/ramdisk/ramdisk.cpio.gz
2188 12:51:44.737107
2189 12:51:44.737175 Waiting for link
2190 12:51:44.939492
2191 12:51:44.940094 done.
2192 12:51:44.940461
2193 12:51:44.940844 MAC: 00:24:32:30:79:42
2194 12:51:44.941216
2195 12:51:44.942554 Sending DHCP discover... done.
2196 12:51:44.942996
2197 12:51:44.945926 Waiting for reply... done.
2198 12:51:44.946373
2199 12:51:44.949362 Sending DHCP request... done.
2200 12:51:44.949805
2201 12:51:44.955934 Waiting for reply... done.
2202 12:51:44.956399
2203 12:51:44.956761 My ip is 192.168.201.13
2204 12:51:44.957089
2205 12:51:44.959480 The DHCP server ip is 192.168.201.1
2206 12:51:44.962722
2207 12:51:44.965781 TFTP server IP predefined by user: 192.168.201.1
2208 12:51:44.966076
2209 12:51:44.972346 Bootfile predefined by user: 9729794/tftp-deploy-62pzqmlu/kernel/bzImage
2210 12:51:44.972433
2211 12:51:44.975890 Sending tftp read request... done.
2212 12:51:44.975979
2213 12:51:44.978532 Waiting for the transfer...
2214 12:51:44.978612
2215 12:51:45.559211 00000000 ################################################################
2216 12:51:45.559365
2217 12:51:46.074621 00080000 ################################################################
2218 12:51:46.074772
2219 12:51:46.589456 00100000 ################################################################
2220 12:51:46.589602
2221 12:51:47.111332 00180000 ################################################################
2222 12:51:47.111482
2223 12:51:47.629850 00200000 ################################################################
2224 12:51:47.630000
2225 12:51:48.148410 00280000 ################################################################
2226 12:51:48.148557
2227 12:51:48.700624 00300000 ################################################################
2228 12:51:48.700774
2229 12:51:49.237984 00380000 ################################################################
2230 12:51:49.238141
2231 12:51:49.785008 00400000 ################################################################
2232 12:51:49.785151
2233 12:51:50.341639 00480000 ################################################################
2234 12:51:50.341782
2235 12:51:50.867176 00500000 ################################################################
2236 12:51:50.867321
2237 12:51:51.435303 00580000 ################################################################
2238 12:51:51.435467
2239 12:51:51.998239 00600000 ################################################################
2240 12:51:51.998408
2241 12:51:52.529349 00680000 ################################################################
2242 12:51:52.529510
2243 12:51:53.061887 00700000 ################################################################
2244 12:51:53.062147
2245 12:51:53.587055 00780000 ################################################################
2246 12:51:53.587254
2247 12:51:54.114731 00800000 ################################################################
2248 12:51:54.114904
2249 12:51:54.641745 00880000 ################################################################
2250 12:51:54.641914
2251 12:51:55.178995 00900000 ################################################################
2252 12:51:55.179154
2253 12:51:55.709395 00980000 ################################################################
2254 12:51:55.709583
2255 12:51:56.246728 00a00000 ################################################################
2256 12:51:56.246876
2257 12:51:56.766802 00a80000 ################################################################
2258 12:51:56.766952
2259 12:51:57.113181 00b00000 ########################################### done.
2260 12:51:57.113336
2261 12:51:57.116670 The bootfile was 11878592 bytes long.
2262 12:51:57.116758
2263 12:51:57.119878 Sending tftp read request... done.
2264 12:51:57.119964
2265 12:51:57.122574 Waiting for the transfer...
2266 12:51:57.122661
2267 12:51:57.664968 00000000 ################################################################
2268 12:51:57.665145
2269 12:51:58.210811 00080000 ################################################################
2270 12:51:58.210961
2271 12:51:58.752387 00100000 ################################################################
2272 12:51:58.752555
2273 12:51:59.300856 00180000 ################################################################
2274 12:51:59.301017
2275 12:51:59.846415 00200000 ################################################################
2276 12:51:59.846569
2277 12:52:00.381336 00280000 ################################################################
2278 12:52:00.381526
2279 12:52:00.914948 00300000 ################################################################
2280 12:52:00.915083
2281 12:52:01.447051 00380000 ################################################################
2282 12:52:01.447263
2283 12:52:01.989110 00400000 ################################################################
2284 12:52:01.989248
2285 12:52:02.562143 00480000 ################################################################
2286 12:52:02.562287
2287 12:52:03.103002 00500000 ################################################################
2288 12:52:03.103145
2289 12:52:03.664844 00580000 ################################################################
2290 12:52:03.664985
2291 12:52:04.248971 00600000 ################################################################
2292 12:52:04.249112
2293 12:52:04.891971 00680000 ################################################################
2294 12:52:04.892114
2295 12:52:04.915992 00700000 ### done.
2296 12:52:04.916088
2297 12:52:04.919287 Sending tftp read request... done.
2298 12:52:04.919373
2299 12:52:04.922642 Waiting for the transfer...
2300 12:52:04.922728
2301 12:52:04.922795 00000000 # done.
2302 12:52:04.922860
2303 12:52:04.932375 Command line loaded dynamically from TFTP file: 9729794/tftp-deploy-62pzqmlu/kernel/cmdline
2304 12:52:04.932463
2305 12:52:04.955482 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729794/extract-nfsrootfs-u6i86wl9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2306 12:52:04.960790
2307 12:52:04.963873 Shutting down all USB controllers.
2308 12:52:04.963960
2309 12:52:04.964030 Removing current net device
2310 12:52:04.964150
2311 12:52:04.967430 Finalizing coreboot
2312 12:52:04.967510
2313 12:52:04.973834 Exiting depthcharge with code 4 at timestamp: 30066508
2314 12:52:04.973921
2315 12:52:04.974014
2316 12:52:04.974107 Starting kernel ...
2317 12:52:04.974171
2318 12:52:04.974234
2319 12:52:04.974644 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2320 12:52:04.974748 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2321 12:52:04.974824 Setting prompt string to ['Linux version [0-9]']
2322 12:52:04.974899 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2323 12:52:04.974974 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2325 12:56:27.975604 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2327 12:56:27.976693 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2329 12:56:27.977715 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2332 12:56:27.979065 end: 2 depthcharge-action (duration 00:05:00) [common]
2334 12:56:27.980289 Cleaning after the job
2335 12:56:27.980717 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/ramdisk
2336 12:56:27.983195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/kernel
2337 12:56:27.986734 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/nfsrootfs
2338 12:56:28.052201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729794/tftp-deploy-62pzqmlu/modules
2339 12:56:28.053041 start: 5.1 power-off (timeout 00:00:30) [common]
2340 12:56:28.053211 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2341 12:56:28.127038 >> Command sent successfully.
2342 12:56:28.129400 Returned 0 in 0 seconds
2343 12:56:28.230513 end: 5.1 power-off (duration 00:00:00) [common]
2345 12:56:28.232172 start: 5.2 read-feedback (timeout 00:10:00) [common]
2346 12:56:28.233253 Listened to connection for namespace 'common' for up to 1s
2347 12:56:29.235945 Finalising connection for namespace 'common'
2348 12:56:29.236571 Disconnecting from shell: Finalise
2349 12:56:29.236974
2350 12:56:29.338262 end: 5.2 read-feedback (duration 00:00:01) [common]
2351 12:56:29.338838 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729794
2352 12:56:29.438600 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729794
2353 12:56:29.438798 JobError: Your job cannot terminate cleanly.