Boot log: dell-latitude-5400-8665U-sarien

    1 12:51:09.214338  lava-dispatcher, installed at version: 2023.01
    2 12:51:09.214522  start: 0 validate
    3 12:51:09.214636  Start time: 2023-03-22 12:51:09.214631+00:00 (UTC)
    4 12:51:09.214763  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:09.214887  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:51:09.504933  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:09.505111  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:15.508839  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:15.509002  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:51:15.800419  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:51:15.801154  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:51:16.805153  validate duration: 7.59
   14 12:51:16.805438  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:51:16.805591  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:51:16.805682  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:51:16.805824  Not decompressing ramdisk as can be used compressed.
   18 12:51:16.805906  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
   19 12:51:16.805971  saving as /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/ramdisk/initrd.cpio.gz
   20 12:51:16.806035  total size: 5432123 (5MB)
   21 12:51:16.806982  progress   0% (0MB)
   22 12:51:16.808437  progress   5% (0MB)
   23 12:51:16.809806  progress  10% (0MB)
   24 12:51:16.811130  progress  15% (0MB)
   25 12:51:16.812617  progress  20% (1MB)
   26 12:51:16.813970  progress  25% (1MB)
   27 12:51:16.815274  progress  30% (1MB)
   28 12:51:16.816737  progress  35% (1MB)
   29 12:51:16.818058  progress  40% (2MB)
   30 12:51:16.819356  progress  45% (2MB)
   31 12:51:16.820647  progress  50% (2MB)
   32 12:51:16.822109  progress  55% (2MB)
   33 12:51:16.823458  progress  60% (3MB)
   34 12:51:16.824775  progress  65% (3MB)
   35 12:51:16.826272  progress  70% (3MB)
   36 12:51:16.827545  progress  75% (3MB)
   37 12:51:16.828812  progress  80% (4MB)
   38 12:51:16.830139  progress  85% (4MB)
   39 12:51:16.831556  progress  90% (4MB)
   40 12:51:16.832824  progress  95% (4MB)
   41 12:51:16.834169  progress 100% (5MB)
   42 12:51:16.834387  5MB downloaded in 0.03s (182.75MB/s)
   43 12:51:16.834542  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:51:16.834789  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:51:16.834879  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:51:16.834966  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:51:16.835076  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   49 12:51:16.835147  saving as /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/kernel/bzImage
   50 12:51:16.835209  total size: 11878592 (11MB)
   51 12:51:16.835269  No compression specified
   52 12:51:16.836165  progress   0% (0MB)
   53 12:51:16.839077  progress   5% (0MB)
   54 12:51:16.841942  progress  10% (1MB)
   55 12:51:16.844750  progress  15% (1MB)
   56 12:51:16.847626  progress  20% (2MB)
   57 12:51:16.850498  progress  25% (2MB)
   58 12:51:16.853308  progress  30% (3MB)
   59 12:51:16.856178  progress  35% (3MB)
   60 12:51:16.859148  progress  40% (4MB)
   61 12:51:16.861967  progress  45% (5MB)
   62 12:51:16.864768  progress  50% (5MB)
   63 12:51:16.867598  progress  55% (6MB)
   64 12:51:16.870442  progress  60% (6MB)
   65 12:51:16.873253  progress  65% (7MB)
   66 12:51:16.876057  progress  70% (7MB)
   67 12:51:16.878864  progress  75% (8MB)
   68 12:51:16.881853  progress  80% (9MB)
   69 12:51:16.884642  progress  85% (9MB)
   70 12:51:16.887470  progress  90% (10MB)
   71 12:51:16.890282  progress  95% (10MB)
   72 12:51:16.893172  progress 100% (11MB)
   73 12:51:16.893342  11MB downloaded in 0.06s (194.89MB/s)
   74 12:51:16.893494  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:51:16.893794  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:51:16.893916  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:51:16.894006  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:51:16.894119  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
   80 12:51:16.894188  saving as /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/nfsrootfs/full.rootfs.tar
   81 12:51:16.894253  total size: 133351768 (127MB)
   82 12:51:16.894315  Using unxz to decompress xz
   83 12:51:16.897232  progress   0% (0MB)
   84 12:51:17.249835  progress   5% (6MB)
   85 12:51:17.625729  progress  10% (12MB)
   86 12:51:17.914758  progress  15% (19MB)
   87 12:51:18.108815  progress  20% (25MB)
   88 12:51:18.360670  progress  25% (31MB)
   89 12:51:18.703617  progress  30% (38MB)
   90 12:51:19.063193  progress  35% (44MB)
   91 12:51:19.455991  progress  40% (50MB)
   92 12:51:19.839077  progress  45% (57MB)
   93 12:51:20.193498  progress  50% (63MB)
   94 12:51:20.568494  progress  55% (69MB)
   95 12:51:20.936913  progress  60% (76MB)
   96 12:51:21.307037  progress  65% (82MB)
   97 12:51:21.676506  progress  70% (89MB)
   98 12:51:22.046498  progress  75% (95MB)
   99 12:51:22.490442  progress  80% (101MB)
  100 12:51:22.930213  progress  85% (108MB)
  101 12:51:23.205655  progress  90% (114MB)
  102 12:51:23.574516  progress  95% (120MB)
  103 12:51:23.986098  progress 100% (127MB)
  104 12:51:23.992028  127MB downloaded in 7.10s (17.92MB/s)
  105 12:51:23.992352  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:51:23.992629  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:51:23.992727  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 12:51:23.992820  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 12:51:23.992941  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
  111 12:51:23.993015  saving as /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/modules/modules.tar
  112 12:51:23.993082  total size: 1255052 (1MB)
  113 12:51:23.993147  Using unxz to decompress xz
  114 12:51:23.996028  progress   2% (0MB)
  115 12:51:23.996549  progress   7% (0MB)
  116 12:51:23.999830  progress  13% (0MB)
  117 12:51:24.003817  progress  18% (0MB)
  118 12:51:24.007818  progress  23% (0MB)
  119 12:51:24.011782  progress  28% (0MB)
  120 12:51:24.015733  progress  33% (0MB)
  121 12:51:24.019636  progress  39% (0MB)
  122 12:51:24.023614  progress  44% (0MB)
  123 12:51:24.027326  progress  49% (0MB)
  124 12:51:24.031206  progress  54% (0MB)
  125 12:51:24.034970  progress  60% (0MB)
  126 12:51:24.038826  progress  65% (0MB)
  127 12:51:24.042520  progress  70% (0MB)
  128 12:51:24.046317  progress  75% (0MB)
  129 12:51:24.049979  progress  80% (0MB)
  130 12:51:24.053944  progress  86% (1MB)
  131 12:51:24.057821  progress  91% (1MB)
  132 12:51:24.061571  progress  96% (1MB)
  133 12:51:24.070841  1MB downloaded in 0.08s (15.39MB/s)
  134 12:51:24.071115  end: 1.4.1 http-download (duration 00:00:00) [common]
  136 12:51:24.071384  end: 1.4 download-retry (duration 00:00:00) [common]
  137 12:51:24.071480  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  138 12:51:24.071577  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  139 12:51:25.318831  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729798/extract-nfsrootfs-sgbollop
  140 12:51:25.319058  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  141 12:51:25.319166  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  142 12:51:25.319302  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v
  143 12:51:25.319445  makedir: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin
  144 12:51:25.319531  makedir: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/tests
  145 12:51:25.319612  makedir: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/results
  146 12:51:25.319710  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-add-keys
  147 12:51:25.319839  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-add-sources
  148 12:51:25.319960  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-background-process-start
  149 12:51:25.320074  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-background-process-stop
  150 12:51:25.320188  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-common-functions
  151 12:51:25.320297  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-echo-ipv4
  152 12:51:25.320407  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-install-packages
  153 12:51:25.320532  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-installed-packages
  154 12:51:25.320640  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-os-build
  155 12:51:25.320748  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-probe-channel
  156 12:51:25.320855  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-probe-ip
  157 12:51:25.320961  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-target-ip
  158 12:51:25.321068  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-target-mac
  159 12:51:25.321174  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-target-storage
  160 12:51:25.321285  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-case
  161 12:51:25.321391  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-event
  162 12:51:25.321499  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-feedback
  163 12:51:25.321608  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-raise
  164 12:51:25.321751  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-reference
  165 12:51:25.321888  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-runner
  166 12:51:25.322006  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-set
  167 12:51:25.322114  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-test-shell
  168 12:51:25.322223  Updating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-install-packages (oe)
  169 12:51:25.322343  Updating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/bin/lava-installed-packages (oe)
  170 12:51:25.322441  Creating /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/environment
  171 12:51:25.322527  LAVA metadata
  172 12:51:25.322595  - LAVA_JOB_ID=9729798
  173 12:51:25.322659  - LAVA_DISPATCHER_IP=192.168.201.1
  174 12:51:25.322759  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  175 12:51:25.322824  skipped lava-vland-overlay
  176 12:51:25.322899  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  177 12:51:25.322978  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  178 12:51:25.323040  skipped lava-multinode-overlay
  179 12:51:25.323113  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  180 12:51:25.323192  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  181 12:51:25.323296  Loading test definitions
  182 12:51:25.323401  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  183 12:51:25.323470  Using /lava-9729798 at stage 0
  184 12:51:25.323718  uuid=9729798_1.5.2.3.1 testdef=None
  185 12:51:25.323806  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  186 12:51:25.323893  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  187 12:51:25.324389  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  189 12:51:25.324628  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  190 12:51:25.325212  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  192 12:51:25.325451  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  193 12:51:25.326259  runner path: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/0/tests/0_dmesg test_uuid 9729798_1.5.2.3.1
  194 12:51:25.326405  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  196 12:51:25.326646  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  197 12:51:25.326721  Using /lava-9729798 at stage 1
  198 12:51:25.326959  uuid=9729798_1.5.2.3.5 testdef=None
  199 12:51:25.327047  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  200 12:51:25.327136  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  201 12:51:25.327576  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  203 12:51:25.327799  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  204 12:51:25.328361  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  206 12:51:25.328594  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  207 12:51:25.329138  runner path: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/1/tests/1_bootrr test_uuid 9729798_1.5.2.3.5
  208 12:51:25.329279  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  210 12:51:25.329487  Creating lava-test-runner.conf files
  211 12:51:25.329551  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/0 for stage 0
  212 12:51:25.329632  - 0_dmesg
  213 12:51:25.329709  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729798/lava-overlay-87dgim3v/lava-9729798/1 for stage 1
  214 12:51:25.329827  - 1_bootrr
  215 12:51:25.329916  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  216 12:51:25.330002  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  217 12:51:25.335825  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  218 12:51:25.335932  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  219 12:51:25.336023  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  220 12:51:25.336110  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  221 12:51:25.336196  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  222 12:51:25.438685  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  223 12:51:25.439049  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  224 12:51:25.439305  extracting modules file /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729798/extract-nfsrootfs-sgbollop
  225 12:51:25.465968  extracting modules file /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729798/extract-overlay-ramdisk-iepv0l8o/ramdisk
  226 12:51:25.492603  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  227 12:51:25.492804  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  228 12:51:25.492905  [common] Applying overlay to NFS
  229 12:51:25.492980  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729798/compress-overlay-dduwq4jl/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729798/extract-nfsrootfs-sgbollop
  230 12:51:25.497081  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  231 12:51:25.497228  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  232 12:51:25.497329  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  233 12:51:25.497427  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  234 12:51:25.497514  Building ramdisk /var/lib/lava/dispatcher/tmp/9729798/extract-overlay-ramdisk-iepv0l8o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729798/extract-overlay-ramdisk-iepv0l8o/ramdisk
  235 12:51:25.549809  >> 39111 blocks

  236 12:51:26.227057  rename /var/lib/lava/dispatcher/tmp/9729798/extract-overlay-ramdisk-iepv0l8o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz
  237 12:51:26.227478  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  238 12:51:26.227599  start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
  239 12:51:26.227706  start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
  240 12:51:26.227799  No mkimage arch provided, not using FIT.
  241 12:51:26.227891  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  242 12:51:26.227977  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  243 12:51:26.228083  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  244 12:51:26.228175  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
  245 12:51:26.228257  No LXC device requested
  246 12:51:26.228343  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  247 12:51:26.228430  start: 1.7 deploy-device-env (timeout 00:09:51) [common]
  248 12:51:26.228514  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  249 12:51:26.228586  Checking files for TFTP limit of 4294967296 bytes.
  250 12:51:26.228965  end: 1 tftp-deploy (duration 00:00:09) [common]
  251 12:51:26.229069  start: 2 depthcharge-action (timeout 00:05:00) [common]
  252 12:51:26.229168  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  253 12:51:26.229295  substitutions:
  254 12:51:26.229366  - {DTB}: None
  255 12:51:26.229432  - {INITRD}: 9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz
  256 12:51:26.229495  - {KERNEL}: 9729798/tftp-deploy-68gj59p8/kernel/bzImage
  257 12:51:26.229554  - {LAVA_MAC}: None
  258 12:51:26.229612  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729798/extract-nfsrootfs-sgbollop
  259 12:51:26.229670  - {NFS_SERVER_IP}: 192.168.201.1
  260 12:51:26.229759  - {PRESEED_CONFIG}: None
  261 12:51:26.229831  - {PRESEED_LOCAL}: None
  262 12:51:26.229888  - {RAMDISK}: 9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz
  263 12:51:26.229945  - {ROOT_PART}: None
  264 12:51:26.230002  - {ROOT}: None
  265 12:51:26.230058  - {SERVER_IP}: 192.168.201.1
  266 12:51:26.230114  - {TEE}: None
  267 12:51:26.230171  Parsed boot commands:
  268 12:51:26.230226  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  269 12:51:26.230382  Parsed boot commands: tftpboot 192.168.201.1 9729798/tftp-deploy-68gj59p8/kernel/bzImage 9729798/tftp-deploy-68gj59p8/kernel/cmdline 9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz
  270 12:51:26.230476  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  271 12:51:26.230568  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  272 12:51:26.230666  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  273 12:51:26.230754  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  274 12:51:26.230823  Not connected, no need to disconnect.
  275 12:51:26.230901  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  276 12:51:26.230982  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  277 12:51:26.231050  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-4'
  278 12:51:26.233835  Setting prompt string to ['lava-test: # ']
  279 12:51:26.234130  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  280 12:51:26.234233  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  281 12:51:26.234333  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  282 12:51:26.234430  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  283 12:51:26.234605  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
  284 12:51:48.106872  >> Command sent successfully.

  285 12:51:48.116951  Returned 0 in 21 seconds
  286 12:51:48.218235  end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
  288 12:51:48.219883  end: 2.2.2 reset-device (duration 00:00:22) [common]
  289 12:51:48.220398  start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
  290 12:51:48.220849  Setting prompt string to 'Starting depthcharge on sarien...'
  291 12:51:48.221242  Changing prompt to 'Starting depthcharge on sarien...'
  292 12:51:48.221602  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  293 12:51:48.222863  [Enter `^Ec?' for help]

  294 12:51:48.223295  

  295 12:51:48.223636  

  296 12:51:48.223968  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  297 12:51:48.224296  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  298 12:51:48.224601  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  299 12:51:48.224900  CPU: AES supported, TXT supported, VT supported

  300 12:51:48.225236  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  301 12:51:48.225537  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  302 12:51:48.225890  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  303 12:51:48.226194  VBOOT: Loading verstage.

  304 12:51:48.226485  CBFS @ 1d00000 size 300000

  305 12:51:48.226779  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  306 12:51:48.227092  CBFS: Locating 'fallback/verstage'

  307 12:51:48.227398  CBFS: Found @ offset 10f6c0 size 1435c

  308 12:51:48.227690  

  309 12:51:48.227978  

  310 12:51:48.228264  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  311 12:51:48.228562  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  312 12:51:48.228854  done! DID_VID 0x00281ae0

  313 12:51:48.229148  TPM ready after 0 ms

  314 12:51:48.229469  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  315 12:51:48.229810  tlcl_send_startup: Startup return code is 0

  316 12:51:48.230109  TPM: setup succeeded

  317 12:51:48.230400  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  318 12:51:48.230701  Checking cr50 for recovery request

  319 12:51:48.231019  Phase 1

  320 12:51:48.231308  FMAP: Found "FLASH" version 1.1 at 1c10000.

  321 12:51:48.231600  FMAP: base = fe000000 size = 2000000 #areas = 37

  322 12:51:48.231890  FMAP: area GBB found @ 1c11000 (978944 bytes)

  323 12:51:48.232181  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  324 12:51:48.232468  Phase 2

  325 12:51:48.232805  Phase 3

  326 12:51:48.233107  FMAP: area GBB found @ 1c11000 (978944 bytes)

  327 12:51:48.233398  VB2:vb2_report_dev_firmware() This is developer signed firmware

  328 12:51:48.233689  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  329 12:51:48.234032  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  330 12:51:48.234324  VB2:vb2_verify_keyblock() Checking key block signature...

  331 12:51:48.234612  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  332 12:51:48.234942  FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)

  333 12:51:48.235235  VB2:vb2_verify_fw_preamble() Verifying preamble.

  334 12:51:48.235522  Phase 4

  335 12:51:48.235877  FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)

  336 12:51:48.236181  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  337 12:51:48.236471  VB2:vb2_rsa_verify_digest() Digest check failed!

  338 12:51:48.236823  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7

  339 12:51:48.237273  Saving nvdata

  340 12:51:48.237580  Reboot requested (10020007)

  341 12:51:48.237938  board_reset() called!

  342 12:51:48.238232  full_reset() called!

  343 12:51:50.062815  

  344 12:51:50.063185  

  345 12:51:50.071145  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...

  346 12:51:50.076317  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz

  347 12:51:50.080971  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7

  348 12:51:50.085668  CPU: AES supported, TXT supported, VT supported

  349 12:51:50.090889  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)

  350 12:51:50.096242  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium

  351 12:51:50.101221  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1

  352 12:51:50.104842  VBOOT: Loading verstage.

  353 12:51:50.107704  CBFS @ 1d00000 size 300000

  354 12:51:50.113954  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  355 12:51:50.117687  CBFS: Locating 'fallback/verstage'

  356 12:51:50.121353  CBFS: Found @ offset 10f6c0 size 1435c

  357 12:51:50.135816  

  358 12:51:50.135915  

  359 12:51:50.144239  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...

  360 12:51:50.151223  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)

  361 12:51:50.272504  .done! DID_VID 0x00281ae0

  362 12:51:50.274930  TPM ready after 0 ms

  363 12:51:50.278922  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  364 12:51:50.390955  tlcl_send_startup: Startup return code is 0

  365 12:51:50.393290  TPM: setup succeeded

  366 12:51:50.411350  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0

  367 12:51:50.415242  Checking cr50 for recovery request

  368 12:51:50.424843  Phase 1

  369 12:51:50.429795  FMAP: Found "FLASH" version 1.1 at 1c10000.

  370 12:51:50.434744  FMAP: base = fe000000 size = 2000000 #areas = 37

  371 12:51:50.439310  FMAP: area GBB found @ 1c11000 (978944 bytes)

  372 12:51:50.446477  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  373 12:51:50.452692  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  374 12:51:50.455667  Recovery requested (1009000e)

  375 12:51:50.457399  Saving nvdata

  376 12:51:50.473834  tlcl_extend: response is 0

  377 12:51:50.488739  tlcl_extend: response is 0

  378 12:51:50.493032  CBFS @ 1d00000 size 300000

  379 12:51:50.499421  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  380 12:51:50.502946  CBFS: Locating 'fallback/romstage'

  381 12:51:50.506138  CBFS: Found @ offset 80 size 15b2c

  382 12:51:50.507656  

  383 12:51:50.507744  

  384 12:51:50.516289  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...

  385 12:51:50.521338  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  386 12:51:50.525166  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  387 12:51:50.529664  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  388 12:51:50.533977  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  389 12:51:50.538136  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000

  390 12:51:50.540349  TCO_STS:   0000 0004

  391 12:51:50.543395  GEN_PMCON: d0015209 00002200

  392 12:51:50.546570  GBLRST_CAUSE: 00000000 00000000

  393 12:51:50.548280  prev_sleep_state 5

  394 12:51:50.551974  Boot Count incremented to 24632

  395 12:51:50.555037  CBFS @ 1d00000 size 300000

  396 12:51:50.561628  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  397 12:51:50.564202  CBFS: Locating 'fspm.bin'

  398 12:51:50.567785  CBFS: Found @ offset 60fc0 size 70000

  399 12:51:50.573587  FMAP: Found "FLASH" version 1.1 at 1c10000.

  400 12:51:50.578308  FMAP: base = fe000000 size = 2000000 #areas = 37

  401 12:51:50.584073  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

  402 12:51:50.590571  Probing TPM I2C: done! DID_VID 0x00281ae0

  403 12:51:50.592938  Locality already claimed

  404 12:51:50.596268  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)

  405 12:51:50.616189  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  406 12:51:50.622816  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  407 12:51:50.625462  MRC cache found, size 18e0

  408 12:51:50.627733  bootmode is set to :2

  409 12:51:50.719576  CBMEM:

  410 12:51:50.723481  IMD: root @ 89fff000 254 entries.

  411 12:51:50.726475  IMD: root @ 89ffec00 62 entries.

  412 12:51:50.729371  External stage cache:

  413 12:51:50.732734  IMD: root @ 8abff000 254 entries.

  414 12:51:50.736470  IMD: root @ 8abfec00 62 entries.

  415 12:51:50.742165  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...

  416 12:51:50.745707  creating vboot_handoff structure

  417 12:51:50.766328  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  418 12:51:50.781947  tlcl_write: response is 0

  419 12:51:50.801044  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0

  420 12:51:50.805480  MRC: TPM MRC hash updated successfully.

  421 12:51:50.806786  1 DIMMs found

  422 12:51:50.809337  top_of_ram = 0x8a000000

  423 12:51:50.814928  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)

  424 12:51:50.819264  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  425 12:51:50.822125  CBFS @ 1d00000 size 300000

  426 12:51:50.828320  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  427 12:51:50.831808  CBFS: Locating 'fallback/postcar'

  428 12:51:50.835497  CBFS: Found @ offset 107000 size 41a4

  429 12:51:50.841983  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)

  430 12:51:50.852235  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210

  431 12:51:50.857056  Processing 126 relocs. Offset value of 0x87cdd000

  432 12:51:50.860106  

  433 12:51:50.860211  

  434 12:51:50.868368  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...

  435 12:51:50.871589  CBFS @ 1d00000 size 300000

  436 12:51:50.878173  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  437 12:51:50.881598  CBFS: Locating 'fallback/ramstage'

  438 12:51:50.885290  CBFS: Found @ offset 458c0 size 1a8a8

  439 12:51:50.891530  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)

  440 12:51:50.920438  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0

  441 12:51:50.925759  Processing 3754 relocs. Offset value of 0x88e81000

  442 12:51:50.931994  

  443 12:51:50.932272  

  444 12:51:50.940429  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...

  445 12:51:50.945282  FMAP: Found "FLASH" version 1.1 at 1c10000.

  446 12:51:50.949865  FMAP: base = fe000000 size = 2000000 #areas = 37

  447 12:51:50.955134  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

  448 12:51:50.959332  WARNING: RO_VPD is uninitialized or empty.

  449 12:51:50.963714  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  450 12:51:50.968542  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

  451 12:51:50.969715  Normal boot.

  452 12:51:50.976688  BS: BS_PRE_DEVICE times (us): entry 0 run 52 exit 1163

  453 12:51:50.979413  CBFS @ 1d00000 size 300000

  454 12:51:50.985822  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  455 12:51:50.990019  CBFS: Locating 'cpu_microcode_blob.bin'

  456 12:51:50.993832  CBFS: Found @ offset 15c40 size 2fc00

  457 12:51:50.998074  microcode: sig=0x806ec pf=0x80 revision=0xb7

  458 12:51:50.999968  Skip microcode update

  459 12:51:51.003197  CBFS @ 1d00000 size 300000

  460 12:51:51.009448  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  461 12:51:51.011962  CBFS: Locating 'fsps.bin'

  462 12:51:51.015945  CBFS: Found @ offset d1fc0 size 35000

  463 12:51:51.050816  Detected 4 core, 8 thread CPU.

  464 12:51:51.052899  Setting up SMI for CPU

  465 12:51:51.054840  IED base = 0x8ac00000

  466 12:51:51.057442  IED size = 0x00400000

  467 12:51:51.060118  Will perform SMM setup.

  468 12:51:51.064878  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.

  469 12:51:51.072674  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  470 12:51:51.077406  Processing 16 relocs. Offset value of 0x00030000

  471 12:51:51.080852  Attempting to start 7 APs

  472 12:51:51.084322  Waiting for 10ms after sending INIT.

  473 12:51:51.100353  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  474 12:51:51.100441  done.

  475 12:51:51.103249  AP: slot 6 apic_id 4.

  476 12:51:51.104905  AP: slot 7 apic_id 5.

  477 12:51:51.107525  AP: slot 1 apic_id 3.

  478 12:51:51.109315  AP: slot 4 apic_id 2.

  479 12:51:51.112087  AP: slot 5 apic_id 6.

  480 12:51:51.114253  AP: slot 2 apic_id 7.

  481 12:51:51.118094  Waiting for 2nd SIPI to complete...done.

  482 12:51:51.126202  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  483 12:51:51.130641  Processing 13 relocs. Offset value of 0x00038000

  484 12:51:51.137439  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)

  485 12:51:51.141116  Installing SMM handler to 0x8a000000

  486 12:51:51.148782  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40

  487 12:51:51.154448  Processing 867 relocs. Offset value of 0x8a010000

  488 12:51:51.162708  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8

  489 12:51:51.167488  Processing 13 relocs. Offset value of 0x8a008000

  490 12:51:51.173474  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd

  491 12:51:51.179281  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd

  492 12:51:51.184633  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd

  493 12:51:51.190525  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd

  494 12:51:51.196107  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd

  495 12:51:51.201630  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd

  496 12:51:51.207712  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd

  497 12:51:51.213939  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)

  498 12:51:51.217730  Clearing SMI status registers

  499 12:51:51.219056  SMI_STS: PM1 

  500 12:51:51.221210  PM1_STS: WAK PWRBTN 

  501 12:51:51.223836  TCO_STS: BOOT SECOND_TO 

  502 12:51:51.225898  GPE0 STD STS: eSPI 

  503 12:51:51.228384  New SMBASE 0x8a000000

  504 12:51:51.231351  In relocation handler: CPU 0

  505 12:51:51.234745  New SMBASE=0x8a000000 IEDBASE=0x8ac00000

  506 12:51:51.240071  Writing SMRR. base = 0x8a000006, mask=0xff000800

  507 12:51:51.241911  Relocation complete.

  508 12:51:51.244551  New SMBASE 0x89fff400

  509 12:51:51.247353  In relocation handler: CPU 3

  510 12:51:51.251162  New SMBASE=0x89fff400 IEDBASE=0x8ac00000

  511 12:51:51.256443  Writing SMRR. base = 0x8a000006, mask=0xff000800

  512 12:51:51.258464  Relocation complete.

  513 12:51:51.260847  New SMBASE 0x89fff000

  514 12:51:51.263601  In relocation handler: CPU 4

  515 12:51:51.267704  New SMBASE=0x89fff000 IEDBASE=0x8ac00000

  516 12:51:51.272290  Writing SMRR. base = 0x8a000006, mask=0xff000800

  517 12:51:51.274872  Relocation complete.

  518 12:51:51.276891  New SMBASE 0x89ffe800

  519 12:51:51.280081  In relocation handler: CPU 6

  520 12:51:51.283908  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000

  521 12:51:51.288676  Writing SMRR. base = 0x8a000006, mask=0xff000800

  522 12:51:51.291184  Relocation complete.

  523 12:51:51.293386  New SMBASE 0x89fffc00

  524 12:51:51.295933  In relocation handler: CPU 1

  525 12:51:51.300312  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000

  526 12:51:51.305012  Writing SMRR. base = 0x8a000006, mask=0xff000800

  527 12:51:51.307167  Relocation complete.

  528 12:51:51.309581  New SMBASE 0x89fff800

  529 12:51:51.312919  In relocation handler: CPU 2

  530 12:51:51.316604  New SMBASE=0x89fff800 IEDBASE=0x8ac00000

  531 12:51:51.321782  Writing SMRR. base = 0x8a000006, mask=0xff000800

  532 12:51:51.323921  Relocation complete.

  533 12:51:51.325742  New SMBASE 0x89ffe400

  534 12:51:51.328751  In relocation handler: CPU 7

  535 12:51:51.333182  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000

  536 12:51:51.337700  Writing SMRR. base = 0x8a000006, mask=0xff000800

  537 12:51:51.340233  Relocation complete.

  538 12:51:51.342366  New SMBASE 0x89ffec00

  539 12:51:51.345272  In relocation handler: CPU 5

  540 12:51:51.349176  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000

  541 12:51:51.354081  Writing SMRR. base = 0x8a000006, mask=0xff000800

  542 12:51:51.356470  Relocation complete.

  543 12:51:51.358459  Initializing CPU #0

  544 12:51:51.361832  CPU: vendor Intel device 806ec

  545 12:51:51.365606  CPU: family 06, model 8e, stepping 0c

  546 12:51:51.367877  Clearing out pending MCEs

  547 12:51:51.372615  Setting up local APIC... apic_id: 0x00 done.

  548 12:51:51.375479  Turbo is available but hidden

  549 12:51:51.377709  Turbo has been enabled

  550 12:51:51.380069  VMX status: enabled

  551 12:51:51.383663  IA32_FEATURE_CONTROL status: locked

  552 12:51:51.385772  Skip microcode update

  553 12:51:51.387891  CPU #0 initialized

  554 12:51:51.390067  Initializing CPU #3

  555 12:51:51.392004  Initializing CPU #2

  556 12:51:51.393796  Initializing CPU #5

  557 12:51:51.397036  CPU: vendor Intel device 806ec

  558 12:51:51.400841  CPU: family 06, model 8e, stepping 0c

  559 12:51:51.404137  CPU: vendor Intel device 806ec

  560 12:51:51.408046  CPU: family 06, model 8e, stepping 0c

  561 12:51:51.410403  Clearing out pending MCEs

  562 12:51:51.412933  Clearing out pending MCEs

  563 12:51:51.417200  Setting up local APIC...Initializing CPU #1

  564 12:51:51.419854  Initializing CPU #4

  565 12:51:51.422800  CPU: vendor Intel device 806ec

  566 12:51:51.426615  CPU: family 06, model 8e, stepping 0c

  567 12:51:51.429363  CPU: vendor Intel device 806ec

  568 12:51:51.433177  CPU: family 06, model 8e, stepping 0c

  569 12:51:51.435940  Clearing out pending MCEs

  570 12:51:51.438513  Clearing out pending MCEs

  571 12:51:51.442565  Setting up local APIC...Initializing CPU #7

  572 12:51:51.444737  Initializing CPU #6

  573 12:51:51.447687  CPU: vendor Intel device 806ec

  574 12:51:51.451564  CPU: family 06, model 8e, stepping 0c

  575 12:51:51.455125  CPU: vendor Intel device 806ec

  576 12:51:51.458667  CPU: family 06, model 8e, stepping 0c

  577 12:51:51.461558  Clearing out pending MCEs

  578 12:51:51.464101  Clearing out pending MCEs

  579 12:51:51.468329  Setting up local APIC... apic_id: 0x02 done.

  580 12:51:51.473959  Setting up local APIC...CPU: vendor Intel device 806ec

  581 12:51:51.477768  CPU: family 06, model 8e, stepping 0c

  582 12:51:51.480107   apic_id: 0x03 done.

  583 12:51:51.481977  VMX status: enabled

  584 12:51:51.484098  VMX status: enabled

  585 12:51:51.487801  IA32_FEATURE_CONTROL status: locked

  586 12:51:51.491247  IA32_FEATURE_CONTROL status: locked

  587 12:51:51.493288  Skip microcode update

  588 12:51:51.495543  Skip microcode update

  589 12:51:51.497454  CPU #4 initialized

  590 12:51:51.499593  CPU #1 initialized

  591 12:51:51.506712  Setting up local APIC...Setting up local APIC...Clearing out pending MCEs

  592 12:51:51.508873   apic_id: 0x06 done.

  593 12:51:51.511070   apic_id: 0x07 done.

  594 12:51:51.513451  VMX status: enabled

  595 12:51:51.514791  VMX status: enabled

  596 12:51:51.518802  IA32_FEATURE_CONTROL status: locked

  597 12:51:51.522438  IA32_FEATURE_CONTROL status: locked

  598 12:51:51.524340  Skip microcode update

  599 12:51:51.526788  Skip microcode update

  600 12:51:51.528739  CPU #5 initialized

  601 12:51:51.530797  CPU #2 initialized

  602 12:51:51.533104   apic_id: 0x04 done.

  603 12:51:51.535149   apic_id: 0x05 done.

  604 12:51:51.537276  VMX status: enabled

  605 12:51:51.539482  VMX status: enabled

  606 12:51:51.542906  IA32_FEATURE_CONTROL status: locked

  607 12:51:51.546517  IA32_FEATURE_CONTROL status: locked

  608 12:51:51.548573  Skip microcode update

  609 12:51:51.550282  Skip microcode update

  610 12:51:51.552895  CPU #6 initialized

  611 12:51:51.554590  CPU #7 initialized

  612 12:51:51.559254  Setting up local APIC... apic_id: 0x01 done.

  613 12:51:51.561077  VMX status: enabled

  614 12:51:51.565242  IA32_FEATURE_CONTROL status: locked

  615 12:51:51.566941  Skip microcode update

  616 12:51:51.568872  CPU #3 initialized

  617 12:51:51.573276  bsp_do_flight_plan done after 450 msecs.

  618 12:51:51.576463  CPU: frequency set to 4800 MHz

  619 12:51:51.578099  Enabling SMIs.

  620 12:51:51.579235  Locking SMM.

  621 12:51:51.582673  CBFS @ 1d00000 size 300000

  622 12:51:51.588666  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

  623 12:51:51.591008  CBFS: Locating 'vbt.bin'

  624 12:51:51.595296  CBFS: Found @ offset 60a40 size 4a0

  625 12:51:51.599935  Found a VBT of 4608 bytes after decompression

  626 12:51:51.612953  FMAP: area GBB found @ 1c11000 (978944 bytes)

  627 12:51:51.673340  Detected 4 core, 8 thread CPU.

  628 12:51:51.676351  Detected 4 core, 8 thread CPU.

  629 12:51:51.903280  Display FSP Version Info HOB

  630 12:51:51.906881  Reference Code - CPU = 7.0.5e.40

  631 12:51:51.909266  uCode Version = 0.0.0.b8

  632 12:51:51.912159  Display FSP Version Info HOB

  633 12:51:51.915417  Reference Code - ME = 7.0.5e.40

  634 12:51:51.917632  MEBx version = 0.0.0.0

  635 12:51:51.920887  ME Firmware Version = Consumer SKU

  636 12:51:51.923845  Display FSP Version Info HOB

  637 12:51:51.927865  Reference Code - CNL PCH = 7.0.5e.40

  638 12:51:51.929915  PCH-CRID Status = Disabled

  639 12:51:51.934086  CNL PCH H A0 Hsio Version = 2.0.0.0

  640 12:51:51.937476  CNL PCH H Ax Hsio Version = 9.0.0.0

  641 12:51:51.941267  CNL PCH H Bx Hsio Version = a.0.0.0

  642 12:51:51.944968  CNL PCH LP B0 Hsio Version = 7.0.0.0

  643 12:51:51.948478  CNL PCH LP Bx Hsio Version = 6.0.0.0

  644 12:51:51.951720  CNL PCH LP Dx Hsio Version = 7.0.0.0

  645 12:51:51.954488  Display FSP Version Info HOB

  646 12:51:51.959233  Reference Code - SA - System Agent = 7.0.5e.40

  647 12:51:51.963060  Reference Code - MRC = 0.7.1.68

  648 12:51:51.965534  SA - PCIe Version = 7.0.5e.40

  649 12:51:51.968349  SA-CRID Status = Disabled

  650 12:51:51.971501  SA-CRID Original Value = 0.0.0.c

  651 12:51:51.974540  SA-CRID New Value = 0.0.0.c

  652 12:51:51.992906  RTC Init

  653 12:51:51.997156  Set power off after power failure.

  654 12:51:51.998829  Disabling Deep S3

  655 12:51:52.000458  Disabling Deep S3

  656 12:51:52.002303  Disabling Deep S4

  657 12:51:52.004508  Disabling Deep S4

  658 12:51:52.006041  Disabling Deep S5

  659 12:51:52.008134  Disabling Deep S5

  660 12:51:52.014439  BS: BS_DEV_INIT_CHIPS times (us): entry 602597 run 412543 exit 16238

  661 12:51:52.017348  Enumerating buses...

  662 12:51:52.021833  Show all devs... Before device enumeration.

  663 12:51:52.023754  Root Device: enabled 1

  664 12:51:52.026214  CPU_CLUSTER: 0: enabled 1

  665 12:51:52.028728  DOMAIN: 0000: enabled 1

  666 12:51:52.030701  APIC: 00: enabled 1

  667 12:51:52.032979  PCI: 00:00.0: enabled 1

  668 12:51:52.035338  PCI: 00:02.0: enabled 1

  669 12:51:52.038109  PCI: 00:04.0: enabled 1

  670 12:51:52.040804  PCI: 00:12.0: enabled 1

  671 12:51:52.043215  PCI: 00:12.5: enabled 0

  672 12:51:52.045416  PCI: 00:12.6: enabled 0

  673 12:51:52.047964  PCI: 00:13.0: enabled 0

  674 12:51:52.050455  PCI: 00:14.0: enabled 1

  675 12:51:52.052765  PCI: 00:14.1: enabled 0

  676 12:51:52.054874  PCI: 00:14.3: enabled 1

  677 12:51:52.057327  PCI: 00:14.5: enabled 0

  678 12:51:52.060185  PCI: 00:15.0: enabled 1

  679 12:51:52.062195  PCI: 00:15.1: enabled 1

  680 12:51:52.064922  PCI: 00:15.2: enabled 0

  681 12:51:52.067385  PCI: 00:15.3: enabled 0

  682 12:51:52.069771  PCI: 00:16.0: enabled 1

  683 12:51:52.072106  PCI: 00:16.1: enabled 0

  684 12:51:52.074934  PCI: 00:16.2: enabled 0

  685 12:51:52.076679  PCI: 00:16.3: enabled 0

  686 12:51:52.079531  PCI: 00:16.4: enabled 0

  687 12:51:52.081862  PCI: 00:16.5: enabled 0

  688 12:51:52.084672  PCI: 00:17.0: enabled 1

  689 12:51:52.086790  PCI: 00:19.0: enabled 1

  690 12:51:52.089061  PCI: 00:19.1: enabled 0

  691 12:51:52.091547  PCI: 00:19.2: enabled 1

  692 12:51:52.094085  PCI: 00:1a.0: enabled 0

  693 12:51:52.096623  PCI: 00:1c.0: enabled 1

  694 12:51:52.099019  PCI: 00:1c.1: enabled 0

  695 12:51:52.101597  PCI: 00:1c.2: enabled 0

  696 12:51:52.103647  PCI: 00:1c.3: enabled 0

  697 12:51:52.106193  PCI: 00:1c.4: enabled 0

  698 12:51:52.108430  PCI: 00:1c.5: enabled 0

  699 12:51:52.111099  PCI: 00:1c.6: enabled 0

  700 12:51:52.113409  PCI: 00:1c.7: enabled 1

  701 12:51:52.116033  PCI: 00:1d.0: enabled 1

  702 12:51:52.118502  PCI: 00:1d.1: enabled 1

  703 12:51:52.120679  PCI: 00:1d.2: enabled 0

  704 12:51:52.123224  PCI: 00:1d.3: enabled 0

  705 12:51:52.125484  PCI: 00:1d.4: enabled 1

  706 12:51:52.128134  PCI: 00:1e.0: enabled 0

  707 12:51:52.130523  PCI: 00:1e.1: enabled 0

  708 12:51:52.133032  PCI: 00:1e.2: enabled 0

  709 12:51:52.135413  PCI: 00:1e.3: enabled 0

  710 12:51:52.137914  PCI: 00:1f.0: enabled 1

  711 12:51:52.140094  PCI: 00:1f.1: enabled 1

  712 12:51:52.142591  PCI: 00:1f.2: enabled 1

  713 12:51:52.145216  PCI: 00:1f.3: enabled 1

  714 12:51:52.147668  PCI: 00:1f.4: enabled 1

  715 12:51:52.149934  PCI: 00:1f.5: enabled 1

  716 12:51:52.152371  PCI: 00:1f.6: enabled 1

  717 12:51:52.154906  USB0 port 0: enabled 1

  718 12:51:52.156664  I2C: 00:10: enabled 1

  719 12:51:52.159010  I2C: 00:10: enabled 1

  720 12:51:52.161496  I2C: 00:34: enabled 1

  721 12:51:52.163367  I2C: 00:2c: enabled 1

  722 12:51:52.165777  I2C: 00:50: enabled 1

  723 12:51:52.168260  PNP: 0c09.0: enabled 1

  724 12:51:52.170397  USB2 port 0: enabled 1

  725 12:51:52.172930  USB2 port 1: enabled 1

  726 12:51:52.175336  USB2 port 2: enabled 1

  727 12:51:52.177494  USB2 port 4: enabled 1

  728 12:51:52.180006  USB2 port 5: enabled 1

  729 12:51:52.181991  USB2 port 6: enabled 1

  730 12:51:52.184775  USB2 port 7: enabled 1

  731 12:51:52.186885  USB2 port 8: enabled 1

  732 12:51:52.189404  USB2 port 9: enabled 1

  733 12:51:52.191433  USB3 port 0: enabled 1

  734 12:51:52.193902  USB3 port 1: enabled 1

  735 12:51:52.196335  USB3 port 2: enabled 1

  736 12:51:52.199000  USB3 port 3: enabled 1

  737 12:51:52.201050  USB3 port 4: enabled 1

  738 12:51:52.203195  APIC: 03: enabled 1

  739 12:51:52.205222  APIC: 07: enabled 1

  740 12:51:52.207266  APIC: 01: enabled 1

  741 12:51:52.208931  APIC: 02: enabled 1

  742 12:51:52.211195  APIC: 06: enabled 1

  743 12:51:52.213211  APIC: 04: enabled 1

  744 12:51:52.215515  APIC: 05: enabled 1

  745 12:51:52.217525  Compare with tree...

  746 12:51:52.220006  Root Device: enabled 1

  747 12:51:52.222538   CPU_CLUSTER: 0: enabled 1

  748 12:51:52.224691    APIC: 00: enabled 1

  749 12:51:52.226873    APIC: 03: enabled 1

  750 12:51:52.229181    APIC: 07: enabled 1

  751 12:51:52.231422    APIC: 01: enabled 1

  752 12:51:52.233960    APIC: 02: enabled 1

  753 12:51:52.235694    APIC: 06: enabled 1

  754 12:51:52.238315    APIC: 04: enabled 1

  755 12:51:52.240277    APIC: 05: enabled 1

  756 12:51:52.243182   DOMAIN: 0000: enabled 1

  757 12:51:52.245589    PCI: 00:00.0: enabled 1

  758 12:51:52.248380    PCI: 00:02.0: enabled 1

  759 12:51:52.250534    PCI: 00:04.0: enabled 1

  760 12:51:52.253506    PCI: 00:12.0: enabled 1

  761 12:51:52.255918    PCI: 00:12.5: enabled 0

  762 12:51:52.258765    PCI: 00:12.6: enabled 0

  763 12:51:52.261406    PCI: 00:13.0: enabled 0

  764 12:51:52.263933    PCI: 00:14.0: enabled 1

  765 12:51:52.266445     USB0 port 0: enabled 1

  766 12:51:52.269042      USB2 port 0: enabled 1

  767 12:51:52.272073      USB2 port 1: enabled 1

  768 12:51:52.274599      USB2 port 2: enabled 1

  769 12:51:52.277501      USB2 port 4: enabled 1

  770 12:51:52.280102      USB2 port 5: enabled 1

  771 12:51:52.283029      USB2 port 6: enabled 1

  772 12:51:52.285514      USB2 port 7: enabled 1

  773 12:51:52.288540      USB2 port 8: enabled 1

  774 12:51:52.291081      USB2 port 9: enabled 1

  775 12:51:52.294083      USB3 port 0: enabled 1

  776 12:51:52.296535      USB3 port 1: enabled 1

  777 12:51:52.299546      USB3 port 2: enabled 1

  778 12:51:52.302086      USB3 port 3: enabled 1

  779 12:51:52.304690      USB3 port 4: enabled 1

  780 12:51:52.307213    PCI: 00:14.1: enabled 0

  781 12:51:52.309927    PCI: 00:14.3: enabled 1

  782 12:51:52.312897    PCI: 00:14.5: enabled 0

  783 12:51:52.315365    PCI: 00:15.0: enabled 1

  784 12:51:52.317478     I2C: 00:10: enabled 1

  785 12:51:52.319793     I2C: 00:10: enabled 1

  786 12:51:52.322823     I2C: 00:34: enabled 1

  787 12:51:52.325375    PCI: 00:15.1: enabled 1

  788 12:51:52.327892     I2C: 00:2c: enabled 1

  789 12:51:52.330444    PCI: 00:15.2: enabled 0

  790 12:51:52.333322    PCI: 00:15.3: enabled 0

  791 12:51:52.335967    PCI: 00:16.0: enabled 1

  792 12:51:52.338495    PCI: 00:16.1: enabled 0

  793 12:51:52.341181    PCI: 00:16.2: enabled 0

  794 12:51:52.343774    PCI: 00:16.3: enabled 0

  795 12:51:52.346389    PCI: 00:16.4: enabled 0

  796 12:51:52.348768    PCI: 00:16.5: enabled 0

  797 12:51:52.351390    PCI: 00:17.0: enabled 1

  798 12:51:52.354219    PCI: 00:19.0: enabled 1

  799 12:51:52.356608     I2C: 00:50: enabled 1

  800 12:51:52.359470    PCI: 00:19.1: enabled 0

  801 12:51:52.361949    PCI: 00:19.2: enabled 1

  802 12:51:52.364638    PCI: 00:1a.0: enabled 0

  803 12:51:52.367062    PCI: 00:1c.0: enabled 1

  804 12:51:52.369693    PCI: 00:1c.1: enabled 0

  805 12:51:52.372507    PCI: 00:1c.2: enabled 0

  806 12:51:52.374917    PCI: 00:1c.3: enabled 0

  807 12:51:52.377988    PCI: 00:1c.4: enabled 0

  808 12:51:52.380475    PCI: 00:1c.5: enabled 0

  809 12:51:52.383088    PCI: 00:1c.6: enabled 0

  810 12:51:52.385643    PCI: 00:1c.7: enabled 1

  811 12:51:52.388140    PCI: 00:1d.0: enabled 1

  812 12:51:52.391119    PCI: 00:1d.1: enabled 1

  813 12:51:52.393445    PCI: 00:1d.2: enabled 0

  814 12:51:52.396334    PCI: 00:1d.3: enabled 0

  815 12:51:52.398907    PCI: 00:1d.4: enabled 1

  816 12:51:52.401125    PCI: 00:1e.0: enabled 0

  817 12:51:52.403770    PCI: 00:1e.1: enabled 0

  818 12:51:52.406679    PCI: 00:1e.2: enabled 0

  819 12:51:52.408756    PCI: 00:1e.3: enabled 0

  820 12:51:52.411716    PCI: 00:1f.0: enabled 1

  821 12:51:52.414680     PNP: 0c09.0: enabled 1

  822 12:51:52.417239    PCI: 00:1f.1: enabled 1

  823 12:51:52.419618    PCI: 00:1f.2: enabled 1

  824 12:51:52.422431    PCI: 00:1f.3: enabled 1

  825 12:51:52.425069    PCI: 00:1f.4: enabled 1

  826 12:51:52.427341    PCI: 00:1f.5: enabled 1

  827 12:51:52.429891    PCI: 00:1f.6: enabled 1

  828 12:51:52.432698  Root Device scanning...

  829 12:51:52.436557  root_dev_scan_bus for Root Device

  830 12:51:52.438739  CPU_CLUSTER: 0 enabled

  831 12:51:52.440671  DOMAIN: 0000 enabled

  832 12:51:52.443123  DOMAIN: 0000 scanning...

  833 12:51:52.446647  PCI: pci_scan_bus for bus 00

  834 12:51:52.449308  PCI: 00:00.0 [8086/0000] ops

  835 12:51:52.452711  PCI: 00:00.0 [8086/3e34] enabled

  836 12:51:52.456053  PCI: 00:02.0 [8086/0000] ops

  837 12:51:52.459323  PCI: 00:02.0 [8086/3ea0] enabled

  838 12:51:52.462313  PCI: 00:04.0 [8086/1903] enabled

  839 12:51:52.465568  PCI: 00:08.0 [8086/1911] enabled

  840 12:51:52.469376  PCI: 00:12.0 [8086/9df9] enabled

  841 12:51:52.472554  PCI: 00:14.0 [8086/0000] bus ops

  842 12:51:52.475848  PCI: 00:14.0 [8086/9ded] enabled

  843 12:51:52.479210  PCI: 00:14.2 [8086/9def] enabled

  844 12:51:52.482334  PCI: 00:14.3 [8086/9df0] enabled

  845 12:51:52.485685  PCI: 00:15.0 [8086/0000] bus ops

  846 12:51:52.488723  PCI: 00:15.0 [8086/9de8] enabled

  847 12:51:52.492259  PCI: 00:15.1 [8086/0000] bus ops

  848 12:51:52.495683  PCI: 00:15.1 [8086/9de9] enabled

  849 12:51:52.498366  PCI: 00:16.0 [8086/0000] ops

  850 12:51:52.501513  PCI: 00:16.0 [8086/9de0] enabled

  851 12:51:52.504802  PCI: 00:17.0 [8086/0000] ops

  852 12:51:52.508223  PCI: 00:17.0 [8086/9dd3] enabled

  853 12:51:52.511321  PCI: 00:19.0 [8086/0000] bus ops

  854 12:51:52.514496  PCI: 00:19.0 [8086/9dc5] enabled

  855 12:51:52.517677  PCI: 00:19.2 [8086/0000] ops

  856 12:51:52.521036  PCI: 00:19.2 [8086/9dc7] enabled

  857 12:51:52.524334  PCI: 00:1c.0 [8086/0000] bus ops

  858 12:51:52.527693  PCI: 00:1c.0 [8086/9dbf] enabled

  859 12:51:52.533518  PCI: Static device PCI: 00:1c.7 not found, disabling it.

  860 12:51:52.536493  PCI: 00:1d.0 [8086/0000] bus ops

  861 12:51:52.540028  PCI: 00:1d.0 [8086/9db4] enabled

  862 12:51:52.545805  PCI: Static device PCI: 00:1d.1 not found, disabling it.

  863 12:51:52.551206  PCI: Static device PCI: 00:1d.4 not found, disabling it.

  864 12:51:52.554470  PCI: 00:1f.0 [8086/0000] bus ops

  865 12:51:52.557773  PCI: 00:1f.0 [8086/9d84] enabled

  866 12:51:52.563923  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  867 12:51:52.569587  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  868 12:51:52.572366  PCI: 00:1f.3 [8086/0000] bus ops

  869 12:51:52.575833  PCI: 00:1f.3 [8086/9dc8] enabled

  870 12:51:52.579414  PCI: 00:1f.4 [8086/0000] bus ops

  871 12:51:52.582499  PCI: 00:1f.4 [8086/9da3] enabled

  872 12:51:52.585616  PCI: 00:1f.5 [8086/0000] bus ops

  873 12:51:52.589140  PCI: 00:1f.5 [8086/9da4] enabled

  874 12:51:52.592341  PCI: 00:1f.6 [8086/15be] enabled

  875 12:51:52.595729  PCI: Leftover static devices:

  876 12:51:52.596695  PCI: 00:12.5

  877 12:51:52.598476  PCI: 00:12.6

  878 12:51:52.599289  PCI: 00:13.0

  879 12:51:52.600939  PCI: 00:14.1

  880 12:51:52.602530  PCI: 00:14.5

  881 12:51:52.603750  PCI: 00:15.2

  882 12:51:52.604695  PCI: 00:15.3

  883 12:51:52.606332  PCI: 00:16.1

  884 12:51:52.607382  PCI: 00:16.2

  885 12:51:52.608985  PCI: 00:16.3

  886 12:51:52.610182  PCI: 00:16.4

  887 12:51:52.611870  PCI: 00:16.5

  888 12:51:52.612793  PCI: 00:19.1

  889 12:51:52.614827  PCI: 00:1a.0

  890 12:51:52.615845  PCI: 00:1c.1

  891 12:51:52.617325  PCI: 00:1c.2

  892 12:51:52.618647  PCI: 00:1c.3

  893 12:51:52.620215  PCI: 00:1c.4

  894 12:51:52.621513  PCI: 00:1c.5

  895 12:51:52.622826  PCI: 00:1c.6

  896 12:51:52.624099  PCI: 00:1c.7

  897 12:51:52.625418  PCI: 00:1d.1

  898 12:51:52.627218  PCI: 00:1d.2

  899 12:51:52.628065  PCI: 00:1d.3

  900 12:51:52.629841  PCI: 00:1d.4

  901 12:51:52.630698  PCI: 00:1e.0

  902 12:51:52.632134  PCI: 00:1e.1

  903 12:51:52.633645  PCI: 00:1e.2

  904 12:51:52.635091  PCI: 00:1e.3

  905 12:51:52.636394  PCI: 00:1f.1

  906 12:51:52.637646  PCI: 00:1f.2

  907 12:51:52.640715  PCI: Check your devicetree.cb.

  908 12:51:52.643744  PCI: 00:14.0 scanning...

  909 12:51:52.646444  scan_usb_bus for PCI: 00:14.0

  910 12:51:52.648878  USB0 port 0 enabled

  911 12:51:52.651019  USB0 port 0 scanning...

  912 12:51:52.654120  scan_usb_bus for USB0 port 0

  913 12:51:52.656504  USB2 port 0 enabled

  914 12:51:52.658655  USB2 port 1 enabled

  915 12:51:52.660617  USB2 port 2 enabled

  916 12:51:52.662875  USB2 port 4 enabled

  917 12:51:52.664588  USB2 port 5 enabled

  918 12:51:52.666362  USB2 port 6 enabled

  919 12:51:52.668859  USB2 port 7 enabled

  920 12:51:52.670966  USB2 port 8 enabled

  921 12:51:52.673025  USB2 port 9 enabled

  922 12:51:52.674886  USB3 port 0 enabled

  923 12:51:52.676747  USB3 port 1 enabled

  924 12:51:52.678756  USB3 port 2 enabled

  925 12:51:52.680694  USB3 port 3 enabled

  926 12:51:52.683290  USB3 port 4 enabled

  927 12:51:52.685354  USB2 port 0 scanning...

  928 12:51:52.688898  scan_usb_bus for USB2 port 0

  929 12:51:52.691848  scan_usb_bus for USB2 port 0 done

  930 12:51:52.697161  scan_bus: scanning of bus USB2 port 0 took 9064 usecs

  931 12:51:52.700001  USB2 port 1 scanning...

  932 12:51:52.703229  scan_usb_bus for USB2 port 1

  933 12:51:52.706498  scan_usb_bus for USB2 port 1 done

  934 12:51:52.711773  scan_bus: scanning of bus USB2 port 1 took 9064 usecs

  935 12:51:52.714219  USB2 port 2 scanning...

  936 12:51:52.717593  scan_usb_bus for USB2 port 2

  937 12:51:52.720720  scan_usb_bus for USB2 port 2 done

  938 12:51:52.726198  scan_bus: scanning of bus USB2 port 2 took 9063 usecs

  939 12:51:52.728980  USB2 port 4 scanning...

  940 12:51:52.731644  scan_usb_bus for USB2 port 4

  941 12:51:52.735470  scan_usb_bus for USB2 port 4 done

  942 12:51:52.740743  scan_bus: scanning of bus USB2 port 4 took 9063 usecs

  943 12:51:52.743185  USB2 port 5 scanning...

  944 12:51:52.746312  scan_usb_bus for USB2 port 5

  945 12:51:52.749876  scan_usb_bus for USB2 port 5 done

  946 12:51:52.755351  scan_bus: scanning of bus USB2 port 5 took 9063 usecs

  947 12:51:52.757496  USB2 port 6 scanning...

  948 12:51:52.760985  scan_usb_bus for USB2 port 6

  949 12:51:52.764339  scan_usb_bus for USB2 port 6 done

  950 12:51:52.769350  scan_bus: scanning of bus USB2 port 6 took 9062 usecs

  951 12:51:52.771791  USB2 port 7 scanning...

  952 12:51:52.775329  scan_usb_bus for USB2 port 7

  953 12:51:52.778365  scan_usb_bus for USB2 port 7 done

  954 12:51:52.783736  scan_bus: scanning of bus USB2 port 7 took 9062 usecs

  955 12:51:52.786501  USB2 port 8 scanning...

  956 12:51:52.789658  scan_usb_bus for USB2 port 8

  957 12:51:52.793327  scan_usb_bus for USB2 port 8 done

  958 12:51:52.798461  scan_bus: scanning of bus USB2 port 8 took 9062 usecs

  959 12:51:52.800894  USB2 port 9 scanning...

  960 12:51:52.804147  scan_usb_bus for USB2 port 9

  961 12:51:52.807641  scan_usb_bus for USB2 port 9 done

  962 12:51:52.812803  scan_bus: scanning of bus USB2 port 9 took 9063 usecs

  963 12:51:52.814748  USB3 port 0 scanning...

  964 12:51:52.818284  scan_usb_bus for USB3 port 0

  965 12:51:52.821925  scan_usb_bus for USB3 port 0 done

  966 12:51:52.827035  scan_bus: scanning of bus USB3 port 0 took 9062 usecs

  967 12:51:52.829470  USB3 port 1 scanning...

  968 12:51:52.832957  scan_usb_bus for USB3 port 1

  969 12:51:52.835908  scan_usb_bus for USB3 port 1 done

  970 12:51:52.841550  scan_bus: scanning of bus USB3 port 1 took 9062 usecs

  971 12:51:52.843814  USB3 port 2 scanning...

  972 12:51:52.847056  scan_usb_bus for USB3 port 2

  973 12:51:52.850835  scan_usb_bus for USB3 port 2 done

  974 12:51:52.855791  scan_bus: scanning of bus USB3 port 2 took 9062 usecs

  975 12:51:52.858390  USB3 port 3 scanning...

  976 12:51:52.861657  scan_usb_bus for USB3 port 3

  977 12:51:52.865125  scan_usb_bus for USB3 port 3 done

  978 12:51:52.870046  scan_bus: scanning of bus USB3 port 3 took 9063 usecs

  979 12:51:52.872552  USB3 port 4 scanning...

  980 12:51:52.876115  scan_usb_bus for USB3 port 4

  981 12:51:52.879699  scan_usb_bus for USB3 port 4 done

  982 12:51:52.885022  scan_bus: scanning of bus USB3 port 4 took 9063 usecs

  983 12:51:52.888215  scan_usb_bus for USB0 port 0 done

  984 12:51:52.893898  scan_bus: scanning of bus USB0 port 0 took 239366 usecs

  985 12:51:52.896981  scan_usb_bus for PCI: 00:14.0 done

  986 12:51:52.903203  scan_bus: scanning of bus PCI: 00:14.0 took 256302 usecs

  987 12:51:52.905674  PCI: 00:15.0 scanning...

  988 12:51:52.909248  scan_generic_bus for PCI: 00:15.0

  989 12:51:52.913451  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  990 12:51:52.917212  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled

  991 12:51:52.921159  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled

  992 12:51:52.925310  scan_generic_bus for PCI: 00:15.0 done

  993 12:51:52.930997  scan_bus: scanning of bus PCI: 00:15.0 took 22387 usecs

  994 12:51:52.933253  PCI: 00:15.1 scanning...

  995 12:51:52.936678  scan_generic_bus for PCI: 00:15.1

  996 12:51:52.941606  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled

  997 12:51:52.945312  scan_generic_bus for PCI: 00:15.1 done

  998 12:51:52.950451  scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs

  999 12:51:52.952947  PCI: 00:19.0 scanning...

 1000 12:51:52.956727  scan_generic_bus for PCI: 00:19.0

 1001 12:51:52.960995  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled

 1002 12:51:52.964826  scan_generic_bus for PCI: 00:19.0 done

 1003 12:51:52.970347  scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs

 1004 12:51:52.972885  PCI: 00:1c.0 scanning...

 1005 12:51:52.976675  do_pci_scan_bridge for PCI: 00:1c.0

 1006 12:51:52.979233  PCI: pci_scan_bus for bus 01

 1007 12:51:52.982868  PCI: 01:00.0 [10ec/525a] enabled

 1008 12:51:52.986042  Capability: type 0x01 @ 0x80

 1009 12:51:52.989145  Capability: type 0x05 @ 0x90

 1010 12:51:52.991691  Capability: type 0x10 @ 0xb0

 1011 12:51:52.994533  Capability: type 0x10 @ 0x40

 1012 12:51:52.998515  Enabling Common Clock Configuration

 1013 12:51:53.002513  L1 Sub-State supported from root port 28

 1014 12:51:53.005641  L1 Sub-State Support = 0xf

 1015 12:51:53.008445  CommonModeRestoreTime = 0x3c

 1016 12:51:53.012597  Power On Value = 0x6, Power On Scale = 0x1

 1017 12:51:53.015277  ASPM: Enabled L0s and L1

 1018 12:51:53.018237  Capability: type 0x01 @ 0x80

 1019 12:51:53.021185  Capability: type 0x05 @ 0x90

 1020 12:51:53.024174  Capability: type 0x10 @ 0xb0

 1021 12:51:53.029673  scan_bus: scanning of bus PCI: 00:1c.0 took 53685 usecs

 1022 12:51:53.031653  PCI: 00:1d.0 scanning...

 1023 12:51:53.036134  do_pci_scan_bridge for PCI: 00:1d.0

 1024 12:51:53.038503  PCI: pci_scan_bus for bus 02

 1025 12:51:53.042290  PCI: 02:00.0 [1217/8620] enabled

 1026 12:51:53.045431  Capability: type 0x01 @ 0x6c

 1027 12:51:53.048236  Capability: type 0x05 @ 0x48

 1028 12:51:53.051111  Capability: type 0x10 @ 0x80

 1029 12:51:53.054365  Capability: type 0x10 @ 0x40

 1030 12:51:53.058175  L1 Sub-State supported from root port 29

 1031 12:51:53.060927  L1 Sub-State Support = 0xf

 1032 12:51:53.064101  CommonModeRestoreTime = 0x78

 1033 12:51:53.068169  Power On Value = 0x16, Power On Scale = 0x0

 1034 12:51:53.069763  ASPM: Enabled L1

 1035 12:51:53.074493  Capability: type 0x01 @ 0x6c

 1036 12:51:53.079343  Capability: type 0x05 @ 0x48

 1037 12:51:53.083828  Capability: type 0x10 @ 0x80

 1038 12:51:53.091235  scan_bus: scanning of bus PCI: 00:1d.0 took 56052 usecs

 1039 12:51:53.093406  PCI: 00:1f.0 scanning...

 1040 12:51:53.096870  scan_lpc_bus for PCI: 00:1f.0

 1041 12:51:53.098782  PNP: 0c09.0 enabled

 1042 12:51:53.102254  scan_lpc_bus for PCI: 00:1f.0 done

 1043 12:51:53.107877  scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs

 1044 12:51:53.110712  PCI: 00:1f.3 scanning...

 1045 12:51:53.116595  scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs

 1046 12:51:53.119162  PCI: 00:1f.4 scanning...

 1047 12:51:53.122459  scan_generic_bus for PCI: 00:1f.4

 1048 12:51:53.126689  scan_generic_bus for PCI: 00:1f.4 done

 1049 12:51:53.131814  scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs

 1050 12:51:53.134532  PCI: 00:1f.5 scanning...

 1051 12:51:53.138152  scan_generic_bus for PCI: 00:1f.5

 1052 12:51:53.142085  scan_generic_bus for PCI: 00:1f.5 done

 1053 12:51:53.147793  scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs

 1054 12:51:53.153585  scan_bus: scanning of bus DOMAIN: 0000 took 706912 usecs

 1055 12:51:53.157273  root_dev_scan_bus for Root Device done

 1056 12:51:53.163001  scan_bus: scanning of bus Root Device took 727056 usecs

 1057 12:51:53.163777  done

 1058 12:51:53.169828  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)

 1059 12:51:53.175225  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1060 12:51:53.183474  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000

 1061 12:51:53.190353  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)

 1062 12:51:53.193895  SPI flash protection: WPSW=1 SRP0=1

 1063 12:51:53.201046  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff

 1064 12:51:53.206402  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.

 1065 12:51:53.212502  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148861 exit 42588

 1066 12:51:53.215329  found VGA at PCI: 00:02.0

 1067 12:51:53.218611  Setting up VGA for PCI: 00:02.0

 1068 12:51:53.223388  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1069 12:51:53.228436  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1070 12:51:53.230798  Allocating resources...

 1071 12:51:53.233225  Reading resources...

 1072 12:51:53.237150  Root Device read_resources bus 0 link: 0

 1073 12:51:53.242029  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1074 12:51:53.247152  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1075 12:51:53.251760  DOMAIN: 0000 read_resources bus 0 link: 0

 1076 12:51:53.257772  PCI: 00:14.0 read_resources bus 0 link: 0

 1077 12:51:53.261942  USB0 port 0 read_resources bus 0 link: 0

 1078 12:51:53.271569  USB0 port 0 read_resources bus 0 link: 0 done

 1079 12:51:53.276803  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1080 12:51:53.281608  PCI: 00:15.0 read_resources bus 1 link: 0

 1081 12:51:53.287262  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1082 12:51:53.292240  PCI: 00:15.1 read_resources bus 2 link: 0

 1083 12:51:53.297825  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1084 12:51:53.302774  PCI: 00:19.0 read_resources bus 3 link: 0

 1085 12:51:53.307716  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1086 12:51:53.312926  PCI: 00:1c.0 read_resources bus 1 link: 0

 1087 12:51:53.318116  PCI: 00:1c.0 read_resources bus 1 link: 0 done

 1088 12:51:53.322564  PCI: 00:1d.0 read_resources bus 2 link: 0

 1089 12:51:53.329780  PCI: 00:1d.0 read_resources bus 2 link: 0 done

 1090 12:51:53.334522  PCI: 00:1f.0 read_resources bus 0 link: 0

 1091 12:51:53.339450  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1092 12:51:53.345823  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1093 12:51:53.350976  Root Device read_resources bus 0 link: 0 done

 1094 12:51:53.353777  Done reading resources.

 1095 12:51:53.359674  Show resources in subtree (Root Device)...After reading.

 1096 12:51:53.363458   Root Device child on link 0 CPU_CLUSTER: 0

 1097 12:51:53.367405    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1098 12:51:53.368887     APIC: 00

 1099 12:51:53.370137     APIC: 03

 1100 12:51:53.371378     APIC: 07

 1101 12:51:53.372228     APIC: 01

 1102 12:51:53.373696     APIC: 02

 1103 12:51:53.374958     APIC: 06

 1104 12:51:53.376505     APIC: 04

 1105 12:51:53.377965     APIC: 05

 1106 12:51:53.382242    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1107 12:51:53.391550    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1108 12:51:53.401023    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1109 12:51:53.402499     PCI: 00:00.0

 1110 12:51:53.412484     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1111 12:51:53.421457     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1112 12:51:53.431057     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1113 12:51:53.440444     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1114 12:51:53.449833     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1115 12:51:53.458821     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1116 12:51:53.468474     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1117 12:51:53.477380     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1118 12:51:53.486740     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1119 12:51:53.496171     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1120 12:51:53.506115     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1121 12:51:53.515507     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1122 12:51:53.525392     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1123 12:51:53.534020     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1124 12:51:53.535576     PCI: 00:02.0

 1125 12:51:53.545582     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1126 12:51:53.556316     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1127 12:51:53.564500     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1128 12:51:53.566169     PCI: 00:04.0

 1129 12:51:53.575912     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1130 12:51:53.577950     PCI: 00:08.0

 1131 12:51:53.587607     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 12:51:53.589322     PCI: 00:12.0

 1133 12:51:53.599207     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1134 12:51:53.603816     PCI: 00:14.0 child on link 0 USB0 port 0

 1135 12:51:53.613710     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1136 12:51:53.618305      USB0 port 0 child on link 0 USB2 port 0

 1137 12:51:53.619653       USB2 port 0

 1138 12:51:53.621492       USB2 port 1

 1139 12:51:53.623154       USB2 port 2

 1140 12:51:53.624702       USB2 port 4

 1141 12:51:53.627158       USB2 port 5

 1142 12:51:53.628757       USB2 port 6

 1143 12:51:53.630406       USB2 port 7

 1144 12:51:53.632076       USB2 port 8

 1145 12:51:53.633765       USB2 port 9

 1146 12:51:53.635508       USB3 port 0

 1147 12:51:53.637201       USB3 port 1

 1148 12:51:53.639026       USB3 port 2

 1149 12:51:53.640811       USB3 port 3

 1150 12:51:53.642472       USB3 port 4

 1151 12:51:53.644277     PCI: 00:14.2

 1152 12:51:53.654060     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1153 12:51:53.664052     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1154 12:51:53.665832     PCI: 00:14.3

 1155 12:51:53.675711     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1156 12:51:53.679600     PCI: 00:15.0 child on link 0 I2C: 01:10

 1157 12:51:53.689711     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1158 12:51:53.691120      I2C: 01:10

 1159 12:51:53.692989      I2C: 01:10

 1160 12:51:53.694103      I2C: 01:34

 1161 12:51:53.698640     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1162 12:51:53.708473     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1163 12:51:53.710385      I2C: 02:2c

 1164 12:51:53.711844     PCI: 00:16.0

 1165 12:51:53.721840     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1166 12:51:53.723548     PCI: 00:17.0

 1167 12:51:53.732600     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1168 12:51:53.741261     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1169 12:51:53.749629     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1170 12:51:53.758120     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1171 12:51:53.766233     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1172 12:51:53.775290     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1173 12:51:53.779863     PCI: 00:19.0 child on link 0 I2C: 03:50

 1174 12:51:53.789465     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1175 12:51:53.799753     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1176 12:51:53.800925      I2C: 03:50

 1177 12:51:53.802353     PCI: 00:19.2

 1178 12:51:53.814045     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1179 12:51:53.823769     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1180 12:51:53.828392     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1181 12:51:53.836598     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1182 12:51:53.846741     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1183 12:51:53.855400     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1184 12:51:53.857157      PCI: 01:00.0

 1185 12:51:53.866542      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14

 1186 12:51:53.871264     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1187 12:51:53.879917     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1188 12:51:53.889671     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1189 12:51:53.898489     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1190 12:51:53.900491      PCI: 02:00.0

 1191 12:51:53.909214      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1192 12:51:53.918671      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14

 1193 12:51:53.923254     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1194 12:51:53.931531     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1195 12:51:53.940757     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1196 12:51:53.942215      PNP: 0c09.0

 1197 12:51:53.951102      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1198 12:51:53.959435      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1199 12:51:53.968058      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1200 12:51:53.969745     PCI: 00:1f.3

 1201 12:51:53.979918     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1202 12:51:53.989717     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1203 12:51:53.991388     PCI: 00:1f.4

 1204 12:51:54.000895     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1205 12:51:54.010296     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1206 12:51:54.012135     PCI: 00:1f.5

 1207 12:51:54.021015     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1208 12:51:54.022493     PCI: 00:1f.6

 1209 12:51:54.032207     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10

 1210 12:51:54.038245  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1211 12:51:54.044954  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1212 12:51:54.051692  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1213 12:51:54.057634  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1214 12:51:54.064446  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1215 12:51:54.067794  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1216 12:51:54.071612  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1217 12:51:54.075233  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1218 12:51:54.078953  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1219 12:51:54.085245  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1220 12:51:54.092253  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1221 12:51:54.100473  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1222 12:51:54.108843  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1223 12:51:54.115673  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1224 12:51:54.119001  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem

 1225 12:51:54.127404  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1226 12:51:54.135479  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1227 12:51:54.143949  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1228 12:51:54.150752  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1229 12:51:54.153853  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem

 1230 12:51:54.158294  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem

 1231 12:51:54.166177  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1232 12:51:54.170604  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1233 12:51:54.175652  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1234 12:51:54.180699  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem

 1235 12:51:54.185404  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem

 1236 12:51:54.190213  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem

 1237 12:51:54.194929  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem

 1238 12:51:54.200045  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem

 1239 12:51:54.204865  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem

 1240 12:51:54.209549  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem

 1241 12:51:54.214426  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem

 1242 12:51:54.219102  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem

 1243 12:51:54.224526  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem

 1244 12:51:54.228868  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem

 1245 12:51:54.234084  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem

 1246 12:51:54.238388  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem

 1247 12:51:54.243890  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem

 1248 12:51:54.248294  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem

 1249 12:51:54.253498  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem

 1250 12:51:54.258340  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem

 1251 12:51:54.263126  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem

 1252 12:51:54.267894  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem

 1253 12:51:54.272886  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem

 1254 12:51:54.277719  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem

 1255 12:51:54.282559  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem

 1256 12:51:54.287413  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem

 1257 12:51:54.295769  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done

 1258 12:51:54.299427  avoid_fixed_resources: DOMAIN: 0000

 1259 12:51:54.305532  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1260 12:51:54.311147  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1261 12:51:54.318938  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1262 12:51:54.326945  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)

 1263 12:51:54.334165  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)

 1264 12:51:54.342143  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)

 1265 12:51:54.349748  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)

 1266 12:51:54.357437  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1267 12:51:54.365141  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1268 12:51:54.372808  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1269 12:51:54.379882  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1270 12:51:54.386849  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1271 12:51:54.389148  Setting resources...

 1272 12:51:54.395591  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1273 12:51:54.399444  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1274 12:51:54.403687  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1275 12:51:54.407639  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1276 12:51:54.411279  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1277 12:51:54.417685  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1278 12:51:54.423951  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1279 12:51:54.430395  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1280 12:51:54.436346  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1281 12:51:54.442880  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1282 12:51:54.450098  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff

 1283 12:51:54.455706  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1284 12:51:54.460395  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1285 12:51:54.465300  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1286 12:51:54.470284  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem

 1287 12:51:54.475172  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem

 1288 12:51:54.479680  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem

 1289 12:51:54.484893  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem

 1290 12:51:54.489434  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem

 1291 12:51:54.494750  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem

 1292 12:51:54.499501  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem

 1293 12:51:54.504351  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem

 1294 12:51:54.508846  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem

 1295 12:51:54.513947  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem

 1296 12:51:54.519109  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem

 1297 12:51:54.523831  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem

 1298 12:51:54.528811  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem

 1299 12:51:54.533430  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem

 1300 12:51:54.538350  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem

 1301 12:51:54.543107  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem

 1302 12:51:54.548019  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem

 1303 12:51:54.552650  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem

 1304 12:51:54.557716  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem

 1305 12:51:54.562212  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem

 1306 12:51:54.567488  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem

 1307 12:51:54.572370  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem

 1308 12:51:54.580055  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done

 1309 12:51:54.587268  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1310 12:51:54.594563  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1311 12:51:54.601811  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1312 12:51:54.606490  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem

 1313 12:51:54.613933  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done

 1314 12:51:54.621240  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1315 12:51:54.629018  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1316 12:51:54.636171  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff

 1317 12:51:54.641280  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem

 1318 12:51:54.646348  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem

 1319 12:51:54.653800  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done

 1320 12:51:54.657652  Root Device assign_resources, bus 0 link: 0

 1321 12:51:54.662641  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1322 12:51:54.671193  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1323 12:51:54.679704  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1324 12:51:54.687401  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1325 12:51:54.695438  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64

 1326 12:51:54.703611  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64

 1327 12:51:54.711890  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64

 1328 12:51:54.720590  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64

 1329 12:51:54.724828  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1330 12:51:54.729459  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:51:54.737788  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64

 1332 12:51:54.745732  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64

 1333 12:51:54.753886  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64

 1334 12:51:54.762232  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64

 1335 12:51:54.766823  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1336 12:51:54.771509  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:51:54.780110  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64

 1338 12:51:54.784328  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1339 12:51:54.789309  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:51:54.797772  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64

 1341 12:51:54.805352  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem

 1342 12:51:54.813664  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem

 1343 12:51:54.821196  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1344 12:51:54.829020  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1345 12:51:54.836679  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1346 12:51:54.844111  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem

 1347 12:51:54.852348  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64

 1348 12:51:54.860658  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64

 1349 12:51:54.864865  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:51:54.869474  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:51:54.877683  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64

 1352 12:51:54.886734  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1353 12:51:54.895481  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1354 12:51:54.904121  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1355 12:51:54.908698  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1356 12:51:54.916251  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem

 1357 12:51:54.921036  PCI: 00:1c.0 assign_resources, bus 1 link: 0

 1358 12:51:54.930194  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io

 1359 12:51:54.939029  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem

 1360 12:51:54.947344  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem

 1361 12:51:54.951688  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1362 12:51:54.961237  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem

 1363 12:51:54.970867  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem

 1364 12:51:54.977510  PCI: 00:1d.0 assign_resources, bus 2 link: 0

 1365 12:51:54.982493  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:51:54.987544  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1367 12:51:54.991466  LPC: Trying to open IO window from 930 size 8

 1368 12:51:54.996686  LPC: Trying to open IO window from 940 size 8

 1369 12:51:55.000982  LPC: Trying to open IO window from 950 size 10

 1370 12:51:55.009662  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64

 1371 12:51:55.017311  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64

 1372 12:51:55.025666  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64

 1373 12:51:55.033595  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem

 1374 12:51:55.042023  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem

 1375 12:51:55.046968  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1376 12:51:55.051775  Root Device assign_resources, bus 0 link: 0

 1377 12:51:55.053660  Done setting resources.

 1378 12:51:55.060281  Show resources in subtree (Root Device)...After assigning values.

 1379 12:51:55.064735   Root Device child on link 0 CPU_CLUSTER: 0

 1380 12:51:55.068843    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1381 12:51:55.070061     APIC: 00

 1382 12:51:55.071716     APIC: 03

 1383 12:51:55.072862     APIC: 07

 1384 12:51:55.073963     APIC: 01

 1385 12:51:55.075190     APIC: 02

 1386 12:51:55.076343     APIC: 06

 1387 12:51:55.077555     APIC: 04

 1388 12:51:55.079161     APIC: 05

 1389 12:51:55.083088    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1390 12:51:55.092877    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1391 12:51:55.103948    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1392 12:51:55.105422     PCI: 00:00.0

 1393 12:51:55.115382     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1394 12:51:55.125034     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1395 12:51:55.134337     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1396 12:51:55.143260     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1397 12:51:55.152838     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1398 12:51:55.161865     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1399 12:51:55.171182     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1400 12:51:55.180020     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7

 1401 12:51:55.189623     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8

 1402 12:51:55.199185     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a

 1403 12:51:55.208803     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b

 1404 12:51:55.218606     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c

 1405 12:51:55.227803     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d

 1406 12:51:55.237083     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e

 1407 12:51:55.238831     PCI: 00:02.0

 1408 12:51:55.249441     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1409 12:51:55.260100     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1410 12:51:55.269110     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1411 12:51:55.270633     PCI: 00:04.0

 1412 12:51:55.281071     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10

 1413 12:51:55.282406     PCI: 00:08.0

 1414 12:51:55.292707     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10

 1415 12:51:55.295018     PCI: 00:12.0

 1416 12:51:55.304802     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10

 1417 12:51:55.309633     PCI: 00:14.0 child on link 0 USB0 port 0

 1418 12:51:55.319973     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10

 1419 12:51:55.324098      USB0 port 0 child on link 0 USB2 port 0

 1420 12:51:55.325876       USB2 port 0

 1421 12:51:55.327746       USB2 port 1

 1422 12:51:55.329619       USB2 port 2

 1423 12:51:55.331323       USB2 port 4

 1424 12:51:55.333093       USB2 port 5

 1425 12:51:55.334663       USB2 port 6

 1426 12:51:55.336698       USB2 port 7

 1427 12:51:55.338468       USB2 port 8

 1428 12:51:55.339946       USB2 port 9

 1429 12:51:55.341681       USB3 port 0

 1430 12:51:55.343591       USB3 port 1

 1431 12:51:55.345176       USB3 port 2

 1432 12:51:55.346685       USB3 port 3

 1433 12:51:55.348607       USB3 port 4

 1434 12:51:55.350641     PCI: 00:14.2

 1435 12:51:55.360761     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10

 1436 12:51:55.370908     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18

 1437 12:51:55.372408     PCI: 00:14.3

 1438 12:51:55.383035     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10

 1439 12:51:55.387371     PCI: 00:15.0 child on link 0 I2C: 01:10

 1440 12:51:55.397442     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10

 1441 12:51:55.399242      I2C: 01:10

 1442 12:51:55.400547      I2C: 01:10

 1443 12:51:55.401812      I2C: 01:34

 1444 12:51:55.406250     PCI: 00:15.1 child on link 0 I2C: 02:2c

 1445 12:51:55.416595     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10

 1446 12:51:55.418163      I2C: 02:2c

 1447 12:51:55.419907     PCI: 00:16.0

 1448 12:51:55.430286     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10

 1449 12:51:55.432030     PCI: 00:17.0

 1450 12:51:55.441908     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10

 1451 12:51:55.452069     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14

 1452 12:51:55.461337     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1453 12:51:55.470290     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1454 12:51:55.479410     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1455 12:51:55.489644     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24

 1456 12:51:55.493836     PCI: 00:19.0 child on link 0 I2C: 03:50

 1457 12:51:55.504090     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10

 1458 12:51:55.514776     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18

 1459 12:51:55.515763      I2C: 03:50

 1460 12:51:55.518066     PCI: 00:19.2

 1461 12:51:55.528940     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1462 12:51:55.539252     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18

 1463 12:51:55.543437     PCI: 00:1c.0 child on link 0 PCI: 01:00.0

 1464 12:51:55.552532     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1465 12:51:55.563228     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1466 12:51:55.573155     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1467 12:51:55.574822      PCI: 01:00.0

 1468 12:51:55.585246      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14

 1469 12:51:55.590049     PCI: 00:1d.0 child on link 0 PCI: 02:00.0

 1470 12:51:55.599122     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1471 12:51:55.609055     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1472 12:51:55.619640     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20

 1473 12:51:55.621033      PCI: 02:00.0

 1474 12:51:55.631674      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10

 1475 12:51:55.641957      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14

 1476 12:51:55.646706     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1477 12:51:55.654970     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1478 12:51:55.663891     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1479 12:51:55.665824      PNP: 0c09.0

 1480 12:51:55.674301      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0

 1481 12:51:55.682805      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1

 1482 12:51:55.691398      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2

 1483 12:51:55.693094     PCI: 00:1f.3

 1484 12:51:55.703665     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10

 1485 12:51:55.713691     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20

 1486 12:51:55.715656     PCI: 00:1f.4

 1487 12:51:55.724896     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1488 12:51:55.734727     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10

 1489 12:51:55.736637     PCI: 00:1f.5

 1490 12:51:55.746812     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10

 1491 12:51:55.748289     PCI: 00:1f.6

 1492 12:51:55.758775     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10

 1493 12:51:55.761417  Done allocating resources.

 1494 12:51:55.767829  BS: BS_DEV_RESOURCES times (us): entry 0 run 2548941 exit 14

 1495 12:51:55.770358  Enabling resources...

 1496 12:51:55.774667  PCI: 00:00.0 subsystem <- 1028/3e34

 1497 12:51:55.777112  PCI: 00:00.0 cmd <- 06

 1498 12:51:55.780972  PCI: 00:02.0 subsystem <- 1028/3ea0

 1499 12:51:55.783455  PCI: 00:02.0 cmd <- 03

 1500 12:51:55.787654  PCI: 00:04.0 subsystem <- 1028/1903

 1501 12:51:55.789470  PCI: 00:04.0 cmd <- 02

 1502 12:51:55.792113  PCI: 00:08.0 cmd <- 06

 1503 12:51:55.796126  PCI: 00:12.0 subsystem <- 1028/9df9

 1504 12:51:55.798828  PCI: 00:12.0 cmd <- 02

 1505 12:51:55.802640  PCI: 00:14.0 subsystem <- 1028/9ded

 1506 12:51:55.804570  PCI: 00:14.0 cmd <- 02

 1507 12:51:55.807829  PCI: 00:14.2 cmd <- 02

 1508 12:51:55.811383  PCI: 00:14.3 subsystem <- 1028/9df0

 1509 12:51:55.813368  PCI: 00:14.3 cmd <- 02

 1510 12:51:55.817622  PCI: 00:15.0 subsystem <- 1028/9de8

 1511 12:51:55.820210  PCI: 00:15.0 cmd <- 02

 1512 12:51:55.823783  PCI: 00:15.1 subsystem <- 1028/9de9

 1513 12:51:55.826520  PCI: 00:15.1 cmd <- 02

 1514 12:51:55.830133  PCI: 00:16.0 subsystem <- 1028/9de0

 1515 12:51:55.832553  PCI: 00:16.0 cmd <- 02

 1516 12:51:55.836504  PCI: 00:17.0 subsystem <- 1028/9dd3

 1517 12:51:55.838685  PCI: 00:17.0 cmd <- 03

 1518 12:51:55.842684  PCI: 00:19.0 subsystem <- 1028/9dc5

 1519 12:51:55.845168  PCI: 00:19.0 cmd <- 06

 1520 12:51:55.849054  PCI: 00:19.2 subsystem <- 1028/9dc7

 1521 12:51:55.850970  PCI: 00:19.2 cmd <- 06

 1522 12:51:55.854644  PCI: 00:1c.0 bridge ctrl <- 0003

 1523 12:51:55.858739  PCI: 00:1c.0 subsystem <- 1028/9dbf

 1524 12:51:55.861260  Capability: type 0x10 @ 0x40

 1525 12:51:55.864265  Capability: type 0x05 @ 0x80

 1526 12:51:55.867311  Capability: type 0x0d @ 0x90

 1527 12:51:55.869634  PCI: 00:1c.0 cmd <- 06

 1528 12:51:55.873448  PCI: 00:1d.0 bridge ctrl <- 0003

 1529 12:51:55.876849  PCI: 00:1d.0 subsystem <- 1028/9db4

 1530 12:51:55.879748  Capability: type 0x10 @ 0x40

 1531 12:51:55.882492  Capability: type 0x05 @ 0x80

 1532 12:51:55.885743  Capability: type 0x0d @ 0x90

 1533 12:51:55.887457  PCI: 00:1d.0 cmd <- 06

 1534 12:51:55.891709  PCI: 00:1f.0 subsystem <- 1028/9d84

 1535 12:51:55.894097  PCI: 00:1f.0 cmd <- 407

 1536 12:51:55.898069  PCI: 00:1f.3 subsystem <- 1028/9dc8

 1537 12:51:55.900362  PCI: 00:1f.3 cmd <- 02

 1538 12:51:55.904166  PCI: 00:1f.4 subsystem <- 1028/9da3

 1539 12:51:55.907035  PCI: 00:1f.4 cmd <- 03

 1540 12:51:55.910575  PCI: 00:1f.5 subsystem <- 1028/9da4

 1541 12:51:55.912837  PCI: 00:1f.5 cmd <- 406

 1542 12:51:55.917105  PCI: 00:1f.6 subsystem <- 1028/15be

 1543 12:51:55.919244  PCI: 00:1f.6 cmd <- 02

 1544 12:51:55.930137  PCI: 01:00.0 cmd <- 02

 1545 12:51:55.934763  PCI: 02:00.0 cmd <- 06

 1546 12:51:55.938543  done.

 1547 12:51:55.944431  BS: BS_DEV_ENABLE times (us): entry 405 run 170485 exit 0

 1548 12:51:55.946802  Initializing devices...

 1549 12:51:55.948757  Root Device init ...

 1550 12:51:55.952938  Root Device init finished in 2139 usecs

 1551 12:51:55.956012  CPU_CLUSTER: 0 init ...

 1552 12:51:55.959876  CPU_CLUSTER: 0 init finished in 2430 usecs

 1553 12:51:55.966533  PCI: 00:00.0 init ...

 1554 12:51:55.969089  CPU TDP: 15 Watts

 1555 12:51:55.971062  CPU PL2 = 51 Watts

 1556 12:51:55.975313  PCI: 00:00.0 init finished in 7035 usecs

 1557 12:51:55.978120  PCI: 00:02.0 init ...

 1558 12:51:55.981711  PCI: 00:02.0 init finished in 2228 usecs

 1559 12:51:55.984894  PCI: 00:04.0 init ...

 1560 12:51:55.988950  PCI: 00:04.0 init finished in 2236 usecs

 1561 12:51:55.991056  PCI: 00:08.0 init ...

 1562 12:51:55.995380  PCI: 00:08.0 init finished in 2236 usecs

 1563 12:51:55.998181  PCI: 00:12.0 init ...

 1564 12:51:56.001729  PCI: 00:12.0 init finished in 2236 usecs

 1565 12:51:56.004501  PCI: 00:14.0 init ...

 1566 12:51:56.008807  PCI: 00:14.0 init finished in 2236 usecs

 1567 12:51:56.011175  PCI: 00:14.2 init ...

 1568 12:51:56.015807  PCI: 00:14.2 init finished in 2235 usecs

 1569 12:51:56.018003  PCI: 00:14.3 init ...

 1570 12:51:56.022048  PCI: 00:14.3 init finished in 2242 usecs

 1571 12:51:56.025075  PCI: 00:15.0 init ...

 1572 12:51:56.028319  DW I2C bus 0 at 0xd1347000 (400 KHz)

 1573 12:51:56.032666  PCI: 00:15.0 init finished in 5935 usecs

 1574 12:51:56.035324  PCI: 00:15.1 init ...

 1575 12:51:56.038945  DW I2C bus 1 at 0xd1348000 (400 KHz)

 1576 12:51:56.042816  PCI: 00:15.1 init finished in 5926 usecs

 1577 12:51:56.045905  PCI: 00:16.0 init ...

 1578 12:51:56.049630  PCI: 00:16.0 init finished in 2236 usecs

 1579 12:51:56.052884  PCI: 00:19.0 init ...

 1580 12:51:56.056212  DW I2C bus 4 at 0xd134a000 (400 KHz)

 1581 12:51:56.060813  PCI: 00:19.0 init finished in 5934 usecs

 1582 12:51:56.063781  PCI: 00:1c.0 init ...

 1583 12:51:56.066740  Initializing PCH PCIe bridge.

 1584 12:51:56.070613  PCI: 00:1c.0 init finished in 5250 usecs

 1585 12:51:56.073614  PCI: 00:1d.0 init ...

 1586 12:51:56.076668  Initializing PCH PCIe bridge.

 1587 12:51:56.080700  PCI: 00:1d.0 init finished in 5251 usecs

 1588 12:51:56.083146  PCI: 00:1f.0 init ...

 1589 12:51:56.087516  IOAPIC: Initializing IOAPIC at 0xfec00000

 1590 12:51:56.091959  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1591 12:51:56.093747  IOAPIC: ID = 0x02

 1592 12:51:56.096560  IOAPIC: Dumping registers

 1593 12:51:56.099141    reg 0x0000: 0x02000000

 1594 12:51:56.101441    reg 0x0001: 0x00770020

 1595 12:51:56.104036    reg 0x0002: 0x00000000

 1596 12:51:56.110498  PCI: 00:1f.0 init finished in 25095 usecs

 1597 12:51:56.112722  PCI: 00:1f.3 init ...

 1598 12:51:56.118423  HDA: codec_mask = 05

 1599 12:51:56.120472  HDA: Initializing codec #2

 1600 12:51:56.123734  HDA: codec viddid: 8086280b

 1601 12:51:56.126420  HDA: No verb table entry found

 1602 12:51:56.129277  HDA: Initializing codec #0

 1603 12:51:56.132025  HDA: codec viddid: 10ec0236

 1604 12:51:56.139302  HDA: verb loaded.

 1605 12:51:56.143397  PCI: 00:1f.3 init finished in 28834 usecs

 1606 12:51:56.146294  PCI: 00:1f.4 init ...

 1607 12:51:56.150159  PCI: 00:1f.4 init finished in 2246 usecs

 1608 12:51:56.153494  PCI: 00:1f.6 init ...

 1609 12:51:56.157402  PCI: 00:1f.6 init finished in 2236 usecs

 1610 12:51:56.168667  PCI: 01:00.0 init ...

 1611 12:51:56.172481  PCI: 01:00.0 init finished in 2236 usecs

 1612 12:51:56.174716  PCI: 02:00.0 init ...

 1613 12:51:56.178936  PCI: 02:00.0 init finished in 2236 usecs

 1614 12:51:56.181469  PNP: 0c09.0 init ...

 1615 12:51:56.185826  EC Label      : 00.00.20

 1616 12:51:56.190017  EC Revision   : 9ca674bba

 1617 12:51:56.192829  EC Model Num  : 08B9

 1618 12:51:56.196680  EC Build Date : 05/10/19

 1619 12:51:56.205481  PNP: 0c09.0 init finished in 21747 usecs

 1620 12:51:56.208124  Devices initialized

 1621 12:51:56.210629  Show all devs... After init.

 1622 12:51:56.213581  Root Device: enabled 1

 1623 12:51:56.215974  CPU_CLUSTER: 0: enabled 1

 1624 12:51:56.217770  DOMAIN: 0000: enabled 1

 1625 12:51:56.220036  APIC: 00: enabled 1

 1626 12:51:56.222516  PCI: 00:00.0: enabled 1

 1627 12:51:56.225187  PCI: 00:02.0: enabled 1

 1628 12:51:56.227802  PCI: 00:04.0: enabled 1

 1629 12:51:56.230390  PCI: 00:12.0: enabled 1

 1630 12:51:56.232098  PCI: 00:12.5: enabled 0

 1631 12:51:56.234935  PCI: 00:12.6: enabled 0

 1632 12:51:56.237363  PCI: 00:13.0: enabled 0

 1633 12:51:56.240309  PCI: 00:14.0: enabled 1

 1634 12:51:56.241882  PCI: 00:14.1: enabled 0

 1635 12:51:56.244525  PCI: 00:14.3: enabled 1

 1636 12:51:56.246922  PCI: 00:14.5: enabled 0

 1637 12:51:56.249291  PCI: 00:15.0: enabled 1

 1638 12:51:56.252065  PCI: 00:15.1: enabled 1

 1639 12:51:56.254254  PCI: 00:15.2: enabled 0

 1640 12:51:56.256921  PCI: 00:15.3: enabled 0

 1641 12:51:56.259164  PCI: 00:16.0: enabled 1

 1642 12:51:56.261529  PCI: 00:16.1: enabled 0

 1643 12:51:56.263851  PCI: 00:16.2: enabled 0

 1644 12:51:56.266385  PCI: 00:16.3: enabled 0

 1645 12:51:56.268806  PCI: 00:16.4: enabled 0

 1646 12:51:56.271373  PCI: 00:16.5: enabled 0

 1647 12:51:56.273463  PCI: 00:17.0: enabled 1

 1648 12:51:56.276201  PCI: 00:19.0: enabled 1

 1649 12:51:56.278332  PCI: 00:19.1: enabled 0

 1650 12:51:56.281016  PCI: 00:19.2: enabled 1

 1651 12:51:56.283290  PCI: 00:1a.0: enabled 0

 1652 12:51:56.285508  PCI: 00:1c.0: enabled 1

 1653 12:51:56.287876  PCI: 00:1c.1: enabled 0

 1654 12:51:56.290170  PCI: 00:1c.2: enabled 0

 1655 12:51:56.292802  PCI: 00:1c.3: enabled 0

 1656 12:51:56.295430  PCI: 00:1c.4: enabled 0

 1657 12:51:56.297895  PCI: 00:1c.5: enabled 0

 1658 12:51:56.300442  PCI: 00:1c.6: enabled 0

 1659 12:51:56.302447  PCI: 00:1c.7: enabled 0

 1660 12:51:56.305256  PCI: 00:1d.0: enabled 1

 1661 12:51:56.307761  PCI: 00:1d.1: enabled 0

 1662 12:51:56.310229  PCI: 00:1d.2: enabled 0

 1663 12:51:56.312427  PCI: 00:1d.3: enabled 0

 1664 12:51:56.314761  PCI: 00:1d.4: enabled 0

 1665 12:51:56.317293  PCI: 00:1e.0: enabled 0

 1666 12:51:56.319489  PCI: 00:1e.1: enabled 0

 1667 12:51:56.322106  PCI: 00:1e.2: enabled 0

 1668 12:51:56.324698  PCI: 00:1e.3: enabled 0

 1669 12:51:56.327222  PCI: 00:1f.0: enabled 1

 1670 12:51:56.329410  PCI: 00:1f.1: enabled 0

 1671 12:51:56.331809  PCI: 00:1f.2: enabled 0

 1672 12:51:56.333997  PCI: 00:1f.3: enabled 1

 1673 12:51:56.336351  PCI: 00:1f.4: enabled 1

 1674 12:51:56.338975  PCI: 00:1f.5: enabled 1

 1675 12:51:56.341885  PCI: 00:1f.6: enabled 1

 1676 12:51:56.343796  USB0 port 0: enabled 1

 1677 12:51:56.345778  I2C: 01:10: enabled 1

 1678 12:51:56.348226  I2C: 01:10: enabled 1

 1679 12:51:56.350495  I2C: 01:34: enabled 1

 1680 12:51:56.352841  I2C: 02:2c: enabled 1

 1681 12:51:56.354765  I2C: 03:50: enabled 1

 1682 12:51:56.357451  PNP: 0c09.0: enabled 1

 1683 12:51:56.359356  USB2 port 0: enabled 1

 1684 12:51:56.362094  USB2 port 1: enabled 1

 1685 12:51:56.364073  USB2 port 2: enabled 1

 1686 12:51:56.366872  USB2 port 4: enabled 1

 1687 12:51:56.368997  USB2 port 5: enabled 1

 1688 12:51:56.371237  USB2 port 6: enabled 1

 1689 12:51:56.373655  USB2 port 7: enabled 1

 1690 12:51:56.375791  USB2 port 8: enabled 1

 1691 12:51:56.378590  USB2 port 9: enabled 1

 1692 12:51:56.380556  USB3 port 0: enabled 1

 1693 12:51:56.382758  USB3 port 1: enabled 1

 1694 12:51:56.385461  USB3 port 2: enabled 1

 1695 12:51:56.387654  USB3 port 3: enabled 1

 1696 12:51:56.390308  USB3 port 4: enabled 1

 1697 12:51:56.391771  APIC: 03: enabled 1

 1698 12:51:56.394094  APIC: 07: enabled 1

 1699 12:51:56.396409  APIC: 01: enabled 1

 1700 12:51:56.397835  APIC: 02: enabled 1

 1701 12:51:56.400320  APIC: 06: enabled 1

 1702 12:51:56.402433  APIC: 04: enabled 1

 1703 12:51:56.404305  APIC: 05: enabled 1

 1704 12:51:56.406813  PCI: 00:08.0: enabled 1

 1705 12:51:56.409366  PCI: 00:14.2: enabled 1

 1706 12:51:56.411921  PCI: 01:00.0: enabled 1

 1707 12:51:56.414148  PCI: 02:00.0: enabled 1

 1708 12:51:56.419333  Disabling ACPI via APMC:

 1709 12:51:56.420918  done.

 1710 12:51:56.426416  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)

 1711 12:51:56.429648  ELOG: NV offset 0x1bf0000 size 0x4000

 1712 12:51:56.437769  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1713 12:51:56.444218  ELOG: Event(17) added with size 13 at 2023-03-22 12:51:55 UTC

 1714 12:51:56.449202  POST: Unexpected post code in previous boot: 0x73

 1715 12:51:56.455468  ELOG: Event(A3) added with size 11 at 2023-03-22 12:51:55 UTC

 1716 12:51:56.461879  ELOG: Event(92) added with size 9 at 2023-03-22 12:51:55 UTC

 1717 12:51:56.467730  ELOG: Event(93) added with size 9 at 2023-03-22 12:51:55 UTC

 1718 12:51:56.474497  ELOG: Event(9A) added with size 9 at 2023-03-22 12:51:55 UTC

 1719 12:51:56.480261  ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:55 UTC

 1720 12:51:56.486888  ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:55 UTC

 1721 12:51:56.492782  BS: BS_DEV_INIT times (us): entry 0 run 469848 exit 72538

 1722 12:51:56.499382  ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:55 UTC

 1723 12:51:56.507339  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1724 12:51:56.512930  ELOG: Event(A0) added with size 9 at 2023-03-22 12:51:55 UTC

 1725 12:51:56.517306  elog_add_boot_reason: Logged dev mode boot

 1726 12:51:56.519672  Finalize devices...

 1727 12:51:56.521403  PCI: 00:17.0 final

 1728 12:51:56.523601  Devices finalized

 1729 12:51:56.528609  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)

 1730 12:51:56.534840  BS: BS_POST_DEVICE times (us): entry 24781 run 5936 exit 5362

 1731 12:51:56.541106  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0

 1732 12:51:56.549184  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C

 1733 12:51:56.553891  disable_unused_touchscreen: Disable ACPI0C50

 1734 12:51:56.558322  disable_unused_touchscreen: Enable ELAN900C

 1735 12:51:56.560981  CBFS @ 1d00000 size 300000

 1736 12:51:56.566997  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1737 12:51:56.570930  CBFS: Locating 'fallback/dsdt.aml'

 1738 12:51:56.574990  CBFS: Found @ offset 10b200 size 4448

 1739 12:51:56.577453  CBFS @ 1d00000 size 300000

 1740 12:51:56.584183  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1741 12:51:56.586858  CBFS: Locating 'fallback/slic'

 1742 12:51:56.592228  CBFS: 'fallback/slic' not found.

 1743 12:51:56.596558  ACPI: Writing ACPI tables at 89c0f000.

 1744 12:51:56.598066  ACPI:    * FACS

 1745 12:51:56.599416  ACPI:    * DSDT

 1746 12:51:56.603126  Ramoops buffer: 0x100000@0x89b0e000.

 1747 12:51:56.607945  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)

 1748 12:51:56.612888  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)

 1749 12:51:56.616806  ACPI:    * FADT

 1750 12:51:56.617631  SCI is IRQ9

 1751 12:51:56.621692  ACPI: added table 1/32, length now 40

 1752 12:51:56.623378  ACPI:     * SSDT

 1753 12:51:56.626464  Found 1 CPU(s) with 8 core(s) each.

 1754 12:51:56.631037  Error: Could not locate 'wifi_sar' in VPD.

 1755 12:51:56.634798  Error: failed from getting SAR limits!

 1756 12:51:56.638346  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3

 1757 12:51:56.643144  dw_i2c: bad counts. hcnt = -14 lcnt = 30

 1758 12:51:56.647008  dw_i2c: bad counts. hcnt = -20 lcnt = 40

 1759 12:51:56.651255  dw_i2c: bad counts. hcnt = -18 lcnt = 48

 1760 12:51:56.656009  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10

 1761 12:51:56.661603  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34

 1762 12:51:56.666485  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c

 1763 12:51:56.670637  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50

 1764 12:51:56.676538  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1765 12:51:56.682369  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1

 1766 12:51:56.688300  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2

 1767 12:51:56.693801  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4

 1768 12:51:56.699363  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5

 1769 12:51:56.703614  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6

 1770 12:51:56.708154  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7

 1771 12:51:56.713541  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8

 1772 12:51:56.718346  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1773 12:51:56.724252  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1774 12:51:56.730291  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1

 1775 12:51:56.735824  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1776 12:51:56.741700  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3

 1777 12:51:56.746311  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4

 1778 12:51:56.750085  ACPI: added table 2/32, length now 44

 1779 12:51:56.751755  ACPI:    * MCFG

 1780 12:51:56.755399  ACPI: added table 3/32, length now 48

 1781 12:51:56.757327  ACPI:    * TPM2

 1782 12:51:56.760269  TPM2 log created at 89afe000

 1783 12:51:56.764157  ACPI: added table 4/32, length now 52

 1784 12:51:56.765610  ACPI:    * MADT

 1785 12:51:56.766990  SCI is IRQ9

 1786 12:51:56.770660  ACPI: added table 5/32, length now 56

 1787 12:51:56.772760  current = 89c14bd0

 1788 12:51:56.775071  ACPI:    * IGD OpRegion

 1789 12:51:56.777293  GMA: Found VBT in CBFS

 1790 12:51:56.780406  GMA: Found valid VBT in CBFS

 1791 12:51:56.784270  ACPI: added table 6/32, length now 60

 1792 12:51:56.785691  ACPI:    * HPET

 1793 12:51:56.789398  ACPI: added table 7/32, length now 64

 1794 12:51:56.790821  ACPI: done.

 1795 12:51:56.793781  ACPI tables: 31872 bytes.

 1796 12:51:56.796462  smbios_write_tables: 89afd000

 1797 12:51:56.798577  recv_ec_data: 0x01

 1798 12:51:56.800905  Create SMBIOS type 17

 1799 12:51:56.803461  PCI: 00:14.3 (Intel WiFi)

 1800 12:51:56.806109  SMBIOS tables: 708 bytes.

 1801 12:51:56.810706  Writing table forward entry at 0x00000500

 1802 12:51:56.816449  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b

 1803 12:51:56.820309  Writing coreboot table at 0x89c33000

 1804 12:51:56.825900   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1805 12:51:56.830522   1. 0000000000001000-000000000009ffff: RAM

 1806 12:51:56.835138   2. 00000000000a0000-00000000000fffff: RESERVED

 1807 12:51:56.839373   3. 0000000000100000-0000000089afcfff: RAM

 1808 12:51:56.845442   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES

 1809 12:51:56.849853   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE

 1810 12:51:56.856309   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES

 1811 12:51:56.860982   7. 000000008a000000-000000008f7fffff: RESERVED

 1812 12:51:56.865827   8. 00000000e0000000-00000000efffffff: RESERVED

 1813 12:51:56.870635   9. 00000000fc000000-00000000fc000fff: RESERVED

 1814 12:51:56.875097  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1815 12:51:56.880262  11. 00000000fed10000-00000000fed17fff: RESERVED

 1816 12:51:56.884211  12. 00000000fed80000-00000000fed83fff: RESERVED

 1817 12:51:56.889477  13. 00000000feda0000-00000000feda1fff: RESERVED

 1818 12:51:56.893906  14. 0000000100000000-000000026e7fffff: RAM

 1819 12:51:56.898177  Graphics framebuffer located at 0xc0000000

 1820 12:51:56.900693  Passing 6 GPIOs to payload:

 1821 12:51:56.905914              NAME |       PORT | POLARITY |     VALUE

 1822 12:51:56.911112     write protect | 0x000000dc |     high |      high

 1823 12:51:56.916877          recovery | 0x000000d5 |      low |      high

 1824 12:51:56.921563               lid |  undefined |     high |      high

 1825 12:51:56.927068             power |  undefined |     high |       low

 1826 12:51:56.932143             oprom |  undefined |     high |       low

 1827 12:51:56.937564          EC in RW |  undefined |     high |       low

 1828 12:51:56.940197  recv_ec_data: 0x01

 1829 12:51:56.940985  SKU ID: 3

 1830 12:51:56.943975  CBFS @ 1d00000 size 300000

 1831 12:51:56.950293  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1832 12:51:56.956234  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a344

 1833 12:51:56.958909  coreboot table: 1484 bytes.

 1834 12:51:56.962403  IMD ROOT    0. 89fff000 00001000

 1835 12:51:56.965677  IMD SMALL   1. 89ffe000 00001000

 1836 12:51:56.969187  FSP MEMORY  2. 89d0e000 002f0000

 1837 12:51:56.972132  CONSOLE     3. 89cee000 00020000

 1838 12:51:56.975779  TIME STAMP  4. 89ced000 00000910

 1839 12:51:56.979084  VBOOT WORK  5. 89cea000 00003000

 1840 12:51:56.982254  VBOOT       6. 89ce9000 00000c0c

 1841 12:51:56.985698  MRC DATA    7. 89ce7000 000018f0

 1842 12:51:56.988518  ROMSTG STCK 8. 89ce6000 00000400

 1843 12:51:56.992025  AFTER CAR   9. 89cdc000 0000a000

 1844 12:51:56.995062  RAMSTAGE   10. 89c80000 0005c000

 1845 12:51:56.998910  REFCODE    11. 89c4b000 00035000

 1846 12:51:57.001970  SMM BACKUP 12. 89c3b000 00010000

 1847 12:51:57.005352  COREBOOT   13. 89c33000 00008000

 1848 12:51:57.008758  ACPI       14. 89c0f000 00024000

 1849 12:51:57.011986  ACPI GNVS  15. 89c0e000 00001000

 1850 12:51:57.015106  RAMOOPS    16. 89b0e000 00100000

 1851 12:51:57.018371  TPM2 TCGLOG17. 89afe000 00010000

 1852 12:51:57.021900  SMBIOS     18. 89afd000 00000800

 1853 12:51:57.023717  IMD small region:

 1854 12:51:57.027496    IMD ROOT    0. 89ffec00 00000400

 1855 12:51:57.030810    FSP RUNTIME 1. 89ffebe0 00000004

 1856 12:51:57.034224    POWER STATE 2. 89ffeba0 00000040

 1857 12:51:57.037780    ROMSTAGE    3. 89ffeb80 00000004

 1858 12:51:57.041238    MEM INFO    4. 89ffe9c0 000001a9

 1859 12:51:57.044984    VPD         5. 89ffe980 00000031

 1860 12:51:57.048315    COREBOOTFWD 6. 89ffe940 00000028

 1861 12:51:57.051253  MTRR: Physical address space:

 1862 12:51:57.057646  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1863 12:51:57.063842  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1864 12:51:57.070029  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6

 1865 12:51:57.075983  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0

 1866 12:51:57.082575  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1867 12:51:57.088613  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1868 12:51:57.094970  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6

 1869 12:51:57.098716  MTRR: Fixed MSR 0x250 0x0606060606060606

 1870 12:51:57.103273  MTRR: Fixed MSR 0x258 0x0606060606060606

 1871 12:51:57.107164  MTRR: Fixed MSR 0x259 0x0000000000000000

 1872 12:51:57.111330  MTRR: Fixed MSR 0x268 0x0606060606060606

 1873 12:51:57.115456  MTRR: Fixed MSR 0x269 0x0606060606060606

 1874 12:51:57.119007  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1875 12:51:57.123655  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1876 12:51:57.127586  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1877 12:51:57.131675  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1878 12:51:57.135510  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1879 12:51:57.139849  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1880 12:51:57.142943  call enable_fixed_mtrr()

 1881 12:51:57.146684  CPU physical address size: 39 bits

 1882 12:51:57.150563  MTRR: default type WB/UC MTRR counts: 7/7.

 1883 12:51:57.154416  MTRR: UC selected as default type.

 1884 12:51:57.160836  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1885 12:51:57.166680  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6

 1886 12:51:57.172950  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6

 1887 12:51:57.179366  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6

 1888 12:51:57.185649  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1889 12:51:57.192156  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1890 12:51:57.197805  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 1891 12:51:57.199380  

 1892 12:51:57.200377  MTRR check

 1893 12:51:57.202438  Fixed MTRRs   : Enabled

 1894 12:51:57.205334  Variable MTRRs: Enabled

 1895 12:51:57.205421  

 1896 12:51:57.209493  MTRR: Fixed MSR 0x250 0x0606060606060606

 1897 12:51:57.213814  MTRR: Fixed MSR 0x258 0x0606060606060606

 1898 12:51:57.217331  MTRR: Fixed MSR 0x259 0x0000000000000000

 1899 12:51:57.221660  MTRR: Fixed MSR 0x268 0x0606060606060606

 1900 12:51:57.225516  MTRR: Fixed MSR 0x269 0x0606060606060606

 1901 12:51:57.229661  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1902 12:51:57.233837  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1903 12:51:57.237720  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1904 12:51:57.242054  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1905 12:51:57.246313  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1906 12:51:57.250129  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1907 12:51:57.256739  BS: BS_WRITE_TABLES times (us): entry 17201 run 490411 exit 157157

 1908 12:51:57.259611  call enable_fixed_mtrr()

 1909 12:51:57.262418  CBFS @ 1d00000 size 300000

 1910 12:51:57.268393  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)

 1911 12:51:57.272469  CPU physical address size: 39 bits

 1912 12:51:57.275712  CBFS: Locating 'fallback/payload'

 1913 12:51:57.279740  MTRR: Fixed MSR 0x250 0x0606060606060606

 1914 12:51:57.283700  MTRR: Fixed MSR 0x250 0x0606060606060606

 1915 12:51:57.288209  MTRR: Fixed MSR 0x258 0x0606060606060606

 1916 12:51:57.292291  MTRR: Fixed MSR 0x259 0x0000000000000000

 1917 12:51:57.296514  MTRR: Fixed MSR 0x268 0x0606060606060606

 1918 12:51:57.300386  MTRR: Fixed MSR 0x269 0x0606060606060606

 1919 12:51:57.304685  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1920 12:51:57.308740  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1921 12:51:57.312385  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1922 12:51:57.316936  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1923 12:51:57.320560  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1924 12:51:57.325081  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1925 12:51:57.329382  MTRR: Fixed MSR 0x258 0x0606060606060606

 1926 12:51:57.331976  call enable_fixed_mtrr()

 1927 12:51:57.336113  MTRR: Fixed MSR 0x259 0x0000000000000000

 1928 12:51:57.340325  MTRR: Fixed MSR 0x268 0x0606060606060606

 1929 12:51:57.343819  MTRR: Fixed MSR 0x269 0x0606060606060606

 1930 12:51:57.348069  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1931 12:51:57.352278  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1932 12:51:57.356315  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1933 12:51:57.360329  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1934 12:51:57.364703  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1935 12:51:57.368563  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1936 12:51:57.372409  CPU physical address size: 39 bits

 1937 12:51:57.375348  call enable_fixed_mtrr()

 1938 12:51:57.379592  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 12:51:57.383372  MTRR: Fixed MSR 0x258 0x0606060606060606

 1940 12:51:57.387653  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 12:51:57.391492  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 12:51:57.395642  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 12:51:57.399824  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 12:51:57.404078  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 12:51:57.408065  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 12:51:57.411883  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 12:51:57.416256  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 12:51:57.420058  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 12:51:57.424344  MTRR: Fixed MSR 0x250 0x0606060606060606

 1950 12:51:57.426873  call enable_fixed_mtrr()

 1951 12:51:57.431299  MTRR: Fixed MSR 0x258 0x0606060606060606

 1952 12:51:57.434878  MTRR: Fixed MSR 0x259 0x0000000000000000

 1953 12:51:57.439251  MTRR: Fixed MSR 0x268 0x0606060606060606

 1954 12:51:57.443247  MTRR: Fixed MSR 0x269 0x0606060606060606

 1955 12:51:57.447838  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1956 12:51:57.451477  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1957 12:51:57.455702  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1958 12:51:57.459827  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1959 12:51:57.463850  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1960 12:51:57.467561  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1961 12:51:57.471543  CPU physical address size: 39 bits

 1962 12:51:57.474468  call enable_fixed_mtrr()

 1963 12:51:57.478077  CPU physical address size: 39 bits

 1964 12:51:57.482269  MTRR: Fixed MSR 0x250 0x0606060606060606

 1965 12:51:57.486140  MTRR: Fixed MSR 0x250 0x0606060606060606

 1966 12:51:57.490371  MTRR: Fixed MSR 0x258 0x0606060606060606

 1967 12:51:57.494517  MTRR: Fixed MSR 0x259 0x0000000000000000

 1968 12:51:57.498212  MTRR: Fixed MSR 0x268 0x0606060606060606

 1969 12:51:57.502203  MTRR: Fixed MSR 0x269 0x0606060606060606

 1970 12:51:57.506457  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1971 12:51:57.510859  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1972 12:51:57.515068  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1973 12:51:57.518541  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1974 12:51:57.522870  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1975 12:51:57.526980  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1976 12:51:57.531391  MTRR: Fixed MSR 0x258 0x0606060606060606

 1977 12:51:57.534027  call enable_fixed_mtrr()

 1978 12:51:57.538167  MTRR: Fixed MSR 0x259 0x0000000000000000

 1979 12:51:57.542323  MTRR: Fixed MSR 0x268 0x0606060606060606

 1980 12:51:57.546176  MTRR: Fixed MSR 0x269 0x0606060606060606

 1981 12:51:57.550021  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1982 12:51:57.554450  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1983 12:51:57.558387  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1984 12:51:57.562853  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1985 12:51:57.566468  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1986 12:51:57.570691  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1987 12:51:57.574552  CPU physical address size: 39 bits

 1988 12:51:57.577261  call enable_fixed_mtrr()

 1989 12:51:57.580888  CPU physical address size: 39 bits

 1990 12:51:57.584554  CPU physical address size: 39 bits

 1991 12:51:57.588158  CBFS: Found @ offset 1cf4c0 size 3a954

 1992 12:51:57.592965  Checking segment from ROM address 0xffecf4f8

 1993 12:51:57.597015  Checking segment from ROM address 0xffecf514

 1994 12:51:57.601840  Loading segment from ROM address 0xffecf4f8

 1995 12:51:57.603792    code (compression=0)

 1996 12:51:57.612737    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c

 1997 12:51:57.621107  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c

 1998 12:51:57.623205  it's not compressed!

 1999 12:51:57.705383  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530

 2000 12:51:57.711327  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc

 2001 12:51:57.720051  Loading segment from ROM address 0xffecf514

 2002 12:51:57.722087    Entry Point 0x30100018

 2003 12:51:57.723732  Loaded segments

 2004 12:51:57.733805  Finalizing chipset.

 2005 12:51:57.735415  Finalizing SMM.

 2006 12:51:57.741946  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466583 exit 11547

 2007 12:51:57.744858  mp_park_aps done after 0 msecs.

 2008 12:51:57.748930  Jumping to boot code at 30100018(89c33000)

 2009 12:51:57.757842  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes

 2010 12:51:57.758341  

 2011 12:51:57.758737  

 2012 12:51:57.759441  

 2013 12:51:57.761219  Starting depthcharge on sarien...

 2014 12:51:57.763927  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2015 12:51:57.764518  start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
 2016 12:51:57.764991  Setting prompt string to ['sarien:']
 2017 12:51:57.765441  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:28)
 2018 12:51:57.766273  

 2019 12:51:57.768841  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2020 12:51:57.769590  

 2021 12:51:57.776710  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2022 12:51:57.777563  

 2023 12:51:57.784676  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!

 2024 12:51:57.785122  

 2025 12:51:57.786714  BIOS MMAP details:

 2026 12:51:57.787534  

 2027 12:51:57.789632  IFD Base Offset  : 0x1000000

 2028 12:51:57.790348  

 2029 12:51:57.792529  IFD End Offset   : 0x2000000

 2030 12:51:57.793268  

 2031 12:51:57.795349  MMAP Size        : 0x1000000

 2032 12:51:57.796119  

 2033 12:51:57.798519  MMAP Start       : 0xff000000

 2034 12:51:57.800167  

 2035 12:51:57.806510  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff

 2036 12:51:57.810466  

 2037 12:51:57.814983  New NVMe Controller 0x3214e110 @ 00:1d:04

 2038 12:51:57.815435  

 2039 12:51:57.818832  New NVMe Controller 0x3214e1d8 @ 00:1d:00

 2040 12:51:57.819203  

 2041 12:51:57.824278  The GBB signature is at 0x30000014 and is:  24 47 42 42

 2042 12:51:57.828457  

 2043 12:51:57.830595  Wipe memory regions:

 2044 12:51:57.831030  

 2045 12:51:57.834587  	[0x00000000001000, 0x000000000a0000)

 2046 12:51:57.834673  

 2047 12:51:57.838045  	[0x00000000100000, 0x00000030000000)

 2048 12:51:57.920691  

 2049 12:51:57.924362  	[0x00000032751910, 0x00000089afd000)

 2050 12:51:58.074660  

 2051 12:51:58.078083  	[0x00000100000000, 0x0000026e800000)

 2052 12:51:59.087660  

 2053 12:51:59.089361  R8152: Initializing

 2054 12:51:59.089847  

 2055 12:51:59.092447  Version 6 (ocp_data = 5c30)

 2056 12:51:59.093430  

 2057 12:51:59.095941  R8152: Done initializing

 2058 12:51:59.096756  

 2059 12:51:59.097864  Adding net device

 2060 12:51:59.098604  

 2061 12:51:59.103674  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38

 2062 12:51:59.104601  

 2063 12:51:59.105000  

 2064 12:51:59.105347  

 2065 12:51:59.106080  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2067 12:51:59.207689  sarien: tftpboot 192.168.201.1 9729798/tftp-deploy-68gj59p8/kernel/bzImage 9729798/tftp-deploy-68gj59p8/kernel/cmdline 9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz

 2068 12:51:59.208294  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2069 12:51:59.208718  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
 2070 12:51:59.211668  tftpboot 192.168.201.1 9729798/tftp-deploy-68gj59p8/kernel/bzImage 9729798/tftp-deploy-68gj59p8/kernel/cmdline 9729798/tftp-deploy-68gj59p8/ramdisk/ramdisk.cpio.gz

 2071 12:51:59.212090  

 2072 12:51:59.212766  Waiting for link

 2073 12:51:59.411902  

 2074 12:51:59.412920  done.

 2075 12:51:59.413946  

 2076 12:51:59.415115  MAC: 00:24:32:30:79:bd

 2077 12:51:59.415542  

 2078 12:51:59.417646  Sending DHCP discover... done.

 2079 12:51:59.418419  

 2080 12:51:59.420376  Waiting for reply... done.

 2081 12:51:59.420818  

 2082 12:51:59.423551  Sending DHCP request... done.

 2083 12:51:59.424331  

 2084 12:51:59.428264  Waiting for reply... done.

 2085 12:51:59.429056  

 2086 12:51:59.430863  My ip is 192.168.201.166

 2087 12:51:59.431615  

 2088 12:51:59.434603  The DHCP server ip is 192.168.201.1

 2089 12:51:59.435510  

 2090 12:51:59.439801  TFTP server IP predefined by user: 192.168.201.1

 2091 12:51:59.440645  

 2092 12:51:59.446968  Bootfile predefined by user: 9729798/tftp-deploy-68gj59p8/kernel/bzImage

 2093 12:51:59.447825  

 2094 12:51:59.450206  Sending tftp read request... done.

 2095 12:51:59.450632  

 2096 12:51:59.454877  Waiting for the transfer... 

 2097 12:51:59.455796  

 2098 12:52:00.119655  00000000 ################################################################

 2099 12:52:00.120581  

 2100 12:52:00.718438  00080000 ################################################################

 2101 12:52:00.719069  

 2102 12:52:01.267434  00100000 ################################################################

 2103 12:52:01.268037  

 2104 12:52:01.836352  00180000 ################################################################

 2105 12:52:01.836787  

 2106 12:52:02.395503  00200000 ################################################################

 2107 12:52:02.395941  

 2108 12:52:03.007212  00280000 ################################################################

 2109 12:52:03.007773  

 2110 12:52:03.577844  00300000 ################################################################

 2111 12:52:03.578213  

 2112 12:52:04.125724  00380000 ################################################################

 2113 12:52:04.126117  

 2114 12:52:04.641825  00400000 ################################################################

 2115 12:52:04.642290  

 2116 12:52:05.182552  00480000 ################################################################

 2117 12:52:05.182990  

 2118 12:52:05.691012  00500000 ################################################################

 2119 12:52:05.691475  

 2120 12:52:06.217065  00580000 ################################################################

 2121 12:52:06.217434  

 2122 12:52:06.748323  00600000 ################################################################

 2123 12:52:06.748701  

 2124 12:52:07.297239  00680000 ################################################################

 2125 12:52:07.297649  

 2126 12:52:07.810751  00700000 ################################################################

 2127 12:52:07.811112  

 2128 12:52:08.317167  00780000 ################################################################

 2129 12:52:08.317576  

 2130 12:52:08.827653  00800000 ################################################################

 2131 12:52:08.828373  

 2132 12:52:09.344475  00880000 ################################################################

 2133 12:52:09.344877  

 2134 12:52:09.903836  00900000 ################################################################

 2135 12:52:09.904230  

 2136 12:52:10.519877  00980000 ################################################################

 2137 12:52:10.520661  

 2138 12:52:11.080220  00a00000 ################################################################

 2139 12:52:11.080634  

 2140 12:52:11.595318  00a80000 ################################################################

 2141 12:52:11.596003  

 2142 12:52:11.951812  00b00000 ########################################### done.

 2143 12:52:11.951993  

 2144 12:52:11.955057  The bootfile was 11878592 bytes long.

 2145 12:52:11.955400  

 2146 12:52:11.959155  Sending tftp read request... done.

 2147 12:52:11.959271  

 2148 12:52:11.961567  Waiting for the transfer... 

 2149 12:52:11.961982  

 2150 12:52:12.521206  00000000 ################################################################

 2151 12:52:12.521629  

 2152 12:52:13.066683  00080000 ################################################################

 2153 12:52:13.067079  

 2154 12:52:13.615080  00100000 ################################################################

 2155 12:52:13.615478  

 2156 12:52:14.165949  00180000 ################################################################

 2157 12:52:14.166344  

 2158 12:52:14.710302  00200000 ################################################################

 2159 12:52:14.711135  

 2160 12:52:15.255035  00280000 ################################################################

 2161 12:52:15.255435  

 2162 12:52:15.806428  00300000 ################################################################

 2163 12:52:15.806835  

 2164 12:52:16.355273  00380000 ################################################################

 2165 12:52:16.356145  

 2166 12:52:16.906056  00400000 ################################################################

 2167 12:52:16.906882  

 2168 12:52:17.461034  00480000 ################################################################

 2169 12:52:17.461505  

 2170 12:52:18.003953  00500000 ################################################################

 2171 12:52:18.004356  

 2172 12:52:18.554054  00580000 ################################################################

 2173 12:52:18.554473  

 2174 12:52:19.121342  00600000 ################################################################

 2175 12:52:19.122499  

 2176 12:52:19.695214  00680000 ################################################################

 2177 12:52:19.695638  

 2178 12:52:19.717650  00700000 ### done.

 2179 12:52:19.717792  

 2180 12:52:19.720644  Sending tftp read request... done.

 2181 12:52:19.720726  

 2182 12:52:19.723987  Waiting for the transfer... 

 2183 12:52:19.724069  

 2184 12:52:19.725651  00000000 # done.

 2185 12:52:19.725780  

 2186 12:52:19.734716  Command line loaded dynamically from TFTP file: 9729798/tftp-deploy-68gj59p8/kernel/cmdline

 2187 12:52:19.734802  

 2188 12:52:19.761139  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729798/extract-nfsrootfs-sgbollop,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2189 12:52:19.765643  

 2190 12:52:19.769041  Shutting down all USB controllers.

 2191 12:52:19.769513  

 2192 12:52:19.771911  Removing current net device

 2193 12:52:19.773582  

 2194 12:52:19.775728  EC: exit firmware mode

 2195 12:52:19.776960  

 2196 12:52:19.779004  Finalizing coreboot

 2197 12:52:19.779962  

 2198 12:52:19.785412  Exiting depthcharge with code 4 at timestamp: 29742021

 2199 12:52:19.785812  

 2200 12:52:19.786162  

 2201 12:52:19.787657  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2202 12:52:19.787780  start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
 2203 12:52:19.787874  Setting prompt string to ['Linux version [0-9]']
 2204 12:52:19.787947  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2205 12:52:19.788018  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2206 12:52:19.788204  Starting kernel ...

 2207 12:52:19.788277  

 2208 12:52:19.788340  

 2210 12:56:25.788012  end: 2.2.5 auto-login-action (duration 00:04:06) [common]
 2212 12:56:25.788227  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 246 seconds'
 2214 12:56:25.788385  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2217 12:56:25.788644  end: 2 depthcharge-action (duration 00:05:00) [common]
 2219 12:56:25.788863  Cleaning after the job
 2220 12:56:25.788942  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/ramdisk
 2221 12:56:25.789501  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/kernel
 2222 12:56:25.790306  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/nfsrootfs
 2223 12:56:25.820115  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729798/tftp-deploy-68gj59p8/modules
 2224 12:56:25.820833  start: 5.1 power-off (timeout 00:00:30) [common]
 2225 12:56:25.820996  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
 2226 12:56:33.175126  >> Command sent successfully.

 2227 12:56:33.177460  Returned 0 in 7 seconds
 2228 12:56:33.277889  end: 5.1 power-off (duration 00:00:07) [common]
 2230 12:56:33.278226  start: 5.2 read-feedback (timeout 00:09:53) [common]
 2231 12:56:33.278478  Listened to connection for namespace 'common' for up to 1s
 2232 12:56:34.281856  Finalising connection for namespace 'common'
 2233 12:56:34.282186  Disconnecting from shell: Finalise
 2234 12:56:34.282378  

 2235 12:56:34.383488  end: 5.2 read-feedback (duration 00:00:01) [common]
 2236 12:56:34.384142  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729798
 2237 12:56:34.509444  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729798
 2238 12:56:34.509661  JobError: Your job cannot terminate cleanly.