Boot log: asus-C436FA-Flip-hatch

    1 12:56:28.982501  lava-dispatcher, installed at version: 2023.01
    2 12:56:28.982732  start: 0 validate
    3 12:56:28.982873  Start time: 2023-03-22 12:56:28.982865+00:00 (UTC)
    4 12:56:28.983031  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:56:28.983202  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:56:29.287465  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:56:29.287676  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:56:29.572521  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:56:29.572711  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:56:29.861704  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:56:29.861898  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:56:30.150632  validate duration: 1.17
   14 12:56:30.151063  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:56:30.151227  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:56:30.151366  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:56:30.151486  Not decompressing ramdisk as can be used compressed.
   18 12:56:30.151590  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
   19 12:56:30.151696  saving as /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/ramdisk/initrd.cpio.gz
   20 12:56:30.151778  total size: 5672849 (5MB)
   21 12:56:30.152738  progress   0% (0MB)
   22 12:56:30.154570  progress   5% (0MB)
   23 12:56:30.156466  progress  10% (0MB)
   24 12:56:30.158112  progress  15% (0MB)
   25 12:56:30.159908  progress  20% (1MB)
   26 12:56:30.161674  progress  25% (1MB)
   27 12:56:30.163259  progress  30% (1MB)
   28 12:56:30.165016  progress  35% (1MB)
   29 12:56:30.166800  progress  40% (2MB)
   30 12:56:30.168437  progress  45% (2MB)
   31 12:56:30.170169  progress  50% (2MB)
   32 12:56:30.171919  progress  55% (3MB)
   33 12:56:30.173431  progress  60% (3MB)
   34 12:56:30.175144  progress  65% (3MB)
   35 12:56:30.176826  progress  70% (3MB)
   36 12:56:30.178350  progress  75% (4MB)
   37 12:56:30.180027  progress  80% (4MB)
   38 12:56:30.181718  progress  85% (4MB)
   39 12:56:30.183236  progress  90% (4MB)
   40 12:56:30.184943  progress  95% (5MB)
   41 12:56:30.186794  progress 100% (5MB)
   42 12:56:30.186931  5MB downloaded in 0.04s (153.92MB/s)
   43 12:56:30.187119  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:56:30.187428  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:56:30.187549  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:56:30.187661  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:56:30.187791  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   49 12:56:30.187883  saving as /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/kernel/bzImage
   50 12:56:30.187956  total size: 11878592 (11MB)
   51 12:56:30.188038  No compression specified
   52 12:56:30.189029  progress   0% (0MB)
   53 12:56:30.192564  progress   5% (0MB)
   54 12:56:30.195870  progress  10% (1MB)
   55 12:56:30.199203  progress  15% (1MB)
   56 12:56:30.202499  progress  20% (2MB)
   57 12:56:30.205802  progress  25% (2MB)
   58 12:56:30.209109  progress  30% (3MB)
   59 12:56:30.212431  progress  35% (3MB)
   60 12:56:30.215929  progress  40% (4MB)
   61 12:56:30.219331  progress  45% (5MB)
   62 12:56:30.222784  progress  50% (5MB)
   63 12:56:30.226243  progress  55% (6MB)
   64 12:56:30.229711  progress  60% (6MB)
   65 12:56:30.233095  progress  65% (7MB)
   66 12:56:30.236493  progress  70% (7MB)
   67 12:56:30.239885  progress  75% (8MB)
   68 12:56:30.243480  progress  80% (9MB)
   69 12:56:30.246892  progress  85% (9MB)
   70 12:56:30.250265  progress  90% (10MB)
   71 12:56:30.253654  progress  95% (10MB)
   72 12:56:30.257035  progress 100% (11MB)
   73 12:56:30.257238  11MB downloaded in 0.07s (163.52MB/s)
   74 12:56:30.257412  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:56:30.257702  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:56:30.257819  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:56:30.257937  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:56:30.258080  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
   80 12:56:30.258169  saving as /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/nfsrootfs/full.rootfs.tar
   81 12:56:30.258245  total size: 125916488 (120MB)
   82 12:56:30.258318  Using unxz to decompress xz
   83 12:56:30.261849  progress   0% (0MB)
   84 12:56:30.761638  progress   5% (6MB)
   85 12:56:31.265490  progress  10% (12MB)
   86 12:56:31.773322  progress  15% (18MB)
   87 12:56:32.283372  progress  20% (24MB)
   88 12:56:32.653478  progress  25% (30MB)
   89 12:56:33.035069  progress  30% (36MB)
   90 12:56:33.320742  progress  35% (42MB)
   91 12:56:33.531946  progress  40% (48MB)
   92 12:56:33.929121  progress  45% (54MB)
   93 12:56:34.330526  progress  50% (60MB)
   94 12:56:34.709305  progress  55% (66MB)
   95 12:56:35.102921  progress  60% (72MB)
   96 12:56:35.474025  progress  65% (78MB)
   97 12:56:35.901291  progress  70% (84MB)
   98 12:56:36.365402  progress  75% (90MB)
   99 12:56:36.827266  progress  80% (96MB)
  100 12:56:36.936837  progress  85% (102MB)
  101 12:56:37.115850  progress  90% (108MB)
  102 12:56:37.483147  progress  95% (114MB)
  103 12:56:37.895798  progress 100% (120MB)
  104 12:56:37.902422  120MB downloaded in 7.64s (15.71MB/s)
  105 12:56:37.902746  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:56:37.903056  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:56:37.903206  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:56:37.903315  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:56:37.903452  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
  111 12:56:37.903538  saving as /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/modules/modules.tar
  112 12:56:37.903613  total size: 1255052 (1MB)
  113 12:56:37.903686  Using unxz to decompress xz
  114 12:56:37.906988  progress   2% (0MB)
  115 12:56:37.907596  progress   7% (0MB)
  116 12:56:37.911185  progress  13% (0MB)
  117 12:56:37.915587  progress  18% (0MB)
  118 12:56:37.919913  progress  23% (0MB)
  119 12:56:37.924258  progress  28% (0MB)
  120 12:56:37.928742  progress  33% (0MB)
  121 12:56:37.932891  progress  39% (0MB)
  122 12:56:37.937293  progress  44% (0MB)
  123 12:56:37.941435  progress  49% (0MB)
  124 12:56:37.945644  progress  54% (0MB)
  125 12:56:37.949817  progress  60% (0MB)
  126 12:56:37.954113  progress  65% (0MB)
  127 12:56:37.958202  progress  70% (0MB)
  128 12:56:37.962367  progress  75% (0MB)
  129 12:56:37.966575  progress  80% (0MB)
  130 12:56:37.971112  progress  86% (1MB)
  131 12:56:37.975586  progress  91% (1MB)
  132 12:56:37.979815  progress  96% (1MB)
  133 12:56:37.990089  1MB downloaded in 0.09s (13.84MB/s)
  134 12:56:37.990392  end: 1.4.1 http-download (duration 00:00:00) [common]
  136 12:56:37.990692  end: 1.4 download-retry (duration 00:00:00) [common]
  137 12:56:37.990801  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  138 12:56:37.990914  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  139 12:56:39.926790  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729820/extract-nfsrootfs-wptcchhx
  140 12:56:39.927014  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  141 12:56:39.927202  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  142 12:56:39.927357  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc
  143 12:56:39.927475  makedir: /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin
  144 12:56:39.927573  makedir: /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/tests
  145 12:56:39.927666  makedir: /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/results
  146 12:56:39.927778  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-add-keys
  147 12:56:39.927931  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-add-sources
  148 12:56:39.928065  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-background-process-start
  149 12:56:39.928193  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-background-process-stop
  150 12:56:39.928319  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-common-functions
  151 12:56:39.928445  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-echo-ipv4
  152 12:56:39.928571  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-install-packages
  153 12:56:39.928695  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-installed-packages
  154 12:56:39.928819  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-os-build
  155 12:56:39.928943  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-probe-channel
  156 12:56:39.929068  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-probe-ip
  157 12:56:39.929193  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-target-ip
  158 12:56:39.929317  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-target-mac
  159 12:56:39.929442  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-target-storage
  160 12:56:39.929570  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-case
  161 12:56:39.929695  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-event
  162 12:56:39.929820  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-feedback
  163 12:56:39.929943  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-raise
  164 12:56:39.930066  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-reference
  165 12:56:39.930190  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-runner
  166 12:56:39.930315  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-set
  167 12:56:39.930440  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-test-shell
  168 12:56:39.930568  Updating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-install-packages (oe)
  169 12:56:39.930698  Updating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/bin/lava-installed-packages (oe)
  170 12:56:39.930808  Creating /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/environment
  171 12:56:39.930910  LAVA metadata
  172 12:56:39.930989  - LAVA_JOB_ID=9729820
  173 12:56:39.931062  - LAVA_DISPATCHER_IP=192.168.201.1
  174 12:56:39.931182  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  175 12:56:39.931258  skipped lava-vland-overlay
  176 12:56:39.931345  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  177 12:56:39.931438  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  178 12:56:39.931509  skipped lava-multinode-overlay
  179 12:56:39.931593  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  180 12:56:39.931686  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  181 12:56:39.931769  Loading test definitions
  182 12:56:39.931872  start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
  183 12:56:39.931951  Using /lava-9729820 at stage 0
  184 12:56:39.932059  Fetching tests from https://github.com/kernelci/test-definitions
  185 12:56:39.932149  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/0/tests/0_ltp-ipc'
  186 12:56:44.339358  Running '/usr/bin/git checkout kernelci.org
  187 12:56:44.494244  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  188 12:56:44.495079  uuid=9729820_1.5.2.3.1 testdef=None
  189 12:56:44.495274  end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
  191 12:56:44.495566  start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
  192 12:56:44.496452  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  194 12:56:44.496741  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
  195 12:56:44.497894  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  197 12:56:44.498183  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
  198 12:56:44.499304  runner path: /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/0/tests/0_ltp-ipc test_uuid 9729820_1.5.2.3.1
  199 12:56:44.499413  SKIPFILE='skipfile-lkft.yaml'
  200 12:56:44.499492  SKIP_INSTALL='true'
  201 12:56:44.499564  TST_CMDFILES='ipc'
  202 12:56:44.499721  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  204 12:56:44.499972  Creating lava-test-runner.conf files
  205 12:56:44.500049  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729820/lava-overlay-ur715cuc/lava-9729820/0 for stage 0
  206 12:56:44.500148  - 0_ltp-ipc
  207 12:56:44.500264  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  208 12:56:44.500370  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  209 12:56:52.839094  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  210 12:56:52.839286  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  211 12:56:52.839398  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  212 12:56:52.839511  end: 1.5.2 lava-overlay (duration 00:00:13) [common]
  213 12:56:52.839620  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  214 12:56:52.962529  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  215 12:56:52.962937  start: 1.5.4 extract-modules (timeout 00:09:37) [common]
  216 12:56:52.963077  extracting modules file /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729820/extract-nfsrootfs-wptcchhx
  217 12:56:52.994839  extracting modules file /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729820/extract-overlay-ramdisk-8helkjol/ramdisk
  218 12:56:53.026246  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  219 12:56:53.026452  start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
  220 12:56:53.026577  [common] Applying overlay to NFS
  221 12:56:53.026663  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729820/compress-overlay-h84os_yj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729820/extract-nfsrootfs-wptcchhx
  222 12:56:53.964052  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  223 12:56:53.964257  start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
  224 12:56:53.964390  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  225 12:56:53.964523  start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
  226 12:56:53.964627  Building ramdisk /var/lib/lava/dispatcher/tmp/9729820/extract-overlay-ramdisk-8helkjol/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729820/extract-overlay-ramdisk-8helkjol/ramdisk
  227 12:56:54.024085  >> 40130 blocks

  228 12:56:54.801142  rename /var/lib/lava/dispatcher/tmp/9729820/extract-overlay-ramdisk-8helkjol/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz
  229 12:56:54.801705  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  230 12:56:54.801910  start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
  231 12:56:54.802090  start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
  232 12:56:54.802246  No mkimage arch provided, not using FIT.
  233 12:56:54.802408  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  234 12:56:54.802564  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  235 12:56:54.802733  end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
  236 12:56:54.802885  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
  237 12:56:54.802986  No LXC device requested
  238 12:56:54.803100  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  239 12:56:54.803242  start: 1.7 deploy-device-env (timeout 00:09:35) [common]
  240 12:56:54.803350  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  241 12:56:54.803441  Checking files for TFTP limit of 4294967296 bytes.
  242 12:56:54.803893  end: 1 tftp-deploy (duration 00:00:25) [common]
  243 12:56:54.804019  start: 2 depthcharge-action (timeout 00:05:00) [common]
  244 12:56:54.804131  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  245 12:56:54.804290  substitutions:
  246 12:56:54.804374  - {DTB}: None
  247 12:56:54.804452  - {INITRD}: 9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz
  248 12:56:54.804525  - {KERNEL}: 9729820/tftp-deploy-7yzo1eu2/kernel/bzImage
  249 12:56:54.804595  - {LAVA_MAC}: None
  250 12:56:54.804668  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729820/extract-nfsrootfs-wptcchhx
  251 12:56:54.804738  - {NFS_SERVER_IP}: 192.168.201.1
  252 12:56:54.804803  - {PRESEED_CONFIG}: None
  253 12:56:54.804874  - {PRESEED_LOCAL}: None
  254 12:56:54.804938  - {RAMDISK}: 9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz
  255 12:56:54.805002  - {ROOT_PART}: None
  256 12:56:54.805079  - {ROOT}: None
  257 12:56:54.805148  - {SERVER_IP}: 192.168.201.1
  258 12:56:54.805233  - {TEE}: None
  259 12:56:54.805299  Parsed boot commands:
  260 12:56:54.805363  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  261 12:56:54.805557  Parsed boot commands: tftpboot 192.168.201.1 9729820/tftp-deploy-7yzo1eu2/kernel/bzImage 9729820/tftp-deploy-7yzo1eu2/kernel/cmdline 9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz
  262 12:56:54.805672  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  263 12:56:54.805791  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  264 12:56:54.805913  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  265 12:56:54.806020  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  266 12:56:54.806112  Not connected, no need to disconnect.
  267 12:56:54.806204  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  268 12:56:54.806318  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  269 12:56:54.806402  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  270 12:56:54.810173  Setting prompt string to ['lava-test: # ']
  271 12:56:54.810571  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  272 12:56:54.810717  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  273 12:56:54.810833  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  274 12:56:54.810969  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  275 12:56:54.811190  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  276 12:56:59.944373  >> Command sent successfully.

  277 12:56:59.946742  Returned 0 in 5 seconds
  278 12:57:00.047232  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  280 12:57:00.047666  end: 2.2.2 reset-device (duration 00:00:05) [common]
  281 12:57:00.047826  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  282 12:57:00.047941  Setting prompt string to 'Starting depthcharge on Helios...'
  283 12:57:00.048046  Changing prompt to 'Starting depthcharge on Helios...'
  284 12:57:00.048148  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  285 12:57:00.048487  [Enter `^Ec?' for help]

  286 12:57:00.670216  

  287 12:57:00.670405  

  288 12:57:00.680168  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  289 12:57:00.683404  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  290 12:57:00.690095  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  291 12:57:00.693504  CPU: AES supported, TXT NOT supported, VT supported

  292 12:57:00.700162  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  293 12:57:00.703519  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  294 12:57:00.710689  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  295 12:57:00.713831  VBOOT: Loading verstage.

  296 12:57:00.717082  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  297 12:57:00.723688  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  298 12:57:00.726952  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  299 12:57:00.730251  CBFS @ c08000 size 3f8000

  300 12:57:00.737197  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  301 12:57:00.740569  CBFS: Locating 'fallback/verstage'

  302 12:57:00.743137  CBFS: Found @ offset 10fb80 size 1072c

  303 12:57:00.747137  

  304 12:57:00.747257  

  305 12:57:00.757146  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  306 12:57:00.771221  Probing TPM: . done!

  307 12:57:00.774618  TPM ready after 0 ms

  308 12:57:00.777976  Connected to device vid:did:rid of 1ae0:0028:00

  309 12:57:00.788165  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  310 12:57:00.791552  Initialized TPM device CR50 revision 0

  311 12:57:00.835064  tlcl_send_startup: Startup return code is 0

  312 12:57:00.835240  TPM: setup succeeded

  313 12:57:00.847711  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  314 12:57:00.851496  Chrome EC: UHEPI supported

  315 12:57:00.854802  Phase 1

  316 12:57:00.858173  FMAP: area GBB found @ c05000 (12288 bytes)

  317 12:57:00.864604  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  318 12:57:00.867934  Phase 2

  319 12:57:00.868046  Phase 3

  320 12:57:00.871193  FMAP: area GBB found @ c05000 (12288 bytes)

  321 12:57:00.877849  VB2:vb2_report_dev_firmware() This is developer signed firmware

  322 12:57:00.884553  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 12:57:00.887831  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  324 12:57:00.894487  VB2:vb2_verify_keyblock() Checking keyblock signature...

  325 12:57:00.910205  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  326 12:57:00.913611  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  327 12:57:00.920186  VB2:vb2_verify_fw_preamble() Verifying preamble.

  328 12:57:00.924709  Phase 4

  329 12:57:00.927888  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  330 12:57:00.934425  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  331 12:57:01.113911  VB2:vb2_rsa_verify_digest() Digest check failed!

  332 12:57:01.120498  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  333 12:57:01.120651  Saving nvdata

  334 12:57:01.123917  Reboot requested (10020007)

  335 12:57:01.127225  board_reset() called!

  336 12:57:01.127321  full_reset() called!

  337 12:57:05.648014  

  338 12:57:05.648189  

  339 12:57:05.648509  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  340 12:57:05.651139  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  341 12:57:05.655194  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  342 12:57:05.662585  CPU: AES supported, TXT NOT supported, VT supported

  343 12:57:05.666750  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  344 12:57:05.670007  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  345 12:57:05.677513  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  346 12:57:05.681404  VBOOT: Loading verstage.

  347 12:57:05.684644  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  348 12:57:05.688531  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  349 12:57:05.696248  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  350 12:57:05.700205  CBFS @ c08000 size 3f8000

  351 12:57:05.704009  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  352 12:57:05.707401  CBFS: Locating 'fallback/verstage'

  353 12:57:05.710553  CBFS: Found @ offset 10fb80 size 1072c

  354 12:57:05.714468  

  355 12:57:05.714604  

  356 12:57:05.725307  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  357 12:57:05.738811  Probing TPM: . done!

  358 12:57:05.738995  TPM ready after 0 ms

  359 12:57:05.746795  Connected to device vid:did:rid of 1ae0:0028:00

  360 12:57:05.754832  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  361 12:57:05.808763  Initialized TPM device CR50 revision 0

  362 12:57:05.817414  tlcl_send_startup: Startup return code is 0

  363 12:57:05.817568  TPM: setup succeeded

  364 12:57:05.830181  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  365 12:57:05.834055  Chrome EC: UHEPI supported

  366 12:57:05.837479  Phase 1

  367 12:57:05.840754  FMAP: area GBB found @ c05000 (12288 bytes)

  368 12:57:05.847519  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  369 12:57:05.854232  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  370 12:57:05.857440  Recovery requested (1009000e)

  371 12:57:05.863540  Saving nvdata

  372 12:57:05.869490  tlcl_extend: response is 0

  373 12:57:05.878190  tlcl_extend: response is 0

  374 12:57:05.884815  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  375 12:57:05.888144  CBFS @ c08000 size 3f8000

  376 12:57:05.895281  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  377 12:57:05.898499  CBFS: Locating 'fallback/romstage'

  378 12:57:05.901876  CBFS: Found @ offset 80 size 145fc

  379 12:57:05.905064  Accumulated console time in verstage 98 ms

  380 12:57:05.905175  

  381 12:57:05.905256  

  382 12:57:05.918537  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  383 12:57:05.924765  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  384 12:57:05.928002  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  385 12:57:05.931278  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  386 12:57:05.938305  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  387 12:57:05.941535  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  388 12:57:05.944934  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  389 12:57:05.948178  TCO_STS:   0000 0000

  390 12:57:05.951534  GEN_PMCON: e0015238 00000200

  391 12:57:05.954840  GBLRST_CAUSE: 00000000 00000000

  392 12:57:05.954951  prev_sleep_state 5

  393 12:57:05.958138  Boot Count incremented to 48652

  394 12:57:05.964700  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  395 12:57:05.968072  CBFS @ c08000 size 3f8000

  396 12:57:05.974712  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  397 12:57:05.974814  CBFS: Locating 'fspm.bin'

  398 12:57:05.981429  CBFS: Found @ offset 5ffc0 size 71000

  399 12:57:05.984746  Chrome EC: UHEPI supported

  400 12:57:05.991407  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  401 12:57:05.994742  Probing TPM:  done!

  402 12:57:06.001252  Connected to device vid:did:rid of 1ae0:0028:00

  403 12:57:06.011416  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  404 12:57:06.017063  Initialized TPM device CR50 revision 0

  405 12:57:06.026483  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  406 12:57:06.033041  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  407 12:57:06.036415  MRC cache found, size 1948

  408 12:57:06.039683  bootmode is set to: 2

  409 12:57:06.042953  PRMRR disabled by config.

  410 12:57:06.046230  SPD INDEX = 1

  411 12:57:06.049489  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  412 12:57:06.052952  CBFS @ c08000 size 3f8000

  413 12:57:06.059465  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  414 12:57:06.059559  CBFS: Locating 'spd.bin'

  415 12:57:06.062671  CBFS: Found @ offset 5fb80 size 400

  416 12:57:06.066023  SPD: module type is LPDDR3

  417 12:57:06.069376  SPD: module part is 

  418 12:57:06.076175  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  419 12:57:06.079432  SPD: device width 4 bits, bus width 8 bits

  420 12:57:06.082081  SPD: module size is 4096 MB (per channel)

  421 12:57:06.085456  memory slot: 0 configuration done.

  422 12:57:06.088915  memory slot: 2 configuration done.

  423 12:57:06.140763  CBMEM:

  424 12:57:06.144027  IMD: root @ 99fff000 254 entries.

  425 12:57:06.146984  IMD: root @ 99ffec00 62 entries.

  426 12:57:06.150475  External stage cache:

  427 12:57:06.153847  IMD: root @ 9abff000 254 entries.

  428 12:57:06.156885  IMD: root @ 9abfec00 62 entries.

  429 12:57:06.163432  Chrome EC: clear events_b mask to 0x0000000020004000

  430 12:57:06.176173  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  431 12:57:06.189507  tlcl_write: response is 0

  432 12:57:06.198928  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  433 12:57:06.205432  MRC: TPM MRC hash updated successfully.

  434 12:57:06.205532  2 DIMMs found

  435 12:57:06.208844  SMM Memory Map

  436 12:57:06.212254  SMRAM       : 0x9a000000 0x1000000

  437 12:57:06.214928   Subregion 0: 0x9a000000 0xa00000

  438 12:57:06.218281   Subregion 1: 0x9aa00000 0x200000

  439 12:57:06.221479   Subregion 2: 0x9ac00000 0x400000

  440 12:57:06.225297  top_of_ram = 0x9a000000

  441 12:57:06.228477  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  442 12:57:06.235252  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  443 12:57:06.238553  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  444 12:57:06.245109  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  445 12:57:06.248400  CBFS @ c08000 size 3f8000

  446 12:57:06.251582  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  447 12:57:06.254827  CBFS: Locating 'fallback/postcar'

  448 12:57:06.261201  CBFS: Found @ offset 107000 size 4b44

  449 12:57:06.264464  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  450 12:57:06.277004  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  451 12:57:06.280346  Processing 180 relocs. Offset value of 0x97c0c000

  452 12:57:06.289156  Accumulated console time in romstage 286 ms

  453 12:57:06.289258  

  454 12:57:06.289339  

  455 12:57:06.298524  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  456 12:57:06.305157  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  457 12:57:06.308356  CBFS @ c08000 size 3f8000

  458 12:57:06.314925  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  459 12:57:06.318373  CBFS: Locating 'fallback/ramstage'

  460 12:57:06.321699  CBFS: Found @ offset 43380 size 1b9e8

  461 12:57:06.327890  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  462 12:57:06.360431  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  463 12:57:06.363590  Processing 3976 relocs. Offset value of 0x98db0000

  464 12:57:06.370199  Accumulated console time in postcar 52 ms

  465 12:57:06.370291  

  466 12:57:06.370369  

  467 12:57:06.379957  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  468 12:57:06.386512  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  469 12:57:06.389945  WARNING: RO_VPD is uninitialized or empty.

  470 12:57:06.393279  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  471 12:57:06.400081  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  472 12:57:06.400185  Normal boot.

  473 12:57:06.406751  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  474 12:57:06.410084  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:57:06.413392  CBFS @ c08000 size 3f8000

  476 12:57:06.420136  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:57:06.423420  CBFS: Locating 'cpu_microcode_blob.bin'

  478 12:57:06.426748  CBFS: Found @ offset 14700 size 2ec00

  479 12:57:06.430023  microcode: sig=0x806ec pf=0x4 revision=0xc9

  480 12:57:06.433325  Skip microcode update

  481 12:57:06.439808  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  482 12:57:06.439915  CBFS @ c08000 size 3f8000

  483 12:57:06.446553  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  484 12:57:06.449611  CBFS: Locating 'fsps.bin'

  485 12:57:06.452725  CBFS: Found @ offset d1fc0 size 35000

  486 12:57:06.478645  Detected 4 core, 8 thread CPU.

  487 12:57:06.481735  Setting up SMI for CPU

  488 12:57:06.484824  IED base = 0x9ac00000

  489 12:57:06.484927  IED size = 0x00400000

  490 12:57:06.488180  Will perform SMM setup.

  491 12:57:06.494636  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  492 12:57:06.501425  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  493 12:57:06.504752  Processing 16 relocs. Offset value of 0x00030000

  494 12:57:06.508729  Attempting to start 7 APs

  495 12:57:06.512152  Waiting for 10ms after sending INIT.

  496 12:57:06.528191  Waiting for 1st SIPI to complete...done.

  497 12:57:06.528299  AP: slot 3 apic_id 1.

  498 12:57:06.534693  Waiting for 2nd SIPI to complete...done.

  499 12:57:06.534795  AP: slot 4 apic_id 2.

  500 12:57:06.538061  AP: slot 1 apic_id 3.

  501 12:57:06.541328  AP: slot 6 apic_id 4.

  502 12:57:06.541419  AP: slot 7 apic_id 5.

  503 12:57:06.544489  AP: slot 2 apic_id 6.

  504 12:57:06.547757  AP: slot 5 apic_id 7.

  505 12:57:06.554653  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  506 12:57:06.557840  Processing 13 relocs. Offset value of 0x00038000

  507 12:57:06.564899  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  508 12:57:06.571120  Installing SMM handler to 0x9a000000

  509 12:57:06.578141  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  510 12:57:06.581373  Processing 658 relocs. Offset value of 0x9a010000

  511 12:57:06.590841  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  512 12:57:06.594703  Processing 13 relocs. Offset value of 0x9a008000

  513 12:57:06.601112  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  514 12:57:06.607927  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  515 12:57:06.614532  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  516 12:57:06.617900  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  517 12:57:06.624472  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  518 12:57:06.631008  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  519 12:57:06.634337  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  520 12:57:06.640960  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  521 12:57:06.644378  Clearing SMI status registers

  522 12:57:06.647683  SMI_STS: PM1 

  523 12:57:06.647790  PM1_STS: PWRBTN 

  524 12:57:06.650833  TCO_STS: SECOND_TO 

  525 12:57:06.654271  New SMBASE 0x9a000000

  526 12:57:06.657646  In relocation handler: CPU 0

  527 12:57:06.660961  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  528 12:57:06.664011  Writing SMRR. base = 0x9a000006, mask=0xff000800

  529 12:57:06.667165  Relocation complete.

  530 12:57:06.670905  New SMBASE 0x99fff400

  531 12:57:06.674034  In relocation handler: CPU 3

  532 12:57:06.677162  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  533 12:57:06.680831  Writing SMRR. base = 0x9a000006, mask=0xff000800

  534 12:57:06.684011  Relocation complete.

  535 12:57:06.687167  New SMBASE 0x99ffe400

  536 12:57:06.687266  In relocation handler: CPU 7

  537 12:57:06.693590  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  538 12:57:06.696823  Writing SMRR. base = 0x9a000006, mask=0xff000800

  539 12:57:06.700179  Relocation complete.

  540 12:57:06.703985  New SMBASE 0x99ffe800

  541 12:57:06.704085  In relocation handler: CPU 6

  542 12:57:06.710423  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  543 12:57:06.713706  Writing SMRR. base = 0x9a000006, mask=0xff000800

  544 12:57:06.717039  Relocation complete.

  545 12:57:06.717144  New SMBASE 0x99fffc00

  546 12:57:06.720414  In relocation handler: CPU 1

  547 12:57:06.727041  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  548 12:57:06.730501  Writing SMRR. base = 0x9a000006, mask=0xff000800

  549 12:57:06.733753  Relocation complete.

  550 12:57:06.733856  New SMBASE 0x99fff000

  551 12:57:06.737168  In relocation handler: CPU 4

  552 12:57:06.743152  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  553 12:57:06.746515  Writing SMRR. base = 0x9a000006, mask=0xff000800

  554 12:57:06.749863  Relocation complete.

  555 12:57:06.749947  New SMBASE 0x99fff800

  556 12:57:06.753109  In relocation handler: CPU 2

  557 12:57:06.756453  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  558 12:57:06.763172  Writing SMRR. base = 0x9a000006, mask=0xff000800

  559 12:57:06.766476  Relocation complete.

  560 12:57:06.766567  New SMBASE 0x99ffec00

  561 12:57:06.769678  In relocation handler: CPU 5

  562 12:57:06.772855  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  563 12:57:06.779935  Writing SMRR. base = 0x9a000006, mask=0xff000800

  564 12:57:06.783200  Relocation complete.

  565 12:57:06.783298  Initializing CPU #0

  566 12:57:06.786248  CPU: vendor Intel device 806ec

  567 12:57:06.789593  CPU: family 06, model 8e, stepping 0c

  568 12:57:06.793463  Clearing out pending MCEs

  569 12:57:06.796432  Setting up local APIC...

  570 12:57:06.799661   apic_id: 0x00 done.

  571 12:57:06.799754  Turbo is available but hidden

  572 12:57:06.802693  Turbo is available and visible

  573 12:57:06.806073  VMX status: enabled

  574 12:57:06.809885  IA32_FEATURE_CONTROL status: locked

  575 12:57:06.813054  Skip microcode update

  576 12:57:06.813155  CPU #0 initialized

  577 12:57:06.816327  Initializing CPU #3

  578 12:57:06.819763  Initializing CPU #1

  579 12:57:06.819864  Initializing CPU #4

  580 12:57:06.822886  CPU: vendor Intel device 806ec

  581 12:57:06.826082  CPU: family 06, model 8e, stepping 0c

  582 12:57:06.829444  CPU: vendor Intel device 806ec

  583 12:57:06.832923  CPU: family 06, model 8e, stepping 0c

  584 12:57:06.836314  Clearing out pending MCEs

  585 12:57:06.839585  Clearing out pending MCEs

  586 12:57:06.842829  Setting up local APIC...

  587 12:57:06.846213  CPU: vendor Intel device 806ec

  588 12:57:06.849439  CPU: family 06, model 8e, stepping 0c

  589 12:57:06.852819  Clearing out pending MCEs

  590 12:57:06.852907  Setting up local APIC...

  591 12:57:06.856070  Initializing CPU #5

  592 12:57:06.859372  Initializing CPU #2

  593 12:57:06.862835  CPU: vendor Intel device 806ec

  594 12:57:06.866243  CPU: family 06, model 8e, stepping 0c

  595 12:57:06.868866  CPU: vendor Intel device 806ec

  596 12:57:06.872258  CPU: family 06, model 8e, stepping 0c

  597 12:57:06.876119  Clearing out pending MCEs

  598 12:57:06.876218  Clearing out pending MCEs

  599 12:57:06.879372  Setting up local APIC...

  600 12:57:06.882464  Initializing CPU #7

  601 12:57:06.882567  Initializing CPU #6

  602 12:57:06.885681  CPU: vendor Intel device 806ec

  603 12:57:06.892619  CPU: family 06, model 8e, stepping 0c

  604 12:57:06.892727  CPU: vendor Intel device 806ec

  605 12:57:06.899224  CPU: family 06, model 8e, stepping 0c

  606 12:57:06.899329  Clearing out pending MCEs

  607 12:57:06.902472  Clearing out pending MCEs

  608 12:57:06.905511  Setting up local APIC...

  609 12:57:06.908756  Setting up local APIC...

  610 12:57:06.908859   apic_id: 0x03 done.

  611 12:57:06.911965   apic_id: 0x02 done.

  612 12:57:06.915515  VMX status: enabled

  613 12:57:06.915616  VMX status: enabled

  614 12:57:06.918535  IA32_FEATURE_CONTROL status: locked

  615 12:57:06.921906  IA32_FEATURE_CONTROL status: locked

  616 12:57:06.925124  Skip microcode update

  617 12:57:06.928475  Skip microcode update

  618 12:57:06.928577  CPU #1 initialized

  619 12:57:06.931765  CPU #4 initialized

  620 12:57:06.935209   apic_id: 0x07 done.

  621 12:57:06.935313  Setting up local APIC...

  622 12:57:06.938486   apic_id: 0x01 done.

  623 12:57:06.941838   apic_id: 0x05 done.

  624 12:57:06.941939  Setting up local APIC...

  625 12:57:06.945216  VMX status: enabled

  626 12:57:06.948542   apic_id: 0x04 done.

  627 12:57:06.948642  VMX status: enabled

  628 12:57:06.951887   apic_id: 0x06 done.

  629 12:57:06.955194  VMX status: enabled

  630 12:57:06.955294  VMX status: enabled

  631 12:57:06.958587  IA32_FEATURE_CONTROL status: locked

  632 12:57:06.961815  IA32_FEATURE_CONTROL status: locked

  633 12:57:06.965107  IA32_FEATURE_CONTROL status: locked

  634 12:57:06.968374  Skip microcode update

  635 12:57:06.971748  Skip microcode update

  636 12:57:06.971847  CPU #5 initialized

  637 12:57:06.975036  CPU #2 initialized

  638 12:57:06.978490  Skip microcode update

  639 12:57:06.978582  VMX status: enabled

  640 12:57:06.981681  IA32_FEATURE_CONTROL status: locked

  641 12:57:06.984951  IA32_FEATURE_CONTROL status: locked

  642 12:57:06.988167  Skip microcode update

  643 12:57:06.991847  Skip microcode update

  644 12:57:06.991968  CPU #7 initialized

  645 12:57:06.994874  CPU #6 initialized

  646 12:57:06.998186  CPU #3 initialized

  647 12:57:07.001686  bsp_do_flight_plan done after 465 msecs.

  648 12:57:07.004800  CPU: frequency set to 4200 MHz

  649 12:57:07.004896  Enabling SMIs.

  650 12:57:07.008123  Locking SMM.

  651 12:57:07.021980  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  652 12:57:07.025123  CBFS @ c08000 size 3f8000

  653 12:57:07.031724  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  654 12:57:07.031858  CBFS: Locating 'vbt.bin'

  655 12:57:07.038140  CBFS: Found @ offset 5f5c0 size 499

  656 12:57:07.041472  Found a VBT of 4608 bytes after decompression

  657 12:57:07.224748  Display FSP Version Info HOB

  658 12:57:07.228100  Reference Code - CPU = 9.0.1e.30

  659 12:57:07.231489  uCode Version = 0.0.0.ca

  660 12:57:07.234381  TXT ACM version = ff.ff.ff.ffff

  661 12:57:07.237473  Display FSP Version Info HOB

  662 12:57:07.240732  Reference Code - ME = 9.0.1e.30

  663 12:57:07.244715  MEBx version = 0.0.0.0

  664 12:57:07.247968  ME Firmware Version = Consumer SKU

  665 12:57:07.251209  Display FSP Version Info HOB

  666 12:57:07.254567  Reference Code - CML PCH = 9.0.1e.30

  667 12:57:07.257865  PCH-CRID Status = Disabled

  668 12:57:07.261121  PCH-CRID Original Value = ff.ff.ff.ffff

  669 12:57:07.264398  PCH-CRID New Value = ff.ff.ff.ffff

  670 12:57:07.267694  OPROM - RST - RAID = ff.ff.ff.ffff

  671 12:57:07.271062  ChipsetInit Base Version = ff.ff.ff.ffff

  672 12:57:07.274419  ChipsetInit Oem Version = ff.ff.ff.ffff

  673 12:57:07.277772  Display FSP Version Info HOB

  674 12:57:07.283790  Reference Code - SA - System Agent = 9.0.1e.30

  675 12:57:07.287200  Reference Code - MRC = 0.7.1.6c

  676 12:57:07.287305  SA - PCIe Version = 9.0.1e.30

  677 12:57:07.290493  SA-CRID Status = Disabled

  678 12:57:07.293897  SA-CRID Original Value = 0.0.0.c

  679 12:57:07.297297  SA-CRID New Value = 0.0.0.c

  680 12:57:07.300698  OPROM - VBIOS = ff.ff.ff.ffff

  681 12:57:07.304086  RTC Init

  682 12:57:07.307234  Set power on after power failure.

  683 12:57:07.307335  Disabling Deep S3

  684 12:57:07.310427  Disabling Deep S3

  685 12:57:07.310526  Disabling Deep S4

  686 12:57:07.313593  Disabling Deep S4

  687 12:57:07.317374  Disabling Deep S5

  688 12:57:07.317474  Disabling Deep S5

  689 12:57:07.323860  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  690 12:57:07.323968  Enumerating buses...

  691 12:57:07.330136  Show all devs... Before device enumeration.

  692 12:57:07.333814  Root Device: enabled 1

  693 12:57:07.333926  CPU_CLUSTER: 0: enabled 1

  694 12:57:07.337065  DOMAIN: 0000: enabled 1

  695 12:57:07.340291  APIC: 00: enabled 1

  696 12:57:07.340382  PCI: 00:00.0: enabled 1

  697 12:57:07.343478  PCI: 00:02.0: enabled 1

  698 12:57:07.346635  PCI: 00:04.0: enabled 0

  699 12:57:07.349915  PCI: 00:05.0: enabled 0

  700 12:57:07.350018  PCI: 00:12.0: enabled 1

  701 12:57:07.353843  PCI: 00:12.5: enabled 0

  702 12:57:07.356576  PCI: 00:12.6: enabled 0

  703 12:57:07.359887  PCI: 00:14.0: enabled 1

  704 12:57:07.359990  PCI: 00:14.1: enabled 0

  705 12:57:07.363814  PCI: 00:14.3: enabled 1

  706 12:57:07.366980  PCI: 00:14.5: enabled 0

  707 12:57:07.367089  PCI: 00:15.0: enabled 1

  708 12:57:07.370446  PCI: 00:15.1: enabled 1

  709 12:57:07.373173  PCI: 00:15.2: enabled 0

  710 12:57:07.376582  PCI: 00:15.3: enabled 0

  711 12:57:07.376685  PCI: 00:16.0: enabled 1

  712 12:57:07.379775  PCI: 00:16.1: enabled 0

  713 12:57:07.382979  PCI: 00:16.2: enabled 0

  714 12:57:07.386386  PCI: 00:16.3: enabled 0

  715 12:57:07.386488  PCI: 00:16.4: enabled 0

  716 12:57:07.389748  PCI: 00:16.5: enabled 0

  717 12:57:07.393122  PCI: 00:17.0: enabled 1

  718 12:57:07.396428  PCI: 00:19.0: enabled 1

  719 12:57:07.396531  PCI: 00:19.1: enabled 0

  720 12:57:07.399856  PCI: 00:19.2: enabled 0

  721 12:57:07.403223  PCI: 00:1a.0: enabled 0

  722 12:57:07.406443  PCI: 00:1c.0: enabled 0

  723 12:57:07.406546  PCI: 00:1c.1: enabled 0

  724 12:57:07.409813  PCI: 00:1c.2: enabled 0

  725 12:57:07.413105  PCI: 00:1c.3: enabled 0

  726 12:57:07.413209  PCI: 00:1c.4: enabled 0

  727 12:57:07.416356  PCI: 00:1c.5: enabled 0

  728 12:57:07.419492  PCI: 00:1c.6: enabled 0

  729 12:57:07.423371  PCI: 00:1c.7: enabled 0

  730 12:57:07.423474  PCI: 00:1d.0: enabled 1

  731 12:57:07.426480  PCI: 00:1d.1: enabled 0

  732 12:57:07.429565  PCI: 00:1d.2: enabled 0

  733 12:57:07.433298  PCI: 00:1d.3: enabled 0

  734 12:57:07.433408  PCI: 00:1d.4: enabled 0

  735 12:57:07.436371  PCI: 00:1d.5: enabled 1

  736 12:57:07.439674  PCI: 00:1e.0: enabled 1

  737 12:57:07.439776  PCI: 00:1e.1: enabled 0

  738 12:57:07.443366  PCI: 00:1e.2: enabled 1

  739 12:57:07.446579  PCI: 00:1e.3: enabled 1

  740 12:57:07.449768  PCI: 00:1f.0: enabled 1

  741 12:57:07.449869  PCI: 00:1f.1: enabled 1

  742 12:57:07.453020  PCI: 00:1f.2: enabled 1

  743 12:57:07.456399  PCI: 00:1f.3: enabled 1

  744 12:57:07.459653  PCI: 00:1f.4: enabled 1

  745 12:57:07.459756  PCI: 00:1f.5: enabled 1

  746 12:57:07.462959  PCI: 00:1f.6: enabled 0

  747 12:57:07.466244  USB0 port 0: enabled 1

  748 12:57:07.466346  I2C: 00:15: enabled 1

  749 12:57:07.469493  I2C: 00:5d: enabled 1

  750 12:57:07.472889  GENERIC: 0.0: enabled 1

  751 12:57:07.476200  I2C: 00:1a: enabled 1

  752 12:57:07.476304  I2C: 00:38: enabled 1

  753 12:57:07.479543  I2C: 00:39: enabled 1

  754 12:57:07.482737  I2C: 00:3a: enabled 1

  755 12:57:07.482839  I2C: 00:3b: enabled 1

  756 12:57:07.485953  PCI: 00:00.0: enabled 1

  757 12:57:07.489346  SPI: 00: enabled 1

  758 12:57:07.489449  SPI: 01: enabled 1

  759 12:57:07.492710  PNP: 0c09.0: enabled 1

  760 12:57:07.496226  USB2 port 0: enabled 1

  761 12:57:07.496330  USB2 port 1: enabled 1

  762 12:57:07.499385  USB2 port 2: enabled 0

  763 12:57:07.502672  USB2 port 3: enabled 0

  764 12:57:07.502777  USB2 port 5: enabled 0

  765 12:57:07.505886  USB2 port 6: enabled 1

  766 12:57:07.509273  USB2 port 9: enabled 1

  767 12:57:07.512632  USB3 port 0: enabled 1

  768 12:57:07.512735  USB3 port 1: enabled 1

  769 12:57:07.515976  USB3 port 2: enabled 1

  770 12:57:07.519201  USB3 port 3: enabled 1

  771 12:57:07.519309  USB3 port 4: enabled 0

  772 12:57:07.522424  APIC: 03: enabled 1

  773 12:57:07.525582  APIC: 06: enabled 1

  774 12:57:07.525686  APIC: 01: enabled 1

  775 12:57:07.529513  APIC: 02: enabled 1

  776 12:57:07.529618  APIC: 07: enabled 1

  777 12:57:07.532774  APIC: 04: enabled 1

  778 12:57:07.535939  APIC: 05: enabled 1

  779 12:57:07.536049  Compare with tree...

  780 12:57:07.539065  Root Device: enabled 1

  781 12:57:07.542389   CPU_CLUSTER: 0: enabled 1

  782 12:57:07.545611    APIC: 00: enabled 1

  783 12:57:07.545715    APIC: 03: enabled 1

  784 12:57:07.549376    APIC: 06: enabled 1

  785 12:57:07.552525    APIC: 01: enabled 1

  786 12:57:07.552630    APIC: 02: enabled 1

  787 12:57:07.555741    APIC: 07: enabled 1

  788 12:57:07.558940    APIC: 04: enabled 1

  789 12:57:07.559043    APIC: 05: enabled 1

  790 12:57:07.562180   DOMAIN: 0000: enabled 1

  791 12:57:07.565418    PCI: 00:00.0: enabled 1

  792 12:57:07.568588    PCI: 00:02.0: enabled 1

  793 12:57:07.568693    PCI: 00:04.0: enabled 0

  794 12:57:07.572578    PCI: 00:05.0: enabled 0

  795 12:57:07.575374    PCI: 00:12.0: enabled 1

  796 12:57:07.578689    PCI: 00:12.5: enabled 0

  797 12:57:07.582001    PCI: 00:12.6: enabled 0

  798 12:57:07.582105    PCI: 00:14.0: enabled 1

  799 12:57:07.585298     USB0 port 0: enabled 1

  800 12:57:07.588591      USB2 port 0: enabled 1

  801 12:57:07.591791      USB2 port 1: enabled 1

  802 12:57:07.595109      USB2 port 2: enabled 0

  803 12:57:07.595214      USB2 port 3: enabled 0

  804 12:57:07.598528      USB2 port 5: enabled 0

  805 12:57:07.601901      USB2 port 6: enabled 1

  806 12:57:07.605395      USB2 port 9: enabled 1

  807 12:57:07.608602      USB3 port 0: enabled 1

  808 12:57:07.611971      USB3 port 1: enabled 1

  809 12:57:07.612076      USB3 port 2: enabled 1

  810 12:57:07.615368      USB3 port 3: enabled 1

  811 12:57:07.618685      USB3 port 4: enabled 0

  812 12:57:07.622143    PCI: 00:14.1: enabled 0

  813 12:57:07.625455    PCI: 00:14.3: enabled 1

  814 12:57:07.625559    PCI: 00:14.5: enabled 0

  815 12:57:07.628732    PCI: 00:15.0: enabled 1

  816 12:57:07.632128     I2C: 00:15: enabled 1

  817 12:57:07.635234    PCI: 00:15.1: enabled 1

  818 12:57:07.638436     I2C: 00:5d: enabled 1

  819 12:57:07.638537     GENERIC: 0.0: enabled 1

  820 12:57:07.641762    PCI: 00:15.2: enabled 0

  821 12:57:07.644848    PCI: 00:15.3: enabled 0

  822 12:57:07.648611    PCI: 00:16.0: enabled 1

  823 12:57:07.651777    PCI: 00:16.1: enabled 0

  824 12:57:07.651871    PCI: 00:16.2: enabled 0

  825 12:57:07.655070    PCI: 00:16.3: enabled 0

  826 12:57:07.658335    PCI: 00:16.4: enabled 0

  827 12:57:07.661431    PCI: 00:16.5: enabled 0

  828 12:57:07.661540    PCI: 00:17.0: enabled 1

  829 12:57:07.664696    PCI: 00:19.0: enabled 1

  830 12:57:07.668035     I2C: 00:1a: enabled 1

  831 12:57:07.671326     I2C: 00:38: enabled 1

  832 12:57:07.674660     I2C: 00:39: enabled 1

  833 12:57:07.674771     I2C: 00:3a: enabled 1

  834 12:57:07.678101     I2C: 00:3b: enabled 1

  835 12:57:07.681454    PCI: 00:19.1: enabled 0

  836 12:57:07.684827    PCI: 00:19.2: enabled 0

  837 12:57:07.684919    PCI: 00:1a.0: enabled 0

  838 12:57:07.688090    PCI: 00:1c.0: enabled 0

  839 12:57:07.691488    PCI: 00:1c.1: enabled 0

  840 12:57:07.694786    PCI: 00:1c.2: enabled 0

  841 12:57:07.698152    PCI: 00:1c.3: enabled 0

  842 12:57:07.698255    PCI: 00:1c.4: enabled 0

  843 12:57:07.701447    PCI: 00:1c.5: enabled 0

  844 12:57:07.704707    PCI: 00:1c.6: enabled 0

  845 12:57:07.708142    PCI: 00:1c.7: enabled 0

  846 12:57:07.711416    PCI: 00:1d.0: enabled 1

  847 12:57:07.711509    PCI: 00:1d.1: enabled 0

  848 12:57:07.714687    PCI: 00:1d.2: enabled 0

  849 12:57:07.718096    PCI: 00:1d.3: enabled 0

  850 12:57:07.721330    PCI: 00:1d.4: enabled 0

  851 12:57:07.724638    PCI: 00:1d.5: enabled 1

  852 12:57:07.724735     PCI: 00:00.0: enabled 1

  853 12:57:07.727941    PCI: 00:1e.0: enabled 1

  854 12:57:07.731338    PCI: 00:1e.1: enabled 0

  855 12:57:07.734551    PCI: 00:1e.2: enabled 1

  856 12:57:07.734655     SPI: 00: enabled 1

  857 12:57:07.738176    PCI: 00:1e.3: enabled 1

  858 12:57:07.741389     SPI: 01: enabled 1

  859 12:57:07.744792    PCI: 00:1f.0: enabled 1

  860 12:57:07.747671     PNP: 0c09.0: enabled 1

  861 12:57:07.747777    PCI: 00:1f.1: enabled 1

  862 12:57:07.750867    PCI: 00:1f.2: enabled 1

  863 12:57:07.754655    PCI: 00:1f.3: enabled 1

  864 12:57:07.757799    PCI: 00:1f.4: enabled 1

  865 12:57:07.761031    PCI: 00:1f.5: enabled 1

  866 12:57:07.761133    PCI: 00:1f.6: enabled 0

  867 12:57:07.764254  Root Device scanning...

  868 12:57:07.767409  scan_static_bus for Root Device

  869 12:57:07.770699  CPU_CLUSTER: 0 enabled

  870 12:57:07.770786  DOMAIN: 0000 enabled

  871 12:57:07.773928  DOMAIN: 0000 scanning...

  872 12:57:07.777819  PCI: pci_scan_bus for bus 00

  873 12:57:07.781098  PCI: 00:00.0 [8086/0000] ops

  874 12:57:07.784422  PCI: 00:00.0 [8086/9b61] enabled

  875 12:57:07.787766  PCI: 00:02.0 [8086/0000] bus ops

  876 12:57:07.791116  PCI: 00:02.0 [8086/9b41] enabled

  877 12:57:07.794395  PCI: 00:04.0 [8086/1903] disabled

  878 12:57:07.797752  PCI: 00:08.0 [8086/1911] enabled

  879 12:57:07.800950  PCI: 00:12.0 [8086/02f9] enabled

  880 12:57:07.804292  PCI: 00:14.0 [8086/0000] bus ops

  881 12:57:07.807668  PCI: 00:14.0 [8086/02ed] enabled

  882 12:57:07.810407  PCI: 00:14.2 [8086/02ef] enabled

  883 12:57:07.813709  PCI: 00:14.3 [8086/02f0] enabled

  884 12:57:07.817072  PCI: 00:15.0 [8086/0000] bus ops

  885 12:57:07.820397  PCI: 00:15.0 [8086/02e8] enabled

  886 12:57:07.823723  PCI: 00:15.1 [8086/0000] bus ops

  887 12:57:07.827062  PCI: 00:15.1 [8086/02e9] enabled

  888 12:57:07.830415  PCI: 00:16.0 [8086/0000] ops

  889 12:57:07.833783  PCI: 00:16.0 [8086/02e0] enabled

  890 12:57:07.837191  PCI: 00:17.0 [8086/0000] ops

  891 12:57:07.840490  PCI: 00:17.0 [8086/02d3] enabled

  892 12:57:07.843820  PCI: 00:19.0 [8086/0000] bus ops

  893 12:57:07.847094  PCI: 00:19.0 [8086/02c5] enabled

  894 12:57:07.850499  PCI: 00:1d.0 [8086/0000] bus ops

  895 12:57:07.853668  PCI: 00:1d.0 [8086/02b0] enabled

  896 12:57:07.860280  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  897 12:57:07.864028  PCI: 00:1e.0 [8086/0000] ops

  898 12:57:07.867073  PCI: 00:1e.0 [8086/02a8] enabled

  899 12:57:07.870275  PCI: 00:1e.2 [8086/0000] bus ops

  900 12:57:07.873969  PCI: 00:1e.2 [8086/02aa] enabled

  901 12:57:07.877336  PCI: 00:1e.3 [8086/0000] bus ops

  902 12:57:07.880463  PCI: 00:1e.3 [8086/02ab] enabled

  903 12:57:07.883752  PCI: 00:1f.0 [8086/0000] bus ops

  904 12:57:07.887047  PCI: 00:1f.0 [8086/0284] enabled

  905 12:57:07.890425  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  906 12:57:07.897109  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  907 12:57:07.900524  PCI: 00:1f.3 [8086/0000] bus ops

  908 12:57:07.903817  PCI: 00:1f.3 [8086/02c8] enabled

  909 12:57:07.907132  PCI: 00:1f.4 [8086/0000] bus ops

  910 12:57:07.910506  PCI: 00:1f.4 [8086/02a3] enabled

  911 12:57:07.913816  PCI: 00:1f.5 [8086/0000] bus ops

  912 12:57:07.917249  PCI: 00:1f.5 [8086/02a4] enabled

  913 12:57:07.920693  PCI: Leftover static devices:

  914 12:57:07.920793  PCI: 00:05.0

  915 12:57:07.923217  PCI: 00:12.5

  916 12:57:07.923315  PCI: 00:12.6

  917 12:57:07.926559  PCI: 00:14.1

  918 12:57:07.926657  PCI: 00:14.5

  919 12:57:07.926736  PCI: 00:15.2

  920 12:57:07.929858  PCI: 00:15.3

  921 12:57:07.929957  PCI: 00:16.1

  922 12:57:07.933229  PCI: 00:16.2

  923 12:57:07.933330  PCI: 00:16.3

  924 12:57:07.933408  PCI: 00:16.4

  925 12:57:07.936562  PCI: 00:16.5

  926 12:57:07.936658  PCI: 00:19.1

  927 12:57:07.939933  PCI: 00:19.2

  928 12:57:07.940031  PCI: 00:1a.0

  929 12:57:07.943240  PCI: 00:1c.0

  930 12:57:07.943337  PCI: 00:1c.1

  931 12:57:07.943415  PCI: 00:1c.2

  932 12:57:07.946597  PCI: 00:1c.3

  933 12:57:07.946695  PCI: 00:1c.4

  934 12:57:07.949845  PCI: 00:1c.5

  935 12:57:07.949942  PCI: 00:1c.6

  936 12:57:07.950020  PCI: 00:1c.7

  937 12:57:07.953289  PCI: 00:1d.1

  938 12:57:07.953387  PCI: 00:1d.2

  939 12:57:07.956630  PCI: 00:1d.3

  940 12:57:07.956729  PCI: 00:1d.4

  941 12:57:07.956807  PCI: 00:1d.5

  942 12:57:07.959956  PCI: 00:1e.1

  943 12:57:07.960054  PCI: 00:1f.1

  944 12:57:07.963098  PCI: 00:1f.2

  945 12:57:07.963196  PCI: 00:1f.6

  946 12:57:07.966791  PCI: Check your devicetree.cb.

  947 12:57:07.969966  PCI: 00:02.0 scanning...

  948 12:57:07.973150  scan_generic_bus for PCI: 00:02.0

  949 12:57:07.976378  scan_generic_bus for PCI: 00:02.0 done

  950 12:57:07.983483  scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs

  951 12:57:07.986641  PCI: 00:14.0 scanning...

  952 12:57:07.989878  scan_static_bus for PCI: 00:14.0

  953 12:57:07.989977  USB0 port 0 enabled

  954 12:57:07.993007  USB0 port 0 scanning...

  955 12:57:07.996166  scan_static_bus for USB0 port 0

  956 12:57:07.999599  USB2 port 0 enabled

  957 12:57:07.999698  USB2 port 1 enabled

  958 12:57:08.002877  USB2 port 2 disabled

  959 12:57:08.006174  USB2 port 3 disabled

  960 12:57:08.006274  USB2 port 5 disabled

  961 12:57:08.009517  USB2 port 6 enabled

  962 12:57:08.009616  USB2 port 9 enabled

  963 12:57:08.012813  USB3 port 0 enabled

  964 12:57:08.016231  USB3 port 1 enabled

  965 12:57:08.016330  USB3 port 2 enabled

  966 12:57:08.019572  USB3 port 3 enabled

  967 12:57:08.022883  USB3 port 4 disabled

  968 12:57:08.022983  USB2 port 0 scanning...

  969 12:57:08.026344  scan_static_bus for USB2 port 0

  970 12:57:08.029535  scan_static_bus for USB2 port 0 done

  971 12:57:08.036421  scan_bus: scanning of bus USB2 port 0 took 9685 usecs

  972 12:57:08.039575  USB2 port 1 scanning...

  973 12:57:08.042784  scan_static_bus for USB2 port 1

  974 12:57:08.046099  scan_static_bus for USB2 port 1 done

  975 12:57:08.052818  scan_bus: scanning of bus USB2 port 1 took 9703 usecs

  976 12:57:08.052921  USB2 port 6 scanning...

  977 12:57:08.056106  scan_static_bus for USB2 port 6

  978 12:57:08.062874  scan_static_bus for USB2 port 6 done

  979 12:57:08.066020  scan_bus: scanning of bus USB2 port 6 took 9714 usecs

  980 12:57:08.069407  USB2 port 9 scanning...

  981 12:57:08.072482  scan_static_bus for USB2 port 9

  982 12:57:08.075428  scan_static_bus for USB2 port 9 done

  983 12:57:08.082432  scan_bus: scanning of bus USB2 port 9 took 9702 usecs

  984 12:57:08.082545  USB3 port 0 scanning...

  985 12:57:08.085669  scan_static_bus for USB3 port 0

  986 12:57:08.092918  scan_static_bus for USB3 port 0 done

  987 12:57:08.095521  scan_bus: scanning of bus USB3 port 0 took 9709 usecs

  988 12:57:08.098852  USB3 port 1 scanning...

  989 12:57:08.102201  scan_static_bus for USB3 port 1

  990 12:57:08.106379  scan_static_bus for USB3 port 1 done

  991 12:57:08.112151  scan_bus: scanning of bus USB3 port 1 took 9711 usecs

  992 12:57:08.112252  USB3 port 2 scanning...

  993 12:57:08.116196  scan_static_bus for USB3 port 2

  994 12:57:08.122247  scan_static_bus for USB3 port 2 done

  995 12:57:08.125576  scan_bus: scanning of bus USB3 port 2 took 9709 usecs

  996 12:57:08.129031  USB3 port 3 scanning...

  997 12:57:08.132299  scan_static_bus for USB3 port 3

  998 12:57:08.135643  scan_static_bus for USB3 port 3 done

  999 12:57:08.142122  scan_bus: scanning of bus USB3 port 3 took 9700 usecs

 1000 12:57:08.145444  scan_static_bus for USB0 port 0 done

 1001 12:57:08.152084  scan_bus: scanning of bus USB0 port 0 took 155385 usecs

 1002 12:57:08.155372  scan_static_bus for PCI: 00:14.0 done

 1003 12:57:08.158779  scan_bus: scanning of bus PCI: 00:14.0 took 173009 usecs

 1004 12:57:08.162102  PCI: 00:15.0 scanning...

 1005 12:57:08.165501  scan_generic_bus for PCI: 00:15.0

 1006 12:57:08.172209  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1007 12:57:08.175544  scan_generic_bus for PCI: 00:15.0 done

 1008 12:57:08.178816  scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs

 1009 12:57:08.182001  PCI: 00:15.1 scanning...

 1010 12:57:08.185139  scan_generic_bus for PCI: 00:15.1

 1011 12:57:08.191567  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1012 12:57:08.195317  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1013 12:57:08.198438  scan_generic_bus for PCI: 00:15.1 done

 1014 12:57:08.204993  scan_bus: scanning of bus PCI: 00:15.1 took 18587 usecs

 1015 12:57:08.205092  PCI: 00:19.0 scanning...

 1016 12:57:08.212130  scan_generic_bus for PCI: 00:19.0

 1017 12:57:08.215342  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1018 12:57:08.218564  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1019 12:57:08.221941  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1020 12:57:08.225258  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1021 12:57:08.232060  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1022 12:57:08.234795  scan_generic_bus for PCI: 00:19.0 done

 1023 12:57:08.241500  scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs

 1024 12:57:08.241601  PCI: 00:1d.0 scanning...

 1025 12:57:08.244864  do_pci_scan_bridge for PCI: 00:1d.0

 1026 12:57:08.248194  PCI: pci_scan_bus for bus 01

 1027 12:57:08.251467  PCI: 01:00.0 [1c5c/1327] enabled

 1028 12:57:08.258242  Enabling Common Clock Configuration

 1029 12:57:08.261486  L1 Sub-State supported from root port 29

 1030 12:57:08.264939  L1 Sub-State Support = 0xf

 1031 12:57:08.268299  CommonModeRestoreTime = 0x28

 1032 12:57:08.271574  Power On Value = 0x16, Power On Scale = 0x0

 1033 12:57:08.271673  ASPM: Enabled L1

 1034 12:57:08.278220  scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs

 1035 12:57:08.281545  PCI: 00:1e.2 scanning...

 1036 12:57:08.284843  scan_generic_bus for PCI: 00:1e.2

 1037 12:57:08.288095  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1038 12:57:08.291295  scan_generic_bus for PCI: 00:1e.2 done

 1039 12:57:08.297548  scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs

 1040 12:57:08.301461  PCI: 00:1e.3 scanning...

 1041 12:57:08.304583  scan_generic_bus for PCI: 00:1e.3

 1042 12:57:08.307847  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1043 12:57:08.311190  scan_generic_bus for PCI: 00:1e.3 done

 1044 12:57:08.317724  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs

 1045 12:57:08.320963  PCI: 00:1f.0 scanning...

 1046 12:57:08.324431  scan_static_bus for PCI: 00:1f.0

 1047 12:57:08.324531  PNP: 0c09.0 enabled

 1048 12:57:08.330845  scan_static_bus for PCI: 00:1f.0 done

 1049 12:57:08.334185  scan_bus: scanning of bus PCI: 00:1f.0 took 12039 usecs

 1050 12:57:08.337454  PCI: 00:1f.3 scanning...

 1051 12:57:08.344041  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs

 1052 12:57:08.344142  PCI: 00:1f.4 scanning...

 1053 12:57:08.350709  scan_generic_bus for PCI: 00:1f.4

 1054 12:57:08.354167  scan_generic_bus for PCI: 00:1f.4 done

 1055 12:57:08.357433  scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs

 1056 12:57:08.360713  PCI: 00:1f.5 scanning...

 1057 12:57:08.364094  scan_generic_bus for PCI: 00:1f.5

 1058 12:57:08.367438  scan_generic_bus for PCI: 00:1f.5 done

 1059 12:57:08.374008  scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs

 1060 12:57:08.380774  scan_bus: scanning of bus DOMAIN: 0000 took 605149 usecs

 1061 12:57:08.384166  scan_static_bus for Root Device done

 1062 12:57:08.390691  scan_bus: scanning of bus Root Device took 625073 usecs

 1063 12:57:08.390790  done

 1064 12:57:08.394050  Chrome EC: UHEPI supported

 1065 12:57:08.400359  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1066 12:57:08.403969  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1067 12:57:08.410201  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1068 12:57:08.417904  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1069 12:57:08.420899  SPI flash protection: WPSW=0 SRP0=0

 1070 12:57:08.427652  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1071 12:57:08.430995  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1072 12:57:08.434264  found VGA at PCI: 00:02.0

 1073 12:57:08.437418  Setting up VGA for PCI: 00:02.0

 1074 12:57:08.444046  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1075 12:57:08.447408  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1076 12:57:08.450779  Allocating resources...

 1077 12:57:08.454069  Reading resources...

 1078 12:57:08.457354  Root Device read_resources bus 0 link: 0

 1079 12:57:08.460227  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1080 12:57:08.466892  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1081 12:57:08.470275  DOMAIN: 0000 read_resources bus 0 link: 0

 1082 12:57:08.478128  PCI: 00:14.0 read_resources bus 0 link: 0

 1083 12:57:08.481437  USB0 port 0 read_resources bus 0 link: 0

 1084 12:57:08.489541  USB0 port 0 read_resources bus 0 link: 0 done

 1085 12:57:08.492920  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1086 12:57:08.500180  PCI: 00:15.0 read_resources bus 1 link: 0

 1087 12:57:08.503522  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1088 12:57:08.509893  PCI: 00:15.1 read_resources bus 2 link: 0

 1089 12:57:08.513026  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1090 12:57:08.520678  PCI: 00:19.0 read_resources bus 3 link: 0

 1091 12:57:08.527009  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1092 12:57:08.530352  PCI: 00:1d.0 read_resources bus 1 link: 0

 1093 12:57:08.537345  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1094 12:57:08.540569  PCI: 00:1e.2 read_resources bus 4 link: 0

 1095 12:57:08.547037  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1096 12:57:08.550291  PCI: 00:1e.3 read_resources bus 5 link: 0

 1097 12:57:08.556891  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1098 12:57:08.560211  PCI: 00:1f.0 read_resources bus 0 link: 0

 1099 12:57:08.566822  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1100 12:57:08.573418  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1101 12:57:08.577281  Root Device read_resources bus 0 link: 0 done

 1102 12:57:08.580553  Done reading resources.

 1103 12:57:08.586601  Show resources in subtree (Root Device)...After reading.

 1104 12:57:08.589930   Root Device child on link 0 CPU_CLUSTER: 0

 1105 12:57:08.593280    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1106 12:57:08.593379     APIC: 00

 1107 12:57:08.596530     APIC: 03

 1108 12:57:08.596633     APIC: 06

 1109 12:57:08.600490     APIC: 01

 1110 12:57:08.600606     APIC: 02

 1111 12:57:08.600691     APIC: 07

 1112 12:57:08.603188     APIC: 04

 1113 12:57:08.603289     APIC: 05

 1114 12:57:08.606527    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1115 12:57:08.616805    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1116 12:57:08.669701    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1117 12:57:08.670205     PCI: 00:00.0

 1118 12:57:08.670536     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1119 12:57:08.670822     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1120 12:57:08.670922     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1121 12:57:08.671186     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1122 12:57:08.719299     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1123 12:57:08.719714     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1124 12:57:08.719814     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1125 12:57:08.719892     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1126 12:57:08.720156     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1127 12:57:08.727811     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1128 12:57:08.731012     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1129 12:57:08.741176     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1130 12:57:08.750847     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1131 12:57:08.760732     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1132 12:57:08.771069     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1133 12:57:08.777213     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1134 12:57:08.781112     PCI: 00:02.0

 1135 12:57:08.790519     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1136 12:57:08.800483     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1137 12:57:08.810472     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1138 12:57:08.810576     PCI: 00:04.0

 1139 12:57:08.813795     PCI: 00:08.0

 1140 12:57:08.823793     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1141 12:57:08.823900     PCI: 00:12.0

 1142 12:57:08.833497     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1143 12:57:08.840369     PCI: 00:14.0 child on link 0 USB0 port 0

 1144 12:57:08.849954     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1145 12:57:08.853175      USB0 port 0 child on link 0 USB2 port 0

 1146 12:57:08.853267       USB2 port 0

 1147 12:57:08.856973       USB2 port 1

 1148 12:57:08.857073       USB2 port 2

 1149 12:57:08.860158       USB2 port 3

 1150 12:57:08.863335       USB2 port 5

 1151 12:57:08.863457       USB2 port 6

 1152 12:57:08.866597       USB2 port 9

 1153 12:57:08.866697       USB3 port 0

 1154 12:57:08.869991       USB3 port 1

 1155 12:57:08.870091       USB3 port 2

 1156 12:57:08.873220       USB3 port 3

 1157 12:57:08.873319       USB3 port 4

 1158 12:57:08.876853     PCI: 00:14.2

 1159 12:57:08.886561     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1160 12:57:08.896608     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1161 12:57:08.896718     PCI: 00:14.3

 1162 12:57:08.906623     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1163 12:57:08.913208     PCI: 00:15.0 child on link 0 I2C: 01:15

 1164 12:57:08.923043     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 12:57:08.923160      I2C: 01:15

 1166 12:57:08.926491     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1167 12:57:08.936411     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 12:57:08.939536      I2C: 02:5d

 1169 12:57:08.939641      GENERIC: 0.0

 1170 12:57:08.942728     PCI: 00:16.0

 1171 12:57:08.953220     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1172 12:57:08.953328     PCI: 00:17.0

 1173 12:57:08.962938     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1174 12:57:08.972779     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1175 12:57:08.979301     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1176 12:57:08.988914     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1177 12:57:08.995625     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1178 12:57:09.005665     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1179 12:57:09.008996     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1180 12:57:09.019224     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1181 12:57:09.022460      I2C: 03:1a

 1182 12:57:09.022564      I2C: 03:38

 1183 12:57:09.025791      I2C: 03:39

 1184 12:57:09.025891      I2C: 03:3a

 1185 12:57:09.029058      I2C: 03:3b

 1186 12:57:09.032374     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1187 12:57:09.041669     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1188 12:57:09.051924     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1189 12:57:09.058142     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1190 12:57:09.061939      PCI: 01:00.0

 1191 12:57:09.071739      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1192 12:57:09.071838     PCI: 00:1e.0

 1193 12:57:09.085356     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1194 12:57:09.094795     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1195 12:57:09.098073     PCI: 00:1e.2 child on link 0 SPI: 00

 1196 12:57:09.108269     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 12:57:09.108373      SPI: 00

 1198 12:57:09.114880     PCI: 00:1e.3 child on link 0 SPI: 01

 1199 12:57:09.124806     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1200 12:57:09.124917      SPI: 01

 1201 12:57:09.128216     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1202 12:57:09.138067     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1203 12:57:09.148093     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1204 12:57:09.148206      PNP: 0c09.0

 1205 12:57:09.157732      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1206 12:57:09.157833     PCI: 00:1f.3

 1207 12:57:09.167435     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1208 12:57:09.177821     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1209 12:57:09.180973     PCI: 00:1f.4

 1210 12:57:09.190593     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1211 12:57:09.200859     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1212 12:57:09.200966     PCI: 00:1f.5

 1213 12:57:09.210522     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1214 12:57:09.217220  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1215 12:57:09.223863  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1216 12:57:09.230335  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1217 12:57:09.233518  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1218 12:57:09.236893  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1219 12:57:09.240250  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1220 12:57:09.243535  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1221 12:57:09.250113  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1222 12:57:09.256910  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1223 12:57:09.263382  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1224 12:57:09.273333  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1225 12:57:09.280207  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1226 12:57:09.283461  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1227 12:57:09.293380  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1228 12:57:09.296298  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1229 12:57:09.303451  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1230 12:57:09.306542  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1231 12:57:09.309668  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1232 12:57:09.316728  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1233 12:57:09.319488  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1234 12:57:09.326100  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1235 12:57:09.329430  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1236 12:57:09.336147  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1237 12:57:09.339572  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1238 12:57:09.346226  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1239 12:57:09.349590  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1240 12:57:09.356543  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1241 12:57:09.359838  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1242 12:57:09.365865  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1243 12:57:09.369150  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1244 12:57:09.375762  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1245 12:57:09.379536  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1246 12:57:09.382593  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1247 12:57:09.388958  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1248 12:57:09.392199  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1249 12:57:09.399307  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1250 12:57:09.402504  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1251 12:57:09.412070  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1252 12:57:09.415965  avoid_fixed_resources: DOMAIN: 0000

 1253 12:57:09.422386  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1254 12:57:09.429134  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1255 12:57:09.435066  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1256 12:57:09.441718  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1257 12:57:09.451690  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1258 12:57:09.458304  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1259 12:57:09.464957  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1260 12:57:09.474724  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1261 12:57:09.481902  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1262 12:57:09.488346  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1263 12:57:09.495250  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1264 12:57:09.504753  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1265 12:57:09.504871  Setting resources...

 1266 12:57:09.511557  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1267 12:57:09.514797  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1268 12:57:09.521329  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1269 12:57:09.524654  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1270 12:57:09.527919  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1271 12:57:09.534337  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1272 12:57:09.541466  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1273 12:57:09.548151  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1274 12:57:09.554736  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1275 12:57:09.557481  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1276 12:57:09.564124  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1277 12:57:09.567435  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1278 12:57:09.574044  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1279 12:57:09.577416  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1280 12:57:09.584418  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1281 12:57:09.587503  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1282 12:57:09.594072  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1283 12:57:09.597287  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1284 12:57:09.604243  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1285 12:57:09.607382  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1286 12:57:09.613719  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1287 12:57:09.617558  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1288 12:57:09.624104  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1289 12:57:09.627351  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1290 12:57:09.633842  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1291 12:57:09.637121  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1292 12:57:09.643684  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1293 12:57:09.647115  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1294 12:57:09.650288  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1295 12:57:09.656979  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1296 12:57:09.660355  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1297 12:57:09.667044  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1298 12:57:09.673690  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1299 12:57:09.680785  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1300 12:57:09.689856  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1301 12:57:09.696495  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1302 12:57:09.699806  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1303 12:57:09.706893  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1304 12:57:09.713332  Root Device assign_resources, bus 0 link: 0

 1305 12:57:09.716328  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1306 12:57:09.726513  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1307 12:57:09.733055  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1308 12:57:09.743189  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1309 12:57:09.750057  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1310 12:57:09.760100  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1311 12:57:09.766144  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1312 12:57:09.772782  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1313 12:57:09.776157  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1314 12:57:09.782746  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1315 12:57:09.793056  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1316 12:57:09.799053  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1317 12:57:09.809094  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1318 12:57:09.812479  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1319 12:57:09.819406  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1320 12:57:09.825549  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1321 12:57:09.832553  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1322 12:57:09.835868  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1323 12:57:09.845496  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1324 12:57:09.852024  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1325 12:57:09.858742  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1326 12:57:09.868857  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1327 12:57:09.875497  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1328 12:57:09.882067  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1329 12:57:09.892000  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1330 12:57:09.898507  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1331 12:57:09.901729  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1332 12:57:09.908468  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1333 12:57:09.915054  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1334 12:57:09.925100  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1335 12:57:09.935229  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1336 12:57:09.938469  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1337 12:57:09.948343  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1338 12:57:09.951569  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1339 12:57:09.961506  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1340 12:57:09.968232  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1341 12:57:09.971611  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1342 12:57:09.978235  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1343 12:57:09.984876  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1344 12:57:09.991587  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1345 12:57:09.994804  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1346 12:57:10.001430  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1347 12:57:10.004665  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1348 12:57:10.011460  LPC: Trying to open IO window from 800 size 1ff

 1349 12:57:10.017527  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1350 12:57:10.027414  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1351 12:57:10.034414  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1352 12:57:10.044107  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1353 12:57:10.047275  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1354 12:57:10.050501  Root Device assign_resources, bus 0 link: 0

 1355 12:57:10.053797  Done setting resources.

 1356 12:57:10.060553  Show resources in subtree (Root Device)...After assigning values.

 1357 12:57:10.063701   Root Device child on link 0 CPU_CLUSTER: 0

 1358 12:57:10.070348    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1359 12:57:10.070459     APIC: 00

 1360 12:57:10.070542     APIC: 03

 1361 12:57:10.073708     APIC: 06

 1362 12:57:10.073804     APIC: 01

 1363 12:57:10.077134     APIC: 02

 1364 12:57:10.077231     APIC: 07

 1365 12:57:10.077307     APIC: 04

 1366 12:57:10.080473     APIC: 05

 1367 12:57:10.083785    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1368 12:57:10.093745    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1369 12:57:10.103438    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1370 12:57:10.106757     PCI: 00:00.0

 1371 12:57:10.116728     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1372 12:57:10.126763     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1373 12:57:10.136125     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1374 12:57:10.143018     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1375 12:57:10.152601     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1376 12:57:10.162888     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1377 12:57:10.172704     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1378 12:57:10.182708     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1379 12:57:10.189551     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1380 12:57:10.198855     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1381 12:57:10.209334     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1382 12:57:10.218965     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1383 12:57:10.229132     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1384 12:57:10.238557     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1385 12:57:10.248533     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1386 12:57:10.254915     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1387 12:57:10.258656     PCI: 00:02.0

 1388 12:57:10.268443     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1389 12:57:10.278302     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1390 12:57:10.288083     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1391 12:57:10.291455     PCI: 00:04.0

 1392 12:57:10.291554     PCI: 00:08.0

 1393 12:57:10.301505     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1394 12:57:10.304846     PCI: 00:12.0

 1395 12:57:10.314513     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1396 12:57:10.318382     PCI: 00:14.0 child on link 0 USB0 port 0

 1397 12:57:10.328200     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1398 12:57:10.334784      USB0 port 0 child on link 0 USB2 port 0

 1399 12:57:10.334884       USB2 port 0

 1400 12:57:10.338205       USB2 port 1

 1401 12:57:10.338307       USB2 port 2

 1402 12:57:10.340904       USB2 port 3

 1403 12:57:10.341003       USB2 port 5

 1404 12:57:10.344237       USB2 port 6

 1405 12:57:10.344348       USB2 port 9

 1406 12:57:10.347623       USB3 port 0

 1407 12:57:10.347725       USB3 port 1

 1408 12:57:10.350878       USB3 port 2

 1409 12:57:10.350989       USB3 port 3

 1410 12:57:10.354203       USB3 port 4

 1411 12:57:10.354302     PCI: 00:14.2

 1412 12:57:10.368054     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1413 12:57:10.377672     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1414 12:57:10.377853     PCI: 00:14.3

 1415 12:57:10.387361     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1416 12:57:10.394105     PCI: 00:15.0 child on link 0 I2C: 01:15

 1417 12:57:10.403498     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1418 12:57:10.403622      I2C: 01:15

 1419 12:57:10.410235     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1420 12:57:10.420536     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1421 12:57:10.420659      I2C: 02:5d

 1422 12:57:10.423399      GENERIC: 0.0

 1423 12:57:10.423702     PCI: 00:16.0

 1424 12:57:10.433582     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1425 12:57:10.436753     PCI: 00:17.0

 1426 12:57:10.446929     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1427 12:57:10.456853     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1428 12:57:10.466415     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1429 12:57:10.476260     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1430 12:57:10.482641     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1431 12:57:10.492408     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1432 12:57:10.499631     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1433 12:57:10.509025     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1434 12:57:10.509169      I2C: 03:1a

 1435 12:57:10.512510      I2C: 03:38

 1436 12:57:10.512613      I2C: 03:39

 1437 12:57:10.515603      I2C: 03:3a

 1438 12:57:10.515713      I2C: 03:3b

 1439 12:57:10.518854     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1440 12:57:10.529392     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1441 12:57:10.539311     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1442 12:57:10.548713     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1443 12:57:10.552242      PCI: 01:00.0

 1444 12:57:10.562145      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1445 12:57:10.565502     PCI: 00:1e.0

 1446 12:57:10.575432     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1447 12:57:10.585218     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1448 12:57:10.588466     PCI: 00:1e.2 child on link 0 SPI: 00

 1449 12:57:10.598405     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1450 12:57:10.602157      SPI: 00

 1451 12:57:10.605428     PCI: 00:1e.3 child on link 0 SPI: 01

 1452 12:57:10.615370     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1453 12:57:10.618218      SPI: 01

 1454 12:57:10.621901     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1455 12:57:10.631920     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1456 12:57:10.638381     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1457 12:57:10.641848      PNP: 0c09.0

 1458 12:57:10.648644      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1459 12:57:10.651360     PCI: 00:1f.3

 1460 12:57:10.661754     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1461 12:57:10.671129     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1462 12:57:10.674551     PCI: 00:1f.4

 1463 12:57:10.681486     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1464 12:57:10.694284     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1465 12:57:10.694643     PCI: 00:1f.5

 1466 12:57:10.704177     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1467 12:57:10.707537  Done allocating resources.

 1468 12:57:10.714134  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1469 12:57:10.714491  Enabling resources...

 1470 12:57:10.721548  PCI: 00:00.0 subsystem <- 8086/9b61

 1471 12:57:10.721905  PCI: 00:00.0 cmd <- 06

 1472 12:57:10.724822  PCI: 00:02.0 subsystem <- 8086/9b41

 1473 12:57:10.728356  PCI: 00:02.0 cmd <- 03

 1474 12:57:10.731451  PCI: 00:08.0 cmd <- 06

 1475 12:57:10.734866  PCI: 00:12.0 subsystem <- 8086/02f9

 1476 12:57:10.738026  PCI: 00:12.0 cmd <- 02

 1477 12:57:10.741537  PCI: 00:14.0 subsystem <- 8086/02ed

 1478 12:57:10.744738  PCI: 00:14.0 cmd <- 02

 1479 12:57:10.748082  PCI: 00:14.2 cmd <- 02

 1480 12:57:10.751425  PCI: 00:14.3 subsystem <- 8086/02f0

 1481 12:57:10.751814  PCI: 00:14.3 cmd <- 02

 1482 12:57:10.758041  PCI: 00:15.0 subsystem <- 8086/02e8

 1483 12:57:10.758407  PCI: 00:15.0 cmd <- 02

 1484 12:57:10.761402  PCI: 00:15.1 subsystem <- 8086/02e9

 1485 12:57:10.764909  PCI: 00:15.1 cmd <- 02

 1486 12:57:10.768245  PCI: 00:16.0 subsystem <- 8086/02e0

 1487 12:57:10.771804  PCI: 00:16.0 cmd <- 02

 1488 12:57:10.774529  PCI: 00:17.0 subsystem <- 8086/02d3

 1489 12:57:10.777973  PCI: 00:17.0 cmd <- 03

 1490 12:57:10.781365  PCI: 00:19.0 subsystem <- 8086/02c5

 1491 12:57:10.784956  PCI: 00:19.0 cmd <- 02

 1492 12:57:10.788373  PCI: 00:1d.0 bridge ctrl <- 0013

 1493 12:57:10.791357  PCI: 00:1d.0 subsystem <- 8086/02b0

 1494 12:57:10.794624  PCI: 00:1d.0 cmd <- 06

 1495 12:57:10.797841  PCI: 00:1e.0 subsystem <- 8086/02a8

 1496 12:57:10.801495  PCI: 00:1e.0 cmd <- 06

 1497 12:57:10.805140  PCI: 00:1e.2 subsystem <- 8086/02aa

 1498 12:57:10.807875  PCI: 00:1e.2 cmd <- 06

 1499 12:57:10.811174  PCI: 00:1e.3 subsystem <- 8086/02ab

 1500 12:57:10.811528  PCI: 00:1e.3 cmd <- 02

 1501 12:57:10.817992  PCI: 00:1f.0 subsystem <- 8086/0284

 1502 12:57:10.818380  PCI: 00:1f.0 cmd <- 407

 1503 12:57:10.824584  PCI: 00:1f.3 subsystem <- 8086/02c8

 1504 12:57:10.824983  PCI: 00:1f.3 cmd <- 02

 1505 12:57:10.827822  PCI: 00:1f.4 subsystem <- 8086/02a3

 1506 12:57:10.831322  PCI: 00:1f.4 cmd <- 03

 1507 12:57:10.834708  PCI: 00:1f.5 subsystem <- 8086/02a4

 1508 12:57:10.837885  PCI: 00:1f.5 cmd <- 406

 1509 12:57:10.846952  PCI: 01:00.0 cmd <- 02

 1510 12:57:10.851820  done.

 1511 12:57:10.863961  ME: Version: 14.0.39.1367

 1512 12:57:10.870832  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11

 1513 12:57:10.873513  Initializing devices...

 1514 12:57:10.873908  Root Device init ...

 1515 12:57:10.880277  Chrome EC: Set SMI mask to 0x0000000000000000

 1516 12:57:10.883546  Chrome EC: clear events_b mask to 0x0000000000000000

 1517 12:57:10.890632  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1518 12:57:10.897449  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1519 12:57:10.903296  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1520 12:57:10.906728  Chrome EC: Set WAKE mask to 0x0000000000000000

 1521 12:57:10.910056  Root Device init finished in 35165 usecs

 1522 12:57:10.914103  CPU_CLUSTER: 0 init ...

 1523 12:57:10.920690  CPU_CLUSTER: 0 init finished in 2448 usecs

 1524 12:57:10.924749  PCI: 00:00.0 init ...

 1525 12:57:10.928176  CPU TDP: 15 Watts

 1526 12:57:10.931529  CPU PL2 = 64 Watts

 1527 12:57:10.934756  PCI: 00:00.0 init finished in 7074 usecs

 1528 12:57:10.938148  PCI: 00:02.0 init ...

 1529 12:57:10.941364  PCI: 00:02.0 init finished in 2244 usecs

 1530 12:57:10.944483  PCI: 00:08.0 init ...

 1531 12:57:10.947732  PCI: 00:08.0 init finished in 2253 usecs

 1532 12:57:10.950991  PCI: 00:12.0 init ...

 1533 12:57:10.954231  PCI: 00:12.0 init finished in 2253 usecs

 1534 12:57:10.957868  PCI: 00:14.0 init ...

 1535 12:57:10.961117  PCI: 00:14.0 init finished in 2253 usecs

 1536 12:57:10.964528  PCI: 00:14.2 init ...

 1537 12:57:10.967229  PCI: 00:14.2 init finished in 2254 usecs

 1538 12:57:10.970495  PCI: 00:14.3 init ...

 1539 12:57:10.973788  PCI: 00:14.3 init finished in 2272 usecs

 1540 12:57:10.977301  PCI: 00:15.0 init ...

 1541 12:57:10.980692  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1542 12:57:10.983592  PCI: 00:15.0 init finished in 5968 usecs

 1543 12:57:10.987695  PCI: 00:15.1 init ...

 1544 12:57:10.990405  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1545 12:57:10.997208  PCI: 00:15.1 init finished in 5968 usecs

 1546 12:57:10.997587  PCI: 00:16.0 init ...

 1547 12:57:11.003472  PCI: 00:16.0 init finished in 2252 usecs

 1548 12:57:11.006706  PCI: 00:19.0 init ...

 1549 12:57:11.009948  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1550 12:57:11.013552  PCI: 00:19.0 init finished in 5975 usecs

 1551 12:57:11.016643  PCI: 00:1d.0 init ...

 1552 12:57:11.019970  Initializing PCH PCIe bridge.

 1553 12:57:11.023305  PCI: 00:1d.0 init finished in 5274 usecs

 1554 12:57:11.026804  PCI: 00:1f.0 init ...

 1555 12:57:11.030038  IOAPIC: Initializing IOAPIC at 0xfec00000

 1556 12:57:11.036565  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1557 12:57:11.036922  IOAPIC: ID = 0x02

 1558 12:57:11.039828  IOAPIC: Dumping registers

 1559 12:57:11.043065    reg 0x0000: 0x02000000

 1560 12:57:11.046332    reg 0x0001: 0x00770020

 1561 12:57:11.046743    reg 0x0002: 0x00000000

 1562 12:57:11.053026  PCI: 00:1f.0 init finished in 23545 usecs

 1563 12:57:11.057073  PCI: 00:1f.4 init ...

 1564 12:57:11.060233  PCI: 00:1f.4 init finished in 2262 usecs

 1565 12:57:11.071051  PCI: 01:00.0 init ...

 1566 12:57:11.073740  PCI: 01:00.0 init finished in 2253 usecs

 1567 12:57:11.078704  PNP: 0c09.0 init ...

 1568 12:57:11.081976  Google Chrome EC uptime: 11.076 seconds

 1569 12:57:11.088122  Google Chrome AP resets since EC boot: 0

 1570 12:57:11.091523  Google Chrome most recent AP reset causes:

 1571 12:57:11.098286  Google Chrome EC reset flags at last EC boot: reset-pin

 1572 12:57:11.101732  PNP: 0c09.0 init finished in 20610 usecs

 1573 12:57:11.104502  Devices initialized

 1574 12:57:11.107891  Show all devs... After init.

 1575 12:57:11.108281  Root Device: enabled 1

 1576 12:57:11.111439  CPU_CLUSTER: 0: enabled 1

 1577 12:57:11.114790  DOMAIN: 0000: enabled 1

 1578 12:57:11.115317  APIC: 00: enabled 1

 1579 12:57:11.118084  PCI: 00:00.0: enabled 1

 1580 12:57:11.121483  PCI: 00:02.0: enabled 1

 1581 12:57:11.124840  PCI: 00:04.0: enabled 0

 1582 12:57:11.125229  PCI: 00:05.0: enabled 0

 1583 12:57:11.128154  PCI: 00:12.0: enabled 1

 1584 12:57:11.131424  PCI: 00:12.5: enabled 0

 1585 12:57:11.134883  PCI: 00:12.6: enabled 0

 1586 12:57:11.135309  PCI: 00:14.0: enabled 1

 1587 12:57:11.137998  PCI: 00:14.1: enabled 0

 1588 12:57:11.141272  PCI: 00:14.3: enabled 1

 1589 12:57:11.141662  PCI: 00:14.5: enabled 0

 1590 12:57:11.144454  PCI: 00:15.0: enabled 1

 1591 12:57:11.147693  PCI: 00:15.1: enabled 1

 1592 12:57:11.151166  PCI: 00:15.2: enabled 0

 1593 12:57:11.151563  PCI: 00:15.3: enabled 0

 1594 12:57:11.154440  PCI: 00:16.0: enabled 1

 1595 12:57:11.157923  PCI: 00:16.1: enabled 0

 1596 12:57:11.161081  PCI: 00:16.2: enabled 0

 1597 12:57:11.161594  PCI: 00:16.3: enabled 0

 1598 12:57:11.164106  PCI: 00:16.4: enabled 0

 1599 12:57:11.167905  PCI: 00:16.5: enabled 0

 1600 12:57:11.170414  PCI: 00:17.0: enabled 1

 1601 12:57:11.170863  PCI: 00:19.0: enabled 1

 1602 12:57:11.173971  PCI: 00:19.1: enabled 0

 1603 12:57:11.177360  PCI: 00:19.2: enabled 0

 1604 12:57:11.177747  PCI: 00:1a.0: enabled 0

 1605 12:57:11.180852  PCI: 00:1c.0: enabled 0

 1606 12:57:11.184318  PCI: 00:1c.1: enabled 0

 1607 12:57:11.187711  PCI: 00:1c.2: enabled 0

 1608 12:57:11.188149  PCI: 00:1c.3: enabled 0

 1609 12:57:11.190976  PCI: 00:1c.4: enabled 0

 1610 12:57:11.193788  PCI: 00:1c.5: enabled 0

 1611 12:57:11.197508  PCI: 00:1c.6: enabled 0

 1612 12:57:11.198006  PCI: 00:1c.7: enabled 0

 1613 12:57:11.201157  PCI: 00:1d.0: enabled 1

 1614 12:57:11.203964  PCI: 00:1d.1: enabled 0

 1615 12:57:11.207164  PCI: 00:1d.2: enabled 0

 1616 12:57:11.207553  PCI: 00:1d.3: enabled 0

 1617 12:57:11.210732  PCI: 00:1d.4: enabled 0

 1618 12:57:11.214076  PCI: 00:1d.5: enabled 0

 1619 12:57:11.217748  PCI: 00:1e.0: enabled 1

 1620 12:57:11.218346  PCI: 00:1e.1: enabled 0

 1621 12:57:11.220701  PCI: 00:1e.2: enabled 1

 1622 12:57:11.223445  PCI: 00:1e.3: enabled 1

 1623 12:57:11.223831  PCI: 00:1f.0: enabled 1

 1624 12:57:11.227253  PCI: 00:1f.1: enabled 0

 1625 12:57:11.230347  PCI: 00:1f.2: enabled 0

 1626 12:57:11.233525  PCI: 00:1f.3: enabled 1

 1627 12:57:11.233941  PCI: 00:1f.4: enabled 1

 1628 12:57:11.236818  PCI: 00:1f.5: enabled 1

 1629 12:57:11.240006  PCI: 00:1f.6: enabled 0

 1630 12:57:11.243453  USB0 port 0: enabled 1

 1631 12:57:11.243844  I2C: 01:15: enabled 1

 1632 12:57:11.246572  I2C: 02:5d: enabled 1

 1633 12:57:11.249904  GENERIC: 0.0: enabled 1

 1634 12:57:11.250288  I2C: 03:1a: enabled 1

 1635 12:57:11.253229  I2C: 03:38: enabled 1

 1636 12:57:11.256521  I2C: 03:39: enabled 1

 1637 12:57:11.256911  I2C: 03:3a: enabled 1

 1638 12:57:11.260409  I2C: 03:3b: enabled 1

 1639 12:57:11.263143  PCI: 00:00.0: enabled 1

 1640 12:57:11.263529  SPI: 00: enabled 1

 1641 12:57:11.266893  SPI: 01: enabled 1

 1642 12:57:11.270294  PNP: 0c09.0: enabled 1

 1643 12:57:11.270771  USB2 port 0: enabled 1

 1644 12:57:11.273539  USB2 port 1: enabled 1

 1645 12:57:11.276645  USB2 port 2: enabled 0

 1646 12:57:11.277031  USB2 port 3: enabled 0

 1647 12:57:11.279966  USB2 port 5: enabled 0

 1648 12:57:11.283378  USB2 port 6: enabled 1

 1649 12:57:11.286800  USB2 port 9: enabled 1

 1650 12:57:11.287274  USB3 port 0: enabled 1

 1651 12:57:11.290154  USB3 port 1: enabled 1

 1652 12:57:11.292954  USB3 port 2: enabled 1

 1653 12:57:11.293341  USB3 port 3: enabled 1

 1654 12:57:11.296315  USB3 port 4: enabled 0

 1655 12:57:11.299763  APIC: 03: enabled 1

 1656 12:57:11.300198  APIC: 06: enabled 1

 1657 12:57:11.303214  APIC: 01: enabled 1

 1658 12:57:11.306535  APIC: 02: enabled 1

 1659 12:57:11.306922  APIC: 07: enabled 1

 1660 12:57:11.309820  APIC: 04: enabled 1

 1661 12:57:11.310246  APIC: 05: enabled 1

 1662 12:57:11.313470  PCI: 00:08.0: enabled 1

 1663 12:57:11.315943  PCI: 00:14.2: enabled 1

 1664 12:57:11.319415  PCI: 01:00.0: enabled 1

 1665 12:57:11.322689  Disabling ACPI via APMC:

 1666 12:57:11.326136  done.

 1667 12:57:11.329520  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1668 12:57:11.332967  ELOG: NV offset 0xaf0000 size 0x4000

 1669 12:57:11.339815  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1670 12:57:11.346242  ELOG: Event(17) added with size 13 at 2023-03-22 12:57:10 UTC

 1671 12:57:11.352857  ELOG: Event(92) added with size 9 at 2023-03-22 12:57:10 UTC

 1672 12:57:11.359398  ELOG: Event(93) added with size 9 at 2023-03-22 12:57:10 UTC

 1673 12:57:11.365948  ELOG: Event(9A) added with size 9 at 2023-03-22 12:57:10 UTC

 1674 12:57:11.372495  ELOG: Event(9E) added with size 10 at 2023-03-22 12:57:10 UTC

 1675 12:57:11.379619  ELOG: Event(9F) added with size 14 at 2023-03-22 12:57:10 UTC

 1676 12:57:11.382969  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1677 12:57:11.390005  ELOG: Event(A1) added with size 10 at 2023-03-22 12:57:10 UTC

 1678 12:57:11.400435  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1679 12:57:11.407049  ELOG: Event(A0) added with size 9 at 2023-03-22 12:57:10 UTC

 1680 12:57:11.410483  elog_add_boot_reason: Logged dev mode boot

 1681 12:57:11.413786  Finalize devices...

 1682 12:57:11.414313  PCI: 00:17.0 final

 1683 12:57:11.416649  Devices finalized

 1684 12:57:11.419781  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1685 12:57:11.426534  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1686 12:57:11.429922  ME: HFSTS1                  : 0x90000245

 1687 12:57:11.433465  ME: HFSTS2                  : 0x3B850126

 1688 12:57:11.439588  ME: HFSTS3                  : 0x00000020

 1689 12:57:11.442945  ME: HFSTS4                  : 0x00004800

 1690 12:57:11.446294  ME: HFSTS5                  : 0x00000000

 1691 12:57:11.449515  ME: HFSTS6                  : 0x40400006

 1692 12:57:11.452717  ME: Manufacturing Mode      : NO

 1693 12:57:11.455814  ME: FW Partition Table      : OK

 1694 12:57:11.459154  ME: Bringup Loader Failure  : NO

 1695 12:57:11.462466  ME: Firmware Init Complete  : YES

 1696 12:57:11.466258  ME: Boot Options Present    : NO

 1697 12:57:11.469489  ME: Update In Progress      : NO

 1698 12:57:11.472684  ME: D0i3 Support            : YES

 1699 12:57:11.475831  ME: Low Power State Enabled : NO

 1700 12:57:11.479282  ME: CPU Replaced            : NO

 1701 12:57:11.482675  ME: CPU Replacement Valid   : YES

 1702 12:57:11.485670  ME: Current Working State   : 5

 1703 12:57:11.489215  ME: Current Operation State : 1

 1704 12:57:11.492322  ME: Current Operation Mode  : 0

 1705 12:57:11.495783  ME: Error Code              : 0

 1706 12:57:11.499320  ME: CPU Debug Disabled      : YES

 1707 12:57:11.502639  ME: TXT Support             : NO

 1708 12:57:11.508719  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1709 12:57:11.515518  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1710 12:57:11.516051  CBFS @ c08000 size 3f8000

 1711 12:57:11.522558  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1712 12:57:11.525906  CBFS: Locating 'fallback/dsdt.aml'

 1713 12:57:11.528718  CBFS: Found @ offset 10bb80 size 3fa5

 1714 12:57:11.535467  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1715 12:57:11.538612  CBFS @ c08000 size 3f8000

 1716 12:57:11.542020  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1717 12:57:11.545532  CBFS: Locating 'fallback/slic'

 1718 12:57:11.550970  CBFS: 'fallback/slic' not found.

 1719 12:57:11.556942  ACPI: Writing ACPI tables at 99b3e000.

 1720 12:57:11.557347  ACPI:    * FACS

 1721 12:57:11.560826  ACPI:    * DSDT

 1722 12:57:11.564232  Ramoops buffer: 0x100000@0x99a3d000.

 1723 12:57:11.567407  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1724 12:57:11.573824  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1725 12:57:11.577072  Google Chrome EC: version:

 1726 12:57:11.580163  	ro: helios_v2.0.2659-56403530b

 1727 12:57:11.583618  	rw: helios_v2.0.2849-c41de27e7d

 1728 12:57:11.583717    running image: 1

 1729 12:57:11.587419  ACPI:    * FADT

 1730 12:57:11.587527  SCI is IRQ9

 1731 12:57:11.594738  ACPI: added table 1/32, length now 40

 1732 12:57:11.595158  ACPI:     * SSDT

 1733 12:57:11.598237  Found 1 CPU(s) with 8 core(s) each.

 1734 12:57:11.601459  Error: Could not locate 'wifi_sar' in VPD.

 1735 12:57:11.607731  Checking CBFS for default SAR values

 1736 12:57:11.611055  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1737 12:57:11.614519  CBFS @ c08000 size 3f8000

 1738 12:57:11.620668  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1739 12:57:11.624057  CBFS: Locating 'wifi_sar_defaults.hex'

 1740 12:57:11.627687  CBFS: Found @ offset 5fac0 size 77

 1741 12:57:11.631155  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1742 12:57:11.637890  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1743 12:57:11.641137  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1744 12:57:11.647250  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1745 12:57:11.650637  failed to find key in VPD: dsm_calib_r0_0

 1746 12:57:11.660714  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1747 12:57:11.664117  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1748 12:57:11.670635  failed to find key in VPD: dsm_calib_r0_1

 1749 12:57:11.677070  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1750 12:57:11.683515  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1751 12:57:11.686757  failed to find key in VPD: dsm_calib_r0_2

 1752 12:57:11.696545  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1753 12:57:11.700408  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1754 12:57:11.706833  failed to find key in VPD: dsm_calib_r0_3

 1755 12:57:11.713492  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1756 12:57:11.720347  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1757 12:57:11.723022  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1758 12:57:11.729920  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1759 12:57:11.733429  EC returned error result code 1

 1760 12:57:11.736981  EC returned error result code 1

 1761 12:57:11.740272  EC returned error result code 1

 1762 12:57:11.743600  PS2K: Bad resp from EC. Vivaldi disabled!

 1763 12:57:11.750358  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1764 12:57:11.756466  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1765 12:57:11.759841  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1766 12:57:11.766451  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1767 12:57:11.769876  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1768 12:57:11.776914  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1769 12:57:11.783428  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1770 12:57:11.790036  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1771 12:57:11.793355  ACPI: added table 2/32, length now 44

 1772 12:57:11.793755  ACPI:    * MCFG

 1773 12:57:11.799771  ACPI: added table 3/32, length now 48

 1774 12:57:11.800170  ACPI:    * TPM2

 1775 12:57:11.802992  TPM2 log created at 99a2d000

 1776 12:57:11.806319  ACPI: added table 4/32, length now 52

 1777 12:57:11.809584  ACPI:    * MADT

 1778 12:57:11.809989  SCI is IRQ9

 1779 12:57:11.812891  ACPI: added table 5/32, length now 56

 1780 12:57:11.816114  current = 99b43ac0

 1781 12:57:11.816502  ACPI:    * DMAR

 1782 12:57:11.819642  ACPI: added table 6/32, length now 60

 1783 12:57:11.822940  ACPI:    * IGD OpRegion

 1784 12:57:11.826362  GMA: Found VBT in CBFS

 1785 12:57:11.829776  GMA: Found valid VBT in CBFS

 1786 12:57:11.832485  ACPI: added table 7/32, length now 64

 1787 12:57:11.832904  ACPI:    * HPET

 1788 12:57:11.839300  ACPI: added table 8/32, length now 68

 1789 12:57:11.839689  ACPI: done.

 1790 12:57:11.842746  ACPI tables: 31744 bytes.

 1791 12:57:11.845903  smbios_write_tables: 99a2c000

 1792 12:57:11.849416  EC returned error result code 3

 1793 12:57:11.852542  Couldn't obtain OEM name from CBI

 1794 12:57:11.855850  Create SMBIOS type 17

 1795 12:57:11.859183  PCI: 00:00.0 (Intel Cannonlake)

 1796 12:57:11.859565  PCI: 00:14.3 (Intel WiFi)

 1797 12:57:11.862760  SMBIOS tables: 939 bytes.

 1798 12:57:11.865576  Writing table forward entry at 0x00000500

 1799 12:57:11.872465  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1800 12:57:11.875854  Writing coreboot table at 0x99b62000

 1801 12:57:11.882431   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1802 12:57:11.889143   1. 0000000000001000-000000000009ffff: RAM

 1803 12:57:11.892300   2. 00000000000a0000-00000000000fffff: RESERVED

 1804 12:57:11.895602   3. 0000000000100000-0000000099a2bfff: RAM

 1805 12:57:11.902375   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1806 12:57:11.908951   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1807 12:57:11.912242   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1808 12:57:11.918471   7. 000000009a000000-000000009f7fffff: RESERVED

 1809 12:57:11.921740   8. 00000000e0000000-00000000efffffff: RESERVED

 1810 12:57:11.928436   9. 00000000fc000000-00000000fc000fff: RESERVED

 1811 12:57:11.931876  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1812 12:57:11.938722  11. 00000000fed10000-00000000fed17fff: RESERVED

 1813 12:57:11.941507  12. 00000000fed80000-00000000fed83fff: RESERVED

 1814 12:57:11.944971  13. 00000000fed90000-00000000fed91fff: RESERVED

 1815 12:57:11.951640  14. 00000000feda0000-00000000feda1fff: RESERVED

 1816 12:57:11.954898  15. 0000000100000000-000000045e7fffff: RAM

 1817 12:57:11.957985  Graphics framebuffer located at 0xc0000000

 1818 12:57:11.961497  Passing 5 GPIOs to payload:

 1819 12:57:11.968160              NAME |       PORT | POLARITY |     VALUE

 1820 12:57:11.971590     write protect |  undefined |     high |       low

 1821 12:57:11.977796               lid |  undefined |     high |      high

 1822 12:57:11.984629             power |  undefined |     high |       low

 1823 12:57:11.987841             oprom |  undefined |     high |       low

 1824 12:57:11.994370          EC in RW | 0x000000cb |     high |       low

 1825 12:57:11.994774  Board ID: 4

 1826 12:57:12.000855  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1827 12:57:12.004136  CBFS @ c08000 size 3f8000

 1828 12:57:12.007991  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1829 12:57:12.014428  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1830 12:57:12.017875  coreboot table: 1492 bytes.

 1831 12:57:12.021390  IMD ROOT    0. 99fff000 00001000

 1832 12:57:12.024681  IMD SMALL   1. 99ffe000 00001000

 1833 12:57:12.028100  FSP MEMORY  2. 99c4e000 003b0000

 1834 12:57:12.031374  CONSOLE     3. 99c2e000 00020000

 1835 12:57:12.034036  FMAP        4. 99c2d000 0000054e

 1836 12:57:12.037525  TIME STAMP  5. 99c2c000 00000910

 1837 12:57:12.040990  VBOOT WORK  6. 99c18000 00014000

 1838 12:57:12.044450  MRC DATA    7. 99c16000 00001958

 1839 12:57:12.047818  ROMSTG STCK 8. 99c15000 00001000

 1840 12:57:12.050574  AFTER CAR   9. 99c0b000 0000a000

 1841 12:57:12.054043  RAMSTAGE   10. 99baf000 0005c000

 1842 12:57:12.057478  REFCODE    11. 99b7a000 00035000

 1843 12:57:12.060787  SMM BACKUP 12. 99b6a000 00010000

 1844 12:57:12.064053  COREBOOT   13. 99b62000 00008000

 1845 12:57:12.067449  ACPI       14. 99b3e000 00024000

 1846 12:57:12.070844  ACPI GNVS  15. 99b3d000 00001000

 1847 12:57:12.074213  RAMOOPS    16. 99a3d000 00100000

 1848 12:57:12.077631  TPM2 TCGLOG17. 99a2d000 00010000

 1849 12:57:12.080871  SMBIOS     18. 99a2c000 00000800

 1850 12:57:12.083527  IMD small region:

 1851 12:57:12.087068    IMD ROOT    0. 99ffec00 00000400

 1852 12:57:12.090249    FSP RUNTIME 1. 99ffebe0 00000004

 1853 12:57:12.093621    EC HOSTEVENT 2. 99ffebc0 00000008

 1854 12:57:12.096976    POWER STATE 3. 99ffeb80 00000040

 1855 12:57:12.100229    ROMSTAGE    4. 99ffeb60 00000004

 1856 12:57:12.103396    MEM INFO    5. 99ffe9a0 000001b9

 1857 12:57:12.106668    VPD         6. 99ffe920 0000006c

 1858 12:57:12.109831  MTRR: Physical address space:

 1859 12:57:12.116753  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1860 12:57:12.122786  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1861 12:57:12.129918  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1862 12:57:12.136287  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1863 12:57:12.143057  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1864 12:57:12.146321  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1865 12:57:12.153167  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1866 12:57:12.159376  MTRR: Fixed MSR 0x250 0x0606060606060606

 1867 12:57:12.162831  MTRR: Fixed MSR 0x258 0x0606060606060606

 1868 12:57:12.166076  MTRR: Fixed MSR 0x259 0x0000000000000000

 1869 12:57:12.169373  MTRR: Fixed MSR 0x268 0x0606060606060606

 1870 12:57:12.176149  MTRR: Fixed MSR 0x269 0x0606060606060606

 1871 12:57:12.179637  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1872 12:57:12.182991  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1873 12:57:12.185713  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1874 12:57:12.189201  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1875 12:57:12.196150  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1876 12:57:12.199624  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1877 12:57:12.202292  call enable_fixed_mtrr()

 1878 12:57:12.205663  CPU physical address size: 39 bits

 1879 12:57:12.208969  MTRR: default type WB/UC MTRR counts: 6/8.

 1880 12:57:12.212357  MTRR: WB selected as default type.

 1881 12:57:12.218712  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1882 12:57:12.225953  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1883 12:57:12.232158  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1884 12:57:12.238968  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1885 12:57:12.245377  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1886 12:57:12.252700  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1887 12:57:12.256004  MTRR: Fixed MSR 0x250 0x0606060606060606

 1888 12:57:12.258703  MTRR: Fixed MSR 0x258 0x0606060606060606

 1889 12:57:12.265680  MTRR: Fixed MSR 0x259 0x0000000000000000

 1890 12:57:12.268958  MTRR: Fixed MSR 0x268 0x0606060606060606

 1891 12:57:12.272218  MTRR: Fixed MSR 0x269 0x0606060606060606

 1892 12:57:12.275869  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1893 12:57:12.282306  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1894 12:57:12.285725  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1895 12:57:12.288991  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1896 12:57:12.292344  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1897 12:57:12.298905  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1898 12:57:12.299544  

 1899 12:57:12.299979  MTRR check

 1900 12:57:12.302019  Fixed MTRRs   : Enabled

 1901 12:57:12.305345  Variable MTRRs: Enabled

 1902 12:57:12.305763  

 1903 12:57:12.306093  call enable_fixed_mtrr()

 1904 12:57:12.311754  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1905 12:57:12.315657  CPU physical address size: 39 bits

 1906 12:57:12.321583  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1907 12:57:12.325665  MTRR: Fixed MSR 0x250 0x0606060606060606

 1908 12:57:12.328249  MTRR: Fixed MSR 0x258 0x0606060606060606

 1909 12:57:12.331552  MTRR: Fixed MSR 0x259 0x0000000000000000

 1910 12:57:12.338090  MTRR: Fixed MSR 0x268 0x0606060606060606

 1911 12:57:12.341458  MTRR: Fixed MSR 0x269 0x0606060606060606

 1912 12:57:12.344631  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1913 12:57:12.348460  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1914 12:57:12.355057  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1915 12:57:12.358258  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1916 12:57:12.361015  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1917 12:57:12.364565  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1918 12:57:12.371277  MTRR: Fixed MSR 0x250 0x0606060606060606

 1919 12:57:12.371466  call enable_fixed_mtrr()

 1920 12:57:12.377817  MTRR: Fixed MSR 0x258 0x0606060606060606

 1921 12:57:12.381088  MTRR: Fixed MSR 0x259 0x0000000000000000

 1922 12:57:12.384461  MTRR: Fixed MSR 0x268 0x0606060606060606

 1923 12:57:12.387937  MTRR: Fixed MSR 0x269 0x0606060606060606

 1924 12:57:12.394665  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1925 12:57:12.398302  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1926 12:57:12.401611  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1927 12:57:12.404754  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1928 12:57:12.407967  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1929 12:57:12.415003  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1930 12:57:12.418025  CPU physical address size: 39 bits

 1931 12:57:12.421322  call enable_fixed_mtrr()

 1932 12:57:12.424001  MTRR: Fixed MSR 0x250 0x0606060606060606

 1933 12:57:12.427440  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 12:57:12.430751  MTRR: Fixed MSR 0x258 0x0606060606060606

 1935 12:57:12.437192  MTRR: Fixed MSR 0x259 0x0000000000000000

 1936 12:57:12.440535  MTRR: Fixed MSR 0x268 0x0606060606060606

 1937 12:57:12.443840  MTRR: Fixed MSR 0x269 0x0606060606060606

 1938 12:57:12.447689  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1939 12:57:12.453646  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1940 12:57:12.457538  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1941 12:57:12.461318  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1942 12:57:12.464150  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1943 12:57:12.470948  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1944 12:57:12.474295  MTRR: Fixed MSR 0x258 0x0606060606060606

 1945 12:57:12.477520  call enable_fixed_mtrr()

 1946 12:57:12.480788  MTRR: Fixed MSR 0x259 0x0000000000000000

 1947 12:57:12.484535  MTRR: Fixed MSR 0x268 0x0606060606060606

 1948 12:57:12.488040  MTRR: Fixed MSR 0x269 0x0606060606060606

 1949 12:57:12.494723  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1950 12:57:12.497499  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1951 12:57:12.501026  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1952 12:57:12.504129  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1953 12:57:12.510183  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1954 12:57:12.513618  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1955 12:57:12.516905  CPU physical address size: 39 bits

 1956 12:57:12.520316  call enable_fixed_mtrr()

 1957 12:57:12.523706  MTRR: Fixed MSR 0x250 0x0606060606060606

 1958 12:57:12.527052  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 12:57:12.533288  MTRR: Fixed MSR 0x258 0x0606060606060606

 1960 12:57:12.536494  MTRR: Fixed MSR 0x259 0x0000000000000000

 1961 12:57:12.540360  MTRR: Fixed MSR 0x268 0x0606060606060606

 1962 12:57:12.543164  MTRR: Fixed MSR 0x269 0x0606060606060606

 1963 12:57:12.549914  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1964 12:57:12.553131  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1965 12:57:12.556414  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1966 12:57:12.559759  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1967 12:57:12.563432  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1968 12:57:12.569814  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1969 12:57:12.573550  MTRR: Fixed MSR 0x258 0x0606060606060606

 1970 12:57:12.576121  call enable_fixed_mtrr()

 1971 12:57:12.579537  CPU physical address size: 39 bits

 1972 12:57:12.582830  MTRR: Fixed MSR 0x259 0x0000000000000000

 1973 12:57:12.586360  CPU physical address size: 39 bits

 1974 12:57:12.593139  MTRR: Fixed MSR 0x268 0x0606060606060606

 1975 12:57:12.596550  MTRR: Fixed MSR 0x269 0x0606060606060606

 1976 12:57:12.599384  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1977 12:57:12.602679  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1978 12:57:12.606266  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1979 12:57:12.613053  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1980 12:57:12.616404  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1981 12:57:12.619170  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1982 12:57:12.622509  CPU physical address size: 39 bits

 1983 12:57:12.625810  call enable_fixed_mtrr()

 1984 12:57:12.629266  CBFS @ c08000 size 3f8000

 1985 12:57:12.636074  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1986 12:57:12.639593  CPU physical address size: 39 bits

 1987 12:57:12.642328  CBFS: Locating 'fallback/payload'

 1988 12:57:12.645495  CBFS: Found @ offset 1c96c0 size 3f798

 1989 12:57:12.648834  Checking segment from ROM address 0xffdd16f8

 1990 12:57:12.655889  Checking segment from ROM address 0xffdd1714

 1991 12:57:12.658784  Loading segment from ROM address 0xffdd16f8

 1992 12:57:12.662158    code (compression=0)

 1993 12:57:12.668633    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1994 12:57:12.678805  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1995 12:57:12.681235  it's not compressed!

 1996 12:57:12.773226  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1997 12:57:12.779707  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1998 12:57:12.782970  Loading segment from ROM address 0xffdd1714

 1999 12:57:12.786813    Entry Point 0x30000000

 2000 12:57:12.789609  Loaded segments

 2001 12:57:12.795656  Finalizing chipset.

 2002 12:57:12.798873  Finalizing SMM.

 2003 12:57:12.802278  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2004 12:57:12.805589  mp_park_aps done after 0 msecs.

 2005 12:57:12.811717  Jumping to boot code at 30000000(99b62000)

 2006 12:57:12.818370  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2007 12:57:12.818778  

 2008 12:57:12.819138  

 2009 12:57:12.819451  

 2010 12:57:12.821822  Starting depthcharge on Helios...

 2011 12:57:12.822291  

 2012 12:57:12.823314  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2013 12:57:12.823817  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2014 12:57:12.824219  Setting prompt string to ['hatch:']
 2015 12:57:12.824602  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2016 12:57:12.831548  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2017 12:57:12.831974  

 2018 12:57:12.838119  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2019 12:57:12.838538  

 2020 12:57:12.845117  board_setup: Info: eMMC controller not present; skipping

 2021 12:57:12.845537  

 2022 12:57:12.847797  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2023 12:57:12.848219  

 2024 12:57:12.854673  board_setup: Info: SDHCI controller not present; skipping

 2025 12:57:12.855128  

 2026 12:57:12.861339  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2027 12:57:12.861758  

 2028 12:57:12.862089  Wipe memory regions:

 2029 12:57:12.862402  

 2030 12:57:12.864676  	[0x00000000001000, 0x000000000a0000)

 2031 12:57:12.865093  

 2032 12:57:12.870982  	[0x00000000100000, 0x00000030000000)

 2033 12:57:12.935188  

 2034 12:57:12.937589  	[0x00000030657430, 0x00000099a2c000)

 2035 12:57:13.084438  

 2036 12:57:13.087664  	[0x00000100000000, 0x0000045e800000)

 2037 12:57:14.544436  

 2038 12:57:14.544983  R8152: Initializing

 2039 12:57:14.545346  

 2040 12:57:14.547415  Version 9 (ocp_data = 6010)

 2041 12:57:14.551954  

 2042 12:57:14.552401  R8152: Done initializing

 2043 12:57:14.552828  

 2044 12:57:14.554592  Adding net device

 2045 12:57:15.037692  

 2046 12:57:15.038241  R8152: Initializing

 2047 12:57:15.038603  

 2048 12:57:15.040998  Version 6 (ocp_data = 5c30)

 2049 12:57:15.041441  

 2050 12:57:15.044095  R8152: Done initializing

 2051 12:57:15.044192  

 2052 12:57:15.047636  net_add_device: Attemp to include the same device

 2053 12:57:15.050946  

 2054 12:57:15.057696  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2055 12:57:15.057816  

 2056 12:57:15.057907  

 2057 12:57:15.057992  

 2058 12:57:15.058299  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2060 12:57:15.159186  hatch: tftpboot 192.168.201.1 9729820/tftp-deploy-7yzo1eu2/kernel/bzImage 9729820/tftp-deploy-7yzo1eu2/kernel/cmdline 9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz

 2061 12:57:15.159804  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2062 12:57:15.160285  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2063 12:57:15.164340  tftpboot 192.168.201.1 9729820/tftp-deploy-7yzo1eu2/kernel/bzImaoy-7yzo1eu2/kernel/cmdline 9729820/tftp-deploy-7yzo1eu2/ramdisk/ramdisk.cpio.gz

 2064 12:57:15.164810  

 2065 12:57:15.165165  Waiting for link

 2066 12:57:15.365891  

 2067 12:57:15.366526  done.

 2068 12:57:15.366921  

 2069 12:57:15.367371  MAC: 00:24:32:50:1a:59

 2070 12:57:15.367715  

 2071 12:57:15.369445  Sending DHCP discover... done.

 2072 12:57:15.370018  

 2073 12:57:15.371724  Waiting for reply... done.

 2074 12:57:15.372233  

 2075 12:57:15.375511  Sending DHCP request... done.

 2076 12:57:15.375968  

 2077 12:57:15.378745  Waiting for reply... done.

 2078 12:57:15.379246  

 2079 12:57:15.381407  My ip is 192.168.201.14

 2080 12:57:15.381866  

 2081 12:57:15.384852  The DHCP server ip is 192.168.201.1

 2082 12:57:15.385316  

 2083 12:57:15.388316  TFTP server IP predefined by user: 192.168.201.1

 2084 12:57:15.388788  

 2085 12:57:15.398588  Bootfile predefined by user: 9729820/tftp-deploy-7yzo1eu2/kernel/bzImage

 2086 12:57:15.399051  

 2087 12:57:15.401986  Sending tftp read request... done.

 2088 12:57:15.402433  

 2089 12:57:15.406502  Waiting for the transfer... 

 2090 12:57:15.407027  

 2091 12:57:16.058817  00000000 ################################################################

 2092 12:57:16.058972  

 2093 12:57:16.684035  00080000 ################################################################

 2094 12:57:16.684570  

 2095 12:57:17.264817  00100000 ################################################################

 2096 12:57:17.264973  

 2097 12:57:17.803884  00180000 ################################################################

 2098 12:57:17.804039  

 2099 12:57:18.386824  00200000 ################################################################

 2100 12:57:18.387001  

 2101 12:57:18.944400  00280000 ################################################################

 2102 12:57:18.944571  

 2103 12:57:19.552449  00300000 ################################################################

 2104 12:57:19.553004  

 2105 12:57:20.195110  00380000 ################################################################

 2106 12:57:20.195664  

 2107 12:57:20.832867  00400000 ################################################################

 2108 12:57:20.833036  

 2109 12:57:21.488007  00480000 ################################################################

 2110 12:57:21.488561  

 2111 12:57:22.148075  00500000 ################################################################

 2112 12:57:22.148621  

 2113 12:57:22.814747  00580000 ################################################################

 2114 12:57:22.815321  

 2115 12:57:23.416237  00600000 ################################################################

 2116 12:57:23.416405  

 2117 12:57:23.990852  00680000 ################################################################

 2118 12:57:23.991007  

 2119 12:57:24.612120  00700000 ################################################################

 2120 12:57:24.612291  

 2121 12:57:25.164551  00780000 ################################################################

 2122 12:57:25.164720  

 2123 12:57:25.711889  00800000 ################################################################

 2124 12:57:25.712438  

 2125 12:57:26.387020  00880000 ################################################################

 2126 12:57:26.387744  

 2127 12:57:27.061255  00900000 ################################################################

 2128 12:57:27.061820  

 2129 12:57:27.690106  00980000 ################################################################

 2130 12:57:27.690285  

 2131 12:57:28.292330  00a00000 ################################################################

 2132 12:57:28.292884  

 2133 12:57:28.876027  00a80000 ################################################################

 2134 12:57:28.876200  

 2135 12:57:29.240366  00b00000 ########################################### done.

 2136 12:57:29.240532  

 2137 12:57:29.243474  The bootfile was 11878592 bytes long.

 2138 12:57:29.243590  

 2139 12:57:29.246623  Sending tftp read request... done.

 2140 12:57:29.246715  

 2141 12:57:29.250480  Waiting for the transfer... 

 2142 12:57:29.250580  

 2143 12:57:29.801993  00000000 ################################################################

 2144 12:57:29.802192  

 2145 12:57:30.332449  00080000 ################################################################

 2146 12:57:30.332599  

 2147 12:57:30.868338  00100000 ################################################################

 2148 12:57:30.868494  

 2149 12:57:31.381460  00180000 ################################################################

 2150 12:57:31.381619  

 2151 12:57:31.899664  00200000 ################################################################

 2152 12:57:31.899834  

 2153 12:57:32.415902  00280000 ################################################################

 2154 12:57:32.416057  

 2155 12:57:32.930202  00300000 ################################################################

 2156 12:57:32.930367  

 2157 12:57:33.446203  00380000 ################################################################

 2158 12:57:33.446376  

 2159 12:57:33.964658  00400000 ################################################################

 2160 12:57:33.964823  

 2161 12:57:34.479787  00480000 ################################################################

 2162 12:57:34.479956  

 2163 12:57:34.994243  00500000 ################################################################

 2164 12:57:34.994426  

 2165 12:57:35.507560  00580000 ################################################################

 2166 12:57:35.507717  

 2167 12:57:36.022698  00600000 ################################################################

 2168 12:57:36.022854  

 2169 12:57:36.540398  00680000 ################################################################

 2170 12:57:36.540553  

 2171 12:57:36.800090  00700000 ################################ done.

 2172 12:57:36.800245  

 2173 12:57:36.803433  Sending tftp read request... done.

 2174 12:57:36.803533  

 2175 12:57:36.806136  Waiting for the transfer... 

 2176 12:57:36.806230  

 2177 12:57:36.806307  00000000 # done.

 2178 12:57:36.806391  

 2179 12:57:36.816297  Command line loaded dynamically from TFTP file: 9729820/tftp-deploy-7yzo1eu2/kernel/cmdline

 2180 12:57:36.816397  

 2181 12:57:36.842680  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729820/extract-nfsrootfs-wptcchhx,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2182 12:57:36.842788  

 2183 12:57:36.849166  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2184 12:57:36.853727  

 2185 12:57:36.857024  Shutting down all USB controllers.

 2186 12:57:36.857115  

 2187 12:57:36.857195  Removing current net device

 2188 12:57:36.860443  

 2189 12:57:36.860534  Finalizing coreboot

 2190 12:57:36.860613  

 2191 12:57:36.867224  Exiting depthcharge with code 4 at timestamp: 31421528

 2192 12:57:36.867320  

 2193 12:57:36.867397  

 2194 12:57:36.867469  Starting kernel ...

 2195 12:57:36.867542  

 2196 12:57:36.867961  end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
 2197 12:57:36.868083  start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
 2198 12:57:36.868172  Setting prompt string to ['Linux version [0-9]']
 2199 12:57:36.868255  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2200 12:57:36.868338  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2201 12:57:36.870351  

 2203 13:01:54.868380  end: 2.2.5 auto-login-action (duration 00:04:18) [common]
 2205 13:01:54.868628  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
 2207 13:01:54.868824  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2210 13:01:54.869122  end: 2 depthcharge-action (duration 00:05:00) [common]
 2212 13:01:54.869384  Cleaning after the job
 2213 13:01:54.869486  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/ramdisk
 2214 13:01:54.870143  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/kernel
 2215 13:01:54.871048  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/nfsrootfs
 2216 13:01:54.923611  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729820/tftp-deploy-7yzo1eu2/modules
 2217 13:01:54.924407  start: 4.1 power-off (timeout 00:00:30) [common]
 2218 13:01:54.924600  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2219 13:01:55.001191  >> Command sent successfully.

 2220 13:01:55.003619  Returned 0 in 0 seconds
 2221 13:01:55.104464  end: 4.1 power-off (duration 00:00:00) [common]
 2223 13:01:55.104872  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2224 13:01:55.105140  Listened to connection for namespace 'common' for up to 1s
 2226 13:01:55.105755  Listened to connection for namespace 'common' for up to 1s
 2227 13:01:56.107191  Finalising connection for namespace 'common'
 2228 13:01:56.107392  Disconnecting from shell: Finalise
 2229 13:01:56.107490  
 2230 13:01:56.208217  end: 4.2 read-feedback (duration 00:00:01) [common]
 2231 13:01:56.208387  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729820
 2232 13:01:56.377249  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729820
 2233 13:01:56.377454  JobError: Your job cannot terminate cleanly.