Boot log: asus-cx9400-volteer

    1 12:51:11.967033  lava-dispatcher, installed at version: 2023.01
    2 12:51:11.967225  start: 0 validate
    3 12:51:11.967350  Start time: 2023-03-22 12:51:11.967343+00:00 (UTC)
    4 12:51:11.967473  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:51:11.967602  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:51:12.262334  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:51:12.263018  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:51:16.267732  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:51:16.268445  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:51:16.567848  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:51:16.568523  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:51:17.573564  validate duration: 5.61
   14 12:51:17.573968  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:51:17.574111  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:51:17.574234  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:51:17.574329  Not decompressing ramdisk as can be used compressed.
   18 12:51:17.574425  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
   19 12:51:17.574510  saving as /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/ramdisk/initrd.cpio.gz
   20 12:51:17.574570  total size: 5672849 (5MB)
   21 12:51:17.575607  progress   0% (0MB)
   22 12:51:17.577286  progress   5% (0MB)
   23 12:51:17.578912  progress  10% (0MB)
   24 12:51:17.580367  progress  15% (0MB)
   25 12:51:17.582043  progress  20% (1MB)
   26 12:51:17.583646  progress  25% (1MB)
   27 12:51:17.584936  progress  30% (1MB)
   28 12:51:17.586456  progress  35% (1MB)
   29 12:51:17.587887  progress  40% (2MB)
   30 12:51:17.589233  progress  45% (2MB)
   31 12:51:17.590905  progress  50% (2MB)
   32 12:51:17.592517  progress  55% (3MB)
   33 12:51:17.594038  progress  60% (3MB)
   34 12:51:17.595760  progress  65% (3MB)
   35 12:51:17.597377  progress  70% (3MB)
   36 12:51:17.598906  progress  75% (4MB)
   37 12:51:17.600441  progress  80% (4MB)
   38 12:51:17.602032  progress  85% (4MB)
   39 12:51:17.603418  progress  90% (4MB)
   40 12:51:17.604941  progress  95% (5MB)
   41 12:51:17.606577  progress 100% (5MB)
   42 12:51:17.606689  5MB downloaded in 0.03s (168.47MB/s)
   43 12:51:17.606869  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:51:17.607128  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:51:17.607232  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:51:17.607318  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:51:17.607426  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
   49 12:51:17.607510  saving as /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/kernel/bzImage
   50 12:51:17.607589  total size: 11878592 (11MB)
   51 12:51:17.607651  No compression specified
   52 12:51:17.608519  progress   0% (0MB)
   53 12:51:17.611897  progress   5% (0MB)
   54 12:51:17.614969  progress  10% (1MB)
   55 12:51:17.618064  progress  15% (1MB)
   56 12:51:17.621231  progress  20% (2MB)
   57 12:51:17.624303  progress  25% (2MB)
   58 12:51:17.627445  progress  30% (3MB)
   59 12:51:17.630559  progress  35% (3MB)
   60 12:51:17.633845  progress  40% (4MB)
   61 12:51:17.636919  progress  45% (5MB)
   62 12:51:17.639990  progress  50% (5MB)
   63 12:51:17.643196  progress  55% (6MB)
   64 12:51:17.646359  progress  60% (6MB)
   65 12:51:17.649642  progress  65% (7MB)
   66 12:51:17.652661  progress  70% (7MB)
   67 12:51:17.655623  progress  75% (8MB)
   68 12:51:17.659099  progress  80% (9MB)
   69 12:51:17.662252  progress  85% (9MB)
   70 12:51:17.665377  progress  90% (10MB)
   71 12:51:17.668328  progress  95% (10MB)
   72 12:51:17.671221  progress 100% (11MB)
   73 12:51:17.671440  11MB downloaded in 0.06s (177.43MB/s)
   74 12:51:17.671596  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:51:17.671847  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:51:17.671937  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:51:17.672025  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:51:17.672135  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
   80 12:51:17.672206  saving as /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/nfsrootfs/full.rootfs.tar
   81 12:51:17.672274  total size: 125916488 (120MB)
   82 12:51:17.672338  Using unxz to decompress xz
   83 12:51:17.675633  progress   0% (0MB)
   84 12:51:18.171531  progress   5% (6MB)
   85 12:51:18.644603  progress  10% (12MB)
   86 12:51:19.123650  progress  15% (18MB)
   87 12:51:19.599101  progress  20% (24MB)
   88 12:51:19.944252  progress  25% (30MB)
   89 12:51:20.291033  progress  30% (36MB)
   90 12:51:20.551950  progress  35% (42MB)
   91 12:51:20.745800  progress  40% (48MB)
   92 12:51:21.107142  progress  45% (54MB)
   93 12:51:21.478492  progress  50% (60MB)
   94 12:51:21.830662  progress  55% (66MB)
   95 12:51:22.192789  progress  60% (72MB)
   96 12:51:22.531582  progress  65% (78MB)
   97 12:51:22.924654  progress  70% (84MB)
   98 12:51:23.362439  progress  75% (90MB)
   99 12:51:23.801387  progress  80% (96MB)
  100 12:51:23.901527  progress  85% (102MB)
  101 12:51:24.065153  progress  90% (108MB)
  102 12:51:24.410868  progress  95% (114MB)
  103 12:51:24.791828  progress 100% (120MB)
  104 12:51:24.797928  120MB downloaded in 7.13s (16.85MB/s)
  105 12:51:24.798247  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:51:24.798529  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:51:24.798627  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 12:51:24.798717  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 12:51:24.798838  downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
  111 12:51:24.798911  saving as /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/modules/modules.tar
  112 12:51:24.798977  total size: 1255052 (1MB)
  113 12:51:24.799041  Using unxz to decompress xz
  114 12:51:24.801966  progress   2% (0MB)
  115 12:51:24.802499  progress   7% (0MB)
  116 12:51:24.805786  progress  13% (0MB)
  117 12:51:24.809837  progress  18% (0MB)
  118 12:51:24.813772  progress  23% (0MB)
  119 12:51:24.817749  progress  28% (0MB)
  120 12:51:24.821843  progress  33% (0MB)
  121 12:51:24.825668  progress  39% (0MB)
  122 12:51:24.829709  progress  44% (0MB)
  123 12:51:24.833470  progress  49% (0MB)
  124 12:51:24.837406  progress  54% (0MB)
  125 12:51:24.841370  progress  60% (0MB)
  126 12:51:24.845172  progress  65% (0MB)
  127 12:51:24.848946  progress  70% (0MB)
  128 12:51:24.852785  progress  75% (0MB)
  129 12:51:24.856516  progress  80% (0MB)
  130 12:51:24.860649  progress  86% (1MB)
  131 12:51:24.864928  progress  91% (1MB)
  132 12:51:24.869005  progress  96% (1MB)
  133 12:51:24.878874  1MB downloaded in 0.08s (14.98MB/s)
  134 12:51:24.879197  end: 1.4.1 http-download (duration 00:00:00) [common]
  136 12:51:24.879539  end: 1.4 download-retry (duration 00:00:00) [common]
  137 12:51:24.879654  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  138 12:51:24.879767  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  139 12:51:26.609962  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729844/extract-nfsrootfs-34_o1smz
  140 12:51:26.610156  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  141 12:51:26.610273  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  142 12:51:26.610412  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov
  143 12:51:26.610519  makedir: /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin
  144 12:51:26.610612  makedir: /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/tests
  145 12:51:26.610698  makedir: /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/results
  146 12:51:26.610801  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-add-keys
  147 12:51:26.610934  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-add-sources
  148 12:51:26.611055  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-background-process-start
  149 12:51:26.611173  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-background-process-stop
  150 12:51:26.611312  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-common-functions
  151 12:51:26.611512  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-echo-ipv4
  152 12:51:26.611642  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-install-packages
  153 12:51:26.611756  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-installed-packages
  154 12:51:26.611917  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-os-build
  155 12:51:26.612083  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-probe-channel
  156 12:51:26.612270  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-probe-ip
  157 12:51:26.612491  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-target-ip
  158 12:51:26.612657  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-target-mac
  159 12:51:26.612776  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-target-storage
  160 12:51:26.612898  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-case
  161 12:51:26.613050  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-event
  162 12:51:26.613166  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-feedback
  163 12:51:26.613283  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-raise
  164 12:51:26.613398  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-reference
  165 12:51:26.613637  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-runner
  166 12:51:26.613796  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-set
  167 12:51:26.613930  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-test-shell
  168 12:51:26.614081  Updating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-install-packages (oe)
  169 12:51:26.614263  Updating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/bin/lava-installed-packages (oe)
  170 12:51:26.614379  Creating /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/environment
  171 12:51:26.614490  LAVA metadata
  172 12:51:26.614597  - LAVA_JOB_ID=9729844
  173 12:51:26.614666  - LAVA_DISPATCHER_IP=192.168.201.1
  174 12:51:26.614778  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  175 12:51:26.614849  skipped lava-vland-overlay
  176 12:51:26.614931  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  177 12:51:26.615018  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  178 12:51:26.615084  skipped lava-multinode-overlay
  179 12:51:26.615162  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  180 12:51:26.615260  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  181 12:51:26.615340  Loading test definitions
  182 12:51:26.615437  start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
  183 12:51:26.615531  Using /lava-9729844 at stage 0
  184 12:51:26.615657  Fetching tests from https://github.com/kernelci/test-definitions
  185 12:51:26.615783  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/0/tests/0_ltp-ipc'
  186 12:51:41.563016  Running '/usr/bin/git checkout kernelci.org
  187 12:51:41.697869  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  188 12:51:41.698633  uuid=9729844_1.5.2.3.1 testdef=None
  189 12:51:41.698801  end: 1.5.2.3.1 git-repo-action (duration 00:00:15) [common]
  191 12:51:41.699065  start: 1.5.2.3.2 test-overlay (timeout 00:09:36) [common]
  192 12:51:41.699905  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  194 12:51:41.700161  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:36) [common]
  195 12:51:41.701218  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  197 12:51:41.701500  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:36) [common]
  198 12:51:41.702526  runner path: /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/0/tests/0_ltp-ipc test_uuid 9729844_1.5.2.3.1
  199 12:51:41.702623  SKIPFILE='skipfile-lkft.yaml'
  200 12:51:41.702698  SKIP_INSTALL='true'
  201 12:51:41.702764  TST_CMDFILES='ipc'
  202 12:51:41.702902  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  204 12:51:41.703141  Creating lava-test-runner.conf files
  205 12:51:41.703212  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729844/lava-overlay-8h11ifov/lava-9729844/0 for stage 0
  206 12:51:41.703306  - 0_ltp-ipc
  207 12:51:41.703419  end: 1.5.2.3 test-definition (duration 00:00:15) [common]
  208 12:51:41.703515  start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
  209 12:51:49.301583  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  210 12:51:49.301762  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:28) [common]
  211 12:51:49.301866  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  212 12:51:49.301971  end: 1.5.2 lava-overlay (duration 00:00:23) [common]
  213 12:51:49.302096  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:28) [common]
  214 12:51:49.410228  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  215 12:51:49.410570  start: 1.5.4 extract-modules (timeout 00:09:28) [common]
  216 12:51:49.410692  extracting modules file /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729844/extract-nfsrootfs-34_o1smz
  217 12:51:49.438047  extracting modules file /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729844/extract-overlay-ramdisk-exsbthl3/ramdisk
  218 12:51:49.464950  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  219 12:51:49.465116  start: 1.5.5 apply-overlay-tftp (timeout 00:09:28) [common]
  220 12:51:49.465217  [common] Applying overlay to NFS
  221 12:51:49.465296  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729844/compress-overlay-b22v11gg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729844/extract-nfsrootfs-34_o1smz
  222 12:51:50.282286  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  223 12:51:50.282467  start: 1.5.6 configure-preseed-file (timeout 00:09:27) [common]
  224 12:51:50.282572  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  225 12:51:50.282668  start: 1.5.7 compress-ramdisk (timeout 00:09:27) [common]
  226 12:51:50.282758  Building ramdisk /var/lib/lava/dispatcher/tmp/9729844/extract-overlay-ramdisk-exsbthl3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729844/extract-overlay-ramdisk-exsbthl3/ramdisk
  227 12:51:50.337387  >> 40130 blocks

  228 12:51:51.049852  rename /var/lib/lava/dispatcher/tmp/9729844/extract-overlay-ramdisk-exsbthl3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz
  229 12:51:51.050263  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  230 12:51:51.050388  start: 1.5.8 prepare-kernel (timeout 00:09:27) [common]
  231 12:51:51.050495  start: 1.5.8.1 prepare-fit (timeout 00:09:27) [common]
  232 12:51:51.050601  No mkimage arch provided, not using FIT.
  233 12:51:51.050698  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  234 12:51:51.050791  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  235 12:51:51.050890  end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
  236 12:51:51.050986  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:27) [common]
  237 12:51:51.051073  No LXC device requested
  238 12:51:51.051161  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  239 12:51:51.051262  start: 1.7 deploy-device-env (timeout 00:09:27) [common]
  240 12:51:51.051376  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  241 12:51:51.051459  Checking files for TFTP limit of 4294967296 bytes.
  242 12:51:51.051859  end: 1 tftp-deploy (duration 00:00:33) [common]
  243 12:51:51.051970  start: 2 depthcharge-action (timeout 00:05:00) [common]
  244 12:51:51.052071  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  245 12:51:51.052214  substitutions:
  246 12:51:51.052290  - {DTB}: None
  247 12:51:51.052357  - {INITRD}: 9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz
  248 12:51:51.052420  - {KERNEL}: 9729844/tftp-deploy-me6xd6q9/kernel/bzImage
  249 12:51:51.052483  - {LAVA_MAC}: None
  250 12:51:51.052543  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729844/extract-nfsrootfs-34_o1smz
  251 12:51:51.052615  - {NFS_SERVER_IP}: 192.168.201.1
  252 12:51:51.052676  - {PRESEED_CONFIG}: None
  253 12:51:51.052738  - {PRESEED_LOCAL}: None
  254 12:51:51.052800  - {RAMDISK}: 9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz
  255 12:51:51.052859  - {ROOT_PART}: None
  256 12:51:51.052917  - {ROOT}: None
  257 12:51:51.052975  - {SERVER_IP}: 192.168.201.1
  258 12:51:51.053033  - {TEE}: None
  259 12:51:51.053094  Parsed boot commands:
  260 12:51:51.053158  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  261 12:51:51.053322  Parsed boot commands: tftpboot 192.168.201.1 9729844/tftp-deploy-me6xd6q9/kernel/bzImage 9729844/tftp-deploy-me6xd6q9/kernel/cmdline 9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz
  262 12:51:51.053420  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  263 12:51:51.053551  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  264 12:51:51.053660  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  265 12:51:51.053761  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  266 12:51:51.053839  Not connected, no need to disconnect.
  267 12:51:51.053920  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  268 12:51:51.054009  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  269 12:51:51.054080  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
  270 12:51:51.057045  Setting prompt string to ['lava-test: # ']
  271 12:51:51.057373  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  272 12:51:51.057527  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  273 12:51:51.057631  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  274 12:51:51.057730  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  275 12:51:51.057912  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
  276 12:51:56.189645  >> Command sent successfully.

  277 12:51:56.191711  Returned 0 in 5 seconds
  278 12:51:56.292467  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  280 12:51:56.292795  end: 2.2.2 reset-device (duration 00:00:05) [common]
  281 12:51:56.292909  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  282 12:51:56.293002  Setting prompt string to 'Starting depthcharge on Voema...'
  283 12:51:56.293073  Changing prompt to 'Starting depthcharge on Voema...'
  284 12:51:56.293143  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  285 12:51:56.293417  [Enter `^Ec?' for help]

  286 12:51:57.895343  

  287 12:51:57.895492  

  288 12:51:57.904890  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  289 12:51:57.911525  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  290 12:51:57.914550  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  291 12:51:57.917984  CPU: AES supported, TXT NOT supported, VT supported

  292 12:51:57.924912  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  293 12:51:57.931517  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  294 12:51:57.934519  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  295 12:51:57.937927  VBOOT: Loading verstage.

  296 12:51:57.941167  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  297 12:51:57.947900  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  298 12:51:57.951166  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  299 12:51:57.961952  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  300 12:51:57.968610  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  301 12:51:57.968721  

  302 12:51:57.968791  

  303 12:51:57.981741  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  304 12:51:57.995617  Probing TPM: . done!

  305 12:51:57.998649  TPM ready after 0 ms

  306 12:51:58.002229  Connected to device vid:did:rid of 1ae0:0028:00

  307 12:51:58.013349  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  308 12:51:58.020131  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  309 12:51:58.023611  Initialized TPM device CR50 revision 0

  310 12:51:58.075869  tlcl_send_startup: Startup return code is 0

  311 12:51:58.076020  TPM: setup succeeded

  312 12:51:58.091810  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  313 12:51:58.105939  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  314 12:51:58.118972  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  315 12:51:58.128341  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  316 12:51:58.131930  Chrome EC: UHEPI supported

  317 12:51:58.135600  Phase 1

  318 12:51:58.138907  FMAP: area GBB found @ 1805000 (458752 bytes)

  319 12:51:58.148489  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  320 12:51:58.155194  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  321 12:51:58.162355  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  322 12:51:58.168686  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  323 12:51:58.172493  Recovery requested (1009000e)

  324 12:51:58.175210  TPM: Extending digest for VBOOT: boot mode into PCR 0

  325 12:51:58.186975  tlcl_extend: response is 0

  326 12:51:58.193469  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  327 12:51:58.203095  tlcl_extend: response is 0

  328 12:51:58.209954  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  329 12:51:58.216349  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  330 12:51:58.223360  BS: verstage times (exec / console): total (unknown) / 142 ms

  331 12:51:58.223467  

  332 12:51:58.223545  

  333 12:51:58.236543  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  334 12:51:58.242858  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  335 12:51:58.245966  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  336 12:51:58.249402  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  337 12:51:58.256137  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  338 12:51:58.259778  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  339 12:51:58.263216  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  340 12:51:58.266222  TCO_STS:   0000 0000

  341 12:51:58.269369  GEN_PMCON: d0015038 00002200

  342 12:51:58.272659  GBLRST_CAUSE: 00000000 00000000

  343 12:51:58.272773  HPR_CAUSE0: 00000000

  344 12:51:58.276060  prev_sleep_state 5

  345 12:51:58.279650  Boot Count incremented to 17497

  346 12:51:58.286095  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  347 12:51:58.292646  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  348 12:51:58.299469  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  349 12:51:58.306212  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  350 12:51:58.310628  Chrome EC: UHEPI supported

  351 12:51:58.317314  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  352 12:51:58.331909  Probing TPM:  done!

  353 12:51:58.335419  Connected to device vid:did:rid of 1ae0:0028:00

  354 12:51:58.347111  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  355 12:51:58.350079  Initialized TPM device CR50 revision 0

  356 12:51:58.365131  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  357 12:51:58.372045  MRC: Hash idx 0x100b comparison successful.

  358 12:51:58.375539  MRC cache found, size faa8

  359 12:51:58.375652  bootmode is set to: 2

  360 12:51:58.378924  SPD index = 0

  361 12:51:58.385224  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  362 12:51:58.388865  SPD: module type is LPDDR4X

  363 12:51:58.391865  SPD: module part number is MT53E512M64D4NW-046

  364 12:51:58.399011  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  365 12:51:58.402152  SPD: device width 16 bits, bus width 16 bits

  366 12:51:58.408614  SPD: module size is 1024 MB (per channel)

  367 12:51:58.842640  CBMEM:

  368 12:51:58.846060  IMD: root @ 0x76fff000 254 entries.

  369 12:51:58.849408  IMD: root @ 0x76ffec00 62 entries.

  370 12:51:58.852782  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  371 12:51:58.859039  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  372 12:51:58.862781  External stage cache:

  373 12:51:58.865786  IMD: root @ 0x7b3ff000 254 entries.

  374 12:51:58.869155  IMD: root @ 0x7b3fec00 62 entries.

  375 12:51:58.884725  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  376 12:51:58.891225  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  377 12:51:58.897291  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  378 12:51:58.912365  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  379 12:51:58.916753  cse_lite: Skip switching to RW in the recovery path

  380 12:51:58.919543  8 DIMMs found

  381 12:51:58.919650  SMM Memory Map

  382 12:51:58.923211  SMRAM       : 0x7b000000 0x800000

  383 12:51:58.926214   Subregion 0: 0x7b000000 0x200000

  384 12:51:58.929799   Subregion 1: 0x7b200000 0x200000

  385 12:51:58.932864   Subregion 2: 0x7b400000 0x400000

  386 12:51:58.936175  top_of_ram = 0x77000000

  387 12:51:58.942727  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  388 12:51:58.946212  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  389 12:51:58.952863  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  390 12:51:58.956303  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  391 12:51:58.963157  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  392 12:51:58.969840  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  393 12:51:58.981322  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  394 12:51:58.987983  Processing 211 relocs. Offset value of 0x74c0b000

  395 12:51:58.994403  BS: romstage times (exec / console): total (unknown) / 277 ms

  396 12:51:59.000431  

  397 12:51:59.000569  

  398 12:51:59.010573  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  399 12:51:59.013676  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  400 12:51:59.023490  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  401 12:51:59.030448  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  402 12:51:59.037087  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  403 12:51:59.043767  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  404 12:51:59.090576  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  405 12:51:59.097253  Processing 5008 relocs. Offset value of 0x75d98000

  406 12:51:59.100298  BS: postcar times (exec / console): total (unknown) / 59 ms

  407 12:51:59.104898  

  408 12:51:59.104984  

  409 12:51:59.114710  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  410 12:51:59.114815  Normal boot

  411 12:51:59.117779  FW_CONFIG value is 0x804c02

  412 12:51:59.121143  PCI: 00:07.0 disabled by fw_config

  413 12:51:59.124656  PCI: 00:07.1 disabled by fw_config

  414 12:51:59.127756  PCI: 00:0d.2 disabled by fw_config

  415 12:51:59.134780  PCI: 00:1c.7 disabled by fw_config

  416 12:51:59.137749  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  417 12:51:59.144354  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  418 12:51:59.147770  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  419 12:51:59.154469  GENERIC: 0.0 disabled by fw_config

  420 12:51:59.158021  GENERIC: 1.0 disabled by fw_config

  421 12:51:59.161314  fw_config match found: DB_USB=USB3_ACTIVE

  422 12:51:59.164190  fw_config match found: DB_USB=USB3_ACTIVE

  423 12:51:59.167620  fw_config match found: DB_USB=USB3_ACTIVE

  424 12:51:59.174361  fw_config match found: DB_USB=USB3_ACTIVE

  425 12:51:59.177698  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  426 12:51:59.184452  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  427 12:51:59.194491  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  428 12:51:59.201061  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  429 12:51:59.204215  microcode: sig=0x806c1 pf=0x80 revision=0x86

  430 12:51:59.210742  microcode: Update skipped, already up-to-date

  431 12:51:59.217542  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  432 12:51:59.245359  Detected 4 core, 8 thread CPU.

  433 12:51:59.248355  Setting up SMI for CPU

  434 12:51:59.252041  IED base = 0x7b400000

  435 12:51:59.252191  IED size = 0x00400000

  436 12:51:59.254950  Will perform SMM setup.

  437 12:51:59.261949  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  438 12:51:59.268101  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  439 12:51:59.274867  Processing 16 relocs. Offset value of 0x00030000

  440 12:51:59.278294  Attempting to start 7 APs

  441 12:51:59.281841  Waiting for 10ms after sending INIT.

  442 12:51:59.297633  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  443 12:51:59.297758  done.

  444 12:51:59.300497  AP: slot 2 apic_id 3.

  445 12:51:59.303944  AP: slot 6 apic_id 2.

  446 12:51:59.304034  AP: slot 7 apic_id 4.

  447 12:51:59.307291  AP: slot 5 apic_id 6.

  448 12:51:59.310711  AP: slot 4 apic_id 7.

  449 12:51:59.313488  Waiting for 2nd SIPI to complete...done.

  450 12:51:59.317251  AP: slot 3 apic_id 5.

  451 12:51:59.324077  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  452 12:51:59.330326  Processing 13 relocs. Offset value of 0x00038000

  453 12:51:59.330421  Unable to locate Global NVS

  454 12:51:59.340407  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  455 12:51:59.344228  Installing permanent SMM handler to 0x7b000000

  456 12:51:59.353891  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  457 12:51:59.357331  Processing 794 relocs. Offset value of 0x7b010000

  458 12:51:59.367143  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  459 12:51:59.370298  Processing 13 relocs. Offset value of 0x7b008000

  460 12:51:59.377176  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  461 12:51:59.383904  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  462 12:51:59.387441  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  463 12:51:59.393420  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  464 12:51:59.400495  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  465 12:51:59.406969  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  466 12:51:59.410584  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  467 12:51:59.413977  Unable to locate Global NVS

  468 12:51:59.420372  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  469 12:51:59.425437  Clearing SMI status registers

  470 12:51:59.428313  SMI_STS: PM1 

  471 12:51:59.428403  PM1_STS: PWRBTN 

  472 12:51:59.438296  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  473 12:51:59.438390  In relocation handler: CPU 0

  474 12:51:59.445140  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  475 12:51:59.448152  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  476 12:51:59.451725  Relocation complete.

  477 12:51:59.458235  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  478 12:51:59.461724  In relocation handler: CPU 1

  479 12:51:59.465255  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  480 12:51:59.468228  Relocation complete.

  481 12:51:59.475303  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  482 12:51:59.478727  In relocation handler: CPU 5

  483 12:51:59.482063  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  484 12:51:59.488084  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  485 12:51:59.488178  Relocation complete.

  486 12:51:59.495096  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  487 12:51:59.498330  In relocation handler: CPU 4

  488 12:51:59.501679  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  489 12:51:59.504990  Relocation complete.

  490 12:51:59.511742  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  491 12:51:59.515234  In relocation handler: CPU 6

  492 12:51:59.518090  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  493 12:51:59.525065  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  494 12:51:59.528536  Relocation complete.

  495 12:51:59.534993  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  496 12:51:59.538435  In relocation handler: CPU 2

  497 12:51:59.541822  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  498 12:51:59.541911  Relocation complete.

  499 12:51:59.551830  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  500 12:51:59.554805  In relocation handler: CPU 3

  501 12:51:59.558448  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  502 12:51:59.558538  Relocation complete.

  503 12:51:59.568384  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  504 12:51:59.568476  In relocation handler: CPU 7

  505 12:51:59.575714  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  506 12:51:59.579316  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  507 12:51:59.582618  Relocation complete.

  508 12:51:59.582746  Initializing CPU #0

  509 12:51:59.586117  CPU: vendor Intel device 806c1

  510 12:51:59.589388  CPU: family 06, model 8c, stepping 01

  511 12:51:59.592685  Clearing out pending MCEs

  512 12:51:59.596415  Setting up local APIC...

  513 12:51:59.599504   apic_id: 0x00 done.

  514 12:51:59.599594  Turbo is available but hidden

  515 12:51:59.603181  Turbo is available and visible

  516 12:51:59.609626  microcode: Update skipped, already up-to-date

  517 12:51:59.609717  CPU #0 initialized

  518 12:51:59.613232  Initializing CPU #4

  519 12:51:59.615966  Initializing CPU #5

  520 12:51:59.619569  CPU: vendor Intel device 806c1

  521 12:51:59.622590  CPU: family 06, model 8c, stepping 01

  522 12:51:59.626280  CPU: vendor Intel device 806c1

  523 12:51:59.629710  CPU: family 06, model 8c, stepping 01

  524 12:51:59.632674  Clearing out pending MCEs

  525 12:51:59.632762  Initializing CPU #6

  526 12:51:59.635882  Initializing CPU #3

  527 12:51:59.639476  CPU: vendor Intel device 806c1

  528 12:51:59.643195  CPU: family 06, model 8c, stepping 01

  529 12:51:59.645832  Setting up local APIC...

  530 12:51:59.649335  Clearing out pending MCEs

  531 12:51:59.649431  Initializing CPU #2

  532 12:51:59.652815  Setting up local APIC...

  533 12:51:59.655725  Initializing CPU #1

  534 12:51:59.655816  CPU: vendor Intel device 806c1

  535 12:51:59.662528  CPU: family 06, model 8c, stepping 01

  536 12:51:59.662618  Initializing CPU #7

  537 12:51:59.665867  Clearing out pending MCEs

  538 12:51:59.669684  CPU: vendor Intel device 806c1

  539 12:51:59.672653  CPU: family 06, model 8c, stepping 01

  540 12:51:59.675743  Setting up local APIC...

  541 12:51:59.675822   apic_id: 0x07 done.

  542 12:51:59.679197  Clearing out pending MCEs

  543 12:51:59.685635  microcode: Update skipped, already up-to-date

  544 12:51:59.685718  Setting up local APIC...

  545 12:51:59.689395  CPU: vendor Intel device 806c1

  546 12:51:59.695615  CPU: family 06, model 8c, stepping 01

  547 12:51:59.695700   apic_id: 0x02 done.

  548 12:51:59.698992  Clearing out pending MCEs

  549 12:51:59.702953   apic_id: 0x05 done.

  550 12:51:59.703030  Clearing out pending MCEs

  551 12:51:59.705569  CPU #4 initialized

  552 12:51:59.708962   apic_id: 0x06 done.

  553 12:51:59.712408  microcode: Update skipped, already up-to-date

  554 12:51:59.715791  Setting up local APIC...

  555 12:51:59.715873  CPU #3 initialized

  556 12:51:59.719137   apic_id: 0x04 done.

  557 12:51:59.722258  Setting up local APIC...

  558 12:51:59.725637  CPU: vendor Intel device 806c1

  559 12:51:59.729320  CPU: family 06, model 8c, stepping 01

  560 12:51:59.732152  microcode: Update skipped, already up-to-date

  561 12:51:59.735601  Clearing out pending MCEs

  562 12:51:59.739080  microcode: Update skipped, already up-to-date

  563 12:51:59.742071   apic_id: 0x03 done.

  564 12:51:59.745417  microcode: Update skipped, already up-to-date

  565 12:51:59.752205  microcode: Update skipped, already up-to-date

  566 12:51:59.752311  CPU #6 initialized

  567 12:51:59.755590  CPU #2 initialized

  568 12:51:59.758901  CPU #7 initialized

  569 12:51:59.758986  CPU #5 initialized

  570 12:51:59.762451  Setting up local APIC...

  571 12:51:59.765771   apic_id: 0x01 done.

  572 12:51:59.769379  microcode: Update skipped, already up-to-date

  573 12:51:59.772262  CPU #1 initialized

  574 12:51:59.775771  bsp_do_flight_plan done after 457 msecs.

  575 12:51:59.779249  CPU: frequency set to 4000 MHz

  576 12:51:59.779337  Enabling SMIs.

  577 12:51:59.785668  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  578 12:51:59.802584  SATAXPCIE1 indicates PCIe NVMe is present

  579 12:51:59.805960  Probing TPM:  done!

  580 12:51:59.809110  Connected to device vid:did:rid of 1ae0:0028:00

  581 12:51:59.819771  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  582 12:51:59.823298  Initialized TPM device CR50 revision 0

  583 12:51:59.826469  Enabling S0i3.4

  584 12:51:59.833215  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  585 12:51:59.836309  Found a VBT of 8704 bytes after decompression

  586 12:51:59.843194  cse_lite: CSE RO boot. HybridStorageMode disabled

  587 12:51:59.849446  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  588 12:51:59.925003  FSPS returned 0

  589 12:51:59.927841  Executing Phase 1 of FspMultiPhaseSiInit

  590 12:51:59.937789  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  591 12:51:59.941283  port C0 DISC req: usage 1 usb3 1 usb2 5

  592 12:51:59.944960  Raw Buffer output 0 00000511

  593 12:51:59.947729  Raw Buffer output 1 00000000

  594 12:51:59.951673  pmc_send_ipc_cmd succeeded

  595 12:51:59.958671  port C1 DISC req: usage 1 usb3 2 usb2 3

  596 12:51:59.958766  Raw Buffer output 0 00000321

  597 12:51:59.961666  Raw Buffer output 1 00000000

  598 12:51:59.966266  pmc_send_ipc_cmd succeeded

  599 12:51:59.970900  Detected 4 core, 8 thread CPU.

  600 12:51:59.974508  Detected 4 core, 8 thread CPU.

  601 12:52:00.208642  Display FSP Version Info HOB

  602 12:52:00.211613  Reference Code - CPU = a.0.4c.31

  603 12:52:00.215206  uCode Version = 0.0.0.86

  604 12:52:00.218309  TXT ACM version = ff.ff.ff.ffff

  605 12:52:00.221710  Reference Code - ME = a.0.4c.31

  606 12:52:00.225259  MEBx version = 0.0.0.0

  607 12:52:00.228252  ME Firmware Version = Consumer SKU

  608 12:52:00.231547  Reference Code - PCH = a.0.4c.31

  609 12:52:00.235187  PCH-CRID Status = Disabled

  610 12:52:00.238689  PCH-CRID Original Value = ff.ff.ff.ffff

  611 12:52:00.241610  PCH-CRID New Value = ff.ff.ff.ffff

  612 12:52:00.245127  OPROM - RST - RAID = ff.ff.ff.ffff

  613 12:52:00.248506  PCH Hsio Version = 4.0.0.0

  614 12:52:00.252229  Reference Code - SA - System Agent = a.0.4c.31

  615 12:52:00.254873  Reference Code - MRC = 2.0.0.1

  616 12:52:00.258296  SA - PCIe Version = a.0.4c.31

  617 12:52:00.261688  SA-CRID Status = Disabled

  618 12:52:00.264903  SA-CRID Original Value = 0.0.0.1

  619 12:52:00.268236  SA-CRID New Value = 0.0.0.1

  620 12:52:00.271544  OPROM - VBIOS = ff.ff.ff.ffff

  621 12:52:00.275012  IO Manageability Engine FW Version = 11.1.4.0

  622 12:52:00.278439  PHY Build Version = 0.0.0.e0

  623 12:52:00.281568  Thunderbolt(TM) FW Version = 0.0.0.0

  624 12:52:00.288041  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  625 12:52:00.291616  ITSS IRQ Polarities Before:

  626 12:52:00.291692  IPC0: 0xffffffff

  627 12:52:00.295090  IPC1: 0xffffffff

  628 12:52:00.295165  IPC2: 0xffffffff

  629 12:52:00.298068  IPC3: 0xffffffff

  630 12:52:00.301561  ITSS IRQ Polarities After:

  631 12:52:00.301634  IPC0: 0xffffffff

  632 12:52:00.304832  IPC1: 0xffffffff

  633 12:52:00.304908  IPC2: 0xffffffff

  634 12:52:00.308376  IPC3: 0xffffffff

  635 12:52:00.311963  Found PCIe Root Port #9 at PCI: 00:1d.0.

  636 12:52:00.324933  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  637 12:52:00.334882  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  638 12:52:00.347958  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  639 12:52:00.354930  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  640 12:52:00.355037  Enumerating buses...

  641 12:52:00.361483  Show all devs... Before device enumeration.

  642 12:52:00.361585  Root Device: enabled 1

  643 12:52:00.365019  DOMAIN: 0000: enabled 1

  644 12:52:00.367881  CPU_CLUSTER: 0: enabled 1

  645 12:52:00.371430  PCI: 00:00.0: enabled 1

  646 12:52:00.371509  PCI: 00:02.0: enabled 1

  647 12:52:00.374994  PCI: 00:04.0: enabled 1

  648 12:52:00.378109  PCI: 00:05.0: enabled 1

  649 12:52:00.381405  PCI: 00:06.0: enabled 0

  650 12:52:00.381488  PCI: 00:07.0: enabled 0

  651 12:52:00.384855  PCI: 00:07.1: enabled 0

  652 12:52:00.388031  PCI: 00:07.2: enabled 0

  653 12:52:00.391385  PCI: 00:07.3: enabled 0

  654 12:52:00.391487  PCI: 00:08.0: enabled 1

  655 12:52:00.394914  PCI: 00:09.0: enabled 0

  656 12:52:00.398158  PCI: 00:0a.0: enabled 0

  657 12:52:00.401376  PCI: 00:0d.0: enabled 1

  658 12:52:00.401477  PCI: 00:0d.1: enabled 0

  659 12:52:00.404442  PCI: 00:0d.2: enabled 0

  660 12:52:00.407852  PCI: 00:0d.3: enabled 0

  661 12:52:00.407928  PCI: 00:0e.0: enabled 0

  662 12:52:00.411404  PCI: 00:10.2: enabled 1

  663 12:52:00.414869  PCI: 00:10.6: enabled 0

  664 12:52:00.417741  PCI: 00:10.7: enabled 0

  665 12:52:00.417815  PCI: 00:12.0: enabled 0

  666 12:52:00.421153  PCI: 00:12.6: enabled 0

  667 12:52:00.424696  PCI: 00:13.0: enabled 0

  668 12:52:00.428251  PCI: 00:14.0: enabled 1

  669 12:52:00.428328  PCI: 00:14.1: enabled 0

  670 12:52:00.431240  PCI: 00:14.2: enabled 1

  671 12:52:00.434776  PCI: 00:14.3: enabled 1

  672 12:52:00.437636  PCI: 00:15.0: enabled 1

  673 12:52:00.437710  PCI: 00:15.1: enabled 1

  674 12:52:00.441156  PCI: 00:15.2: enabled 1

  675 12:52:00.444713  PCI: 00:15.3: enabled 1

  676 12:52:00.447601  PCI: 00:16.0: enabled 1

  677 12:52:00.447695  PCI: 00:16.1: enabled 0

  678 12:52:00.451126  PCI: 00:16.2: enabled 0

  679 12:52:00.454561  PCI: 00:16.3: enabled 0

  680 12:52:00.454650  PCI: 00:16.4: enabled 0

  681 12:52:00.458000  PCI: 00:16.5: enabled 0

  682 12:52:00.460808  PCI: 00:17.0: enabled 1

  683 12:52:00.464357  PCI: 00:19.0: enabled 0

  684 12:52:00.464446  PCI: 00:19.1: enabled 1

  685 12:52:00.467555  PCI: 00:19.2: enabled 0

  686 12:52:00.470973  PCI: 00:1c.0: enabled 1

  687 12:52:00.474249  PCI: 00:1c.1: enabled 0

  688 12:52:00.474338  PCI: 00:1c.2: enabled 0

  689 12:52:00.477751  PCI: 00:1c.3: enabled 0

  690 12:52:00.481309  PCI: 00:1c.4: enabled 0

  691 12:52:00.484399  PCI: 00:1c.5: enabled 0

  692 12:52:00.484487  PCI: 00:1c.6: enabled 1

  693 12:52:00.488106  PCI: 00:1c.7: enabled 0

  694 12:52:00.491331  PCI: 00:1d.0: enabled 1

  695 12:52:00.491419  PCI: 00:1d.1: enabled 0

  696 12:52:00.494380  PCI: 00:1d.2: enabled 1

  697 12:52:00.497815  PCI: 00:1d.3: enabled 0

  698 12:52:00.500950  PCI: 00:1e.0: enabled 1

  699 12:52:00.501037  PCI: 00:1e.1: enabled 0

  700 12:52:00.504314  PCI: 00:1e.2: enabled 1

  701 12:52:00.507879  PCI: 00:1e.3: enabled 1

  702 12:52:00.510924  PCI: 00:1f.0: enabled 1

  703 12:52:00.511011  PCI: 00:1f.1: enabled 0

  704 12:52:00.514252  PCI: 00:1f.2: enabled 1

  705 12:52:00.517913  PCI: 00:1f.3: enabled 1

  706 12:52:00.520791  PCI: 00:1f.4: enabled 0

  707 12:52:00.520878  PCI: 00:1f.5: enabled 1

  708 12:52:00.524224  PCI: 00:1f.6: enabled 0

  709 12:52:00.527540  PCI: 00:1f.7: enabled 0

  710 12:52:00.527627  APIC: 00: enabled 1

  711 12:52:00.530892  GENERIC: 0.0: enabled 1

  712 12:52:00.534316  GENERIC: 0.0: enabled 1

  713 12:52:00.537272  GENERIC: 1.0: enabled 1

  714 12:52:00.537359  GENERIC: 0.0: enabled 1

  715 12:52:00.540763  GENERIC: 1.0: enabled 1

  716 12:52:00.544130  USB0 port 0: enabled 1

  717 12:52:00.547515  GENERIC: 0.0: enabled 1

  718 12:52:00.547603  USB0 port 0: enabled 1

  719 12:52:00.550945  GENERIC: 0.0: enabled 1

  720 12:52:00.553965  I2C: 00:1a: enabled 1

  721 12:52:00.554058  I2C: 00:31: enabled 1

  722 12:52:00.557322  I2C: 00:32: enabled 1

  723 12:52:00.561080  I2C: 00:10: enabled 1

  724 12:52:00.561161  I2C: 00:15: enabled 1

  725 12:52:00.563976  GENERIC: 0.0: enabled 0

  726 12:52:00.567531  GENERIC: 1.0: enabled 0

  727 12:52:00.570702  GENERIC: 0.0: enabled 1

  728 12:52:00.570792  SPI: 00: enabled 1

  729 12:52:00.574125  SPI: 00: enabled 1

  730 12:52:00.574221  PNP: 0c09.0: enabled 1

  731 12:52:00.577775  GENERIC: 0.0: enabled 1

  732 12:52:00.580903  USB3 port 0: enabled 1

  733 12:52:00.584000  USB3 port 1: enabled 1

  734 12:52:00.584092  USB3 port 2: enabled 0

  735 12:52:00.587391  USB3 port 3: enabled 0

  736 12:52:00.590731  USB2 port 0: enabled 0

  737 12:52:00.590821  USB2 port 1: enabled 1

  738 12:52:00.594141  USB2 port 2: enabled 1

  739 12:52:00.597405  USB2 port 3: enabled 0

  740 12:52:00.600825  USB2 port 4: enabled 1

  741 12:52:00.600951  USB2 port 5: enabled 0

  742 12:52:00.603697  USB2 port 6: enabled 0

  743 12:52:00.607150  USB2 port 7: enabled 0

  744 12:52:00.607243  USB2 port 8: enabled 0

  745 12:52:00.610866  USB2 port 9: enabled 0

  746 12:52:00.613664  USB3 port 0: enabled 0

  747 12:52:00.613753  USB3 port 1: enabled 1

  748 12:52:00.617197  USB3 port 2: enabled 0

  749 12:52:00.620747  USB3 port 3: enabled 0

  750 12:52:00.623770  GENERIC: 0.0: enabled 1

  751 12:52:00.623864  GENERIC: 1.0: enabled 1

  752 12:52:00.627280  APIC: 01: enabled 1

  753 12:52:00.630347  APIC: 03: enabled 1

  754 12:52:00.630436  APIC: 05: enabled 1

  755 12:52:00.633784  APIC: 07: enabled 1

  756 12:52:00.633877  APIC: 06: enabled 1

  757 12:52:00.637433  APIC: 02: enabled 1

  758 12:52:00.640213  APIC: 04: enabled 1

  759 12:52:00.640307  Compare with tree...

  760 12:52:00.643811  Root Device: enabled 1

  761 12:52:00.646959   DOMAIN: 0000: enabled 1

  762 12:52:00.651055    PCI: 00:00.0: enabled 1

  763 12:52:00.651150    PCI: 00:02.0: enabled 1

  764 12:52:00.653956    PCI: 00:04.0: enabled 1

  765 12:52:00.657322     GENERIC: 0.0: enabled 1

  766 12:52:00.660538    PCI: 00:05.0: enabled 1

  767 12:52:00.663773    PCI: 00:06.0: enabled 0

  768 12:52:00.663862    PCI: 00:07.0: enabled 0

  769 12:52:00.667512     GENERIC: 0.0: enabled 1

  770 12:52:00.670488    PCI: 00:07.1: enabled 0

  771 12:52:00.674009     GENERIC: 1.0: enabled 1

  772 12:52:00.677478    PCI: 00:07.2: enabled 0

  773 12:52:00.677568     GENERIC: 0.0: enabled 1

  774 12:52:00.680810    PCI: 00:07.3: enabled 0

  775 12:52:00.683650     GENERIC: 1.0: enabled 1

  776 12:52:00.687509    PCI: 00:08.0: enabled 1

  777 12:52:00.690798    PCI: 00:09.0: enabled 0

  778 12:52:00.690904    PCI: 00:0a.0: enabled 0

  779 12:52:00.694221    PCI: 00:0d.0: enabled 1

  780 12:52:00.697012     USB0 port 0: enabled 1

  781 12:52:00.700453      USB3 port 0: enabled 1

  782 12:52:00.703710      USB3 port 1: enabled 1

  783 12:52:00.703826      USB3 port 2: enabled 0

  784 12:52:00.707659      USB3 port 3: enabled 0

  785 12:52:00.710588    PCI: 00:0d.1: enabled 0

  786 12:52:00.713970    PCI: 00:0d.2: enabled 0

  787 12:52:00.717668     GENERIC: 0.0: enabled 1

  788 12:52:00.717757    PCI: 00:0d.3: enabled 0

  789 12:52:00.720488    PCI: 00:0e.0: enabled 0

  790 12:52:00.723966    PCI: 00:10.2: enabled 1

  791 12:52:00.727555    PCI: 00:10.6: enabled 0

  792 12:52:00.730505    PCI: 00:10.7: enabled 0

  793 12:52:00.730594    PCI: 00:12.0: enabled 0

  794 12:52:00.733647    PCI: 00:12.6: enabled 0

  795 12:52:00.737334    PCI: 00:13.0: enabled 0

  796 12:52:00.740639    PCI: 00:14.0: enabled 1

  797 12:52:00.743683     USB0 port 0: enabled 1

  798 12:52:00.743775      USB2 port 0: enabled 0

  799 12:52:00.747142      USB2 port 1: enabled 1

  800 12:52:00.750816      USB2 port 2: enabled 1

  801 12:52:00.753966      USB2 port 3: enabled 0

  802 12:52:00.757170      USB2 port 4: enabled 1

  803 12:52:00.757261      USB2 port 5: enabled 0

  804 12:52:00.760467      USB2 port 6: enabled 0

  805 12:52:00.763939      USB2 port 7: enabled 0

  806 12:52:00.767040      USB2 port 8: enabled 0

  807 12:52:00.770540      USB2 port 9: enabled 0

  808 12:52:00.774032      USB3 port 0: enabled 0

  809 12:52:00.774111      USB3 port 1: enabled 1

  810 12:52:00.777034      USB3 port 2: enabled 0

  811 12:52:00.780374      USB3 port 3: enabled 0

  812 12:52:00.783800    PCI: 00:14.1: enabled 0

  813 12:52:00.787232    PCI: 00:14.2: enabled 1

  814 12:52:00.787316    PCI: 00:14.3: enabled 1

  815 12:52:00.790825     GENERIC: 0.0: enabled 1

  816 12:52:00.793775    PCI: 00:15.0: enabled 1

  817 12:52:00.796988     I2C: 00:1a: enabled 1

  818 12:52:00.800261     I2C: 00:31: enabled 1

  819 12:52:00.800343     I2C: 00:32: enabled 1

  820 12:52:00.803569    PCI: 00:15.1: enabled 1

  821 12:52:00.807110     I2C: 00:10: enabled 1

  822 12:52:00.810269    PCI: 00:15.2: enabled 1

  823 12:52:00.810359    PCI: 00:15.3: enabled 1

  824 12:52:00.813843    PCI: 00:16.0: enabled 1

  825 12:52:00.817804    PCI: 00:16.1: enabled 0

  826 12:52:00.821295    PCI: 00:16.2: enabled 0

  827 12:52:00.821384    PCI: 00:16.3: enabled 0

  828 12:52:00.824269    PCI: 00:16.4: enabled 0

  829 12:52:00.827768    PCI: 00:16.5: enabled 0

  830 12:52:00.831220    PCI: 00:17.0: enabled 1

  831 12:52:00.834668    PCI: 00:19.0: enabled 0

  832 12:52:00.834758    PCI: 00:19.1: enabled 1

  833 12:52:00.837689     I2C: 00:15: enabled 1

  834 12:52:00.841220    PCI: 00:19.2: enabled 0

  835 12:52:00.844154    PCI: 00:1d.0: enabled 1

  836 12:52:00.848132     GENERIC: 0.0: enabled 1

  837 12:52:00.848234    PCI: 00:1e.0: enabled 1

  838 12:52:00.851051    PCI: 00:1e.1: enabled 0

  839 12:52:00.854418    PCI: 00:1e.2: enabled 1

  840 12:52:00.857301     SPI: 00: enabled 1

  841 12:52:00.857391    PCI: 00:1e.3: enabled 1

  842 12:52:00.860922     SPI: 00: enabled 1

  843 12:52:00.864241    PCI: 00:1f.0: enabled 1

  844 12:52:00.867291     PNP: 0c09.0: enabled 1

  845 12:52:00.870893    PCI: 00:1f.1: enabled 0

  846 12:52:00.870982    PCI: 00:1f.2: enabled 1

  847 12:52:00.922191     GENERIC: 0.0: enabled 1

  848 12:52:00.922339      GENERIC: 0.0: enabled 1

  849 12:52:00.922824      GENERIC: 1.0: enabled 1

  850 12:52:00.922913    PCI: 00:1f.3: enabled 1

  851 12:52:00.923170    PCI: 00:1f.4: enabled 0

  852 12:52:00.923242    PCI: 00:1f.5: enabled 1

  853 12:52:00.923325    PCI: 00:1f.6: enabled 0

  854 12:52:00.923398    PCI: 00:1f.7: enabled 0

  855 12:52:00.923473   CPU_CLUSTER: 0: enabled 1

  856 12:52:00.923727    APIC: 00: enabled 1

  857 12:52:00.923802    APIC: 01: enabled 1

  858 12:52:00.923872    APIC: 03: enabled 1

  859 12:52:00.923932    APIC: 05: enabled 1

  860 12:52:00.923992    APIC: 07: enabled 1

  861 12:52:00.924049    APIC: 06: enabled 1

  862 12:52:00.924107    APIC: 02: enabled 1

  863 12:52:00.924164    APIC: 04: enabled 1

  864 12:52:00.924221  Root Device scanning...

  865 12:52:00.924278  scan_static_bus for Root Device

  866 12:52:00.924349  DOMAIN: 0000 enabled

  867 12:52:00.967505  CPU_CLUSTER: 0 enabled

  868 12:52:00.967671  DOMAIN: 0000 scanning...

  869 12:52:00.968089  PCI: pci_scan_bus for bus 00

  870 12:52:00.968193  PCI: 00:00.0 [8086/0000] ops

  871 12:52:00.968463  PCI: 00:00.0 [8086/9a12] enabled

  872 12:52:00.968581  PCI: 00:02.0 [8086/0000] bus ops

  873 12:52:00.968667  PCI: 00:02.0 [8086/9a40] enabled

  874 12:52:00.968730  PCI: 00:04.0 [8086/0000] bus ops

  875 12:52:00.968975  PCI: 00:04.0 [8086/9a03] enabled

  876 12:52:00.969042  PCI: 00:05.0 [8086/9a19] enabled

  877 12:52:00.969301  PCI: 00:07.0 [0000/0000] hidden

  878 12:52:00.969370  PCI: 00:08.0 [8086/9a11] enabled

  879 12:52:00.969615  PCI: 00:0a.0 [8086/9a0d] disabled

  880 12:52:00.969687  PCI: 00:0d.0 [8086/0000] bus ops

  881 12:52:00.972445  PCI: 00:0d.0 [8086/9a13] enabled

  882 12:52:00.975296  PCI: 00:14.0 [8086/0000] bus ops

  883 12:52:00.978933  PCI: 00:14.0 [8086/a0ed] enabled

  884 12:52:00.982393  PCI: 00:14.2 [8086/a0ef] enabled

  885 12:52:00.985268  PCI: 00:14.3 [8086/0000] bus ops

  886 12:52:00.989027  PCI: 00:14.3 [8086/a0f0] enabled

  887 12:52:00.992043  PCI: 00:15.0 [8086/0000] bus ops

  888 12:52:00.995347  PCI: 00:15.0 [8086/a0e8] enabled

  889 12:52:00.998845  PCI: 00:15.1 [8086/0000] bus ops

  890 12:52:01.002061  PCI: 00:15.1 [8086/a0e9] enabled

  891 12:52:01.005478  PCI: 00:15.2 [8086/0000] bus ops

  892 12:52:01.008527  PCI: 00:15.2 [8086/a0ea] enabled

  893 12:52:01.011858  PCI: 00:15.3 [8086/0000] bus ops

  894 12:52:01.015043  PCI: 00:15.3 [8086/a0eb] enabled

  895 12:52:01.018810  PCI: 00:16.0 [8086/0000] ops

  896 12:52:01.022070  PCI: 00:16.0 [8086/a0e0] enabled

  897 12:52:01.025420  PCI: Static device PCI: 00:17.0 not found, disabling it.

  898 12:52:01.028860  PCI: 00:19.0 [8086/0000] bus ops

  899 12:52:01.031747  PCI: 00:19.0 [8086/a0c5] disabled

  900 12:52:01.035144  PCI: 00:19.1 [8086/0000] bus ops

  901 12:52:01.038740  PCI: 00:19.1 [8086/a0c6] enabled

  902 12:52:01.041737  PCI: 00:1d.0 [8086/0000] bus ops

  903 12:52:01.045359  PCI: 00:1d.0 [8086/a0b0] enabled

  904 12:52:01.048740  PCI: 00:1e.0 [8086/0000] ops

  905 12:52:01.051691  PCI: 00:1e.0 [8086/a0a8] enabled

  906 12:52:01.055100  PCI: 00:1e.2 [8086/0000] bus ops

  907 12:52:01.058580  PCI: 00:1e.2 [8086/a0aa] enabled

  908 12:52:01.062111  PCI: 00:1e.3 [8086/0000] bus ops

  909 12:52:01.065169  PCI: 00:1e.3 [8086/a0ab] enabled

  910 12:52:01.068523  PCI: 00:1f.0 [8086/0000] bus ops

  911 12:52:01.071879  PCI: 00:1f.0 [8086/a087] enabled

  912 12:52:01.075476  RTC Init

  913 12:52:01.078401  Set power on after power failure.

  914 12:52:01.078507  Disabling Deep S3

  915 12:52:01.082114  Disabling Deep S3

  916 12:52:01.082261  Disabling Deep S4

  917 12:52:01.085256  Disabling Deep S4

  918 12:52:01.088648  Disabling Deep S5

  919 12:52:01.088797  Disabling Deep S5

  920 12:52:01.092320  PCI: 00:1f.2 [0000/0000] hidden

  921 12:52:01.095215  PCI: 00:1f.3 [8086/0000] bus ops

  922 12:52:01.098643  PCI: 00:1f.3 [8086/a0c8] enabled

  923 12:52:01.102404  PCI: 00:1f.5 [8086/0000] bus ops

  924 12:52:01.105209  PCI: 00:1f.5 [8086/a0a4] enabled

  925 12:52:01.108740  PCI: Leftover static devices:

  926 12:52:01.108893  PCI: 00:10.2

  927 12:52:01.112544  PCI: 00:10.6

  928 12:52:01.112648  PCI: 00:10.7

  929 12:52:01.115243  PCI: 00:06.0

  930 12:52:01.115352  PCI: 00:07.1

  931 12:52:01.115434  PCI: 00:07.2

  932 12:52:01.118638  PCI: 00:07.3

  933 12:52:01.118731  PCI: 00:09.0

  934 12:52:01.121872  PCI: 00:0d.1

  935 12:52:01.121972  PCI: 00:0d.2

  936 12:52:01.125542  PCI: 00:0d.3

  937 12:52:01.125642  PCI: 00:0e.0

  938 12:52:01.125723  PCI: 00:12.0

  939 12:52:01.128887  PCI: 00:12.6

  940 12:52:01.128995  PCI: 00:13.0

  941 12:52:01.132240  PCI: 00:14.1

  942 12:52:01.132332  PCI: 00:16.1

  943 12:52:01.132408  PCI: 00:16.2

  944 12:52:01.135358  PCI: 00:16.3

  945 12:52:01.135455  PCI: 00:16.4

  946 12:52:01.138767  PCI: 00:16.5

  947 12:52:01.138898  PCI: 00:17.0

  948 12:52:01.138981  PCI: 00:19.2

  949 12:52:01.142308  PCI: 00:1e.1

  950 12:52:01.142404  PCI: 00:1f.1

  951 12:52:01.145196  PCI: 00:1f.4

  952 12:52:01.145282  PCI: 00:1f.6

  953 12:52:01.148707  PCI: 00:1f.7

  954 12:52:01.148817  PCI: Check your devicetree.cb.

  955 12:52:01.152049  PCI: 00:02.0 scanning...

  956 12:52:01.155410  scan_generic_bus for PCI: 00:02.0

  957 12:52:01.161737  scan_generic_bus for PCI: 00:02.0 done

  958 12:52:01.165386  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  959 12:52:01.168271  PCI: 00:04.0 scanning...

  960 12:52:01.171742  scan_generic_bus for PCI: 00:04.0

  961 12:52:01.171869  GENERIC: 0.0 enabled

  962 12:52:01.178695  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  963 12:52:01.185156  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  964 12:52:01.188775  PCI: 00:0d.0 scanning...

  965 12:52:01.191702  scan_static_bus for PCI: 00:0d.0

  966 12:52:01.191820  USB0 port 0 enabled

  967 12:52:01.195304  USB0 port 0 scanning...

  968 12:52:01.198186  scan_static_bus for USB0 port 0

  969 12:52:01.201788  USB3 port 0 enabled

  970 12:52:01.201917  USB3 port 1 enabled

  971 12:52:01.205267  USB3 port 2 disabled

  972 12:52:01.208219  USB3 port 3 disabled

  973 12:52:01.208331  USB3 port 0 scanning...

  974 12:52:01.211782  scan_static_bus for USB3 port 0

  975 12:52:01.214932  scan_static_bus for USB3 port 0 done

  976 12:52:01.222024  scan_bus: bus USB3 port 0 finished in 6 msecs

  977 12:52:01.224756  USB3 port 1 scanning...

  978 12:52:01.228140  scan_static_bus for USB3 port 1

  979 12:52:01.231665  scan_static_bus for USB3 port 1 done

  980 12:52:01.234962  scan_bus: bus USB3 port 1 finished in 6 msecs

  981 12:52:01.238421  scan_static_bus for USB0 port 0 done

  982 12:52:01.244908  scan_bus: bus USB0 port 0 finished in 43 msecs

  983 12:52:01.248102  scan_static_bus for PCI: 00:0d.0 done

  984 12:52:01.251560  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  985 12:52:01.255108  PCI: 00:14.0 scanning...

  986 12:52:01.258246  scan_static_bus for PCI: 00:14.0

  987 12:52:01.261651  USB0 port 0 enabled

  988 12:52:01.261766  USB0 port 0 scanning...

  989 12:52:01.265183  scan_static_bus for USB0 port 0

  990 12:52:01.268107  USB2 port 0 disabled

  991 12:52:01.271558  USB2 port 1 enabled

  992 12:52:01.271671  USB2 port 2 enabled

  993 12:52:01.274657  USB2 port 3 disabled

  994 12:52:01.278103  USB2 port 4 enabled

  995 12:52:01.278205  USB2 port 5 disabled

  996 12:52:01.281768  USB2 port 6 disabled

  997 12:52:01.281871  USB2 port 7 disabled

  998 12:52:01.285104  USB2 port 8 disabled

  999 12:52:01.287984  USB2 port 9 disabled

 1000 12:52:01.288075  USB3 port 0 disabled

 1001 12:52:01.291590  USB3 port 1 enabled

 1002 12:52:01.295166  USB3 port 2 disabled

 1003 12:52:01.295265  USB3 port 3 disabled

 1004 12:52:01.297998  USB2 port 1 scanning...

 1005 12:52:01.301634  scan_static_bus for USB2 port 1

 1006 12:52:01.305040  scan_static_bus for USB2 port 1 done

 1007 12:52:01.311734  scan_bus: bus USB2 port 1 finished in 6 msecs

 1008 12:52:01.311878  USB2 port 2 scanning...

 1009 12:52:01.314601  scan_static_bus for USB2 port 2

 1010 12:52:01.321139  scan_static_bus for USB2 port 2 done

 1011 12:52:01.324680  scan_bus: bus USB2 port 2 finished in 6 msecs

 1012 12:52:01.328269  USB2 port 4 scanning...

 1013 12:52:01.331197  scan_static_bus for USB2 port 4

 1014 12:52:01.334327  scan_static_bus for USB2 port 4 done

 1015 12:52:01.337810  scan_bus: bus USB2 port 4 finished in 6 msecs

 1016 12:52:01.341255  USB3 port 1 scanning...

 1017 12:52:01.344463  scan_static_bus for USB3 port 1

 1018 12:52:01.347826  scan_static_bus for USB3 port 1 done

 1019 12:52:01.351273  scan_bus: bus USB3 port 1 finished in 6 msecs

 1020 12:52:01.357731  scan_static_bus for USB0 port 0 done

 1021 12:52:01.361241  scan_bus: bus USB0 port 0 finished in 93 msecs

 1022 12:52:01.364327  scan_static_bus for PCI: 00:14.0 done

 1023 12:52:01.371318  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

 1024 12:52:01.371463  PCI: 00:14.3 scanning...

 1025 12:52:01.374347  scan_static_bus for PCI: 00:14.3

 1026 12:52:01.377726  GENERIC: 0.0 enabled

 1027 12:52:01.381188  scan_static_bus for PCI: 00:14.3 done

 1028 12:52:01.387419  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1029 12:52:01.387553  PCI: 00:15.0 scanning...

 1030 12:52:01.391241  scan_static_bus for PCI: 00:15.0

 1031 12:52:01.394753  I2C: 00:1a enabled

 1032 12:52:01.398466  I2C: 00:31 enabled

 1033 12:52:01.398585  I2C: 00:32 enabled

 1034 12:52:01.401985  scan_static_bus for PCI: 00:15.0 done

 1035 12:52:01.408497  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1036 12:52:01.408628  PCI: 00:15.1 scanning...

 1037 12:52:01.411673  scan_static_bus for PCI: 00:15.1

 1038 12:52:01.415471  I2C: 00:10 enabled

 1039 12:52:01.418516  scan_static_bus for PCI: 00:15.1 done

 1040 12:52:01.425119  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1041 12:52:01.425243  PCI: 00:15.2 scanning...

 1042 12:52:01.428429  scan_static_bus for PCI: 00:15.2

 1043 12:52:01.435348  scan_static_bus for PCI: 00:15.2 done

 1044 12:52:01.438849  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1045 12:52:01.441725  PCI: 00:15.3 scanning...

 1046 12:52:01.445395  scan_static_bus for PCI: 00:15.3

 1047 12:52:01.448656  scan_static_bus for PCI: 00:15.3 done

 1048 12:52:01.452089  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1049 12:52:01.455544  PCI: 00:19.1 scanning...

 1050 12:52:01.458748  scan_static_bus for PCI: 00:19.1

 1051 12:52:01.461608  I2C: 00:15 enabled

 1052 12:52:01.465377  scan_static_bus for PCI: 00:19.1 done

 1053 12:52:01.468445  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1054 12:52:01.471996  PCI: 00:1d.0 scanning...

 1055 12:52:01.475390  do_pci_scan_bridge for PCI: 00:1d.0

 1056 12:52:01.478357  PCI: pci_scan_bus for bus 01

 1057 12:52:01.481879  PCI: 01:00.0 [1c5c/174a] enabled

 1058 12:52:01.485296  GENERIC: 0.0 enabled

 1059 12:52:01.488745  Enabling Common Clock Configuration

 1060 12:52:01.492311  L1 Sub-State supported from root port 29

 1061 12:52:01.495187  L1 Sub-State Support = 0xf

 1062 12:52:01.498695  CommonModeRestoreTime = 0x28

 1063 12:52:01.501791  Power On Value = 0x16, Power On Scale = 0x0

 1064 12:52:01.505231  ASPM: Enabled L1

 1065 12:52:01.508642  PCIe: Max_Payload_Size adjusted to 128

 1066 12:52:01.511782  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1067 12:52:01.515199  PCI: 00:1e.2 scanning...

 1068 12:52:01.518725  scan_generic_bus for PCI: 00:1e.2

 1069 12:52:01.521777  SPI: 00 enabled

 1070 12:52:01.528279  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1071 12:52:01.531812  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1072 12:52:01.535375  PCI: 00:1e.3 scanning...

 1073 12:52:01.538372  scan_generic_bus for PCI: 00:1e.3

 1074 12:52:01.538472  SPI: 00 enabled

 1075 12:52:01.545195  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1076 12:52:01.551488  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1077 12:52:01.551580  PCI: 00:1f.0 scanning...

 1078 12:52:01.554574  scan_static_bus for PCI: 00:1f.0

 1079 12:52:01.557975  PNP: 0c09.0 enabled

 1080 12:52:01.561262  PNP: 0c09.0 scanning...

 1081 12:52:01.564779  scan_static_bus for PNP: 0c09.0

 1082 12:52:01.568207  scan_static_bus for PNP: 0c09.0 done

 1083 12:52:01.571565  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1084 12:52:01.577932  scan_static_bus for PCI: 00:1f.0 done

 1085 12:52:01.581363  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1086 12:52:01.585136  PCI: 00:1f.2 scanning...

 1087 12:52:01.588082  scan_static_bus for PCI: 00:1f.2

 1088 12:52:01.588180  GENERIC: 0.0 enabled

 1089 12:52:01.591656  GENERIC: 0.0 scanning...

 1090 12:52:01.594906  scan_static_bus for GENERIC: 0.0

 1091 12:52:01.597894  GENERIC: 0.0 enabled

 1092 12:52:01.601565  GENERIC: 1.0 enabled

 1093 12:52:01.604546  scan_static_bus for GENERIC: 0.0 done

 1094 12:52:01.607936  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1095 12:52:01.611035  scan_static_bus for PCI: 00:1f.2 done

 1096 12:52:01.617692  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1097 12:52:01.621578  PCI: 00:1f.3 scanning...

 1098 12:52:01.624516  scan_static_bus for PCI: 00:1f.3

 1099 12:52:01.628154  scan_static_bus for PCI: 00:1f.3 done

 1100 12:52:01.631137  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1101 12:52:01.634715  PCI: 00:1f.5 scanning...

 1102 12:52:01.637781  scan_generic_bus for PCI: 00:1f.5

 1103 12:52:01.641407  scan_generic_bus for PCI: 00:1f.5 done

 1104 12:52:01.647855  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1105 12:52:01.650895  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1106 12:52:01.654531  scan_static_bus for Root Device done

 1107 12:52:01.661118  scan_bus: bus Root Device finished in 737 msecs

 1108 12:52:01.661206  done

 1109 12:52:01.667638  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1110 12:52:01.671458  Chrome EC: UHEPI supported

 1111 12:52:01.677814  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1112 12:52:01.681270  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1113 12:52:01.684715  SPI flash protection: WPSW=0 SRP0=0

 1114 12:52:01.691177  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1115 12:52:01.697476  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1116 12:52:01.697564  found VGA at PCI: 00:02.0

 1117 12:52:01.701166  Setting up VGA for PCI: 00:02.0

 1118 12:52:01.707732  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1119 12:52:01.710689  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1120 12:52:01.714529  Allocating resources...

 1121 12:52:01.717640  Reading resources...

 1122 12:52:01.721186  Root Device read_resources bus 0 link: 0

 1123 12:52:01.724271  DOMAIN: 0000 read_resources bus 0 link: 0

 1124 12:52:01.731489  PCI: 00:04.0 read_resources bus 1 link: 0

 1125 12:52:01.734696  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1126 12:52:01.741672  PCI: 00:0d.0 read_resources bus 0 link: 0

 1127 12:52:01.745283  USB0 port 0 read_resources bus 0 link: 0

 1128 12:52:01.751517  USB0 port 0 read_resources bus 0 link: 0 done

 1129 12:52:01.754715  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1130 12:52:01.758298  PCI: 00:14.0 read_resources bus 0 link: 0

 1131 12:52:01.765080  USB0 port 0 read_resources bus 0 link: 0

 1132 12:52:01.768343  USB0 port 0 read_resources bus 0 link: 0 done

 1133 12:52:01.775252  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1134 12:52:01.778940  PCI: 00:14.3 read_resources bus 0 link: 0

 1135 12:52:01.785277  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1136 12:52:01.788555  PCI: 00:15.0 read_resources bus 0 link: 0

 1137 12:52:01.795653  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1138 12:52:01.798833  PCI: 00:15.1 read_resources bus 0 link: 0

 1139 12:52:01.805401  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1140 12:52:01.808888  PCI: 00:19.1 read_resources bus 0 link: 0

 1141 12:52:01.816055  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1142 12:52:01.819043  PCI: 00:1d.0 read_resources bus 1 link: 0

 1143 12:52:01.825706  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1144 12:52:01.829298  PCI: 00:1e.2 read_resources bus 2 link: 0

 1145 12:52:01.836035  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1146 12:52:01.839230  PCI: 00:1e.3 read_resources bus 3 link: 0

 1147 12:52:01.845625  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1148 12:52:01.849151  PCI: 00:1f.0 read_resources bus 0 link: 0

 1149 12:52:01.855912  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1150 12:52:01.858956  PCI: 00:1f.2 read_resources bus 0 link: 0

 1151 12:52:01.862546  GENERIC: 0.0 read_resources bus 0 link: 0

 1152 12:52:01.869192  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1153 12:52:01.872511  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1154 12:52:01.879896  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1155 12:52:01.883446  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1156 12:52:01.889833  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1157 12:52:01.893249  Root Device read_resources bus 0 link: 0 done

 1158 12:52:01.896644  Done reading resources.

 1159 12:52:01.903393  Show resources in subtree (Root Device)...After reading.

 1160 12:52:01.906266   Root Device child on link 0 DOMAIN: 0000

 1161 12:52:01.909780    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1162 12:52:01.919618    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1163 12:52:01.929712    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1164 12:52:01.933193     PCI: 00:00.0

 1165 12:52:01.943289     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1166 12:52:01.949896     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1167 12:52:01.959529     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1168 12:52:01.969466     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1169 12:52:01.979468     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1170 12:52:01.989568     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1171 12:52:01.995887     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1172 12:52:02.006138     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1173 12:52:02.016030     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1174 12:52:02.026138     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1175 12:52:02.035979     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1176 12:52:02.045916     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1177 12:52:02.052570     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1178 12:52:02.062345     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1179 12:52:02.072714     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1180 12:52:02.082328     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1181 12:52:02.092184     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1182 12:52:02.102177     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1183 12:52:02.109027     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1184 12:52:02.118837     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1185 12:52:02.121957     PCI: 00:02.0

 1186 12:52:02.132125     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1187 12:52:02.141785     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1188 12:52:02.152166     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1189 12:52:02.155112     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1190 12:52:02.164964     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1191 12:52:02.168631      GENERIC: 0.0

 1192 12:52:02.168711     PCI: 00:05.0

 1193 12:52:02.178230     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1194 12:52:02.184972     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1195 12:52:02.185056      GENERIC: 0.0

 1196 12:52:02.188428     PCI: 00:08.0

 1197 12:52:02.198449     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 12:52:02.198532     PCI: 00:0a.0

 1199 12:52:02.201944     PCI: 00:0d.0 child on link 0 USB0 port 0

 1200 12:52:02.211682     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1201 12:52:02.218543      USB0 port 0 child on link 0 USB3 port 0

 1202 12:52:02.218623       USB3 port 0

 1203 12:52:02.221414       USB3 port 1

 1204 12:52:02.221499       USB3 port 2

 1205 12:52:02.224928       USB3 port 3

 1206 12:52:02.228227     PCI: 00:14.0 child on link 0 USB0 port 0

 1207 12:52:02.238089     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1208 12:52:02.244748      USB0 port 0 child on link 0 USB2 port 0

 1209 12:52:02.244831       USB2 port 0

 1210 12:52:02.248324       USB2 port 1

 1211 12:52:02.248399       USB2 port 2

 1212 12:52:02.251149       USB2 port 3

 1213 12:52:02.251225       USB2 port 4

 1214 12:52:02.254753       USB2 port 5

 1215 12:52:02.254835       USB2 port 6

 1216 12:52:02.257884       USB2 port 7

 1217 12:52:02.257960       USB2 port 8

 1218 12:52:02.261295       USB2 port 9

 1219 12:52:02.261382       USB3 port 0

 1220 12:52:02.264451       USB3 port 1

 1221 12:52:02.264525       USB3 port 2

 1222 12:52:02.268027       USB3 port 3

 1223 12:52:02.271099     PCI: 00:14.2

 1224 12:52:02.277633     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1225 12:52:02.288008     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1226 12:52:02.294437     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1227 12:52:02.304273     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1228 12:52:02.304356      GENERIC: 0.0

 1229 12:52:02.311217     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1230 12:52:02.321029     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1231 12:52:02.321110      I2C: 00:1a

 1232 12:52:02.324639      I2C: 00:31

 1233 12:52:02.324719      I2C: 00:32

 1234 12:52:02.328195     PCI: 00:15.1 child on link 0 I2C: 00:10

 1235 12:52:02.337478     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1236 12:52:02.341142      I2C: 00:10

 1237 12:52:02.341217     PCI: 00:15.2

 1238 12:52:02.350956     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1239 12:52:02.354735     PCI: 00:15.3

 1240 12:52:02.364148     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1241 12:52:02.364243     PCI: 00:16.0

 1242 12:52:02.374014     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1243 12:52:02.377345     PCI: 00:19.0

 1244 12:52:02.380914     PCI: 00:19.1 child on link 0 I2C: 00:15

 1245 12:52:02.390692     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1246 12:52:02.393748      I2C: 00:15

 1247 12:52:02.397554     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1248 12:52:02.407705     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1249 12:52:02.417037     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1250 12:52:02.424002     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1251 12:52:02.426943      GENERIC: 0.0

 1252 12:52:02.427022      PCI: 01:00.0

 1253 12:52:02.436898      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1254 12:52:02.446852      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1255 12:52:02.457282      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1256 12:52:02.460175     PCI: 00:1e.0

 1257 12:52:02.470591     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1258 12:52:02.473639     PCI: 00:1e.2 child on link 0 SPI: 00

 1259 12:52:02.483595     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1260 12:52:02.483717      SPI: 00

 1261 12:52:02.490368     PCI: 00:1e.3 child on link 0 SPI: 00

 1262 12:52:02.499908     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1263 12:52:02.499991      SPI: 00

 1264 12:52:02.503334     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1265 12:52:02.513560     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1266 12:52:02.513642      PNP: 0c09.0

 1267 12:52:02.523529      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1268 12:52:02.526765     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1269 12:52:02.536911     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1270 12:52:02.546583     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1271 12:52:02.550115      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1272 12:52:02.553208       GENERIC: 0.0

 1273 12:52:02.556563       GENERIC: 1.0

 1274 12:52:02.556657     PCI: 00:1f.3

 1275 12:52:02.566517     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1276 12:52:02.577091     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1277 12:52:02.579881     PCI: 00:1f.5

 1278 12:52:02.586398     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1279 12:52:02.593097    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1280 12:52:02.593189     APIC: 00

 1281 12:52:02.593294     APIC: 01

 1282 12:52:02.596511     APIC: 03

 1283 12:52:02.596590     APIC: 05

 1284 12:52:02.600311     APIC: 07

 1285 12:52:02.600390     APIC: 06

 1286 12:52:02.600461     APIC: 02

 1287 12:52:02.603160     APIC: 04

 1288 12:52:02.609791  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1289 12:52:02.616544   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1290 12:52:02.623103   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1291 12:52:02.626466   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1292 12:52:02.633128    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1293 12:52:02.636446    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1294 12:52:02.639668    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1295 12:52:02.646535   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1296 12:52:02.656289   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1297 12:52:02.663088   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1298 12:52:02.669422  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1299 12:52:02.676165  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1300 12:52:02.682895   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1301 12:52:02.692823   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1302 12:52:02.699365   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1303 12:52:02.702460   DOMAIN: 0000: Resource ranges:

 1304 12:52:02.706028   * Base: 1000, Size: 800, Tag: 100

 1305 12:52:02.709136   * Base: 1900, Size: e700, Tag: 100

 1306 12:52:02.715811    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1307 12:52:02.722502  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1308 12:52:02.729172  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1309 12:52:02.736069   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1310 12:52:02.742367   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1311 12:52:02.752751   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1312 12:52:02.758934   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1313 12:52:02.765779   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1314 12:52:02.775926   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1315 12:52:02.782220   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1316 12:52:02.789407   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1317 12:52:02.798889   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1318 12:52:02.805815   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1319 12:52:02.812339   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1320 12:52:02.822124   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1321 12:52:02.828886   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1322 12:52:02.836115   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1323 12:52:02.845855   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1324 12:52:02.852556   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1325 12:52:02.858801   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1326 12:52:02.868834   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1327 12:52:02.875682   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1328 12:52:02.882222   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1329 12:52:02.892573   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1330 12:52:02.898984   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1331 12:52:02.902464   DOMAIN: 0000: Resource ranges:

 1332 12:52:02.905613   * Base: 7fc00000, Size: 40400000, Tag: 200

 1333 12:52:02.908694   * Base: d0000000, Size: 28000000, Tag: 200

 1334 12:52:02.915929   * Base: fa000000, Size: 1000000, Tag: 200

 1335 12:52:02.918795   * Base: fb001000, Size: 2fff000, Tag: 200

 1336 12:52:02.922273   * Base: fe010000, Size: 2e000, Tag: 200

 1337 12:52:02.929318   * Base: fe03f000, Size: d41000, Tag: 200

 1338 12:52:02.932415   * Base: fed88000, Size: 8000, Tag: 200

 1339 12:52:02.935224   * Base: fed93000, Size: d000, Tag: 200

 1340 12:52:02.938976   * Base: feda2000, Size: 1e000, Tag: 200

 1341 12:52:02.942155   * Base: fede0000, Size: 1220000, Tag: 200

 1342 12:52:02.949126   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1343 12:52:02.955426    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1344 12:52:02.961814    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1345 12:52:02.968372    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1346 12:52:02.974820    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1347 12:52:02.981493    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1348 12:52:02.988112    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1349 12:52:02.994952    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1350 12:52:03.001320    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1351 12:52:03.008298    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1352 12:52:03.015444    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1353 12:52:03.021297    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1354 12:52:03.028099    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1355 12:52:03.034814    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1356 12:52:03.041476    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1357 12:52:03.048211    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1358 12:52:03.054792    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1359 12:52:03.061518    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1360 12:52:03.067890    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1361 12:52:03.074942    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1362 12:52:03.081290    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1363 12:52:03.088030    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1364 12:52:03.094426    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1365 12:52:03.101054  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1366 12:52:03.110925  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1367 12:52:03.114529   PCI: 00:1d.0: Resource ranges:

 1368 12:52:03.117571   * Base: 7fc00000, Size: 100000, Tag: 200

 1369 12:52:03.124321    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1370 12:52:03.130921    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1371 12:52:03.137620    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1372 12:52:03.144828  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1373 12:52:03.154287  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1374 12:52:03.157327  Root Device assign_resources, bus 0 link: 0

 1375 12:52:03.160521  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1376 12:52:03.170714  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1377 12:52:03.177673  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1378 12:52:03.187432  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1379 12:52:03.194315  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1380 12:52:03.200566  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1381 12:52:03.204085  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1382 12:52:03.210738  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1383 12:52:03.221392  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1384 12:52:03.227465  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1385 12:52:03.234109  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1386 12:52:03.238048  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1387 12:52:03.247621  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1388 12:52:03.251238  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1389 12:52:03.254139  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1390 12:52:03.264695  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1391 12:52:03.270788  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1392 12:52:03.280568  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1393 12:52:03.284875  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1394 12:52:03.290755  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1395 12:52:03.297572  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1396 12:52:03.300636  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1397 12:52:03.307169  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1398 12:52:03.314145  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1399 12:52:03.320613  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1400 12:52:03.323961  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1401 12:52:03.334070  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1402 12:52:03.340527  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1403 12:52:03.347135  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1404 12:52:03.357961  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1405 12:52:03.360866  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1406 12:52:03.367863  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1407 12:52:03.374146  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1408 12:52:03.384031  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1409 12:52:03.393857  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1410 12:52:03.397338  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1411 12:52:03.407581  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1412 12:52:03.413842  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1413 12:52:03.420915  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1414 12:52:03.427491  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1415 12:52:03.433756  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1416 12:52:03.440906  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1417 12:52:03.443809  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1418 12:52:03.453933  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1419 12:52:03.457057  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1420 12:52:03.460098  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1421 12:52:03.466742  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1422 12:52:03.470306  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1423 12:52:03.477106  LPC: Trying to open IO window from 800 size 1ff

 1424 12:52:03.483643  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1425 12:52:03.493348  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1426 12:52:03.500095  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1427 12:52:03.506724  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1428 12:52:03.510510  Root Device assign_resources, bus 0 link: 0

 1429 12:52:03.513850  Done setting resources.

 1430 12:52:03.520330  Show resources in subtree (Root Device)...After assigning values.

 1431 12:52:03.523777   Root Device child on link 0 DOMAIN: 0000

 1432 12:52:03.527175    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1433 12:52:03.537052    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1434 12:52:03.546806    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1435 12:52:03.550310     PCI: 00:00.0

 1436 12:52:03.556871     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1437 12:52:03.567177     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1438 12:52:03.577057     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1439 12:52:03.586729     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1440 12:52:03.596558     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1441 12:52:03.606876     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1442 12:52:03.613018     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1443 12:52:03.622955     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1444 12:52:03.632505     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1445 12:52:03.642708     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1446 12:52:03.652484     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1447 12:52:03.662937     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1448 12:52:03.669084     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1449 12:52:03.679218     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1450 12:52:03.689117     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1451 12:52:03.699135     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1452 12:52:03.708818     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1453 12:52:03.719026     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1454 12:52:03.726023     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1455 12:52:03.735379     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1456 12:52:03.739005     PCI: 00:02.0

 1457 12:52:03.749185     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1458 12:52:03.759161     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1459 12:52:03.769315     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1460 12:52:03.772161     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1461 12:52:03.785958     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1462 12:52:03.786378      GENERIC: 0.0

 1463 12:52:03.788991     PCI: 00:05.0

 1464 12:52:03.799294     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1465 12:52:03.802046     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1466 12:52:03.805512      GENERIC: 0.0

 1467 12:52:03.805964     PCI: 00:08.0

 1468 12:52:03.815780     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1469 12:52:03.818678     PCI: 00:0a.0

 1470 12:52:03.822422     PCI: 00:0d.0 child on link 0 USB0 port 0

 1471 12:52:03.832155     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1472 12:52:03.838969      USB0 port 0 child on link 0 USB3 port 0

 1473 12:52:03.839548       USB3 port 0

 1474 12:52:03.842329       USB3 port 1

 1475 12:52:03.842835       USB3 port 2

 1476 12:52:03.845752       USB3 port 3

 1477 12:52:03.848950     PCI: 00:14.0 child on link 0 USB0 port 0

 1478 12:52:03.858774     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1479 12:52:03.862240      USB0 port 0 child on link 0 USB2 port 0

 1480 12:52:03.865557       USB2 port 0

 1481 12:52:03.868972       USB2 port 1

 1482 12:52:03.869420       USB2 port 2

 1483 12:52:03.872235       USB2 port 3

 1484 12:52:03.872681       USB2 port 4

 1485 12:52:03.875836       USB2 port 5

 1486 12:52:03.876285       USB2 port 6

 1487 12:52:03.878739       USB2 port 7

 1488 12:52:03.879189       USB2 port 8

 1489 12:52:03.882335       USB2 port 9

 1490 12:52:03.882789       USB3 port 0

 1491 12:52:03.885307       USB3 port 1

 1492 12:52:03.885809       USB3 port 2

 1493 12:52:03.889026       USB3 port 3

 1494 12:52:03.889603     PCI: 00:14.2

 1495 12:52:03.898576     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1496 12:52:03.912232     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1497 12:52:03.915490     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1498 12:52:03.925283     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1499 12:52:03.928438      GENERIC: 0.0

 1500 12:52:03.931943     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1501 12:52:03.941866     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1502 12:52:03.942432      I2C: 00:1a

 1503 12:52:03.944977      I2C: 00:31

 1504 12:52:03.945429      I2C: 00:32

 1505 12:52:03.952127     PCI: 00:15.1 child on link 0 I2C: 00:10

 1506 12:52:03.962014     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1507 12:52:03.962480      I2C: 00:10

 1508 12:52:03.965106     PCI: 00:15.2

 1509 12:52:03.975425     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1510 12:52:03.975887     PCI: 00:15.3

 1511 12:52:03.988477     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1512 12:52:03.988940     PCI: 00:16.0

 1513 12:52:03.998855     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1514 12:52:04.001792     PCI: 00:19.0

 1515 12:52:04.005419     PCI: 00:19.1 child on link 0 I2C: 00:15

 1516 12:52:04.015003     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1517 12:52:04.018844      I2C: 00:15

 1518 12:52:04.021697     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1519 12:52:04.031345     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1520 12:52:04.041795     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1521 12:52:04.051711     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1522 12:52:04.054550      GENERIC: 0.0

 1523 12:52:04.055000      PCI: 01:00.0

 1524 12:52:04.067896      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1525 12:52:04.078220      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1526 12:52:04.088305      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1527 12:52:04.088763     PCI: 00:1e.0

 1528 12:52:04.101228     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1529 12:52:04.104763     PCI: 00:1e.2 child on link 0 SPI: 00

 1530 12:52:04.114520     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1531 12:52:04.114977      SPI: 00

 1532 12:52:04.121842     PCI: 00:1e.3 child on link 0 SPI: 00

 1533 12:52:04.131576     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1534 12:52:04.132033      SPI: 00

 1535 12:52:04.134375     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1536 12:52:04.144772     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1537 12:52:04.148165      PNP: 0c09.0

 1538 12:52:04.154554      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1539 12:52:04.161583     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1540 12:52:04.167978     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1541 12:52:04.177768     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1542 12:52:04.181060      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1543 12:52:04.184477       GENERIC: 0.0

 1544 12:52:04.187917       GENERIC: 1.0

 1545 12:52:04.188374     PCI: 00:1f.3

 1546 12:52:04.197729     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1547 12:52:04.207884     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1548 12:52:04.211171     PCI: 00:1f.5

 1549 12:52:04.220925     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1550 12:52:04.224427    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1551 12:52:04.227628     APIC: 00

 1552 12:52:04.228137     APIC: 01

 1553 12:52:04.228534     APIC: 03

 1554 12:52:04.231120     APIC: 05

 1555 12:52:04.231563     APIC: 07

 1556 12:52:04.235015     APIC: 06

 1557 12:52:04.235497     APIC: 02

 1558 12:52:04.235903     APIC: 04

 1559 12:52:04.237885  Done allocating resources.

 1560 12:52:04.244519  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1561 12:52:04.251264  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1562 12:52:04.255026  Configure GPIOs for I2S audio on UP4.

 1563 12:52:04.261004  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1564 12:52:04.264531  Enabling resources...

 1565 12:52:04.267878  PCI: 00:00.0 subsystem <- 8086/9a12

 1566 12:52:04.270984  PCI: 00:00.0 cmd <- 06

 1567 12:52:04.274603  PCI: 00:02.0 subsystem <- 8086/9a40

 1568 12:52:04.275050  PCI: 00:02.0 cmd <- 03

 1569 12:52:04.281267  PCI: 00:04.0 subsystem <- 8086/9a03

 1570 12:52:04.281741  PCI: 00:04.0 cmd <- 02

 1571 12:52:04.284773  PCI: 00:05.0 subsystem <- 8086/9a19

 1572 12:52:04.288370  PCI: 00:05.0 cmd <- 02

 1573 12:52:04.291355  PCI: 00:08.0 subsystem <- 8086/9a11

 1574 12:52:04.295097  PCI: 00:08.0 cmd <- 06

 1575 12:52:04.297850  PCI: 00:0d.0 subsystem <- 8086/9a13

 1576 12:52:04.301107  PCI: 00:0d.0 cmd <- 02

 1577 12:52:04.304681  PCI: 00:14.0 subsystem <- 8086/a0ed

 1578 12:52:04.308064  PCI: 00:14.0 cmd <- 02

 1579 12:52:04.311442  PCI: 00:14.2 subsystem <- 8086/a0ef

 1580 12:52:04.314556  PCI: 00:14.2 cmd <- 02

 1581 12:52:04.317974  PCI: 00:14.3 subsystem <- 8086/a0f0

 1582 12:52:04.318421  PCI: 00:14.3 cmd <- 02

 1583 12:52:04.324608  PCI: 00:15.0 subsystem <- 8086/a0e8

 1584 12:52:04.325056  PCI: 00:15.0 cmd <- 02

 1585 12:52:04.327823  PCI: 00:15.1 subsystem <- 8086/a0e9

 1586 12:52:04.331546  PCI: 00:15.1 cmd <- 02

 1587 12:52:04.334490  PCI: 00:15.2 subsystem <- 8086/a0ea

 1588 12:52:04.338334  PCI: 00:15.2 cmd <- 02

 1589 12:52:04.341293  PCI: 00:15.3 subsystem <- 8086/a0eb

 1590 12:52:04.344473  PCI: 00:15.3 cmd <- 02

 1591 12:52:04.348421  PCI: 00:16.0 subsystem <- 8086/a0e0

 1592 12:52:04.351176  PCI: 00:16.0 cmd <- 02

 1593 12:52:04.354907  PCI: 00:19.1 subsystem <- 8086/a0c6

 1594 12:52:04.357932  PCI: 00:19.1 cmd <- 02

 1595 12:52:04.361584  PCI: 00:1d.0 bridge ctrl <- 0013

 1596 12:52:04.364570  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1597 12:52:04.365022  PCI: 00:1d.0 cmd <- 06

 1598 12:52:04.371687  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1599 12:52:04.372136  PCI: 00:1e.0 cmd <- 06

 1600 12:52:04.374903  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1601 12:52:04.378732  PCI: 00:1e.2 cmd <- 06

 1602 12:52:04.381709  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1603 12:52:04.384837  PCI: 00:1e.3 cmd <- 02

 1604 12:52:04.388427  PCI: 00:1f.0 subsystem <- 8086/a087

 1605 12:52:04.391195  PCI: 00:1f.0 cmd <- 407

 1606 12:52:04.394649  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1607 12:52:04.398509  PCI: 00:1f.3 cmd <- 02

 1608 12:52:04.401244  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1609 12:52:04.404700  PCI: 00:1f.5 cmd <- 406

 1610 12:52:04.408124  PCI: 01:00.0 cmd <- 02

 1611 12:52:04.412584  done.

 1612 12:52:04.415943  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1613 12:52:04.419579  Initializing devices...

 1614 12:52:04.422342  Root Device init

 1615 12:52:04.426050  Chrome EC: Set SMI mask to 0x0000000000000000

 1616 12:52:04.432200  Chrome EC: clear events_b mask to 0x0000000000000000

 1617 12:52:04.438976  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1618 12:52:04.442570  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1619 12:52:04.449243  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1620 12:52:04.455789  Chrome EC: Set WAKE mask to 0x0000000000000000

 1621 12:52:04.459275  fw_config match found: DB_USB=USB3_ACTIVE

 1622 12:52:04.466033  Configure Right Type-C port orientation for retimer

 1623 12:52:04.469494  Root Device init finished in 43 msecs

 1624 12:52:04.472592  PCI: 00:00.0 init

 1625 12:52:04.475974  CPU TDP = 9 Watts

 1626 12:52:04.476459  CPU PL1 = 9 Watts

 1627 12:52:04.479292  CPU PL2 = 40 Watts

 1628 12:52:04.479816  CPU PL4 = 83 Watts

 1629 12:52:04.485682  PCI: 00:00.0 init finished in 8 msecs

 1630 12:52:04.486184  PCI: 00:02.0 init

 1631 12:52:04.489433  GMA: Found VBT in CBFS

 1632 12:52:04.492569  GMA: Found valid VBT in CBFS

 1633 12:52:04.499414  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1634 12:52:04.505925                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1635 12:52:04.509050  PCI: 00:02.0 init finished in 18 msecs

 1636 12:52:04.512634  PCI: 00:05.0 init

 1637 12:52:04.515415  PCI: 00:05.0 init finished in 0 msecs

 1638 12:52:04.518835  PCI: 00:08.0 init

 1639 12:52:04.522348  PCI: 00:08.0 init finished in 0 msecs

 1640 12:52:04.525821  PCI: 00:14.0 init

 1641 12:52:04.529246  PCI: 00:14.0 init finished in 0 msecs

 1642 12:52:04.529819  PCI: 00:14.2 init

 1643 12:52:04.535666  PCI: 00:14.2 init finished in 0 msecs

 1644 12:52:04.536146  PCI: 00:15.0 init

 1645 12:52:04.538995  I2C bus 0 version 0x3230302a

 1646 12:52:04.542031  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1647 12:52:04.549073  PCI: 00:15.0 init finished in 6 msecs

 1648 12:52:04.549652  PCI: 00:15.1 init

 1649 12:52:04.552058  I2C bus 1 version 0x3230302a

 1650 12:52:04.555680  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1651 12:52:04.558970  PCI: 00:15.1 init finished in 6 msecs

 1652 12:52:04.561970  PCI: 00:15.2 init

 1653 12:52:04.565774  I2C bus 2 version 0x3230302a

 1654 12:52:04.568771  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1655 12:52:04.571894  PCI: 00:15.2 init finished in 6 msecs

 1656 12:52:04.575703  PCI: 00:15.3 init

 1657 12:52:04.578536  I2C bus 3 version 0x3230302a

 1658 12:52:04.582029  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1659 12:52:04.585856  PCI: 00:15.3 init finished in 6 msecs

 1660 12:52:04.588748  PCI: 00:16.0 init

 1661 12:52:04.591789  PCI: 00:16.0 init finished in 0 msecs

 1662 12:52:04.592245  PCI: 00:19.1 init

 1663 12:52:04.595602  I2C bus 5 version 0x3230302a

 1664 12:52:04.598574  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1665 12:52:04.605536  PCI: 00:19.1 init finished in 6 msecs

 1666 12:52:04.606043  PCI: 00:1d.0 init

 1667 12:52:04.608584  Initializing PCH PCIe bridge.

 1668 12:52:04.612192  PCI: 00:1d.0 init finished in 3 msecs

 1669 12:52:04.615803  PCI: 00:1f.0 init

 1670 12:52:04.619441  IOAPIC: Initializing IOAPIC at 0xfec00000

 1671 12:52:04.625676  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1672 12:52:04.626134  IOAPIC: ID = 0x02

 1673 12:52:04.628999  IOAPIC: Dumping registers

 1674 12:52:04.632450    reg 0x0000: 0x02000000

 1675 12:52:04.635427    reg 0x0001: 0x00770020

 1676 12:52:04.635884    reg 0x0002: 0x00000000

 1677 12:52:04.642359  PCI: 00:1f.0 init finished in 21 msecs

 1678 12:52:04.642818  PCI: 00:1f.2 init

 1679 12:52:04.645554  Disabling ACPI via APMC.

 1680 12:52:04.649280  APMC done.

 1681 12:52:04.652426  PCI: 00:1f.2 init finished in 5 msecs

 1682 12:52:04.664198  PCI: 01:00.0 init

 1683 12:52:04.667905  PCI: 01:00.0 init finished in 0 msecs

 1684 12:52:04.671094  PNP: 0c09.0 init

 1685 12:52:04.674594  Google Chrome EC uptime: 8.426 seconds

 1686 12:52:04.681189  Google Chrome AP resets since EC boot: 1

 1687 12:52:04.683889  Google Chrome most recent AP reset causes:

 1688 12:52:04.687514  	0.350: 32775 shutdown: entering G3

 1689 12:52:04.694098  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1690 12:52:04.697236  PNP: 0c09.0 init finished in 22 msecs

 1691 12:52:04.703378  Devices initialized

 1692 12:52:04.706350  Show all devs... After init.

 1693 12:52:04.709720  Root Device: enabled 1

 1694 12:52:04.710168  DOMAIN: 0000: enabled 1

 1695 12:52:04.713378  CPU_CLUSTER: 0: enabled 1

 1696 12:52:04.716641  PCI: 00:00.0: enabled 1

 1697 12:52:04.720234  PCI: 00:02.0: enabled 1

 1698 12:52:04.720679  PCI: 00:04.0: enabled 1

 1699 12:52:04.723505  PCI: 00:05.0: enabled 1

 1700 12:52:04.726359  PCI: 00:06.0: enabled 0

 1701 12:52:04.729863  PCI: 00:07.0: enabled 0

 1702 12:52:04.730310  PCI: 00:07.1: enabled 0

 1703 12:52:04.733124  PCI: 00:07.2: enabled 0

 1704 12:52:04.736479  PCI: 00:07.3: enabled 0

 1705 12:52:04.739888  PCI: 00:08.0: enabled 1

 1706 12:52:04.740335  PCI: 00:09.0: enabled 0

 1707 12:52:04.743415  PCI: 00:0a.0: enabled 0

 1708 12:52:04.746885  PCI: 00:0d.0: enabled 1

 1709 12:52:04.747337  PCI: 00:0d.1: enabled 0

 1710 12:52:04.750022  PCI: 00:0d.2: enabled 0

 1711 12:52:04.753420  PCI: 00:0d.3: enabled 0

 1712 12:52:04.756391  PCI: 00:0e.0: enabled 0

 1713 12:52:04.756841  PCI: 00:10.2: enabled 1

 1714 12:52:04.760056  PCI: 00:10.6: enabled 0

 1715 12:52:04.763028  PCI: 00:10.7: enabled 0

 1716 12:52:04.766575  PCI: 00:12.0: enabled 0

 1717 12:52:04.767028  PCI: 00:12.6: enabled 0

 1718 12:52:04.769536  PCI: 00:13.0: enabled 0

 1719 12:52:04.773026  PCI: 00:14.0: enabled 1

 1720 12:52:04.776581  PCI: 00:14.1: enabled 0

 1721 12:52:04.777055  PCI: 00:14.2: enabled 1

 1722 12:52:04.779621  PCI: 00:14.3: enabled 1

 1723 12:52:04.783409  PCI: 00:15.0: enabled 1

 1724 12:52:04.786451  PCI: 00:15.1: enabled 1

 1725 12:52:04.786948  PCI: 00:15.2: enabled 1

 1726 12:52:04.789355  PCI: 00:15.3: enabled 1

 1727 12:52:04.792980  PCI: 00:16.0: enabled 1

 1728 12:52:04.793527  PCI: 00:16.1: enabled 0

 1729 12:52:04.796574  PCI: 00:16.2: enabled 0

 1730 12:52:04.799552  PCI: 00:16.3: enabled 0

 1731 12:52:04.802895  PCI: 00:16.4: enabled 0

 1732 12:52:04.803371  PCI: 00:16.5: enabled 0

 1733 12:52:04.806415  PCI: 00:17.0: enabled 0

 1734 12:52:04.809629  PCI: 00:19.0: enabled 0

 1735 12:52:04.812911  PCI: 00:19.1: enabled 1

 1736 12:52:04.813483  PCI: 00:19.2: enabled 0

 1737 12:52:04.816542  PCI: 00:1c.0: enabled 1

 1738 12:52:04.819451  PCI: 00:1c.1: enabled 0

 1739 12:52:04.823063  PCI: 00:1c.2: enabled 0

 1740 12:52:04.823538  PCI: 00:1c.3: enabled 0

 1741 12:52:04.825950  PCI: 00:1c.4: enabled 0

 1742 12:52:04.829666  PCI: 00:1c.5: enabled 0

 1743 12:52:04.830122  PCI: 00:1c.6: enabled 1

 1744 12:52:04.832962  PCI: 00:1c.7: enabled 0

 1745 12:52:04.836134  PCI: 00:1d.0: enabled 1

 1746 12:52:04.839373  PCI: 00:1d.1: enabled 0

 1747 12:52:04.839828  PCI: 00:1d.2: enabled 1

 1748 12:52:04.842744  PCI: 00:1d.3: enabled 0

 1749 12:52:04.846472  PCI: 00:1e.0: enabled 1

 1750 12:52:04.850046  PCI: 00:1e.1: enabled 0

 1751 12:52:04.850534  PCI: 00:1e.2: enabled 1

 1752 12:52:04.852918  PCI: 00:1e.3: enabled 1

 1753 12:52:04.856143  PCI: 00:1f.0: enabled 1

 1754 12:52:04.859746  PCI: 00:1f.1: enabled 0

 1755 12:52:04.860208  PCI: 00:1f.2: enabled 1

 1756 12:52:04.863094  PCI: 00:1f.3: enabled 1

 1757 12:52:04.866057  PCI: 00:1f.4: enabled 0

 1758 12:52:04.866389  PCI: 00:1f.5: enabled 1

 1759 12:52:04.869139  PCI: 00:1f.6: enabled 0

 1760 12:52:04.872727  PCI: 00:1f.7: enabled 0

 1761 12:52:04.875796  APIC: 00: enabled 1

 1762 12:52:04.876118  GENERIC: 0.0: enabled 1

 1763 12:52:04.879292  GENERIC: 0.0: enabled 1

 1764 12:52:04.882515  GENERIC: 1.0: enabled 1

 1765 12:52:04.882836  GENERIC: 0.0: enabled 1

 1766 12:52:04.886061  GENERIC: 1.0: enabled 1

 1767 12:52:04.889281  USB0 port 0: enabled 1

 1768 12:52:04.892558  GENERIC: 0.0: enabled 1

 1769 12:52:04.892800  USB0 port 0: enabled 1

 1770 12:52:04.896085  GENERIC: 0.0: enabled 1

 1771 12:52:04.899401  I2C: 00:1a: enabled 1

 1772 12:52:04.899602  I2C: 00:31: enabled 1

 1773 12:52:04.902390  I2C: 00:32: enabled 1

 1774 12:52:04.905793  I2C: 00:10: enabled 1

 1775 12:52:04.905936  I2C: 00:15: enabled 1

 1776 12:52:04.908841  GENERIC: 0.0: enabled 0

 1777 12:52:04.912535  GENERIC: 1.0: enabled 0

 1778 12:52:04.915698  GENERIC: 0.0: enabled 1

 1779 12:52:04.916059  SPI: 00: enabled 1

 1780 12:52:04.918989  SPI: 00: enabled 1

 1781 12:52:04.922594  PNP: 0c09.0: enabled 1

 1782 12:52:04.923004  GENERIC: 0.0: enabled 1

 1783 12:52:04.925624  USB3 port 0: enabled 1

 1784 12:52:04.928803  USB3 port 1: enabled 1

 1785 12:52:04.929200  USB3 port 2: enabled 0

 1786 12:52:04.932362  USB3 port 3: enabled 0

 1787 12:52:04.935858  USB2 port 0: enabled 0

 1788 12:52:04.938924  USB2 port 1: enabled 1

 1789 12:52:04.939288  USB2 port 2: enabled 1

 1790 12:52:04.942614  USB2 port 3: enabled 0

 1791 12:52:04.946104  USB2 port 4: enabled 1

 1792 12:52:04.946464  USB2 port 5: enabled 0

 1793 12:52:04.948921  USB2 port 6: enabled 0

 1794 12:52:04.952297  USB2 port 7: enabled 0

 1795 12:52:04.952654  USB2 port 8: enabled 0

 1796 12:52:04.955546  USB2 port 9: enabled 0

 1797 12:52:04.959041  USB3 port 0: enabled 0

 1798 12:52:04.962531  USB3 port 1: enabled 1

 1799 12:52:04.962991  USB3 port 2: enabled 0

 1800 12:52:04.966212  USB3 port 3: enabled 0

 1801 12:52:04.969157  GENERIC: 0.0: enabled 1

 1802 12:52:04.969867  GENERIC: 1.0: enabled 1

 1803 12:52:04.972785  APIC: 01: enabled 1

 1804 12:52:04.975699  APIC: 03: enabled 1

 1805 12:52:04.976216  APIC: 05: enabled 1

 1806 12:52:04.978945  APIC: 07: enabled 1

 1807 12:52:04.982296  APIC: 06: enabled 1

 1808 12:52:04.982745  APIC: 02: enabled 1

 1809 12:52:04.985636  APIC: 04: enabled 1

 1810 12:52:04.989219  PCI: 01:00.0: enabled 1

 1811 12:52:04.992321  BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms

 1812 12:52:04.998767  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1813 12:52:05.002483  ELOG: NV offset 0xf30000 size 0x1000

 1814 12:52:05.008854  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1815 12:52:05.016032  ELOG: Event(17) added with size 13 at 2023-03-22 12:52:05 UTC

 1816 12:52:05.022371  ELOG: Event(92) added with size 9 at 2023-03-22 12:52:05 UTC

 1817 12:52:05.029031  ELOG: Event(93) added with size 9 at 2023-03-22 12:52:05 UTC

 1818 12:52:05.035497  ELOG: Event(9E) added with size 10 at 2023-03-22 12:52:05 UTC

 1819 12:52:05.042191  ELOG: Event(9F) added with size 14 at 2023-03-22 12:52:05 UTC

 1820 12:52:05.045991  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1821 12:52:05.052130  ELOG: Event(A1) added with size 10 at 2023-03-22 12:52:05 UTC

 1822 12:52:05.059146  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1823 12:52:05.065521  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1824 12:52:05.066007  Finalize devices...

 1825 12:52:05.069064  Devices finalized

 1826 12:52:05.075595  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1827 12:52:05.079037  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1828 12:52:05.085658  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1829 12:52:05.089210  ME: HFSTS1                      : 0x80030055

 1830 12:52:05.095419  ME: HFSTS2                      : 0x30280116

 1831 12:52:05.099054  ME: HFSTS3                      : 0x00000050

 1832 12:52:05.101994  ME: HFSTS4                      : 0x00004000

 1833 12:52:05.108940  ME: HFSTS5                      : 0x00000000

 1834 12:52:05.112154  ME: HFSTS6                      : 0x00400006

 1835 12:52:05.115797  ME: Manufacturing Mode          : YES

 1836 12:52:05.118836  ME: SPI Protection Mode Enabled : NO

 1837 12:52:05.122170  ME: FW Partition Table          : OK

 1838 12:52:05.128855  ME: Bringup Loader Failure      : NO

 1839 12:52:05.132092  ME: Firmware Init Complete      : NO

 1840 12:52:05.135846  ME: Boot Options Present        : NO

 1841 12:52:05.138856  ME: Update In Progress          : NO

 1842 12:52:05.142322  ME: D0i3 Support                : YES

 1843 12:52:05.145286  ME: Low Power State Enabled     : NO

 1844 12:52:05.149031  ME: CPU Replaced                : YES

 1845 12:52:05.152167  ME: CPU Replacement Valid       : YES

 1846 12:52:05.158699  ME: Current Working State       : 5

 1847 12:52:05.162092  ME: Current Operation State     : 1

 1848 12:52:05.165187  ME: Current Operation Mode      : 3

 1849 12:52:05.168926  ME: Error Code                  : 0

 1850 12:52:05.172267  ME: Enhanced Debug Mode         : NO

 1851 12:52:05.175430  ME: CPU Debug Disabled          : YES

 1852 12:52:05.178887  ME: TXT Support                 : NO

 1853 12:52:05.185104  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1854 12:52:05.191991  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1855 12:52:05.195090  CBFS: 'fallback/slic' not found.

 1856 12:52:05.201906  ACPI: Writing ACPI tables at 76b01000.

 1857 12:52:05.202364  ACPI:    * FACS

 1858 12:52:05.205501  ACPI:    * DSDT

 1859 12:52:05.208958  Ramoops buffer: 0x100000@0x76a00000.

 1860 12:52:05.211823  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1861 12:52:05.215831  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1862 12:52:05.220546  Google Chrome EC: version:

 1863 12:52:05.224046  	ro: voema_v2.0.7540-147f8d37d1

 1864 12:52:05.227021  	rw: voema_v2.0.7540-147f8d37d1

 1865 12:52:05.230589    running image: 2

 1866 12:52:05.237483  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1867 12:52:05.240339  ACPI:    * FADT

 1868 12:52:05.240809  SCI is IRQ9

 1869 12:52:05.243895  ACPI: added table 1/32, length now 40

 1870 12:52:05.247020  ACPI:     * SSDT

 1871 12:52:05.250123  Found 1 CPU(s) with 8 core(s) each.

 1872 12:52:05.253790  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1873 12:52:05.260453  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1874 12:52:05.263525  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1875 12:52:05.266856  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1876 12:52:05.273434  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1877 12:52:05.280307  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1878 12:52:05.284036  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1879 12:52:05.290426  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1880 12:52:05.296479  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1881 12:52:05.300566  \_SB.PCI0.RP09: Added StorageD3Enable property

 1882 12:52:05.303604  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1883 12:52:05.310101  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1884 12:52:05.316854  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1885 12:52:05.320298  PS2K: Passing 80 keymaps to kernel

 1886 12:52:05.326836  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1887 12:52:05.333270  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1888 12:52:05.339908  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1889 12:52:05.346560  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1890 12:52:05.353321  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1891 12:52:05.359769  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1892 12:52:05.366438  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1893 12:52:05.372962  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1894 12:52:05.376520  ACPI: added table 2/32, length now 44

 1895 12:52:05.376983  ACPI:    * MCFG

 1896 12:52:05.379470  ACPI: added table 3/32, length now 48

 1897 12:52:05.383195  ACPI:    * TPM2

 1898 12:52:05.386268  TPM2 log created at 0x769f0000

 1899 12:52:05.389761  ACPI: added table 4/32, length now 52

 1900 12:52:05.390332  ACPI:    * MADT

 1901 12:52:05.392887  SCI is IRQ9

 1902 12:52:05.396152  ACPI: added table 5/32, length now 56

 1903 12:52:05.399573  current = 76b09850

 1904 12:52:05.400028  ACPI:    * DMAR

 1905 12:52:05.402926  ACPI: added table 6/32, length now 60

 1906 12:52:05.406341  ACPI: added table 7/32, length now 64

 1907 12:52:05.409750  ACPI:    * HPET

 1908 12:52:05.412813  ACPI: added table 8/32, length now 68

 1909 12:52:05.413294  ACPI: done.

 1910 12:52:05.416715  ACPI tables: 35216 bytes.

 1911 12:52:05.419262  smbios_write_tables: 769ef000

 1912 12:52:05.422930  EC returned error result code 3

 1913 12:52:05.426001  Couldn't obtain OEM name from CBI

 1914 12:52:05.429526  Create SMBIOS type 16

 1915 12:52:05.432419  Create SMBIOS type 17

 1916 12:52:05.436111  GENERIC: 0.0 (WIFI Device)

 1917 12:52:05.436593  SMBIOS tables: 1750 bytes.

 1918 12:52:05.442708  Writing table forward entry at 0x00000500

 1919 12:52:05.449676  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1920 12:52:05.452321  Writing coreboot table at 0x76b25000

 1921 12:52:05.455329   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1922 12:52:05.462448   1. 0000000000001000-000000000009ffff: RAM

 1923 12:52:05.465743   2. 00000000000a0000-00000000000fffff: RESERVED

 1924 12:52:05.468909   3. 0000000000100000-00000000769eefff: RAM

 1925 12:52:05.475386   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1926 12:52:05.482364   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1927 12:52:05.485384   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1928 12:52:05.492262   7. 0000000077000000-000000007fbfffff: RESERVED

 1929 12:52:05.495197   8. 00000000c0000000-00000000cfffffff: RESERVED

 1930 12:52:05.502197   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1931 12:52:05.505359  10. 00000000fb000000-00000000fb000fff: RESERVED

 1932 12:52:05.512178  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1933 12:52:05.515737  12. 00000000fed80000-00000000fed87fff: RESERVED

 1934 12:52:05.522007  13. 00000000fed90000-00000000fed92fff: RESERVED

 1935 12:52:05.525325  14. 00000000feda0000-00000000feda1fff: RESERVED

 1936 12:52:05.528314  15. 00000000fedc0000-00000000feddffff: RESERVED

 1937 12:52:05.535002  16. 0000000100000000-00000002803fffff: RAM

 1938 12:52:05.538611  Passing 4 GPIOs to payload:

 1939 12:52:05.541890              NAME |       PORT | POLARITY |     VALUE

 1940 12:52:05.548660               lid |  undefined |     high |      high

 1941 12:52:05.551725             power |  undefined |     high |       low

 1942 12:52:05.558725             oprom |  undefined |     high |       low

 1943 12:52:05.565354          EC in RW | 0x000000e5 |     high |      high

 1944 12:52:05.568370  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a1d0

 1945 12:52:05.572248  coreboot table: 1576 bytes.

 1946 12:52:05.575356  IMD ROOT    0. 0x76fff000 0x00001000

 1947 12:52:05.581802  IMD SMALL   1. 0x76ffe000 0x00001000

 1948 12:52:05.585548  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1949 12:52:05.588637  VPD         3. 0x76c4d000 0x00000367

 1950 12:52:05.591809  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1951 12:52:05.595451  CONSOLE     5. 0x76c2c000 0x00020000

 1952 12:52:05.598980  FMAP        6. 0x76c2b000 0x00000578

 1953 12:52:05.601838  TIME STAMP  7. 0x76c2a000 0x00000910

 1954 12:52:05.605311  VBOOT WORK  8. 0x76c16000 0x00014000

 1955 12:52:05.608397  ROMSTG STCK 9. 0x76c15000 0x00001000

 1956 12:52:05.615374  AFTER CAR  10. 0x76c0a000 0x0000b000

 1957 12:52:05.618986  RAMSTAGE   11. 0x76b97000 0x00073000

 1958 12:52:05.622398  REFCODE    12. 0x76b42000 0x00055000

 1959 12:52:05.625466  SMM BACKUP 13. 0x76b32000 0x00010000

 1960 12:52:05.628853  4f444749   14. 0x76b30000 0x00002000

 1961 12:52:05.632456  EXT VBT15. 0x76b2d000 0x0000219f

 1962 12:52:05.635467  COREBOOT   16. 0x76b25000 0x00008000

 1963 12:52:05.639198  ACPI       17. 0x76b01000 0x00024000

 1964 12:52:05.642121  ACPI GNVS  18. 0x76b00000 0x00001000

 1965 12:52:05.648913  RAMOOPS    19. 0x76a00000 0x00100000

 1966 12:52:05.651975  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1967 12:52:05.655823  SMBIOS     21. 0x769ef000 0x00000800

 1968 12:52:05.656271  IMD small region:

 1969 12:52:05.662288    IMD ROOT    0. 0x76ffec00 0x00000400

 1970 12:52:05.665783    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1971 12:52:05.668844    POWER STATE 2. 0x76ffeb80 0x00000044

 1972 12:52:05.672447    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1973 12:52:05.675612    MEM INFO    4. 0x76ffe980 0x000001e0

 1974 12:52:05.682370  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1975 12:52:05.685758  MTRR: Physical address space:

 1976 12:52:05.692186  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1977 12:52:05.699069  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1978 12:52:05.705588  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1979 12:52:05.708505  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1980 12:52:05.715296  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1981 12:52:05.721938  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1982 12:52:05.728528  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1983 12:52:05.731897  MTRR: Fixed MSR 0x250 0x0606060606060606

 1984 12:52:05.738696  MTRR: Fixed MSR 0x258 0x0606060606060606

 1985 12:52:05.742111  MTRR: Fixed MSR 0x259 0x0000000000000000

 1986 12:52:05.745293  MTRR: Fixed MSR 0x268 0x0606060606060606

 1987 12:52:05.748342  MTRR: Fixed MSR 0x269 0x0606060606060606

 1988 12:52:05.752021  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1989 12:52:05.758479  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1990 12:52:05.761728  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1991 12:52:05.765214  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1992 12:52:05.768688  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1993 12:52:05.774921  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1994 12:52:05.778650  call enable_fixed_mtrr()

 1995 12:52:05.781615  CPU physical address size: 39 bits

 1996 12:52:05.785133  MTRR: default type WB/UC MTRR counts: 6/6.

 1997 12:52:05.788264  MTRR: UC selected as default type.

 1998 12:52:05.795510  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1999 12:52:05.801614  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2000 12:52:05.808360  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2001 12:52:05.814796  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2002 12:52:05.821539  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2003 12:52:05.825033  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2004 12:52:05.833468  MTRR: Fixed MSR 0x250 0x0606060606060606

 2005 12:52:05.836301  MTRR: Fixed MSR 0x258 0x0606060606060606

 2006 12:52:05.839604  MTRR: Fixed MSR 0x259 0x0000000000000000

 2007 12:52:05.843005  MTRR: Fixed MSR 0x268 0x0606060606060606

 2008 12:52:05.849762  MTRR: Fixed MSR 0x269 0x0606060606060606

 2009 12:52:05.852766  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2010 12:52:05.856334  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2011 12:52:05.859502  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2012 12:52:05.866345  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2013 12:52:05.869731  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2014 12:52:05.872859  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2015 12:52:05.879743  MTRR: Fixed MSR 0x250 0x0606060606060606

 2016 12:52:05.880204  call enable_fixed_mtrr()

 2017 12:52:05.886128  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 12:52:05.889719  MTRR: Fixed MSR 0x259 0x0000000000000000

 2019 12:52:05.892796  MTRR: Fixed MSR 0x268 0x0606060606060606

 2020 12:52:05.896258  MTRR: Fixed MSR 0x269 0x0606060606060606

 2021 12:52:05.902735  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2022 12:52:05.905765  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2023 12:52:05.909511  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2024 12:52:05.912578  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2025 12:52:05.918962  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2026 12:52:05.922729  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2027 12:52:05.925757  CPU physical address size: 39 bits

 2028 12:52:05.929319  call enable_fixed_mtrr()

 2029 12:52:05.932915  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 12:52:05.939458  MTRR: Fixed MSR 0x250 0x0606060606060606

 2031 12:52:05.942756  MTRR: Fixed MSR 0x258 0x0606060606060606

 2032 12:52:05.945677  MTRR: Fixed MSR 0x259 0x0000000000000000

 2033 12:52:05.949400  MTRR: Fixed MSR 0x268 0x0606060606060606

 2034 12:52:05.956131  MTRR: Fixed MSR 0x269 0x0606060606060606

 2035 12:52:05.959547  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2036 12:52:05.962334  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2037 12:52:05.965926  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2038 12:52:05.972433  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2039 12:52:05.975880  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2040 12:52:05.979133  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2041 12:52:05.985832  MTRR: Fixed MSR 0x258 0x0606060606060606

 2042 12:52:05.986310  call enable_fixed_mtrr()

 2043 12:52:05.992542  MTRR: Fixed MSR 0x259 0x0000000000000000

 2044 12:52:05.995502  MTRR: Fixed MSR 0x268 0x0606060606060606

 2045 12:52:05.999031  MTRR: Fixed MSR 0x269 0x0606060606060606

 2046 12:52:06.002820  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2047 12:52:06.005619  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2048 12:52:06.012168  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2049 12:52:06.015997  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2050 12:52:06.018901  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2051 12:52:06.022599  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2052 12:52:06.026765  CPU physical address size: 39 bits

 2053 12:52:06.033385  call enable_fixed_mtrr()

 2054 12:52:06.033939  

 2055 12:52:06.034340  MTRR check

 2056 12:52:06.036389  MTRR: Fixed MSR 0x250 0x0606060606060606

 2057 12:52:06.039890  Fixed MTRRs   : Enabled

 2058 12:52:06.043566  Variable MTRRs: Enabled

 2059 12:52:06.044090  

 2060 12:52:06.046607  MTRR: Fixed MSR 0x258 0x0606060606060606

 2061 12:52:06.049795  MTRR: Fixed MSR 0x259 0x0000000000000000

 2062 12:52:06.052811  MTRR: Fixed MSR 0x268 0x0606060606060606

 2063 12:52:06.059529  MTRR: Fixed MSR 0x269 0x0606060606060606

 2064 12:52:06.062965  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2065 12:52:06.066440  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2066 12:52:06.069851  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2067 12:52:06.076439  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2068 12:52:06.079745  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2069 12:52:06.082798  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2070 12:52:06.089697  BS: BS_WRITE_TABLES exit times (exec / console): 210 / 150 ms

 2071 12:52:06.092998  call enable_fixed_mtrr()

 2072 12:52:06.096568  Checking cr50 for pending updates

 2073 12:52:06.100820  CPU physical address size: 39 bits

 2074 12:52:06.103499  CPU physical address size: 39 bits

 2075 12:52:06.108551  Reading cr50 TPM mode

 2076 12:52:06.109112  CPU physical address size: 39 bits

 2077 12:52:06.111675  MTRR: Fixed MSR 0x250 0x0606060606060606

 2078 12:52:06.118103  MTRR: Fixed MSR 0x250 0x0606060606060606

 2079 12:52:06.121900  MTRR: Fixed MSR 0x258 0x0606060606060606

 2080 12:52:06.124980  MTRR: Fixed MSR 0x259 0x0000000000000000

 2081 12:52:06.128044  MTRR: Fixed MSR 0x268 0x0606060606060606

 2082 12:52:06.135111  MTRR: Fixed MSR 0x269 0x0606060606060606

 2083 12:52:06.137870  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2084 12:52:06.141410  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2085 12:52:06.144967  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2086 12:52:06.151825  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2087 12:52:06.154780  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2088 12:52:06.157886  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2089 12:52:06.164672  MTRR: Fixed MSR 0x258 0x0606060606060606

 2090 12:52:06.165293  call enable_fixed_mtrr()

 2091 12:52:06.171272  MTRR: Fixed MSR 0x259 0x0000000000000000

 2092 12:52:06.174577  MTRR: Fixed MSR 0x268 0x0606060606060606

 2093 12:52:06.177962  MTRR: Fixed MSR 0x269 0x0606060606060606

 2094 12:52:06.181279  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2095 12:52:06.187693  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2096 12:52:06.191233  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2097 12:52:06.194239  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2098 12:52:06.197722  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2099 12:52:06.204439  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2100 12:52:06.207238  CPU physical address size: 39 bits

 2101 12:52:06.210595  call enable_fixed_mtrr()

 2102 12:52:06.217547  BS: BS_PAYLOAD_LOAD entry times (exec / console): 14 / 6 ms

 2103 12:52:06.220739  CPU physical address size: 39 bits

 2104 12:52:06.227211  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2105 12:52:06.230624  Checking segment from ROM address 0xffc02b38

 2106 12:52:06.237167  Checking segment from ROM address 0xffc02b54

 2107 12:52:06.240660  Loading segment from ROM address 0xffc02b38

 2108 12:52:06.244475    code (compression=0)

 2109 12:52:06.250811    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2110 12:52:06.260444  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2111 12:52:06.264126  it's not compressed!

 2112 12:52:06.401662  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2113 12:52:06.408594  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2114 12:52:06.415629  Loading segment from ROM address 0xffc02b54

 2115 12:52:06.415899    Entry Point 0x30000000

 2116 12:52:06.419083  Loaded segments

 2117 12:52:06.425396  BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms

 2118 12:52:06.468070  Finalizing chipset.

 2119 12:52:06.471091  Finalizing SMM.

 2120 12:52:06.471192  APMC done.

 2121 12:52:06.477677  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2122 12:52:06.481559  mp_park_aps done after 0 msecs.

 2123 12:52:06.484250  Jumping to boot code at 0x30000000(0x76b25000)

 2124 12:52:06.495198  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2125 12:52:06.495308  

 2126 12:52:06.495384  

 2127 12:52:06.495450  

 2128 12:52:06.497966  Starting depthcharge on Voema...

 2129 12:52:06.498074  

 2130 12:52:06.498471  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2131 12:52:06.498578  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2132 12:52:06.498667  Setting prompt string to ['volteer:']
 2133 12:52:06.498749  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2134 12:52:06.507906  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2135 12:52:06.508010  

 2136 12:52:06.514532  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2137 12:52:06.514664  

 2138 12:52:06.518095  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2139 12:52:06.520988  

 2140 12:52:06.524505  Failed to find eMMC card reader

 2141 12:52:06.524651  

 2142 12:52:06.524764  Wipe memory regions:

 2143 12:52:06.524871  

 2144 12:52:06.531066  	[0x00000000001000, 0x000000000a0000)

 2145 12:52:06.531229  

 2146 12:52:06.534257  	[0x00000000100000, 0x00000030000000)

 2147 12:52:06.560346  

 2148 12:52:06.563366  	[0x00000032662db0, 0x000000769ef000)

 2149 12:52:06.599153  

 2150 12:52:06.602378  	[0x00000100000000, 0x00000280400000)

 2151 12:52:06.804862  

 2152 12:52:06.808211  ec_init: CrosEC protocol v3 supported (256, 256)

 2153 12:52:06.808690  

 2154 12:52:06.814863  update_port_state: port C0 state: usb enable 1 mux conn 0

 2155 12:52:06.815375  

 2156 12:52:06.820853  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2157 12:52:06.825942  

 2158 12:52:06.829122  pmc_check_ipc_sts: STS_BUSY done after 1562 us

 2159 12:52:06.829584  

 2160 12:52:06.832566  send_conn_disc_msg: pmc_send_cmd succeeded

 2161 12:52:07.267302  

 2162 12:52:07.267833  R8152: Initializing

 2163 12:52:07.268222  

 2164 12:52:07.270820  Version 6 (ocp_data = 5c30)

 2165 12:52:07.271273  

 2166 12:52:07.273998  R8152: Done initializing

 2167 12:52:07.274442  

 2168 12:52:07.277236  Adding net device

 2169 12:52:07.578573  

 2170 12:52:07.581963  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2171 12:52:07.582072  

 2172 12:52:07.582152  

 2173 12:52:07.582222  

 2174 12:52:07.584897  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2176 12:52:07.685510  volteer: tftpboot 192.168.201.1 9729844/tftp-deploy-me6xd6q9/kernel/bzImage 9729844/tftp-deploy-me6xd6q9/kernel/cmdline 9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz

 2177 12:52:07.685673  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2178 12:52:07.685800  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2179 12:52:07.690095  tftpboot 192.168.201.1 9729844/tftp-deploy-me6xd6q9/kernel/bzImoy-me6xd6q9/kernel/cmdline 9729844/tftp-deploy-me6xd6q9/ramdisk/ramdisk.cpio.gz

 2180 12:52:07.690184  

 2181 12:52:07.690257  Waiting for link

 2182 12:52:07.893860  

 2183 12:52:07.894010  done.

 2184 12:52:07.894087  

 2185 12:52:07.894155  MAC: 00:24:32:30:7d:bc

 2186 12:52:07.894220  

 2187 12:52:07.896742  Sending DHCP discover... done.

 2188 12:52:07.896823  

 2189 12:52:07.900280  Waiting for reply... done.

 2190 12:52:07.900357  

 2191 12:52:07.903699  Sending DHCP request... done.

 2192 12:52:07.903783  

 2193 12:52:07.910176  Waiting for reply... done.

 2194 12:52:07.910273  

 2195 12:52:07.910342  My ip is 192.168.201.22

 2196 12:52:07.910410  

 2197 12:52:07.913229  The DHCP server ip is 192.168.201.1

 2198 12:52:07.916586  

 2199 12:52:07.920005  TFTP server IP predefined by user: 192.168.201.1

 2200 12:52:07.920088  

 2201 12:52:07.926743  Bootfile predefined by user: 9729844/tftp-deploy-me6xd6q9/kernel/bzImage

 2202 12:52:07.926828  

 2203 12:52:07.930076  Sending tftp read request... done.

 2204 12:52:07.930156  

 2205 12:52:07.933172  Waiting for the transfer... 

 2206 12:52:07.933248  

 2207 12:52:08.451920  00000000 ################################################################

 2208 12:52:08.452067  

 2209 12:52:09.006992  00080000 ################################################################

 2210 12:52:09.007131  

 2211 12:52:09.547930  00100000 ################################################################

 2212 12:52:09.548094  

 2213 12:52:10.102325  00180000 ################################################################

 2214 12:52:10.102464  

 2215 12:52:10.660260  00200000 ################################################################

 2216 12:52:10.660418  

 2217 12:52:11.206622  00280000 ################################################################

 2218 12:52:11.206761  

 2219 12:52:11.754188  00300000 ################################################################

 2220 12:52:11.754334  

 2221 12:52:12.278368  00380000 ################################################################

 2222 12:52:12.278518  

 2223 12:52:12.833712  00400000 ################################################################

 2224 12:52:12.833863  

 2225 12:52:13.378298  00480000 ################################################################

 2226 12:52:13.378504  

 2227 12:52:13.928828  00500000 ################################################################

 2228 12:52:13.928975  

 2229 12:52:14.481280  00580000 ################################################################

 2230 12:52:14.481453  

 2231 12:52:15.003221  00600000 ################################################################

 2232 12:52:15.003379  

 2233 12:52:15.541433  00680000 ################################################################

 2234 12:52:15.541593  

 2235 12:52:16.078144  00700000 ################################################################

 2236 12:52:16.078293  

 2237 12:52:16.645838  00780000 ################################################################

 2238 12:52:16.645989  

 2239 12:52:17.212594  00800000 ################################################################

 2240 12:52:17.212742  

 2241 12:52:17.761365  00880000 ################################################################

 2242 12:52:17.761535  

 2243 12:52:18.301137  00900000 ################################################################

 2244 12:52:18.301333  

 2245 12:52:18.856371  00980000 ################################################################

 2246 12:52:18.856533  

 2247 12:52:19.429460  00a00000 ################################################################

 2248 12:52:19.429626  

 2249 12:52:19.987720  00a80000 ################################################################

 2250 12:52:19.987868  

 2251 12:52:20.336795  00b00000 ########################################### done.

 2252 12:52:20.337014  

 2253 12:52:20.340133  The bootfile was 11878592 bytes long.

 2254 12:52:20.340267  

 2255 12:52:20.343762  Sending tftp read request... done.

 2256 12:52:20.343890  

 2257 12:52:20.347232  Waiting for the transfer... 

 2258 12:52:20.347361  

 2259 12:52:20.892003  00000000 ################################################################

 2260 12:52:20.892153  

 2261 12:52:21.426800  00080000 ################################################################

 2262 12:52:21.426962  

 2263 12:52:21.961687  00100000 ################################################################

 2264 12:52:21.961842  

 2265 12:52:22.498090  00180000 ################################################################

 2266 12:52:22.498243  

 2267 12:52:23.047068  00200000 ################################################################

 2268 12:52:23.047221  

 2269 12:52:23.644752  00280000 ################################################################

 2270 12:52:23.644902  

 2271 12:52:24.204389  00300000 ################################################################

 2272 12:52:24.204540  

 2273 12:52:24.824076  00380000 ################################################################

 2274 12:52:24.824626  

 2275 12:52:25.449108  00400000 ################################################################

 2276 12:52:25.449704  

 2277 12:52:26.118497  00480000 ################################################################

 2278 12:52:26.119044  

 2279 12:52:26.767447  00500000 ################################################################

 2280 12:52:26.768058  

 2281 12:52:27.400383  00580000 ################################################################

 2282 12:52:27.400920  

 2283 12:52:28.042964  00600000 ################################################################

 2284 12:52:28.043598  

 2285 12:52:28.672552  00680000 ################################################################

 2286 12:52:28.673092  

 2287 12:52:28.991608  00700000 ################################ done.

 2288 12:52:28.992308  

 2289 12:52:28.994866  Sending tftp read request... done.

 2290 12:52:28.995364  

 2291 12:52:28.997610  Waiting for the transfer... 

 2292 12:52:28.998106  

 2293 12:52:28.998472  00000000 # done.

 2294 12:52:28.998819  

 2295 12:52:29.007789  Command line loaded dynamically from TFTP file: 9729844/tftp-deploy-me6xd6q9/kernel/cmdline

 2296 12:52:29.008247  

 2297 12:52:29.027329  The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729844/extract-nfsrootfs-34_o1smz,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2298 12:52:29.031311  

 2299 12:52:29.034649  Shutting down all USB controllers.

 2300 12:52:29.035125  

 2301 12:52:29.035492  Removing current net device

 2302 12:52:29.035836  

 2303 12:52:29.038211  Finalizing coreboot

 2304 12:52:29.038752  

 2305 12:52:29.044835  Exiting depthcharge with code 4 at timestamp: 31189953

 2306 12:52:29.045291  

 2307 12:52:29.045711  

 2308 12:52:29.046056  Starting kernel ...

 2309 12:52:29.046383  

 2310 12:52:29.046701  

 2311 12:52:29.048038  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2312 12:52:29.048627  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2313 12:52:29.049042  Setting prompt string to ['Linux version [0-9]']
 2314 12:52:29.049420  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2315 12:52:29.049861  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2317 12:56:51.049551  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2319 12:56:51.050677  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2321 12:56:51.051518  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2324 12:56:51.052889  end: 2 depthcharge-action (duration 00:05:00) [common]
 2326 12:56:51.054061  Cleaning after the job
 2327 12:56:51.054543  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/ramdisk
 2328 12:56:51.057113  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/kernel
 2329 12:56:51.060623  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/nfsrootfs
 2330 12:56:51.111023  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729844/tftp-deploy-me6xd6q9/modules
 2331 12:56:51.111715  start: 4.1 power-off (timeout 00:00:30) [common]
 2332 12:56:51.111880  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
 2333 12:56:51.186814  >> Command sent successfully.

 2334 12:56:51.190748  Returned 0 in 0 seconds
 2335 12:56:51.292041  end: 4.1 power-off (duration 00:00:00) [common]
 2337 12:56:51.293504  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2338 12:56:51.294574  Listened to connection for namespace 'common' for up to 1s
 2339 12:56:52.297545  Finalising connection for namespace 'common'
 2340 12:56:52.297732  Disconnecting from shell: Finalise
 2341 12:56:52.297816  

 2342 12:56:52.398738  end: 4.2 read-feedback (duration 00:00:01) [common]
 2343 12:56:52.398885  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729844
 2344 12:56:52.550527  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729844
 2345 12:56:52.550711  JobError: Your job cannot terminate cleanly.