Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:56:30.134464 lava-dispatcher, installed at version: 2023.01
2 12:56:30.134668 start: 0 validate
3 12:56:30.134812 Start time: 2023-03-22 12:56:30.134797+00:00 (UTC)
4 12:56:30.134951 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:56:30.135101 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:56:30.422658 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:56:30.422839 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:56:30.713783 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:56:30.713945 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:56:31.005459 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:56:31.005631 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip-rt%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Bpreempt_rt%2Fgcc-10%2Fmodules.tar.xz exists
12 12:56:31.297437 validate duration: 1.16
14 12:56:31.297800 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:56:31.297925 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:56:31.298031 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:56:31.298139 Not decompressing ramdisk as can be used compressed.
18 12:56:31.298224 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:56:31.298313 saving as /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/ramdisk/initrd.cpio.gz
20 12:56:31.298383 total size: 5672849 (5MB)
21 12:56:31.299346 progress 0% (0MB)
22 12:56:31.300990 progress 5% (0MB)
23 12:56:31.302550 progress 10% (0MB)
24 12:56:31.303950 progress 15% (0MB)
25 12:56:31.305469 progress 20% (1MB)
26 12:56:31.306987 progress 25% (1MB)
27 12:56:31.308355 progress 30% (1MB)
28 12:56:31.309901 progress 35% (1MB)
29 12:56:31.311435 progress 40% (2MB)
30 12:56:31.312789 progress 45% (2MB)
31 12:56:31.314301 progress 50% (2MB)
32 12:56:31.315826 progress 55% (3MB)
33 12:56:31.317164 progress 60% (3MB)
34 12:56:31.318684 progress 65% (3MB)
35 12:56:31.320188 progress 70% (3MB)
36 12:56:31.321555 progress 75% (4MB)
37 12:56:31.323062 progress 80% (4MB)
38 12:56:31.324559 progress 85% (4MB)
39 12:56:31.325913 progress 90% (4MB)
40 12:56:31.327422 progress 95% (5MB)
41 12:56:31.328979 progress 100% (5MB)
42 12:56:31.329103 5MB downloaded in 0.03s (176.14MB/s)
43 12:56:31.329265 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:56:31.329520 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:56:31.329616 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:56:31.329708 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:56:31.329827 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/kernel/bzImage
49 12:56:31.329897 saving as /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/kernel/bzImage
50 12:56:31.329967 total size: 11878592 (11MB)
51 12:56:31.330029 No compression specified
52 12:56:31.330989 progress 0% (0MB)
53 12:56:31.334181 progress 5% (0MB)
54 12:56:31.337214 progress 10% (1MB)
55 12:56:31.340356 progress 15% (1MB)
56 12:56:31.343429 progress 20% (2MB)
57 12:56:31.346391 progress 25% (2MB)
58 12:56:31.349431 progress 30% (3MB)
59 12:56:31.352372 progress 35% (3MB)
60 12:56:31.355550 progress 40% (4MB)
61 12:56:31.358525 progress 45% (5MB)
62 12:56:31.361537 progress 50% (5MB)
63 12:56:31.364509 progress 55% (6MB)
64 12:56:31.367523 progress 60% (6MB)
65 12:56:31.370478 progress 65% (7MB)
66 12:56:31.373404 progress 70% (7MB)
67 12:56:31.376322 progress 75% (8MB)
68 12:56:31.379425 progress 80% (9MB)
69 12:56:31.382378 progress 85% (9MB)
70 12:56:31.385329 progress 90% (10MB)
71 12:56:31.388258 progress 95% (10MB)
72 12:56:31.391249 progress 100% (11MB)
73 12:56:31.391431 11MB downloaded in 0.06s (184.32MB/s)
74 12:56:31.391594 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:56:31.391844 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:56:31.391937 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:56:31.392029 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:56:31.392147 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:56:31.392218 saving as /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/nfsrootfs/full.rootfs.tar
81 12:56:31.392285 total size: 125916488 (120MB)
82 12:56:31.392354 Using unxz to decompress xz
83 12:56:31.395380 progress 0% (0MB)
84 12:56:31.849020 progress 5% (6MB)
85 12:56:32.310419 progress 10% (12MB)
86 12:56:32.778767 progress 15% (18MB)
87 12:56:33.250621 progress 20% (24MB)
88 12:56:33.590417 progress 25% (30MB)
89 12:56:33.944540 progress 30% (36MB)
90 12:56:34.224141 progress 35% (42MB)
91 12:56:34.422622 progress 40% (48MB)
92 12:56:34.799735 progress 45% (54MB)
93 12:56:35.175599 progress 50% (60MB)
94 12:56:35.531774 progress 55% (66MB)
95 12:56:35.898197 progress 60% (72MB)
96 12:56:36.246784 progress 65% (78MB)
97 12:56:36.643529 progress 70% (84MB)
98 12:56:37.072547 progress 75% (90MB)
99 12:56:37.498831 progress 80% (96MB)
100 12:56:37.600330 progress 85% (102MB)
101 12:56:37.769641 progress 90% (108MB)
102 12:56:38.111406 progress 95% (114MB)
103 12:56:38.495297 progress 100% (120MB)
104 12:56:38.501321 120MB downloaded in 7.11s (16.89MB/s)
105 12:56:38.501635 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:56:38.501921 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:56:38.502023 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:56:38.502118 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:56:38.502253 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip-rt/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook+preempt_rt/gcc-10/modules.tar.xz
111 12:56:38.502329 saving as /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/modules/modules.tar
112 12:56:38.502402 total size: 1255052 (1MB)
113 12:56:38.502470 Using unxz to decompress xz
114 12:56:38.505347 progress 2% (0MB)
115 12:56:38.505893 progress 7% (0MB)
116 12:56:38.509144 progress 13% (0MB)
117 12:56:38.513293 progress 18% (0MB)
118 12:56:38.517188 progress 23% (0MB)
119 12:56:38.521194 progress 28% (0MB)
120 12:56:38.525194 progress 33% (0MB)
121 12:56:38.529107 progress 39% (0MB)
122 12:56:38.533405 progress 44% (0MB)
123 12:56:38.537308 progress 49% (0MB)
124 12:56:38.541327 progress 54% (0MB)
125 12:56:38.545256 progress 60% (0MB)
126 12:56:38.549178 progress 65% (0MB)
127 12:56:38.553173 progress 70% (0MB)
128 12:56:38.557022 progress 75% (0MB)
129 12:56:38.560773 progress 80% (0MB)
130 12:56:38.564818 progress 86% (1MB)
131 12:56:38.568764 progress 91% (1MB)
132 12:56:38.572597 progress 96% (1MB)
133 12:56:38.582336 1MB downloaded in 0.08s (14.98MB/s)
134 12:56:38.582609 end: 1.4.1 http-download (duration 00:00:00) [common]
136 12:56:38.582883 end: 1.4 download-retry (duration 00:00:00) [common]
137 12:56:38.582982 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
138 12:56:38.583083 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
139 12:56:40.277559 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729802/extract-nfsrootfs-hg6q5jgw
140 12:56:40.277751 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
141 12:56:40.277855 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
142 12:56:40.277991 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak
143 12:56:40.278098 makedir: /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin
144 12:56:40.278185 makedir: /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/tests
145 12:56:40.278268 makedir: /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/results
146 12:56:40.278367 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-add-keys
147 12:56:40.278498 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-add-sources
148 12:56:40.278622 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-background-process-start
149 12:56:40.278735 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-background-process-stop
150 12:56:40.278845 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-common-functions
151 12:56:40.278958 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-echo-ipv4
152 12:56:40.279070 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-install-packages
153 12:56:40.279178 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-installed-packages
154 12:56:40.279285 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-os-build
155 12:56:40.279393 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-probe-channel
156 12:56:40.279501 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-probe-ip
157 12:56:40.279608 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-target-ip
158 12:56:40.279714 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-target-mac
159 12:56:40.279821 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-target-storage
160 12:56:40.279932 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-case
161 12:56:40.280041 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-event
162 12:56:40.280149 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-feedback
163 12:56:40.280259 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-raise
164 12:56:40.280366 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-reference
165 12:56:40.280474 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-runner
166 12:56:40.280582 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-set
167 12:56:40.280690 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-test-shell
168 12:56:40.280800 Updating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-install-packages (oe)
169 12:56:40.280917 Updating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/bin/lava-installed-packages (oe)
170 12:56:40.281014 Creating /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/environment
171 12:56:40.281101 LAVA metadata
172 12:56:40.281170 - LAVA_JOB_ID=9729802
173 12:56:40.281234 - LAVA_DISPATCHER_IP=192.168.201.1
174 12:56:40.281332 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
175 12:56:40.281397 skipped lava-vland-overlay
176 12:56:40.281473 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
177 12:56:40.281553 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
178 12:56:40.281615 skipped lava-multinode-overlay
179 12:56:40.281689 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
180 12:56:40.281770 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
181 12:56:40.281842 Loading test definitions
182 12:56:40.281931 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
183 12:56:40.282003 Using /lava-9729802 at stage 0
184 12:56:40.282099 Fetching tests from https://github.com/kernelci/test-definitions
185 12:56:40.282180 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/0/tests/0_ltp-mm'
186 12:56:47.075302 Running '/usr/bin/git checkout kernelci.org
187 12:56:47.148109 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
188 12:56:47.148851 uuid=9729802_1.5.2.3.1 testdef=None
189 12:56:47.149007 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
191 12:56:47.149261 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
192 12:56:47.150054 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
194 12:56:47.150304 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
195 12:56:47.151361 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
197 12:56:47.151606 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
198 12:56:47.152561 runner path: /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/0/tests/0_ltp-mm test_uuid 9729802_1.5.2.3.1
199 12:56:47.152652 SKIPFILE='skipfile-lkft.yaml'
200 12:56:47.152718 SKIP_INSTALL='true'
201 12:56:47.152780 TST_CMDFILES='mm'
202 12:56:47.152911 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
204 12:56:47.153127 Creating lava-test-runner.conf files
205 12:56:47.153192 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729802/lava-overlay-s14gkoak/lava-9729802/0 for stage 0
206 12:56:47.153276 - 0_ltp-mm
207 12:56:47.153375 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
208 12:56:47.153466 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
209 12:56:54.635778 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
210 12:56:54.635933 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
211 12:56:54.636028 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
212 12:56:54.636128 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
213 12:56:54.636220 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
214 12:56:54.745114 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
215 12:56:54.745483 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
216 12:56:54.745597 extracting modules file /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729802/extract-nfsrootfs-hg6q5jgw
217 12:56:54.772768 extracting modules file /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729802/extract-overlay-ramdisk-p0s2fj2i/ramdisk
218 12:56:54.800973 end: 1.5.4 extract-modules (duration 00:00:00) [common]
219 12:56:54.801127 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
220 12:56:54.801220 [common] Applying overlay to NFS
221 12:56:54.801291 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729802/compress-overlay-btkqoqsa/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729802/extract-nfsrootfs-hg6q5jgw
222 12:56:55.595803 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
223 12:56:55.595963 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
224 12:56:55.596059 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
225 12:56:55.596151 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
226 12:56:55.596241 Building ramdisk /var/lib/lava/dispatcher/tmp/9729802/extract-overlay-ramdisk-p0s2fj2i/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729802/extract-overlay-ramdisk-p0s2fj2i/ramdisk
227 12:56:55.651522 >> 40130 blocks
228 12:56:56.385617 rename /var/lib/lava/dispatcher/tmp/9729802/extract-overlay-ramdisk-p0s2fj2i/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
229 12:56:56.386035 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
230 12:56:56.386161 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
231 12:56:56.386265 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
232 12:56:56.386359 No mkimage arch provided, not using FIT.
233 12:56:56.386449 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
234 12:56:56.386573 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
235 12:56:56.386673 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
236 12:56:56.386769 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
237 12:56:56.386849 No LXC device requested
238 12:56:56.386930 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
239 12:56:56.387023 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
240 12:56:56.387110 end: 1.7 deploy-device-env (duration 00:00:00) [common]
241 12:56:56.387180 Checking files for TFTP limit of 4294967296 bytes.
242 12:56:56.387559 end: 1 tftp-deploy (duration 00:00:25) [common]
243 12:56:56.387662 start: 2 depthcharge-action (timeout 00:05:00) [common]
244 12:56:56.387760 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
245 12:56:56.387887 substitutions:
246 12:56:56.387958 - {DTB}: None
247 12:56:56.388022 - {INITRD}: 9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
248 12:56:56.388083 - {KERNEL}: 9729802/tftp-deploy-9lnkv022/kernel/bzImage
249 12:56:56.388143 - {LAVA_MAC}: None
250 12:56:56.388202 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729802/extract-nfsrootfs-hg6q5jgw
251 12:56:56.388263 - {NFS_SERVER_IP}: 192.168.201.1
252 12:56:56.388320 - {PRESEED_CONFIG}: None
253 12:56:56.388377 - {PRESEED_LOCAL}: None
254 12:56:56.388434 - {RAMDISK}: 9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
255 12:56:56.388490 - {ROOT_PART}: None
256 12:56:56.388546 - {ROOT}: None
257 12:56:56.388603 - {SERVER_IP}: 192.168.201.1
258 12:56:56.388659 - {TEE}: None
259 12:56:56.388715 Parsed boot commands:
260 12:56:56.388770 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
261 12:56:56.388925 Parsed boot commands: tftpboot 192.168.201.1 9729802/tftp-deploy-9lnkv022/kernel/bzImage 9729802/tftp-deploy-9lnkv022/kernel/cmdline 9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
262 12:56:56.389018 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
263 12:56:56.389105 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
264 12:56:56.389198 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
265 12:56:56.389286 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
266 12:56:56.389355 Not connected, no need to disconnect.
267 12:56:56.389433 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
268 12:56:56.389517 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
269 12:56:56.389589 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
270 12:56:56.392373 Setting prompt string to ['lava-test: # ']
271 12:56:56.392654 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
272 12:56:56.392761 end: 2.2.1 reset-connection (duration 00:00:00) [common]
273 12:56:56.392855 start: 2.2.2 reset-device (timeout 00:05:00) [common]
274 12:56:56.392962 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
275 12:56:56.393270 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
276 12:57:01.513495 >> Command sent successfully.
277 12:57:01.515616 Returned 0 in 5 seconds
278 12:57:01.616397 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
280 12:57:01.616727 end: 2.2.2 reset-device (duration 00:00:05) [common]
281 12:57:01.616824 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
282 12:57:01.616915 Setting prompt string to 'Starting depthcharge on Helios...'
283 12:57:01.616980 Changing prompt to 'Starting depthcharge on Helios...'
284 12:57:01.617046 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
285 12:57:01.617318 [Enter `^Ec?' for help]
286 12:57:02.239634
287 12:57:02.239785
288 12:57:02.249697 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
289 12:57:02.252528 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
290 12:57:02.259221 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
291 12:57:02.262335 CPU: AES supported, TXT NOT supported, VT supported
292 12:57:02.269453 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
293 12:57:02.272511 PCH: device id 0284 (rev 00) is Cometlake-U Premium
294 12:57:02.279521 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
295 12:57:02.282388 VBOOT: Loading verstage.
296 12:57:02.286235 FMAP: Found "FLASH" version 1.1 at 0xc04000.
297 12:57:02.292338 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
298 12:57:02.295615 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
299 12:57:02.299106 CBFS @ c08000 size 3f8000
300 12:57:02.305803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
301 12:57:02.308871 CBFS: Locating 'fallback/verstage'
302 12:57:02.311947 CBFS: Found @ offset 10fb80 size 1072c
303 12:57:02.316081
304 12:57:02.316166
305 12:57:02.325835 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
306 12:57:02.340449 Probing TPM: . done!
307 12:57:02.344081 TPM ready after 0 ms
308 12:57:02.347024 Connected to device vid:did:rid of 1ae0:0028:00
309 12:57:02.357256 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
310 12:57:02.360652 Initialized TPM device CR50 revision 0
311 12:57:02.403072 tlcl_send_startup: Startup return code is 0
312 12:57:02.403202 TPM: setup succeeded
313 12:57:02.415884 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
314 12:57:02.419624 Chrome EC: UHEPI supported
315 12:57:02.422709 Phase 1
316 12:57:02.425997 FMAP: area GBB found @ c05000 (12288 bytes)
317 12:57:02.432729 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
318 12:57:02.435908 Phase 2
319 12:57:02.436007 Phase 3
320 12:57:02.439001 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:57:02.445672 VB2:vb2_report_dev_firmware() This is developer signed firmware
322 12:57:02.452261 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 12:57:02.455325 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 12:57:02.462279 VB2:vb2_verify_keyblock() Checking keyblock signature...
325 12:57:02.477895 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
326 12:57:02.481492 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 12:57:02.488080 VB2:vb2_verify_fw_preamble() Verifying preamble.
328 12:57:02.492366 Phase 4
329 12:57:02.495378 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
330 12:57:02.502237 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
331 12:57:02.681838 VB2:vb2_rsa_verify_digest() Digest check failed!
332 12:57:02.688374 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
333 12:57:02.688470 Saving nvdata
334 12:57:02.691311 Reboot requested (10020007)
335 12:57:02.694864 board_reset() called!
336 12:57:02.694951 full_reset() called!
337 12:57:07.206825
338 12:57:07.206988
339 12:57:07.216394 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
340 12:57:07.219940 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
341 12:57:07.226608 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
342 12:57:07.229697 CPU: AES supported, TXT NOT supported, VT supported
343 12:57:07.236311 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
344 12:57:07.239520 PCH: device id 0284 (rev 00) is Cometlake-U Premium
345 12:57:07.246227 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
346 12:57:07.249220 VBOOT: Loading verstage.
347 12:57:07.252378 FMAP: Found "FLASH" version 1.1 at 0xc04000.
348 12:57:07.259027 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
349 12:57:07.265909 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 12:57:07.265999 CBFS @ c08000 size 3f8000
351 12:57:07.272464 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
352 12:57:07.276041 CBFS: Locating 'fallback/verstage'
353 12:57:07.278902 CBFS: Found @ offset 10fb80 size 1072c
354 12:57:07.283327
355 12:57:07.283413
356 12:57:07.292754 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
357 12:57:07.307413 Probing TPM: . done!
358 12:57:07.310451 TPM ready after 0 ms
359 12:57:07.314053 Connected to device vid:did:rid of 1ae0:0028:00
360 12:57:07.324014 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
361 12:57:07.327738 Initialized TPM device CR50 revision 0
362 12:57:07.369896 tlcl_send_startup: Startup return code is 0
363 12:57:07.370012 TPM: setup succeeded
364 12:57:07.382750 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
365 12:57:07.386853 Chrome EC: UHEPI supported
366 12:57:07.389968 Phase 1
367 12:57:07.393289 FMAP: area GBB found @ c05000 (12288 bytes)
368 12:57:07.399858 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
369 12:57:07.406396 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
370 12:57:07.409435 Recovery requested (1009000e)
371 12:57:07.415743 Saving nvdata
372 12:57:07.421821 tlcl_extend: response is 0
373 12:57:07.430012 tlcl_extend: response is 0
374 12:57:07.437494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
375 12:57:07.440428 CBFS @ c08000 size 3f8000
376 12:57:07.447097 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
377 12:57:07.450091 CBFS: Locating 'fallback/romstage'
378 12:57:07.453767 CBFS: Found @ offset 80 size 145fc
379 12:57:07.456831 Accumulated console time in verstage 98 ms
380 12:57:07.456919
381 12:57:07.460559
382 12:57:07.470261 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
383 12:57:07.476483 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
384 12:57:07.480188 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
385 12:57:07.483359 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
386 12:57:07.489663 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
387 12:57:07.493281 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
388 12:57:07.496238 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
389 12:57:07.499688 TCO_STS: 0000 0000
390 12:57:07.503169 GEN_PMCON: e0015238 00000200
391 12:57:07.506040 GBLRST_CAUSE: 00000000 00000000
392 12:57:07.506122 prev_sleep_state 5
393 12:57:07.510337 Boot Count incremented to 50461
394 12:57:07.517234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 12:57:07.520161 CBFS @ c08000 size 3f8000
396 12:57:07.526886 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 12:57:07.526974 CBFS: Locating 'fspm.bin'
398 12:57:07.533125 CBFS: Found @ offset 5ffc0 size 71000
399 12:57:07.536761 Chrome EC: UHEPI supported
400 12:57:07.542846 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
401 12:57:07.547131 Probing TPM: done!
402 12:57:07.553513 Connected to device vid:did:rid of 1ae0:0028:00
403 12:57:07.563384 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
404 12:57:07.569497 Initialized TPM device CR50 revision 0
405 12:57:07.578840 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
406 12:57:07.588506 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
407 12:57:07.588597 MRC cache found, size 1948
408 12:57:07.591648 bootmode is set to: 2
409 12:57:07.595072 PRMRR disabled by config.
410 12:57:07.598275 SPD INDEX = 1
411 12:57:07.601303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 12:57:07.604655 CBFS @ c08000 size 3f8000
413 12:57:07.611572 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 12:57:07.611668 CBFS: Locating 'spd.bin'
415 12:57:07.614910 CBFS: Found @ offset 5fb80 size 400
416 12:57:07.617815 SPD: module type is LPDDR3
417 12:57:07.621507 SPD: module part is
418 12:57:07.627675 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
419 12:57:07.631451 SPD: device width 4 bits, bus width 8 bits
420 12:57:07.634346 SPD: module size is 4096 MB (per channel)
421 12:57:07.637597 memory slot: 0 configuration done.
422 12:57:07.641409 memory slot: 2 configuration done.
423 12:57:07.692747 CBMEM:
424 12:57:07.696206 IMD: root @ 99fff000 254 entries.
425 12:57:07.699191 IMD: root @ 99ffec00 62 entries.
426 12:57:07.702891 External stage cache:
427 12:57:07.705929 IMD: root @ 9abff000 254 entries.
428 12:57:07.709399 IMD: root @ 9abfec00 62 entries.
429 12:57:07.715738 Chrome EC: clear events_b mask to 0x0000000020004000
430 12:57:07.728664 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
431 12:57:07.741720 tlcl_write: response is 0
432 12:57:07.750914 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
433 12:57:07.757384 MRC: TPM MRC hash updated successfully.
434 12:57:07.757482 2 DIMMs found
435 12:57:07.760869 SMM Memory Map
436 12:57:07.763931 SMRAM : 0x9a000000 0x1000000
437 12:57:07.767047 Subregion 0: 0x9a000000 0xa00000
438 12:57:07.770707 Subregion 1: 0x9aa00000 0x200000
439 12:57:07.773705 Subregion 2: 0x9ac00000 0x400000
440 12:57:07.777347 top_of_ram = 0x9a000000
441 12:57:07.780519 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
442 12:57:07.787059 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
443 12:57:07.790244 MTRR Range: Start=ff000000 End=0 (Size 1000000)
444 12:57:07.796932 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 12:57:07.799924 CBFS @ c08000 size 3f8000
446 12:57:07.803436 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 12:57:07.806425 CBFS: Locating 'fallback/postcar'
448 12:57:07.813377 CBFS: Found @ offset 107000 size 4b44
449 12:57:07.819522 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
450 12:57:07.829693 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
451 12:57:07.832833 Processing 180 relocs. Offset value of 0x97c0c000
452 12:57:07.840663 Accumulated console time in romstage 286 ms
453 12:57:07.840751
454 12:57:07.840820
455 12:57:07.850673 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
456 12:57:07.857486 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
457 12:57:07.860548 CBFS @ c08000 size 3f8000
458 12:57:07.867101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
459 12:57:07.870666 CBFS: Locating 'fallback/ramstage'
460 12:57:07.873820 CBFS: Found @ offset 43380 size 1b9e8
461 12:57:07.879951 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
462 12:57:07.912521 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
463 12:57:07.919149 Processing 3976 relocs. Offset value of 0x98db0000
464 12:57:07.922072 Accumulated console time in postcar 52 ms
465 12:57:07.922152
466 12:57:07.922299
467 12:57:07.932067 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
468 12:57:07.939003 FMAP: area RO_VPD found @ c00000 (16384 bytes)
469 12:57:07.942236 WARNING: RO_VPD is uninitialized or empty.
470 12:57:07.945615 FMAP: area RW_VPD found @ af8000 (8192 bytes)
471 12:57:07.952107 FMAP: area RW_VPD found @ af8000 (8192 bytes)
472 12:57:07.952190 Normal boot.
473 12:57:07.958255 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
474 12:57:07.961945 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 12:57:07.964937 CBFS @ c08000 size 3f8000
476 12:57:07.971597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 12:57:07.974794 CBFS: Locating 'cpu_microcode_blob.bin'
478 12:57:07.978234 CBFS: Found @ offset 14700 size 2ec00
479 12:57:07.981458 microcode: sig=0x806ec pf=0x4 revision=0xc9
480 12:57:07.984679 Skip microcode update
481 12:57:07.991462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
482 12:57:07.995154 CBFS @ c08000 size 3f8000
483 12:57:07.998014 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
484 12:57:08.001139 CBFS: Locating 'fsps.bin'
485 12:57:08.004795 CBFS: Found @ offset d1fc0 size 35000
486 12:57:08.030434 Detected 4 core, 8 thread CPU.
487 12:57:08.033974 Setting up SMI for CPU
488 12:57:08.037102 IED base = 0x9ac00000
489 12:57:08.040668 IED size = 0x00400000
490 12:57:08.040745 Will perform SMM setup.
491 12:57:08.046908 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
492 12:57:08.053375 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
493 12:57:08.059969 Processing 16 relocs. Offset value of 0x00030000
494 12:57:08.063200 Attempting to start 7 APs
495 12:57:08.066698 Waiting for 10ms after sending INIT.
496 12:57:08.080356 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
497 12:57:08.080441 done.
498 12:57:08.083854 AP: slot 5 apic_id 7.
499 12:57:08.087093 AP: slot 6 apic_id 6.
500 12:57:08.087166 AP: slot 1 apic_id 2.
501 12:57:08.090081 AP: slot 3 apic_id 3.
502 12:57:08.093776 Waiting for 2nd SIPI to complete...done.
503 12:57:08.096837 AP: slot 4 apic_id 5.
504 12:57:08.100492 AP: slot 7 apic_id 4.
505 12:57:08.106755 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
506 12:57:08.113405 Processing 13 relocs. Offset value of 0x00038000
507 12:57:08.119937 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
508 12:57:08.123410 Installing SMM handler to 0x9a000000
509 12:57:08.129606 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
510 12:57:08.136782 Processing 658 relocs. Offset value of 0x9a010000
511 12:57:08.143153 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
512 12:57:08.146195 Processing 13 relocs. Offset value of 0x9a008000
513 12:57:08.152957 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
514 12:57:08.159283 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
515 12:57:08.166057 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
516 12:57:08.169067 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
517 12:57:08.175786 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
518 12:57:08.182779 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
519 12:57:08.188874 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
520 12:57:08.195370 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
521 12:57:08.199134 Clearing SMI status registers
522 12:57:08.199219 SMI_STS: PM1
523 12:57:08.202225 PM1_STS: PWRBTN
524 12:57:08.202306 TCO_STS: SECOND_TO
525 12:57:08.205312 New SMBASE 0x9a000000
526 12:57:08.208922 In relocation handler: CPU 0
527 12:57:08.212033 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
528 12:57:08.218746 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 12:57:08.218828 Relocation complete.
530 12:57:08.221732 New SMBASE 0x99fff800
531 12:57:08.225256 In relocation handler: CPU 2
532 12:57:08.228321 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
533 12:57:08.235273 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 12:57:08.235367 Relocation complete.
535 12:57:08.238248 New SMBASE 0x99ffec00
536 12:57:08.241623 In relocation handler: CPU 5
537 12:57:08.244719 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
538 12:57:08.251482 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 12:57:08.251573 Relocation complete.
540 12:57:08.254659 New SMBASE 0x99ffe800
541 12:57:08.257801 In relocation handler: CPU 6
542 12:57:08.261307 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
543 12:57:08.267624 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 12:57:08.267715 Relocation complete.
545 12:57:08.271282 New SMBASE 0x99ffe400
546 12:57:08.274309 In relocation handler: CPU 7
547 12:57:08.277503 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
548 12:57:08.284189 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 12:57:08.284279 Relocation complete.
550 12:57:08.287571 New SMBASE 0x99fff000
551 12:57:08.291089 In relocation handler: CPU 4
552 12:57:08.294127 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
553 12:57:08.300908 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 12:57:08.301003 Relocation complete.
555 12:57:08.303881 New SMBASE 0x99fff400
556 12:57:08.307184 In relocation handler: CPU 3
557 12:57:08.310782 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
558 12:57:08.316964 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 12:57:08.317054 Relocation complete.
560 12:57:08.320022 New SMBASE 0x99fffc00
561 12:57:08.323519 In relocation handler: CPU 1
562 12:57:08.326875 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
563 12:57:08.333485 Writing SMRR. base = 0x9a000006, mask=0xff000800
564 12:57:08.333576 Relocation complete.
565 12:57:08.336511 Initializing CPU #0
566 12:57:08.340030 CPU: vendor Intel device 806ec
567 12:57:08.343131 CPU: family 06, model 8e, stepping 0c
568 12:57:08.346782 Clearing out pending MCEs
569 12:57:08.349657 Setting up local APIC...
570 12:57:08.349746 apic_id: 0x00 done.
571 12:57:08.353292 Turbo is available but hidden
572 12:57:08.356420 Turbo is available and visible
573 12:57:08.360078 VMX status: enabled
574 12:57:08.363146 IA32_FEATURE_CONTROL status: locked
575 12:57:08.366099 Skip microcode update
576 12:57:08.366186 CPU #0 initialized
577 12:57:08.369488 Initializing CPU #2
578 12:57:08.369575 Initializing CPU #5
579 12:57:08.372977 Initializing CPU #6
580 12:57:08.376026 CPU: vendor Intel device 806ec
581 12:57:08.379921 CPU: family 06, model 8e, stepping 0c
582 12:57:08.382782 CPU: vendor Intel device 806ec
583 12:57:08.385850 CPU: family 06, model 8e, stepping 0c
584 12:57:08.389393 Clearing out pending MCEs
585 12:57:08.392905 Initializing CPU #3
586 12:57:08.393010 Initializing CPU #1
587 12:57:08.395846 CPU: vendor Intel device 806ec
588 12:57:08.399795 CPU: family 06, model 8e, stepping 0c
589 12:57:08.402662 CPU: vendor Intel device 806ec
590 12:57:08.405531 CPU: family 06, model 8e, stepping 0c
591 12:57:08.408845 Clearing out pending MCEs
592 12:57:08.412357 Clearing out pending MCEs
593 12:57:08.415506 Setting up local APIC...
594 12:57:08.418600 Setting up local APIC...
595 12:57:08.418694 Setting up local APIC...
596 12:57:08.422310 apic_id: 0x01 done.
597 12:57:08.425554 apic_id: 0x03 done.
598 12:57:08.425648 apic_id: 0x02 done.
599 12:57:08.428786 VMX status: enabled
600 12:57:08.432182 VMX status: enabled
601 12:57:08.435227 IA32_FEATURE_CONTROL status: locked
602 12:57:08.438309 IA32_FEATURE_CONTROL status: locked
603 12:57:08.438394 Skip microcode update
604 12:57:08.441764 Skip microcode update
605 12:57:08.444994 CPU #3 initialized
606 12:57:08.445080 CPU #1 initialized
607 12:57:08.448627 Initializing CPU #7
608 12:57:08.451997 Initializing CPU #4
609 12:57:08.452081 CPU: vendor Intel device 806ec
610 12:57:08.458648 CPU: family 06, model 8e, stepping 0c
611 12:57:08.461739 CPU: vendor Intel device 806ec
612 12:57:08.464752 CPU: family 06, model 8e, stepping 0c
613 12:57:08.468507 Clearing out pending MCEs
614 12:57:08.468582 Clearing out pending MCEs
615 12:57:08.471476 Setting up local APIC...
616 12:57:08.475066 CPU: vendor Intel device 806ec
617 12:57:08.478060 CPU: family 06, model 8e, stepping 0c
618 12:57:08.481799 Clearing out pending MCEs
619 12:57:08.485004 Clearing out pending MCEs
620 12:57:08.488256 Setting up local APIC...
621 12:57:08.488332 VMX status: enabled
622 12:57:08.491169 apic_id: 0x05 done.
623 12:57:08.494708 Setting up local APIC...
624 12:57:08.494789 Setting up local APIC...
625 12:57:08.497682 VMX status: enabled
626 12:57:08.501339 apic_id: 0x04 done.
627 12:57:08.504362 IA32_FEATURE_CONTROL status: locked
628 12:57:08.504450 VMX status: enabled
629 12:57:08.508074 Skip microcode update
630 12:57:08.511159 IA32_FEATURE_CONTROL status: locked
631 12:57:08.514164 CPU #4 initialized
632 12:57:08.514251 Skip microcode update
633 12:57:08.517893 apic_id: 0x07 done.
634 12:57:08.520968 apic_id: 0x06 done.
635 12:57:08.521043 VMX status: enabled
636 12:57:08.524212 VMX status: enabled
637 12:57:08.527793 IA32_FEATURE_CONTROL status: locked
638 12:57:08.530837 IA32_FEATURE_CONTROL status: locked
639 12:57:08.534287 Skip microcode update
640 12:57:08.534367 Skip microcode update
641 12:57:08.537385 CPU #5 initialized
642 12:57:08.540891 CPU #6 initialized
643 12:57:08.540975 CPU #7 initialized
644 12:57:08.544010 IA32_FEATURE_CONTROL status: locked
645 12:57:08.547661 Skip microcode update
646 12:57:08.550674 CPU #2 initialized
647 12:57:08.553675 bsp_do_flight_plan done after 457 msecs.
648 12:57:08.557152 CPU: frequency set to 4200 MHz
649 12:57:08.557259 Enabling SMIs.
650 12:57:08.560237 Locking SMM.
651 12:57:08.574393 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
652 12:57:08.577851 CBFS @ c08000 size 3f8000
653 12:57:08.584360 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
654 12:57:08.584449 CBFS: Locating 'vbt.bin'
655 12:57:08.591176 CBFS: Found @ offset 5f5c0 size 499
656 12:57:08.594260 Found a VBT of 4608 bytes after decompression
657 12:57:08.777166 Display FSP Version Info HOB
658 12:57:08.780246 Reference Code - CPU = 9.0.1e.30
659 12:57:08.783513 uCode Version = 0.0.0.ca
660 12:57:08.786995 TXT ACM version = ff.ff.ff.ffff
661 12:57:08.789904 Display FSP Version Info HOB
662 12:57:08.793504 Reference Code - ME = 9.0.1e.30
663 12:57:08.796464 MEBx version = 0.0.0.0
664 12:57:08.800311 ME Firmware Version = Consumer SKU
665 12:57:08.803351 Display FSP Version Info HOB
666 12:57:08.806398 Reference Code - CML PCH = 9.0.1e.30
667 12:57:08.809967 PCH-CRID Status = Disabled
668 12:57:08.813025 PCH-CRID Original Value = ff.ff.ff.ffff
669 12:57:08.816035 PCH-CRID New Value = ff.ff.ff.ffff
670 12:57:08.819719 OPROM - RST - RAID = ff.ff.ff.ffff
671 12:57:08.822923 ChipsetInit Base Version = ff.ff.ff.ffff
672 12:57:08.829521 ChipsetInit Oem Version = ff.ff.ff.ffff
673 12:57:08.829608 Display FSP Version Info HOB
674 12:57:08.835688 Reference Code - SA - System Agent = 9.0.1e.30
675 12:57:08.839558 Reference Code - MRC = 0.7.1.6c
676 12:57:08.842459 SA - PCIe Version = 9.0.1e.30
677 12:57:08.845588 SA-CRID Status = Disabled
678 12:57:08.849147 SA-CRID Original Value = 0.0.0.c
679 12:57:08.849233 SA-CRID New Value = 0.0.0.c
680 12:57:08.852073 OPROM - VBIOS = ff.ff.ff.ffff
681 12:57:08.855555 RTC Init
682 12:57:08.859171 Set power on after power failure.
683 12:57:08.859287 Disabling Deep S3
684 12:57:08.862565 Disabling Deep S3
685 12:57:08.865756 Disabling Deep S4
686 12:57:08.865864 Disabling Deep S4
687 12:57:08.868675 Disabling Deep S5
688 12:57:08.868761 Disabling Deep S5
689 12:57:08.875373 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
690 12:57:08.878335 Enumerating buses...
691 12:57:08.882236 Show all devs... Before device enumeration.
692 12:57:08.885452 Root Device: enabled 1
693 12:57:08.888632 CPU_CLUSTER: 0: enabled 1
694 12:57:08.888722 DOMAIN: 0000: enabled 1
695 12:57:08.891638 APIC: 00: enabled 1
696 12:57:08.895011 PCI: 00:00.0: enabled 1
697 12:57:08.895098 PCI: 00:02.0: enabled 1
698 12:57:08.898381 PCI: 00:04.0: enabled 0
699 12:57:08.901430 PCI: 00:05.0: enabled 0
700 12:57:08.905121 PCI: 00:12.0: enabled 1
701 12:57:08.905209 PCI: 00:12.5: enabled 0
702 12:57:08.908345 PCI: 00:12.6: enabled 0
703 12:57:08.911416 PCI: 00:14.0: enabled 1
704 12:57:08.915012 PCI: 00:14.1: enabled 0
705 12:57:08.915102 PCI: 00:14.3: enabled 1
706 12:57:08.918104 PCI: 00:14.5: enabled 0
707 12:57:08.921567 PCI: 00:15.0: enabled 1
708 12:57:08.924651 PCI: 00:15.1: enabled 1
709 12:57:08.924731 PCI: 00:15.2: enabled 0
710 12:57:08.927733 PCI: 00:15.3: enabled 0
711 12:57:08.930888 PCI: 00:16.0: enabled 1
712 12:57:08.934743 PCI: 00:16.1: enabled 0
713 12:57:08.934821 PCI: 00:16.2: enabled 0
714 12:57:08.937845 PCI: 00:16.3: enabled 0
715 12:57:08.940696 PCI: 00:16.4: enabled 0
716 12:57:08.943812 PCI: 00:16.5: enabled 0
717 12:57:08.943900 PCI: 00:17.0: enabled 1
718 12:57:08.947486 PCI: 00:19.0: enabled 1
719 12:57:08.950575 PCI: 00:19.1: enabled 0
720 12:57:08.953655 PCI: 00:19.2: enabled 0
721 12:57:08.953742 PCI: 00:1a.0: enabled 0
722 12:57:08.957271 PCI: 00:1c.0: enabled 0
723 12:57:08.960249 PCI: 00:1c.1: enabled 0
724 12:57:08.963870 PCI: 00:1c.2: enabled 0
725 12:57:08.963957 PCI: 00:1c.3: enabled 0
726 12:57:08.966817 PCI: 00:1c.4: enabled 0
727 12:57:08.970434 PCI: 00:1c.5: enabled 0
728 12:57:08.970560 PCI: 00:1c.6: enabled 0
729 12:57:08.973404 PCI: 00:1c.7: enabled 0
730 12:57:08.977064 PCI: 00:1d.0: enabled 1
731 12:57:08.980146 PCI: 00:1d.1: enabled 0
732 12:57:08.980223 PCI: 00:1d.2: enabled 0
733 12:57:08.983006 PCI: 00:1d.3: enabled 0
734 12:57:08.986743 PCI: 00:1d.4: enabled 0
735 12:57:08.989898 PCI: 00:1d.5: enabled 1
736 12:57:08.989976 PCI: 00:1e.0: enabled 1
737 12:57:08.993217 PCI: 00:1e.1: enabled 0
738 12:57:08.996650 PCI: 00:1e.2: enabled 1
739 12:57:08.999665 PCI: 00:1e.3: enabled 1
740 12:57:08.999741 PCI: 00:1f.0: enabled 1
741 12:57:09.002946 PCI: 00:1f.1: enabled 1
742 12:57:09.005855 PCI: 00:1f.2: enabled 1
743 12:57:09.009579 PCI: 00:1f.3: enabled 1
744 12:57:09.009666 PCI: 00:1f.4: enabled 1
745 12:57:09.012614 PCI: 00:1f.5: enabled 1
746 12:57:09.016269 PCI: 00:1f.6: enabled 0
747 12:57:09.019436 USB0 port 0: enabled 1
748 12:57:09.019509 I2C: 00:15: enabled 1
749 12:57:09.022335 I2C: 00:5d: enabled 1
750 12:57:09.026005 GENERIC: 0.0: enabled 1
751 12:57:09.026094 I2C: 00:1a: enabled 1
752 12:57:09.029093 I2C: 00:38: enabled 1
753 12:57:09.032184 I2C: 00:39: enabled 1
754 12:57:09.032259 I2C: 00:3a: enabled 1
755 12:57:09.035170 I2C: 00:3b: enabled 1
756 12:57:09.038912 PCI: 00:00.0: enabled 1
757 12:57:09.038998 SPI: 00: enabled 1
758 12:57:09.042015 SPI: 01: enabled 1
759 12:57:09.045654 PNP: 0c09.0: enabled 1
760 12:57:09.048846 USB2 port 0: enabled 1
761 12:57:09.048936 USB2 port 1: enabled 1
762 12:57:09.052102 USB2 port 2: enabled 0
763 12:57:09.055085 USB2 port 3: enabled 0
764 12:57:09.055182 USB2 port 5: enabled 0
765 12:57:09.058150 USB2 port 6: enabled 1
766 12:57:09.061773 USB2 port 9: enabled 1
767 12:57:09.065245 USB3 port 0: enabled 1
768 12:57:09.065331 USB3 port 1: enabled 1
769 12:57:09.068116 USB3 port 2: enabled 1
770 12:57:09.071880 USB3 port 3: enabled 1
771 12:57:09.071965 USB3 port 4: enabled 0
772 12:57:09.074806 APIC: 02: enabled 1
773 12:57:09.078223 APIC: 01: enabled 1
774 12:57:09.078310 APIC: 03: enabled 1
775 12:57:09.081140 APIC: 05: enabled 1
776 12:57:09.081227 APIC: 07: enabled 1
777 12:57:09.084899 APIC: 06: enabled 1
778 12:57:09.087973 APIC: 04: enabled 1
779 12:57:09.088065 Compare with tree...
780 12:57:09.091114 Root Device: enabled 1
781 12:57:09.094297 CPU_CLUSTER: 0: enabled 1
782 12:57:09.097828 APIC: 00: enabled 1
783 12:57:09.097936 APIC: 02: enabled 1
784 12:57:09.101023 APIC: 01: enabled 1
785 12:57:09.104561 APIC: 03: enabled 1
786 12:57:09.104679 APIC: 05: enabled 1
787 12:57:09.107611 APIC: 07: enabled 1
788 12:57:09.111196 APIC: 06: enabled 1
789 12:57:09.111346 APIC: 04: enabled 1
790 12:57:09.114083 DOMAIN: 0000: enabled 1
791 12:57:09.117081 PCI: 00:00.0: enabled 1
792 12:57:09.120849 PCI: 00:02.0: enabled 1
793 12:57:09.124005 PCI: 00:04.0: enabled 0
794 12:57:09.124189 PCI: 00:05.0: enabled 0
795 12:57:09.127341 PCI: 00:12.0: enabled 1
796 12:57:09.130740 PCI: 00:12.5: enabled 0
797 12:57:09.133807 PCI: 00:12.6: enabled 0
798 12:57:09.136920 PCI: 00:14.0: enabled 1
799 12:57:09.137239 USB0 port 0: enabled 1
800 12:57:09.140712 USB2 port 0: enabled 1
801 12:57:09.143775 USB2 port 1: enabled 1
802 12:57:09.146723 USB2 port 2: enabled 0
803 12:57:09.150506 USB2 port 3: enabled 0
804 12:57:09.153445 USB2 port 5: enabled 0
805 12:57:09.153891 USB2 port 6: enabled 1
806 12:57:09.156454 USB2 port 9: enabled 1
807 12:57:09.160140 USB3 port 0: enabled 1
808 12:57:09.163297 USB3 port 1: enabled 1
809 12:57:09.166977 USB3 port 2: enabled 1
810 12:57:09.169776 USB3 port 3: enabled 1
811 12:57:09.170236 USB3 port 4: enabled 0
812 12:57:09.173085 PCI: 00:14.1: enabled 0
813 12:57:09.176204 PCI: 00:14.3: enabled 1
814 12:57:09.179865 PCI: 00:14.5: enabled 0
815 12:57:09.183193 PCI: 00:15.0: enabled 1
816 12:57:09.183643 I2C: 00:15: enabled 1
817 12:57:09.186000 PCI: 00:15.1: enabled 1
818 12:57:09.189584 I2C: 00:5d: enabled 1
819 12:57:09.192719 GENERIC: 0.0: enabled 1
820 12:57:09.195903 PCI: 00:15.2: enabled 0
821 12:57:09.196398 PCI: 00:15.3: enabled 0
822 12:57:09.199055 PCI: 00:16.0: enabled 1
823 12:57:09.202749 PCI: 00:16.1: enabled 0
824 12:57:09.205749 PCI: 00:16.2: enabled 0
825 12:57:09.209177 PCI: 00:16.3: enabled 0
826 12:57:09.209682 PCI: 00:16.4: enabled 0
827 12:57:09.212694 PCI: 00:16.5: enabled 0
828 12:57:09.215790 PCI: 00:17.0: enabled 1
829 12:57:09.219319 PCI: 00:19.0: enabled 1
830 12:57:09.222329 I2C: 00:1a: enabled 1
831 12:57:09.222864 I2C: 00:38: enabled 1
832 12:57:09.225611 I2C: 00:39: enabled 1
833 12:57:09.228578 I2C: 00:3a: enabled 1
834 12:57:09.232294 I2C: 00:3b: enabled 1
835 12:57:09.235638 PCI: 00:19.1: enabled 0
836 12:57:09.236261 PCI: 00:19.2: enabled 0
837 12:57:09.238631 PCI: 00:1a.0: enabled 0
838 12:57:09.241699 PCI: 00:1c.0: enabled 0
839 12:57:09.245481 PCI: 00:1c.1: enabled 0
840 12:57:09.248543 PCI: 00:1c.2: enabled 0
841 12:57:09.248994 PCI: 00:1c.3: enabled 0
842 12:57:09.251646 PCI: 00:1c.4: enabled 0
843 12:57:09.255278 PCI: 00:1c.5: enabled 0
844 12:57:09.258378 PCI: 00:1c.6: enabled 0
845 12:57:09.261240 PCI: 00:1c.7: enabled 0
846 12:57:09.261691 PCI: 00:1d.0: enabled 1
847 12:57:09.264886 PCI: 00:1d.1: enabled 0
848 12:57:09.268260 PCI: 00:1d.2: enabled 0
849 12:57:09.271172 PCI: 00:1d.3: enabled 0
850 12:57:09.274769 PCI: 00:1d.4: enabled 0
851 12:57:09.275220 PCI: 00:1d.5: enabled 1
852 12:57:09.277753 PCI: 00:00.0: enabled 1
853 12:57:09.281167 PCI: 00:1e.0: enabled 1
854 12:57:09.284293 PCI: 00:1e.1: enabled 0
855 12:57:09.287922 PCI: 00:1e.2: enabled 1
856 12:57:09.288374 SPI: 00: enabled 1
857 12:57:09.290585 PCI: 00:1e.3: enabled 1
858 12:57:09.294103 SPI: 01: enabled 1
859 12:57:09.297083 PCI: 00:1f.0: enabled 1
860 12:57:09.297533 PNP: 0c09.0: enabled 1
861 12:57:09.300457 PCI: 00:1f.1: enabled 1
862 12:57:09.304182 PCI: 00:1f.2: enabled 1
863 12:57:09.307157 PCI: 00:1f.3: enabled 1
864 12:57:09.310808 PCI: 00:1f.4: enabled 1
865 12:57:09.311352 PCI: 00:1f.5: enabled 1
866 12:57:09.313764 PCI: 00:1f.6: enabled 0
867 12:57:09.317264 Root Device scanning...
868 12:57:09.320387 scan_static_bus for Root Device
869 12:57:09.323866 CPU_CLUSTER: 0 enabled
870 12:57:09.324317 DOMAIN: 0000 enabled
871 12:57:09.327019 DOMAIN: 0000 scanning...
872 12:57:09.330452 PCI: pci_scan_bus for bus 00
873 12:57:09.333604 PCI: 00:00.0 [8086/0000] ops
874 12:57:09.336523 PCI: 00:00.0 [8086/9b61] enabled
875 12:57:09.340386 PCI: 00:02.0 [8086/0000] bus ops
876 12:57:09.343288 PCI: 00:02.0 [8086/9b41] enabled
877 12:57:09.346350 PCI: 00:04.0 [8086/1903] disabled
878 12:57:09.349795 PCI: 00:08.0 [8086/1911] enabled
879 12:57:09.353081 PCI: 00:12.0 [8086/02f9] enabled
880 12:57:09.356048 PCI: 00:14.0 [8086/0000] bus ops
881 12:57:09.359600 PCI: 00:14.0 [8086/02ed] enabled
882 12:57:09.362855 PCI: 00:14.2 [8086/02ef] enabled
883 12:57:09.366306 PCI: 00:14.3 [8086/02f0] enabled
884 12:57:09.369544 PCI: 00:15.0 [8086/0000] bus ops
885 12:57:09.372607 PCI: 00:15.0 [8086/02e8] enabled
886 12:57:09.375483 PCI: 00:15.1 [8086/0000] bus ops
887 12:57:09.379233 PCI: 00:15.1 [8086/02e9] enabled
888 12:57:09.382253 PCI: 00:16.0 [8086/0000] ops
889 12:57:09.385853 PCI: 00:16.0 [8086/02e0] enabled
890 12:57:09.388944 PCI: 00:17.0 [8086/0000] ops
891 12:57:09.392316 PCI: 00:17.0 [8086/02d3] enabled
892 12:57:09.395507 PCI: 00:19.0 [8086/0000] bus ops
893 12:57:09.398492 PCI: 00:19.0 [8086/02c5] enabled
894 12:57:09.402025 PCI: 00:1d.0 [8086/0000] bus ops
895 12:57:09.405230 PCI: 00:1d.0 [8086/02b0] enabled
896 12:57:09.412044 PCI: Static device PCI: 00:1d.5 not found, disabling it.
897 12:57:09.415048 PCI: 00:1e.0 [8086/0000] ops
898 12:57:09.418236 PCI: 00:1e.0 [8086/02a8] enabled
899 12:57:09.421696 PCI: 00:1e.2 [8086/0000] bus ops
900 12:57:09.424988 PCI: 00:1e.2 [8086/02aa] enabled
901 12:57:09.427850 PCI: 00:1e.3 [8086/0000] bus ops
902 12:57:09.431650 PCI: 00:1e.3 [8086/02ab] enabled
903 12:57:09.434643 PCI: 00:1f.0 [8086/0000] bus ops
904 12:57:09.437609 PCI: 00:1f.0 [8086/0284] enabled
905 12:57:09.444236 PCI: Static device PCI: 00:1f.1 not found, disabling it.
906 12:57:09.451164 PCI: Static device PCI: 00:1f.2 not found, disabling it.
907 12:57:09.454252 PCI: 00:1f.3 [8086/0000] bus ops
908 12:57:09.457456 PCI: 00:1f.3 [8086/02c8] enabled
909 12:57:09.460425 PCI: 00:1f.4 [8086/0000] bus ops
910 12:57:09.463689 PCI: 00:1f.4 [8086/02a3] enabled
911 12:57:09.467312 PCI: 00:1f.5 [8086/0000] bus ops
912 12:57:09.470301 PCI: 00:1f.5 [8086/02a4] enabled
913 12:57:09.473590 PCI: Leftover static devices:
914 12:57:09.473994 PCI: 00:05.0
915 12:57:09.474355 PCI: 00:12.5
916 12:57:09.477147 PCI: 00:12.6
917 12:57:09.477600 PCI: 00:14.1
918 12:57:09.480194 PCI: 00:14.5
919 12:57:09.480696 PCI: 00:15.2
920 12:57:09.483244 PCI: 00:15.3
921 12:57:09.483705 PCI: 00:16.1
922 12:57:09.484085 PCI: 00:16.2
923 12:57:09.486975 PCI: 00:16.3
924 12:57:09.487394 PCI: 00:16.4
925 12:57:09.489940 PCI: 00:16.5
926 12:57:09.490487 PCI: 00:19.1
927 12:57:09.490943 PCI: 00:19.2
928 12:57:09.493012 PCI: 00:1a.0
929 12:57:09.493389 PCI: 00:1c.0
930 12:57:09.496641 PCI: 00:1c.1
931 12:57:09.497175 PCI: 00:1c.2
932 12:57:09.499584 PCI: 00:1c.3
933 12:57:09.500043 PCI: 00:1c.4
934 12:57:09.500405 PCI: 00:1c.5
935 12:57:09.503113 PCI: 00:1c.6
936 12:57:09.503771 PCI: 00:1c.7
937 12:57:09.506064 PCI: 00:1d.1
938 12:57:09.506573 PCI: 00:1d.2
939 12:57:09.506986 PCI: 00:1d.3
940 12:57:09.509587 PCI: 00:1d.4
941 12:57:09.510084 PCI: 00:1d.5
942 12:57:09.512756 PCI: 00:1e.1
943 12:57:09.513206 PCI: 00:1f.1
944 12:57:09.516001 PCI: 00:1f.2
945 12:57:09.516498 PCI: 00:1f.6
946 12:57:09.519411 PCI: Check your devicetree.cb.
947 12:57:09.522573 PCI: 00:02.0 scanning...
948 12:57:09.526134 scan_generic_bus for PCI: 00:02.0
949 12:57:09.529108 scan_generic_bus for PCI: 00:02.0 done
950 12:57:09.535657 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
951 12:57:09.536260 PCI: 00:14.0 scanning...
952 12:57:09.539129 scan_static_bus for PCI: 00:14.0
953 12:57:09.542201 USB0 port 0 enabled
954 12:57:09.545983 USB0 port 0 scanning...
955 12:57:09.548953 scan_static_bus for USB0 port 0
956 12:57:09.552068 USB2 port 0 enabled
957 12:57:09.552522 USB2 port 1 enabled
958 12:57:09.555686 USB2 port 2 disabled
959 12:57:09.558881 USB2 port 3 disabled
960 12:57:09.559334 USB2 port 5 disabled
961 12:57:09.562009 USB2 port 6 enabled
962 12:57:09.562587 USB2 port 9 enabled
963 12:57:09.565619 USB3 port 0 enabled
964 12:57:09.568578 USB3 port 1 enabled
965 12:57:09.569032 USB3 port 2 enabled
966 12:57:09.571743 USB3 port 3 enabled
967 12:57:09.575389 USB3 port 4 disabled
968 12:57:09.575899 USB2 port 0 scanning...
969 12:57:09.578649 scan_static_bus for USB2 port 0
970 12:57:09.585150 scan_static_bus for USB2 port 0 done
971 12:57:09.588216 scan_bus: scanning of bus USB2 port 0 took 9692 usecs
972 12:57:09.591774 USB2 port 1 scanning...
973 12:57:09.594775 scan_static_bus for USB2 port 1
974 12:57:09.598187 scan_static_bus for USB2 port 1 done
975 12:57:09.604988 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
976 12:57:09.605464 USB2 port 6 scanning...
977 12:57:09.608388 scan_static_bus for USB2 port 6
978 12:57:09.614599 scan_static_bus for USB2 port 6 done
979 12:57:09.617733 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
980 12:57:09.621620 USB2 port 9 scanning...
981 12:57:09.624510 scan_static_bus for USB2 port 9
982 12:57:09.627621 scan_static_bus for USB2 port 9 done
983 12:57:09.634090 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
984 12:57:09.637212 USB3 port 0 scanning...
985 12:57:09.640880 scan_static_bus for USB3 port 0
986 12:57:09.644020 scan_static_bus for USB3 port 0 done
987 12:57:09.647343 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
988 12:57:09.650230 USB3 port 1 scanning...
989 12:57:09.653764 scan_static_bus for USB3 port 1
990 12:57:09.656701 scan_static_bus for USB3 port 1 done
991 12:57:09.663831 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
992 12:57:09.666655 USB3 port 2 scanning...
993 12:57:09.670446 scan_static_bus for USB3 port 2
994 12:57:09.673554 scan_static_bus for USB3 port 2 done
995 12:57:09.680265 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
996 12:57:09.680752 USB3 port 3 scanning...
997 12:57:09.683403 scan_static_bus for USB3 port 3
998 12:57:09.689775 scan_static_bus for USB3 port 3 done
999 12:57:09.692656 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1000 12:57:09.696235 scan_static_bus for USB0 port 0 done
1001 12:57:09.702970 scan_bus: scanning of bus USB0 port 0 took 155332 usecs
1002 12:57:09.705857 scan_static_bus for PCI: 00:14.0 done
1003 12:57:09.712463 scan_bus: scanning of bus PCI: 00:14.0 took 172947 usecs
1004 12:57:09.715852 PCI: 00:15.0 scanning...
1005 12:57:09.718950 scan_generic_bus for PCI: 00:15.0
1006 12:57:09.722668 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1007 12:57:09.725787 scan_generic_bus for PCI: 00:15.0 done
1008 12:57:09.731922 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
1009 12:57:09.735569 PCI: 00:15.1 scanning...
1010 12:57:09.738367 scan_generic_bus for PCI: 00:15.1
1011 12:57:09.741843 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1012 12:57:09.745404 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1013 12:57:09.751614 scan_generic_bus for PCI: 00:15.1 done
1014 12:57:09.754886 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
1015 12:57:09.758188 PCI: 00:19.0 scanning...
1016 12:57:09.761249 scan_generic_bus for PCI: 00:19.0
1017 12:57:09.767992 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1018 12:57:09.771082 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1019 12:57:09.774815 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1020 12:57:09.777883 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1021 12:57:09.784447 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1022 12:57:09.787506 scan_generic_bus for PCI: 00:19.0 done
1023 12:57:09.791135 scan_bus: scanning of bus PCI: 00:19.0 took 30745 usecs
1024 12:57:09.794275 PCI: 00:1d.0 scanning...
1025 12:57:09.797310 do_pci_scan_bridge for PCI: 00:1d.0
1026 12:57:09.800948 PCI: pci_scan_bus for bus 01
1027 12:57:09.803883 PCI: 01:00.0 [1c5c/1327] enabled
1028 12:57:09.810386 Enabling Common Clock Configuration
1029 12:57:09.813461 L1 Sub-State supported from root port 29
1030 12:57:09.817207 L1 Sub-State Support = 0xf
1031 12:57:09.820035 CommonModeRestoreTime = 0x28
1032 12:57:09.823804 Power On Value = 0x16, Power On Scale = 0x0
1033 12:57:09.824250 ASPM: Enabled L1
1034 12:57:09.830049 scan_bus: scanning of bus PCI: 00:1d.0 took 32823 usecs
1035 12:57:09.833646 PCI: 00:1e.2 scanning...
1036 12:57:09.836592 scan_generic_bus for PCI: 00:1e.2
1037 12:57:09.840182 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1038 12:57:09.843285 scan_generic_bus for PCI: 00:1e.2 done
1039 12:57:09.849540 scan_bus: scanning of bus PCI: 00:1e.2 took 13996 usecs
1040 12:57:09.852686 PCI: 00:1e.3 scanning...
1041 12:57:09.856461 scan_generic_bus for PCI: 00:1e.3
1042 12:57:09.859409 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1043 12:57:09.862836 scan_generic_bus for PCI: 00:1e.3 done
1044 12:57:09.869392 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1045 12:57:09.872440 PCI: 00:1f.0 scanning...
1046 12:57:09.875445 scan_static_bus for PCI: 00:1f.0
1047 12:57:09.879149 PNP: 0c09.0 enabled
1048 12:57:09.882291 scan_static_bus for PCI: 00:1f.0 done
1049 12:57:09.885780 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1050 12:57:09.888847 PCI: 00:1f.3 scanning...
1051 12:57:09.895584 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1052 12:57:09.898635 PCI: 00:1f.4 scanning...
1053 12:57:09.901624 scan_generic_bus for PCI: 00:1f.4
1054 12:57:09.905377 scan_generic_bus for PCI: 00:1f.4 done
1055 12:57:09.911464 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1056 12:57:09.914964 PCI: 00:1f.5 scanning...
1057 12:57:09.918136 scan_generic_bus for PCI: 00:1f.5
1058 12:57:09.921704 scan_generic_bus for PCI: 00:1f.5 done
1059 12:57:09.928371 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1060 12:57:09.931184 scan_bus: scanning of bus DOMAIN: 0000 took 604966 usecs
1061 12:57:09.934179 scan_static_bus for Root Device done
1062 12:57:09.941158 scan_bus: scanning of bus Root Device took 624835 usecs
1063 12:57:09.941579 done
1064 12:57:09.944149 Chrome EC: UHEPI supported
1065 12:57:09.951104 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1066 12:57:09.957718 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1067 12:57:09.963788 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1068 12:57:09.971050 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1069 12:57:09.973888 SPI flash protection: WPSW=0 SRP0=0
1070 12:57:09.980468 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1071 12:57:09.983751 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1072 12:57:09.986852 found VGA at PCI: 00:02.0
1073 12:57:09.990308 Setting up VGA for PCI: 00:02.0
1074 12:57:09.997113 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1075 12:57:10.000327 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1076 12:57:10.003283 Allocating resources...
1077 12:57:10.006967 Reading resources...
1078 12:57:10.010025 Root Device read_resources bus 0 link: 0
1079 12:57:10.013128 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1080 12:57:10.019476 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1081 12:57:10.023109 DOMAIN: 0000 read_resources bus 0 link: 0
1082 12:57:10.030189 PCI: 00:14.0 read_resources bus 0 link: 0
1083 12:57:10.033051 USB0 port 0 read_resources bus 0 link: 0
1084 12:57:10.041573 USB0 port 0 read_resources bus 0 link: 0 done
1085 12:57:10.044581 PCI: 00:14.0 read_resources bus 0 link: 0 done
1086 12:57:10.051861 PCI: 00:15.0 read_resources bus 1 link: 0
1087 12:57:10.055466 PCI: 00:15.0 read_resources bus 1 link: 0 done
1088 12:57:10.062045 PCI: 00:15.1 read_resources bus 2 link: 0
1089 12:57:10.065102 PCI: 00:15.1 read_resources bus 2 link: 0 done
1090 12:57:10.073064 PCI: 00:19.0 read_resources bus 3 link: 0
1091 12:57:10.079292 PCI: 00:19.0 read_resources bus 3 link: 0 done
1092 12:57:10.082483 PCI: 00:1d.0 read_resources bus 1 link: 0
1093 12:57:10.089224 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1094 12:57:10.092223 PCI: 00:1e.2 read_resources bus 4 link: 0
1095 12:57:10.099004 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1096 12:57:10.102116 PCI: 00:1e.3 read_resources bus 5 link: 0
1097 12:57:10.109050 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1098 12:57:10.111996 PCI: 00:1f.0 read_resources bus 0 link: 0
1099 12:57:10.118668 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1100 12:57:10.125116 DOMAIN: 0000 read_resources bus 0 link: 0 done
1101 12:57:10.128768 Root Device read_resources bus 0 link: 0 done
1102 12:57:10.131826 Done reading resources.
1103 12:57:10.138249 Show resources in subtree (Root Device)...After reading.
1104 12:57:10.141911 Root Device child on link 0 CPU_CLUSTER: 0
1105 12:57:10.144959 CPU_CLUSTER: 0 child on link 0 APIC: 00
1106 12:57:10.147990 APIC: 00
1107 12:57:10.148541 APIC: 02
1108 12:57:10.151056 APIC: 01
1109 12:57:10.151545 APIC: 03
1110 12:57:10.151929 APIC: 05
1111 12:57:10.154755 APIC: 07
1112 12:57:10.155239 APIC: 06
1113 12:57:10.155601 APIC: 04
1114 12:57:10.161407 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1115 12:57:10.211103 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1116 12:57:10.211626 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1117 12:57:10.212043 PCI: 00:00.0
1118 12:57:10.212796 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1119 12:57:10.213204 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1120 12:57:10.213613 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1121 12:57:10.218447 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1122 12:57:10.228724 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1123 12:57:10.238284 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1124 12:57:10.247802 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1125 12:57:10.257702 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1126 12:57:10.264404 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1127 12:57:10.274249 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1128 12:57:10.283950 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1129 12:57:10.293511 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1130 12:57:10.303379 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1131 12:57:10.313139 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1132 12:57:10.322818 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1133 12:57:10.332730 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1134 12:57:10.333225 PCI: 00:02.0
1135 12:57:10.342198 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1136 12:57:10.352218 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1137 12:57:10.362094 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1138 12:57:10.362572 PCI: 00:04.0
1139 12:57:10.365066 PCI: 00:08.0
1140 12:57:10.374796 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 12:57:10.378609 PCI: 00:12.0
1142 12:57:10.388313 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1143 12:57:10.391363 PCI: 00:14.0 child on link 0 USB0 port 0
1144 12:57:10.401375 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 12:57:10.404360 USB0 port 0 child on link 0 USB2 port 0
1146 12:57:10.407475 USB2 port 0
1147 12:57:10.407954 USB2 port 1
1148 12:57:10.411125 USB2 port 2
1149 12:57:10.414113 USB2 port 3
1150 12:57:10.414604 USB2 port 5
1151 12:57:10.417221 USB2 port 6
1152 12:57:10.417674 USB2 port 9
1153 12:57:10.420557 USB3 port 0
1154 12:57:10.421018 USB3 port 1
1155 12:57:10.424042 USB3 port 2
1156 12:57:10.424517 USB3 port 3
1157 12:57:10.427066 USB3 port 4
1158 12:57:10.427561 PCI: 00:14.2
1159 12:57:10.436993 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1160 12:57:10.446489 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1161 12:57:10.450188 PCI: 00:14.3
1162 12:57:10.459427 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 12:57:10.463113 PCI: 00:15.0 child on link 0 I2C: 01:15
1164 12:57:10.473003 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:57:10.475785 I2C: 01:15
1166 12:57:10.479306 PCI: 00:15.1 child on link 0 I2C: 02:5d
1167 12:57:10.489250 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 12:57:10.492363 I2C: 02:5d
1169 12:57:10.492825 GENERIC: 0.0
1170 12:57:10.495335 PCI: 00:16.0
1171 12:57:10.505955 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:57:10.506720 PCI: 00:17.0
1173 12:57:10.515295 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1174 12:57:10.524984 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1175 12:57:10.531815 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1176 12:57:10.541133 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1177 12:57:10.547633 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1178 12:57:10.557498 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1179 12:57:10.561078 PCI: 00:19.0 child on link 0 I2C: 03:1a
1180 12:57:10.570565 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:57:10.573729 I2C: 03:1a
1182 12:57:10.574274 I2C: 03:38
1183 12:57:10.577457 I2C: 03:39
1184 12:57:10.577989 I2C: 03:3a
1185 12:57:10.580323 I2C: 03:3b
1186 12:57:10.583983 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1187 12:57:10.593757 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1188 12:57:10.603123 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1189 12:57:10.613217 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1190 12:57:10.613310 PCI: 01:00.0
1191 12:57:10.622415 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 12:57:10.626097 PCI: 00:1e.0
1193 12:57:10.635495 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1194 12:57:10.646094 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1195 12:57:10.649226 PCI: 00:1e.2 child on link 0 SPI: 00
1196 12:57:10.659217 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:57:10.662205 SPI: 00
1198 12:57:10.665243 PCI: 00:1e.3 child on link 0 SPI: 01
1199 12:57:10.675563 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 12:57:10.676025 SPI: 01
1201 12:57:10.681741 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1202 12:57:10.688271 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:57:10.698420 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1204 12:57:10.701500 PNP: 0c09.0
1205 12:57:10.708099 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 12:57:10.710996 PCI: 00:1f.3
1207 12:57:10.721008 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 12:57:10.731097 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1209 12:57:10.734227 PCI: 00:1f.4
1210 12:57:10.740898 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1211 12:57:10.750038 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1212 12:57:10.753695 PCI: 00:1f.5
1213 12:57:10.763090 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1214 12:57:10.769803 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1215 12:57:10.776350 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1216 12:57:10.783145 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1217 12:57:10.786256 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1218 12:57:10.789377 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1219 12:57:10.793108 PCI: 00:17.0 18 * [0x60 - 0x67] io
1220 12:57:10.795946 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1221 12:57:10.802634 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1222 12:57:10.809365 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1223 12:57:10.818597 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1224 12:57:10.825223 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1225 12:57:10.832132 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1226 12:57:10.835431 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1227 12:57:10.845031 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1228 12:57:10.847689 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1229 12:57:10.854464 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1230 12:57:10.857648 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1231 12:57:10.864551 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1232 12:57:10.867532 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1233 12:57:10.874274 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1234 12:57:10.877199 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1235 12:57:10.883988 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1236 12:57:10.886988 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1237 12:57:10.893771 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1238 12:57:10.896917 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1239 12:57:10.903292 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1240 12:57:10.906892 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1241 12:57:10.913250 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1242 12:57:10.917139 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1243 12:57:10.923571 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1244 12:57:10.926407 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1245 12:57:10.933153 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1246 12:57:10.936440 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1247 12:57:10.942865 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1248 12:57:10.946088 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1249 12:57:10.953046 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1250 12:57:10.956069 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1251 12:57:10.965805 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1252 12:57:10.969727 avoid_fixed_resources: DOMAIN: 0000
1253 12:57:10.975430 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1254 12:57:10.978472 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1255 12:57:10.988595 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1256 12:57:10.995245 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1257 12:57:11.001800 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1258 12:57:11.011174 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1259 12:57:11.017734 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1260 12:57:11.024674 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 12:57:11.034655 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1262 12:57:11.040707 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1263 12:57:11.047433 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1264 12:57:11.057334 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1265 12:57:11.057877 Setting resources...
1266 12:57:11.063502 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1267 12:57:11.067207 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1268 12:57:11.073576 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1269 12:57:11.076494 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1270 12:57:11.080234 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1271 12:57:11.087105 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1272 12:57:11.092979 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1273 12:57:11.099920 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1274 12:57:11.106434 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1275 12:57:11.112992 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1276 12:57:11.115967 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1277 12:57:11.122573 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1278 12:57:11.125619 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1279 12:57:11.132408 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1280 12:57:11.135495 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1281 12:57:11.141814 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1282 12:57:11.145454 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1283 12:57:11.151565 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1284 12:57:11.155021 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1285 12:57:11.161983 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1286 12:57:11.164943 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1287 12:57:11.171075 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1288 12:57:11.174968 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1289 12:57:11.180967 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1290 12:57:11.184561 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1291 12:57:11.190947 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1292 12:57:11.194348 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1293 12:57:11.200587 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1294 12:57:11.204354 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1295 12:57:11.210358 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1296 12:57:11.213533 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1297 12:57:11.220238 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1298 12:57:11.226585 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1299 12:57:11.233443 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1300 12:57:11.240130 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1301 12:57:11.249640 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1302 12:57:11.253039 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1303 12:57:11.259508 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1304 12:57:11.265631 Root Device assign_resources, bus 0 link: 0
1305 12:57:11.269519 DOMAIN: 0000 assign_resources, bus 0 link: 0
1306 12:57:11.279307 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1307 12:57:11.285375 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1308 12:57:11.295530 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1309 12:57:11.301954 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1310 12:57:11.311620 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1311 12:57:11.318273 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1312 12:57:11.324920 PCI: 00:14.0 assign_resources, bus 0 link: 0
1313 12:57:11.327647 PCI: 00:14.0 assign_resources, bus 0 link: 0
1314 12:57:11.337978 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1315 12:57:11.344027 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1316 12:57:11.354313 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1317 12:57:11.360958 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1318 12:57:11.367109 PCI: 00:15.0 assign_resources, bus 1 link: 0
1319 12:57:11.370306 PCI: 00:15.0 assign_resources, bus 1 link: 0
1320 12:57:11.380179 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1321 12:57:11.383206 PCI: 00:15.1 assign_resources, bus 2 link: 0
1322 12:57:11.386801 PCI: 00:15.1 assign_resources, bus 2 link: 0
1323 12:57:11.397037 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1324 12:57:11.403670 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1325 12:57:11.413276 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1326 12:57:11.419955 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1327 12:57:11.426190 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1328 12:57:11.435786 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1329 12:57:11.442428 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1330 12:57:11.452298 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1331 12:57:11.455778 PCI: 00:19.0 assign_resources, bus 3 link: 0
1332 12:57:11.462282 PCI: 00:19.0 assign_resources, bus 3 link: 0
1333 12:57:11.468654 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1334 12:57:11.478166 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1335 12:57:11.487959 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1336 12:57:11.490939 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1337 12:57:11.497626 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1338 12:57:11.504317 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1339 12:57:11.510769 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1340 12:57:11.521272 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1341 12:57:11.524203 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1342 12:57:11.530751 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1343 12:57:11.537462 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1344 12:57:11.544321 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1345 12:57:11.547360 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1346 12:57:11.554198 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1347 12:57:11.557076 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1348 12:57:11.563815 LPC: Trying to open IO window from 800 size 1ff
1349 12:57:11.569948 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1350 12:57:11.580297 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1351 12:57:11.586425 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1352 12:57:11.596345 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1353 12:57:11.599833 DOMAIN: 0000 assign_resources, bus 0 link: 0
1354 12:57:11.605957 Root Device assign_resources, bus 0 link: 0
1355 12:57:11.606444 Done setting resources.
1356 12:57:11.612684 Show resources in subtree (Root Device)...After assigning values.
1357 12:57:11.619117 Root Device child on link 0 CPU_CLUSTER: 0
1358 12:57:11.622910 CPU_CLUSTER: 0 child on link 0 APIC: 00
1359 12:57:11.623397 APIC: 00
1360 12:57:11.625794 APIC: 02
1361 12:57:11.626279 APIC: 01
1362 12:57:11.626715 APIC: 03
1363 12:57:11.629093 APIC: 05
1364 12:57:11.629687 APIC: 07
1365 12:57:11.632063 APIC: 06
1366 12:57:11.632547 APIC: 04
1367 12:57:11.635545 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1368 12:57:11.645468 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1369 12:57:11.658069 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1370 12:57:11.658513 PCI: 00:00.0
1371 12:57:11.668114 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1372 12:57:11.677861 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1373 12:57:11.687727 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1374 12:57:11.697532 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1375 12:57:11.706956 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1376 12:57:11.716713 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1377 12:57:11.723177 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1378 12:57:11.732709 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1379 12:57:11.742637 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1380 12:57:11.752582 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1381 12:57:11.762373 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1382 12:57:11.772182 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1383 12:57:11.781216 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1384 12:57:11.791039 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1385 12:57:11.800897 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1386 12:57:11.807605 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1387 12:57:11.811135 PCI: 00:02.0
1388 12:57:11.820663 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1389 12:57:11.830799 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1390 12:57:11.840194 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1391 12:57:11.843721 PCI: 00:04.0
1392 12:57:11.843811 PCI: 00:08.0
1393 12:57:11.853279 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1394 12:57:11.856756 PCI: 00:12.0
1395 12:57:11.866467 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1396 12:57:11.869495 PCI: 00:14.0 child on link 0 USB0 port 0
1397 12:57:11.882482 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1398 12:57:11.886227 USB0 port 0 child on link 0 USB2 port 0
1399 12:57:11.886317 USB2 port 0
1400 12:57:11.889224 USB2 port 1
1401 12:57:11.889313 USB2 port 2
1402 12:57:11.892324 USB2 port 3
1403 12:57:11.896046 USB2 port 5
1404 12:57:11.896139 USB2 port 6
1405 12:57:11.899322 USB2 port 9
1406 12:57:11.899412 USB3 port 0
1407 12:57:11.902170 USB3 port 1
1408 12:57:11.902250 USB3 port 2
1409 12:57:11.905447 USB3 port 3
1410 12:57:11.905537 USB3 port 4
1411 12:57:11.908978 PCI: 00:14.2
1412 12:57:11.918887 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1413 12:57:11.928621 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1414 12:57:11.931670 PCI: 00:14.3
1415 12:57:11.941936 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1416 12:57:11.945022 PCI: 00:15.0 child on link 0 I2C: 01:15
1417 12:57:11.954714 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1418 12:57:11.957632 I2C: 01:15
1419 12:57:11.961366 PCI: 00:15.1 child on link 0 I2C: 02:5d
1420 12:57:11.971119 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1421 12:57:11.973988 I2C: 02:5d
1422 12:57:11.974303 GENERIC: 0.0
1423 12:57:11.977705 PCI: 00:16.0
1424 12:57:11.987170 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1425 12:57:11.987690 PCI: 00:17.0
1426 12:57:12.000758 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1427 12:57:12.009994 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1428 12:57:12.016853 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1429 12:57:12.026793 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1430 12:57:12.036447 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1431 12:57:12.046486 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1432 12:57:12.049520 PCI: 00:19.0 child on link 0 I2C: 03:1a
1433 12:57:12.062796 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1434 12:57:12.063297 I2C: 03:1a
1435 12:57:12.066377 I2C: 03:38
1436 12:57:12.066934 I2C: 03:39
1437 12:57:12.069101 I2C: 03:3a
1438 12:57:12.069594 I2C: 03:3b
1439 12:57:12.072821 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1440 12:57:12.082646 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1441 12:57:12.092384 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1442 12:57:12.101682 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1443 12:57:12.105404 PCI: 01:00.0
1444 12:57:12.115257 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1445 12:57:12.118253 PCI: 00:1e.0
1446 12:57:12.127949 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1447 12:57:12.137608 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1448 12:57:12.144212 PCI: 00:1e.2 child on link 0 SPI: 00
1449 12:57:12.154318 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1450 12:57:12.154860 SPI: 00
1451 12:57:12.157299 PCI: 00:1e.3 child on link 0 SPI: 01
1452 12:57:12.167049 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1453 12:57:12.170648 SPI: 01
1454 12:57:12.173503 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1455 12:57:12.183342 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1456 12:57:12.193018 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1457 12:57:12.193481 PNP: 0c09.0
1458 12:57:12.203306 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1459 12:57:12.203822 PCI: 00:1f.3
1460 12:57:12.212475 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1461 12:57:12.225904 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1462 12:57:12.226391 PCI: 00:1f.4
1463 12:57:12.235428 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1464 12:57:12.245162 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1465 12:57:12.248609 PCI: 00:1f.5
1466 12:57:12.258250 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1467 12:57:12.261981 Done allocating resources.
1468 12:57:12.265106 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1469 12:57:12.268342 Enabling resources...
1470 12:57:12.271357 PCI: 00:00.0 subsystem <- 8086/9b61
1471 12:57:12.275047 PCI: 00:00.0 cmd <- 06
1472 12:57:12.277871 PCI: 00:02.0 subsystem <- 8086/9b41
1473 12:57:12.281435 PCI: 00:02.0 cmd <- 03
1474 12:57:12.284556 PCI: 00:08.0 cmd <- 06
1475 12:57:12.287957 PCI: 00:12.0 subsystem <- 8086/02f9
1476 12:57:12.291076 PCI: 00:12.0 cmd <- 02
1477 12:57:12.294674 PCI: 00:14.0 subsystem <- 8086/02ed
1478 12:57:12.297704 PCI: 00:14.0 cmd <- 02
1479 12:57:12.300636 PCI: 00:14.2 cmd <- 02
1480 12:57:12.304089 PCI: 00:14.3 subsystem <- 8086/02f0
1481 12:57:12.304548 PCI: 00:14.3 cmd <- 02
1482 12:57:12.310793 PCI: 00:15.0 subsystem <- 8086/02e8
1483 12:57:12.311252 PCI: 00:15.0 cmd <- 02
1484 12:57:12.317685 PCI: 00:15.1 subsystem <- 8086/02e9
1485 12:57:12.318194 PCI: 00:15.1 cmd <- 02
1486 12:57:12.320950 PCI: 00:16.0 subsystem <- 8086/02e0
1487 12:57:12.324491 PCI: 00:16.0 cmd <- 02
1488 12:57:12.327509 PCI: 00:17.0 subsystem <- 8086/02d3
1489 12:57:12.330508 PCI: 00:17.0 cmd <- 03
1490 12:57:12.334079 PCI: 00:19.0 subsystem <- 8086/02c5
1491 12:57:12.336981 PCI: 00:19.0 cmd <- 02
1492 12:57:12.340657 PCI: 00:1d.0 bridge ctrl <- 0013
1493 12:57:12.343836 PCI: 00:1d.0 subsystem <- 8086/02b0
1494 12:57:12.346870 PCI: 00:1d.0 cmd <- 06
1495 12:57:12.350292 PCI: 00:1e.0 subsystem <- 8086/02a8
1496 12:57:12.353210 PCI: 00:1e.0 cmd <- 06
1497 12:57:12.356752 PCI: 00:1e.2 subsystem <- 8086/02aa
1498 12:57:12.359731 PCI: 00:1e.2 cmd <- 06
1499 12:57:12.362718 PCI: 00:1e.3 subsystem <- 8086/02ab
1500 12:57:12.366411 PCI: 00:1e.3 cmd <- 02
1501 12:57:12.369619 PCI: 00:1f.0 subsystem <- 8086/0284
1502 12:57:12.372418 PCI: 00:1f.0 cmd <- 407
1503 12:57:12.376262 PCI: 00:1f.3 subsystem <- 8086/02c8
1504 12:57:12.379132 PCI: 00:1f.3 cmd <- 02
1505 12:57:12.382805 PCI: 00:1f.4 subsystem <- 8086/02a3
1506 12:57:12.383258 PCI: 00:1f.4 cmd <- 03
1507 12:57:12.389256 PCI: 00:1f.5 subsystem <- 8086/02a4
1508 12:57:12.389781 PCI: 00:1f.5 cmd <- 406
1509 12:57:12.399702 PCI: 01:00.0 cmd <- 02
1510 12:57:12.404416 done.
1511 12:57:12.417205 ME: Version: 14.0.39.1367
1512 12:57:12.423885 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1513 12:57:12.426895 Initializing devices...
1514 12:57:12.427392 Root Device init ...
1515 12:57:12.433792 Chrome EC: Set SMI mask to 0x0000000000000000
1516 12:57:12.439752 Chrome EC: clear events_b mask to 0x0000000000000000
1517 12:57:12.443118 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1518 12:57:12.449837 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1519 12:57:12.456708 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1520 12:57:12.459468 Chrome EC: Set WAKE mask to 0x0000000000000000
1521 12:57:12.465792 Root Device init finished in 35157 usecs
1522 12:57:12.469542 CPU_CLUSTER: 0 init ...
1523 12:57:12.472473 CPU_CLUSTER: 0 init finished in 2447 usecs
1524 12:57:12.477954 PCI: 00:00.0 init ...
1525 12:57:12.481018 CPU TDP: 15 Watts
1526 12:57:12.484843 CPU PL2 = 64 Watts
1527 12:57:12.487805 PCI: 00:00.0 init finished in 7080 usecs
1528 12:57:12.491166 PCI: 00:02.0 init ...
1529 12:57:12.494029 PCI: 00:02.0 init finished in 2254 usecs
1530 12:57:12.497348 PCI: 00:08.0 init ...
1531 12:57:12.501033 PCI: 00:08.0 init finished in 2252 usecs
1532 12:57:12.503772 PCI: 00:12.0 init ...
1533 12:57:12.506955 PCI: 00:12.0 init finished in 2253 usecs
1534 12:57:12.510455 PCI: 00:14.0 init ...
1535 12:57:12.514081 PCI: 00:14.0 init finished in 2253 usecs
1536 12:57:12.516955 PCI: 00:14.2 init ...
1537 12:57:12.520039 PCI: 00:14.2 init finished in 2251 usecs
1538 12:57:12.523809 PCI: 00:14.3 init ...
1539 12:57:12.526795 PCI: 00:14.3 init finished in 2260 usecs
1540 12:57:12.530306 PCI: 00:15.0 init ...
1541 12:57:12.533372 DW I2C bus 0 at 0xd121f000 (400 KHz)
1542 12:57:12.540022 PCI: 00:15.0 init finished in 5967 usecs
1543 12:57:12.540553 PCI: 00:15.1 init ...
1544 12:57:12.546067 DW I2C bus 1 at 0xd1220000 (400 KHz)
1545 12:57:12.549588 PCI: 00:15.1 init finished in 5968 usecs
1546 12:57:12.553194 PCI: 00:16.0 init ...
1547 12:57:12.556382 PCI: 00:16.0 init finished in 2252 usecs
1548 12:57:12.559418 PCI: 00:19.0 init ...
1549 12:57:12.562423 DW I2C bus 4 at 0xd1222000 (400 KHz)
1550 12:57:12.566039 PCI: 00:19.0 init finished in 5977 usecs
1551 12:57:12.569499 PCI: 00:1d.0 init ...
1552 12:57:12.572812 Initializing PCH PCIe bridge.
1553 12:57:12.575660 PCI: 00:1d.0 init finished in 5284 usecs
1554 12:57:12.579844 PCI: 00:1f.0 init ...
1555 12:57:12.583034 IOAPIC: Initializing IOAPIC at 0xfec00000
1556 12:57:12.589851 IOAPIC: Bootstrap Processor Local APIC = 0x00
1557 12:57:12.590370 IOAPIC: ID = 0x02
1558 12:57:12.592906 IOAPIC: Dumping registers
1559 12:57:12.596247 reg 0x0000: 0x02000000
1560 12:57:12.599079 reg 0x0001: 0x00770020
1561 12:57:12.602683 reg 0x0002: 0x00000000
1562 12:57:12.605855 PCI: 00:1f.0 init finished in 23528 usecs
1563 12:57:12.608705 PCI: 00:1f.4 init ...
1564 12:57:12.612555 PCI: 00:1f.4 init finished in 2262 usecs
1565 12:57:12.623904 PCI: 01:00.0 init ...
1566 12:57:12.626983 PCI: 01:00.0 init finished in 2252 usecs
1567 12:57:12.631223 PNP: 0c09.0 init ...
1568 12:57:12.634912 Google Chrome EC uptime: 11.049 seconds
1569 12:57:12.641770 Google Chrome AP resets since EC boot: 0
1570 12:57:12.644730 Google Chrome most recent AP reset causes:
1571 12:57:12.650931 Google Chrome EC reset flags at last EC boot: reset-pin
1572 12:57:12.654407 PNP: 0c09.0 init finished in 20571 usecs
1573 12:57:12.658086 Devices initialized
1574 12:57:12.661052 Show all devs... After init.
1575 12:57:12.661548 Root Device: enabled 1
1576 12:57:12.663997 CPU_CLUSTER: 0: enabled 1
1577 12:57:12.667595 DOMAIN: 0000: enabled 1
1578 12:57:12.670644 APIC: 00: enabled 1
1579 12:57:12.671147 PCI: 00:00.0: enabled 1
1580 12:57:12.673952 PCI: 00:02.0: enabled 1
1581 12:57:12.676950 PCI: 00:04.0: enabled 0
1582 12:57:12.677509 PCI: 00:05.0: enabled 0
1583 12:57:12.680811 PCI: 00:12.0: enabled 1
1584 12:57:12.683713 PCI: 00:12.5: enabled 0
1585 12:57:12.686696 PCI: 00:12.6: enabled 0
1586 12:57:12.687147 PCI: 00:14.0: enabled 1
1587 12:57:12.690274 PCI: 00:14.1: enabled 0
1588 12:57:12.693389 PCI: 00:14.3: enabled 1
1589 12:57:12.696595 PCI: 00:14.5: enabled 0
1590 12:57:12.697066 PCI: 00:15.0: enabled 1
1591 12:57:12.700272 PCI: 00:15.1: enabled 1
1592 12:57:12.703174 PCI: 00:15.2: enabled 0
1593 12:57:12.706314 PCI: 00:15.3: enabled 0
1594 12:57:12.706806 PCI: 00:16.0: enabled 1
1595 12:57:12.709429 PCI: 00:16.1: enabled 0
1596 12:57:12.713200 PCI: 00:16.2: enabled 0
1597 12:57:12.716063 PCI: 00:16.3: enabled 0
1598 12:57:12.716626 PCI: 00:16.4: enabled 0
1599 12:57:12.719008 PCI: 00:16.5: enabled 0
1600 12:57:12.722638 PCI: 00:17.0: enabled 1
1601 12:57:12.725753 PCI: 00:19.0: enabled 1
1602 12:57:12.726208 PCI: 00:19.1: enabled 0
1603 12:57:12.728957 PCI: 00:19.2: enabled 0
1604 12:57:12.732587 PCI: 00:1a.0: enabled 0
1605 12:57:12.735651 PCI: 00:1c.0: enabled 0
1606 12:57:12.736131 PCI: 00:1c.1: enabled 0
1607 12:57:12.738718 PCI: 00:1c.2: enabled 0
1608 12:57:12.742601 PCI: 00:1c.3: enabled 0
1609 12:57:12.745562 PCI: 00:1c.4: enabled 0
1610 12:57:12.746098 PCI: 00:1c.5: enabled 0
1611 12:57:12.748681 PCI: 00:1c.6: enabled 0
1612 12:57:12.752171 PCI: 00:1c.7: enabled 0
1613 12:57:12.755410 PCI: 00:1d.0: enabled 1
1614 12:57:12.755862 PCI: 00:1d.1: enabled 0
1615 12:57:12.758421 PCI: 00:1d.2: enabled 0
1616 12:57:12.761790 PCI: 00:1d.3: enabled 0
1617 12:57:12.765281 PCI: 00:1d.4: enabled 0
1618 12:57:12.765732 PCI: 00:1d.5: enabled 0
1619 12:57:12.768257 PCI: 00:1e.0: enabled 1
1620 12:57:12.771399 PCI: 00:1e.1: enabled 0
1621 12:57:12.774965 PCI: 00:1e.2: enabled 1
1622 12:57:12.775412 PCI: 00:1e.3: enabled 1
1623 12:57:12.778330 PCI: 00:1f.0: enabled 1
1624 12:57:12.781295 PCI: 00:1f.1: enabled 0
1625 12:57:12.784345 PCI: 00:1f.2: enabled 0
1626 12:57:12.784811 PCI: 00:1f.3: enabled 1
1627 12:57:12.788254 PCI: 00:1f.4: enabled 1
1628 12:57:12.791346 PCI: 00:1f.5: enabled 1
1629 12:57:12.794260 PCI: 00:1f.6: enabled 0
1630 12:57:12.794764 USB0 port 0: enabled 1
1631 12:57:12.797351 I2C: 01:15: enabled 1
1632 12:57:12.800892 I2C: 02:5d: enabled 1
1633 12:57:12.801339 GENERIC: 0.0: enabled 1
1634 12:57:12.804144 I2C: 03:1a: enabled 1
1635 12:57:12.807589 I2C: 03:38: enabled 1
1636 12:57:12.810455 I2C: 03:39: enabled 1
1637 12:57:12.811000 I2C: 03:3a: enabled 1
1638 12:57:12.813916 I2C: 03:3b: enabled 1
1639 12:57:12.816838 PCI: 00:00.0: enabled 1
1640 12:57:12.816927 SPI: 00: enabled 1
1641 12:57:12.820290 SPI: 01: enabled 1
1642 12:57:12.823564 PNP: 0c09.0: enabled 1
1643 12:57:12.823652 USB2 port 0: enabled 1
1644 12:57:12.827185 USB2 port 1: enabled 1
1645 12:57:12.830237 USB2 port 2: enabled 0
1646 12:57:12.830786 USB2 port 3: enabled 0
1647 12:57:12.833268 USB2 port 5: enabled 0
1648 12:57:12.836898 USB2 port 6: enabled 1
1649 12:57:12.840030 USB2 port 9: enabled 1
1650 12:57:12.840485 USB3 port 0: enabled 1
1651 12:57:12.843032 USB3 port 1: enabled 1
1652 12:57:12.846500 USB3 port 2: enabled 1
1653 12:57:12.847000 USB3 port 3: enabled 1
1654 12:57:12.849774 USB3 port 4: enabled 0
1655 12:57:12.852768 APIC: 02: enabled 1
1656 12:57:12.853221 APIC: 01: enabled 1
1657 12:57:12.856443 APIC: 03: enabled 1
1658 12:57:12.859488 APIC: 05: enabled 1
1659 12:57:12.860065 APIC: 07: enabled 1
1660 12:57:12.862471 APIC: 06: enabled 1
1661 12:57:12.866208 APIC: 04: enabled 1
1662 12:57:12.866696 PCI: 00:08.0: enabled 1
1663 12:57:12.869438 PCI: 00:14.2: enabled 1
1664 12:57:12.872657 PCI: 01:00.0: enabled 1
1665 12:57:12.875809 Disabling ACPI via APMC:
1666 12:57:12.879286 done.
1667 12:57:12.882787 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1668 12:57:12.885676 ELOG: NV offset 0xaf0000 size 0x4000
1669 12:57:12.892819 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1670 12:57:12.899485 ELOG: Event(17) added with size 13 at 2023-03-22 12:57:12 UTC
1671 12:57:12.906228 POST: Unexpected post code in previous boot: 0x75
1672 12:57:12.912896 ELOG: Event(A3) added with size 11 at 2023-03-22 12:57:12 UTC
1673 12:57:12.919252 ELOG: Event(92) added with size 9 at 2023-03-22 12:57:12 UTC
1674 12:57:12.925398 ELOG: Event(93) added with size 9 at 2023-03-22 12:57:12 UTC
1675 12:57:12.931970 ELOG: Event(9A) added with size 9 at 2023-03-22 12:57:12 UTC
1676 12:57:12.938774 ELOG: Event(9E) added with size 10 at 2023-03-22 12:57:12 UTC
1677 12:57:12.941730 ELOG: Event(9F) added with size 14 at 2023-03-22 12:57:12 UTC
1678 12:57:12.948574 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1679 12:57:12.955286 ELOG: Event(A1) added with size 10 at 2023-03-22 12:57:12 UTC
1680 12:57:12.965070 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1681 12:57:12.968213 ELOG: Event(A0) added with size 9 at 2023-03-22 12:57:12 UTC
1682 12:57:12.974493 elog_add_boot_reason: Logged dev mode boot
1683 12:57:12.975171 Finalize devices...
1684 12:57:12.978105 PCI: 00:17.0 final
1685 12:57:12.981019 Devices finalized
1686 12:57:12.984638 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1687 12:57:12.990999 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1688 12:57:12.994113 ME: HFSTS1 : 0x90000245
1689 12:57:12.997648 ME: HFSTS2 : 0x3B850126
1690 12:57:13.003829 ME: HFSTS3 : 0x00000020
1691 12:57:13.007607 ME: HFSTS4 : 0x00004800
1692 12:57:13.010578 ME: HFSTS5 : 0x00000000
1693 12:57:13.013627 ME: HFSTS6 : 0x40400006
1694 12:57:13.016745 ME: Manufacturing Mode : NO
1695 12:57:13.020148 ME: FW Partition Table : OK
1696 12:57:13.023710 ME: Bringup Loader Failure : NO
1697 12:57:13.026734 ME: Firmware Init Complete : YES
1698 12:57:13.029827 ME: Boot Options Present : NO
1699 12:57:13.033463 ME: Update In Progress : NO
1700 12:57:13.040021 ME: D0i3 Support : YES
1701 12:57:13.043114 ME: Low Power State Enabled : NO
1702 12:57:13.046263 ME: CPU Replaced : NO
1703 12:57:13.049774 ME: CPU Replacement Valid : YES
1704 12:57:13.052949 ME: Current Working State : 5
1705 12:57:13.056023 ME: Current Operation State : 1
1706 12:57:13.059691 ME: Current Operation Mode : 0
1707 12:57:13.062642 ME: Error Code : 0
1708 12:57:13.065919 ME: CPU Debug Disabled : YES
1709 12:57:13.069515 ME: TXT Support : NO
1710 12:57:13.072641 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1711 12:57:13.079050 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 12:57:13.082510 CBFS @ c08000 size 3f8000
1713 12:57:13.085476 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 12:57:13.092148 CBFS: Locating 'fallback/dsdt.aml'
1715 12:57:13.095254 CBFS: Found @ offset 10bb80 size 3fa5
1716 12:57:13.098596 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1717 12:57:13.101551 CBFS @ c08000 size 3f8000
1718 12:57:13.108300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1719 12:57:13.111313 CBFS: Locating 'fallback/slic'
1720 12:57:13.118725 CBFS: 'fallback/slic' not found.
1721 12:57:13.121567 ACPI: Writing ACPI tables at 99b3e000.
1722 12:57:13.122007 ACPI: * FACS
1723 12:57:13.124887 ACPI: * DSDT
1724 12:57:13.127890 Ramoops buffer: 0x100000@0x99a3d000.
1725 12:57:13.131533 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1726 12:57:13.137598 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1727 12:57:13.141260 Google Chrome EC: version:
1728 12:57:13.144199 ro: helios_v2.0.2659-56403530b
1729 12:57:13.147856 rw: helios_v2.0.2849-c41de27e7d
1730 12:57:13.148300 running image: 1
1731 12:57:13.152228 ACPI: * FADT
1732 12:57:13.152719 SCI is IRQ9
1733 12:57:13.158836 ACPI: added table 1/32, length now 40
1734 12:57:13.159326 ACPI: * SSDT
1735 12:57:13.162701 Found 1 CPU(s) with 8 core(s) each.
1736 12:57:13.168597 Error: Could not locate 'wifi_sar' in VPD.
1737 12:57:13.171708 Checking CBFS for default SAR values
1738 12:57:13.175373 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1739 12:57:13.178303 CBFS @ c08000 size 3f8000
1740 12:57:13.184988 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1741 12:57:13.188460 CBFS: Locating 'wifi_sar_defaults.hex'
1742 12:57:13.191579 CBFS: Found @ offset 5fac0 size 77
1743 12:57:13.194490 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1744 12:57:13.201213 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1745 12:57:13.204580 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1746 12:57:13.211256 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1747 12:57:13.214352 failed to find key in VPD: dsm_calib_r0_0
1748 12:57:13.223990 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1749 12:57:13.230651 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1750 12:57:13.233667 failed to find key in VPD: dsm_calib_r0_1
1751 12:57:13.243544 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1752 12:57:13.246992 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1753 12:57:13.249732 failed to find key in VPD: dsm_calib_r0_2
1754 12:57:13.260104 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1755 12:57:13.266390 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1756 12:57:13.269487 failed to find key in VPD: dsm_calib_r0_3
1757 12:57:13.279370 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1758 12:57:13.282420 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1759 12:57:13.289083 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1760 12:57:13.292691 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1761 12:57:13.296252 EC returned error result code 1
1762 12:57:13.299181 EC returned error result code 1
1763 12:57:13.302833 EC returned error result code 1
1764 12:57:13.309324 PS2K: Bad resp from EC. Vivaldi disabled!
1765 12:57:13.312859 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1766 12:57:13.318611 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1767 12:57:13.325404 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1768 12:57:13.329069 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1769 12:57:13.335214 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1770 12:57:13.341866 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1771 12:57:13.348522 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1772 12:57:13.355070 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1773 12:57:13.357938 ACPI: added table 2/32, length now 44
1774 12:57:13.358378 ACPI: * MCFG
1775 12:57:13.361763 ACPI: added table 3/32, length now 48
1776 12:57:13.364740 ACPI: * TPM2
1777 12:57:13.367819 TPM2 log created at 99a2d000
1778 12:57:13.371693 ACPI: added table 4/32, length now 52
1779 12:57:13.372258 ACPI: * MADT
1780 12:57:13.374889 SCI is IRQ9
1781 12:57:13.377733 ACPI: added table 5/32, length now 56
1782 12:57:13.380921 current = 99b43ac0
1783 12:57:13.381347 ACPI: * DMAR
1784 12:57:13.384557 ACPI: added table 6/32, length now 60
1785 12:57:13.387609 ACPI: * IGD OpRegion
1786 12:57:13.390741 GMA: Found VBT in CBFS
1787 12:57:13.394310 GMA: Found valid VBT in CBFS
1788 12:57:13.397650 ACPI: added table 7/32, length now 64
1789 12:57:13.398207 ACPI: * HPET
1790 12:57:13.400854 ACPI: added table 8/32, length now 68
1791 12:57:13.403910 ACPI: done.
1792 12:57:13.407462 ACPI tables: 31744 bytes.
1793 12:57:13.410637 smbios_write_tables: 99a2c000
1794 12:57:13.413603 EC returned error result code 3
1795 12:57:13.417001 Couldn't obtain OEM name from CBI
1796 12:57:13.419852 Create SMBIOS type 17
1797 12:57:13.423535 PCI: 00:00.0 (Intel Cannonlake)
1798 12:57:13.424051 PCI: 00:14.3 (Intel WiFi)
1799 12:57:13.426770 SMBIOS tables: 939 bytes.
1800 12:57:13.432819 Writing table forward entry at 0x00000500
1801 12:57:13.436385 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1802 12:57:13.443034 Writing coreboot table at 0x99b62000
1803 12:57:13.446131 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1804 12:57:13.452802 1. 0000000000001000-000000000009ffff: RAM
1805 12:57:13.455915 2. 00000000000a0000-00000000000fffff: RESERVED
1806 12:57:13.459524 3. 0000000000100000-0000000099a2bfff: RAM
1807 12:57:13.465890 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1808 12:57:13.472053 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1809 12:57:13.478934 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1810 12:57:13.481985 7. 000000009a000000-000000009f7fffff: RESERVED
1811 12:57:13.488739 8. 00000000e0000000-00000000efffffff: RESERVED
1812 12:57:13.491802 9. 00000000fc000000-00000000fc000fff: RESERVED
1813 12:57:13.494826 10. 00000000fe000000-00000000fe00ffff: RESERVED
1814 12:57:13.501305 11. 00000000fed10000-00000000fed17fff: RESERVED
1815 12:57:13.505045 12. 00000000fed80000-00000000fed83fff: RESERVED
1816 12:57:13.511080 13. 00000000fed90000-00000000fed91fff: RESERVED
1817 12:57:13.514939 14. 00000000feda0000-00000000feda1fff: RESERVED
1818 12:57:13.521325 15. 0000000100000000-000000045e7fffff: RAM
1819 12:57:13.524261 Graphics framebuffer located at 0xc0000000
1820 12:57:13.527790 Passing 5 GPIOs to payload:
1821 12:57:13.530780 NAME | PORT | POLARITY | VALUE
1822 12:57:13.537711 write protect | undefined | high | low
1823 12:57:13.543924 lid | undefined | high | high
1824 12:57:13.547441 power | undefined | high | low
1825 12:57:13.553406 oprom | undefined | high | low
1826 12:57:13.557097 EC in RW | 0x000000cb | high | low
1827 12:57:13.560225 Board ID: 4
1828 12:57:13.563199 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1829 12:57:13.566664 CBFS @ c08000 size 3f8000
1830 12:57:13.573394 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1831 12:57:13.579479 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1832 12:57:13.583089 coreboot table: 1492 bytes.
1833 12:57:13.586128 IMD ROOT 0. 99fff000 00001000
1834 12:57:13.589184 IMD SMALL 1. 99ffe000 00001000
1835 12:57:13.592957 FSP MEMORY 2. 99c4e000 003b0000
1836 12:57:13.595958 CONSOLE 3. 99c2e000 00020000
1837 12:57:13.599616 FMAP 4. 99c2d000 0000054e
1838 12:57:13.602753 TIME STAMP 5. 99c2c000 00000910
1839 12:57:13.605439 VBOOT WORK 6. 99c18000 00014000
1840 12:57:13.608979 MRC DATA 7. 99c16000 00001958
1841 12:57:13.612199 ROMSTG STCK 8. 99c15000 00001000
1842 12:57:13.615855 AFTER CAR 9. 99c0b000 0000a000
1843 12:57:13.618735 RAMSTAGE 10. 99baf000 0005c000
1844 12:57:13.622403 REFCODE 11. 99b7a000 00035000
1845 12:57:13.625269 SMM BACKUP 12. 99b6a000 00010000
1846 12:57:13.628819 COREBOOT 13. 99b62000 00008000
1847 12:57:13.631660 ACPI 14. 99b3e000 00024000
1848 12:57:13.635260 ACPI GNVS 15. 99b3d000 00001000
1849 12:57:13.638379 RAMOOPS 16. 99a3d000 00100000
1850 12:57:13.641940 TPM2 TCGLOG17. 99a2d000 00010000
1851 12:57:13.644873 SMBIOS 18. 99a2c000 00000800
1852 12:57:13.647966 IMD small region:
1853 12:57:13.651522 IMD ROOT 0. 99ffec00 00000400
1854 12:57:13.654772 FSP RUNTIME 1. 99ffebe0 00000004
1855 12:57:13.658304 EC HOSTEVENT 2. 99ffebc0 00000008
1856 12:57:13.661444 POWER STATE 3. 99ffeb80 00000040
1857 12:57:13.664378 ROMSTAGE 4. 99ffeb60 00000004
1858 12:57:13.668050 MEM INFO 5. 99ffe9a0 000001b9
1859 12:57:13.670917 VPD 6. 99ffe920 0000006c
1860 12:57:13.674551 MTRR: Physical address space:
1861 12:57:13.680673 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1862 12:57:13.687493 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1863 12:57:13.694216 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1864 12:57:13.700857 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1865 12:57:13.706965 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1866 12:57:13.713459 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1867 12:57:13.720101 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1868 12:57:13.723689 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 12:57:13.726679 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 12:57:13.730213 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 12:57:13.736604 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 12:57:13.739667 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 12:57:13.743316 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 12:57:13.746397 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 12:57:13.752812 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 12:57:13.756124 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 12:57:13.759088 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 12:57:13.762587 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 12:57:13.766334 call enable_fixed_mtrr()
1880 12:57:13.769418 CPU physical address size: 39 bits
1881 12:57:13.775947 MTRR: default type WB/UC MTRR counts: 6/8.
1882 12:57:13.779039 MTRR: WB selected as default type.
1883 12:57:13.785129 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1884 12:57:13.792372 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1885 12:57:13.795444 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1886 12:57:13.802244 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1887 12:57:13.809041 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1888 12:57:13.814972 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1889 12:57:13.821811 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 12:57:13.824735 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 12:57:13.828464 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 12:57:13.831341 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 12:57:13.838102 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 12:57:13.840991 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 12:57:13.844374 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 12:57:13.847475 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 12:57:13.854324 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 12:57:13.857597 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 12:57:13.860514 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 12:57:13.867314 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 12:57:13.867938 call enable_fixed_mtrr()
1902 12:57:13.873513 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 12:57:13.876839 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 12:57:13.879848 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 12:57:13.883449 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 12:57:13.889939 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 12:57:13.893143 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 12:57:13.896034 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 12:57:13.899713 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 12:57:13.906051 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 12:57:13.909333 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 12:57:13.912762 CPU physical address size: 39 bits
1913 12:57:13.915953 call enable_fixed_mtrr()
1914 12:57:13.919007 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 12:57:13.922463 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:57:13.928909 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 12:57:13.932410 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 12:57:13.935430 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 12:57:13.938944 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 12:57:13.945429 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 12:57:13.949033 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 12:57:13.952054 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 12:57:13.955264 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 12:57:13.961405 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 12:57:13.965120 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:57:13.968159 call enable_fixed_mtrr()
1927 12:57:13.971625 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 12:57:13.974741 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:57:13.981329 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:57:13.984491 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:57:13.988160 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:57:13.990926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:57:13.997503 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:57:14.001032 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:57:14.004339 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:57:14.007382 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:57:14.013623 CPU physical address size: 39 bits
1938 12:57:14.014076 call enable_fixed_mtrr()
1939 12:57:14.020515 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 12:57:14.021102
1941 12:57:14.021627 MTRR check
1942 12:57:14.023579 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 12:57:14.030091 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 12:57:14.033858 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 12:57:14.036642 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 12:57:14.040280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 12:57:14.046304 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 12:57:14.049761 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 12:57:14.053315 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 12:57:14.056227 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 12:57:14.062965 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 12:57:14.063412 Fixed MTRRs : Enabled
1953 12:57:14.066098 Variable MTRRs: Enabled
1954 12:57:14.066566
1955 12:57:14.069126 call enable_fixed_mtrr()
1956 12:57:14.075706 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1957 12:57:14.079302 CPU physical address size: 39 bits
1958 12:57:14.082284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1959 12:57:14.089266 CPU physical address size: 39 bits
1960 12:57:14.090100 CBFS @ c08000 size 3f8000
1961 12:57:14.095622 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1962 12:57:14.098669 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 12:57:14.105277 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 12:57:14.108174 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 12:57:14.111380 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 12:57:14.115075 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 12:57:14.121414 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 12:57:14.124535 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 12:57:14.127675 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 12:57:14.130951 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 12:57:14.137482 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 12:57:14.140886 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 12:57:14.143923 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 12:57:14.146902 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 12:57:14.153640 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 12:57:14.156729 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 12:57:14.160170 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 12:57:14.163263 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 12:57:14.170055 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 12:57:14.173160 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 12:57:14.176381 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 12:57:14.183180 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 12:57:14.186192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 12:57:14.189232 call enable_fixed_mtrr()
1985 12:57:14.189312 call enable_fixed_mtrr()
1986 12:57:14.192843 CPU physical address size: 39 bits
1987 12:57:14.199474 CPU physical address size: 39 bits
1988 12:57:14.202642 CPU physical address size: 39 bits
1989 12:57:14.205513 CBFS: Locating 'fallback/payload'
1990 12:57:14.209220 CBFS: Found @ offset 1c96c0 size 3f798
1991 12:57:14.215405 Checking segment from ROM address 0xffdd16f8
1992 12:57:14.218635 Checking segment from ROM address 0xffdd1714
1993 12:57:14.222391 Loading segment from ROM address 0xffdd16f8
1994 12:57:14.225218 code (compression=0)
1995 12:57:14.235259 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1996 12:57:14.241672 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1997 12:57:14.244678 it's not compressed!
1998 12:57:14.337173 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1999 12:57:14.343428 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2000 12:57:14.350441 Loading segment from ROM address 0xffdd1714
2001 12:57:14.350788 Entry Point 0x30000000
2002 12:57:14.353454 Loaded segments
2003 12:57:14.359569 Finalizing chipset.
2004 12:57:14.362894 Finalizing SMM.
2005 12:57:14.366221 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2006 12:57:14.369124 mp_park_aps done after 0 msecs.
2007 12:57:14.375850 Jumping to boot code at 30000000(99b62000)
2008 12:57:14.381991 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2009 12:57:14.382446
2010 12:57:14.382868
2011 12:57:14.383209
2012 12:57:14.385580 Starting depthcharge on Helios...
2013 12:57:14.386792 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2014 12:57:14.387379 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2015 12:57:14.387845 Setting prompt string to ['hatch:']
2016 12:57:14.388333 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2017 12:57:14.389230
2018 12:57:14.395072 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2019 12:57:14.395529
2020 12:57:14.401723 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2021 12:57:14.402204
2022 12:57:14.408310 board_setup: Info: eMMC controller not present; skipping
2023 12:57:14.408816
2024 12:57:14.411837 New NVMe Controller 0x30053ac0 @ 00:1d:00
2025 12:57:14.412295
2026 12:57:14.417821 board_setup: Info: SDHCI controller not present; skipping
2027 12:57:14.418270
2028 12:57:14.424726 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2029 12:57:14.425220
2030 12:57:14.425587 Wipe memory regions:
2031 12:57:14.427563
2032 12:57:14.431498 [0x00000000001000, 0x000000000a0000)
2033 12:57:14.431995
2034 12:57:14.434459 [0x00000000100000, 0x00000030000000)
2035 12:57:14.497129
2036 12:57:14.500537 [0x00000030657430, 0x00000099a2c000)
2037 12:57:14.638013
2038 12:57:14.640599 [0x00000100000000, 0x0000045e800000)
2039 12:57:16.023115
2040 12:57:16.023275 R8152: Initializing
2041 12:57:16.023359
2042 12:57:16.026134 Version 9 (ocp_data = 6010)
2043 12:57:16.030335
2044 12:57:16.030419 R8152: Done initializing
2045 12:57:16.030497
2046 12:57:16.034043 Adding net device
2047 12:57:16.638177
2048 12:57:16.638339 R8152: Initializing
2049 12:57:16.638412
2050 12:57:16.641288 Version 6 (ocp_data = 5c30)
2051 12:57:16.641361
2052 12:57:16.645035 R8152: Done initializing
2053 12:57:16.645120
2054 12:57:16.651058 net_add_device: Attemp to include the same device
2055 12:57:16.651149
2056 12:57:16.658044 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2057 12:57:16.658127
2058 12:57:16.658193
2059 12:57:16.658255
2060 12:57:16.658549 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2062 12:57:16.759283 hatch: tftpboot 192.168.201.1 9729802/tftp-deploy-9lnkv022/kernel/bzImage 9729802/tftp-deploy-9lnkv022/kernel/cmdline 9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
2063 12:57:16.759449 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 12:57:16.759548 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2065 12:57:16.763761 tftpboot 192.168.201.1 9729802/tftp-deploy-9lnkv022/kernel/bzImoy-9lnkv022/kernel/cmdline 9729802/tftp-deploy-9lnkv022/ramdisk/ramdisk.cpio.gz
2066 12:57:16.763847
2067 12:57:16.763926 Waiting for link
2068 12:57:16.964728
2069 12:57:16.964875 done.
2070 12:57:16.964952
2071 12:57:16.965017 MAC: 00:24:32:30:7f:7f
2072 12:57:16.965085
2073 12:57:16.967786 Sending DHCP discover... done.
2074 12:57:16.967866
2075 12:57:16.970966 Waiting for reply... done.
2076 12:57:16.971040
2077 12:57:16.974981 Sending DHCP request... done.
2078 12:57:16.975063
2079 12:57:16.981870 Waiting for reply... done.
2080 12:57:16.981957
2081 12:57:16.982030 My ip is 192.168.201.15
2082 12:57:16.982095
2083 12:57:16.988270 The DHCP server ip is 192.168.201.1
2084 12:57:16.988358
2085 12:57:16.991292 TFTP server IP predefined by user: 192.168.201.1
2086 12:57:16.991373
2087 12:57:16.997911 Bootfile predefined by user: 9729802/tftp-deploy-9lnkv022/kernel/bzImage
2088 12:57:16.997995
2089 12:57:17.000876 Sending tftp read request... done.
2090 12:57:17.000960
2091 12:57:17.004539 Waiting for the transfer...
2092 12:57:17.004633
2093 12:57:17.614324 00000000 ################################################################
2094 12:57:17.614975
2095 12:57:18.230152 00080000 ################################################################
2096 12:57:18.230309
2097 12:57:18.900847 00100000 ################################################################
2098 12:57:18.901394
2099 12:57:19.501717 00180000 ################################################################
2100 12:57:19.501873
2101 12:57:20.127786 00200000 ################################################################
2102 12:57:20.128350
2103 12:57:20.787449 00280000 ################################################################
2104 12:57:20.787998
2105 12:57:21.415430 00300000 ################################################################
2106 12:57:21.415589
2107 12:57:22.052944 00380000 ################################################################
2108 12:57:22.053543
2109 12:57:22.689332 00400000 ################################################################
2110 12:57:22.689871
2111 12:57:23.283570 00480000 ################################################################
2112 12:57:23.284147
2113 12:57:23.923988 00500000 ################################################################
2114 12:57:23.924531
2115 12:57:24.561970 00580000 ################################################################
2116 12:57:24.562648
2117 12:57:25.169633 00600000 ################################################################
2118 12:57:25.169788
2119 12:57:25.746641 00680000 ################################################################
2120 12:57:25.746806
2121 12:57:26.322365 00700000 ################################################################
2122 12:57:26.322979
2123 12:57:26.969397 00780000 ################################################################
2124 12:57:26.970015
2125 12:57:27.634582 00800000 ################################################################
2126 12:57:27.634741
2127 12:57:28.252722 00880000 ################################################################
2128 12:57:28.252885
2129 12:57:28.820216 00900000 ################################################################
2130 12:57:28.820354
2131 12:57:29.367262 00980000 ################################################################
2132 12:57:29.367414
2133 12:57:29.926254 00a00000 ################################################################
2134 12:57:29.926904
2135 12:57:30.551645 00a80000 ################################################################
2136 12:57:30.552198
2137 12:57:30.962509 00b00000 ########################################### done.
2138 12:57:30.962706
2139 12:57:30.965807 The bootfile was 11878592 bytes long.
2140 12:57:30.965896
2141 12:57:30.969261 Sending tftp read request... done.
2142 12:57:30.969350
2143 12:57:30.972139 Waiting for the transfer...
2144 12:57:30.972234
2145 12:57:31.570598 00000000 ################################################################
2146 12:57:31.570772
2147 12:57:32.162326 00080000 ################################################################
2148 12:57:32.162934
2149 12:57:32.807749 00100000 ################################################################
2150 12:57:32.808336
2151 12:57:33.441196 00180000 ################################################################
2152 12:57:33.441832
2153 12:57:34.047665 00200000 ################################################################
2154 12:57:34.047807
2155 12:57:34.652396 00280000 ################################################################
2156 12:57:34.652954
2157 12:57:35.292800 00300000 ################################################################
2158 12:57:35.293409
2159 12:57:35.947945 00380000 ################################################################
2160 12:57:35.948116
2161 12:57:36.550415 00400000 ################################################################
2162 12:57:36.550629
2163 12:57:37.173315 00480000 ################################################################
2164 12:57:37.173482
2165 12:57:37.761588 00500000 ################################################################
2166 12:57:37.761734
2167 12:57:38.320118 00580000 ################################################################
2168 12:57:38.320278
2169 12:57:38.907335 00600000 ################################################################
2170 12:57:38.907551
2171 12:57:39.450008 00680000 ################################################################
2172 12:57:39.450163
2173 12:57:39.760338 00700000 ################################ done.
2174 12:57:39.760493
2175 12:57:39.763269 Sending tftp read request... done.
2176 12:57:39.763357
2177 12:57:39.766843 Waiting for the transfer...
2178 12:57:39.766936
2179 12:57:39.767010 00000000 # done.
2180 12:57:39.767080
2181 12:57:39.776840 Command line loaded dynamically from TFTP file: 9729802/tftp-deploy-9lnkv022/kernel/cmdline
2182 12:57:39.776949
2183 12:57:39.802497 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729802/extract-nfsrootfs-hg6q5jgw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2184 12:57:39.802625
2185 12:57:39.808996 ec_init(0): CrosEC protocol v3 supported (256, 256)
2186 12:57:39.814017
2187 12:57:39.817438 Shutting down all USB controllers.
2188 12:57:39.817677
2189 12:57:39.817828 Removing current net device
2190 12:57:39.825277
2191 12:57:39.825369 Finalizing coreboot
2192 12:57:39.825439
2193 12:57:39.832427 Exiting depthcharge with code 4 at timestamp: 32825264
2194 12:57:39.832921
2195 12:57:39.833341
2196 12:57:39.833714 Starting kernel ...
2197 12:57:39.834067
2198 12:57:39.834404
2199 12:57:39.835874 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2200 12:57:39.836505 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2201 12:57:39.836992 Setting prompt string to ['Linux version [0-9]']
2202 12:57:39.837389 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2203 12:57:39.837790 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2205 13:01:56.837438 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2207 13:01:56.838626 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2209 13:01:56.839539 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2212 13:01:56.841031 end: 2 depthcharge-action (duration 00:05:00) [common]
2214 13:01:56.842332 Cleaning after the job
2215 13:01:56.842871 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/ramdisk
2216 13:01:56.845749 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/kernel
2217 13:01:56.849694 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/nfsrootfs
2218 13:01:56.923803 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729802/tftp-deploy-9lnkv022/modules
2219 13:01:56.924469 start: 4.1 power-off (timeout 00:00:30) [common]
2220 13:01:56.924632 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2221 13:01:56.996845 >> Command sent successfully.
2222 13:01:57.007090 Returned 0 in 0 seconds
2223 13:01:57.108796 end: 4.1 power-off (duration 00:00:00) [common]
2225 13:01:57.110431 start: 4.2 read-feedback (timeout 00:10:00) [common]
2226 13:01:57.111673 Listened to connection for namespace 'common' for up to 1s
2228 13:01:57.114020 Listened to connection for namespace 'common' for up to 1s
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2452 13:01:57.846841 Listened to connection for namespace 'common' for up to 1s
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2486 13:01:57.958038 Listened to connection for namespace 'common' for up to 1s
2487 13:01:57.961564 Listened to connection for namespace 'common' for up to 1s
2488 13:01:57.964774 Listened to connection for namespace 'common' for up to 1s
2489 13:01:57.968008 Listened to connection for namespace 'common' for up to 1s
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2492 13:01:57.977387 Listened to connection for namespace 'common' for up to 1s
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2497 13:01:57.993835 Listened to connection for namespace 'common' for up to 1s
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2499 13:01:58.000100 Listened to connection for namespace 'common' for up to 1s
2500 13:01:58.003829 Listened to connection for namespace 'common' for up to 1s
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2502 13:01:58.009844 Listened to connection for namespace 'common' for up to 1s
2503 13:01:58.013280 Listened to connection for namespace 'common' for up to 1s
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2505 13:01:58.019608 Listened to connection for namespace 'common' for up to 1s
2506 13:01:58.023147 Listened to connection for namespace 'common' for up to 1s
2507 13:01:58.026190 Listened to connection for namespace 'common' for up to 1s
2508 13:01:58.029543 Listened to connection for namespace 'common' for up to 1s
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2511 13:01:58.039157 Listened to connection for namespace 'common' for up to 1s
2512 13:01:58.043315 Listened to connection for namespace 'common' for up to 1s
2513 13:01:58.045759 Listened to connection for namespace 'common' for up to 1s
2514 13:01:58.049496 Listened to connection for namespace 'common' for up to 1s
2515 13:01:58.052501 Listened to connection for namespace 'common' for up to 1s
2516 13:01:58.055594 Listened to connection for namespace 'common' for up to 1s
2517 13:01:58.059268 Listened to connection for namespace 'common' for up to 1s
2518 13:01:58.062975 Listened to connection for namespace 'common' for up to 1s
2519 13:01:58.065572 Listened to connection for namespace 'common' for up to 1s
2520 13:01:58.069180 Listened to connection for namespace 'common' for up to 1s
2521 13:01:58.073181 Listened to connection for namespace 'common' for up to 1s
2522 13:01:58.076483 Listened to connection for namespace 'common' for up to 1s
2523 13:01:58.111558 Finalising connection for namespace 'common'
2524 13:01:58.112234 Disconnecting from shell: Finalise
2525 13:01:58.112683