Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:02:35.853801 lava-dispatcher, installed at version: 2023.01
2 07:02:35.854024 start: 0 validate
3 07:02:35.854161 Start time: 2023-03-22 07:02:35.854156+00:00 (UTC)
4 07:02:35.854302 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:02:35.854445 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 07:02:36.140329 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:02:36.140588 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:02:36.430279 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:02:36.430463 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:02:36.720852 validate duration: 0.87
12 07:02:36.721164 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:02:36.721349 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:02:36.721464 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:02:36.721586 Not decompressing ramdisk as can be used compressed.
16 07:02:36.721699 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 07:02:36.721778 saving as /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/ramdisk/rootfs.cpio.gz
18 07:02:36.721847 total size: 8429740 (8MB)
19 07:02:36.722847 progress 0% (0MB)
20 07:02:36.725387 progress 5% (0MB)
21 07:02:36.727714 progress 10% (0MB)
22 07:02:36.730034 progress 15% (1MB)
23 07:02:36.732372 progress 20% (1MB)
24 07:02:36.734762 progress 25% (2MB)
25 07:02:36.737085 progress 30% (2MB)
26 07:02:36.739413 progress 35% (2MB)
27 07:02:36.741549 progress 40% (3MB)
28 07:02:36.743886 progress 45% (3MB)
29 07:02:36.746184 progress 50% (4MB)
30 07:02:36.748462 progress 55% (4MB)
31 07:02:36.750730 progress 60% (4MB)
32 07:02:36.753002 progress 65% (5MB)
33 07:02:36.755272 progress 70% (5MB)
34 07:02:36.757370 progress 75% (6MB)
35 07:02:36.760006 progress 80% (6MB)
36 07:02:36.762310 progress 85% (6MB)
37 07:02:36.764614 progress 90% (7MB)
38 07:02:36.766940 progress 95% (7MB)
39 07:02:36.769235 progress 100% (8MB)
40 07:02:36.769387 8MB downloaded in 0.05s (169.13MB/s)
41 07:02:36.769552 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:02:36.769829 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:02:36.769930 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:02:36.770030 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:02:36.770148 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:02:36.770224 saving as /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/kernel/bzImage
48 07:02:36.770295 total size: 11637120 (11MB)
49 07:02:36.770365 No compression specified
50 07:02:36.771371 progress 0% (0MB)
51 07:02:36.774637 progress 5% (0MB)
52 07:02:36.777820 progress 10% (1MB)
53 07:02:36.781219 progress 15% (1MB)
54 07:02:36.784847 progress 20% (2MB)
55 07:02:36.788067 progress 25% (2MB)
56 07:02:36.791677 progress 30% (3MB)
57 07:02:36.794981 progress 35% (3MB)
58 07:02:36.798190 progress 40% (4MB)
59 07:02:36.801217 progress 45% (5MB)
60 07:02:36.804415 progress 50% (5MB)
61 07:02:36.807606 progress 55% (6MB)
62 07:02:36.810806 progress 60% (6MB)
63 07:02:36.813824 progress 65% (7MB)
64 07:02:36.816991 progress 70% (7MB)
65 07:02:36.820175 progress 75% (8MB)
66 07:02:36.823334 progress 80% (8MB)
67 07:02:36.826307 progress 85% (9MB)
68 07:02:36.829442 progress 90% (10MB)
69 07:02:36.832585 progress 95% (10MB)
70 07:02:36.835801 progress 100% (11MB)
71 07:02:36.835954 11MB downloaded in 0.07s (169.04MB/s)
72 07:02:36.836125 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:02:36.836395 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:02:36.836498 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:02:36.836597 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:02:36.836722 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:02:36.836803 saving as /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/modules/modules.tar
79 07:02:36.836875 total size: 499012 (0MB)
80 07:02:36.836945 Using unxz to decompress xz
81 07:02:36.840399 progress 6% (0MB)
82 07:02:36.840854 progress 13% (0MB)
83 07:02:36.841275 progress 19% (0MB)
84 07:02:36.842874 progress 26% (0MB)
85 07:02:36.845221 progress 32% (0MB)
86 07:02:36.847525 progress 39% (0MB)
87 07:02:36.849766 progress 45% (0MB)
88 07:02:36.852115 progress 52% (0MB)
89 07:02:36.854306 progress 59% (0MB)
90 07:02:36.856789 progress 65% (0MB)
91 07:02:36.859049 progress 72% (0MB)
92 07:02:36.861456 progress 78% (0MB)
93 07:02:36.863771 progress 85% (0MB)
94 07:02:36.866039 progress 91% (0MB)
95 07:02:36.868376 progress 98% (0MB)
96 07:02:36.876696 0MB downloaded in 0.04s (11.95MB/s)
97 07:02:36.877067 end: 1.3.1 http-download (duration 00:00:00) [common]
99 07:02:36.877535 end: 1.3 download-retry (duration 00:00:00) [common]
100 07:02:36.877693 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 07:02:36.877865 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 07:02:36.878020 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 07:02:36.878180 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 07:02:36.878466 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o
105 07:02:36.878640 makedir: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin
106 07:02:36.878798 makedir: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/tests
107 07:02:36.878955 makedir: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/results
108 07:02:36.879153 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-add-keys
109 07:02:36.879392 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-add-sources
110 07:02:36.879603 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-background-process-start
111 07:02:36.879810 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-background-process-stop
112 07:02:36.880015 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-common-functions
113 07:02:36.880220 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-echo-ipv4
114 07:02:36.880432 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-install-packages
115 07:02:36.880640 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-installed-packages
116 07:02:36.880838 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-os-build
117 07:02:36.881040 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-probe-channel
118 07:02:36.881247 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-probe-ip
119 07:02:36.881453 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-target-ip
120 07:02:36.881665 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-target-mac
121 07:02:36.881869 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-target-storage
122 07:02:36.882074 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-case
123 07:02:36.882279 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-event
124 07:02:36.882482 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-feedback
125 07:02:36.882687 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-raise
126 07:02:36.882894 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-reference
127 07:02:36.883104 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-runner
128 07:02:36.883306 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-set
129 07:02:36.883506 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-test-shell
130 07:02:36.883687 Updating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-install-packages (oe)
131 07:02:36.883897 Updating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/bin/lava-installed-packages (oe)
132 07:02:36.884087 Creating /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/environment
133 07:02:36.884244 LAVA metadata
134 07:02:36.884370 - LAVA_JOB_ID=9726630
135 07:02:36.884495 - LAVA_DISPATCHER_IP=192.168.201.1
136 07:02:36.884678 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 07:02:36.884797 skipped lava-vland-overlay
138 07:02:36.884930 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 07:02:36.885087 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 07:02:36.885202 skipped lava-multinode-overlay
141 07:02:36.885334 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 07:02:36.885485 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 07:02:36.885617 Loading test definitions
144 07:02:36.885792 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 07:02:36.885922 Using /lava-9726630 at stage 0
146 07:02:36.886367 uuid=9726630_1.4.2.3.1 testdef=None
147 07:02:36.886539 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 07:02:36.886700 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 07:02:36.887539 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 07:02:36.887951 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 07:02:36.888930 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 07:02:36.889353 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 07:02:36.890283 runner path: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/0/tests/0_dmesg test_uuid 9726630_1.4.2.3.1
156 07:02:36.890524 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 07:02:36.890938 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 07:02:36.891061 Using /lava-9726630 at stage 1
160 07:02:36.891499 uuid=9726630_1.4.2.3.5 testdef=None
161 07:02:36.891653 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 07:02:36.891797 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 07:02:36.892669 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 07:02:36.893069 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 07:02:36.894049 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 07:02:36.894464 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 07:02:36.895413 runner path: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/1/tests/1_bootrr test_uuid 9726630_1.4.2.3.5
170 07:02:36.895641 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 07:02:36.896018 Creating lava-test-runner.conf files
173 07:02:36.896129 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/0 for stage 0
174 07:02:36.896262 - 0_dmesg
175 07:02:36.896391 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726630/lava-overlay-wydnh54o/lava-9726630/1 for stage 1
176 07:02:36.896526 - 1_bootrr
177 07:02:36.896686 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 07:02:36.896835 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 07:02:36.906855 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 07:02:36.907073 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 07:02:36.907237 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 07:02:36.907392 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 07:02:36.907537 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 07:02:37.165567 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 07:02:37.165951 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 07:02:37.166107 extracting modules file /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726630/extract-overlay-ramdisk-u03jw_m0/ramdisk
187 07:02:37.188625 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 07:02:37.188958 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 07:02:37.189166 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726630/compress-overlay-dteql4kc/overlay-1.4.2.4.tar.gz to ramdisk
190 07:02:37.189324 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726630/compress-overlay-dteql4kc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726630/extract-overlay-ramdisk-u03jw_m0/ramdisk
191 07:02:37.198397 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 07:02:37.198706 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 07:02:37.198907 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 07:02:37.199107 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 07:02:37.199281 Building ramdisk /var/lib/lava/dispatcher/tmp/9726630/extract-overlay-ramdisk-u03jw_m0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726630/extract-overlay-ramdisk-u03jw_m0/ramdisk
196 07:02:37.297469 >> 53719 blocks
197 07:02:38.241497 rename /var/lib/lava/dispatcher/tmp/9726630/extract-overlay-ramdisk-u03jw_m0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
198 07:02:38.241961 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 07:02:38.242104 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 07:02:38.242224 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 07:02:38.242336 No mkimage arch provided, not using FIT.
202 07:02:38.242440 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 07:02:38.242540 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 07:02:38.242663 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 07:02:38.242819 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 07:02:38.242941 No LXC device requested
207 07:02:38.243038 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 07:02:38.243159 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 07:02:38.243259 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 07:02:38.243341 Checking files for TFTP limit of 4294967296 bytes.
211 07:02:38.243813 end: 1 tftp-deploy (duration 00:00:02) [common]
212 07:02:38.243938 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 07:02:38.244044 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 07:02:38.244185 substitutions:
215 07:02:38.244265 - {DTB}: None
216 07:02:38.244341 - {INITRD}: 9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
217 07:02:38.244411 - {KERNEL}: 9726630/tftp-deploy-kg4wuhvh/kernel/bzImage
218 07:02:38.244477 - {LAVA_MAC}: None
219 07:02:38.244542 - {PRESEED_CONFIG}: None
220 07:02:38.244606 - {PRESEED_LOCAL}: None
221 07:02:38.244669 - {RAMDISK}: 9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
222 07:02:38.244745 - {ROOT_PART}: None
223 07:02:38.244812 - {ROOT}: None
224 07:02:38.244909 - {SERVER_IP}: 192.168.201.1
225 07:02:38.244980 - {TEE}: None
226 07:02:38.245044 Parsed boot commands:
227 07:02:38.245119 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 07:02:38.245297 Parsed boot commands: tftpboot 192.168.201.1 9726630/tftp-deploy-kg4wuhvh/kernel/bzImage 9726630/tftp-deploy-kg4wuhvh/kernel/cmdline 9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
229 07:02:38.245400 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 07:02:38.245502 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 07:02:38.245669 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 07:02:38.245803 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 07:02:38.245885 Not connected, no need to disconnect.
234 07:02:38.245977 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 07:02:38.246073 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 07:02:38.246149 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
237 07:02:38.249481 Setting prompt string to ['lava-test: # ']
238 07:02:38.249938 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 07:02:38.250119 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 07:02:38.250286 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 07:02:38.250445 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 07:02:38.250761 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
243 07:02:43.395496 >> Command sent successfully.
244 07:02:43.397948 Returned 0 in 5 seconds
245 07:02:43.498805 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 07:02:43.499318 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 07:02:43.499480 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 07:02:43.499626 Setting prompt string to 'Starting depthcharge on Helios...'
250 07:02:43.499739 Changing prompt to 'Starting depthcharge on Helios...'
251 07:02:43.499854 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 07:02:43.500263 [Enter `^Ec?' for help]
253 07:02:44.120122
254 07:02:44.120339
255 07:02:44.130195 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 07:02:44.132848 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 07:02:44.139339 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 07:02:44.142851 CPU: AES supported, TXT NOT supported, VT supported
259 07:02:44.149990 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 07:02:44.153185 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 07:02:44.159768 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 07:02:44.163276 VBOOT: Loading verstage.
263 07:02:44.166376 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 07:02:44.173071 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 07:02:44.176275 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 07:02:44.180208 CBFS @ c08000 size 3f8000
267 07:02:44.186496 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 07:02:44.189630 CBFS: Locating 'fallback/verstage'
269 07:02:44.192749 CBFS: Found @ offset 10fb80 size 1072c
270 07:02:44.196427
271 07:02:44.196559
272 07:02:44.206552 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 07:02:44.220828 Probing TPM: . done!
274 07:02:44.223938 TPM ready after 0 ms
275 07:02:44.227590 Connected to device vid:did:rid of 1ae0:0028:00
276 07:02:44.237725 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 07:02:44.241334 Initialized TPM device CR50 revision 0
278 07:02:44.284973 tlcl_send_startup: Startup return code is 0
279 07:02:44.285133 TPM: setup succeeded
280 07:02:44.297183 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 07:02:44.300867 Chrome EC: UHEPI supported
282 07:02:44.304622 Phase 1
283 07:02:44.307667 FMAP: area GBB found @ c05000 (12288 bytes)
284 07:02:44.314280 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 07:02:44.317942 Phase 2
286 07:02:44.318062 Phase 3
287 07:02:44.321120 FMAP: area GBB found @ c05000 (12288 bytes)
288 07:02:44.327810 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 07:02:44.334663 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 07:02:44.337802 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 07:02:44.344043 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 07:02:44.359955 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 07:02:44.363560 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 07:02:44.369550 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 07:02:44.374057 Phase 4
296 07:02:44.377159 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 07:02:44.383999 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 07:02:44.563707 VB2:vb2_rsa_verify_digest() Digest check failed!
299 07:02:44.569928 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 07:02:44.570069 Saving nvdata
301 07:02:44.573407 Reboot requested (10020007)
302 07:02:44.576858 board_reset() called!
303 07:02:44.576966 full_reset() called!
304 07:02:49.087063
305 07:02:49.087525
306 07:02:49.097121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 07:02:49.100448 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 07:02:49.107024 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 07:02:49.110516 CPU: AES supported, TXT NOT supported, VT supported
310 07:02:49.116462 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 07:02:49.120406 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 07:02:49.127013 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 07:02:49.130337 VBOOT: Loading verstage.
314 07:02:49.133651 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 07:02:49.140451 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 07:02:49.143739 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 07:02:49.146749 CBFS @ c08000 size 3f8000
318 07:02:49.153386 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 07:02:49.156403 CBFS: Locating 'fallback/verstage'
320 07:02:49.160198 CBFS: Found @ offset 10fb80 size 1072c
321 07:02:49.163615
322 07:02:49.163999
323 07:02:49.173614 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 07:02:49.188324 Probing TPM: . done!
325 07:02:49.191430 TPM ready after 0 ms
326 07:02:49.194857 Connected to device vid:did:rid of 1ae0:0028:00
327 07:02:49.205452 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 07:02:49.208826 Initialized TPM device CR50 revision 0
329 07:02:49.252192 tlcl_send_startup: Startup return code is 0
330 07:02:49.252609 TPM: setup succeeded
331 07:02:49.264467 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 07:02:49.268122 Chrome EC: UHEPI supported
333 07:02:49.271938 Phase 1
334 07:02:49.274925 FMAP: area GBB found @ c05000 (12288 bytes)
335 07:02:49.281622 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 07:02:49.288604 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 07:02:49.291844 Recovery requested (1009000e)
338 07:02:49.297540 Saving nvdata
339 07:02:49.303553 tlcl_extend: response is 0
340 07:02:49.312067 tlcl_extend: response is 0
341 07:02:49.319574 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 07:02:49.322803 CBFS @ c08000 size 3f8000
343 07:02:49.329372 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 07:02:49.332770 CBFS: Locating 'fallback/romstage'
345 07:02:49.336251 CBFS: Found @ offset 80 size 145fc
346 07:02:49.338796 Accumulated console time in verstage 98 ms
347 07:02:49.339237
348 07:02:49.339595
349 07:02:49.352273 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 07:02:49.358860 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 07:02:49.361950 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 07:02:49.365111 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 07:02:49.371989 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 07:02:49.375174 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 07:02:49.378363 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 07:02:49.382091 TCO_STS: 0000 0000
357 07:02:49.385086 GEN_PMCON: e0015238 00000200
358 07:02:49.388216 GBLRST_CAUSE: 00000000 00000000
359 07:02:49.388595 prev_sleep_state 5
360 07:02:49.391948 Boot Count incremented to 48629
361 07:02:49.398914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 07:02:49.402781 CBFS @ c08000 size 3f8000
363 07:02:49.409097 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 07:02:49.409506 CBFS: Locating 'fspm.bin'
365 07:02:49.415342 CBFS: Found @ offset 5ffc0 size 71000
366 07:02:49.418346 Chrome EC: UHEPI supported
367 07:02:49.425219 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 07:02:49.429157 Probing TPM: done!
369 07:02:49.435791 Connected to device vid:did:rid of 1ae0:0028:00
370 07:02:49.445891 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 07:02:49.452005 Initialized TPM device CR50 revision 0
372 07:02:49.460518 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 07:02:49.467408 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 07:02:49.470531 MRC cache found, size 1948
375 07:02:49.473733 bootmode is set to: 2
376 07:02:49.477018 PRMRR disabled by config.
377 07:02:49.480181 SPD INDEX = 1
378 07:02:49.483821 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 07:02:49.486867 CBFS @ c08000 size 3f8000
380 07:02:49.493635 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 07:02:49.494058 CBFS: Locating 'spd.bin'
382 07:02:49.496935 CBFS: Found @ offset 5fb80 size 400
383 07:02:49.500220 SPD: module type is LPDDR3
384 07:02:49.503205 SPD: module part is
385 07:02:49.510255 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 07:02:49.513249 SPD: device width 4 bits, bus width 8 bits
387 07:02:49.516563 SPD: module size is 4096 MB (per channel)
388 07:02:49.519853 memory slot: 0 configuration done.
389 07:02:49.523221 memory slot: 2 configuration done.
390 07:02:49.574901 CBMEM:
391 07:02:49.578277 IMD: root @ 99fff000 254 entries.
392 07:02:49.581851 IMD: root @ 99ffec00 62 entries.
393 07:02:49.585358 External stage cache:
394 07:02:49.588481 IMD: root @ 9abff000 254 entries.
395 07:02:49.591471 IMD: root @ 9abfec00 62 entries.
396 07:02:49.595051 Chrome EC: clear events_b mask to 0x0000000020004000
397 07:02:49.611065 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 07:02:49.624235 tlcl_write: response is 0
399 07:02:49.633300 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 07:02:49.639924 MRC: TPM MRC hash updated successfully.
401 07:02:49.640331 2 DIMMs found
402 07:02:49.643167 SMM Memory Map
403 07:02:49.646616 SMRAM : 0x9a000000 0x1000000
404 07:02:49.649860 Subregion 0: 0x9a000000 0xa00000
405 07:02:49.653222 Subregion 1: 0x9aa00000 0x200000
406 07:02:49.656504 Subregion 2: 0x9ac00000 0x400000
407 07:02:49.659837 top_of_ram = 0x9a000000
408 07:02:49.663226 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 07:02:49.669964 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 07:02:49.673119 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 07:02:49.679779 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 07:02:49.682926 CBFS @ c08000 size 3f8000
413 07:02:49.686377 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 07:02:49.689651 CBFS: Locating 'fallback/postcar'
415 07:02:49.696104 CBFS: Found @ offset 107000 size 4b44
416 07:02:49.699350 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 07:02:49.711632 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 07:02:49.714856 Processing 180 relocs. Offset value of 0x97c0c000
419 07:02:49.723491 Accumulated console time in romstage 286 ms
420 07:02:49.723937
421 07:02:49.724313
422 07:02:49.733792 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 07:02:49.740307 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 07:02:49.743737 CBFS @ c08000 size 3f8000
425 07:02:49.746543 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 07:02:49.753263 CBFS: Locating 'fallback/ramstage'
427 07:02:49.756409 CBFS: Found @ offset 43380 size 1b9e8
428 07:02:49.763014 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 07:02:49.795299 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 07:02:49.798486 Processing 3976 relocs. Offset value of 0x98db0000
431 07:02:49.805053 Accumulated console time in postcar 52 ms
432 07:02:49.805452
433 07:02:49.805757
434 07:02:49.814642 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 07:02:49.821451 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 07:02:49.824821 WARNING: RO_VPD is uninitialized or empty.
437 07:02:49.827737 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 07:02:49.834583 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 07:02:49.834987 Normal boot.
440 07:02:49.841662 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 07:02:49.844345 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 07:02:49.847646 CBFS @ c08000 size 3f8000
443 07:02:49.854352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 07:02:49.857736 CBFS: Locating 'cpu_microcode_blob.bin'
445 07:02:49.861076 CBFS: Found @ offset 14700 size 2ec00
446 07:02:49.864557 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 07:02:49.867804 Skip microcode update
448 07:02:49.874478 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 07:02:49.874881 CBFS @ c08000 size 3f8000
450 07:02:49.881196 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 07:02:49.884581 CBFS: Locating 'fsps.bin'
452 07:02:49.887874 CBFS: Found @ offset d1fc0 size 35000
453 07:02:49.913034 Detected 4 core, 8 thread CPU.
454 07:02:49.916362 Setting up SMI for CPU
455 07:02:49.919998 IED base = 0x9ac00000
456 07:02:49.920384 IED size = 0x00400000
457 07:02:49.923175 Will perform SMM setup.
458 07:02:49.929543 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 07:02:49.936546 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 07:02:49.939736 Processing 16 relocs. Offset value of 0x00030000
461 07:02:49.943446 Attempting to start 7 APs
462 07:02:49.946474 Waiting for 10ms after sending INIT.
463 07:02:49.963216 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 07:02:49.963814 done.
465 07:02:49.966378 AP: slot 6 apic_id 4.
466 07:02:49.969840 AP: slot 7 apic_id 5.
467 07:02:49.970213 AP: slot 3 apic_id 2.
468 07:02:49.973155 AP: slot 1 apic_id 3.
469 07:02:49.976336 AP: slot 4 apic_id 7.
470 07:02:49.976842 AP: slot 5 apic_id 6.
471 07:02:49.983075 Waiting for 2nd SIPI to complete...done.
472 07:02:49.989915 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 07:02:49.992984 Processing 13 relocs. Offset value of 0x00038000
474 07:02:49.999160 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 07:02:50.005777 Installing SMM handler to 0x9a000000
476 07:02:50.012426 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 07:02:50.015779 Processing 658 relocs. Offset value of 0x9a010000
478 07:02:50.025838 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 07:02:50.029056 Processing 13 relocs. Offset value of 0x9a008000
480 07:02:50.035981 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 07:02:50.042208 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 07:02:50.048944 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 07:02:50.052030 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 07:02:50.058977 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 07:02:50.065720 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 07:02:50.069051 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 07:02:50.075815 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 07:02:50.079149 Clearing SMI status registers
489 07:02:50.082374 SMI_STS: PM1
490 07:02:50.082774 PM1_STS: PWRBTN
491 07:02:50.085861 TCO_STS: SECOND_TO
492 07:02:50.088631 New SMBASE 0x9a000000
493 07:02:50.091998 In relocation handler: CPU 0
494 07:02:50.095318 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 07:02:50.098666 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 07:02:50.102355 Relocation complete.
497 07:02:50.105588 New SMBASE 0x99fff800
498 07:02:50.109091 In relocation handler: CPU 2
499 07:02:50.112233 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 07:02:50.115594 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 07:02:50.118892 Relocation complete.
502 07:02:50.122318 New SMBASE 0x99ffec00
503 07:02:50.122703 In relocation handler: CPU 5
504 07:02:50.128536 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
505 07:02:50.131728 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 07:02:50.135146 Relocation complete.
507 07:02:50.138172 New SMBASE 0x99fff000
508 07:02:50.138547 In relocation handler: CPU 4
509 07:02:50.144902 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 07:02:50.148718 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 07:02:50.151742 Relocation complete.
512 07:02:50.152228 New SMBASE 0x99fff400
513 07:02:50.154746 In relocation handler: CPU 3
514 07:02:50.161702 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
515 07:02:50.164965 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 07:02:50.168287 Relocation complete.
517 07:02:50.168675 New SMBASE 0x99fffc00
518 07:02:50.171749 In relocation handler: CPU 1
519 07:02:50.178552 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 07:02:50.181791 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 07:02:50.184940 Relocation complete.
522 07:02:50.185325 New SMBASE 0x99ffe400
523 07:02:50.188435 In relocation handler: CPU 7
524 07:02:50.191222 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
525 07:02:50.197792 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 07:02:50.201072 Relocation complete.
527 07:02:50.201461 New SMBASE 0x99ffe800
528 07:02:50.204431 In relocation handler: CPU 6
529 07:02:50.208223 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 07:02:50.214425 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 07:02:50.217832 Relocation complete.
532 07:02:50.218208 Initializing CPU #0
533 07:02:50.221173 CPU: vendor Intel device 806ec
534 07:02:50.224605 CPU: family 06, model 8e, stepping 0c
535 07:02:50.227712 Clearing out pending MCEs
536 07:02:50.231052 Setting up local APIC...
537 07:02:50.234424 apic_id: 0x00 done.
538 07:02:50.234802 Turbo is available but hidden
539 07:02:50.237802 Turbo is available and visible
540 07:02:50.241000 VMX status: enabled
541 07:02:50.244460 IA32_FEATURE_CONTROL status: locked
542 07:02:50.247799 Skip microcode update
543 07:02:50.248173 CPU #0 initialized
544 07:02:50.250917 Initializing CPU #2
545 07:02:50.254627 Initializing CPU #7
546 07:02:50.255027 Initializing CPU #6
547 07:02:50.257619 CPU: vendor Intel device 806ec
548 07:02:50.260715 CPU: family 06, model 8e, stepping 0c
549 07:02:50.264480 CPU: vendor Intel device 806ec
550 07:02:50.267627 CPU: family 06, model 8e, stepping 0c
551 07:02:50.270774 Clearing out pending MCEs
552 07:02:50.274371 Clearing out pending MCEs
553 07:02:50.277449 Setting up local APIC...
554 07:02:50.277909 Initializing CPU #3
555 07:02:50.280698 Initializing CPU #1
556 07:02:50.284020 CPU: vendor Intel device 806ec
557 07:02:50.287143 CPU: family 06, model 8e, stepping 0c
558 07:02:50.290577 CPU: vendor Intel device 806ec
559 07:02:50.294206 CPU: family 06, model 8e, stepping 0c
560 07:02:50.297498 Clearing out pending MCEs
561 07:02:50.300805 Clearing out pending MCEs
562 07:02:50.304167 Setting up local APIC...
563 07:02:50.304659 CPU: vendor Intel device 806ec
564 07:02:50.310762 CPU: family 06, model 8e, stepping 0c
565 07:02:50.311180 Clearing out pending MCEs
566 07:02:50.313878 apic_id: 0x05 done.
567 07:02:50.317208 Setting up local APIC...
568 07:02:50.320554 Setting up local APIC...
569 07:02:50.321096 Setting up local APIC...
570 07:02:50.323798 Initializing CPU #4
571 07:02:50.327293 Initializing CPU #5
572 07:02:50.330592 CPU: vendor Intel device 806ec
573 07:02:50.333915 CPU: family 06, model 8e, stepping 0c
574 07:02:50.334398 apic_id: 0x02 done.
575 07:02:50.337318 apic_id: 0x03 done.
576 07:02:50.340716 VMX status: enabled
577 07:02:50.341145 VMX status: enabled
578 07:02:50.343396 IA32_FEATURE_CONTROL status: locked
579 07:02:50.346875 IA32_FEATURE_CONTROL status: locked
580 07:02:50.350773 Skip microcode update
581 07:02:50.353548 Skip microcode update
582 07:02:50.354063 CPU #3 initialized
583 07:02:50.356724 CPU #1 initialized
584 07:02:50.360111 apic_id: 0x01 done.
585 07:02:50.360493 VMX status: enabled
586 07:02:50.363984 apic_id: 0x04 done.
587 07:02:50.366985 IA32_FEATURE_CONTROL status: locked
588 07:02:50.370093 VMX status: enabled
589 07:02:50.370627 Skip microcode update
590 07:02:50.373549 VMX status: enabled
591 07:02:50.376827 Clearing out pending MCEs
592 07:02:50.380654 CPU: vendor Intel device 806ec
593 07:02:50.383613 CPU: family 06, model 8e, stepping 0c
594 07:02:50.386675 IA32_FEATURE_CONTROL status: locked
595 07:02:50.390439 IA32_FEATURE_CONTROL status: locked
596 07:02:50.390821 CPU #7 initialized
597 07:02:50.393723 Skip microcode update
598 07:02:50.396976 Setting up local APIC...
599 07:02:50.397317 CPU #6 initialized
600 07:02:50.400354 Skip microcode update
601 07:02:50.403554 Clearing out pending MCEs
602 07:02:50.406963 apic_id: 0x07 done.
603 07:02:50.407565 Setting up local APIC...
604 07:02:50.410178 CPU #2 initialized
605 07:02:50.413537 apic_id: 0x06 done.
606 07:02:50.413917 VMX status: enabled
607 07:02:50.416877 VMX status: enabled
608 07:02:50.419991 IA32_FEATURE_CONTROL status: locked
609 07:02:50.423004 IA32_FEATURE_CONTROL status: locked
610 07:02:50.426419 Skip microcode update
611 07:02:50.426828 Skip microcode update
612 07:02:50.429857 CPU #4 initialized
613 07:02:50.433219 CPU #5 initialized
614 07:02:50.436734 bsp_do_flight_plan done after 452 msecs.
615 07:02:50.440065 CPU: frequency set to 4200 MHz
616 07:02:50.440674 Enabling SMIs.
617 07:02:50.443300 Locking SMM.
618 07:02:50.456467 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 07:02:50.459850 CBFS @ c08000 size 3f8000
620 07:02:50.466528 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 07:02:50.466982 CBFS: Locating 'vbt.bin'
622 07:02:50.473073 CBFS: Found @ offset 5f5c0 size 499
623 07:02:50.476291 Found a VBT of 4608 bytes after decompression
624 07:02:50.659862 Display FSP Version Info HOB
625 07:02:50.663052 Reference Code - CPU = 9.0.1e.30
626 07:02:50.666467 uCode Version = 0.0.0.ca
627 07:02:50.669872 TXT ACM version = ff.ff.ff.ffff
628 07:02:50.673246 Display FSP Version Info HOB
629 07:02:50.676496 Reference Code - ME = 9.0.1e.30
630 07:02:50.679807 MEBx version = 0.0.0.0
631 07:02:50.682953 ME Firmware Version = Consumer SKU
632 07:02:50.686086 Display FSP Version Info HOB
633 07:02:50.689379 Reference Code - CML PCH = 9.0.1e.30
634 07:02:50.692791 PCH-CRID Status = Disabled
635 07:02:50.695896 PCH-CRID Original Value = ff.ff.ff.ffff
636 07:02:50.699616 PCH-CRID New Value = ff.ff.ff.ffff
637 07:02:50.702629 OPROM - RST - RAID = ff.ff.ff.ffff
638 07:02:50.705808 ChipsetInit Base Version = ff.ff.ff.ffff
639 07:02:50.709551 ChipsetInit Oem Version = ff.ff.ff.ffff
640 07:02:50.712439 Display FSP Version Info HOB
641 07:02:50.719418 Reference Code - SA - System Agent = 9.0.1e.30
642 07:02:50.722400 Reference Code - MRC = 0.7.1.6c
643 07:02:50.722844 SA - PCIe Version = 9.0.1e.30
644 07:02:50.725697 SA-CRID Status = Disabled
645 07:02:50.729101 SA-CRID Original Value = 0.0.0.c
646 07:02:50.732322 SA-CRID New Value = 0.0.0.c
647 07:02:50.735673 OPROM - VBIOS = ff.ff.ff.ffff
648 07:02:50.739450 RTC Init
649 07:02:50.742778 Set power on after power failure.
650 07:02:50.743308 Disabling Deep S3
651 07:02:50.745695 Disabling Deep S3
652 07:02:50.746270 Disabling Deep S4
653 07:02:50.748783 Disabling Deep S4
654 07:02:50.749222 Disabling Deep S5
655 07:02:50.752818 Disabling Deep S5
656 07:02:50.758895 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
657 07:02:50.759365 Enumerating buses...
658 07:02:50.765570 Show all devs... Before device enumeration.
659 07:02:50.766015 Root Device: enabled 1
660 07:02:50.768877 CPU_CLUSTER: 0: enabled 1
661 07:02:50.772317 DOMAIN: 0000: enabled 1
662 07:02:50.775765 APIC: 00: enabled 1
663 07:02:50.776199 PCI: 00:00.0: enabled 1
664 07:02:50.778831 PCI: 00:02.0: enabled 1
665 07:02:50.782149 PCI: 00:04.0: enabled 0
666 07:02:50.785523 PCI: 00:05.0: enabled 0
667 07:02:50.785966 PCI: 00:12.0: enabled 1
668 07:02:50.788891 PCI: 00:12.5: enabled 0
669 07:02:50.791972 PCI: 00:12.6: enabled 0
670 07:02:50.795117 PCI: 00:14.0: enabled 1
671 07:02:50.795603 PCI: 00:14.1: enabled 0
672 07:02:50.798588 PCI: 00:14.3: enabled 1
673 07:02:50.801822 PCI: 00:14.5: enabled 0
674 07:02:50.802252 PCI: 00:15.0: enabled 1
675 07:02:50.805248 PCI: 00:15.1: enabled 1
676 07:02:50.808479 PCI: 00:15.2: enabled 0
677 07:02:50.812049 PCI: 00:15.3: enabled 0
678 07:02:50.812500 PCI: 00:16.0: enabled 1
679 07:02:50.815422 PCI: 00:16.1: enabled 0
680 07:02:50.818416 PCI: 00:16.2: enabled 0
681 07:02:50.821972 PCI: 00:16.3: enabled 0
682 07:02:50.822428 PCI: 00:16.4: enabled 0
683 07:02:50.825098 PCI: 00:16.5: enabled 0
684 07:02:50.828757 PCI: 00:17.0: enabled 1
685 07:02:50.831848 PCI: 00:19.0: enabled 1
686 07:02:50.832362 PCI: 00:19.1: enabled 0
687 07:02:50.835171 PCI: 00:19.2: enabled 0
688 07:02:50.838565 PCI: 00:1a.0: enabled 0
689 07:02:50.839211 PCI: 00:1c.0: enabled 0
690 07:02:50.841802 PCI: 00:1c.1: enabled 0
691 07:02:50.844962 PCI: 00:1c.2: enabled 0
692 07:02:50.848253 PCI: 00:1c.3: enabled 0
693 07:02:50.848757 PCI: 00:1c.4: enabled 0
694 07:02:50.851542 PCI: 00:1c.5: enabled 0
695 07:02:50.854767 PCI: 00:1c.6: enabled 0
696 07:02:50.858676 PCI: 00:1c.7: enabled 0
697 07:02:50.859160 PCI: 00:1d.0: enabled 1
698 07:02:50.861475 PCI: 00:1d.1: enabled 0
699 07:02:50.864750 PCI: 00:1d.2: enabled 0
700 07:02:50.868162 PCI: 00:1d.3: enabled 0
701 07:02:50.868604 PCI: 00:1d.4: enabled 0
702 07:02:50.872064 PCI: 00:1d.5: enabled 1
703 07:02:50.875222 PCI: 00:1e.0: enabled 1
704 07:02:50.875538 PCI: 00:1e.1: enabled 0
705 07:02:50.878420 PCI: 00:1e.2: enabled 1
706 07:02:50.881695 PCI: 00:1e.3: enabled 1
707 07:02:50.884866 PCI: 00:1f.0: enabled 1
708 07:02:50.885093 PCI: 00:1f.1: enabled 1
709 07:02:50.888342 PCI: 00:1f.2: enabled 1
710 07:02:50.891059 PCI: 00:1f.3: enabled 1
711 07:02:50.894911 PCI: 00:1f.4: enabled 1
712 07:02:50.895052 PCI: 00:1f.5: enabled 1
713 07:02:50.897939 PCI: 00:1f.6: enabled 0
714 07:02:50.901231 USB0 port 0: enabled 1
715 07:02:50.901346 I2C: 00:15: enabled 1
716 07:02:50.904392 I2C: 00:5d: enabled 1
717 07:02:50.907909 GENERIC: 0.0: enabled 1
718 07:02:50.911191 I2C: 00:1a: enabled 1
719 07:02:50.911291 I2C: 00:38: enabled 1
720 07:02:50.914400 I2C: 00:39: enabled 1
721 07:02:50.917772 I2C: 00:3a: enabled 1
722 07:02:50.917873 I2C: 00:3b: enabled 1
723 07:02:50.920763 PCI: 00:00.0: enabled 1
724 07:02:50.924405 SPI: 00: enabled 1
725 07:02:50.924510 SPI: 01: enabled 1
726 07:02:50.927582 PNP: 0c09.0: enabled 1
727 07:02:50.930840 USB2 port 0: enabled 1
728 07:02:50.930940 USB2 port 1: enabled 1
729 07:02:50.934297 USB2 port 2: enabled 0
730 07:02:50.937240 USB2 port 3: enabled 0
731 07:02:50.937340 USB2 port 5: enabled 0
732 07:02:50.941044 USB2 port 6: enabled 1
733 07:02:50.944289 USB2 port 9: enabled 1
734 07:02:50.947362 USB3 port 0: enabled 1
735 07:02:50.947474 USB3 port 1: enabled 1
736 07:02:50.950661 USB3 port 2: enabled 1
737 07:02:50.953975 USB3 port 3: enabled 1
738 07:02:50.954087 USB3 port 4: enabled 0
739 07:02:50.957283 APIC: 03: enabled 1
740 07:02:50.960564 APIC: 01: enabled 1
741 07:02:50.960676 APIC: 02: enabled 1
742 07:02:50.963967 APIC: 07: enabled 1
743 07:02:50.964111 APIC: 06: enabled 1
744 07:02:50.967247 APIC: 04: enabled 1
745 07:02:50.970760 APIC: 05: enabled 1
746 07:02:50.970867 Compare with tree...
747 07:02:50.974058 Root Device: enabled 1
748 07:02:50.977446 CPU_CLUSTER: 0: enabled 1
749 07:02:50.977548 APIC: 00: enabled 1
750 07:02:50.980751 APIC: 03: enabled 1
751 07:02:50.984062 APIC: 01: enabled 1
752 07:02:50.987420 APIC: 02: enabled 1
753 07:02:50.987520 APIC: 07: enabled 1
754 07:02:50.990655 APIC: 06: enabled 1
755 07:02:50.994078 APIC: 04: enabled 1
756 07:02:50.994178 APIC: 05: enabled 1
757 07:02:50.997244 DOMAIN: 0000: enabled 1
758 07:02:51.000406 PCI: 00:00.0: enabled 1
759 07:02:51.003608 PCI: 00:02.0: enabled 1
760 07:02:51.003710 PCI: 00:04.0: enabled 0
761 07:02:51.007054 PCI: 00:05.0: enabled 0
762 07:02:51.010290 PCI: 00:12.0: enabled 1
763 07:02:51.013514 PCI: 00:12.5: enabled 0
764 07:02:51.016812 PCI: 00:12.6: enabled 0
765 07:02:51.016912 PCI: 00:14.0: enabled 1
766 07:02:51.020230 USB0 port 0: enabled 1
767 07:02:51.023495 USB2 port 0: enabled 1
768 07:02:51.026853 USB2 port 1: enabled 1
769 07:02:51.030435 USB2 port 2: enabled 0
770 07:02:51.030551 USB2 port 3: enabled 0
771 07:02:51.033686 USB2 port 5: enabled 0
772 07:02:51.037238 USB2 port 6: enabled 1
773 07:02:51.040508 USB2 port 9: enabled 1
774 07:02:51.043446 USB3 port 0: enabled 1
775 07:02:51.047358 USB3 port 1: enabled 1
776 07:02:51.047478 USB3 port 2: enabled 1
777 07:02:51.050493 USB3 port 3: enabled 1
778 07:02:51.053692 USB3 port 4: enabled 0
779 07:02:51.056841 PCI: 00:14.1: enabled 0
780 07:02:51.060126 PCI: 00:14.3: enabled 1
781 07:02:51.060232 PCI: 00:14.5: enabled 0
782 07:02:51.063327 PCI: 00:15.0: enabled 1
783 07:02:51.066754 I2C: 00:15: enabled 1
784 07:02:51.070116 PCI: 00:15.1: enabled 1
785 07:02:51.073366 I2C: 00:5d: enabled 1
786 07:02:51.073460 GENERIC: 0.0: enabled 1
787 07:02:51.076768 PCI: 00:15.2: enabled 0
788 07:02:51.080160 PCI: 00:15.3: enabled 0
789 07:02:51.083381 PCI: 00:16.0: enabled 1
790 07:02:51.086684 PCI: 00:16.1: enabled 0
791 07:02:51.086779 PCI: 00:16.2: enabled 0
792 07:02:51.090119 PCI: 00:16.3: enabled 0
793 07:02:51.093417 PCI: 00:16.4: enabled 0
794 07:02:51.096728 PCI: 00:16.5: enabled 0
795 07:02:51.096833 PCI: 00:17.0: enabled 1
796 07:02:51.099989 PCI: 00:19.0: enabled 1
797 07:02:51.103234 I2C: 00:1a: enabled 1
798 07:02:51.106470 I2C: 00:38: enabled 1
799 07:02:51.109857 I2C: 00:39: enabled 1
800 07:02:51.109961 I2C: 00:3a: enabled 1
801 07:02:51.113207 I2C: 00:3b: enabled 1
802 07:02:51.116345 PCI: 00:19.1: enabled 0
803 07:02:51.119616 PCI: 00:19.2: enabled 0
804 07:02:51.119728 PCI: 00:1a.0: enabled 0
805 07:02:51.122995 PCI: 00:1c.0: enabled 0
806 07:02:51.126374 PCI: 00:1c.1: enabled 0
807 07:02:51.129727 PCI: 00:1c.2: enabled 0
808 07:02:51.133106 PCI: 00:1c.3: enabled 0
809 07:02:51.133199 PCI: 00:1c.4: enabled 0
810 07:02:51.136242 PCI: 00:1c.5: enabled 0
811 07:02:51.139310 PCI: 00:1c.6: enabled 0
812 07:02:51.143111 PCI: 00:1c.7: enabled 0
813 07:02:51.146270 PCI: 00:1d.0: enabled 1
814 07:02:51.146375 PCI: 00:1d.1: enabled 0
815 07:02:51.149512 PCI: 00:1d.2: enabled 0
816 07:02:51.152814 PCI: 00:1d.3: enabled 0
817 07:02:51.155797 PCI: 00:1d.4: enabled 0
818 07:02:51.159751 PCI: 00:1d.5: enabled 1
819 07:02:51.159849 PCI: 00:00.0: enabled 1
820 07:02:51.162808 PCI: 00:1e.0: enabled 1
821 07:02:51.165843 PCI: 00:1e.1: enabled 0
822 07:02:51.169213 PCI: 00:1e.2: enabled 1
823 07:02:51.169322 SPI: 00: enabled 1
824 07:02:51.172497 PCI: 00:1e.3: enabled 1
825 07:02:51.175827 SPI: 01: enabled 1
826 07:02:51.179049 PCI: 00:1f.0: enabled 1
827 07:02:51.182561 PNP: 0c09.0: enabled 1
828 07:02:51.182658 PCI: 00:1f.1: enabled 1
829 07:02:51.185753 PCI: 00:1f.2: enabled 1
830 07:02:51.189142 PCI: 00:1f.3: enabled 1
831 07:02:51.192544 PCI: 00:1f.4: enabled 1
832 07:02:51.195750 PCI: 00:1f.5: enabled 1
833 07:02:51.195846 PCI: 00:1f.6: enabled 0
834 07:02:51.199064 Root Device scanning...
835 07:02:51.202450 scan_static_bus for Root Device
836 07:02:51.205794 CPU_CLUSTER: 0 enabled
837 07:02:51.205885 DOMAIN: 0000 enabled
838 07:02:51.209089 DOMAIN: 0000 scanning...
839 07:02:51.212324 PCI: pci_scan_bus for bus 00
840 07:02:51.215582 PCI: 00:00.0 [8086/0000] ops
841 07:02:51.218813 PCI: 00:00.0 [8086/9b61] enabled
842 07:02:51.222282 PCI: 00:02.0 [8086/0000] bus ops
843 07:02:51.225522 PCI: 00:02.0 [8086/9b41] enabled
844 07:02:51.228816 PCI: 00:04.0 [8086/1903] disabled
845 07:02:51.232161 PCI: 00:08.0 [8086/1911] enabled
846 07:02:51.235499 PCI: 00:12.0 [8086/02f9] enabled
847 07:02:51.238691 PCI: 00:14.0 [8086/0000] bus ops
848 07:02:51.241957 PCI: 00:14.0 [8086/02ed] enabled
849 07:02:51.245676 PCI: 00:14.2 [8086/02ef] enabled
850 07:02:51.248794 PCI: 00:14.3 [8086/02f0] enabled
851 07:02:51.252096 PCI: 00:15.0 [8086/0000] bus ops
852 07:02:51.255740 PCI: 00:15.0 [8086/02e8] enabled
853 07:02:51.258916 PCI: 00:15.1 [8086/0000] bus ops
854 07:02:51.262027 PCI: 00:15.1 [8086/02e9] enabled
855 07:02:51.265208 PCI: 00:16.0 [8086/0000] ops
856 07:02:51.269016 PCI: 00:16.0 [8086/02e0] enabled
857 07:02:51.272192 PCI: 00:17.0 [8086/0000] ops
858 07:02:51.275272 PCI: 00:17.0 [8086/02d3] enabled
859 07:02:51.278728 PCI: 00:19.0 [8086/0000] bus ops
860 07:02:51.282101 PCI: 00:19.0 [8086/02c5] enabled
861 07:02:51.285485 PCI: 00:1d.0 [8086/0000] bus ops
862 07:02:51.288747 PCI: 00:1d.0 [8086/02b0] enabled
863 07:02:51.295414 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 07:02:51.298775 PCI: 00:1e.0 [8086/0000] ops
865 07:02:51.302067 PCI: 00:1e.0 [8086/02a8] enabled
866 07:02:51.305447 PCI: 00:1e.2 [8086/0000] bus ops
867 07:02:51.308845 PCI: 00:1e.2 [8086/02aa] enabled
868 07:02:51.312086 PCI: 00:1e.3 [8086/0000] bus ops
869 07:02:51.315343 PCI: 00:1e.3 [8086/02ab] enabled
870 07:02:51.318555 PCI: 00:1f.0 [8086/0000] bus ops
871 07:02:51.321779 PCI: 00:1f.0 [8086/0284] enabled
872 07:02:51.325050 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 07:02:51.331692 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 07:02:51.335099 PCI: 00:1f.3 [8086/0000] bus ops
875 07:02:51.338375 PCI: 00:1f.3 [8086/02c8] enabled
876 07:02:51.341676 PCI: 00:1f.4 [8086/0000] bus ops
877 07:02:51.344988 PCI: 00:1f.4 [8086/02a3] enabled
878 07:02:51.348321 PCI: 00:1f.5 [8086/0000] bus ops
879 07:02:51.351967 PCI: 00:1f.5 [8086/02a4] enabled
880 07:02:51.355066 PCI: Leftover static devices:
881 07:02:51.355172 PCI: 00:05.0
882 07:02:51.358376 PCI: 00:12.5
883 07:02:51.358472 PCI: 00:12.6
884 07:02:51.358549 PCI: 00:14.1
885 07:02:51.361971 PCI: 00:14.5
886 07:02:51.362069 PCI: 00:15.2
887 07:02:51.364949 PCI: 00:15.3
888 07:02:51.365055 PCI: 00:16.1
889 07:02:51.368665 PCI: 00:16.2
890 07:02:51.368830 PCI: 00:16.3
891 07:02:51.368949 PCI: 00:16.4
892 07:02:51.371869 PCI: 00:16.5
893 07:02:51.371975 PCI: 00:19.1
894 07:02:51.375020 PCI: 00:19.2
895 07:02:51.375139 PCI: 00:1a.0
896 07:02:51.375224 PCI: 00:1c.0
897 07:02:51.378160 PCI: 00:1c.1
898 07:02:51.378265 PCI: 00:1c.2
899 07:02:51.381993 PCI: 00:1c.3
900 07:02:51.382107 PCI: 00:1c.4
901 07:02:51.382197 PCI: 00:1c.5
902 07:02:51.385457 PCI: 00:1c.6
903 07:02:51.385586 PCI: 00:1c.7
904 07:02:51.388839 PCI: 00:1d.1
905 07:02:51.388965 PCI: 00:1d.2
906 07:02:51.391473 PCI: 00:1d.3
907 07:02:51.391570 PCI: 00:1d.4
908 07:02:51.391647 PCI: 00:1d.5
909 07:02:51.394846 PCI: 00:1e.1
910 07:02:51.394955 PCI: 00:1f.1
911 07:02:51.398174 PCI: 00:1f.2
912 07:02:51.398270 PCI: 00:1f.6
913 07:02:51.401615 PCI: Check your devicetree.cb.
914 07:02:51.404751 PCI: 00:02.0 scanning...
915 07:02:51.408182 scan_generic_bus for PCI: 00:02.0
916 07:02:51.411578 scan_generic_bus for PCI: 00:02.0 done
917 07:02:51.418052 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
918 07:02:51.418151 PCI: 00:14.0 scanning...
919 07:02:51.421782 scan_static_bus for PCI: 00:14.0
920 07:02:51.425073 USB0 port 0 enabled
921 07:02:51.428321 USB0 port 0 scanning...
922 07:02:51.431575 scan_static_bus for USB0 port 0
923 07:02:51.434829 USB2 port 0 enabled
924 07:02:51.434926 USB2 port 1 enabled
925 07:02:51.438065 USB2 port 2 disabled
926 07:02:51.438162 USB2 port 3 disabled
927 07:02:51.441565 USB2 port 5 disabled
928 07:02:51.445081 USB2 port 6 enabled
929 07:02:51.445180 USB2 port 9 enabled
930 07:02:51.448179 USB3 port 0 enabled
931 07:02:51.451545 USB3 port 1 enabled
932 07:02:51.451642 USB3 port 2 enabled
933 07:02:51.454825 USB3 port 3 enabled
934 07:02:51.454922 USB3 port 4 disabled
935 07:02:51.458122 USB2 port 0 scanning...
936 07:02:51.461341 scan_static_bus for USB2 port 0
937 07:02:51.464401 scan_static_bus for USB2 port 0 done
938 07:02:51.471300 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
939 07:02:51.474546 USB2 port 1 scanning...
940 07:02:51.478219 scan_static_bus for USB2 port 1
941 07:02:51.481069 scan_static_bus for USB2 port 1 done
942 07:02:51.484567 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
943 07:02:51.487665 USB2 port 6 scanning...
944 07:02:51.490882 scan_static_bus for USB2 port 6
945 07:02:51.494915 scan_static_bus for USB2 port 6 done
946 07:02:51.500803 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
947 07:02:51.504928 USB2 port 9 scanning...
948 07:02:51.508104 scan_static_bus for USB2 port 9
949 07:02:51.510802 scan_static_bus for USB2 port 9 done
950 07:02:51.517382 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
951 07:02:51.517480 USB3 port 0 scanning...
952 07:02:51.520758 scan_static_bus for USB3 port 0
953 07:02:51.523958 scan_static_bus for USB3 port 0 done
954 07:02:51.530607 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
955 07:02:51.534560 USB3 port 1 scanning...
956 07:02:51.537525 scan_static_bus for USB3 port 1
957 07:02:51.540952 scan_static_bus for USB3 port 1 done
958 07:02:51.547506 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
959 07:02:51.547649 USB3 port 2 scanning...
960 07:02:51.550765 scan_static_bus for USB3 port 2
961 07:02:51.557356 scan_static_bus for USB3 port 2 done
962 07:02:51.560602 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
963 07:02:51.563920 USB3 port 3 scanning...
964 07:02:51.567165 scan_static_bus for USB3 port 3
965 07:02:51.570961 scan_static_bus for USB3 port 3 done
966 07:02:51.577216 scan_bus: scanning of bus USB3 port 3 took 9694 usecs
967 07:02:51.580335 scan_static_bus for USB0 port 0 done
968 07:02:51.584056 scan_bus: scanning of bus USB0 port 0 took 155384 usecs
969 07:02:51.590813 scan_static_bus for PCI: 00:14.0 done
970 07:02:51.593884 scan_bus: scanning of bus PCI: 00:14.0 took 173010 usecs
971 07:02:51.597542 PCI: 00:15.0 scanning...
972 07:02:51.601057 scan_generic_bus for PCI: 00:15.0
973 07:02:51.604240 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 07:02:51.610298 scan_generic_bus for PCI: 00:15.0 done
975 07:02:51.613625 scan_bus: scanning of bus PCI: 00:15.0 took 14289 usecs
976 07:02:51.617080 PCI: 00:15.1 scanning...
977 07:02:51.620390 scan_generic_bus for PCI: 00:15.1
978 07:02:51.623638 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 07:02:51.630161 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 07:02:51.633800 scan_generic_bus for PCI: 00:15.1 done
981 07:02:51.636967 scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs
982 07:02:51.640249 PCI: 00:19.0 scanning...
983 07:02:51.643482 scan_generic_bus for PCI: 00:19.0
984 07:02:51.650223 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 07:02:51.653395 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 07:02:51.656674 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 07:02:51.660036 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 07:02:51.666753 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 07:02:51.669985 scan_generic_bus for PCI: 00:19.0 done
990 07:02:51.673324 scan_bus: scanning of bus PCI: 00:19.0 took 30732 usecs
991 07:02:51.676455 PCI: 00:1d.0 scanning...
992 07:02:51.680118 do_pci_scan_bridge for PCI: 00:1d.0
993 07:02:51.683373 PCI: pci_scan_bus for bus 01
994 07:02:51.686547 PCI: 01:00.0 [1c5c/1327] enabled
995 07:02:51.690150 Enabling Common Clock Configuration
996 07:02:51.696611 L1 Sub-State supported from root port 29
997 07:02:51.696707 L1 Sub-State Support = 0xf
998 07:02:51.699650 CommonModeRestoreTime = 0x28
999 07:02:51.706496 Power On Value = 0x16, Power On Scale = 0x0
1000 07:02:51.706599 ASPM: Enabled L1
1001 07:02:51.713126 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1002 07:02:51.716468 PCI: 00:1e.2 scanning...
1003 07:02:51.719817 scan_generic_bus for PCI: 00:1e.2
1004 07:02:51.723049 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 07:02:51.726443 scan_generic_bus for PCI: 00:1e.2 done
1006 07:02:51.732922 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1007 07:02:51.736132 PCI: 00:1e.3 scanning...
1008 07:02:51.739804 scan_generic_bus for PCI: 00:1e.3
1009 07:02:51.743064 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 07:02:51.746363 scan_generic_bus for PCI: 00:1e.3 done
1011 07:02:51.753083 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1012 07:02:51.753181 PCI: 00:1f.0 scanning...
1013 07:02:51.756321 scan_static_bus for PCI: 00:1f.0
1014 07:02:51.759632 PNP: 0c09.0 enabled
1015 07:02:51.762972 scan_static_bus for PCI: 00:1f.0 done
1016 07:02:51.769564 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1017 07:02:51.772909 PCI: 00:1f.3 scanning...
1018 07:02:51.776194 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1019 07:02:51.779496 PCI: 00:1f.4 scanning...
1020 07:02:51.782719 scan_generic_bus for PCI: 00:1f.4
1021 07:02:51.785983 scan_generic_bus for PCI: 00:1f.4 done
1022 07:02:51.792697 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1023 07:02:51.796496 PCI: 00:1f.5 scanning...
1024 07:02:51.799520 scan_generic_bus for PCI: 00:1f.5
1025 07:02:51.803267 scan_generic_bus for PCI: 00:1f.5 done
1026 07:02:51.809512 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1027 07:02:51.816465 scan_bus: scanning of bus DOMAIN: 0000 took 605132 usecs
1028 07:02:51.819795 scan_static_bus for Root Device done
1029 07:02:51.822968 scan_bus: scanning of bus Root Device took 625001 usecs
1030 07:02:51.825850 done
1031 07:02:51.829057 Chrome EC: UHEPI supported
1032 07:02:51.832501 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 07:02:51.839019 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 07:02:51.845935 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 07:02:51.852394 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 07:02:51.855751 SPI flash protection: WPSW=0 SRP0=0
1037 07:02:51.862346 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 07:02:51.865677 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 07:02:51.869013 found VGA at PCI: 00:02.0
1040 07:02:51.872284 Setting up VGA for PCI: 00:02.0
1041 07:02:51.878903 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 07:02:51.882254 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 07:02:51.885455 Allocating resources...
1044 07:02:51.888759 Reading resources...
1045 07:02:51.892111 Root Device read_resources bus 0 link: 0
1046 07:02:51.895643 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 07:02:51.901990 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 07:02:51.905772 DOMAIN: 0000 read_resources bus 0 link: 0
1049 07:02:51.912631 PCI: 00:14.0 read_resources bus 0 link: 0
1050 07:02:51.915849 USB0 port 0 read_resources bus 0 link: 0
1051 07:02:51.924118 USB0 port 0 read_resources bus 0 link: 0 done
1052 07:02:51.927557 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 07:02:51.934826 PCI: 00:15.0 read_resources bus 1 link: 0
1054 07:02:51.938038 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 07:02:51.944556 PCI: 00:15.1 read_resources bus 2 link: 0
1056 07:02:51.947739 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 07:02:51.955218 PCI: 00:19.0 read_resources bus 3 link: 0
1058 07:02:51.961709 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 07:02:51.965078 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 07:02:51.971823 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 07:02:51.975094 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 07:02:51.981920 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 07:02:51.985095 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 07:02:51.991853 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 07:02:51.995025 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 07:02:52.001537 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 07:02:52.008643 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 07:02:52.011852 Root Device read_resources bus 0 link: 0 done
1069 07:02:52.014965 Done reading resources.
1070 07:02:52.018270 Show resources in subtree (Root Device)...After reading.
1071 07:02:52.025005 Root Device child on link 0 CPU_CLUSTER: 0
1072 07:02:52.028292 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 07:02:52.028391 APIC: 00
1074 07:02:52.031646 APIC: 03
1075 07:02:52.031734 APIC: 01
1076 07:02:52.035019 APIC: 02
1077 07:02:52.035114 APIC: 07
1078 07:02:52.035191 APIC: 06
1079 07:02:52.038165 APIC: 04
1080 07:02:52.038253 APIC: 05
1081 07:02:52.041528 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 07:02:52.051361 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 07:02:52.104512 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 07:02:52.105217 PCI: 00:00.0
1085 07:02:52.105513 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 07:02:52.105797 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 07:02:52.106089 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 07:02:52.106376 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 07:02:52.131638 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 07:02:52.131969 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 07:02:52.132265 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 07:02:52.138851 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 07:02:52.148853 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 07:02:52.155238 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 07:02:52.165322 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 07:02:52.175211 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 07:02:52.184658 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 07:02:52.194746 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 07:02:52.204739 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 07:02:52.214795 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 07:02:52.214899 PCI: 00:02.0
1102 07:02:52.224525 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 07:02:52.234938 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 07:02:52.244528 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 07:02:52.244636 PCI: 00:04.0
1106 07:02:52.247845 PCI: 00:08.0
1107 07:02:52.257586 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 07:02:52.257686 PCI: 00:12.0
1109 07:02:52.267767 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 07:02:52.274169 PCI: 00:14.0 child on link 0 USB0 port 0
1111 07:02:52.284322 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 07:02:52.287645 USB0 port 0 child on link 0 USB2 port 0
1113 07:02:52.291057 USB2 port 0
1114 07:02:52.291161 USB2 port 1
1115 07:02:52.294345 USB2 port 2
1116 07:02:52.294434 USB2 port 3
1117 07:02:52.297836 USB2 port 5
1118 07:02:52.297923 USB2 port 6
1119 07:02:52.301155 USB2 port 9
1120 07:02:52.301240 USB3 port 0
1121 07:02:52.304385 USB3 port 1
1122 07:02:52.304472 USB3 port 2
1123 07:02:52.307658 USB3 port 3
1124 07:02:52.307742 USB3 port 4
1125 07:02:52.310955 PCI: 00:14.2
1126 07:02:52.321020 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 07:02:52.330998 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 07:02:52.331107 PCI: 00:14.3
1129 07:02:52.340847 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 07:02:52.347037 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 07:02:52.357307 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 07:02:52.357408 I2C: 01:15
1133 07:02:52.360588 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 07:02:52.370546 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 07:02:52.373660 I2C: 02:5d
1136 07:02:52.373759 GENERIC: 0.0
1137 07:02:52.376866 PCI: 00:16.0
1138 07:02:52.386849 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 07:02:52.386958 PCI: 00:17.0
1140 07:02:52.397150 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 07:02:52.407067 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 07:02:52.413076 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 07:02:52.423000 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 07:02:52.429679 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 07:02:52.440054 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 07:02:52.446585 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 07:02:52.453367 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 07:02:52.456500 I2C: 03:1a
1149 07:02:52.456600 I2C: 03:38
1150 07:02:52.459575 I2C: 03:39
1151 07:02:52.459674 I2C: 03:3a
1152 07:02:52.463256 I2C: 03:3b
1153 07:02:52.466372 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 07:02:52.476592 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 07:02:52.486125 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 07:02:52.492879 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 07:02:52.496198 PCI: 01:00.0
1158 07:02:52.506236 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 07:02:52.509444 PCI: 00:1e.0
1160 07:02:52.519385 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 07:02:52.529296 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 07:02:52.532554 PCI: 00:1e.2 child on link 0 SPI: 00
1163 07:02:52.542502 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 07:02:52.542604 SPI: 00
1165 07:02:52.549428 PCI: 00:1e.3 child on link 0 SPI: 01
1166 07:02:52.558929 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 07:02:52.559028 SPI: 01
1168 07:02:52.562607 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 07:02:52.572188 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 07:02:52.581947 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 07:02:52.582076 PNP: 0c09.0
1172 07:02:52.592362 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 07:02:52.592484 PCI: 00:1f.3
1174 07:02:52.601764 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 07:02:52.611895 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 07:02:52.615033 PCI: 00:1f.4
1177 07:02:52.625081 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 07:02:52.635095 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 07:02:52.635208 PCI: 00:1f.5
1180 07:02:52.645130 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 07:02:52.651550 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 07:02:52.658148 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 07:02:52.665012 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 07:02:52.668111 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 07:02:52.671796 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 07:02:52.674988 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 07:02:52.678126 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 07:02:52.684555 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 07:02:52.691606 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 07:02:52.701301 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 07:02:52.707974 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 07:02:52.714493 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 07:02:52.717907 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 07:02:52.727797 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 07:02:52.731104 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 07:02:52.737756 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 07:02:52.741014 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 07:02:52.747831 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 07:02:52.751048 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 07:02:52.754362 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 07:02:52.760976 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 07:02:52.764231 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 07:02:52.770513 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 07:02:52.774383 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 07:02:52.780475 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 07:02:52.784196 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 07:02:52.790895 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 07:02:52.794128 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 07:02:52.800788 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 07:02:52.804089 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 07:02:52.810501 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 07:02:52.813758 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 07:02:52.820313 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 07:02:52.823804 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 07:02:52.830437 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 07:02:52.833805 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 07:02:52.837110 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 07:02:52.847183 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 07:02:52.849974 avoid_fixed_resources: DOMAIN: 0000
1220 07:02:52.856511 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 07:02:52.863676 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 07:02:52.870346 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 07:02:52.876762 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 07:02:52.886805 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 07:02:52.893022 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 07:02:52.899919 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 07:02:52.910017 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 07:02:52.916180 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 07:02:52.922623 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 07:02:52.929257 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 07:02:52.939192 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 07:02:52.939290 Setting resources...
1233 07:02:52.945999 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 07:02:52.949308 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 07:02:52.956077 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 07:02:52.959444 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 07:02:52.962575 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 07:02:52.969090 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 07:02:52.975769 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 07:02:52.982507 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 07:02:52.988871 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 07:02:52.995448 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 07:02:52.999180 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 07:02:53.005470 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 07:02:53.008706 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 07:02:53.011842 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 07:02:53.018811 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 07:02:53.021964 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 07:02:53.028550 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 07:02:53.031969 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 07:02:53.038524 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 07:02:53.041832 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 07:02:53.048489 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 07:02:53.051965 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 07:02:53.058439 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 07:02:53.061858 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 07:02:53.068229 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 07:02:53.071552 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 07:02:53.078255 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 07:02:53.081608 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 07:02:53.088391 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 07:02:53.091613 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 07:02:53.094843 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 07:02:53.101073 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 07:02:53.107982 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 07:02:53.114266 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 07:02:53.124762 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 07:02:53.130811 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 07:02:53.134708 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 07:02:53.144137 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 07:02:53.147484 Root Device assign_resources, bus 0 link: 0
1272 07:02:53.150958 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 07:02:53.161091 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 07:02:53.167831 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 07:02:53.177770 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 07:02:53.184507 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 07:02:53.194607 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 07:02:53.201045 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 07:02:53.207465 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 07:02:53.210649 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 07:02:53.220731 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 07:02:53.226921 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 07:02:53.236819 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 07:02:53.243503 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 07:02:53.246733 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 07:02:53.253514 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 07:02:53.260145 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 07:02:53.266803 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 07:02:53.270046 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 07:02:53.280448 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 07:02:53.286979 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 07:02:53.293185 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 07:02:53.303043 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 07:02:53.309899 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 07:02:53.316963 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 07:02:53.326347 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 07:02:53.333432 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 07:02:53.339835 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 07:02:53.342994 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 07:02:53.353006 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 07:02:53.359704 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 07:02:53.369118 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 07:02:53.373018 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 07:02:53.382315 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 07:02:53.386171 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 07:02:53.396106 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 07:02:53.402721 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 07:02:53.409302 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 07:02:53.412420 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 07:02:53.422411 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 07:02:53.425443 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 07:02:53.429192 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 07:02:53.435609 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 07:02:53.438705 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 07:02:53.445180 LPC: Trying to open IO window from 800 size 1ff
1316 07:02:53.452229 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 07:02:53.461792 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 07:02:53.468534 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 07:02:53.478677 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 07:02:53.482009 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 07:02:53.488006 Root Device assign_resources, bus 0 link: 0
1322 07:02:53.488126 Done setting resources.
1323 07:02:53.495122 Show resources in subtree (Root Device)...After assigning values.
1324 07:02:53.501785 Root Device child on link 0 CPU_CLUSTER: 0
1325 07:02:53.504584 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 07:02:53.504682 APIC: 00
1327 07:02:53.508112 APIC: 03
1328 07:02:53.508208 APIC: 01
1329 07:02:53.508283 APIC: 02
1330 07:02:53.511372 APIC: 07
1331 07:02:53.511467 APIC: 06
1332 07:02:53.514745 APIC: 04
1333 07:02:53.514841 APIC: 05
1334 07:02:53.517988 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 07:02:53.527884 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 07:02:53.541083 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 07:02:53.541222 PCI: 00:00.0
1338 07:02:53.550849 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 07:02:53.561322 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 07:02:53.570824 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 07:02:53.577347 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 07:02:53.587439 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 07:02:53.597242 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 07:02:53.607473 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 07:02:53.617181 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 07:02:53.627076 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 07:02:53.633625 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 07:02:53.643481 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 07:02:53.653172 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 07:02:53.663204 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 07:02:53.673135 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 07:02:53.683028 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 07:02:53.693004 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 07:02:53.693149 PCI: 00:02.0
1355 07:02:53.702656 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 07:02:53.716221 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 07:02:53.722220 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 07:02:53.725550 PCI: 00:04.0
1359 07:02:53.725659 PCI: 00:08.0
1360 07:02:53.735498 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 07:02:53.738953 PCI: 00:12.0
1362 07:02:53.748785 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 07:02:53.751883 PCI: 00:14.0 child on link 0 USB0 port 0
1364 07:02:53.765321 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 07:02:53.768784 USB0 port 0 child on link 0 USB2 port 0
1366 07:02:53.768886 USB2 port 0
1367 07:02:53.771868 USB2 port 1
1368 07:02:53.771966 USB2 port 2
1369 07:02:53.774973 USB2 port 3
1370 07:02:53.778905 USB2 port 5
1371 07:02:53.778997 USB2 port 6
1372 07:02:53.782292 USB2 port 9
1373 07:02:53.782390 USB3 port 0
1374 07:02:53.785679 USB3 port 1
1375 07:02:53.785776 USB3 port 2
1376 07:02:53.788328 USB3 port 3
1377 07:02:53.788425 USB3 port 4
1378 07:02:53.791601 PCI: 00:14.2
1379 07:02:53.802183 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 07:02:53.811475 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 07:02:53.811582 PCI: 00:14.3
1382 07:02:53.824721 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 07:02:53.827935 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 07:02:53.837776 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 07:02:53.837918 I2C: 01:15
1386 07:02:53.844959 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 07:02:53.854816 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 07:02:53.854960 I2C: 02:5d
1389 07:02:53.857790 GENERIC: 0.0
1390 07:02:53.857921 PCI: 00:16.0
1391 07:02:53.868051 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 07:02:53.871272 PCI: 00:17.0
1393 07:02:53.880933 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 07:02:53.890816 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 07:02:53.900588 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 07:02:53.911131 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 07:02:53.917656 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 07:02:53.927622 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 07:02:53.934257 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 07:02:53.943817 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 07:02:53.943924 I2C: 03:1a
1402 07:02:53.946934 I2C: 03:38
1403 07:02:53.947033 I2C: 03:39
1404 07:02:53.950320 I2C: 03:3a
1405 07:02:53.950421 I2C: 03:3b
1406 07:02:53.956990 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 07:02:53.963596 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 07:02:53.973784 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 07:02:53.986789 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 07:02:53.986902 PCI: 01:00.0
1411 07:02:53.997179 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 07:02:54.000455 PCI: 00:1e.0
1413 07:02:54.009768 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 07:02:54.020316 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 07:02:54.022997 PCI: 00:1e.2 child on link 0 SPI: 00
1416 07:02:54.036298 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 07:02:54.036410 SPI: 00
1418 07:02:54.039639 PCI: 00:1e.3 child on link 0 SPI: 01
1419 07:02:54.049835 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 07:02:54.053088 SPI: 01
1421 07:02:54.056468 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 07:02:54.066367 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 07:02:54.072914 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 07:02:54.076064 PNP: 0c09.0
1425 07:02:54.082542 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 07:02:54.086250 PCI: 00:1f.3
1427 07:02:54.095810 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 07:02:54.106112 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 07:02:54.109376 PCI: 00:1f.4
1430 07:02:54.119099 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 07:02:54.129046 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 07:02:54.129150 PCI: 00:1f.5
1433 07:02:54.138758 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 07:02:54.142072 Done allocating resources.
1435 07:02:54.148590 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 07:02:54.151966 Enabling resources...
1437 07:02:54.155238 PCI: 00:00.0 subsystem <- 8086/9b61
1438 07:02:54.158660 PCI: 00:00.0 cmd <- 06
1439 07:02:54.162032 PCI: 00:02.0 subsystem <- 8086/9b41
1440 07:02:54.165396 PCI: 00:02.0 cmd <- 03
1441 07:02:54.165484 PCI: 00:08.0 cmd <- 06
1442 07:02:54.171995 PCI: 00:12.0 subsystem <- 8086/02f9
1443 07:02:54.172095 PCI: 00:12.0 cmd <- 02
1444 07:02:54.175251 PCI: 00:14.0 subsystem <- 8086/02ed
1445 07:02:54.178597 PCI: 00:14.0 cmd <- 02
1446 07:02:54.181893 PCI: 00:14.2 cmd <- 02
1447 07:02:54.185099 PCI: 00:14.3 subsystem <- 8086/02f0
1448 07:02:54.188290 PCI: 00:14.3 cmd <- 02
1449 07:02:54.191894 PCI: 00:15.0 subsystem <- 8086/02e8
1450 07:02:54.195182 PCI: 00:15.0 cmd <- 02
1451 07:02:54.198270 PCI: 00:15.1 subsystem <- 8086/02e9
1452 07:02:54.201324 PCI: 00:15.1 cmd <- 02
1453 07:02:54.204930 PCI: 00:16.0 subsystem <- 8086/02e0
1454 07:02:54.207889 PCI: 00:16.0 cmd <- 02
1455 07:02:54.211501 PCI: 00:17.0 subsystem <- 8086/02d3
1456 07:02:54.211601 PCI: 00:17.0 cmd <- 03
1457 07:02:54.217937 PCI: 00:19.0 subsystem <- 8086/02c5
1458 07:02:54.218035 PCI: 00:19.0 cmd <- 02
1459 07:02:54.221767 PCI: 00:1d.0 bridge ctrl <- 0013
1460 07:02:54.224959 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 07:02:54.228283 PCI: 00:1d.0 cmd <- 06
1462 07:02:54.231507 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 07:02:54.234726 PCI: 00:1e.0 cmd <- 06
1464 07:02:54.238018 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 07:02:54.241413 PCI: 00:1e.2 cmd <- 06
1466 07:02:54.244682 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 07:02:54.248020 PCI: 00:1e.3 cmd <- 02
1468 07:02:54.251361 PCI: 00:1f.0 subsystem <- 8086/0284
1469 07:02:54.254748 PCI: 00:1f.0 cmd <- 407
1470 07:02:54.257471 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 07:02:54.261374 PCI: 00:1f.3 cmd <- 02
1472 07:02:54.264046 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 07:02:54.267410 PCI: 00:1f.4 cmd <- 03
1474 07:02:54.270736 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 07:02:54.274096 PCI: 00:1f.5 cmd <- 406
1476 07:02:54.281361 PCI: 01:00.0 cmd <- 02
1477 07:02:54.286685 done.
1478 07:02:54.298200 ME: Version: 14.0.39.1367
1479 07:02:54.304990 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 07:02:54.308049 Initializing devices...
1481 07:02:54.308145 Root Device init ...
1482 07:02:54.314967 Chrome EC: Set SMI mask to 0x0000000000000000
1483 07:02:54.317969 Chrome EC: clear events_b mask to 0x0000000000000000
1484 07:02:54.325289 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 07:02:54.331267 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 07:02:54.338053 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 07:02:54.341116 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 07:02:54.344531 Root Device init finished in 35202 usecs
1489 07:02:54.348461 CPU_CLUSTER: 0 init ...
1490 07:02:54.355045 CPU_CLUSTER: 0 init finished in 2440 usecs
1491 07:02:54.358985 PCI: 00:00.0 init ...
1492 07:02:54.362420 CPU TDP: 15 Watts
1493 07:02:54.365663 CPU PL2 = 64 Watts
1494 07:02:54.369011 PCI: 00:00.0 init finished in 7082 usecs
1495 07:02:54.372225 PCI: 00:02.0 init ...
1496 07:02:54.375546 PCI: 00:02.0 init finished in 2252 usecs
1497 07:02:54.379005 PCI: 00:08.0 init ...
1498 07:02:54.382301 PCI: 00:08.0 init finished in 2252 usecs
1499 07:02:54.385677 PCI: 00:12.0 init ...
1500 07:02:54.388987 PCI: 00:12.0 init finished in 2253 usecs
1501 07:02:54.392509 PCI: 00:14.0 init ...
1502 07:02:54.395192 PCI: 00:14.0 init finished in 2244 usecs
1503 07:02:54.398440 PCI: 00:14.2 init ...
1504 07:02:54.402317 PCI: 00:14.2 init finished in 2253 usecs
1505 07:02:54.405503 PCI: 00:14.3 init ...
1506 07:02:54.408649 PCI: 00:14.3 init finished in 2272 usecs
1507 07:02:54.411848 PCI: 00:15.0 init ...
1508 07:02:54.414956 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 07:02:54.418270 PCI: 00:15.0 init finished in 5977 usecs
1510 07:02:54.422062 PCI: 00:15.1 init ...
1511 07:02:54.425184 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 07:02:54.431475 PCI: 00:15.1 init finished in 5978 usecs
1513 07:02:54.431576 PCI: 00:16.0 init ...
1514 07:02:54.438086 PCI: 00:16.0 init finished in 2243 usecs
1515 07:02:54.441830 PCI: 00:19.0 init ...
1516 07:02:54.445051 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 07:02:54.448068 PCI: 00:19.0 init finished in 5977 usecs
1518 07:02:54.451946 PCI: 00:1d.0 init ...
1519 07:02:54.455114 Initializing PCH PCIe bridge.
1520 07:02:54.458507 PCI: 00:1d.0 init finished in 5285 usecs
1521 07:02:54.461339 PCI: 00:1f.0 init ...
1522 07:02:54.464690 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 07:02:54.471299 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 07:02:54.471401 IOAPIC: ID = 0x02
1525 07:02:54.474951 IOAPIC: Dumping registers
1526 07:02:54.478181 reg 0x0000: 0x02000000
1527 07:02:54.481588 reg 0x0001: 0x00770020
1528 07:02:54.481687 reg 0x0002: 0x00000000
1529 07:02:54.488138 PCI: 00:1f.0 init finished in 23550 usecs
1530 07:02:54.491511 PCI: 00:1f.4 init ...
1531 07:02:54.494144 PCI: 00:1f.4 init finished in 2263 usecs
1532 07:02:54.505530 PCI: 01:00.0 init ...
1533 07:02:54.508556 PCI: 01:00.0 init finished in 2252 usecs
1534 07:02:54.513065 PNP: 0c09.0 init ...
1535 07:02:54.516318 Google Chrome EC uptime: 11.047 seconds
1536 07:02:54.522585 Google Chrome AP resets since EC boot: 0
1537 07:02:54.526249 Google Chrome most recent AP reset causes:
1538 07:02:54.532859 Google Chrome EC reset flags at last EC boot: reset-pin
1539 07:02:54.536049 PNP: 0c09.0 init finished in 20578 usecs
1540 07:02:54.539203 Devices initialized
1541 07:02:54.539297 Show all devs... After init.
1542 07:02:54.542868 Root Device: enabled 1
1543 07:02:54.546173 CPU_CLUSTER: 0: enabled 1
1544 07:02:54.549270 DOMAIN: 0000: enabled 1
1545 07:02:54.549359 APIC: 00: enabled 1
1546 07:02:54.552915 PCI: 00:00.0: enabled 1
1547 07:02:54.556217 PCI: 00:02.0: enabled 1
1548 07:02:54.559438 PCI: 00:04.0: enabled 0
1549 07:02:54.559518 PCI: 00:05.0: enabled 0
1550 07:02:54.562782 PCI: 00:12.0: enabled 1
1551 07:02:54.566037 PCI: 00:12.5: enabled 0
1552 07:02:54.566115 PCI: 00:12.6: enabled 0
1553 07:02:54.569394 PCI: 00:14.0: enabled 1
1554 07:02:54.572079 PCI: 00:14.1: enabled 0
1555 07:02:54.575937 PCI: 00:14.3: enabled 1
1556 07:02:54.576038 PCI: 00:14.5: enabled 0
1557 07:02:54.579261 PCI: 00:15.0: enabled 1
1558 07:02:54.582682 PCI: 00:15.1: enabled 1
1559 07:02:54.585359 PCI: 00:15.2: enabled 0
1560 07:02:54.585444 PCI: 00:15.3: enabled 0
1561 07:02:54.588668 PCI: 00:16.0: enabled 1
1562 07:02:54.591944 PCI: 00:16.1: enabled 0
1563 07:02:54.595272 PCI: 00:16.2: enabled 0
1564 07:02:54.595358 PCI: 00:16.3: enabled 0
1565 07:02:54.598639 PCI: 00:16.4: enabled 0
1566 07:02:54.602159 PCI: 00:16.5: enabled 0
1567 07:02:54.605412 PCI: 00:17.0: enabled 1
1568 07:02:54.605507 PCI: 00:19.0: enabled 1
1569 07:02:54.608750 PCI: 00:19.1: enabled 0
1570 07:02:54.611930 PCI: 00:19.2: enabled 0
1571 07:02:54.612018 PCI: 00:1a.0: enabled 0
1572 07:02:54.615432 PCI: 00:1c.0: enabled 0
1573 07:02:54.618832 PCI: 00:1c.1: enabled 0
1574 07:02:54.622025 PCI: 00:1c.2: enabled 0
1575 07:02:54.622111 PCI: 00:1c.3: enabled 0
1576 07:02:54.625378 PCI: 00:1c.4: enabled 0
1577 07:02:54.628411 PCI: 00:1c.5: enabled 0
1578 07:02:54.631494 PCI: 00:1c.6: enabled 0
1579 07:02:54.631605 PCI: 00:1c.7: enabled 0
1580 07:02:54.635323 PCI: 00:1d.0: enabled 1
1581 07:02:54.638458 PCI: 00:1d.1: enabled 0
1582 07:02:54.641459 PCI: 00:1d.2: enabled 0
1583 07:02:54.641548 PCI: 00:1d.3: enabled 0
1584 07:02:54.645107 PCI: 00:1d.4: enabled 0
1585 07:02:54.648299 PCI: 00:1d.5: enabled 0
1586 07:02:54.651425 PCI: 00:1e.0: enabled 1
1587 07:02:54.651516 PCI: 00:1e.1: enabled 0
1588 07:02:54.655116 PCI: 00:1e.2: enabled 1
1589 07:02:54.658309 PCI: 00:1e.3: enabled 1
1590 07:02:54.658398 PCI: 00:1f.0: enabled 1
1591 07:02:54.661370 PCI: 00:1f.1: enabled 0
1592 07:02:54.664698 PCI: 00:1f.2: enabled 0
1593 07:02:54.668057 PCI: 00:1f.3: enabled 1
1594 07:02:54.668146 PCI: 00:1f.4: enabled 1
1595 07:02:54.671411 PCI: 00:1f.5: enabled 1
1596 07:02:54.674693 PCI: 00:1f.6: enabled 0
1597 07:02:54.678016 USB0 port 0: enabled 1
1598 07:02:54.678109 I2C: 01:15: enabled 1
1599 07:02:54.681288 I2C: 02:5d: enabled 1
1600 07:02:54.684632 GENERIC: 0.0: enabled 1
1601 07:02:54.684720 I2C: 03:1a: enabled 1
1602 07:02:54.688057 I2C: 03:38: enabled 1
1603 07:02:54.691322 I2C: 03:39: enabled 1
1604 07:02:54.691405 I2C: 03:3a: enabled 1
1605 07:02:54.694746 I2C: 03:3b: enabled 1
1606 07:02:54.698054 PCI: 00:00.0: enabled 1
1607 07:02:54.698138 SPI: 00: enabled 1
1608 07:02:54.701538 SPI: 01: enabled 1
1609 07:02:54.704796 PNP: 0c09.0: enabled 1
1610 07:02:54.704880 USB2 port 0: enabled 1
1611 07:02:54.708116 USB2 port 1: enabled 1
1612 07:02:54.711442 USB2 port 2: enabled 0
1613 07:02:54.714685 USB2 port 3: enabled 0
1614 07:02:54.714771 USB2 port 5: enabled 0
1615 07:02:54.717943 USB2 port 6: enabled 1
1616 07:02:54.721082 USB2 port 9: enabled 1
1617 07:02:54.721178 USB3 port 0: enabled 1
1618 07:02:54.724338 USB3 port 1: enabled 1
1619 07:02:54.727825 USB3 port 2: enabled 1
1620 07:02:54.727916 USB3 port 3: enabled 1
1621 07:02:54.731229 USB3 port 4: enabled 0
1622 07:02:54.734585 APIC: 03: enabled 1
1623 07:02:54.734684 APIC: 01: enabled 1
1624 07:02:54.737580 APIC: 02: enabled 1
1625 07:02:54.740728 APIC: 07: enabled 1
1626 07:02:54.740821 APIC: 06: enabled 1
1627 07:02:54.743907 APIC: 04: enabled 1
1628 07:02:54.744012 APIC: 05: enabled 1
1629 07:02:54.747720 PCI: 00:08.0: enabled 1
1630 07:02:54.750801 PCI: 00:14.2: enabled 1
1631 07:02:54.753836 PCI: 01:00.0: enabled 1
1632 07:02:54.757455 Disabling ACPI via APMC:
1633 07:02:54.760696 done.
1634 07:02:54.764006 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 07:02:54.767219 ELOG: NV offset 0xaf0000 size 0x4000
1636 07:02:54.774394 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 07:02:54.780953 ELOG: Event(17) added with size 13 at 2023-03-22 07:02:54 UTC
1638 07:02:54.787804 ELOG: Event(92) added with size 9 at 2023-03-22 07:02:54 UTC
1639 07:02:54.794411 ELOG: Event(93) added with size 9 at 2023-03-22 07:02:54 UTC
1640 07:02:54.801023 ELOG: Event(9A) added with size 9 at 2023-03-22 07:02:54 UTC
1641 07:02:54.807094 ELOG: Event(9E) added with size 10 at 2023-03-22 07:02:54 UTC
1642 07:02:54.813720 ELOG: Event(9F) added with size 14 at 2023-03-22 07:02:54 UTC
1643 07:02:54.817115 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 07:02:54.824785 ELOG: Event(A1) added with size 10 at 2023-03-22 07:02:54 UTC
1645 07:02:54.834603 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 07:02:54.841167 ELOG: Event(A0) added with size 9 at 2023-03-22 07:02:54 UTC
1647 07:02:54.844426 elog_add_boot_reason: Logged dev mode boot
1648 07:02:54.847602 Finalize devices...
1649 07:02:54.847707 PCI: 00:17.0 final
1650 07:02:54.851265 Devices finalized
1651 07:02:54.854523 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 07:02:54.860809 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 07:02:54.864102 ME: HFSTS1 : 0x90000245
1654 07:02:54.867196 ME: HFSTS2 : 0x3B850126
1655 07:02:54.873997 ME: HFSTS3 : 0x00000020
1656 07:02:54.877101 ME: HFSTS4 : 0x00004800
1657 07:02:54.880361 ME: HFSTS5 : 0x00000000
1658 07:02:54.883806 ME: HFSTS6 : 0x40400006
1659 07:02:54.887141 ME: Manufacturing Mode : NO
1660 07:02:54.890549 ME: FW Partition Table : OK
1661 07:02:54.893810 ME: Bringup Loader Failure : NO
1662 07:02:54.897153 ME: Firmware Init Complete : YES
1663 07:02:54.900477 ME: Boot Options Present : NO
1664 07:02:54.903785 ME: Update In Progress : NO
1665 07:02:54.907092 ME: D0i3 Support : YES
1666 07:02:54.910438 ME: Low Power State Enabled : NO
1667 07:02:54.913777 ME: CPU Replaced : NO
1668 07:02:54.917001 ME: CPU Replacement Valid : YES
1669 07:02:54.920256 ME: Current Working State : 5
1670 07:02:54.923725 ME: Current Operation State : 1
1671 07:02:54.926976 ME: Current Operation Mode : 0
1672 07:02:54.929953 ME: Error Code : 0
1673 07:02:54.933375 ME: CPU Debug Disabled : YES
1674 07:02:54.936768 ME: TXT Support : NO
1675 07:02:54.943316 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 07:02:54.949929 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 07:02:54.950032 CBFS @ c08000 size 3f8000
1678 07:02:54.956845 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 07:02:54.959869 CBFS: Locating 'fallback/dsdt.aml'
1680 07:02:54.963011 CBFS: Found @ offset 10bb80 size 3fa5
1681 07:02:54.969928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 07:02:54.973213 CBFS @ c08000 size 3f8000
1683 07:02:54.979911 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 07:02:54.980013 CBFS: Locating 'fallback/slic'
1685 07:02:54.984988 CBFS: 'fallback/slic' not found.
1686 07:02:54.992082 ACPI: Writing ACPI tables at 99b3e000.
1687 07:02:54.992179 ACPI: * FACS
1688 07:02:54.995335 ACPI: * DSDT
1689 07:02:54.998701 Ramoops buffer: 0x100000@0x99a3d000.
1690 07:02:55.001932 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 07:02:55.008643 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 07:02:55.012073 Google Chrome EC: version:
1693 07:02:55.014901 ro: helios_v2.0.2659-56403530b
1694 07:02:55.018039 rw: helios_v2.0.2849-c41de27e7d
1695 07:02:55.018130 running image: 1
1696 07:02:55.022738 ACPI: * FADT
1697 07:02:55.022830 SCI is IRQ9
1698 07:02:55.029409 ACPI: added table 1/32, length now 40
1699 07:02:55.029508 ACPI: * SSDT
1700 07:02:55.032637 Found 1 CPU(s) with 8 core(s) each.
1701 07:02:55.035660 Error: Could not locate 'wifi_sar' in VPD.
1702 07:02:55.042275 Checking CBFS for default SAR values
1703 07:02:55.045551 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 07:02:55.048884 CBFS @ c08000 size 3f8000
1705 07:02:55.055527 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 07:02:55.058828 CBFS: Locating 'wifi_sar_defaults.hex'
1707 07:02:55.062080 CBFS: Found @ offset 5fac0 size 77
1708 07:02:55.065775 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 07:02:55.072143 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 07:02:55.075362 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 07:02:55.082273 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 07:02:55.085169 failed to find key in VPD: dsm_calib_r0_0
1713 07:02:55.095186 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 07:02:55.098384 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 07:02:55.101723 failed to find key in VPD: dsm_calib_r0_1
1716 07:02:55.111790 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 07:02:55.118373 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 07:02:55.121719 failed to find key in VPD: dsm_calib_r0_2
1719 07:02:55.131742 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 07:02:55.134865 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 07:02:55.141774 failed to find key in VPD: dsm_calib_r0_3
1722 07:02:55.147723 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 07:02:55.154426 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 07:02:55.157845 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 07:02:55.164460 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 07:02:55.168373 EC returned error result code 1
1727 07:02:55.171667 EC returned error result code 1
1728 07:02:55.174822 EC returned error result code 1
1729 07:02:55.177875 PS2K: Bad resp from EC. Vivaldi disabled!
1730 07:02:55.184738 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 07:02:55.191077 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 07:02:55.194806 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 07:02:55.200909 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 07:02:55.204834 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 07:02:55.211497 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 07:02:55.217570 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 07:02:55.224878 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 07:02:55.227917 ACPI: added table 2/32, length now 44
1739 07:02:55.228012 ACPI: * MCFG
1740 07:02:55.234695 ACPI: added table 3/32, length now 48
1741 07:02:55.234796 ACPI: * TPM2
1742 07:02:55.238015 TPM2 log created at 99a2d000
1743 07:02:55.240880 ACPI: added table 4/32, length now 52
1744 07:02:55.244565 ACPI: * MADT
1745 07:02:55.244655 SCI is IRQ9
1746 07:02:55.247544 ACPI: added table 5/32, length now 56
1747 07:02:55.250849 current = 99b43ac0
1748 07:02:55.250943 ACPI: * DMAR
1749 07:02:55.254063 ACPI: added table 6/32, length now 60
1750 07:02:55.257198 ACPI: * IGD OpRegion
1751 07:02:55.260531 GMA: Found VBT in CBFS
1752 07:02:55.264052 GMA: Found valid VBT in CBFS
1753 07:02:55.267230 ACPI: added table 7/32, length now 64
1754 07:02:55.267319 ACPI: * HPET
1755 07:02:55.273924 ACPI: added table 8/32, length now 68
1756 07:02:55.274023 ACPI: done.
1757 07:02:55.277226 ACPI tables: 31744 bytes.
1758 07:02:55.280466 smbios_write_tables: 99a2c000
1759 07:02:55.284193 EC returned error result code 3
1760 07:02:55.287441 Couldn't obtain OEM name from CBI
1761 07:02:55.290704 Create SMBIOS type 17
1762 07:02:55.293882 PCI: 00:00.0 (Intel Cannonlake)
1763 07:02:55.293996 PCI: 00:14.3 (Intel WiFi)
1764 07:02:55.296968 SMBIOS tables: 939 bytes.
1765 07:02:55.300728 Writing table forward entry at 0x00000500
1766 07:02:55.306906 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 07:02:55.310829 Writing coreboot table at 0x99b62000
1768 07:02:55.317396 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 07:02:55.323765 1. 0000000000001000-000000000009ffff: RAM
1770 07:02:55.326941 2. 00000000000a0000-00000000000fffff: RESERVED
1771 07:02:55.330225 3. 0000000000100000-0000000099a2bfff: RAM
1772 07:02:55.336872 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 07:02:55.340359 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 07:02:55.347072 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 07:02:55.353318 7. 000000009a000000-000000009f7fffff: RESERVED
1776 07:02:55.356629 8. 00000000e0000000-00000000efffffff: RESERVED
1777 07:02:55.363342 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 07:02:55.366739 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 07:02:55.370121 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 07:02:55.376621 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 07:02:55.380071 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 07:02:55.386594 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 07:02:55.389928 15. 0000000100000000-000000045e7fffff: RAM
1784 07:02:55.393046 Graphics framebuffer located at 0xc0000000
1785 07:02:55.396383 Passing 5 GPIOs to payload:
1786 07:02:55.402755 NAME | PORT | POLARITY | VALUE
1787 07:02:55.406393 write protect | undefined | high | low
1788 07:02:55.412722 lid | undefined | high | high
1789 07:02:55.419585 power | undefined | high | low
1790 07:02:55.422964 oprom | undefined | high | low
1791 07:02:55.429517 EC in RW | 0x000000cb | high | low
1792 07:02:55.429617 Board ID: 4
1793 07:02:55.436282 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 07:02:55.439076 CBFS @ c08000 size 3f8000
1795 07:02:55.442975 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 07:02:55.449591 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1797 07:02:55.452961 coreboot table: 1492 bytes.
1798 07:02:55.456138 IMD ROOT 0. 99fff000 00001000
1799 07:02:55.459367 IMD SMALL 1. 99ffe000 00001000
1800 07:02:55.462488 FSP MEMORY 2. 99c4e000 003b0000
1801 07:02:55.466072 CONSOLE 3. 99c2e000 00020000
1802 07:02:55.469426 FMAP 4. 99c2d000 0000054e
1803 07:02:55.472726 TIME STAMP 5. 99c2c000 00000910
1804 07:02:55.476181 VBOOT WORK 6. 99c18000 00014000
1805 07:02:55.479466 MRC DATA 7. 99c16000 00001958
1806 07:02:55.482727 ROMSTG STCK 8. 99c15000 00001000
1807 07:02:55.485945 AFTER CAR 9. 99c0b000 0000a000
1808 07:02:55.489466 RAMSTAGE 10. 99baf000 0005c000
1809 07:02:55.492445 REFCODE 11. 99b7a000 00035000
1810 07:02:55.495610 SMM BACKUP 12. 99b6a000 00010000
1811 07:02:55.498918 COREBOOT 13. 99b62000 00008000
1812 07:02:55.502230 ACPI 14. 99b3e000 00024000
1813 07:02:55.505508 ACPI GNVS 15. 99b3d000 00001000
1814 07:02:55.509135 RAMOOPS 16. 99a3d000 00100000
1815 07:02:55.512289 TPM2 TCGLOG17. 99a2d000 00010000
1816 07:02:55.516005 SMBIOS 18. 99a2c000 00000800
1817 07:02:55.519118 IMD small region:
1818 07:02:55.522254 IMD ROOT 0. 99ffec00 00000400
1819 07:02:55.526107 FSP RUNTIME 1. 99ffebe0 00000004
1820 07:02:55.529405 EC HOSTEVENT 2. 99ffebc0 00000008
1821 07:02:55.532054 POWER STATE 3. 99ffeb80 00000040
1822 07:02:55.535477 ROMSTAGE 4. 99ffeb60 00000004
1823 07:02:55.538852 MEM INFO 5. 99ffe9a0 000001b9
1824 07:02:55.542186 VPD 6. 99ffe920 0000006c
1825 07:02:55.545494 MTRR: Physical address space:
1826 07:02:55.552209 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 07:02:55.558863 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 07:02:55.564924 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 07:02:55.571732 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 07:02:55.575073 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 07:02:55.581834 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 07:02:55.588634 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 07:02:55.591785 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 07:02:55.598184 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 07:02:55.601401 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 07:02:55.604627 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 07:02:55.607907 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 07:02:55.614984 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 07:02:55.618046 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 07:02:55.621218 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 07:02:55.624968 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 07:02:55.631344 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 07:02:55.634399 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 07:02:55.638181 call enable_fixed_mtrr()
1845 07:02:55.641331 CPU physical address size: 39 bits
1846 07:02:55.644754 MTRR: default type WB/UC MTRR counts: 6/8.
1847 07:02:55.648086 MTRR: WB selected as default type.
1848 07:02:55.653999 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 07:02:55.660793 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 07:02:55.667694 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 07:02:55.674332 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 07:02:55.681108 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 07:02:55.686968 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 07:02:55.690328 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 07:02:55.694471 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 07:02:55.700314 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 07:02:55.704136 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 07:02:55.707320 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 07:02:55.710699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 07:02:55.717392 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 07:02:55.720692 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 07:02:55.723886 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 07:02:55.726962 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 07:02:55.730626 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 07:02:55.733588
1866 07:02:55.733687 MTRR check
1867 07:02:55.736751 Fixed MTRRs : Enabled
1868 07:02:55.736844 Variable MTRRs: Enabled
1869 07:02:55.740075
1870 07:02:55.740163 call enable_fixed_mtrr()
1871 07:02:55.747044 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 07:02:55.750469 CPU physical address size: 39 bits
1873 07:02:55.756956 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 07:02:55.760396 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 07:02:55.763619 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 07:02:55.766417 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 07:02:55.773159 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 07:02:55.776396 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 07:02:55.779806 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 07:02:55.783045 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 07:02:55.786346 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 07:02:55.793043 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 07:02:55.796409 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 07:02:55.799839 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 07:02:55.806548 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 07:02:55.806642 call enable_fixed_mtrr()
1887 07:02:55.813056 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 07:02:55.816344 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 07:02:55.819693 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 07:02:55.822938 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 07:02:55.829470 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 07:02:55.832881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 07:02:55.835863 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 07:02:55.839000 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 07:02:55.842700 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 07:02:55.849080 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 07:02:55.852266 CPU physical address size: 39 bits
1898 07:02:55.855720 call enable_fixed_mtrr()
1899 07:02:55.859087 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 07:02:55.862476 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 07:02:55.865821 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 07:02:55.872389 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 07:02:55.875472 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 07:02:55.878637 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 07:02:55.881980 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 07:02:55.888755 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 07:02:55.891919 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 07:02:55.895272 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 07:02:55.898635 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 07:02:55.905052 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 07:02:55.908385 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 07:02:55.911642 call enable_fixed_mtrr()
1913 07:02:55.914861 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 07:02:55.918669 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 07:02:55.922082 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 07:02:55.928693 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 07:02:55.932023 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 07:02:55.934745 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 07:02:55.938741 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 07:02:55.944911 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 07:02:55.948137 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 07:02:55.951365 CPU physical address size: 39 bits
1923 07:02:55.954908 call enable_fixed_mtrr()
1924 07:02:55.958027 CPU physical address size: 39 bits
1925 07:02:55.961423 CBFS @ c08000 size 3f8000
1926 07:02:55.964805 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1927 07:02:55.968130 CBFS: Locating 'fallback/payload'
1928 07:02:55.971431 CPU physical address size: 39 bits
1929 07:02:55.978144 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 07:02:55.981308 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 07:02:55.984595 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 07:02:55.987942 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 07:02:55.994685 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 07:02:55.998137 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 07:02:56.001420 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 07:02:56.004849 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 07:02:56.010767 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 07:02:56.014030 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 07:02:56.017967 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 07:02:56.021039 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 07:02:56.024480 call enable_fixed_mtrr()
1942 07:02:56.027919 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 07:02:56.034318 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 07:02:56.037724 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 07:02:56.040994 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 07:02:56.044381 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 07:02:56.050727 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 07:02:56.053948 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 07:02:56.057719 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 07:02:56.060986 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 07:02:56.067203 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 07:02:56.070485 CPU physical address size: 39 bits
1953 07:02:56.073784 call enable_fixed_mtrr()
1954 07:02:56.077023 CBFS: Found @ offset 1c96c0 size 3f798
1955 07:02:56.080382 CPU physical address size: 39 bits
1956 07:02:56.083686 Checking segment from ROM address 0xffdd16f8
1957 07:02:56.090066 Checking segment from ROM address 0xffdd1714
1958 07:02:56.093415 Loading segment from ROM address 0xffdd16f8
1959 07:02:56.096763 code (compression=0)
1960 07:02:56.103293 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 07:02:56.113516 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 07:02:56.113618 it's not compressed!
1963 07:02:56.206614 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 07:02:56.213342 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 07:02:56.216494 Loading segment from ROM address 0xffdd1714
1966 07:02:56.219873 Entry Point 0x30000000
1967 07:02:56.223146 Loaded segments
1968 07:02:56.229071 Finalizing chipset.
1969 07:02:56.232218 Finalizing SMM.
1970 07:02:56.235470 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 07:02:56.238827 mp_park_aps done after 0 msecs.
1972 07:02:56.245500 Jumping to boot code at 30000000(99b62000)
1973 07:02:56.251903 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 07:02:56.252015
1975 07:02:56.252111
1976 07:02:56.252185
1977 07:02:56.255284 Starting depthcharge on Helios...
1978 07:02:56.255377
1979 07:02:56.255747 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 07:02:56.255875 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 07:02:56.255974 Setting prompt string to ['hatch:']
1982 07:02:56.256067 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 07:02:56.265281 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 07:02:56.265386
1985 07:02:56.271657 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 07:02:56.271760
1987 07:02:56.278492 board_setup: Info: eMMC controller not present; skipping
1988 07:02:56.278602
1989 07:02:56.281735 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 07:02:56.281830
1991 07:02:56.288172 board_setup: Info: SDHCI controller not present; skipping
1992 07:02:56.288272
1993 07:02:56.294617 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 07:02:56.294717
1995 07:02:56.294795 Wipe memory regions:
1996 07:02:56.294868
1997 07:02:56.297911 [0x00000000001000, 0x000000000a0000)
1998 07:02:56.298010
1999 07:02:56.305040 [0x00000000100000, 0x00000030000000)
2000 07:02:56.368026
2001 07:02:56.371097 [0x00000030657430, 0x00000099a2c000)
2002 07:02:56.517562
2003 07:02:56.520920 [0x00000100000000, 0x0000045e800000)
2004 07:02:57.977400
2005 07:02:57.977561 R8152: Initializing
2006 07:02:57.977654
2007 07:02:57.979880 Version 9 (ocp_data = 6010)
2008 07:02:57.984401
2009 07:02:57.984507 R8152: Done initializing
2010 07:02:57.984586
2011 07:02:57.987763 Adding net device
2012 07:02:58.470458
2013 07:02:58.470611 R8152: Initializing
2014 07:02:58.470707
2015 07:02:58.473745 Version 6 (ocp_data = 5c30)
2016 07:02:58.473848
2017 07:02:58.476861 R8152: Done initializing
2018 07:02:58.476954
2019 07:02:58.483479 net_add_device: Attemp to include the same device
2020 07:02:58.483583
2021 07:02:58.490928 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 07:02:58.491039
2023 07:02:58.491131
2024 07:02:58.491214
2025 07:02:58.491499 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 07:02:58.592255 hatch: tftpboot 192.168.201.1 9726630/tftp-deploy-kg4wuhvh/kernel/bzImage 9726630/tftp-deploy-kg4wuhvh/kernel/cmdline 9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
2028 07:02:58.592436 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 07:02:58.592542 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 07:02:58.596368 tftpboot 192.168.201.1 9726630/tftp-deploy-kg4wuhvh/kernel/bzImoy-kg4wuhvh/kernel/cmdline 9726630/tftp-deploy-kg4wuhvh/ramdisk/ramdisk.cpio.gz
2031 07:02:58.596484
2032 07:02:58.596563 Waiting for link
2033 07:02:58.797522
2034 07:02:58.797667 done.
2035 07:02:58.797756
2036 07:02:58.797831 MAC: 00:24:32:50:1a:59
2037 07:02:58.797946
2038 07:02:58.800545 Sending DHCP discover... done.
2039 07:02:58.800662
2040 07:02:58.803809 Waiting for reply... done.
2041 07:02:58.803902
2042 07:02:58.807705 Sending DHCP request... done.
2043 07:02:58.807808
2044 07:02:58.810439 Waiting for reply... done.
2045 07:02:58.810529
2046 07:02:58.813776 My ip is 192.168.201.14
2047 07:02:58.813862
2048 07:02:58.817066 The DHCP server ip is 192.168.201.1
2049 07:02:58.817176
2050 07:02:58.820405 TFTP server IP predefined by user: 192.168.201.1
2051 07:02:58.820504
2052 07:02:58.826919 Bootfile predefined by user: 9726630/tftp-deploy-kg4wuhvh/kernel/bzImage
2053 07:02:58.827028
2054 07:02:58.830362 Sending tftp read request... done.
2055 07:02:58.830459
2056 07:02:58.836941 Waiting for the transfer...
2057 07:02:58.837046
2058 07:02:59.346340 00000000 ################################################################
2059 07:02:59.346510
2060 07:02:59.854887 00080000 ################################################################
2061 07:02:59.855045
2062 07:03:00.365635 00100000 ################################################################
2063 07:03:00.365785
2064 07:03:00.874472 00180000 ################################################################
2065 07:03:00.874620
2066 07:03:01.395278 00200000 ################################################################
2067 07:03:01.395434
2068 07:03:01.916104 00280000 ################################################################
2069 07:03:01.916257
2070 07:03:02.447469 00300000 ################################################################
2071 07:03:02.447629
2072 07:03:02.968784 00380000 ################################################################
2073 07:03:02.968941
2074 07:03:03.497418 00400000 ################################################################
2075 07:03:03.497583
2076 07:03:04.053425 00480000 ################################################################
2077 07:03:04.053577
2078 07:03:04.583935 00500000 ################################################################
2079 07:03:04.584089
2080 07:03:05.106187 00580000 ################################################################
2081 07:03:05.106344
2082 07:03:05.621339 00600000 ################################################################
2083 07:03:05.621490
2084 07:03:06.142556 00680000 ################################################################
2085 07:03:06.142714
2086 07:03:06.673502 00700000 ################################################################
2087 07:03:06.673683
2088 07:03:07.188626 00780000 ################################################################
2089 07:03:07.188793
2090 07:03:07.697926 00800000 ################################################################
2091 07:03:07.698077
2092 07:03:08.208567 00880000 ################################################################
2093 07:03:08.208725
2094 07:03:08.723399 00900000 ################################################################
2095 07:03:08.723550
2096 07:03:09.238457 00980000 ################################################################
2097 07:03:09.238607
2098 07:03:09.757834 00a00000 ################################################################
2099 07:03:09.757986
2100 07:03:10.276865 00a80000 ################################################################
2101 07:03:10.277025
2102 07:03:10.380609 00b00000 ############# done.
2103 07:03:10.380760
2104 07:03:10.383934 The bootfile was 11637120 bytes long.
2105 07:03:10.384032
2106 07:03:10.387298 Sending tftp read request... done.
2107 07:03:10.387395
2108 07:03:10.390211 Waiting for the transfer...
2109 07:03:10.390309
2110 07:03:10.900879 00000000 ################################################################
2111 07:03:10.901044
2112 07:03:11.410101 00080000 ################################################################
2113 07:03:11.410259
2114 07:03:11.921155 00100000 ################################################################
2115 07:03:11.921312
2116 07:03:12.431144 00180000 ################################################################
2117 07:03:12.431296
2118 07:03:12.946543 00200000 ################################################################
2119 07:03:12.946699
2120 07:03:13.495988 00280000 ################################################################
2121 07:03:13.496168
2122 07:03:14.009459 00300000 ################################################################
2123 07:03:14.009613
2124 07:03:14.520701 00380000 ################################################################
2125 07:03:14.520856
2126 07:03:15.035009 00400000 ################################################################
2127 07:03:15.035170
2128 07:03:15.554545 00480000 ################################################################
2129 07:03:15.554700
2130 07:03:16.072455 00500000 ################################################################
2131 07:03:16.072604
2132 07:03:16.588374 00580000 ################################################################
2133 07:03:16.588521
2134 07:03:17.105351 00600000 ################################################################
2135 07:03:17.105506
2136 07:03:17.623981 00680000 ################################################################
2137 07:03:17.624132
2138 07:03:18.141515 00700000 ################################################################
2139 07:03:18.141672
2140 07:03:18.662173 00780000 ################################################################
2141 07:03:18.662357
2142 07:03:19.180196 00800000 ################################################################
2143 07:03:19.180344
2144 07:03:19.490987 00880000 ####################################### done.
2145 07:03:19.491167
2146 07:03:19.493924 Sending tftp read request... done.
2147 07:03:19.494012
2148 07:03:19.497611 Waiting for the transfer...
2149 07:03:19.497712
2150 07:03:19.497802 00000000 # done.
2151 07:03:19.497880
2152 07:03:19.507605 Command line loaded dynamically from TFTP file: 9726630/tftp-deploy-kg4wuhvh/kernel/cmdline
2153 07:03:19.507707
2154 07:03:19.523978 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 07:03:19.524110
2156 07:03:19.530193 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 07:03:19.535365
2158 07:03:19.538650 Shutting down all USB controllers.
2159 07:03:19.538746
2160 07:03:19.538830 Removing current net device
2161 07:03:19.542437
2162 07:03:19.542540 Finalizing coreboot
2163 07:03:19.542617
2164 07:03:19.548886 Exiting depthcharge with code 4 at timestamp: 30649882
2165 07:03:19.548985
2166 07:03:19.549062
2167 07:03:19.549132 Starting kernel ...
2168 07:03:19.549201
2169 07:03:19.549614 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2170 07:03:19.549728 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2171 07:03:19.549813 Setting prompt string to ['Linux version [0-9]']
2172 07:03:19.549891 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 07:03:19.549969 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 07:03:19.552172
2176 07:07:38.551353 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2178 07:07:38.552398 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2180 07:07:38.553219 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 07:07:38.554455 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 07:07:38.554726 Cleaning after the job
2186 07:07:38.554819 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/ramdisk
2187 07:07:38.555624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/kernel
2188 07:07:38.556427 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726630/tftp-deploy-kg4wuhvh/modules
2189 07:07:38.556799 start: 5.1 power-off (timeout 00:00:30) [common]
2190 07:07:38.556964 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2191 07:07:38.640440 >> Command sent successfully.
2192 07:07:38.649193 Returned 0 in 0 seconds
2193 07:07:38.750775 end: 5.1 power-off (duration 00:00:00) [common]
2195 07:07:38.752362 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 07:07:38.753510 Listened to connection for namespace 'common' for up to 1s
2198 07:07:38.754805 Listened to connection for namespace 'common' for up to 1s
2199 07:07:39.758044 Finalising connection for namespace 'common'
2200 07:07:39.758244 Disconnecting from shell: Finalise
2201 07:07:39.758344
2202 07:07:39.859418 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 07:07:39.860009 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726630
2204 07:07:39.869990 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726630
2205 07:07:39.870132 JobError: Your job cannot terminate cleanly.