Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:02:36.820502 lava-dispatcher, installed at version: 2023.01
2 07:02:36.820703 start: 0 validate
3 07:02:36.820830 Start time: 2023-03-22 07:02:36.820825+00:00 (UTC)
4 07:02:36.820954 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:02:36.821080 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 07:02:37.114631 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:02:37.115377 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:02:40.118139 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:02:40.118862 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:02:40.421689 validate duration: 3.60
12 07:02:40.423099 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:02:40.423974 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:02:40.424538 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:02:40.425120 Not decompressing ramdisk as can be used compressed.
16 07:02:40.425641 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 07:02:40.426029 saving as /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/ramdisk/rootfs.cpio.gz
18 07:02:40.426373 total size: 8429740 (8MB)
19 07:02:41.229611 progress 0% (0MB)
20 07:02:41.242786 progress 5% (0MB)
21 07:02:41.255471 progress 10% (0MB)
22 07:02:41.265103 progress 15% (1MB)
23 07:02:41.270995 progress 20% (1MB)
24 07:02:41.275681 progress 25% (2MB)
25 07:02:41.279633 progress 30% (2MB)
26 07:02:41.283149 progress 35% (2MB)
27 07:02:41.286194 progress 40% (3MB)
28 07:02:41.289219 progress 45% (3MB)
29 07:02:41.291943 progress 50% (4MB)
30 07:02:41.294546 progress 55% (4MB)
31 07:02:41.296964 progress 60% (4MB)
32 07:02:41.299292 progress 65% (5MB)
33 07:02:41.301508 progress 70% (5MB)
34 07:02:41.303474 progress 75% (6MB)
35 07:02:41.305625 progress 80% (6MB)
36 07:02:41.307709 progress 85% (6MB)
37 07:02:41.309734 progress 90% (7MB)
38 07:02:41.311796 progress 95% (7MB)
39 07:02:41.313803 progress 100% (8MB)
40 07:02:41.313932 8MB downloaded in 0.89s (9.06MB/s)
41 07:02:41.314073 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:02:41.314310 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:02:41.314397 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:02:41.314536 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:02:41.314710 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:02:41.314784 saving as /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/kernel/bzImage
48 07:02:41.314846 total size: 11637120 (11MB)
49 07:02:41.314906 No compression specified
50 07:02:41.315761 progress 0% (0MB)
51 07:02:41.318493 progress 5% (0MB)
52 07:02:41.321359 progress 10% (1MB)
53 07:02:41.324185 progress 15% (1MB)
54 07:02:41.327032 progress 20% (2MB)
55 07:02:41.329653 progress 25% (2MB)
56 07:02:41.332469 progress 30% (3MB)
57 07:02:41.335382 progress 35% (3MB)
58 07:02:41.338287 progress 40% (4MB)
59 07:02:41.341014 progress 45% (5MB)
60 07:02:41.343911 progress 50% (5MB)
61 07:02:41.346805 progress 55% (6MB)
62 07:02:41.349702 progress 60% (6MB)
63 07:02:41.352610 progress 65% (7MB)
64 07:02:41.355427 progress 70% (7MB)
65 07:02:41.358250 progress 75% (8MB)
66 07:02:41.361072 progress 80% (8MB)
67 07:02:41.363722 progress 85% (9MB)
68 07:02:41.366640 progress 90% (10MB)
69 07:02:41.369458 progress 95% (10MB)
70 07:02:41.372300 progress 100% (11MB)
71 07:02:41.372419 11MB downloaded in 0.06s (192.78MB/s)
72 07:02:41.372566 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:02:41.372803 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:02:41.372891 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:02:41.372981 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:02:41.373086 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:02:41.373156 saving as /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/modules/modules.tar
79 07:02:41.373217 total size: 499012 (0MB)
80 07:02:41.373278 Using unxz to decompress xz
81 07:02:41.376549 progress 6% (0MB)
82 07:02:41.376906 progress 13% (0MB)
83 07:02:41.377140 progress 19% (0MB)
84 07:02:41.378554 progress 26% (0MB)
85 07:02:41.380603 progress 32% (0MB)
86 07:02:41.382607 progress 39% (0MB)
87 07:02:41.384582 progress 45% (0MB)
88 07:02:41.386580 progress 52% (0MB)
89 07:02:41.388460 progress 59% (0MB)
90 07:02:41.390694 progress 65% (0MB)
91 07:02:41.392584 progress 72% (0MB)
92 07:02:41.394614 progress 78% (0MB)
93 07:02:41.396563 progress 85% (0MB)
94 07:02:41.398450 progress 91% (0MB)
95 07:02:41.400297 progress 98% (0MB)
96 07:02:41.407648 0MB downloaded in 0.03s (13.83MB/s)
97 07:02:41.407940 end: 1.3.1 http-download (duration 00:00:00) [common]
99 07:02:41.408210 end: 1.3 download-retry (duration 00:00:00) [common]
100 07:02:41.408306 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 07:02:41.408400 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 07:02:41.408485 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 07:02:41.408570 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 07:02:41.408751 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5
105 07:02:41.408858 makedir: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin
106 07:02:41.408944 makedir: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/tests
107 07:02:41.409025 makedir: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/results
108 07:02:41.409130 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-add-keys
109 07:02:41.409266 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-add-sources
110 07:02:41.409385 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-background-process-start
111 07:02:41.409496 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-background-process-stop
112 07:02:41.409608 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-common-functions
113 07:02:41.409759 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-echo-ipv4
114 07:02:41.409906 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-install-packages
115 07:02:41.410017 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-installed-packages
116 07:02:41.410124 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-os-build
117 07:02:41.410233 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-probe-channel
118 07:02:41.410343 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-probe-ip
119 07:02:41.410451 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-target-ip
120 07:02:41.410599 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-target-mac
121 07:02:41.410709 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-target-storage
122 07:02:41.410821 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-case
123 07:02:41.410929 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-event
124 07:02:41.411037 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-feedback
125 07:02:41.411147 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-raise
126 07:02:41.411261 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-reference
127 07:02:41.411370 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-runner
128 07:02:41.411478 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-set
129 07:02:41.411586 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-test-shell
130 07:02:41.411697 Updating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-install-packages (oe)
131 07:02:41.411812 Updating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/bin/lava-installed-packages (oe)
132 07:02:41.411914 Creating /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/environment
133 07:02:41.412000 LAVA metadata
134 07:02:41.412073 - LAVA_JOB_ID=9726648
135 07:02:41.412139 - LAVA_DISPATCHER_IP=192.168.201.1
136 07:02:41.412244 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 07:02:41.412310 skipped lava-vland-overlay
138 07:02:41.412389 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 07:02:41.412474 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 07:02:41.412537 skipped lava-multinode-overlay
141 07:02:41.412612 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 07:02:41.412697 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 07:02:41.412771 Loading test definitions
144 07:02:41.412867 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 07:02:41.412940 Using /lava-9726648 at stage 0
146 07:02:41.413197 uuid=9726648_1.4.2.3.1 testdef=None
147 07:02:41.413287 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 07:02:41.413404 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 07:02:41.413902 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 07:02:41.414133 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 07:02:41.414733 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 07:02:41.414992 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 07:02:41.415533 runner path: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/0/tests/0_dmesg test_uuid 9726648_1.4.2.3.1
156 07:02:41.415682 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 07:02:41.415914 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 07:02:41.415987 Using /lava-9726648 at stage 1
160 07:02:41.416232 uuid=9726648_1.4.2.3.5 testdef=None
161 07:02:41.416322 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 07:02:41.416408 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 07:02:41.416916 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 07:02:41.417140 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 07:02:41.417704 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 07:02:41.417940 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 07:02:41.418474 runner path: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/1/tests/1_bootrr test_uuid 9726648_1.4.2.3.5
170 07:02:41.418656 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 07:02:41.418867 Creating lava-test-runner.conf files
173 07:02:41.418931 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/0 for stage 0
174 07:02:41.419013 - 0_dmesg
175 07:02:41.419089 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726648/lava-overlay-0ws67el5/lava-9726648/1 for stage 1
176 07:02:41.419171 - 1_bootrr
177 07:02:41.419262 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 07:02:41.419351 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 07:02:41.425711 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 07:02:41.425838 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 07:02:41.425932 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 07:02:41.426022 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 07:02:41.426110 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 07:02:41.613015 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 07:02:41.613374 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 07:02:41.613486 extracting modules file /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726648/extract-overlay-ramdisk-gmq5pak_/ramdisk
187 07:02:41.627665 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 07:02:41.627824 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 07:02:41.627946 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726648/compress-overlay-f9vrehfv/overlay-1.4.2.4.tar.gz to ramdisk
190 07:02:41.628053 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726648/compress-overlay-f9vrehfv/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726648/extract-overlay-ramdisk-gmq5pak_/ramdisk
191 07:02:41.632585 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 07:02:41.632717 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 07:02:41.632811 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 07:02:41.632898 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 07:02:41.632979 Building ramdisk /var/lib/lava/dispatcher/tmp/9726648/extract-overlay-ramdisk-gmq5pak_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726648/extract-overlay-ramdisk-gmq5pak_/ramdisk
196 07:02:41.707301 >> 53719 blocks
197 07:02:42.573143 rename /var/lib/lava/dispatcher/tmp/9726648/extract-overlay-ramdisk-gmq5pak_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
198 07:02:42.573648 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 07:02:42.573816 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 07:02:42.573973 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 07:02:42.574111 No mkimage arch provided, not using FIT.
202 07:02:42.574247 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 07:02:42.574379 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 07:02:42.574544 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 07:02:42.574691 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 07:02:42.574809 No LXC device requested
207 07:02:42.574933 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 07:02:42.575072 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 07:02:42.575197 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 07:02:42.575304 Checking files for TFTP limit of 4294967296 bytes.
211 07:02:42.575821 end: 1 tftp-deploy (duration 00:00:02) [common]
212 07:02:42.575969 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 07:02:42.576106 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 07:02:42.576284 substitutions:
215 07:02:42.576388 - {DTB}: None
216 07:02:42.576488 - {INITRD}: 9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
217 07:02:42.576586 - {KERNEL}: 9726648/tftp-deploy-r64x1rps/kernel/bzImage
218 07:02:42.576682 - {LAVA_MAC}: None
219 07:02:42.576779 - {PRESEED_CONFIG}: None
220 07:02:42.576873 - {PRESEED_LOCAL}: None
221 07:02:42.576969 - {RAMDISK}: 9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
222 07:02:42.577065 - {ROOT_PART}: None
223 07:02:42.577159 - {ROOT}: None
224 07:02:42.577254 - {SERVER_IP}: 192.168.201.1
225 07:02:42.577349 - {TEE}: None
226 07:02:42.577443 Parsed boot commands:
227 07:02:42.577534 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 07:02:42.577752 Parsed boot commands: tftpboot 192.168.201.1 9726648/tftp-deploy-r64x1rps/kernel/bzImage 9726648/tftp-deploy-r64x1rps/kernel/cmdline 9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
229 07:02:42.577896 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 07:02:42.578031 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 07:02:42.578174 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 07:02:42.578311 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 07:02:42.578418 Not connected, no need to disconnect.
234 07:02:42.578546 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 07:02:42.578680 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 07:02:42.578787 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
237 07:02:42.582387 Setting prompt string to ['lava-test: # ']
238 07:02:42.582773 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 07:02:42.582923 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 07:02:42.583064 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 07:02:42.583199 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 07:02:42.583484 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
243 07:02:47.718546 >> Command sent successfully.
244 07:02:47.720868 Returned 0 in 5 seconds
245 07:02:47.821657 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 07:02:47.822012 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 07:02:47.822120 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 07:02:47.822212 Setting prompt string to 'Starting depthcharge on Voema...'
250 07:02:47.822279 Changing prompt to 'Starting depthcharge on Voema...'
251 07:02:47.822350 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 07:02:47.822667 [Enter `^Ec?' for help]
253 07:02:49.425885
254 07:02:49.426059
255 07:02:49.435689 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 07:02:49.438885 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 07:02:49.445453 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 07:02:49.448667 CPU: AES supported, TXT NOT supported, VT supported
259 07:02:49.455489 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 07:02:49.461698 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 07:02:49.465136 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 07:02:49.468653 VBOOT: Loading verstage.
263 07:02:49.475031 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 07:02:49.479469 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 07:02:49.482088 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 07:02:49.492758 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 07:02:49.499759 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 07:02:49.499899
269 07:02:49.499987
270 07:02:49.512663 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 07:02:49.526325 Probing TPM: . done!
272 07:02:49.529171 TPM ready after 0 ms
273 07:02:49.532442 Connected to device vid:did:rid of 1ae0:0028:00
274 07:02:49.544117 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
275 07:02:49.550828 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 07:02:49.553855 Initialized TPM device CR50 revision 0
277 07:02:49.606266 tlcl_send_startup: Startup return code is 0
278 07:02:49.606432 TPM: setup succeeded
279 07:02:49.621419 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 07:02:49.635438 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 07:02:49.648371 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 07:02:49.658240 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 07:02:49.661731 Chrome EC: UHEPI supported
284 07:02:49.666751 Phase 1
285 07:02:49.669189 FMAP: area GBB found @ 1805000 (458752 bytes)
286 07:02:49.678972 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 07:02:49.686106 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 07:02:49.692059 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 07:02:49.698533 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 07:02:49.701725 Recovery requested (1009000e)
291 07:02:49.711224 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 07:02:49.717717 tlcl_extend: response is 0
293 07:02:49.723892 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 07:02:49.735275 tlcl_extend: response is 0
295 07:02:49.740949 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 07:02:49.748109 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 07:02:49.753758 BS: verstage times (exec / console): total (unknown) / 142 ms
298 07:02:49.753920
299 07:02:49.754019
300 07:02:49.766981 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 07:02:49.773869 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 07:02:49.776950 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 07:02:49.780079 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 07:02:49.787250 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 07:02:49.790657 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 07:02:49.793432 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 07:02:49.796754 TCO_STS: 0000 0000
308 07:02:49.800578 GEN_PMCON: d0015038 00002200
309 07:02:49.803401 GBLRST_CAUSE: 00000000 00000000
310 07:02:49.807089 HPR_CAUSE0: 00000000
311 07:02:49.807308 prev_sleep_state 5
312 07:02:49.810067 Boot Count incremented to 18599
313 07:02:49.816468 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 07:02:49.823153 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 07:02:49.833146 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 07:02:49.839562 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 07:02:49.843748 Chrome EC: UHEPI supported
318 07:02:49.849572 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 07:02:49.860740 Probing TPM: done!
320 07:02:49.867276 Connected to device vid:did:rid of 1ae0:0028:00
321 07:02:49.878327 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
322 07:02:49.882043 Initialized TPM device CR50 revision 0
323 07:02:49.895991 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 07:02:49.903118 MRC: Hash idx 0x100b comparison successful.
325 07:02:49.905824 MRC cache found, size faa8
326 07:02:49.906013 bootmode is set to: 2
327 07:02:49.908919 SPD index = 0
328 07:02:49.916297 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 07:02:49.918834 SPD: module type is LPDDR4X
330 07:02:49.922271 SPD: module part number is MT53E512M64D4NW-046
331 07:02:49.929622 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 07:02:49.935251 SPD: device width 16 bits, bus width 16 bits
333 07:02:49.938809 SPD: module size is 1024 MB (per channel)
334 07:02:50.371135 CBMEM:
335 07:02:50.374818 IMD: root @ 0x76fff000 254 entries.
336 07:02:50.378402 IMD: root @ 0x76ffec00 62 entries.
337 07:02:50.380897 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 07:02:50.387914 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 07:02:50.390712 External stage cache:
340 07:02:50.394068 IMD: root @ 0x7b3ff000 254 entries.
341 07:02:50.398198 IMD: root @ 0x7b3fec00 62 entries.
342 07:02:50.413432 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 07:02:50.419318 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 07:02:50.425896 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 07:02:50.440630 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 07:02:50.447805 cse_lite: Skip switching to RW in the recovery path
347 07:02:50.447986 8 DIMMs found
348 07:02:50.448098 SMM Memory Map
349 07:02:50.454402 SMRAM : 0x7b000000 0x800000
350 07:02:50.454569 Subregion 0: 0x7b000000 0x200000
351 07:02:50.457913 Subregion 1: 0x7b200000 0x200000
352 07:02:50.461043 Subregion 2: 0x7b400000 0x400000
353 07:02:50.464873 top_of_ram = 0x77000000
354 07:02:50.470950 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 07:02:50.474705 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 07:02:50.481124 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 07:02:50.485092 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 07:02:50.495059 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 07:02:50.498003 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 07:02:50.509622 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 07:02:50.516201 Processing 211 relocs. Offset value of 0x74c0b000
362 07:02:50.522804 BS: romstage times (exec / console): total (unknown) / 277 ms
363 07:02:50.529031
364 07:02:50.529219
365 07:02:50.539634 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 07:02:50.542301 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 07:02:50.552097 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 07:02:50.559036 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 07:02:50.565831 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 07:02:50.572043 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 07:02:50.619529 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 07:02:50.625803 Processing 5008 relocs. Offset value of 0x75d98000
373 07:02:50.629408 BS: postcar times (exec / console): total (unknown) / 59 ms
374 07:02:50.632539
375 07:02:50.632747
376 07:02:50.642215 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 07:02:50.642447 Normal boot
378 07:02:50.645762 FW_CONFIG value is 0x804c02
379 07:02:50.649089 PCI: 00:07.0 disabled by fw_config
380 07:02:50.652918 PCI: 00:07.1 disabled by fw_config
381 07:02:50.656564 PCI: 00:0d.2 disabled by fw_config
382 07:02:50.659306 PCI: 00:1c.7 disabled by fw_config
383 07:02:50.666141 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 07:02:50.673029 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 07:02:50.675974 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 07:02:50.679837 GENERIC: 0.0 disabled by fw_config
387 07:02:50.682733 GENERIC: 1.0 disabled by fw_config
388 07:02:50.689258 fw_config match found: DB_USB=USB3_ACTIVE
389 07:02:50.692625 fw_config match found: DB_USB=USB3_ACTIVE
390 07:02:50.695917 fw_config match found: DB_USB=USB3_ACTIVE
391 07:02:50.699383 fw_config match found: DB_USB=USB3_ACTIVE
392 07:02:50.705743 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 07:02:50.712524 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 07:02:50.722179 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 07:02:50.728757 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 07:02:50.732230 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 07:02:50.739173 microcode: Update skipped, already up-to-date
398 07:02:50.745454 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 07:02:50.772813 Detected 4 core, 8 thread CPU.
400 07:02:50.776386 Setting up SMI for CPU
401 07:02:50.780033 IED base = 0x7b400000
402 07:02:50.780136 IED size = 0x00400000
403 07:02:50.783289 Will perform SMM setup.
404 07:02:50.789660 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 07:02:50.796173 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 07:02:50.802883 Processing 16 relocs. Offset value of 0x00030000
407 07:02:50.806498 Attempting to start 7 APs
408 07:02:50.809115 Waiting for 10ms after sending INIT.
409 07:02:50.825022 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 07:02:50.825170 done.
411 07:02:50.828303 AP: slot 5 apic_id 6.
412 07:02:50.831684 AP: slot 2 apic_id 7.
413 07:02:50.831774 AP: slot 6 apic_id 3.
414 07:02:50.835067 AP: slot 3 apic_id 2.
415 07:02:50.838241 AP: slot 7 apic_id 5.
416 07:02:50.838332 AP: slot 4 apic_id 4.
417 07:02:50.844748 Waiting for 2nd SIPI to complete...done.
418 07:02:50.852026 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 07:02:50.858412 Processing 13 relocs. Offset value of 0x00038000
420 07:02:50.858503 Unable to locate Global NVS
421 07:02:50.868230 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 07:02:50.871636 Installing permanent SMM handler to 0x7b000000
423 07:02:50.881338 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 07:02:50.885033 Processing 794 relocs. Offset value of 0x7b010000
425 07:02:50.895565 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 07:02:50.897664 Processing 13 relocs. Offset value of 0x7b008000
427 07:02:50.905018 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 07:02:50.910955 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 07:02:50.914861 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 07:02:50.921056 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 07:02:50.927678 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 07:02:50.934168 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 07:02:50.941361 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 07:02:50.941464 Unable to locate Global NVS
435 07:02:50.950918 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 07:02:50.954314 Clearing SMI status registers
437 07:02:50.954403 SMI_STS: PM1
438 07:02:50.957451 PM1_STS: PWRBTN
439 07:02:50.964114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 07:02:50.967305 In relocation handler: CPU 0
441 07:02:50.971058 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 07:02:50.977534 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 07:02:50.977624 Relocation complete.
444 07:02:50.987588 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 07:02:50.990718 In relocation handler: CPU 1
446 07:02:50.993779 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 07:02:50.993868 Relocation complete.
448 07:02:51.004034 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 07:02:51.004138 In relocation handler: CPU 2
450 07:02:51.010371 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 07:02:51.010460 Relocation complete.
452 07:02:51.021030 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
453 07:02:51.021130 In relocation handler: CPU 5
454 07:02:51.027242 New SMBASE=0x7affec00 IEDBASE=0x7b400000
455 07:02:51.030631 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 07:02:51.034003 Relocation complete.
457 07:02:51.040842 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
458 07:02:51.043551 In relocation handler: CPU 4
459 07:02:51.047129 New SMBASE=0x7afff000 IEDBASE=0x7b400000
460 07:02:51.053805 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 07:02:51.053893 Relocation complete.
462 07:02:51.063583 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
463 07:02:51.063674 In relocation handler: CPU 7
464 07:02:51.070105 New SMBASE=0x7affe400 IEDBASE=0x7b400000
465 07:02:51.070196 Relocation complete.
466 07:02:51.079712 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
467 07:02:51.079802 In relocation handler: CPU 6
468 07:02:51.086455 New SMBASE=0x7affe800 IEDBASE=0x7b400000
469 07:02:51.086549 Relocation complete.
470 07:02:51.093255 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
471 07:02:51.096249 In relocation handler: CPU 3
472 07:02:51.103036 New SMBASE=0x7afff400 IEDBASE=0x7b400000
473 07:02:51.106437 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 07:02:51.109637 Relocation complete.
475 07:02:51.109726 Initializing CPU #0
476 07:02:51.113391 CPU: vendor Intel device 806c1
477 07:02:51.119367 CPU: family 06, model 8c, stepping 01
478 07:02:51.119455 Clearing out pending MCEs
479 07:02:51.123700 Setting up local APIC...
480 07:02:51.127131 apic_id: 0x00 done.
481 07:02:51.127221 Turbo is available but hidden
482 07:02:51.131528 Turbo is available and visible
483 07:02:51.135052 microcode: Update skipped, already up-to-date
484 07:02:51.138657 CPU #0 initialized
485 07:02:51.142217 Initializing CPU #7
486 07:02:51.142307 Initializing CPU #4
487 07:02:51.145027 CPU: vendor Intel device 806c1
488 07:02:51.148030 CPU: family 06, model 8c, stepping 01
489 07:02:51.151613 CPU: vendor Intel device 806c1
490 07:02:51.158887 CPU: family 06, model 8c, stepping 01
491 07:02:51.158976 Clearing out pending MCEs
492 07:02:51.161697 Clearing out pending MCEs
493 07:02:51.164812 Setting up local APIC...
494 07:02:51.167967 Initializing CPU #1
495 07:02:51.168055 Initializing CPU #3
496 07:02:51.171629 Initializing CPU #6
497 07:02:51.174914 CPU: vendor Intel device 806c1
498 07:02:51.179053 CPU: family 06, model 8c, stepping 01
499 07:02:51.181196 CPU: vendor Intel device 806c1
500 07:02:51.184431 CPU: family 06, model 8c, stepping 01
501 07:02:51.187927 Clearing out pending MCEs
502 07:02:51.190999 Clearing out pending MCEs
503 07:02:51.191086 Setting up local APIC...
504 07:02:51.194687 apic_id: 0x05 done.
505 07:02:51.197916 Setting up local APIC...
506 07:02:51.198003 Setting up local APIC...
507 07:02:51.201015 apic_id: 0x04 done.
508 07:02:51.208164 microcode: Update skipped, already up-to-date
509 07:02:51.211051 microcode: Update skipped, already up-to-date
510 07:02:51.211139 CPU #7 initialized
511 07:02:51.214399 CPU #4 initialized
512 07:02:51.218233 Initializing CPU #2
513 07:02:51.218322 Initializing CPU #5
514 07:02:51.221249 CPU: vendor Intel device 806c1
515 07:02:51.224648 CPU: family 06, model 8c, stepping 01
516 07:02:51.228285 CPU: vendor Intel device 806c1
517 07:02:51.230966 CPU: family 06, model 8c, stepping 01
518 07:02:51.234808 Clearing out pending MCEs
519 07:02:51.238149 Clearing out pending MCEs
520 07:02:51.241275 Setting up local APIC...
521 07:02:51.241366 apic_id: 0x03 done.
522 07:02:51.244603 apic_id: 0x02 done.
523 07:02:51.250835 microcode: Update skipped, already up-to-date
524 07:02:51.254655 microcode: Update skipped, already up-to-date
525 07:02:51.254750 CPU #6 initialized
526 07:02:51.257726 CPU #3 initialized
527 07:02:51.261143 CPU: vendor Intel device 806c1
528 07:02:51.264559 CPU: family 06, model 8c, stepping 01
529 07:02:51.267853 Setting up local APIC...
530 07:02:51.271500 Clearing out pending MCEs
531 07:02:51.271592 apic_id: 0x06 done.
532 07:02:51.274415 apic_id: 0x07 done.
533 07:02:51.277291 microcode: Update skipped, already up-to-date
534 07:02:51.284288 microcode: Update skipped, already up-to-date
535 07:02:51.284395 CPU #5 initialized
536 07:02:51.287864 CPU #2 initialized
537 07:02:51.290866 Setting up local APIC...
538 07:02:51.290957 apic_id: 0x01 done.
539 07:02:51.297624 microcode: Update skipped, already up-to-date
540 07:02:51.297720 CPU #1 initialized
541 07:02:51.304434 bsp_do_flight_plan done after 455 msecs.
542 07:02:51.307794 CPU: frequency set to 4000 MHz
543 07:02:51.307886 Enabling SMIs.
544 07:02:51.313802 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 07:02:51.330324 SATAXPCIE1 indicates PCIe NVMe is present
546 07:02:51.333344 Probing TPM: done!
547 07:02:51.336981 Connected to device vid:did:rid of 1ae0:0028:00
548 07:02:51.347589 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
549 07:02:51.350900 Initialized TPM device CR50 revision 0
550 07:02:51.354502 Enabling S0i3.4
551 07:02:51.360726 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 07:02:51.364704 Found a VBT of 8704 bytes after decompression
553 07:02:51.370413 cse_lite: CSE RO boot. HybridStorageMode disabled
554 07:02:51.376993 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 07:02:51.453295 FSPS returned 0
556 07:02:51.456242 Executing Phase 1 of FspMultiPhaseSiInit
557 07:02:51.466561 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 07:02:51.469515 port C0 DISC req: usage 1 usb3 1 usb2 5
559 07:02:51.473081 Raw Buffer output 0 00000511
560 07:02:51.476274 Raw Buffer output 1 00000000
561 07:02:51.480233 pmc_send_ipc_cmd succeeded
562 07:02:51.487143 port C1 DISC req: usage 1 usb3 2 usb2 3
563 07:02:51.487264 Raw Buffer output 0 00000321
564 07:02:51.489978 Raw Buffer output 1 00000000
565 07:02:51.494063 pmc_send_ipc_cmd succeeded
566 07:02:51.499749 Detected 4 core, 8 thread CPU.
567 07:02:51.502793 Detected 4 core, 8 thread CPU.
568 07:02:51.736744 Display FSP Version Info HOB
569 07:02:51.739747 Reference Code - CPU = a.0.4c.31
570 07:02:51.743102 uCode Version = 0.0.0.86
571 07:02:51.746733 TXT ACM version = ff.ff.ff.ffff
572 07:02:51.750128 Reference Code - ME = a.0.4c.31
573 07:02:51.752999 MEBx version = 0.0.0.0
574 07:02:51.756920 ME Firmware Version = Consumer SKU
575 07:02:51.760432 Reference Code - PCH = a.0.4c.31
576 07:02:51.762874 PCH-CRID Status = Disabled
577 07:02:51.766742 PCH-CRID Original Value = ff.ff.ff.ffff
578 07:02:51.770457 PCH-CRID New Value = ff.ff.ff.ffff
579 07:02:51.773620 OPROM - RST - RAID = ff.ff.ff.ffff
580 07:02:51.776224 PCH Hsio Version = 4.0.0.0
581 07:02:51.779998 Reference Code - SA - System Agent = a.0.4c.31
582 07:02:51.782741 Reference Code - MRC = 2.0.0.1
583 07:02:51.786384 SA - PCIe Version = a.0.4c.31
584 07:02:51.789719 SA-CRID Status = Disabled
585 07:02:51.793390 SA-CRID Original Value = 0.0.0.1
586 07:02:51.796145 SA-CRID New Value = 0.0.0.1
587 07:02:51.799747 OPROM - VBIOS = ff.ff.ff.ffff
588 07:02:51.803123 IO Manageability Engine FW Version = 11.1.4.0
589 07:02:51.806071 PHY Build Version = 0.0.0.e0
590 07:02:51.809705 Thunderbolt(TM) FW Version = 0.0.0.0
591 07:02:51.816133 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 07:02:51.819739 ITSS IRQ Polarities Before:
593 07:02:51.819829 IPC0: 0xffffffff
594 07:02:51.822708 IPC1: 0xffffffff
595 07:02:51.822796 IPC2: 0xffffffff
596 07:02:51.826245 IPC3: 0xffffffff
597 07:02:51.829236 ITSS IRQ Polarities After:
598 07:02:51.829324 IPC0: 0xffffffff
599 07:02:51.832738 IPC1: 0xffffffff
600 07:02:51.832826 IPC2: 0xffffffff
601 07:02:51.836000 IPC3: 0xffffffff
602 07:02:51.839176 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 07:02:51.853007 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 07:02:51.862737 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 07:02:51.876589 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 07:02:51.881924 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 07:02:51.885391 Enumerating buses...
608 07:02:51.888573 Show all devs... Before device enumeration.
609 07:02:51.892411 Root Device: enabled 1
610 07:02:51.892498 DOMAIN: 0000: enabled 1
611 07:02:51.895825 CPU_CLUSTER: 0: enabled 1
612 07:02:51.898605 PCI: 00:00.0: enabled 1
613 07:02:51.901892 PCI: 00:02.0: enabled 1
614 07:02:51.901979 PCI: 00:04.0: enabled 1
615 07:02:51.905649 PCI: 00:05.0: enabled 1
616 07:02:51.908369 PCI: 00:06.0: enabled 0
617 07:02:51.911852 PCI: 00:07.0: enabled 0
618 07:02:51.911938 PCI: 00:07.1: enabled 0
619 07:02:51.915484 PCI: 00:07.2: enabled 0
620 07:02:51.919020 PCI: 00:07.3: enabled 0
621 07:02:51.921881 PCI: 00:08.0: enabled 1
622 07:02:51.921967 PCI: 00:09.0: enabled 0
623 07:02:51.925174 PCI: 00:0a.0: enabled 0
624 07:02:51.928972 PCI: 00:0d.0: enabled 1
625 07:02:51.931569 PCI: 00:0d.1: enabled 0
626 07:02:51.931661 PCI: 00:0d.2: enabled 0
627 07:02:51.935100 PCI: 00:0d.3: enabled 0
628 07:02:51.938364 PCI: 00:0e.0: enabled 0
629 07:02:51.942390 PCI: 00:10.2: enabled 1
630 07:02:51.942512 PCI: 00:10.6: enabled 0
631 07:02:51.945726 PCI: 00:10.7: enabled 0
632 07:02:51.948768 PCI: 00:12.0: enabled 0
633 07:02:51.951956 PCI: 00:12.6: enabled 0
634 07:02:51.952256 PCI: 00:13.0: enabled 0
635 07:02:51.955558 PCI: 00:14.0: enabled 1
636 07:02:51.958685 PCI: 00:14.1: enabled 0
637 07:02:51.961683 PCI: 00:14.2: enabled 1
638 07:02:51.961965 PCI: 00:14.3: enabled 1
639 07:02:51.964980 PCI: 00:15.0: enabled 1
640 07:02:51.969115 PCI: 00:15.1: enabled 1
641 07:02:51.969578 PCI: 00:15.2: enabled 1
642 07:02:51.972182 PCI: 00:15.3: enabled 1
643 07:02:51.975368 PCI: 00:16.0: enabled 1
644 07:02:51.978267 PCI: 00:16.1: enabled 0
645 07:02:51.978703 PCI: 00:16.2: enabled 0
646 07:02:51.982006 PCI: 00:16.3: enabled 0
647 07:02:51.985523 PCI: 00:16.4: enabled 0
648 07:02:51.988638 PCI: 00:16.5: enabled 0
649 07:02:51.989054 PCI: 00:17.0: enabled 1
650 07:02:51.991650 PCI: 00:19.0: enabled 0
651 07:02:51.995408 PCI: 00:19.1: enabled 1
652 07:02:51.998241 PCI: 00:19.2: enabled 0
653 07:02:51.998686 PCI: 00:1c.0: enabled 1
654 07:02:52.001859 PCI: 00:1c.1: enabled 0
655 07:02:52.004912 PCI: 00:1c.2: enabled 0
656 07:02:52.008123 PCI: 00:1c.3: enabled 0
657 07:02:52.008540 PCI: 00:1c.4: enabled 0
658 07:02:52.011399 PCI: 00:1c.5: enabled 0
659 07:02:52.014572 PCI: 00:1c.6: enabled 1
660 07:02:52.015055 PCI: 00:1c.7: enabled 0
661 07:02:52.017916 PCI: 00:1d.0: enabled 1
662 07:02:52.022383 PCI: 00:1d.1: enabled 0
663 07:02:52.024986 PCI: 00:1d.2: enabled 1
664 07:02:52.025393 PCI: 00:1d.3: enabled 0
665 07:02:52.028516 PCI: 00:1e.0: enabled 1
666 07:02:52.031421 PCI: 00:1e.1: enabled 0
667 07:02:52.034850 PCI: 00:1e.2: enabled 1
668 07:02:52.035142 PCI: 00:1e.3: enabled 1
669 07:02:52.038232 PCI: 00:1f.0: enabled 1
670 07:02:52.041233 PCI: 00:1f.1: enabled 0
671 07:02:52.044636 PCI: 00:1f.2: enabled 1
672 07:02:52.044820 PCI: 00:1f.3: enabled 1
673 07:02:52.047443 PCI: 00:1f.4: enabled 0
674 07:02:52.051137 PCI: 00:1f.5: enabled 1
675 07:02:52.054732 PCI: 00:1f.6: enabled 0
676 07:02:52.054869 PCI: 00:1f.7: enabled 0
677 07:02:52.057687 APIC: 00: enabled 1
678 07:02:52.060909 GENERIC: 0.0: enabled 1
679 07:02:52.061253 GENERIC: 0.0: enabled 1
680 07:02:52.064079 GENERIC: 1.0: enabled 1
681 07:02:52.067637 GENERIC: 0.0: enabled 1
682 07:02:52.070954 GENERIC: 1.0: enabled 1
683 07:02:52.071206 USB0 port 0: enabled 1
684 07:02:52.074583 GENERIC: 0.0: enabled 1
685 07:02:52.078134 USB0 port 0: enabled 1
686 07:02:52.078475 GENERIC: 0.0: enabled 1
687 07:02:52.080905 I2C: 00:1a: enabled 1
688 07:02:52.085140 I2C: 00:31: enabled 1
689 07:02:52.087482 I2C: 00:32: enabled 1
690 07:02:52.087743 I2C: 00:10: enabled 1
691 07:02:52.091268 I2C: 00:15: enabled 1
692 07:02:52.093954 GENERIC: 0.0: enabled 0
693 07:02:52.094212 GENERIC: 1.0: enabled 0
694 07:02:52.097283 GENERIC: 0.0: enabled 1
695 07:02:52.100700 SPI: 00: enabled 1
696 07:02:52.101056 SPI: 00: enabled 1
697 07:02:52.103975 PNP: 0c09.0: enabled 1
698 07:02:52.107344 GENERIC: 0.0: enabled 1
699 07:02:52.107605 USB3 port 0: enabled 1
700 07:02:52.110576 USB3 port 1: enabled 1
701 07:02:52.114035 USB3 port 2: enabled 0
702 07:02:52.117539 USB3 port 3: enabled 0
703 07:02:52.117957 USB2 port 0: enabled 0
704 07:02:52.121227 USB2 port 1: enabled 1
705 07:02:52.124126 USB2 port 2: enabled 1
706 07:02:52.124544 USB2 port 3: enabled 0
707 07:02:52.127568 USB2 port 4: enabled 1
708 07:02:52.131029 USB2 port 5: enabled 0
709 07:02:52.134710 USB2 port 6: enabled 0
710 07:02:52.135225 USB2 port 7: enabled 0
711 07:02:52.137437 USB2 port 8: enabled 0
712 07:02:52.140517 USB2 port 9: enabled 0
713 07:02:52.140937 USB3 port 0: enabled 0
714 07:02:52.144678 USB3 port 1: enabled 1
715 07:02:52.147416 USB3 port 2: enabled 0
716 07:02:52.150773 USB3 port 3: enabled 0
717 07:02:52.151190 GENERIC: 0.0: enabled 1
718 07:02:52.154103 GENERIC: 1.0: enabled 1
719 07:02:52.157104 APIC: 01: enabled 1
720 07:02:52.157525 APIC: 07: enabled 1
721 07:02:52.160364 APIC: 02: enabled 1
722 07:02:52.160781 APIC: 04: enabled 1
723 07:02:52.163615 APIC: 06: enabled 1
724 07:02:52.167207 APIC: 03: enabled 1
725 07:02:52.167664 APIC: 05: enabled 1
726 07:02:52.170796 Compare with tree...
727 07:02:52.173574 Root Device: enabled 1
728 07:02:52.173988 DOMAIN: 0000: enabled 1
729 07:02:52.176846 PCI: 00:00.0: enabled 1
730 07:02:52.180998 PCI: 00:02.0: enabled 1
731 07:02:52.183181 PCI: 00:04.0: enabled 1
732 07:02:52.186667 GENERIC: 0.0: enabled 1
733 07:02:52.187078 PCI: 00:05.0: enabled 1
734 07:02:52.190116 PCI: 00:06.0: enabled 0
735 07:02:52.193553 PCI: 00:07.0: enabled 0
736 07:02:52.196966 GENERIC: 0.0: enabled 1
737 07:02:52.200353 PCI: 00:07.1: enabled 0
738 07:02:52.203728 GENERIC: 1.0: enabled 1
739 07:02:52.204154 PCI: 00:07.2: enabled 0
740 07:02:52.206997 GENERIC: 0.0: enabled 1
741 07:02:52.210612 PCI: 00:07.3: enabled 0
742 07:02:52.213195 GENERIC: 1.0: enabled 1
743 07:02:52.216836 PCI: 00:08.0: enabled 1
744 07:02:52.217426 PCI: 00:09.0: enabled 0
745 07:02:52.220009 PCI: 00:0a.0: enabled 0
746 07:02:52.222964 PCI: 00:0d.0: enabled 1
747 07:02:52.226917 USB0 port 0: enabled 1
748 07:02:52.229827 USB3 port 0: enabled 1
749 07:02:52.230123 USB3 port 1: enabled 1
750 07:02:52.232892 USB3 port 2: enabled 0
751 07:02:52.235947 USB3 port 3: enabled 0
752 07:02:52.239849 PCI: 00:0d.1: enabled 0
753 07:02:52.242924 PCI: 00:0d.2: enabled 0
754 07:02:52.246511 GENERIC: 0.0: enabled 1
755 07:02:52.246887 PCI: 00:0d.3: enabled 0
756 07:02:52.249844 PCI: 00:0e.0: enabled 0
757 07:02:52.252833 PCI: 00:10.2: enabled 1
758 07:02:52.255862 PCI: 00:10.6: enabled 0
759 07:02:52.256117 PCI: 00:10.7: enabled 0
760 07:02:52.260132 PCI: 00:12.0: enabled 0
761 07:02:52.262564 PCI: 00:12.6: enabled 0
762 07:02:52.265855 PCI: 00:13.0: enabled 0
763 07:02:52.269802 PCI: 00:14.0: enabled 1
764 07:02:52.270105 USB0 port 0: enabled 1
765 07:02:52.272875 USB2 port 0: enabled 0
766 07:02:52.275760 USB2 port 1: enabled 1
767 07:02:52.279034 USB2 port 2: enabled 1
768 07:02:52.282618 USB2 port 3: enabled 0
769 07:02:52.285569 USB2 port 4: enabled 1
770 07:02:52.285738 USB2 port 5: enabled 0
771 07:02:52.288914 USB2 port 6: enabled 0
772 07:02:52.292163 USB2 port 7: enabled 0
773 07:02:52.296209 USB2 port 8: enabled 0
774 07:02:52.298863 USB2 port 9: enabled 0
775 07:02:52.302710 USB3 port 0: enabled 0
776 07:02:52.303121 USB3 port 1: enabled 1
777 07:02:52.305944 USB3 port 2: enabled 0
778 07:02:52.309382 USB3 port 3: enabled 0
779 07:02:52.312621 PCI: 00:14.1: enabled 0
780 07:02:52.315974 PCI: 00:14.2: enabled 1
781 07:02:52.316385 PCI: 00:14.3: enabled 1
782 07:02:52.319468 GENERIC: 0.0: enabled 1
783 07:02:52.322134 PCI: 00:15.0: enabled 1
784 07:02:52.325844 I2C: 00:1a: enabled 1
785 07:02:52.329713 I2C: 00:31: enabled 1
786 07:02:52.330130 I2C: 00:32: enabled 1
787 07:02:52.333021 PCI: 00:15.1: enabled 1
788 07:02:52.336100 I2C: 00:10: enabled 1
789 07:02:52.339276 PCI: 00:15.2: enabled 1
790 07:02:52.342496 PCI: 00:15.3: enabled 1
791 07:02:52.342993 PCI: 00:16.0: enabled 1
792 07:02:52.345702 PCI: 00:16.1: enabled 0
793 07:02:52.348963 PCI: 00:16.2: enabled 0
794 07:02:52.352229 PCI: 00:16.3: enabled 0
795 07:02:52.356093 PCI: 00:16.4: enabled 0
796 07:02:52.356716 PCI: 00:16.5: enabled 0
797 07:02:52.358912 PCI: 00:17.0: enabled 1
798 07:02:52.362225 PCI: 00:19.0: enabled 0
799 07:02:52.365292 PCI: 00:19.1: enabled 1
800 07:02:52.368372 I2C: 00:15: enabled 1
801 07:02:52.368781 PCI: 00:19.2: enabled 0
802 07:02:52.372522 PCI: 00:1d.0: enabled 1
803 07:02:52.375652 GENERIC: 0.0: enabled 1
804 07:02:52.425871 PCI: 00:1e.0: enabled 1
805 07:02:52.426330 PCI: 00:1e.1: enabled 0
806 07:02:52.426642 PCI: 00:1e.2: enabled 1
807 07:02:52.427191 SPI: 00: enabled 1
808 07:02:52.427483 PCI: 00:1e.3: enabled 1
809 07:02:52.427719 SPI: 00: enabled 1
810 07:02:52.427973 PCI: 00:1f.0: enabled 1
811 07:02:52.428231 PNP: 0c09.0: enabled 1
812 07:02:52.428751 PCI: 00:1f.1: enabled 0
813 07:02:52.428995 PCI: 00:1f.2: enabled 1
814 07:02:52.429220 GENERIC: 0.0: enabled 1
815 07:02:52.429447 GENERIC: 0.0: enabled 1
816 07:02:52.429662 GENERIC: 1.0: enabled 1
817 07:02:52.429872 PCI: 00:1f.3: enabled 1
818 07:02:52.430079 PCI: 00:1f.4: enabled 0
819 07:02:52.430391 PCI: 00:1f.5: enabled 1
820 07:02:52.430683 PCI: 00:1f.6: enabled 0
821 07:02:52.431178 PCI: 00:1f.7: enabled 0
822 07:02:52.431436 CPU_CLUSTER: 0: enabled 1
823 07:02:52.431670 APIC: 00: enabled 1
824 07:02:52.477609 APIC: 01: enabled 1
825 07:02:52.478175 APIC: 07: enabled 1
826 07:02:52.479001 APIC: 02: enabled 1
827 07:02:52.479367 APIC: 04: enabled 1
828 07:02:52.479627 APIC: 06: enabled 1
829 07:02:52.479859 APIC: 03: enabled 1
830 07:02:52.480084 APIC: 05: enabled 1
831 07:02:52.480350 Root Device scanning...
832 07:02:52.480567 scan_static_bus for Root Device
833 07:02:52.480779 DOMAIN: 0000 enabled
834 07:02:52.480988 CPU_CLUSTER: 0 enabled
835 07:02:52.481196 DOMAIN: 0000 scanning...
836 07:02:52.481403 PCI: pci_scan_bus for bus 00
837 07:02:52.481892 PCI: 00:00.0 [8086/0000] ops
838 07:02:52.482149 PCI: 00:00.0 [8086/9a12] enabled
839 07:02:52.482490 PCI: 00:02.0 [8086/0000] bus ops
840 07:02:52.482756 PCI: 00:02.0 [8086/9a40] enabled
841 07:02:52.482970 PCI: 00:04.0 [8086/0000] bus ops
842 07:02:52.527981 PCI: 00:04.0 [8086/9a03] enabled
843 07:02:52.528249 PCI: 00:05.0 [8086/9a19] enabled
844 07:02:52.528882 PCI: 00:07.0 [0000/0000] hidden
845 07:02:52.529046 PCI: 00:08.0 [8086/9a11] enabled
846 07:02:52.529607 PCI: 00:0a.0 [8086/9a0d] disabled
847 07:02:52.529767 PCI: 00:0d.0 [8086/0000] bus ops
848 07:02:52.530143 PCI: 00:0d.0 [8086/9a13] enabled
849 07:02:52.530296 PCI: 00:14.0 [8086/0000] bus ops
850 07:02:52.530674 PCI: 00:14.0 [8086/a0ed] enabled
851 07:02:52.530831 PCI: 00:14.2 [8086/a0ef] enabled
852 07:02:52.531189 PCI: 00:14.3 [8086/0000] bus ops
853 07:02:52.531350 PCI: 00:14.3 [8086/a0f0] enabled
854 07:02:52.531487 PCI: 00:15.0 [8086/0000] bus ops
855 07:02:52.531878 PCI: 00:15.0 [8086/a0e8] enabled
856 07:02:52.532035 PCI: 00:15.1 [8086/0000] bus ops
857 07:02:52.553367 PCI: 00:15.1 [8086/a0e9] enabled
858 07:02:52.553599 PCI: 00:15.2 [8086/0000] bus ops
859 07:02:52.553994 PCI: 00:15.2 [8086/a0ea] enabled
860 07:02:52.554200 PCI: 00:15.3 [8086/0000] bus ops
861 07:02:52.554389 PCI: 00:15.3 [8086/a0eb] enabled
862 07:02:52.554569 PCI: 00:16.0 [8086/0000] ops
863 07:02:52.554937 PCI: 00:16.0 [8086/a0e0] enabled
864 07:02:52.557603 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 07:02:52.557782 PCI: 00:19.0 [8086/0000] bus ops
866 07:02:52.560438 PCI: 00:19.0 [8086/a0c5] disabled
867 07:02:52.563797 PCI: 00:19.1 [8086/0000] bus ops
868 07:02:52.567183 PCI: 00:19.1 [8086/a0c6] enabled
869 07:02:52.570532 PCI: 00:1d.0 [8086/0000] bus ops
870 07:02:52.574119 PCI: 00:1d.0 [8086/a0b0] enabled
871 07:02:52.577142 PCI: 00:1e.0 [8086/0000] ops
872 07:02:52.580451 PCI: 00:1e.0 [8086/a0a8] enabled
873 07:02:52.583335 PCI: 00:1e.2 [8086/0000] bus ops
874 07:02:52.587182 PCI: 00:1e.2 [8086/a0aa] enabled
875 07:02:52.590253 PCI: 00:1e.3 [8086/0000] bus ops
876 07:02:52.593649 PCI: 00:1e.3 [8086/a0ab] enabled
877 07:02:52.597213 PCI: 00:1f.0 [8086/0000] bus ops
878 07:02:52.599795 PCI: 00:1f.0 [8086/a087] enabled
879 07:02:52.603684 RTC Init
880 07:02:52.607136 Set power on after power failure.
881 07:02:52.607316 Disabling Deep S3
882 07:02:52.610101 Disabling Deep S3
883 07:02:52.613107 Disabling Deep S4
884 07:02:52.613202 Disabling Deep S4
885 07:02:52.616368 Disabling Deep S5
886 07:02:52.616462 Disabling Deep S5
887 07:02:52.619747 PCI: 00:1f.2 [0000/0000] hidden
888 07:02:52.623496 PCI: 00:1f.3 [8086/0000] bus ops
889 07:02:52.626457 PCI: 00:1f.3 [8086/a0c8] enabled
890 07:02:52.629801 PCI: 00:1f.5 [8086/0000] bus ops
891 07:02:52.633295 PCI: 00:1f.5 [8086/a0a4] enabled
892 07:02:52.636251 PCI: Leftover static devices:
893 07:02:52.639359 PCI: 00:10.2
894 07:02:52.639458 PCI: 00:10.6
895 07:02:52.639530 PCI: 00:10.7
896 07:02:52.642825 PCI: 00:06.0
897 07:02:52.642967 PCI: 00:07.1
898 07:02:52.646369 PCI: 00:07.2
899 07:02:52.646447 PCI: 00:07.3
900 07:02:52.649969 PCI: 00:09.0
901 07:02:52.650045 PCI: 00:0d.1
902 07:02:52.650108 PCI: 00:0d.2
903 07:02:52.653057 PCI: 00:0d.3
904 07:02:52.653157 PCI: 00:0e.0
905 07:02:52.656015 PCI: 00:12.0
906 07:02:52.656108 PCI: 00:12.6
907 07:02:52.656183 PCI: 00:13.0
908 07:02:52.659471 PCI: 00:14.1
909 07:02:52.659573 PCI: 00:16.1
910 07:02:52.662758 PCI: 00:16.2
911 07:02:52.662867 PCI: 00:16.3
912 07:02:52.665934 PCI: 00:16.4
913 07:02:52.666043 PCI: 00:16.5
914 07:02:52.666129 PCI: 00:17.0
915 07:02:52.669992 PCI: 00:19.2
916 07:02:52.670112 PCI: 00:1e.1
917 07:02:52.672790 PCI: 00:1f.1
918 07:02:52.672879 PCI: 00:1f.4
919 07:02:52.672948 PCI: 00:1f.6
920 07:02:52.675775 PCI: 00:1f.7
921 07:02:52.679057 PCI: Check your devicetree.cb.
922 07:02:52.683327 PCI: 00:02.0 scanning...
923 07:02:52.686327 scan_generic_bus for PCI: 00:02.0
924 07:02:52.689445 scan_generic_bus for PCI: 00:02.0 done
925 07:02:52.692537 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 07:02:52.696516 PCI: 00:04.0 scanning...
927 07:02:52.700473 scan_generic_bus for PCI: 00:04.0
928 07:02:52.702372 GENERIC: 0.0 enabled
929 07:02:52.709611 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 07:02:52.712751 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 07:02:52.715688 PCI: 00:0d.0 scanning...
932 07:02:52.719024 scan_static_bus for PCI: 00:0d.0
933 07:02:52.722083 USB0 port 0 enabled
934 07:02:52.722179 USB0 port 0 scanning...
935 07:02:52.725502 scan_static_bus for USB0 port 0
936 07:02:52.729104 USB3 port 0 enabled
937 07:02:52.732038 USB3 port 1 enabled
938 07:02:52.732121 USB3 port 2 disabled
939 07:02:52.735945 USB3 port 3 disabled
940 07:02:52.738673 USB3 port 0 scanning...
941 07:02:52.741799 scan_static_bus for USB3 port 0
942 07:02:52.745407 scan_static_bus for USB3 port 0 done
943 07:02:52.748639 scan_bus: bus USB3 port 0 finished in 6 msecs
944 07:02:52.751905 USB3 port 1 scanning...
945 07:02:52.755325 scan_static_bus for USB3 port 1
946 07:02:52.758861 scan_static_bus for USB3 port 1 done
947 07:02:52.765290 scan_bus: bus USB3 port 1 finished in 6 msecs
948 07:02:52.768643 scan_static_bus for USB0 port 0 done
949 07:02:52.771720 scan_bus: bus USB0 port 0 finished in 43 msecs
950 07:02:52.775282 scan_static_bus for PCI: 00:0d.0 done
951 07:02:52.781820 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 07:02:52.781917 PCI: 00:14.0 scanning...
953 07:02:52.784807 scan_static_bus for PCI: 00:14.0
954 07:02:52.788865 USB0 port 0 enabled
955 07:02:52.791461 USB0 port 0 scanning...
956 07:02:52.795353 scan_static_bus for USB0 port 0
957 07:02:52.798197 USB2 port 0 disabled
958 07:02:52.798289 USB2 port 1 enabled
959 07:02:52.801813 USB2 port 2 enabled
960 07:02:52.801905 USB2 port 3 disabled
961 07:02:52.805130 USB2 port 4 enabled
962 07:02:52.808301 USB2 port 5 disabled
963 07:02:52.808417 USB2 port 6 disabled
964 07:02:52.811603 USB2 port 7 disabled
965 07:02:52.814770 USB2 port 8 disabled
966 07:02:52.814874 USB2 port 9 disabled
967 07:02:52.818230 USB3 port 0 disabled
968 07:02:52.821330 USB3 port 1 enabled
969 07:02:52.821435 USB3 port 2 disabled
970 07:02:52.825020 USB3 port 3 disabled
971 07:02:52.827844 USB2 port 1 scanning...
972 07:02:52.831304 scan_static_bus for USB2 port 1
973 07:02:52.834496 scan_static_bus for USB2 port 1 done
974 07:02:52.837837 scan_bus: bus USB2 port 1 finished in 6 msecs
975 07:02:52.841203 USB2 port 2 scanning...
976 07:02:52.844787 scan_static_bus for USB2 port 2
977 07:02:52.847743 scan_static_bus for USB2 port 2 done
978 07:02:52.851054 scan_bus: bus USB2 port 2 finished in 6 msecs
979 07:02:52.854332 USB2 port 4 scanning...
980 07:02:52.858501 scan_static_bus for USB2 port 4
981 07:02:52.861129 scan_static_bus for USB2 port 4 done
982 07:02:52.867727 scan_bus: bus USB2 port 4 finished in 6 msecs
983 07:02:52.867873 USB3 port 1 scanning...
984 07:02:52.871517 scan_static_bus for USB3 port 1
985 07:02:52.877702 scan_static_bus for USB3 port 1 done
986 07:02:52.881044 scan_bus: bus USB3 port 1 finished in 6 msecs
987 07:02:52.884641 scan_static_bus for USB0 port 0 done
988 07:02:52.891370 scan_bus: bus USB0 port 0 finished in 93 msecs
989 07:02:52.894651 scan_static_bus for PCI: 00:14.0 done
990 07:02:52.897829 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
991 07:02:52.901340 PCI: 00:14.3 scanning...
992 07:02:52.904230 scan_static_bus for PCI: 00:14.3
993 07:02:52.907466 GENERIC: 0.0 enabled
994 07:02:52.911850 scan_static_bus for PCI: 00:14.3 done
995 07:02:52.914509 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 07:02:52.918159 PCI: 00:15.0 scanning...
997 07:02:52.920947 scan_static_bus for PCI: 00:15.0
998 07:02:52.924095 I2C: 00:1a enabled
999 07:02:52.924220 I2C: 00:31 enabled
1000 07:02:52.928107 I2C: 00:32 enabled
1001 07:02:52.930792 scan_static_bus for PCI: 00:15.0 done
1002 07:02:52.934233 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 07:02:52.938459 PCI: 00:15.1 scanning...
1004 07:02:52.940674 scan_static_bus for PCI: 00:15.1
1005 07:02:52.944143 I2C: 00:10 enabled
1006 07:02:52.947338 scan_static_bus for PCI: 00:15.1 done
1007 07:02:52.950641 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 07:02:52.953872 PCI: 00:15.2 scanning...
1009 07:02:52.957610 scan_static_bus for PCI: 00:15.2
1010 07:02:52.961357 scan_static_bus for PCI: 00:15.2 done
1011 07:02:52.967701 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 07:02:52.967850 PCI: 00:15.3 scanning...
1013 07:02:52.971433 scan_static_bus for PCI: 00:15.3
1014 07:02:52.978107 scan_static_bus for PCI: 00:15.3 done
1015 07:02:52.981073 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 07:02:52.984321 PCI: 00:19.1 scanning...
1017 07:02:52.987862 scan_static_bus for PCI: 00:19.1
1018 07:02:52.988040 I2C: 00:15 enabled
1019 07:02:52.994839 scan_static_bus for PCI: 00:19.1 done
1020 07:02:52.998178 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 07:02:53.001027 PCI: 00:1d.0 scanning...
1022 07:02:53.004423 do_pci_scan_bridge for PCI: 00:1d.0
1023 07:02:53.007678 PCI: pci_scan_bus for bus 01
1024 07:02:53.011044 PCI: 01:00.0 [1c5c/174a] enabled
1025 07:02:53.014195 GENERIC: 0.0 enabled
1026 07:02:53.018057 Enabling Common Clock Configuration
1027 07:02:53.021008 L1 Sub-State supported from root port 29
1028 07:02:53.024557 L1 Sub-State Support = 0xf
1029 07:02:53.027549 CommonModeRestoreTime = 0x28
1030 07:02:53.030814 Power On Value = 0x16, Power On Scale = 0x0
1031 07:02:53.034256 ASPM: Enabled L1
1032 07:02:53.037454 PCIe: Max_Payload_Size adjusted to 128
1033 07:02:53.040719 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 07:02:53.044572 PCI: 00:1e.2 scanning...
1035 07:02:53.047749 scan_generic_bus for PCI: 00:1e.2
1036 07:02:53.051260 SPI: 00 enabled
1037 07:02:53.054099 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 07:02:53.060892 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 07:02:53.064113 PCI: 00:1e.3 scanning...
1040 07:02:53.067935 scan_generic_bus for PCI: 00:1e.3
1041 07:02:53.068268 SPI: 00 enabled
1042 07:02:53.074093 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 07:02:53.080566 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 07:02:53.080840 PCI: 00:1f.0 scanning...
1045 07:02:53.084287 scan_static_bus for PCI: 00:1f.0
1046 07:02:53.087152 PNP: 0c09.0 enabled
1047 07:02:53.090314 PNP: 0c09.0 scanning...
1048 07:02:53.093704 scan_static_bus for PNP: 0c09.0
1049 07:02:53.097300 scan_static_bus for PNP: 0c09.0 done
1050 07:02:53.100465 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 07:02:53.103658 scan_static_bus for PCI: 00:1f.0 done
1052 07:02:53.110614 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 07:02:53.114548 PCI: 00:1f.2 scanning...
1054 07:02:53.117477 scan_static_bus for PCI: 00:1f.2
1055 07:02:53.117935 GENERIC: 0.0 enabled
1056 07:02:53.120877 GENERIC: 0.0 scanning...
1057 07:02:53.123783 scan_static_bus for GENERIC: 0.0
1058 07:02:53.126871 GENERIC: 0.0 enabled
1059 07:02:53.130099 GENERIC: 1.0 enabled
1060 07:02:53.133660 scan_static_bus for GENERIC: 0.0 done
1061 07:02:53.136553 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 07:02:53.139971 scan_static_bus for PCI: 00:1f.2 done
1063 07:02:53.146351 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 07:02:53.146454 PCI: 00:1f.3 scanning...
1065 07:02:53.150767 scan_static_bus for PCI: 00:1f.3
1066 07:02:53.156423 scan_static_bus for PCI: 00:1f.3 done
1067 07:02:53.160695 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 07:02:53.163338 PCI: 00:1f.5 scanning...
1069 07:02:53.166420 scan_generic_bus for PCI: 00:1f.5
1070 07:02:53.169913 scan_generic_bus for PCI: 00:1f.5 done
1071 07:02:53.176743 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 07:02:53.180017 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1073 07:02:53.183268 scan_static_bus for Root Device done
1074 07:02:53.190303 scan_bus: bus Root Device finished in 737 msecs
1075 07:02:53.190823 done
1076 07:02:53.196811 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1077 07:02:53.200159 Chrome EC: UHEPI supported
1078 07:02:53.206321 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 07:02:53.213157 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 07:02:53.216622 SPI flash protection: WPSW=0 SRP0=0
1081 07:02:53.219718 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 07:02:53.226627 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 07:02:53.229938 found VGA at PCI: 00:02.0
1084 07:02:53.233451 Setting up VGA for PCI: 00:02.0
1085 07:02:53.236375 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 07:02:53.242985 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 07:02:53.243710 Allocating resources...
1088 07:02:53.246434 Reading resources...
1089 07:02:53.249742 Root Device read_resources bus 0 link: 0
1090 07:02:53.256206 DOMAIN: 0000 read_resources bus 0 link: 0
1091 07:02:53.259685 PCI: 00:04.0 read_resources bus 1 link: 0
1092 07:02:53.266365 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 07:02:53.269588 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 07:02:53.275994 USB0 port 0 read_resources bus 0 link: 0
1095 07:02:53.279380 USB0 port 0 read_resources bus 0 link: 0 done
1096 07:02:53.286230 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 07:02:53.289050 PCI: 00:14.0 read_resources bus 0 link: 0
1098 07:02:53.292360 USB0 port 0 read_resources bus 0 link: 0
1099 07:02:53.299955 USB0 port 0 read_resources bus 0 link: 0 done
1100 07:02:53.303634 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 07:02:53.309931 PCI: 00:14.3 read_resources bus 0 link: 0
1102 07:02:53.313132 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 07:02:53.319456 PCI: 00:15.0 read_resources bus 0 link: 0
1104 07:02:53.322720 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 07:02:53.329333 PCI: 00:15.1 read_resources bus 0 link: 0
1106 07:02:53.332684 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 07:02:53.340329 PCI: 00:19.1 read_resources bus 0 link: 0
1108 07:02:53.343467 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 07:02:53.350809 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 07:02:53.353376 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 07:02:53.360070 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 07:02:53.363830 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 07:02:53.370052 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 07:02:53.373374 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 07:02:53.380067 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 07:02:53.383053 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 07:02:53.389872 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 07:02:53.392920 GENERIC: 0.0 read_resources bus 0 link: 0
1119 07:02:53.399891 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 07:02:53.402790 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 07:02:53.409762 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 07:02:53.412826 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 07:02:53.419591 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 07:02:53.422544 Root Device read_resources bus 0 link: 0 done
1125 07:02:53.426153 Done reading resources.
1126 07:02:53.432343 Show resources in subtree (Root Device)...After reading.
1127 07:02:53.435830 Root Device child on link 0 DOMAIN: 0000
1128 07:02:53.439404 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 07:02:53.450312 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 07:02:53.459716 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 07:02:53.463024 PCI: 00:00.0
1132 07:02:53.469637 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 07:02:53.479518 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 07:02:53.488954 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 07:02:53.499309 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 07:02:53.509129 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 07:02:53.518977 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 07:02:53.525820 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 07:02:53.535448 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 07:02:53.545094 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 07:02:53.555337 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 07:02:53.565203 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 07:02:53.575045 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 07:02:53.582260 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 07:02:53.591892 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 07:02:53.601757 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 07:02:53.611386 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 07:02:53.621357 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 07:02:53.631656 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 07:02:53.638177 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 07:02:53.648092 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 07:02:53.651453 PCI: 00:02.0
1153 07:02:53.661928 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 07:02:53.671267 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 07:02:53.681383 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 07:02:53.685012 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 07:02:53.694980 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 07:02:53.697688 GENERIC: 0.0
1159 07:02:53.697772 PCI: 00:05.0
1160 07:02:53.707660 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 07:02:53.710839 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 07:02:53.714571 GENERIC: 0.0
1163 07:02:53.714655 PCI: 00:08.0
1164 07:02:53.724237 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 07:02:53.728026 PCI: 00:0a.0
1166 07:02:53.731021 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 07:02:53.741549 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 07:02:53.747528 USB0 port 0 child on link 0 USB3 port 0
1169 07:02:53.747623 USB3 port 0
1170 07:02:53.750730 USB3 port 1
1171 07:02:53.750811 USB3 port 2
1172 07:02:53.753828 USB3 port 3
1173 07:02:53.758329 PCI: 00:14.0 child on link 0 USB0 port 0
1174 07:02:53.767335 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 07:02:53.770607 USB0 port 0 child on link 0 USB2 port 0
1176 07:02:53.774512 USB2 port 0
1177 07:02:53.777766 USB2 port 1
1178 07:02:53.777889 USB2 port 2
1179 07:02:53.780739 USB2 port 3
1180 07:02:53.780820 USB2 port 4
1181 07:02:53.783768 USB2 port 5
1182 07:02:53.783848 USB2 port 6
1183 07:02:53.787199 USB2 port 7
1184 07:02:53.787279 USB2 port 8
1185 07:02:53.790341 USB2 port 9
1186 07:02:53.790423 USB3 port 0
1187 07:02:53.794907 USB3 port 1
1188 07:02:53.794986 USB3 port 2
1189 07:02:53.797481 USB3 port 3
1190 07:02:53.797561 PCI: 00:14.2
1191 07:02:53.807033 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 07:02:53.817246 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 07:02:53.823491 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 07:02:53.833607 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 07:02:53.833699 GENERIC: 0.0
1196 07:02:53.840621 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 07:02:53.850278 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 07:02:53.850372 I2C: 00:1a
1199 07:02:53.853858 I2C: 00:31
1200 07:02:53.854036 I2C: 00:32
1201 07:02:53.856686 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 07:02:53.866497 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 07:02:53.870369 I2C: 00:10
1204 07:02:53.870459 PCI: 00:15.2
1205 07:02:53.879835 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 07:02:53.883082 PCI: 00:15.3
1207 07:02:53.893694 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 07:02:53.893804 PCI: 00:16.0
1209 07:02:53.903614 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 07:02:53.906280 PCI: 00:19.0
1211 07:02:53.910091 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 07:02:53.919883 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 07:02:53.923227 I2C: 00:15
1214 07:02:53.926214 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 07:02:53.935899 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 07:02:53.946054 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 07:02:53.952406 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 07:02:53.955999 GENERIC: 0.0
1219 07:02:53.958949 PCI: 01:00.0
1220 07:02:53.969501 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 07:02:53.976217 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1222 07:02:53.986501 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1223 07:02:53.988937 PCI: 00:1e.0
1224 07:02:53.999257 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 07:02:54.002418 PCI: 00:1e.2 child on link 0 SPI: 00
1226 07:02:54.011948 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 07:02:54.016090 SPI: 00
1228 07:02:54.018473 PCI: 00:1e.3 child on link 0 SPI: 00
1229 07:02:54.028656 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 07:02:54.028746 SPI: 00
1231 07:02:54.035219 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 07:02:54.042410 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 07:02:54.045426 PNP: 0c09.0
1234 07:02:54.052311 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 07:02:54.058612 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 07:02:54.068708 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 07:02:54.075793 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 07:02:54.082278 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 07:02:54.082397 GENERIC: 0.0
1240 07:02:54.084783 GENERIC: 1.0
1241 07:02:54.084896 PCI: 00:1f.3
1242 07:02:54.094734 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 07:02:54.104606 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 07:02:54.108224 PCI: 00:1f.5
1245 07:02:54.118101 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 07:02:54.121568 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 07:02:54.121654 APIC: 00
1248 07:02:54.124496 APIC: 01
1249 07:02:54.124601 APIC: 07
1250 07:02:54.127753 APIC: 02
1251 07:02:54.127836 APIC: 04
1252 07:02:54.127904 APIC: 06
1253 07:02:54.131226 APIC: 03
1254 07:02:54.131380 APIC: 05
1255 07:02:54.138621 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 07:02:54.144455 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 07:02:54.151396 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 07:02:54.158039 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 07:02:54.161023 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 07:02:54.164507 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1261 07:02:54.170825 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1262 07:02:54.177786 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 07:02:54.183906 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1264 07:02:54.191332 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1265 07:02:54.200621 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1266 07:02:54.203914 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1267 07:02:54.214442 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1268 07:02:54.220378 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1269 07:02:54.227071 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1270 07:02:54.230917 DOMAIN: 0000: Resource ranges:
1271 07:02:54.233949 * Base: 1000, Size: 800, Tag: 100
1272 07:02:54.236797 * Base: 1900, Size: e700, Tag: 100
1273 07:02:54.243347 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1274 07:02:54.250342 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1275 07:02:54.256891 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1276 07:02:54.263617 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1277 07:02:54.273201 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1278 07:02:54.279733 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1279 07:02:54.286605 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1280 07:02:54.296592 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1281 07:02:54.302873 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1282 07:02:54.309965 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1283 07:02:54.319706 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1284 07:02:54.326418 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1285 07:02:54.332838 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1286 07:02:54.342658 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1287 07:02:54.349290 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1288 07:02:54.356150 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1289 07:02:54.365800 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1290 07:02:54.372490 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 07:02:54.378899 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 07:02:54.388900 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1293 07:02:54.395411 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 07:02:54.402480 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 07:02:54.412225 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 07:02:54.419116 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 07:02:54.425557 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 07:02:54.428533 DOMAIN: 0000: Resource ranges:
1299 07:02:54.435889 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 07:02:54.438675 * Base: d0000000, Size: 28000000, Tag: 200
1301 07:02:54.442031 * Base: fa000000, Size: 1000000, Tag: 200
1302 07:02:54.448367 * Base: fb001000, Size: 2fff000, Tag: 200
1303 07:02:54.452475 * Base: fe010000, Size: 2e000, Tag: 200
1304 07:02:54.455005 * Base: fe03f000, Size: d41000, Tag: 200
1305 07:02:54.458270 * Base: fed88000, Size: 8000, Tag: 200
1306 07:02:54.465027 * Base: fed93000, Size: d000, Tag: 200
1307 07:02:54.468414 * Base: feda2000, Size: 1e000, Tag: 200
1308 07:02:54.472047 * Base: fede0000, Size: 1220000, Tag: 200
1309 07:02:54.478421 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1310 07:02:54.485128 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 07:02:54.491367 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 07:02:54.498046 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 07:02:54.505239 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 07:02:54.511535 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 07:02:54.518351 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 07:02:54.524743 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 07:02:54.531748 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 07:02:54.537934 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 07:02:54.544842 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 07:02:54.551228 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 07:02:54.558345 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 07:02:54.564561 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 07:02:54.571389 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 07:02:54.578009 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 07:02:54.584542 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 07:02:54.590742 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 07:02:54.597231 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 07:02:54.604133 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 07:02:54.611638 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 07:02:54.618212 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 07:02:54.623905 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 07:02:54.630549 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 07:02:54.640139 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 07:02:54.643565 PCI: 00:1d.0: Resource ranges:
1335 07:02:54.647150 * Base: 7fc00000, Size: 100000, Tag: 200
1336 07:02:54.653481 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 07:02:54.660275 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1338 07:02:54.666538 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1339 07:02:54.673472 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1340 07:02:54.683568 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1341 07:02:54.686808 Root Device assign_resources, bus 0 link: 0
1342 07:02:54.689982 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 07:02:54.699679 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1344 07:02:54.706774 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1345 07:02:54.716310 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1346 07:02:54.723131 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1347 07:02:54.730043 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 07:02:54.733107 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 07:02:54.742404 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1350 07:02:54.749003 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1351 07:02:54.759363 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1352 07:02:54.762262 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 07:02:54.765731 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 07:02:54.775847 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1355 07:02:54.778968 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 07:02:54.785661 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 07:02:54.792609 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1358 07:02:54.803007 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1359 07:02:54.808796 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1360 07:02:54.812963 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 07:02:54.818768 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 07:02:54.826082 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 07:02:54.832242 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 07:02:54.835412 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 07:02:54.846019 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 07:02:54.848679 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 07:02:54.852323 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 07:02:54.861852 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 07:02:54.868334 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 07:02:54.877894 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 07:02:54.884967 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 07:02:54.891630 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 07:02:54.895061 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 07:02:54.904594 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 07:02:54.914466 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 07:02:54.921536 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 07:02:54.927806 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 07:02:54.934013 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 07:02:54.943956 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 07:02:54.950846 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 07:02:54.954393 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 07:02:54.964540 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 07:02:54.968054 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 07:02:54.974011 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 07:02:54.981192 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 07:02:54.987525 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 07:02:54.990705 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 07:02:54.994401 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 07:02:55.001234 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 07:02:55.004940 LPC: Trying to open IO window from 800 size 1ff
1391 07:02:55.014185 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1392 07:02:55.020679 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1393 07:02:55.031080 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1394 07:02:55.033892 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 07:02:55.040797 Root Device assign_resources, bus 0 link: 0
1396 07:02:55.041120 Done setting resources.
1397 07:02:55.047096 Show resources in subtree (Root Device)...After assigning values.
1398 07:02:55.054124 Root Device child on link 0 DOMAIN: 0000
1399 07:02:55.057397 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1400 07:02:55.067132 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1401 07:02:55.077382 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1402 07:02:55.077810 PCI: 00:00.0
1403 07:02:55.087251 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1404 07:02:55.096967 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1405 07:02:55.107125 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1406 07:02:55.117182 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1407 07:02:55.124160 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 07:02:55.133651 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 07:02:55.143559 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 07:02:55.153790 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 07:02:55.163522 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 07:02:55.173395 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1413 07:02:55.180496 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1414 07:02:55.189694 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1415 07:02:55.199857 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1416 07:02:55.210201 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1417 07:02:55.219934 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1418 07:02:55.225961 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1419 07:02:55.236419 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1420 07:02:55.245911 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1421 07:02:55.256750 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1422 07:02:55.266070 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1423 07:02:55.269875 PCI: 00:02.0
1424 07:02:55.279922 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1425 07:02:55.288968 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1426 07:02:55.299757 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1427 07:02:55.302222 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1428 07:02:55.312736 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1429 07:02:55.315577 GENERIC: 0.0
1430 07:02:55.315808 PCI: 00:05.0
1431 07:02:55.325489 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1432 07:02:55.332730 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1433 07:02:55.333205 GENERIC: 0.0
1434 07:02:55.335668 PCI: 00:08.0
1435 07:02:55.345773 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1436 07:02:55.348926 PCI: 00:0a.0
1437 07:02:55.352066 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 07:02:55.362284 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 07:02:55.365439 USB0 port 0 child on link 0 USB3 port 0
1440 07:02:55.368739 USB3 port 0
1441 07:02:55.368983 USB3 port 1
1442 07:02:55.371791 USB3 port 2
1443 07:02:55.372002 USB3 port 3
1444 07:02:55.378509 PCI: 00:14.0 child on link 0 USB0 port 0
1445 07:02:55.388788 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 07:02:55.391782 USB0 port 0 child on link 0 USB2 port 0
1447 07:02:55.394860 USB2 port 0
1448 07:02:55.394937 USB2 port 1
1449 07:02:55.397992 USB2 port 2
1450 07:02:55.398067 USB2 port 3
1451 07:02:55.401972 USB2 port 4
1452 07:02:55.402049 USB2 port 5
1453 07:02:55.404758 USB2 port 6
1454 07:02:55.408252 USB2 port 7
1455 07:02:55.408343 USB2 port 8
1456 07:02:55.411872 USB2 port 9
1457 07:02:55.411961 USB3 port 0
1458 07:02:55.415240 USB3 port 1
1459 07:02:55.415328 USB3 port 2
1460 07:02:55.418043 USB3 port 3
1461 07:02:55.418131 PCI: 00:14.2
1462 07:02:55.427933 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 07:02:55.437709 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 07:02:55.445466 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 07:02:55.455090 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 07:02:55.455199 GENERIC: 0.0
1467 07:02:55.461808 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 07:02:55.471432 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 07:02:55.471926 I2C: 00:1a
1470 07:02:55.474465 I2C: 00:31
1471 07:02:55.474964 I2C: 00:32
1472 07:02:55.481597 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 07:02:55.491406 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 07:02:55.491865 I2C: 00:10
1475 07:02:55.494769 PCI: 00:15.2
1476 07:02:55.504940 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 07:02:55.505419 PCI: 00:15.3
1478 07:02:55.514702 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 07:02:55.517711 PCI: 00:16.0
1480 07:02:55.527738 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 07:02:55.530871 PCI: 00:19.0
1482 07:02:55.534510 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 07:02:55.544449 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 07:02:55.544775 I2C: 00:15
1485 07:02:55.551408 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 07:02:55.560862 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 07:02:55.570960 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 07:02:55.580877 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 07:02:55.583847 GENERIC: 0.0
1490 07:02:55.584235 PCI: 01:00.0
1491 07:02:55.596838 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 07:02:55.606980 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 07:02:55.616963 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 07:02:55.617401 PCI: 00:1e.0
1495 07:02:55.630047 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 07:02:55.633310 PCI: 00:1e.2 child on link 0 SPI: 00
1497 07:02:55.643423 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 07:02:55.643879 SPI: 00
1499 07:02:55.650233 PCI: 00:1e.3 child on link 0 SPI: 00
1500 07:02:55.660052 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 07:02:55.660383 SPI: 00
1502 07:02:55.666376 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 07:02:55.673050 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 07:02:55.676931 PNP: 0c09.0
1505 07:02:55.682746 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 07:02:55.690195 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 07:02:55.699583 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 07:02:55.706904 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 07:02:55.713427 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 07:02:55.713877 GENERIC: 0.0
1511 07:02:55.716078 GENERIC: 1.0
1512 07:02:55.716535 PCI: 00:1f.3
1513 07:02:55.725758 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 07:02:55.739244 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 07:02:55.739570 PCI: 00:1f.5
1516 07:02:55.749239 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 07:02:55.756425 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 07:02:55.756752 APIC: 00
1519 07:02:55.757006 APIC: 01
1520 07:02:55.758787 APIC: 07
1521 07:02:55.759107 APIC: 02
1522 07:02:55.759356 APIC: 04
1523 07:02:55.762383 APIC: 06
1524 07:02:55.762736 APIC: 03
1525 07:02:55.765640 APIC: 05
1526 07:02:55.765957 Done allocating resources.
1527 07:02:55.772447 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 07:02:55.778735 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 07:02:55.782264 Configure GPIOs for I2S audio on UP4.
1530 07:02:55.789955 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 07:02:55.792710 Enabling resources...
1532 07:02:55.795935 PCI: 00:00.0 subsystem <- 8086/9a12
1533 07:02:55.799275 PCI: 00:00.0 cmd <- 06
1534 07:02:55.802955 PCI: 00:02.0 subsystem <- 8086/9a40
1535 07:02:55.805710 PCI: 00:02.0 cmd <- 03
1536 07:02:55.809352 PCI: 00:04.0 subsystem <- 8086/9a03
1537 07:02:55.812264 PCI: 00:04.0 cmd <- 02
1538 07:02:55.815923 PCI: 00:05.0 subsystem <- 8086/9a19
1539 07:02:55.816244 PCI: 00:05.0 cmd <- 02
1540 07:02:55.822436 PCI: 00:08.0 subsystem <- 8086/9a11
1541 07:02:55.822875 PCI: 00:08.0 cmd <- 06
1542 07:02:55.826326 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 07:02:55.829018 PCI: 00:0d.0 cmd <- 02
1544 07:02:55.832472 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 07:02:55.835517 PCI: 00:14.0 cmd <- 02
1546 07:02:55.839105 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 07:02:55.842214 PCI: 00:14.2 cmd <- 02
1548 07:02:55.845602 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 07:02:55.849156 PCI: 00:14.3 cmd <- 02
1550 07:02:55.852154 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 07:02:55.855595 PCI: 00:15.0 cmd <- 02
1552 07:02:55.858793 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 07:02:55.862344 PCI: 00:15.1 cmd <- 02
1554 07:02:55.865147 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 07:02:55.865504 PCI: 00:15.2 cmd <- 02
1556 07:02:55.872408 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 07:02:55.872730 PCI: 00:15.3 cmd <- 02
1558 07:02:55.875696 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 07:02:55.879369 PCI: 00:16.0 cmd <- 02
1560 07:02:55.882137 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 07:02:55.885215 PCI: 00:19.1 cmd <- 02
1562 07:02:55.889179 PCI: 00:1d.0 bridge ctrl <- 0013
1563 07:02:55.892047 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 07:02:55.895722 PCI: 00:1d.0 cmd <- 06
1565 07:02:55.898896 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 07:02:55.901861 PCI: 00:1e.0 cmd <- 06
1567 07:02:55.905381 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 07:02:55.908454 PCI: 00:1e.2 cmd <- 06
1569 07:02:55.912171 PCI: 00:1e.3 subsystem <- 8086/a0ab
1570 07:02:55.915098 PCI: 00:1e.3 cmd <- 02
1571 07:02:55.918664 PCI: 00:1f.0 subsystem <- 8086/a087
1572 07:02:55.919128 PCI: 00:1f.0 cmd <- 407
1573 07:02:55.925806 PCI: 00:1f.3 subsystem <- 8086/a0c8
1574 07:02:55.926132 PCI: 00:1f.3 cmd <- 02
1575 07:02:55.929044 PCI: 00:1f.5 subsystem <- 8086/a0a4
1576 07:02:55.931995 PCI: 00:1f.5 cmd <- 406
1577 07:02:55.936680 PCI: 01:00.0 cmd <- 02
1578 07:02:55.941311 done.
1579 07:02:55.944842 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1580 07:02:55.947864 Initializing devices...
1581 07:02:55.951224 Root Device init
1582 07:02:55.954755 Chrome EC: Set SMI mask to 0x0000000000000000
1583 07:02:55.961342 Chrome EC: clear events_b mask to 0x0000000000000000
1584 07:02:55.968282 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1585 07:02:55.974771 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1586 07:02:55.980709 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1587 07:02:55.984558 Chrome EC: Set WAKE mask to 0x0000000000000000
1588 07:02:55.992147 fw_config match found: DB_USB=USB3_ACTIVE
1589 07:02:55.994213 Configure Right Type-C port orientation for retimer
1590 07:02:55.998042 Root Device init finished in 45 msecs
1591 07:02:56.001769 PCI: 00:00.0 init
1592 07:02:56.005247 CPU TDP = 9 Watts
1593 07:02:56.005488 CPU PL1 = 9 Watts
1594 07:02:56.009018 CPU PL2 = 40 Watts
1595 07:02:56.012006 CPU PL4 = 83 Watts
1596 07:02:56.015263 PCI: 00:00.0 init finished in 8 msecs
1597 07:02:56.015507 PCI: 00:02.0 init
1598 07:02:56.018502 GMA: Found VBT in CBFS
1599 07:02:56.021939 GMA: Found valid VBT in CBFS
1600 07:02:56.028482 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1601 07:02:56.035307 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1602 07:02:56.038871 PCI: 00:02.0 init finished in 18 msecs
1603 07:02:56.041917 PCI: 00:05.0 init
1604 07:02:56.044820 PCI: 00:05.0 init finished in 0 msecs
1605 07:02:56.048404 PCI: 00:08.0 init
1606 07:02:56.051577 PCI: 00:08.0 init finished in 0 msecs
1607 07:02:56.055424 PCI: 00:14.0 init
1608 07:02:56.057853 PCI: 00:14.0 init finished in 0 msecs
1609 07:02:56.061476 PCI: 00:14.2 init
1610 07:02:56.064641 PCI: 00:14.2 init finished in 0 msecs
1611 07:02:56.067944 PCI: 00:15.0 init
1612 07:02:56.071468 I2C bus 0 version 0x3230302a
1613 07:02:56.074549 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 07:02:56.078086 PCI: 00:15.0 init finished in 6 msecs
1615 07:02:56.078315 PCI: 00:15.1 init
1616 07:02:56.081114 I2C bus 1 version 0x3230302a
1617 07:02:56.085094 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 07:02:56.091065 PCI: 00:15.1 init finished in 6 msecs
1619 07:02:56.091296 PCI: 00:15.2 init
1620 07:02:56.095808 I2C bus 2 version 0x3230302a
1621 07:02:56.098158 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 07:02:56.101774 PCI: 00:15.2 init finished in 6 msecs
1623 07:02:56.104758 PCI: 00:15.3 init
1624 07:02:56.107966 I2C bus 3 version 0x3230302a
1625 07:02:56.111089 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 07:02:56.114576 PCI: 00:15.3 init finished in 6 msecs
1627 07:02:56.117529 PCI: 00:16.0 init
1628 07:02:56.121241 PCI: 00:16.0 init finished in 0 msecs
1629 07:02:56.124245 PCI: 00:19.1 init
1630 07:02:56.127949 I2C bus 5 version 0x3230302a
1631 07:02:56.131174 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1632 07:02:56.134365 PCI: 00:19.1 init finished in 6 msecs
1633 07:02:56.137724 PCI: 00:1d.0 init
1634 07:02:56.137992 Initializing PCH PCIe bridge.
1635 07:02:56.144362 PCI: 00:1d.0 init finished in 3 msecs
1636 07:02:56.147694 PCI: 00:1f.0 init
1637 07:02:56.150736 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 07:02:56.154210 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 07:02:56.157706 IOAPIC: ID = 0x02
1640 07:02:56.160717 IOAPIC: Dumping registers
1641 07:02:56.160934 reg 0x0000: 0x02000000
1642 07:02:56.163947 reg 0x0001: 0x00770020
1643 07:02:56.168154 reg 0x0002: 0x00000000
1644 07:02:56.171154 PCI: 00:1f.0 init finished in 21 msecs
1645 07:02:56.174135 PCI: 00:1f.2 init
1646 07:02:56.177374 Disabling ACPI via APMC.
1647 07:02:56.177470 APMC done.
1648 07:02:56.183985 PCI: 00:1f.2 init finished in 5 msecs
1649 07:02:56.194087 PCI: 01:00.0 init
1650 07:02:56.197300 PCI: 01:00.0 init finished in 0 msecs
1651 07:02:56.201235 PNP: 0c09.0 init
1652 07:02:56.204505 Google Chrome EC uptime: 8.365 seconds
1653 07:02:56.211228 Google Chrome AP resets since EC boot: 1
1654 07:02:56.214187 Google Chrome most recent AP reset causes:
1655 07:02:56.218041 0.346: 32775 shutdown: entering G3
1656 07:02:56.223896 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 07:02:56.227465 PNP: 0c09.0 init finished in 22 msecs
1658 07:02:56.233110 Devices initialized
1659 07:02:56.236579 Show all devs... After init.
1660 07:02:56.239810 Root Device: enabled 1
1661 07:02:56.239899 DOMAIN: 0000: enabled 1
1662 07:02:56.242973 CPU_CLUSTER: 0: enabled 1
1663 07:02:56.246239 PCI: 00:00.0: enabled 1
1664 07:02:56.249443 PCI: 00:02.0: enabled 1
1665 07:02:56.249530 PCI: 00:04.0: enabled 1
1666 07:02:56.252887 PCI: 00:05.0: enabled 1
1667 07:02:56.256674 PCI: 00:06.0: enabled 0
1668 07:02:56.260097 PCI: 00:07.0: enabled 0
1669 07:02:56.260191 PCI: 00:07.1: enabled 0
1670 07:02:56.262770 PCI: 00:07.2: enabled 0
1671 07:02:56.266746 PCI: 00:07.3: enabled 0
1672 07:02:56.269422 PCI: 00:08.0: enabled 1
1673 07:02:56.269535 PCI: 00:09.0: enabled 0
1674 07:02:56.273175 PCI: 00:0a.0: enabled 0
1675 07:02:56.276085 PCI: 00:0d.0: enabled 1
1676 07:02:56.280368 PCI: 00:0d.1: enabled 0
1677 07:02:56.280499 PCI: 00:0d.2: enabled 0
1678 07:02:56.283283 PCI: 00:0d.3: enabled 0
1679 07:02:56.286176 PCI: 00:0e.0: enabled 0
1680 07:02:56.289722 PCI: 00:10.2: enabled 1
1681 07:02:56.290168 PCI: 00:10.6: enabled 0
1682 07:02:56.293190 PCI: 00:10.7: enabled 0
1683 07:02:56.296235 PCI: 00:12.0: enabled 0
1684 07:02:56.296845 PCI: 00:12.6: enabled 0
1685 07:02:56.299854 PCI: 00:13.0: enabled 0
1686 07:02:56.303345 PCI: 00:14.0: enabled 1
1687 07:02:56.306383 PCI: 00:14.1: enabled 0
1688 07:02:56.306880 PCI: 00:14.2: enabled 1
1689 07:02:56.309722 PCI: 00:14.3: enabled 1
1690 07:02:56.313003 PCI: 00:15.0: enabled 1
1691 07:02:56.316040 PCI: 00:15.1: enabled 1
1692 07:02:56.316493 PCI: 00:15.2: enabled 1
1693 07:02:56.319764 PCI: 00:15.3: enabled 1
1694 07:02:56.322754 PCI: 00:16.0: enabled 1
1695 07:02:56.326653 PCI: 00:16.1: enabled 0
1696 07:02:56.327106 PCI: 00:16.2: enabled 0
1697 07:02:56.329692 PCI: 00:16.3: enabled 0
1698 07:02:56.332707 PCI: 00:16.4: enabled 0
1699 07:02:56.336219 PCI: 00:16.5: enabled 0
1700 07:02:56.336670 PCI: 00:17.0: enabled 0
1701 07:02:56.339637 PCI: 00:19.0: enabled 0
1702 07:02:56.343056 PCI: 00:19.1: enabled 1
1703 07:02:56.343641 PCI: 00:19.2: enabled 0
1704 07:02:56.346263 PCI: 00:1c.0: enabled 1
1705 07:02:56.349025 PCI: 00:1c.1: enabled 0
1706 07:02:56.352819 PCI: 00:1c.2: enabled 0
1707 07:02:56.353269 PCI: 00:1c.3: enabled 0
1708 07:02:56.355661 PCI: 00:1c.4: enabled 0
1709 07:02:56.359195 PCI: 00:1c.5: enabled 0
1710 07:02:56.362835 PCI: 00:1c.6: enabled 1
1711 07:02:56.363200 PCI: 00:1c.7: enabled 0
1712 07:02:56.365636 PCI: 00:1d.0: enabled 1
1713 07:02:56.369269 PCI: 00:1d.1: enabled 0
1714 07:02:56.372393 PCI: 00:1d.2: enabled 1
1715 07:02:56.372640 PCI: 00:1d.3: enabled 0
1716 07:02:56.375675 PCI: 00:1e.0: enabled 1
1717 07:02:56.379007 PCI: 00:1e.1: enabled 0
1718 07:02:56.382938 PCI: 00:1e.2: enabled 1
1719 07:02:56.383470 PCI: 00:1e.3: enabled 1
1720 07:02:56.386015 PCI: 00:1f.0: enabled 1
1721 07:02:56.389607 PCI: 00:1f.1: enabled 0
1722 07:02:56.390083 PCI: 00:1f.2: enabled 1
1723 07:02:56.393141 PCI: 00:1f.3: enabled 1
1724 07:02:56.395548 PCI: 00:1f.4: enabled 0
1725 07:02:56.399154 PCI: 00:1f.5: enabled 1
1726 07:02:56.399820 PCI: 00:1f.6: enabled 0
1727 07:02:56.402403 PCI: 00:1f.7: enabled 0
1728 07:02:56.405278 APIC: 00: enabled 1
1729 07:02:56.408674 GENERIC: 0.0: enabled 1
1730 07:02:56.409134 GENERIC: 0.0: enabled 1
1731 07:02:56.412292 GENERIC: 1.0: enabled 1
1732 07:02:56.415907 GENERIC: 0.0: enabled 1
1733 07:02:56.419279 GENERIC: 1.0: enabled 1
1734 07:02:56.419730 USB0 port 0: enabled 1
1735 07:02:56.422022 GENERIC: 0.0: enabled 1
1736 07:02:56.425570 USB0 port 0: enabled 1
1737 07:02:56.426071 GENERIC: 0.0: enabled 1
1738 07:02:56.428444 I2C: 00:1a: enabled 1
1739 07:02:56.431888 I2C: 00:31: enabled 1
1740 07:02:56.432337 I2C: 00:32: enabled 1
1741 07:02:56.435236 I2C: 00:10: enabled 1
1742 07:02:56.438718 I2C: 00:15: enabled 1
1743 07:02:56.441903 GENERIC: 0.0: enabled 0
1744 07:02:56.442357 GENERIC: 1.0: enabled 0
1745 07:02:56.445260 GENERIC: 0.0: enabled 1
1746 07:02:56.448514 SPI: 00: enabled 1
1747 07:02:56.448969 SPI: 00: enabled 1
1748 07:02:56.451746 PNP: 0c09.0: enabled 1
1749 07:02:56.455299 GENERIC: 0.0: enabled 1
1750 07:02:56.455758 USB3 port 0: enabled 1
1751 07:02:56.458611 USB3 port 1: enabled 1
1752 07:02:56.461921 USB3 port 2: enabled 0
1753 07:02:56.462361 USB3 port 3: enabled 0
1754 07:02:56.465053 USB2 port 0: enabled 0
1755 07:02:56.468307 USB2 port 1: enabled 1
1756 07:02:56.471370 USB2 port 2: enabled 1
1757 07:02:56.471777 USB2 port 3: enabled 0
1758 07:02:56.474831 USB2 port 4: enabled 1
1759 07:02:56.478603 USB2 port 5: enabled 0
1760 07:02:56.478922 USB2 port 6: enabled 0
1761 07:02:56.481486 USB2 port 7: enabled 0
1762 07:02:56.485471 USB2 port 8: enabled 0
1763 07:02:56.488119 USB2 port 9: enabled 0
1764 07:02:56.488536 USB3 port 0: enabled 0
1765 07:02:56.491463 USB3 port 1: enabled 1
1766 07:02:56.494440 USB3 port 2: enabled 0
1767 07:02:56.494540 USB3 port 3: enabled 0
1768 07:02:56.497910 GENERIC: 0.0: enabled 1
1769 07:02:56.501684 GENERIC: 1.0: enabled 1
1770 07:02:56.501775 APIC: 01: enabled 1
1771 07:02:56.504372 APIC: 07: enabled 1
1772 07:02:56.507953 APIC: 02: enabled 1
1773 07:02:56.508042 APIC: 04: enabled 1
1774 07:02:56.511005 APIC: 06: enabled 1
1775 07:02:56.514775 APIC: 03: enabled 1
1776 07:02:56.514864 APIC: 05: enabled 1
1777 07:02:56.518825 PCI: 01:00.0: enabled 1
1778 07:02:56.524260 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1779 07:02:56.528107 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1780 07:02:56.530756 ELOG: NV offset 0xf30000 size 0x1000
1781 07:02:56.539052 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1782 07:02:56.545429 ELOG: Event(17) added with size 13 at 2023-03-22 07:02:55 UTC
1783 07:02:56.551422 ELOG: Event(92) added with size 9 at 2023-03-22 07:02:55 UTC
1784 07:02:56.558117 ELOG: Event(93) added with size 9 at 2023-03-22 07:02:55 UTC
1785 07:02:56.564555 ELOG: Event(9E) added with size 10 at 2023-03-22 07:02:55 UTC
1786 07:02:56.571353 ELOG: Event(9F) added with size 14 at 2023-03-22 07:02:55 UTC
1787 07:02:56.577901 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1788 07:02:56.585405 ELOG: Event(A1) added with size 10 at 2023-03-22 07:02:55 UTC
1789 07:02:56.591183 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1790 07:02:56.597581 ELOG: Event(A0) added with size 9 at 2023-03-22 07:02:55 UTC
1791 07:02:56.601507 elog_add_boot_reason: Logged dev mode boot
1792 07:02:56.608161 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1793 07:02:56.608270 Finalize devices...
1794 07:02:56.611090 Devices finalized
1795 07:02:56.618027 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1796 07:02:56.621221 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1797 07:02:56.627745 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1798 07:02:56.630703 ME: HFSTS1 : 0x80030055
1799 07:02:56.637588 ME: HFSTS2 : 0x30280116
1800 07:02:56.640802 ME: HFSTS3 : 0x00000050
1801 07:02:56.645158 ME: HFSTS4 : 0x00004000
1802 07:02:56.651420 ME: HFSTS5 : 0x00000000
1803 07:02:56.655232 ME: HFSTS6 : 0x00400006
1804 07:02:56.657991 ME: Manufacturing Mode : YES
1805 07:02:56.661039 ME: SPI Protection Mode Enabled : NO
1806 07:02:56.664542 ME: FW Partition Table : OK
1807 07:02:56.671650 ME: Bringup Loader Failure : NO
1808 07:02:56.674554 ME: Firmware Init Complete : NO
1809 07:02:56.677618 ME: Boot Options Present : NO
1810 07:02:56.681030 ME: Update In Progress : NO
1811 07:02:56.684497 ME: D0i3 Support : YES
1812 07:02:56.688206 ME: Low Power State Enabled : NO
1813 07:02:56.691039 ME: CPU Replaced : YES
1814 07:02:56.697938 ME: CPU Replacement Valid : YES
1815 07:02:56.700873 ME: Current Working State : 5
1816 07:02:56.704601 ME: Current Operation State : 1
1817 07:02:56.708304 ME: Current Operation Mode : 3
1818 07:02:56.710801 ME: Error Code : 0
1819 07:02:56.714146 ME: Enhanced Debug Mode : NO
1820 07:02:56.717807 ME: CPU Debug Disabled : YES
1821 07:02:56.721661 ME: TXT Support : NO
1822 07:02:56.727685 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1823 07:02:56.734387 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1824 07:02:56.737950 CBFS: 'fallback/slic' not found.
1825 07:02:56.744078 ACPI: Writing ACPI tables at 76b01000.
1826 07:02:56.744532 ACPI: * FACS
1827 07:02:56.747275 ACPI: * DSDT
1828 07:02:56.751366 Ramoops buffer: 0x100000@0x76a00000.
1829 07:02:56.754166 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1830 07:02:56.760544 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1831 07:02:56.763621 Google Chrome EC: version:
1832 07:02:56.767320 ro: voema_v2.0.7540-147f8d37d1
1833 07:02:56.770616 rw: voema_v2.0.7540-147f8d37d1
1834 07:02:56.771213 running image: 2
1835 07:02:56.777355 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1836 07:02:56.781892 ACPI: * FADT
1837 07:02:56.782412 SCI is IRQ9
1838 07:02:56.787999 ACPI: added table 1/32, length now 40
1839 07:02:56.788568 ACPI: * SSDT
1840 07:02:56.791436 Found 1 CPU(s) with 8 core(s) each.
1841 07:02:56.797896 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1842 07:02:56.801117 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1843 07:02:56.804594 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1844 07:02:56.808099 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1845 07:02:56.814676 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1846 07:02:56.821229 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1847 07:02:56.824561 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1848 07:02:56.831855 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1849 07:02:56.838101 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1850 07:02:56.841218 \_SB.PCI0.RP09: Added StorageD3Enable property
1851 07:02:56.848247 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1852 07:02:56.850781 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1853 07:02:56.858924 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1854 07:02:56.862238 PS2K: Passing 80 keymaps to kernel
1855 07:02:56.868347 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1856 07:02:56.875931 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1857 07:02:56.881142 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1858 07:02:56.887800 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1859 07:02:56.894952 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1860 07:02:56.901288 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1861 07:02:56.907828 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1862 07:02:56.914371 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1863 07:02:56.917564 ACPI: added table 2/32, length now 44
1864 07:02:56.921126 ACPI: * MCFG
1865 07:02:56.923965 ACPI: added table 3/32, length now 48
1866 07:02:56.924377 ACPI: * TPM2
1867 07:02:56.927487 TPM2 log created at 0x769f0000
1868 07:02:56.931496 ACPI: added table 4/32, length now 52
1869 07:02:56.934490 ACPI: * MADT
1870 07:02:56.934988 SCI is IRQ9
1871 07:02:56.937708 ACPI: added table 5/32, length now 56
1872 07:02:56.940909 current = 76b09850
1873 07:02:56.943807 ACPI: * DMAR
1874 07:02:56.946946 ACPI: added table 6/32, length now 60
1875 07:02:56.950550 ACPI: added table 7/32, length now 64
1876 07:02:56.950987 ACPI: * HPET
1877 07:02:56.957275 ACPI: added table 8/32, length now 68
1878 07:02:56.957731 ACPI: done.
1879 07:02:56.960397 ACPI tables: 35216 bytes.
1880 07:02:56.963902 smbios_write_tables: 769ef000
1881 07:02:56.967302 EC returned error result code 3
1882 07:02:56.970764 Couldn't obtain OEM name from CBI
1883 07:02:56.974052 Create SMBIOS type 16
1884 07:02:56.974377 Create SMBIOS type 17
1885 07:02:56.977279 GENERIC: 0.0 (WIFI Device)
1886 07:02:56.980093 SMBIOS tables: 1750 bytes.
1887 07:02:56.983641 Writing table forward entry at 0x00000500
1888 07:02:56.990095 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1889 07:02:56.993414 Writing coreboot table at 0x76b25000
1890 07:02:57.000441 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1891 07:02:57.003537 1. 0000000000001000-000000000009ffff: RAM
1892 07:02:57.010264 2. 00000000000a0000-00000000000fffff: RESERVED
1893 07:02:57.013224 3. 0000000000100000-00000000769eefff: RAM
1894 07:02:57.019834 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1895 07:02:57.022936 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1896 07:02:57.029902 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1897 07:02:57.036117 7. 0000000077000000-000000007fbfffff: RESERVED
1898 07:02:57.039470 8. 00000000c0000000-00000000cfffffff: RESERVED
1899 07:02:57.043209 9. 00000000f8000000-00000000f9ffffff: RESERVED
1900 07:02:57.049707 10. 00000000fb000000-00000000fb000fff: RESERVED
1901 07:02:57.052673 11. 00000000fe000000-00000000fe00ffff: RESERVED
1902 07:02:57.059317 12. 00000000fed80000-00000000fed87fff: RESERVED
1903 07:02:57.062687 13. 00000000fed90000-00000000fed92fff: RESERVED
1904 07:02:57.069468 14. 00000000feda0000-00000000feda1fff: RESERVED
1905 07:02:57.072688 15. 00000000fedc0000-00000000feddffff: RESERVED
1906 07:02:57.075993 16. 0000000100000000-00000002803fffff: RAM
1907 07:02:57.079333 Passing 4 GPIOs to payload:
1908 07:02:57.086101 NAME | PORT | POLARITY | VALUE
1909 07:02:57.089217 lid | undefined | high | high
1910 07:02:57.096072 power | undefined | high | low
1911 07:02:57.102715 oprom | undefined | high | low
1912 07:02:57.106170 EC in RW | 0x000000e5 | high | high
1913 07:02:57.112198 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum b332
1914 07:02:57.115734 coreboot table: 1576 bytes.
1915 07:02:57.118666 IMD ROOT 0. 0x76fff000 0x00001000
1916 07:02:57.122556 IMD SMALL 1. 0x76ffe000 0x00001000
1917 07:02:57.125616 FSP MEMORY 2. 0x76c4e000 0x003b0000
1918 07:02:57.132776 VPD 3. 0x76c4d000 0x00000367
1919 07:02:57.135392 RO MCACHE 4. 0x76c4c000 0x00000fdc
1920 07:02:57.138568 CONSOLE 5. 0x76c2c000 0x00020000
1921 07:02:57.142132 FMAP 6. 0x76c2b000 0x00000578
1922 07:02:57.145584 TIME STAMP 7. 0x76c2a000 0x00000910
1923 07:02:57.148680 VBOOT WORK 8. 0x76c16000 0x00014000
1924 07:02:57.152265 ROMSTG STCK 9. 0x76c15000 0x00001000
1925 07:02:57.155503 AFTER CAR 10. 0x76c0a000 0x0000b000
1926 07:02:57.161835 RAMSTAGE 11. 0x76b97000 0x00073000
1927 07:02:57.165441 REFCODE 12. 0x76b42000 0x00055000
1928 07:02:57.168809 SMM BACKUP 13. 0x76b32000 0x00010000
1929 07:02:57.172184 4f444749 14. 0x76b30000 0x00002000
1930 07:02:57.175129 EXT VBT15. 0x76b2d000 0x0000219f
1931 07:02:57.178314 COREBOOT 16. 0x76b25000 0x00008000
1932 07:02:57.181403 ACPI 17. 0x76b01000 0x00024000
1933 07:02:57.184769 ACPI GNVS 18. 0x76b00000 0x00001000
1934 07:02:57.188225 RAMOOPS 19. 0x76a00000 0x00100000
1935 07:02:57.195060 TPM2 TCGLOG20. 0x769f0000 0x00010000
1936 07:02:57.198899 SMBIOS 21. 0x769ef000 0x00000800
1937 07:02:57.199225 IMD small region:
1938 07:02:57.202324 IMD ROOT 0. 0x76ffec00 0x00000400
1939 07:02:57.208236 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1940 07:02:57.211871 POWER STATE 2. 0x76ffeb80 0x00000044
1941 07:02:57.215484 ROMSTAGE 3. 0x76ffeb60 0x00000004
1942 07:02:57.218013 MEM INFO 4. 0x76ffe980 0x000001e0
1943 07:02:57.224832 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1944 07:02:57.228448 MTRR: Physical address space:
1945 07:02:57.235198 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1946 07:02:57.242372 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1947 07:02:57.248226 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1948 07:02:57.251719 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1949 07:02:57.258108 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1950 07:02:57.265034 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1951 07:02:57.271725 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1952 07:02:57.274424 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 07:02:57.281844 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 07:02:57.284139 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 07:02:57.287532 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 07:02:57.290944 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 07:02:57.297680 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 07:02:57.300787 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 07:02:57.304211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 07:02:57.307408 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 07:02:57.314268 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 07:02:57.317972 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 07:02:57.320605 call enable_fixed_mtrr()
1964 07:02:57.324060 CPU physical address size: 39 bits
1965 07:02:57.327744 MTRR: default type WB/UC MTRR counts: 6/6.
1966 07:02:57.330853 MTRR: UC selected as default type.
1967 07:02:57.337137 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1968 07:02:57.344447 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1969 07:02:57.350633 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1970 07:02:57.357220 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1971 07:02:57.364537 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1972 07:02:57.370135 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1973 07:02:57.370556
1974 07:02:57.370841 MTRR check
1975 07:02:57.373676 Fixed MTRRs : Enabled
1976 07:02:57.377542 Variable MTRRs: Enabled
1977 07:02:57.377858
1978 07:02:57.380795 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 07:02:57.384300 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 07:02:57.390874 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 07:02:57.393734 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 07:02:57.396889 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 07:02:57.400533 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 07:02:57.407605 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 07:02:57.410341 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 07:02:57.413233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 07:02:57.416986 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 07:02:57.423680 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 07:02:57.430026 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1990 07:02:57.430119 call enable_fixed_mtrr()
1991 07:02:57.433190 Checking cr50 for pending updates
1992 07:02:57.436719 CPU physical address size: 39 bits
1993 07:02:57.443662 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 07:02:57.446736 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 07:02:57.450113 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 07:02:57.453737 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 07:02:57.460079 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 07:02:57.463712 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 07:02:57.467080 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 07:02:57.470540 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 07:02:57.476539 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 07:02:57.480229 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 07:02:57.483355 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 07:02:57.487360 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 07:02:57.494199 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 07:02:57.497056 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 07:02:57.500626 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 07:02:57.504543 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 07:02:57.510556 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 07:02:57.514307 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 07:02:57.517025 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 07:02:57.520534 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 07:02:57.527940 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 07:02:57.530653 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 07:02:57.533751 call enable_fixed_mtrr()
2016 07:02:57.537506 call enable_fixed_mtrr()
2017 07:02:57.540094 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 07:02:57.543524 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 07:02:57.547011 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 07:02:57.553800 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 07:02:57.556769 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 07:02:57.560120 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 07:02:57.563244 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 07:02:57.570007 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 07:02:57.573283 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 07:02:57.576850 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 07:02:57.580220 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 07:02:57.586590 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 07:02:57.590035 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 07:02:57.593715 call enable_fixed_mtrr()
2031 07:02:57.596723 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 07:02:57.599967 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 07:02:57.606487 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 07:02:57.610010 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 07:02:57.613494 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 07:02:57.616666 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 07:02:57.620648 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 07:02:57.626795 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 07:02:57.629999 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 07:02:57.633021 CPU physical address size: 39 bits
2041 07:02:57.637396 call enable_fixed_mtrr()
2042 07:02:57.641431 Reading cr50 TPM mode
2043 07:02:57.644712 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 07:02:57.647946 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 07:02:57.651969 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 07:02:57.658127 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 07:02:57.661282 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 07:02:57.664867 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 07:02:57.667858 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 07:02:57.671157 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 07:02:57.677778 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 07:02:57.681106 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 07:02:57.684618 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 07:02:57.687723 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 07:02:57.695728 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 07:02:57.696188 call enable_fixed_mtrr()
2057 07:02:57.702773 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 07:02:57.705519 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 07:02:57.708754 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 07:02:57.712373 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 07:02:57.718820 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 07:02:57.722263 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 07:02:57.725822 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 07:02:57.728539 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 07:02:57.735555 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 07:02:57.739044 CPU physical address size: 39 bits
2067 07:02:57.742267 call enable_fixed_mtrr()
2068 07:02:57.745281 CPU physical address size: 39 bits
2069 07:02:57.751859 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2070 07:02:57.755213 CPU physical address size: 39 bits
2071 07:02:57.758259 CPU physical address size: 39 bits
2072 07:02:57.762077 CPU physical address size: 39 bits
2073 07:02:57.771946 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2074 07:02:57.775398 Checking segment from ROM address 0xffc02b38
2075 07:02:57.778904 Checking segment from ROM address 0xffc02b54
2076 07:02:57.784981 Loading segment from ROM address 0xffc02b38
2077 07:02:57.785437 code (compression=0)
2078 07:02:57.794997 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2079 07:02:57.805095 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2080 07:02:57.805654 it's not compressed!
2081 07:02:57.945184 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2082 07:02:57.951534 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2083 07:02:57.958293 Loading segment from ROM address 0xffc02b54
2084 07:02:57.961516 Entry Point 0x30000000
2085 07:02:57.961969 Loaded segments
2086 07:02:57.967806 BS: BS_PAYLOAD_LOAD run times (exec / console): 147 / 63 ms
2087 07:02:58.010899 Finalizing chipset.
2088 07:02:58.014282 Finalizing SMM.
2089 07:02:58.014773 APMC done.
2090 07:02:58.020811 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2091 07:02:58.024047 mp_park_aps done after 0 msecs.
2092 07:02:58.027262 Jumping to boot code at 0x30000000(0x76b25000)
2093 07:02:58.038175 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2094 07:02:58.038732
2095 07:02:58.040734
2096 07:02:58.041295
2097 07:02:58.042689 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2098 07:02:58.043261 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2099 07:02:58.043693 Setting prompt string to ['volteer:']
2100 07:02:58.044101 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2101 07:02:58.045009 Starting depthcharge on Voema...
2102 07:02:58.045517
2103 07:02:58.050462 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2104 07:02:58.051114
2105 07:02:58.057194 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2106 07:02:58.057776
2107 07:02:58.064028 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2108 07:02:58.064631
2109 07:02:58.067050 Failed to find eMMC card reader
2110 07:02:58.067777
2111 07:02:58.070117 Wipe memory regions:
2112 07:02:58.070598
2113 07:02:58.073728 [0x00000000001000, 0x000000000a0000)
2114 07:02:58.074331
2115 07:02:58.076622 [0x00000000100000, 0x00000030000000)
2116 07:02:58.102221
2117 07:02:58.105992 [0x00000032662db0, 0x000000769ef000)
2118 07:02:58.141715
2119 07:02:58.144751 [0x00000100000000, 0x00000280400000)
2120 07:02:58.344099
2121 07:02:58.347249 ec_init: CrosEC protocol v3 supported (256, 256)
2122 07:02:58.347352
2123 07:02:58.353983 update_port_state: port C0 state: usb enable 1 mux conn 0
2124 07:02:58.354086
2125 07:02:58.363925 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2126 07:02:58.364055
2127 07:02:58.370421 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2128 07:02:58.370539
2129 07:02:58.373977 send_conn_disc_msg: pmc_send_cmd succeeded
2130 07:02:58.807249
2131 07:02:58.807409 R8152: Initializing
2132 07:02:58.807481
2133 07:02:58.810454 Version 6 (ocp_data = 5c30)
2134 07:02:58.810614
2135 07:02:58.813559 R8152: Done initializing
2136 07:02:58.813647
2137 07:02:58.816749 Adding net device
2138 07:02:59.118633
2139 07:02:59.122019 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2140 07:02:59.122114
2141 07:02:59.122182
2142 07:02:59.122247
2143 07:02:59.125196 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 07:02:59.226003 volteer: tftpboot 192.168.201.1 9726648/tftp-deploy-r64x1rps/kernel/bzImage 9726648/tftp-deploy-r64x1rps/kernel/cmdline 9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
2146 07:02:59.226188 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2147 07:02:59.226276 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2148 07:02:59.230840 tftpboot 192.168.201.1 9726648/tftp-deploy-r64x1rps/kernel/bzImaoy-r64x1rps/kernel/cmdline 9726648/tftp-deploy-r64x1rps/ramdisk/ramdisk.cpio.gz
2149 07:02:59.230933
2150 07:02:59.231022 Waiting for link
2151 07:02:59.436076
2152 07:02:59.436237 done.
2153 07:02:59.436308
2154 07:02:59.436373 MAC: 00:24:32:30:79:06
2155 07:02:59.436436
2156 07:02:59.438765 Sending DHCP discover... done.
2157 07:02:59.438857
2158 07:02:59.441888 Waiting for reply... done.
2159 07:02:59.441991
2160 07:02:59.445437 Sending DHCP request... done.
2161 07:02:59.445527
2162 07:02:59.448296 Waiting for reply... done.
2163 07:02:59.448383
2164 07:02:59.451829 My ip is 192.168.201.23
2165 07:02:59.451916
2166 07:02:59.455190 The DHCP server ip is 192.168.201.1
2167 07:02:59.455278
2168 07:02:59.458402 TFTP server IP predefined by user: 192.168.201.1
2169 07:02:59.458507
2170 07:02:59.465423 Bootfile predefined by user: 9726648/tftp-deploy-r64x1rps/kernel/bzImage
2171 07:02:59.465517
2172 07:02:59.468540 Sending tftp read request... done.
2173 07:02:59.471584
2174 07:02:59.474878 Waiting for the transfer...
2175 07:02:59.474966
2176 07:03:00.006237 00000000 ################################################################
2177 07:03:00.006395
2178 07:03:00.535825 00080000 ################################################################
2179 07:03:00.535980
2180 07:03:01.058665 00100000 ################################################################
2181 07:03:01.058856
2182 07:03:01.572538 00180000 ################################################################
2183 07:03:01.572692
2184 07:03:02.107604 00200000 ################################################################
2185 07:03:02.107756
2186 07:03:02.640399 00280000 ################################################################
2187 07:03:02.640545
2188 07:03:03.158645 00300000 ################################################################
2189 07:03:03.158828
2190 07:03:03.680540 00380000 ################################################################
2191 07:03:03.680725
2192 07:03:04.209671 00400000 ################################################################
2193 07:03:04.209858
2194 07:03:04.731389 00480000 ################################################################
2195 07:03:04.731532
2196 07:03:05.256456 00500000 ################################################################
2197 07:03:05.256634
2198 07:03:05.787068 00580000 ################################################################
2199 07:03:05.787211
2200 07:03:06.310238 00600000 ################################################################
2201 07:03:06.310413
2202 07:03:06.823638 00680000 ################################################################
2203 07:03:06.823819
2204 07:03:07.337497 00700000 ################################################################
2205 07:03:07.337646
2206 07:03:07.864168 00780000 ################################################################
2207 07:03:07.864311
2208 07:03:08.395995 00800000 ################################################################
2209 07:03:08.396147
2210 07:03:08.914897 00880000 ################################################################
2211 07:03:08.915037
2212 07:03:09.459297 00900000 ################################################################
2213 07:03:09.459438
2214 07:03:10.048465 00980000 ################################################################
2215 07:03:10.048618
2216 07:03:10.645519 00a00000 ################################################################
2217 07:03:10.645671
2218 07:03:11.219672 00a80000 ################################################################
2219 07:03:11.219826
2220 07:03:11.325457 00b00000 ############# done.
2221 07:03:11.325583
2222 07:03:11.328969 The bootfile was 11637120 bytes long.
2223 07:03:11.329059
2224 07:03:11.332294 Sending tftp read request... done.
2225 07:03:11.332381
2226 07:03:11.335130 Waiting for the transfer...
2227 07:03:11.335218
2228 07:03:11.875530 00000000 ################################################################
2229 07:03:11.875680
2230 07:03:12.403474 00080000 ################################################################
2231 07:03:12.403626
2232 07:03:12.939572 00100000 ################################################################
2233 07:03:12.939714
2234 07:03:13.477812 00180000 ################################################################
2235 07:03:13.477968
2236 07:03:14.004448 00200000 ################################################################
2237 07:03:14.004592
2238 07:03:14.539472 00280000 ################################################################
2239 07:03:14.539623
2240 07:03:15.067880 00300000 ################################################################
2241 07:03:15.068029
2242 07:03:15.597283 00380000 ################################################################
2243 07:03:15.597424
2244 07:03:16.110890 00400000 ################################################################
2245 07:03:16.111036
2246 07:03:16.628828 00480000 ################################################################
2247 07:03:16.628969
2248 07:03:17.145220 00500000 ################################################################
2249 07:03:17.145361
2250 07:03:17.655313 00580000 ################################################################
2251 07:03:17.655456
2252 07:03:18.176782 00600000 ################################################################
2253 07:03:18.176922
2254 07:03:18.704214 00680000 ################################################################
2255 07:03:18.704362
2256 07:03:19.280363 00700000 ################################################################
2257 07:03:19.280922
2258 07:03:19.948594 00780000 ################################################################
2259 07:03:19.949174
2260 07:03:20.569900 00800000 ################################################################
2261 07:03:20.570044
2262 07:03:20.934218 00880000 ####################################### done.
2263 07:03:20.934808
2264 07:03:20.937431 Sending tftp read request... done.
2265 07:03:20.937913
2266 07:03:20.940969 Waiting for the transfer...
2267 07:03:20.941485
2268 07:03:20.941862 00000000 # done.
2269 07:03:20.942225
2270 07:03:20.950557 Command line loaded dynamically from TFTP file: 9726648/tftp-deploy-r64x1rps/kernel/cmdline
2271 07:03:20.950979
2272 07:03:20.963729 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2273 07:03:20.969133
2274 07:03:20.972382 Shutting down all USB controllers.
2275 07:03:20.972804
2276 07:03:20.973133 Removing current net device
2277 07:03:20.973517
2278 07:03:20.975783 Finalizing coreboot
2279 07:03:20.976200
2280 07:03:20.982936 Exiting depthcharge with code 4 at timestamp: 31597243
2281 07:03:20.983353
2282 07:03:20.983680
2283 07:03:20.983984 Starting kernel ...
2284 07:03:20.984286
2285 07:03:20.984680
2286 07:03:20.985904 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2287 07:03:20.986372 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2288 07:03:20.986774 Setting prompt string to ['Linux version [0-9]']
2289 07:03:20.987108 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2290 07:03:20.987438 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2292 07:07:42.986797 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2294 07:07:42.987007 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2296 07:07:42.987169 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2299 07:07:42.987430 end: 2 depthcharge-action (duration 00:05:00) [common]
2301 07:07:42.987657 Cleaning after the job
2302 07:07:42.987747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/ramdisk
2303 07:07:42.988466 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/kernel
2304 07:07:42.989265 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726648/tftp-deploy-r64x1rps/modules
2305 07:07:42.989630 start: 5.1 power-off (timeout 00:00:30) [common]
2306 07:07:42.989781 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2307 07:07:43.064251 >> Command sent successfully.
2308 07:07:43.066419 Returned 0 in 0 seconds
2309 07:07:43.167261 end: 5.1 power-off (duration 00:00:00) [common]
2311 07:07:43.167600 start: 5.2 read-feedback (timeout 00:10:00) [common]
2312 07:07:43.167844 Listened to connection for namespace 'common' for up to 1s
2313 07:07:44.170639 Finalising connection for namespace 'common'
2314 07:07:44.170803 Disconnecting from shell: Finalise
2315 07:07:44.170882
2316 07:07:44.271640 end: 5.2 read-feedback (duration 00:00:01) [common]
2317 07:07:44.271796 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726648
2318 07:07:44.277628 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726648
2319 07:07:44.277762 JobError: Your job cannot terminate cleanly.