Boot log: dell-latitude-5400-4305U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:02:36.297315 lava-dispatcher, installed at version: 2023.01
2 07:02:36.297531 start: 0 validate
3 07:02:36.297667 Start time: 2023-03-22 07:02:36.297661+00:00 (UTC)
4 07:02:36.297814 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:02:36.297957 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 07:02:36.300519 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:02:36.300675 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:02:36.587938 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:02:36.588122 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:02:36.873292 validate duration: 0.58
12 07:02:36.873623 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:02:36.873830 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:02:36.873947 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:02:36.874069 Not decompressing ramdisk as can be used compressed.
16 07:02:36.874176 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 07:02:36.874257 saving as /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/ramdisk/rootfs.cpio.gz
18 07:02:36.874329 total size: 8429740 (8MB)
19 07:02:36.875287 progress 0% (0MB)
20 07:02:36.877773 progress 5% (0MB)
21 07:02:36.880174 progress 10% (0MB)
22 07:02:36.882692 progress 15% (1MB)
23 07:02:36.885302 progress 20% (1MB)
24 07:02:36.887825 progress 25% (2MB)
25 07:02:36.890508 progress 30% (2MB)
26 07:02:36.893121 progress 35% (2MB)
27 07:02:36.895322 progress 40% (3MB)
28 07:02:36.897682 progress 45% (3MB)
29 07:02:36.900049 progress 50% (4MB)
30 07:02:36.902356 progress 55% (4MB)
31 07:02:36.904759 progress 60% (4MB)
32 07:02:36.907121 progress 65% (5MB)
33 07:02:36.909677 progress 70% (5MB)
34 07:02:36.913222 progress 75% (6MB)
35 07:02:36.917014 progress 80% (6MB)
36 07:02:36.920779 progress 85% (6MB)
37 07:02:36.924546 progress 90% (7MB)
38 07:02:36.928312 progress 95% (7MB)
39 07:02:36.932121 progress 100% (8MB)
40 07:02:36.932376 8MB downloaded in 0.06s (138.51MB/s)
41 07:02:36.932622 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:02:36.933035 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:02:36.933186 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:02:36.933329 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:02:36.933496 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:02:36.933609 saving as /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/kernel/bzImage
48 07:02:36.933716 total size: 11637120 (11MB)
49 07:02:36.933824 No compression specified
50 07:02:36.935063 progress 0% (0MB)
51 07:02:36.940070 progress 5% (0MB)
52 07:02:36.945290 progress 10% (1MB)
53 07:02:36.950570 progress 15% (1MB)
54 07:02:36.955837 progress 20% (2MB)
55 07:02:36.960822 progress 25% (2MB)
56 07:02:36.966156 progress 30% (3MB)
57 07:02:36.971405 progress 35% (3MB)
58 07:02:36.976684 progress 40% (4MB)
59 07:02:36.981654 progress 45% (5MB)
60 07:02:36.986889 progress 50% (5MB)
61 07:02:36.992133 progress 55% (6MB)
62 07:02:36.997408 progress 60% (6MB)
63 07:02:37.002351 progress 65% (7MB)
64 07:02:37.007544 progress 70% (7MB)
65 07:02:37.012760 progress 75% (8MB)
66 07:02:37.017930 progress 80% (8MB)
67 07:02:37.022816 progress 85% (9MB)
68 07:02:37.028002 progress 90% (10MB)
69 07:02:37.033182 progress 95% (10MB)
70 07:02:37.038395 progress 100% (11MB)
71 07:02:37.038627 11MB downloaded in 0.10s (105.79MB/s)
72 07:02:37.038871 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:02:37.039281 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:02:37.039427 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:02:37.039574 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:02:37.039740 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:02:37.039857 saving as /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/modules/modules.tar
79 07:02:37.039966 total size: 499012 (0MB)
80 07:02:37.040070 Using unxz to decompress xz
81 07:02:37.044212 progress 6% (0MB)
82 07:02:37.044825 progress 13% (0MB)
83 07:02:37.045240 progress 19% (0MB)
84 07:02:37.047125 progress 26% (0MB)
85 07:02:37.050246 progress 32% (0MB)
86 07:02:37.053149 progress 39% (0MB)
87 07:02:37.055579 progress 45% (0MB)
88 07:02:37.057921 progress 52% (0MB)
89 07:02:37.060124 progress 59% (0MB)
90 07:02:37.062555 progress 65% (0MB)
91 07:02:37.064973 progress 72% (0MB)
92 07:02:37.067468 progress 78% (0MB)
93 07:02:37.069726 progress 85% (0MB)
94 07:02:37.071960 progress 91% (0MB)
95 07:02:37.074092 progress 98% (0MB)
96 07:02:37.083044 0MB downloaded in 0.04s (11.05MB/s)
97 07:02:37.083422 end: 1.3.1 http-download (duration 00:00:00) [common]
99 07:02:37.083738 end: 1.3 download-retry (duration 00:00:00) [common]
100 07:02:37.083887 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 07:02:37.084003 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 07:02:37.084114 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 07:02:37.084235 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 07:02:37.084449 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt
105 07:02:37.084590 makedir: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin
106 07:02:37.084706 makedir: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/tests
107 07:02:37.084816 makedir: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/results
108 07:02:37.084960 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-add-keys
109 07:02:37.085136 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-add-sources
110 07:02:37.085291 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-background-process-start
111 07:02:37.085439 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-background-process-stop
112 07:02:37.085583 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-common-functions
113 07:02:37.085725 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-echo-ipv4
114 07:02:37.085885 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-install-packages
115 07:02:37.086031 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-installed-packages
116 07:02:37.086173 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-os-build
117 07:02:37.086314 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-probe-channel
118 07:02:37.086459 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-probe-ip
119 07:02:37.086601 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-target-ip
120 07:02:37.086741 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-target-mac
121 07:02:37.086882 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-target-storage
122 07:02:37.087035 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-case
123 07:02:37.087199 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-event
124 07:02:37.087369 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-feedback
125 07:02:37.087543 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-raise
126 07:02:37.087679 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-reference
127 07:02:37.087821 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-runner
128 07:02:37.087951 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-set
129 07:02:37.088083 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-test-shell
130 07:02:37.088257 Updating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-install-packages (oe)
131 07:02:37.088394 Updating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/bin/lava-installed-packages (oe)
132 07:02:37.088511 Creating /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/environment
133 07:02:37.088611 LAVA metadata
134 07:02:37.088695 - LAVA_JOB_ID=9726634
135 07:02:37.088771 - LAVA_DISPATCHER_IP=192.168.201.1
136 07:02:37.088900 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 07:02:37.088981 skipped lava-vland-overlay
138 07:02:37.089071 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 07:02:37.089169 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 07:02:37.089243 skipped lava-multinode-overlay
141 07:02:37.089328 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 07:02:37.089425 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 07:02:37.089515 Loading test definitions
144 07:02:37.089675 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 07:02:37.089795 Using /lava-9726634 at stage 0
146 07:02:37.090113 uuid=9726634_1.4.2.3.1 testdef=None
147 07:02:37.090236 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 07:02:37.090368 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 07:02:37.090950 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 07:02:37.091332 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 07:02:37.092136 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 07:02:37.092442 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 07:02:37.093136 runner path: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/0/tests/0_dmesg test_uuid 9726634_1.4.2.3.1
156 07:02:37.093321 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 07:02:37.093619 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 07:02:37.093713 Using /lava-9726634 at stage 1
160 07:02:37.094104 uuid=9726634_1.4.2.3.5 testdef=None
161 07:02:37.094245 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 07:02:37.094362 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 07:02:37.094961 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 07:02:37.095286 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 07:02:37.095984 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 07:02:37.096252 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 07:02:37.096872 runner path: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/1/tests/1_bootrr test_uuid 9726634_1.4.2.3.5
170 07:02:37.097034 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 07:02:37.097278 Creating lava-test-runner.conf files
173 07:02:37.097359 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/0 for stage 0
174 07:02:37.097498 - 0_dmesg
175 07:02:37.097617 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726634/lava-overlay-n207tszt/lava-9726634/1 for stage 1
176 07:02:37.097723 - 1_bootrr
177 07:02:37.097837 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 07:02:37.097937 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 07:02:37.105419 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 07:02:37.105598 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 07:02:37.105711 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 07:02:37.105819 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 07:02:37.105938 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 07:02:37.366823 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 07:02:37.367306 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 07:02:37.367485 extracting modules file /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726634/extract-overlay-ramdisk-eohn85sg/ramdisk
187 07:02:37.389716 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 07:02:37.389964 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 07:02:37.390122 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726634/compress-overlay-2q419xk1/overlay-1.4.2.4.tar.gz to ramdisk
190 07:02:37.390247 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726634/compress-overlay-2q419xk1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726634/extract-overlay-ramdisk-eohn85sg/ramdisk
191 07:02:37.397273 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 07:02:37.397469 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 07:02:37.397620 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 07:02:37.397765 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 07:02:37.397899 Building ramdisk /var/lib/lava/dispatcher/tmp/9726634/extract-overlay-ramdisk-eohn85sg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726634/extract-overlay-ramdisk-eohn85sg/ramdisk
196 07:02:37.498810 >> 53719 blocks
197 07:02:38.672854 rename /var/lib/lava/dispatcher/tmp/9726634/extract-overlay-ramdisk-eohn85sg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
198 07:02:38.673325 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 07:02:38.673511 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 07:02:38.673640 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 07:02:38.673748 No mkimage arch provided, not using FIT.
202 07:02:38.673855 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 07:02:38.673955 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 07:02:38.674081 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 07:02:38.674222 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 07:02:38.674336 No LXC device requested
207 07:02:38.674437 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 07:02:38.674539 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 07:02:38.674638 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 07:02:38.674724 Checking files for TFTP limit of 4294967296 bytes.
211 07:02:38.675166 end: 1 tftp-deploy (duration 00:00:02) [common]
212 07:02:38.675292 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 07:02:38.675412 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 07:02:38.675553 substitutions:
215 07:02:38.675632 - {DTB}: None
216 07:02:38.675707 - {INITRD}: 9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
217 07:02:38.675777 - {KERNEL}: 9726634/tftp-deploy-ixp07mlz/kernel/bzImage
218 07:02:38.675845 - {LAVA_MAC}: None
219 07:02:38.675911 - {PRESEED_CONFIG}: None
220 07:02:38.675978 - {PRESEED_LOCAL}: None
221 07:02:38.676044 - {RAMDISK}: 9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
222 07:02:38.676111 - {ROOT_PART}: None
223 07:02:38.676194 - {ROOT}: None
224 07:02:38.676298 - {SERVER_IP}: 192.168.201.1
225 07:02:38.676392 - {TEE}: None
226 07:02:38.676474 Parsed boot commands:
227 07:02:38.676538 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 07:02:38.676711 Parsed boot commands: tftpboot 192.168.201.1 9726634/tftp-deploy-ixp07mlz/kernel/bzImage 9726634/tftp-deploy-ixp07mlz/kernel/cmdline 9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
229 07:02:38.676824 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 07:02:38.676924 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 07:02:38.677033 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 07:02:38.677133 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 07:02:38.677215 Not connected, no need to disconnect.
234 07:02:38.677306 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 07:02:38.677401 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 07:02:38.677485 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-1'
237 07:02:38.680867 Setting prompt string to ['lava-test: # ']
238 07:02:38.681345 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 07:02:38.681542 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 07:02:38.681715 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 07:02:38.681871 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 07:02:38.682206 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=reboot'
243 07:03:00.131570 >> Command sent successfully.
244 07:03:00.134144 Returned 0 in 21 seconds
245 07:03:00.234936 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
247 07:03:00.235302 end: 2.2.2 reset-device (duration 00:00:22) [common]
248 07:03:00.235430 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
249 07:03:00.235540 Setting prompt string to 'Starting depthcharge on sarien...'
250 07:03:00.235655 Changing prompt to 'Starting depthcharge on sarien...'
251 07:03:00.235755 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
252 07:03:00.236047 [Enter `^Ec?' for help]
253 07:03:00.236137
254 07:03:00.236213
255 07:03:00.236286 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
256 07:03:00.236361 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
257 07:03:00.236429 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
258 07:03:00.236496 CPU: AES supported, TXT NOT supported, VT supported
259 07:03:00.236562 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
260 07:03:00.236627 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
261 07:03:00.236692 IGD: device id 3ea1 (rev 02) is Unknown
262 07:03:00.236761 VBOOT: Loading verstage.
263 07:03:00.236826 CBFS @ 1d00000 size 300000
264 07:03:00.236890 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
265 07:03:00.236955 CBFS: Locating 'fallback/verstage'
266 07:03:00.237022 CBFS: Found @ offset 10f6c0 size 1435c
267 07:03:00.237087
268 07:03:00.237150
269 07:03:00.237229 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
270 07:03:00.237295 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
271 07:03:00.237360 done! DID_VID 0x00281ae0
272 07:03:00.237428 TPM ready after 0 ms
273 07:03:00.237518 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
274 07:03:00.237623 tlcl_send_startup: Startup return code is 0
275 07:03:00.237700 TPM: setup succeeded
276 07:03:00.237770 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
277 07:03:00.237854 Checking cr50 for recovery request
278 07:03:00.237924 Phase 1
279 07:03:00.237991 FMAP: Found "FLASH" version 1.1 at 1c10000.
280 07:03:00.238056 FMAP: base = fe000000 size = 2000000 #areas = 37
281 07:03:00.238121 FMAP: area GBB found @ 1c11000 (978944 bytes)
282 07:03:00.238188 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 07:03:00.238253 Phase 2
284 07:03:00.238321 Phase 3
285 07:03:00.238424 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 07:03:00.238512 VB2:vb2_report_dev_firmware() This is developer signed firmware
287 07:03:00.238590 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
288 07:03:00.238672 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
289 07:03:00.238738 VB2:vb2_verify_keyblock() Checking key block signature...
290 07:03:00.238803 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
291 07:03:00.238871 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
292 07:03:00.238937 VB2:vb2_verify_fw_preamble() Verifying preamble.
293 07:03:00.239001 Phase 4
294 07:03:00.239064 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
295 07:03:00.239144 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
296 07:03:00.239215 VB2:vb2_rsa_verify_digest() Digest check failed!
297 07:03:00.239332 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
298 07:03:00.239408 Saving nvdata
299 07:03:00.239475 Reboot requested (10020007)
300 07:03:00.239541 board_reset() called!
301 07:03:00.239609 full_reset() called!
302 07:03:02.306527
303 07:03:02.306684
304 07:03:02.315310 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
305 07:03:02.319567 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
306 07:03:02.324286 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
307 07:03:02.329480 CPU: AES supported, TXT NOT supported, VT supported
308 07:03:02.334811 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
309 07:03:02.339826 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
310 07:03:02.343864 IGD: device id 3ea1 (rev 02) is Unknown
311 07:03:02.347306 VBOOT: Loading verstage.
312 07:03:02.350136 CBFS @ 1d00000 size 300000
313 07:03:02.357006 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
314 07:03:02.360369 CBFS: Locating 'fallback/verstage'
315 07:03:02.363916 CBFS: Found @ offset 10f6c0 size 1435c
316 07:03:02.378665
317 07:03:02.378796
318 07:03:02.386387 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
319 07:03:02.393301 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
320 07:03:02.396175 done! DID_VID 0x00281ae0
321 07:03:02.398795 TPM ready after 0 ms
322 07:03:02.402659 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
323 07:03:02.491999 tlcl_send_startup: Startup return code is 0
324 07:03:02.493979 TPM: setup succeeded
325 07:03:02.511841 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
326 07:03:02.515254 Checking cr50 for recovery request
327 07:03:02.525306 Phase 1
328 07:03:02.529834 FMAP: Found "FLASH" version 1.1 at 1c10000.
329 07:03:02.534768 FMAP: base = fe000000 size = 2000000 #areas = 37
330 07:03:02.539458 FMAP: area GBB found @ 1c11000 (978944 bytes)
331 07:03:02.546394 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
332 07:03:02.552728 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
333 07:03:02.556020 Recovery requested (1009000e)
334 07:03:02.557371 Saving nvdata
335 07:03:02.573670 tlcl_extend: response is 0
336 07:03:02.587857 tlcl_extend: response is 0
337 07:03:02.592217 CBFS @ 1d00000 size 300000
338 07:03:02.598362 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
339 07:03:02.601401 CBFS: Locating 'fallback/romstage'
340 07:03:02.605159 CBFS: Found @ offset 80 size 15b2c
341 07:03:02.607025
342 07:03:02.607144
343 07:03:02.615378 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
344 07:03:02.620564 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
345 07:03:02.624193 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 07:03:02.629056 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 07:03:02.633086 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 07:03:02.637702 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
349 07:03:02.639247 TCO_STS: 0000 0004
350 07:03:02.642074 GEN_PMCON: d0015209 00002200
351 07:03:02.645317 GBLRST_CAUSE: 00000000 00000000
352 07:03:02.647381 prev_sleep_state 5
353 07:03:02.650992 Boot Count incremented to 17954
354 07:03:02.654752 CBFS @ 1d00000 size 300000
355 07:03:02.660299 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
356 07:03:02.663393 CBFS: Locating 'fspm.bin'
357 07:03:02.666645 CBFS: Found @ offset 60fc0 size 70000
358 07:03:02.672681 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 07:03:02.676960 FMAP: base = fe000000 size = 2000000 #areas = 37
360 07:03:02.682980 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
361 07:03:02.689024 Probing TPM I2C: done! DID_VID 0x00281ae0
362 07:03:02.691822 Locality already claimed
363 07:03:02.695668 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
364 07:03:02.714559 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
365 07:03:02.722019 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
366 07:03:02.724213 MRC cache found, size 18e0
367 07:03:02.726612 bootmode is set to :2
368 07:03:02.815987 CBMEM:
369 07:03:02.818944 IMD: root @ 89fff000 254 entries.
370 07:03:02.822303 IMD: root @ 89ffec00 62 entries.
371 07:03:02.825307 External stage cache:
372 07:03:02.828607 IMD: root @ 8abff000 254 entries.
373 07:03:02.831764 IMD: root @ 8abfec00 62 entries.
374 07:03:02.837986 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
375 07:03:02.842216 creating vboot_handoff structure
376 07:03:02.862258 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
377 07:03:02.878104 tlcl_write: response is 0
378 07:03:02.897026 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
379 07:03:02.901446 MRC: TPM MRC hash updated successfully.
380 07:03:02.902342 1 DIMMs found
381 07:03:02.905123 top_of_ram = 0x8a000000
382 07:03:02.910377 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
383 07:03:02.915851 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 07:03:02.918081 CBFS @ 1d00000 size 300000
385 07:03:02.924390 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 07:03:02.928205 CBFS: Locating 'fallback/postcar'
387 07:03:02.931183 CBFS: Found @ offset 107000 size 41a4
388 07:03:02.938238 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
389 07:03:02.948841 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
390 07:03:02.953543 Processing 126 relocs. Offset value of 0x87cdd000
391 07:03:02.955473
392 07:03:02.955566
393 07:03:02.964152 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
394 07:03:02.967042 CBFS @ 1d00000 size 300000
395 07:03:02.973272 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
396 07:03:02.977174 CBFS: Locating 'fallback/ramstage'
397 07:03:02.980148 CBFS: Found @ offset 458c0 size 1a8a8
398 07:03:02.987369 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
399 07:03:03.014085 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
400 07:03:03.019891 Processing 3754 relocs. Offset value of 0x88e81000
401 07:03:03.024671
402 07:03:03.024774
403 07:03:03.033474 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
404 07:03:03.037586 FMAP: Found "FLASH" version 1.1 at 1c10000.
405 07:03:03.043183 FMAP: base = fe000000 size = 2000000 #areas = 37
406 07:03:03.048006 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
407 07:03:03.051896 WARNING: RO_VPD is uninitialized or empty.
408 07:03:03.056498 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
409 07:03:03.061317 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
410 07:03:03.062869 Normal boot.
411 07:03:03.069213 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1162
412 07:03:03.072021 CBFS @ 1d00000 size 300000
413 07:03:03.078284 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
414 07:03:03.082043 CBFS: Locating 'cpu_microcode_blob.bin'
415 07:03:03.086421 CBFS: Found @ offset 15c40 size 2fc00
416 07:03:03.090892 microcode: sig=0x806ec pf=0x80 revision=0xb7
417 07:03:03.093288 Skip microcode update
418 07:03:03.095835 CBFS @ 1d00000 size 300000
419 07:03:03.102120 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
420 07:03:03.105046 CBFS: Locating 'fsps.bin'
421 07:03:03.108695 CBFS: Found @ offset d1fc0 size 35000
422 07:03:03.143268 Detected 2 core, 2 thread CPU.
423 07:03:03.145773 Setting up SMI for CPU
424 07:03:03.147722 IED base = 0x8ac00000
425 07:03:03.150152 IED size = 0x00400000
426 07:03:03.152387 Will perform SMM setup.
427 07:03:03.157004 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
428 07:03:03.164887 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
429 07:03:03.169932 Processing 16 relocs. Offset value of 0x00030000
430 07:03:03.172466 Attempting to start 1 APs
431 07:03:03.176861 Waiting for 10ms after sending INIT.
432 07:03:03.191117 Waiting for 1st SIPI to complete...done.
433 07:03:03.193051 AP: slot 1 apic_id 2.
434 07:03:03.197213 Waiting for 2nd SIPI to complete...done.
435 07:03:03.204583 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
436 07:03:03.209435 Processing 13 relocs. Offset value of 0x00038000
437 07:03:03.216608 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
438 07:03:03.220024 Installing SMM handler to 0x8a000000
439 07:03:03.227862 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
440 07:03:03.233196 Processing 867 relocs. Offset value of 0x8a010000
441 07:03:03.241411 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
442 07:03:03.246123 Processing 13 relocs. Offset value of 0x8a008000
443 07:03:03.251487 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
444 07:03:03.258118 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
445 07:03:03.261089 Clearing SMI status registers
446 07:03:03.263737 SMI_STS: PM1
447 07:03:03.265636 PM1_STS: WAK PWRBTN
448 07:03:03.268074 TCO_STS: BOOT SECOND_TO
449 07:03:03.269422 GPE0 STD STS: eSPI
450 07:03:03.271718 New SMBASE 0x8a000000
451 07:03:03.275131 In relocation handler: CPU 0
452 07:03:03.278947 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
453 07:03:03.284612 Writing SMRR. base = 0x8a000006, mask=0xff000800
454 07:03:03.285802 Relocation complete.
455 07:03:03.288376 New SMBASE 0x89fffc00
456 07:03:03.291075 In relocation handler: CPU 1
457 07:03:03.295027 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
458 07:03:03.299734 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 07:03:03.302522 Relocation complete.
460 07:03:03.304557 Initializing CPU #0
461 07:03:03.307673 CPU: vendor Intel device 806ec
462 07:03:03.311169 CPU: family 06, model 8e, stepping 0c
463 07:03:03.313843 Clearing out pending MCEs
464 07:03:03.318700 Setting up local APIC... apic_id: 0x00 done.
465 07:03:03.321437 Turbo is available but hidden
466 07:03:03.323508 Turbo has been enabled
467 07:03:03.325701 VMX status: enabled
468 07:03:03.329177 IA32_FEATURE_CONTROL status: locked
469 07:03:03.331721 Skip microcode update
470 07:03:03.333641 CPU #0 initialized
471 07:03:03.335745 Initializing CPU #1
472 07:03:03.339113 CPU: vendor Intel device 806ec
473 07:03:03.343163 CPU: family 06, model 8e, stepping 0c
474 07:03:03.345346 Clearing out pending MCEs
475 07:03:03.350033 Setting up local APIC... apic_id: 0x02 done.
476 07:03:03.352197 VMX status: enabled
477 07:03:03.356016 IA32_FEATURE_CONTROL status: locked
478 07:03:03.358731 Skip microcode update
479 07:03:03.360214 CPU #1 initialized
480 07:03:03.364316 bsp_do_flight_plan done after 163 msecs.
481 07:03:03.367439 CPU: frequency set to 2200 MHz
482 07:03:03.369033 Enabling SMIs.
483 07:03:03.370244 Locking SMM.
484 07:03:03.374047 CBFS @ 1d00000 size 300000
485 07:03:03.379547 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
486 07:03:03.381961 CBFS: Locating 'vbt.bin'
487 07:03:03.385918 CBFS: Found @ offset 60a40 size 4a0
488 07:03:03.391015 Found a VBT of 4608 bytes after decompression
489 07:03:03.404665 FMAP: area GBB found @ 1c11000 (978944 bytes)
490 07:03:03.521364 Detected 2 core, 2 thread CPU.
491 07:03:03.524531 Detected 2 core, 2 thread CPU.
492 07:03:03.751151 Display FSP Version Info HOB
493 07:03:03.754648 Reference Code - CPU = 7.0.5e.40
494 07:03:03.757301 uCode Version = 0.0.0.b8
495 07:03:03.759642 Display FSP Version Info HOB
496 07:03:03.763030 Reference Code - ME = 7.0.5e.40
497 07:03:03.765222 MEBx version = 0.0.0.0
498 07:03:03.769095 ME Firmware Version = Consumer SKU
499 07:03:03.771639 Display FSP Version Info HOB
500 07:03:03.775828 Reference Code - CNL PCH = 7.0.5e.40
501 07:03:03.778601 PCH-CRID Status = Disabled
502 07:03:03.781465 CNL PCH H A0 Hsio Version = 2.0.0.0
503 07:03:03.785572 CNL PCH H Ax Hsio Version = 9.0.0.0
504 07:03:03.789057 CNL PCH H Bx Hsio Version = a.0.0.0
505 07:03:03.792419 CNL PCH LP B0 Hsio Version = 7.0.0.0
506 07:03:03.796557 CNL PCH LP Bx Hsio Version = 6.0.0.0
507 07:03:03.800071 CNL PCH LP Dx Hsio Version = 7.0.0.0
508 07:03:03.803271 Display FSP Version Info HOB
509 07:03:03.807965 Reference Code - SA - System Agent = 7.0.5e.40
510 07:03:03.811898 Reference Code - MRC = 0.7.1.68
511 07:03:03.813949 SA - PCIe Version = 7.0.5e.40
512 07:03:03.816579 SA-CRID Status = Disabled
513 07:03:03.819609 SA-CRID Original Value = 0.0.0.c
514 07:03:03.822918 SA-CRID New Value = 0.0.0.c
515 07:03:03.841010 RTC Init
516 07:03:03.844595 Set power off after power failure.
517 07:03:03.846636 Disabling Deep S3
518 07:03:03.849182 Disabling Deep S3
519 07:03:03.850624 Disabling Deep S4
520 07:03:03.852134 Disabling Deep S4
521 07:03:03.854043 Disabling Deep S5
522 07:03:03.856171 Disabling Deep S5
523 07:03:03.862600 BS: BS_DEV_INIT_CHIPS times (us): entry 300868 run 469542 exit 16234
524 07:03:03.864756 Enumerating buses...
525 07:03:03.869739 Show all devs... Before device enumeration.
526 07:03:03.871670 Root Device: enabled 1
527 07:03:03.874315 CPU_CLUSTER: 0: enabled 1
528 07:03:03.876581 DOMAIN: 0000: enabled 1
529 07:03:03.878671 APIC: 00: enabled 1
530 07:03:03.881272 PCI: 00:00.0: enabled 1
531 07:03:03.883945 PCI: 00:02.0: enabled 1
532 07:03:03.886127 PCI: 00:04.0: enabled 1
533 07:03:03.888815 PCI: 00:12.0: enabled 1
534 07:03:03.891298 PCI: 00:12.5: enabled 0
535 07:03:03.893505 PCI: 00:12.6: enabled 0
536 07:03:03.896291 PCI: 00:13.0: enabled 0
537 07:03:03.898170 PCI: 00:14.0: enabled 1
538 07:03:03.900948 PCI: 00:14.1: enabled 0
539 07:03:03.902992 PCI: 00:14.3: enabled 1
540 07:03:03.906170 PCI: 00:14.5: enabled 0
541 07:03:03.908010 PCI: 00:15.0: enabled 1
542 07:03:03.910199 PCI: 00:15.1: enabled 1
543 07:03:03.912708 PCI: 00:15.2: enabled 0
544 07:03:03.915507 PCI: 00:15.3: enabled 0
545 07:03:03.918193 PCI: 00:16.0: enabled 1
546 07:03:03.920445 PCI: 00:16.1: enabled 0
547 07:03:03.922593 PCI: 00:16.2: enabled 0
548 07:03:03.925284 PCI: 00:16.3: enabled 0
549 07:03:03.927680 PCI: 00:16.4: enabled 0
550 07:03:03.929733 PCI: 00:16.5: enabled 0
551 07:03:03.932704 PCI: 00:17.0: enabled 1
552 07:03:03.934772 PCI: 00:19.0: enabled 1
553 07:03:03.937245 PCI: 00:19.1: enabled 0
554 07:03:03.939530 PCI: 00:19.2: enabled 1
555 07:03:03.942674 PCI: 00:1a.0: enabled 0
556 07:03:03.945499 PCI: 00:1c.0: enabled 1
557 07:03:03.947325 PCI: 00:1c.1: enabled 0
558 07:03:03.949757 PCI: 00:1c.2: enabled 0
559 07:03:03.951850 PCI: 00:1c.3: enabled 0
560 07:03:03.954032 PCI: 00:1c.4: enabled 0
561 07:03:03.956954 PCI: 00:1c.5: enabled 0
562 07:03:03.959857 PCI: 00:1c.6: enabled 0
563 07:03:03.962527 PCI: 00:1c.7: enabled 1
564 07:03:03.964092 PCI: 00:1d.0: enabled 1
565 07:03:03.966665 PCI: 00:1d.1: enabled 1
566 07:03:03.968957 PCI: 00:1d.2: enabled 0
567 07:03:03.971173 PCI: 00:1d.3: enabled 0
568 07:03:03.974078 PCI: 00:1d.4: enabled 1
569 07:03:03.976214 PCI: 00:1e.0: enabled 0
570 07:03:03.978456 PCI: 00:1e.1: enabled 0
571 07:03:03.981203 PCI: 00:1e.2: enabled 0
572 07:03:03.983971 PCI: 00:1e.3: enabled 0
573 07:03:03.986241 PCI: 00:1f.0: enabled 1
574 07:03:03.988122 PCI: 00:1f.1: enabled 1
575 07:03:03.990711 PCI: 00:1f.2: enabled 1
576 07:03:03.993653 PCI: 00:1f.3: enabled 1
577 07:03:03.995515 PCI: 00:1f.4: enabled 1
578 07:03:03.997778 PCI: 00:1f.5: enabled 1
579 07:03:04.000536 PCI: 00:1f.6: enabled 1
580 07:03:04.002931 USB0 port 0: enabled 1
581 07:03:04.005467 I2C: 00:10: enabled 1
582 07:03:04.007697 I2C: 00:10: enabled 1
583 07:03:04.009979 I2C: 00:34: enabled 1
584 07:03:04.012002 I2C: 00:2c: enabled 1
585 07:03:04.014741 I2C: 00:50: enabled 1
586 07:03:04.016524 PNP: 0c09.0: enabled 1
587 07:03:04.019016 USB2 port 0: enabled 1
588 07:03:04.021300 USB2 port 1: enabled 1
589 07:03:04.023930 USB2 port 2: enabled 1
590 07:03:04.025449 USB2 port 4: enabled 1
591 07:03:04.028048 USB2 port 5: enabled 1
592 07:03:04.030352 USB2 port 6: enabled 1
593 07:03:04.033048 USB2 port 7: enabled 1
594 07:03:04.034929 USB2 port 8: enabled 1
595 07:03:04.037233 USB2 port 9: enabled 1
596 07:03:04.039636 USB3 port 0: enabled 1
597 07:03:04.042359 USB3 port 1: enabled 1
598 07:03:04.044345 USB3 port 2: enabled 1
599 07:03:04.046915 USB3 port 3: enabled 1
600 07:03:04.048659 USB3 port 4: enabled 1
601 07:03:04.050864 APIC: 02: enabled 1
602 07:03:04.053035 Compare with tree...
603 07:03:04.055314 Root Device: enabled 1
604 07:03:04.058078 CPU_CLUSTER: 0: enabled 1
605 07:03:04.060524 APIC: 00: enabled 1
606 07:03:04.063206 APIC: 02: enabled 1
607 07:03:04.065274 DOMAIN: 0000: enabled 1
608 07:03:04.068601 PCI: 00:00.0: enabled 1
609 07:03:04.070704 PCI: 00:02.0: enabled 1
610 07:03:04.073571 PCI: 00:04.0: enabled 1
611 07:03:04.075690 PCI: 00:12.0: enabled 1
612 07:03:04.078976 PCI: 00:12.5: enabled 0
613 07:03:04.081070 PCI: 00:12.6: enabled 0
614 07:03:04.083515 PCI: 00:13.0: enabled 0
615 07:03:04.086190 PCI: 00:14.0: enabled 1
616 07:03:04.088881 USB0 port 0: enabled 1
617 07:03:04.092398 USB2 port 0: enabled 1
618 07:03:04.094087 USB2 port 1: enabled 1
619 07:03:04.097377 USB2 port 2: enabled 1
620 07:03:04.099532 USB2 port 4: enabled 1
621 07:03:04.102584 USB2 port 5: enabled 1
622 07:03:04.105454 USB2 port 6: enabled 1
623 07:03:04.107701 USB2 port 7: enabled 1
624 07:03:04.111520 USB2 port 8: enabled 1
625 07:03:04.113164 USB2 port 9: enabled 1
626 07:03:04.116456 USB3 port 0: enabled 1
627 07:03:04.119127 USB3 port 1: enabled 1
628 07:03:04.122007 USB3 port 2: enabled 1
629 07:03:04.124289 USB3 port 3: enabled 1
630 07:03:04.127640 USB3 port 4: enabled 1
631 07:03:04.129368 PCI: 00:14.1: enabled 0
632 07:03:04.132597 PCI: 00:14.3: enabled 1
633 07:03:04.134652 PCI: 00:14.5: enabled 0
634 07:03:04.137600 PCI: 00:15.0: enabled 1
635 07:03:04.139850 I2C: 00:10: enabled 1
636 07:03:04.142864 I2C: 00:10: enabled 1
637 07:03:04.145013 I2C: 00:34: enabled 1
638 07:03:04.147634 PCI: 00:15.1: enabled 1
639 07:03:04.149928 I2C: 00:2c: enabled 1
640 07:03:04.152523 PCI: 00:15.2: enabled 0
641 07:03:04.155849 PCI: 00:15.3: enabled 0
642 07:03:04.158023 PCI: 00:16.0: enabled 1
643 07:03:04.160715 PCI: 00:16.1: enabled 0
644 07:03:04.163304 PCI: 00:16.2: enabled 0
645 07:03:04.165725 PCI: 00:16.3: enabled 0
646 07:03:04.168307 PCI: 00:16.4: enabled 0
647 07:03:04.171086 PCI: 00:16.5: enabled 0
648 07:03:04.174238 PCI: 00:17.0: enabled 1
649 07:03:04.176792 PCI: 00:19.0: enabled 1
650 07:03:04.179362 I2C: 00:50: enabled 1
651 07:03:04.181278 PCI: 00:19.1: enabled 0
652 07:03:04.184298 PCI: 00:19.2: enabled 1
653 07:03:04.186947 PCI: 00:1a.0: enabled 0
654 07:03:04.189185 PCI: 00:1c.0: enabled 1
655 07:03:04.192090 PCI: 00:1c.1: enabled 0
656 07:03:04.194892 PCI: 00:1c.2: enabled 0
657 07:03:04.197226 PCI: 00:1c.3: enabled 0
658 07:03:04.200086 PCI: 00:1c.4: enabled 0
659 07:03:04.203369 PCI: 00:1c.5: enabled 0
660 07:03:04.205355 PCI: 00:1c.6: enabled 0
661 07:03:04.208779 PCI: 00:1c.7: enabled 1
662 07:03:04.210261 PCI: 00:1d.0: enabled 1
663 07:03:04.212986 PCI: 00:1d.1: enabled 1
664 07:03:04.215910 PCI: 00:1d.2: enabled 0
665 07:03:04.219006 PCI: 00:1d.3: enabled 0
666 07:03:04.221857 PCI: 00:1d.4: enabled 1
667 07:03:04.223315 PCI: 00:1e.0: enabled 0
668 07:03:04.226832 PCI: 00:1e.1: enabled 0
669 07:03:04.229222 PCI: 00:1e.2: enabled 0
670 07:03:04.231760 PCI: 00:1e.3: enabled 0
671 07:03:04.234054 PCI: 00:1f.0: enabled 1
672 07:03:04.236859 PNP: 0c09.0: enabled 1
673 07:03:04.239584 PCI: 00:1f.1: enabled 1
674 07:03:04.241745 PCI: 00:1f.2: enabled 1
675 07:03:04.245528 PCI: 00:1f.3: enabled 1
676 07:03:04.247665 PCI: 00:1f.4: enabled 1
677 07:03:04.249664 PCI: 00:1f.5: enabled 1
678 07:03:04.252305 PCI: 00:1f.6: enabled 1
679 07:03:04.254587 Root Device scanning...
680 07:03:04.259411 root_dev_scan_bus for Root Device
681 07:03:04.261298 CPU_CLUSTER: 0 enabled
682 07:03:04.263326 DOMAIN: 0000 enabled
683 07:03:04.265318 DOMAIN: 0000 scanning...
684 07:03:04.268485 PCI: pci_scan_bus for bus 00
685 07:03:04.271628 PCI: 00:00.0 [8086/0000] ops
686 07:03:04.275055 PCI: 00:00.0 [8086/3e35] enabled
687 07:03:04.277999 PCI: 00:02.0 [8086/0000] ops
688 07:03:04.282046 PCI: 00:02.0 [8086/3ea1] enabled
689 07:03:04.285203 PCI: 00:04.0 [8086/1903] enabled
690 07:03:04.288099 PCI: 00:08.0 [8086/1911] enabled
691 07:03:04.291365 PCI: 00:12.0 [8086/9df9] enabled
692 07:03:04.295105 PCI: 00:14.0 [8086/0000] bus ops
693 07:03:04.298007 PCI: 00:14.0 [8086/9ded] enabled
694 07:03:04.301496 PCI: 00:14.2 [8086/9def] enabled
695 07:03:04.304504 PCI: 00:14.3 [8086/9df0] enabled
696 07:03:04.307900 PCI: 00:15.0 [8086/0000] bus ops
697 07:03:04.311281 PCI: 00:15.0 [8086/9de8] enabled
698 07:03:04.315147 PCI: 00:15.1 [8086/0000] bus ops
699 07:03:04.318548 PCI: 00:15.1 [8086/9de9] enabled
700 07:03:04.320901 PCI: 00:16.0 [8086/0000] ops
701 07:03:04.324838 PCI: 00:16.0 [8086/9de0] enabled
702 07:03:04.327116 PCI: 00:17.0 [8086/0000] ops
703 07:03:04.330642 PCI: 00:17.0 [8086/9dd3] enabled
704 07:03:04.333986 PCI: 00:19.0 [8086/0000] bus ops
705 07:03:04.337509 PCI: 00:19.0 [8086/9dc5] enabled
706 07:03:04.339774 PCI: 00:19.2 [8086/0000] ops
707 07:03:04.343860 PCI: 00:19.2 [8086/9dc7] enabled
708 07:03:04.346614 PCI: 00:1c.0 [8086/0000] bus ops
709 07:03:04.350139 PCI: 00:1c.0 [8086/9dbf] enabled
710 07:03:04.356025 PCI: Static device PCI: 00:1c.7 not found, disabling it.
711 07:03:04.359461 PCI: 00:1d.0 [8086/0000] bus ops
712 07:03:04.362228 PCI: 00:1d.0 [8086/9db4] enabled
713 07:03:04.368596 PCI: Static device PCI: 00:1d.1 not found, disabling it.
714 07:03:04.373296 PCI: Static device PCI: 00:1d.4 not found, disabling it.
715 07:03:04.377111 PCI: 00:1f.0 [8086/0000] bus ops
716 07:03:04.380270 PCI: 00:1f.0 [8086/9d84] enabled
717 07:03:04.385617 PCI: Static device PCI: 00:1f.1 not found, disabling it.
718 07:03:04.391486 PCI: Static device PCI: 00:1f.2 not found, disabling it.
719 07:03:04.395108 PCI: 00:1f.3 [8086/0000] bus ops
720 07:03:04.398388 PCI: 00:1f.3 [8086/9dc8] enabled
721 07:03:04.401256 PCI: 00:1f.4 [8086/0000] bus ops
722 07:03:04.404968 PCI: 00:1f.4 [8086/9da3] enabled
723 07:03:04.407884 PCI: 00:1f.5 [8086/0000] bus ops
724 07:03:04.411012 PCI: 00:1f.5 [8086/9da4] enabled
725 07:03:04.414689 PCI: 00:1f.6 [8086/15be] enabled
726 07:03:04.418170 PCI: Leftover static devices:
727 07:03:04.420010 PCI: 00:12.5
728 07:03:04.420303 PCI: 00:12.6
729 07:03:04.422755 PCI: 00:13.0
730 07:03:04.424168 PCI: 00:14.1
731 07:03:04.424895 PCI: 00:14.5
732 07:03:04.425876 PCI: 00:15.2
733 07:03:04.427702 PCI: 00:15.3
734 07:03:04.428659 PCI: 00:16.1
735 07:03:04.430524 PCI: 00:16.2
736 07:03:04.431506 PCI: 00:16.3
737 07:03:04.432833 PCI: 00:16.4
738 07:03:04.434010 PCI: 00:16.5
739 07:03:04.436305 PCI: 00:19.1
740 07:03:04.436786 PCI: 00:1a.0
741 07:03:04.438049 PCI: 00:1c.1
742 07:03:04.440021 PCI: 00:1c.2
743 07:03:04.441828 PCI: 00:1c.3
744 07:03:04.442634 PCI: 00:1c.4
745 07:03:04.443400 PCI: 00:1c.5
746 07:03:04.444878 PCI: 00:1c.6
747 07:03:04.446176 PCI: 00:1c.7
748 07:03:04.447624 PCI: 00:1d.1
749 07:03:04.449032 PCI: 00:1d.2
750 07:03:04.450292 PCI: 00:1d.3
751 07:03:04.451749 PCI: 00:1d.4
752 07:03:04.453109 PCI: 00:1e.0
753 07:03:04.454466 PCI: 00:1e.1
754 07:03:04.456468 PCI: 00:1e.2
755 07:03:04.457324 PCI: 00:1e.3
756 07:03:04.458647 PCI: 00:1f.1
757 07:03:04.460179 PCI: 00:1f.2
758 07:03:04.463559 PCI: Check your devicetree.cb.
759 07:03:04.465947 PCI: 00:14.0 scanning...
760 07:03:04.468610 scan_usb_bus for PCI: 00:14.0
761 07:03:04.471402 USB0 port 0 enabled
762 07:03:04.473373 USB0 port 0 scanning...
763 07:03:04.477181 scan_usb_bus for USB0 port 0
764 07:03:04.478551 USB2 port 0 enabled
765 07:03:04.481127 USB2 port 1 enabled
766 07:03:04.482657 USB2 port 2 enabled
767 07:03:04.485109 USB2 port 4 enabled
768 07:03:04.486710 USB2 port 5 enabled
769 07:03:04.489053 USB2 port 6 enabled
770 07:03:04.491113 USB2 port 7 enabled
771 07:03:04.493611 USB2 port 8 enabled
772 07:03:04.495480 USB2 port 9 enabled
773 07:03:04.497333 USB3 port 0 enabled
774 07:03:04.498920 USB3 port 1 enabled
775 07:03:04.500968 USB3 port 2 enabled
776 07:03:04.503008 USB3 port 3 enabled
777 07:03:04.505417 USB3 port 4 enabled
778 07:03:04.507693 USB2 port 0 scanning...
779 07:03:04.511126 scan_usb_bus for USB2 port 0
780 07:03:04.514109 scan_usb_bus for USB2 port 0 done
781 07:03:04.520171 scan_bus: scanning of bus USB2 port 0 took 9062 usecs
782 07:03:04.522108 USB2 port 1 scanning...
783 07:03:04.525737 scan_usb_bus for USB2 port 1
784 07:03:04.528559 scan_usb_bus for USB2 port 1 done
785 07:03:04.534552 scan_bus: scanning of bus USB2 port 1 took 9060 usecs
786 07:03:04.536939 USB2 port 2 scanning...
787 07:03:04.539788 scan_usb_bus for USB2 port 2
788 07:03:04.543280 scan_usb_bus for USB2 port 2 done
789 07:03:04.548901 scan_bus: scanning of bus USB2 port 2 took 9062 usecs
790 07:03:04.550981 USB2 port 4 scanning...
791 07:03:04.553924 scan_usb_bus for USB2 port 4
792 07:03:04.557364 scan_usb_bus for USB2 port 4 done
793 07:03:04.563030 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
794 07:03:04.565754 USB2 port 5 scanning...
795 07:03:04.568874 scan_usb_bus for USB2 port 5
796 07:03:04.572806 scan_usb_bus for USB2 port 5 done
797 07:03:04.578019 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
798 07:03:04.579544 USB2 port 6 scanning...
799 07:03:04.583499 scan_usb_bus for USB2 port 6
800 07:03:04.586239 scan_usb_bus for USB2 port 6 done
801 07:03:04.591745 scan_bus: scanning of bus USB2 port 6 took 9061 usecs
802 07:03:04.594217 USB2 port 7 scanning...
803 07:03:04.597504 scan_usb_bus for USB2 port 7
804 07:03:04.600837 scan_usb_bus for USB2 port 7 done
805 07:03:04.606030 scan_bus: scanning of bus USB2 port 7 took 9059 usecs
806 07:03:04.609157 USB2 port 8 scanning...
807 07:03:04.611559 scan_usb_bus for USB2 port 8
808 07:03:04.615566 scan_usb_bus for USB2 port 8 done
809 07:03:04.620825 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
810 07:03:04.622674 USB2 port 9 scanning...
811 07:03:04.627015 scan_usb_bus for USB2 port 9
812 07:03:04.629823 scan_usb_bus for USB2 port 9 done
813 07:03:04.634915 scan_bus: scanning of bus USB2 port 9 took 9061 usecs
814 07:03:04.637447 USB3 port 0 scanning...
815 07:03:04.640354 scan_usb_bus for USB3 port 0
816 07:03:04.644512 scan_usb_bus for USB3 port 0 done
817 07:03:04.649627 scan_bus: scanning of bus USB3 port 0 took 9061 usecs
818 07:03:04.651732 USB3 port 1 scanning...
819 07:03:04.655172 scan_usb_bus for USB3 port 1
820 07:03:04.658188 scan_usb_bus for USB3 port 1 done
821 07:03:04.664322 scan_bus: scanning of bus USB3 port 1 took 9059 usecs
822 07:03:04.666591 USB3 port 2 scanning...
823 07:03:04.669306 scan_usb_bus for USB3 port 2
824 07:03:04.672696 scan_usb_bus for USB3 port 2 done
825 07:03:04.678578 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
826 07:03:04.680899 USB3 port 3 scanning...
827 07:03:04.683713 scan_usb_bus for USB3 port 3
828 07:03:04.687457 scan_usb_bus for USB3 port 3 done
829 07:03:04.692361 scan_bus: scanning of bus USB3 port 3 took 9061 usecs
830 07:03:04.694904 USB3 port 4 scanning...
831 07:03:04.698276 scan_usb_bus for USB3 port 4
832 07:03:04.701993 scan_usb_bus for USB3 port 4 done
833 07:03:04.706693 scan_bus: scanning of bus USB3 port 4 took 9061 usecs
834 07:03:04.710485 scan_usb_bus for USB0 port 0 done
835 07:03:04.715509 scan_bus: scanning of bus USB0 port 0 took 239300 usecs
836 07:03:04.719504 scan_usb_bus for PCI: 00:14.0 done
837 07:03:04.724970 scan_bus: scanning of bus PCI: 00:14.0 took 256228 usecs
838 07:03:04.727250 PCI: 00:15.0 scanning...
839 07:03:04.731635 scan_generic_bus for PCI: 00:15.0
840 07:03:04.736013 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
841 07:03:04.739502 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
842 07:03:04.743695 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
843 07:03:04.747273 scan_generic_bus for PCI: 00:15.0 done
844 07:03:04.752979 scan_bus: scanning of bus PCI: 00:15.0 took 22381 usecs
845 07:03:04.755743 PCI: 00:15.1 scanning...
846 07:03:04.759224 scan_generic_bus for PCI: 00:15.1
847 07:03:04.763313 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
848 07:03:04.767065 scan_generic_bus for PCI: 00:15.1 done
849 07:03:04.772663 scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs
850 07:03:04.775330 PCI: 00:19.0 scanning...
851 07:03:04.778782 scan_generic_bus for PCI: 00:19.0
852 07:03:04.782989 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
853 07:03:04.786484 scan_generic_bus for PCI: 00:19.0 done
854 07:03:04.792318 scan_bus: scanning of bus PCI: 00:19.0 took 14214 usecs
855 07:03:04.795111 PCI: 00:1c.0 scanning...
856 07:03:04.799453 do_pci_scan_bridge for PCI: 00:1c.0
857 07:03:04.802168 PCI: pci_scan_bus for bus 01
858 07:03:04.805011 PCI: 01:00.0 [10ec/525a] enabled
859 07:03:04.808745 Capability: type 0x01 @ 0x80
860 07:03:04.811385 Capability: type 0x05 @ 0x90
861 07:03:04.814024 Capability: type 0x10 @ 0xb0
862 07:03:04.817222 Capability: type 0x10 @ 0x40
863 07:03:04.821111 Enabling Common Clock Configuration
864 07:03:04.825022 L1 Sub-State supported from root port 28
865 07:03:04.828005 L1 Sub-State Support = 0xf
866 07:03:04.830683 CommonModeRestoreTime = 0x3c
867 07:03:04.835610 Power On Value = 0x6, Power On Scale = 0x1
868 07:03:04.838202 ASPM: Enabled L0s and L1
869 07:03:04.840426 Capability: type 0x01 @ 0x80
870 07:03:04.843261 Capability: type 0x05 @ 0x90
871 07:03:04.846581 Capability: type 0x10 @ 0xb0
872 07:03:04.852438 scan_bus: scanning of bus PCI: 00:1c.0 took 53664 usecs
873 07:03:04.853974 PCI: 00:1d.0 scanning...
874 07:03:04.858642 do_pci_scan_bridge for PCI: 00:1d.0
875 07:03:04.860833 PCI: pci_scan_bus for bus 02
876 07:03:04.864533 PCI: 02:00.0 [1e95/9100] enabled
877 07:03:04.867777 Capability: type 0x01 @ 0x40
878 07:03:04.870537 Capability: type 0x05 @ 0x50
879 07:03:04.873446 Capability: type 0x10 @ 0x70
880 07:03:04.876786 Capability: type 0x10 @ 0x40
881 07:03:04.879753 Enabling Common Clock Configuration
882 07:03:04.883875 L1 Sub-State supported from root port 29
883 07:03:04.886636 L1 Sub-State Support = 0xf
884 07:03:04.890369 CommonModeRestoreTime = 0x28
885 07:03:04.894002 Power On Value = 0x16, Power On Scale = 0x0
886 07:03:04.895683 ASPM: Enabled L1
887 07:03:04.899302 Capability: type 0x01 @ 0x40
888 07:03:04.901368 Capability: type 0x05 @ 0x50
889 07:03:04.904766 Capability: type 0x10 @ 0x70
890 07:03:04.910175 scan_bus: scanning of bus PCI: 00:1d.0 took 52966 usecs
891 07:03:04.912368 PCI: 00:1f.0 scanning...
892 07:03:04.915899 scan_lpc_bus for PCI: 00:1f.0
893 07:03:04.917917 PNP: 0c09.0 enabled
894 07:03:04.921727 scan_lpc_bus for PCI: 00:1f.0 done
895 07:03:04.927230 scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
896 07:03:04.929395 PCI: 00:1f.3 scanning...
897 07:03:04.935181 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
898 07:03:04.938214 PCI: 00:1f.4 scanning...
899 07:03:04.941718 scan_generic_bus for PCI: 00:1f.4
900 07:03:04.945759 scan_generic_bus for PCI: 00:1f.4 done
901 07:03:04.950691 scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs
902 07:03:04.954051 PCI: 00:1f.5 scanning...
903 07:03:04.956982 scan_generic_bus for PCI: 00:1f.5
904 07:03:04.961131 scan_generic_bus for PCI: 00:1f.5 done
905 07:03:04.967283 scan_bus: scanning of bus PCI: 00:1f.5 took 10129 usecs
906 07:03:04.972238 scan_bus: scanning of bus DOMAIN: 0000 took 703664 usecs
907 07:03:04.976181 root_dev_scan_bus for Root Device done
908 07:03:04.982020 scan_bus: scanning of bus Root Device took 723804 usecs
909 07:03:04.982462 done
910 07:03:04.988987 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
911 07:03:04.995155 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
912 07:03:05.002248 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
913 07:03:05.009245 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
914 07:03:05.012827 SPI flash protection: WPSW=1 SRP0=1
915 07:03:05.019817 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
916 07:03:05.025364 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
917 07:03:05.032392 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1119866 exit 42597
918 07:03:05.034461 found VGA at PCI: 00:02.0
919 07:03:05.037343 Setting up VGA for PCI: 00:02.0
920 07:03:05.042415 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
921 07:03:05.048167 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
922 07:03:05.050306 Allocating resources...
923 07:03:05.052185 Reading resources...
924 07:03:05.056055 Root Device read_resources bus 0 link: 0
925 07:03:05.060861 CPU_CLUSTER: 0 read_resources bus 0 link: 0
926 07:03:05.065906 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
927 07:03:05.071415 DOMAIN: 0000 read_resources bus 0 link: 0
928 07:03:05.076602 PCI: 00:14.0 read_resources bus 0 link: 0
929 07:03:05.081420 USB0 port 0 read_resources bus 0 link: 0
930 07:03:05.090512 USB0 port 0 read_resources bus 0 link: 0 done
931 07:03:05.095774 PCI: 00:14.0 read_resources bus 0 link: 0 done
932 07:03:05.100820 PCI: 00:15.0 read_resources bus 1 link: 0
933 07:03:05.106422 PCI: 00:15.0 read_resources bus 1 link: 0 done
934 07:03:05.110985 PCI: 00:15.1 read_resources bus 2 link: 0
935 07:03:05.116320 PCI: 00:15.1 read_resources bus 2 link: 0 done
936 07:03:05.121830 PCI: 00:19.0 read_resources bus 3 link: 0
937 07:03:05.127032 PCI: 00:19.0 read_resources bus 3 link: 0 done
938 07:03:05.131759 PCI: 00:1c.0 read_resources bus 1 link: 0
939 07:03:05.138037 PCI: 00:1c.0 read_resources bus 1 link: 0 done
940 07:03:05.141942 PCI: 00:1d.0 read_resources bus 2 link: 0
941 07:03:05.147489 PCI: 00:1d.0 read_resources bus 2 link: 0 done
942 07:03:05.152121 PCI: 00:1f.0 read_resources bus 0 link: 0
943 07:03:05.157064 PCI: 00:1f.0 read_resources bus 0 link: 0 done
944 07:03:05.163184 DOMAIN: 0000 read_resources bus 0 link: 0 done
945 07:03:05.168622 Root Device read_resources bus 0 link: 0 done
946 07:03:05.171021 Done reading resources.
947 07:03:05.176516 Show resources in subtree (Root Device)...After reading.
948 07:03:05.181302 Root Device child on link 0 CPU_CLUSTER: 0
949 07:03:05.185389 CPU_CLUSTER: 0 child on link 0 APIC: 00
950 07:03:05.186755 APIC: 00
951 07:03:05.187697 APIC: 02
952 07:03:05.191798 DOMAIN: 0000 child on link 0 PCI: 00:00.0
953 07:03:05.201000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
954 07:03:05.210836 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
955 07:03:05.212782 PCI: 00:00.0
956 07:03:05.222426 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
957 07:03:05.231534 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
958 07:03:05.240528 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
959 07:03:05.249797 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
960 07:03:05.259342 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
961 07:03:05.268619 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
962 07:03:05.278225 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
963 07:03:05.286925 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
964 07:03:05.296219 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
965 07:03:05.305841 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
966 07:03:05.316017 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
967 07:03:05.325199 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
968 07:03:05.334292 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
969 07:03:05.343726 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
970 07:03:05.345327 PCI: 00:02.0
971 07:03:05.355662 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
972 07:03:05.365650 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
973 07:03:05.374806 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
974 07:03:05.375697 PCI: 00:04.0
975 07:03:05.386562 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
976 07:03:05.387868 PCI: 00:08.0
977 07:03:05.397750 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
978 07:03:05.399108 PCI: 00:12.0
979 07:03:05.408741 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
980 07:03:05.412921 PCI: 00:14.0 child on link 0 USB0 port 0
981 07:03:05.424135 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
982 07:03:05.427676 USB0 port 0 child on link 0 USB2 port 0
983 07:03:05.429234 USB2 port 0
984 07:03:05.431328 USB2 port 1
985 07:03:05.432625 USB2 port 2
986 07:03:05.434808 USB2 port 4
987 07:03:05.436825 USB2 port 5
988 07:03:05.438381 USB2 port 6
989 07:03:05.439678 USB2 port 7
990 07:03:05.442352 USB2 port 8
991 07:03:05.443314 USB2 port 9
992 07:03:05.445710 USB3 port 0
993 07:03:05.447331 USB3 port 1
994 07:03:05.448737 USB3 port 2
995 07:03:05.451448 USB3 port 3
996 07:03:05.451906 USB3 port 4
997 07:03:05.453694 PCI: 00:14.2
998 07:03:05.463944 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
999 07:03:05.473813 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1000 07:03:05.474917 PCI: 00:14.3
1001 07:03:05.485401 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1002 07:03:05.489363 PCI: 00:15.0 child on link 0 I2C: 01:10
1003 07:03:05.499352 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 07:03:05.500732 I2C: 01:10
1005 07:03:05.502554 I2C: 01:10
1006 07:03:05.504482 I2C: 01:34
1007 07:03:05.508352 PCI: 00:15.1 child on link 0 I2C: 02:2c
1008 07:03:05.518337 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1009 07:03:05.519932 I2C: 02:2c
1010 07:03:05.521702 PCI: 00:16.0
1011 07:03:05.531497 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 07:03:05.533392 PCI: 00:17.0
1013 07:03:05.541888 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1014 07:03:05.551370 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1015 07:03:05.559256 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1016 07:03:05.567379 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1017 07:03:05.575956 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1018 07:03:05.585519 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1019 07:03:05.589459 PCI: 00:19.0 child on link 0 I2C: 03:50
1020 07:03:05.599499 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1021 07:03:05.609182 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1022 07:03:05.610525 I2C: 03:50
1023 07:03:05.612189 PCI: 00:19.2
1024 07:03:05.624127 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1025 07:03:05.633192 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1026 07:03:05.637708 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1027 07:03:05.646659 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1028 07:03:05.656000 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1029 07:03:05.665204 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1030 07:03:05.667222 PCI: 01:00.0
1031 07:03:05.676132 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1032 07:03:05.680753 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1033 07:03:05.689437 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1034 07:03:05.699423 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1035 07:03:05.708175 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1036 07:03:05.710181 PCI: 02:00.0
1037 07:03:05.719997 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1038 07:03:05.724658 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1039 07:03:05.733134 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1040 07:03:05.742232 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1041 07:03:05.743593 PNP: 0c09.0
1042 07:03:05.751915 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1043 07:03:05.760875 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1044 07:03:05.769537 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1045 07:03:05.770916 PCI: 00:1f.3
1046 07:03:05.781096 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1047 07:03:05.791345 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1048 07:03:05.792835 PCI: 00:1f.4
1049 07:03:05.801884 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1050 07:03:05.811567 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1051 07:03:05.813038 PCI: 00:1f.5
1052 07:03:05.822024 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1053 07:03:05.823961 PCI: 00:1f.6
1054 07:03:05.833812 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1055 07:03:05.839534 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1056 07:03:05.846515 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1057 07:03:05.853033 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1058 07:03:05.859620 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1059 07:03:05.865567 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1060 07:03:05.870206 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1061 07:03:05.873188 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1062 07:03:05.876503 PCI: 00:17.0 18 * [0x60 - 0x67] io
1063 07:03:05.879936 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1064 07:03:05.887434 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1065 07:03:05.893490 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1066 07:03:05.901463 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1067 07:03:05.910363 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1068 07:03:05.917398 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1069 07:03:05.920035 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1070 07:03:05.928148 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1071 07:03:05.936430 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1072 07:03:05.944867 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1073 07:03:05.951817 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1074 07:03:05.956033 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1075 07:03:05.963182 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1076 07:03:05.968189 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1077 07:03:05.973188 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1078 07:03:05.977412 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1079 07:03:05.983518 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1080 07:03:05.987197 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1081 07:03:05.992409 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1082 07:03:05.997823 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1083 07:03:06.002121 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1084 07:03:06.007586 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1085 07:03:06.011831 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1086 07:03:06.016502 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1087 07:03:06.021090 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1088 07:03:06.026159 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1089 07:03:06.031305 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1090 07:03:06.037199 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1091 07:03:06.040663 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1092 07:03:06.045874 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1093 07:03:06.050714 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1094 07:03:06.055737 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1095 07:03:06.060254 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1096 07:03:06.065405 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1097 07:03:06.070959 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1098 07:03:06.075212 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1099 07:03:06.079739 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1100 07:03:06.085274 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1101 07:03:06.093070 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1102 07:03:06.097255 avoid_fixed_resources: DOMAIN: 0000
1103 07:03:06.102876 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1104 07:03:06.109073 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1105 07:03:06.116281 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1106 07:03:06.124097 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1107 07:03:06.131410 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1108 07:03:06.139946 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1109 07:03:06.146690 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1110 07:03:06.154346 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1111 07:03:06.162067 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1112 07:03:06.169644 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1113 07:03:06.177148 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1114 07:03:06.184128 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1115 07:03:06.186682 Setting resources...
1116 07:03:06.192591 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1117 07:03:06.196532 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1118 07:03:06.200913 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1119 07:03:06.204531 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1120 07:03:06.209302 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1121 07:03:06.215066 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1122 07:03:06.221388 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1123 07:03:06.227734 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1124 07:03:06.233974 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1125 07:03:06.240145 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1126 07:03:06.247541 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1127 07:03:06.252871 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1128 07:03:06.258080 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1129 07:03:06.262937 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1130 07:03:06.267436 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1131 07:03:06.272809 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1132 07:03:06.277176 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1133 07:03:06.282003 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1134 07:03:06.287061 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1135 07:03:06.292050 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1136 07:03:06.296598 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1137 07:03:06.301499 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1138 07:03:06.307053 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1139 07:03:06.311371 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1140 07:03:06.316197 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1141 07:03:06.321059 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1142 07:03:06.325395 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1143 07:03:06.330723 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1144 07:03:06.335403 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1145 07:03:06.340635 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1146 07:03:06.345227 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1147 07:03:06.349871 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1148 07:03:06.354653 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1149 07:03:06.359905 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1150 07:03:06.364396 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1151 07:03:06.369902 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1152 07:03:06.377150 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1153 07:03:06.384149 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1154 07:03:06.391412 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1155 07:03:06.398942 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1156 07:03:06.404316 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1157 07:03:06.411111 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1158 07:03:06.419397 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1159 07:03:06.425930 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1160 07:03:06.433535 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1161 07:03:06.439075 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1162 07:03:06.446470 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1163 07:03:06.450095 Root Device assign_resources, bus 0 link: 0
1164 07:03:06.454992 DOMAIN: 0000 assign_resources, bus 0 link: 0
1165 07:03:06.463248 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1166 07:03:06.472137 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1167 07:03:06.480091 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1168 07:03:06.488418 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1169 07:03:06.496280 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1170 07:03:06.504219 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1171 07:03:06.513083 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1172 07:03:06.516973 PCI: 00:14.0 assign_resources, bus 0 link: 0
1173 07:03:06.521717 PCI: 00:14.0 assign_resources, bus 0 link: 0
1174 07:03:06.530141 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1175 07:03:06.538009 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1176 07:03:06.546842 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1177 07:03:06.554706 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1178 07:03:06.559458 PCI: 00:15.0 assign_resources, bus 1 link: 0
1179 07:03:06.563974 PCI: 00:15.0 assign_resources, bus 1 link: 0
1180 07:03:06.572285 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1181 07:03:06.577104 PCI: 00:15.1 assign_resources, bus 2 link: 0
1182 07:03:06.581698 PCI: 00:15.1 assign_resources, bus 2 link: 0
1183 07:03:06.590314 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1184 07:03:06.598228 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1185 07:03:06.606010 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1186 07:03:06.613444 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1187 07:03:06.620914 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1188 07:03:06.629565 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1189 07:03:06.637227 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1190 07:03:06.645097 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1191 07:03:06.653352 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1192 07:03:06.657078 PCI: 00:19.0 assign_resources, bus 3 link: 0
1193 07:03:06.661672 PCI: 00:19.0 assign_resources, bus 3 link: 0
1194 07:03:06.670677 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1195 07:03:06.678865 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1196 07:03:06.687825 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1197 07:03:06.696569 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1198 07:03:06.700634 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1199 07:03:06.708894 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1200 07:03:06.713339 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1201 07:03:06.722183 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1202 07:03:06.731333 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1203 07:03:06.739217 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1204 07:03:06.744175 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1205 07:03:06.753003 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1206 07:03:06.757793 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1207 07:03:06.762121 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1208 07:03:06.767028 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1209 07:03:06.771638 LPC: Trying to open IO window from 930 size 8
1210 07:03:06.776092 LPC: Trying to open IO window from 940 size 8
1211 07:03:06.780413 LPC: Trying to open IO window from 950 size 10
1212 07:03:06.789437 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1213 07:03:06.796904 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1214 07:03:06.805064 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1215 07:03:06.813149 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1216 07:03:06.821177 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1217 07:03:06.826438 DOMAIN: 0000 assign_resources, bus 0 link: 0
1218 07:03:06.830793 Root Device assign_resources, bus 0 link: 0
1219 07:03:06.833800 Done setting resources.
1220 07:03:06.840067 Show resources in subtree (Root Device)...After assigning values.
1221 07:03:06.844203 Root Device child on link 0 CPU_CLUSTER: 0
1222 07:03:06.848374 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 07:03:06.849910 APIC: 00
1224 07:03:06.850716 APIC: 02
1225 07:03:06.855521 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1226 07:03:06.864867 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1227 07:03:06.876598 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1228 07:03:06.878048 PCI: 00:00.0
1229 07:03:06.887756 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 07:03:06.897198 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1231 07:03:06.906383 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1232 07:03:06.915798 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1233 07:03:06.924400 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1234 07:03:06.934387 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1235 07:03:06.943953 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1236 07:03:06.952332 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1237 07:03:06.962080 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1238 07:03:06.971373 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1239 07:03:06.980577 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1240 07:03:06.990437 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1241 07:03:07.000054 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1242 07:03:07.009569 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1243 07:03:07.010841 PCI: 00:02.0
1244 07:03:07.021324 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1245 07:03:07.031680 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1246 07:03:07.041121 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1247 07:03:07.042526 PCI: 00:04.0
1248 07:03:07.053475 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1249 07:03:07.054380 PCI: 00:08.0
1250 07:03:07.065104 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1251 07:03:07.066668 PCI: 00:12.0
1252 07:03:07.077190 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1253 07:03:07.081317 PCI: 00:14.0 child on link 0 USB0 port 0
1254 07:03:07.091472 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1255 07:03:07.096075 USB0 port 0 child on link 0 USB2 port 0
1256 07:03:07.097475 USB2 port 0
1257 07:03:07.099565 USB2 port 1
1258 07:03:07.101016 USB2 port 2
1259 07:03:07.103565 USB2 port 4
1260 07:03:07.104493 USB2 port 5
1261 07:03:07.106600 USB2 port 6
1262 07:03:07.108029 USB2 port 7
1263 07:03:07.110150 USB2 port 8
1264 07:03:07.111973 USB2 port 9
1265 07:03:07.113477 USB3 port 0
1266 07:03:07.115115 USB3 port 1
1267 07:03:07.117208 USB3 port 2
1268 07:03:07.119041 USB3 port 3
1269 07:03:07.120604 USB3 port 4
1270 07:03:07.122542 PCI: 00:14.2
1271 07:03:07.132207 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1272 07:03:07.142870 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1273 07:03:07.144355 PCI: 00:14.3
1274 07:03:07.154858 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1275 07:03:07.158945 PCI: 00:15.0 child on link 0 I2C: 01:10
1276 07:03:07.169857 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1277 07:03:07.171211 I2C: 01:10
1278 07:03:07.172185 I2C: 01:10
1279 07:03:07.174798 I2C: 01:34
1280 07:03:07.179026 PCI: 00:15.1 child on link 0 I2C: 02:2c
1281 07:03:07.188294 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1282 07:03:07.190219 I2C: 02:2c
1283 07:03:07.191739 PCI: 00:16.0
1284 07:03:07.202114 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1285 07:03:07.204102 PCI: 00:17.0
1286 07:03:07.214631 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1287 07:03:07.223981 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1288 07:03:07.233530 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1289 07:03:07.242065 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1290 07:03:07.251381 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1291 07:03:07.261734 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1292 07:03:07.265496 PCI: 00:19.0 child on link 0 I2C: 03:50
1293 07:03:07.276416 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1294 07:03:07.286196 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1295 07:03:07.287611 I2C: 03:50
1296 07:03:07.289371 PCI: 00:19.2
1297 07:03:07.300414 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1298 07:03:07.311554 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1299 07:03:07.315923 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1300 07:03:07.324391 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1301 07:03:07.334700 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1302 07:03:07.345280 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1303 07:03:07.347711 PCI: 01:00.0
1304 07:03:07.357282 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1305 07:03:07.361823 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1306 07:03:07.370904 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1307 07:03:07.381020 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1308 07:03:07.391784 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1309 07:03:07.393291 PCI: 02:00.0
1310 07:03:07.403634 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1311 07:03:07.407788 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1312 07:03:07.416713 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1313 07:03:07.425605 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1314 07:03:07.427160 PNP: 0c09.0
1315 07:03:07.436183 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1316 07:03:07.444548 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1317 07:03:07.453209 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1318 07:03:07.455218 PCI: 00:1f.3
1319 07:03:07.465720 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1320 07:03:07.475871 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1321 07:03:07.477092 PCI: 00:1f.4
1322 07:03:07.486073 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1323 07:03:07.497118 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1324 07:03:07.498508 PCI: 00:1f.5
1325 07:03:07.508818 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1326 07:03:07.509725 PCI: 00:1f.6
1327 07:03:07.520676 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1328 07:03:07.522876 Done allocating resources.
1329 07:03:07.529192 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491412 exit 13
1330 07:03:07.531970 Enabling resources...
1331 07:03:07.536257 PCI: 00:00.0 subsystem <- 1028/3e35
1332 07:03:07.538801 PCI: 00:00.0 cmd <- 06
1333 07:03:07.542978 PCI: 00:02.0 subsystem <- 1028/3ea1
1334 07:03:07.545182 PCI: 00:02.0 cmd <- 03
1335 07:03:07.549099 PCI: 00:04.0 subsystem <- 1028/1903
1336 07:03:07.551216 PCI: 00:04.0 cmd <- 02
1337 07:03:07.554373 PCI: 00:08.0 cmd <- 06
1338 07:03:07.557914 PCI: 00:12.0 subsystem <- 1028/9df9
1339 07:03:07.560288 PCI: 00:12.0 cmd <- 02
1340 07:03:07.564160 PCI: 00:14.0 subsystem <- 1028/9ded
1341 07:03:07.566699 PCI: 00:14.0 cmd <- 02
1342 07:03:07.569357 PCI: 00:14.2 cmd <- 02
1343 07:03:07.573595 PCI: 00:14.3 subsystem <- 1028/9df0
1344 07:03:07.575120 PCI: 00:14.3 cmd <- 02
1345 07:03:07.579257 PCI: 00:15.0 subsystem <- 1028/9de8
1346 07:03:07.581355 PCI: 00:15.0 cmd <- 02
1347 07:03:07.586064 PCI: 00:15.1 subsystem <- 1028/9de9
1348 07:03:07.587984 PCI: 00:15.1 cmd <- 02
1349 07:03:07.591808 PCI: 00:16.0 subsystem <- 1028/9de0
1350 07:03:07.594575 PCI: 00:16.0 cmd <- 02
1351 07:03:07.598797 PCI: 00:17.0 subsystem <- 1028/9dd3
1352 07:03:07.600375 PCI: 00:17.0 cmd <- 03
1353 07:03:07.604533 PCI: 00:19.0 subsystem <- 1028/9dc5
1354 07:03:07.606524 PCI: 00:19.0 cmd <- 06
1355 07:03:07.610750 PCI: 00:19.2 subsystem <- 1028/9dc7
1356 07:03:07.612859 PCI: 00:19.2 cmd <- 06
1357 07:03:07.616812 PCI: 00:1c.0 bridge ctrl <- 0003
1358 07:03:07.620335 PCI: 00:1c.0 subsystem <- 1028/9dbf
1359 07:03:07.623200 Capability: type 0x10 @ 0x40
1360 07:03:07.625593 Capability: type 0x05 @ 0x80
1361 07:03:07.628885 Capability: type 0x0d @ 0x90
1362 07:03:07.630929 PCI: 00:1c.0 cmd <- 06
1363 07:03:07.634510 PCI: 00:1d.0 bridge ctrl <- 0003
1364 07:03:07.638541 PCI: 00:1d.0 subsystem <- 1028/9db4
1365 07:03:07.641968 Capability: type 0x10 @ 0x40
1366 07:03:07.644755 Capability: type 0x05 @ 0x80
1367 07:03:07.647013 Capability: type 0x0d @ 0x90
1368 07:03:07.649160 PCI: 00:1d.0 cmd <- 06
1369 07:03:07.653114 PCI: 00:1f.0 subsystem <- 1028/9d84
1370 07:03:07.655639 PCI: 00:1f.0 cmd <- 407
1371 07:03:07.659407 PCI: 00:1f.3 subsystem <- 1028/9dc8
1372 07:03:07.662249 PCI: 00:1f.3 cmd <- 02
1373 07:03:07.666082 PCI: 00:1f.4 subsystem <- 1028/9da3
1374 07:03:07.668220 PCI: 00:1f.4 cmd <- 03
1375 07:03:07.672779 PCI: 00:1f.5 subsystem <- 1028/9da4
1376 07:03:07.674830 PCI: 00:1f.5 cmd <- 406
1377 07:03:07.678973 PCI: 00:1f.6 subsystem <- 1028/15be
1378 07:03:07.681269 PCI: 00:1f.6 cmd <- 02
1379 07:03:07.691686 PCI: 01:00.0 cmd <- 02
1380 07:03:07.694789 PCI: 02:00.0 cmd <- 02
1381 07:03:07.696749 done.
1382 07:03:07.703191 BS: BS_DEV_ENABLE times (us): entry 397 run 167143 exit 0
1383 07:03:07.704823 Initializing devices...
1384 07:03:07.707203 Root Device init ...
1385 07:03:07.711007 Root Device init finished in 2139 usecs
1386 07:03:07.713831 CPU_CLUSTER: 0 init ...
1387 07:03:07.718032 CPU_CLUSTER: 0 init finished in 2431 usecs
1388 07:03:07.722156 PCI: 00:00.0 init ...
1389 07:03:07.725317 CPU TDP: 15 Watts
1390 07:03:07.726975 CPU PL2 = 51 Watts
1391 07:03:07.730623 PCI: 00:00.0 init finished in 7037 usecs
1392 07:03:07.733350 PCI: 00:02.0 init ...
1393 07:03:07.737487 PCI: 00:02.0 init finished in 2237 usecs
1394 07:03:07.740940 PCI: 00:04.0 init ...
1395 07:03:07.744671 PCI: 00:04.0 init finished in 2237 usecs
1396 07:03:07.746800 PCI: 00:08.0 init ...
1397 07:03:07.751053 PCI: 00:08.0 init finished in 2235 usecs
1398 07:03:07.754339 PCI: 00:12.0 init ...
1399 07:03:07.757898 PCI: 00:12.0 init finished in 2237 usecs
1400 07:03:07.760635 PCI: 00:14.0 init ...
1401 07:03:07.764987 PCI: 00:14.0 init finished in 2236 usecs
1402 07:03:07.767137 PCI: 00:14.2 init ...
1403 07:03:07.771880 PCI: 00:14.2 init finished in 2236 usecs
1404 07:03:07.773981 PCI: 00:14.3 init ...
1405 07:03:07.777816 PCI: 00:14.3 init finished in 2241 usecs
1406 07:03:07.781010 PCI: 00:15.0 init ...
1407 07:03:07.784386 DW I2C bus 0 at 0xd1347000 (400 KHz)
1408 07:03:07.788209 PCI: 00:15.0 init finished in 5927 usecs
1409 07:03:07.790974 PCI: 00:15.1 init ...
1410 07:03:07.795361 DW I2C bus 1 at 0xd1348000 (400 KHz)
1411 07:03:07.799356 PCI: 00:15.1 init finished in 5934 usecs
1412 07:03:07.801829 PCI: 00:16.0 init ...
1413 07:03:07.805789 PCI: 00:16.0 init finished in 2235 usecs
1414 07:03:07.809003 PCI: 00:19.0 init ...
1415 07:03:07.812670 DW I2C bus 4 at 0xd134a000 (400 KHz)
1416 07:03:07.816677 PCI: 00:19.0 init finished in 5925 usecs
1417 07:03:07.819173 PCI: 00:1c.0 init ...
1418 07:03:07.822348 Initializing PCH PCIe bridge.
1419 07:03:07.826467 PCI: 00:1c.0 init finished in 5250 usecs
1420 07:03:07.829222 PCI: 00:1d.0 init ...
1421 07:03:07.832083 Initializing PCH PCIe bridge.
1422 07:03:07.836310 PCI: 00:1d.0 init finished in 5249 usecs
1423 07:03:07.839110 PCI: 00:1f.0 init ...
1424 07:03:07.843239 IOAPIC: Initializing IOAPIC at 0xfec00000
1425 07:03:07.847535 IOAPIC: Bootstrap Processor Local APIC = 0x00
1426 07:03:07.850013 IOAPIC: ID = 0x02
1427 07:03:07.851863 IOAPIC: Dumping registers
1428 07:03:07.855683 reg 0x0000: 0x02000000
1429 07:03:07.857262 reg 0x0001: 0x00770020
1430 07:03:07.859834 reg 0x0002: 0x00000000
1431 07:03:07.864594 PCI: 00:1f.0 init finished in 23311 usecs
1432 07:03:07.866701 PCI: 00:1f.3 init ...
1433 07:03:07.872209 HDA: codec_mask = 05
1434 07:03:07.874932 HDA: Initializing codec #2
1435 07:03:07.877821 HDA: codec viddid: 8086280b
1436 07:03:07.881630 HDA: No verb table entry found
1437 07:03:07.883704 HDA: Initializing codec #0
1438 07:03:07.886814 HDA: codec viddid: 10ec0236
1439 07:03:07.893211 HDA: verb loaded.
1440 07:03:07.898152 PCI: 00:1f.3 init finished in 28835 usecs
1441 07:03:07.900682 PCI: 00:1f.4 init ...
1442 07:03:07.904080 PCI: 00:1f.4 init finished in 2246 usecs
1443 07:03:07.907485 PCI: 00:1f.6 init ...
1444 07:03:07.911999 PCI: 00:1f.6 init finished in 2227 usecs
1445 07:03:07.923079 PCI: 01:00.0 init ...
1446 07:03:07.926715 PCI: 01:00.0 init finished in 2236 usecs
1447 07:03:07.928958 PCI: 02:00.0 init ...
1448 07:03:07.933428 PCI: 02:00.0 init finished in 2235 usecs
1449 07:03:07.935626 PNP: 0c09.0 init ...
1450 07:03:07.942643 EC Label : 00.00.20
1451 07:03:07.946719 EC Revision : 9ca674bba
1452 07:03:07.950413 EC Model Num : 08B9
1453 07:03:07.953850 EC Build Date : 05/10/19
1454 07:03:07.962761 PNP: 0c09.0 init finished in 24774 usecs
1455 07:03:07.965271 Devices initialized
1456 07:03:07.967464 Show all devs... After init.
1457 07:03:07.970067 Root Device: enabled 1
1458 07:03:07.972993 CPU_CLUSTER: 0: enabled 1
1459 07:03:07.975116 DOMAIN: 0000: enabled 1
1460 07:03:07.977261 APIC: 00: enabled 1
1461 07:03:07.979847 PCI: 00:00.0: enabled 1
1462 07:03:07.982196 PCI: 00:02.0: enabled 1
1463 07:03:07.984736 PCI: 00:04.0: enabled 1
1464 07:03:07.987352 PCI: 00:12.0: enabled 1
1465 07:03:07.989334 PCI: 00:12.5: enabled 0
1466 07:03:07.992514 PCI: 00:12.6: enabled 0
1467 07:03:07.993958 PCI: 00:13.0: enabled 0
1468 07:03:07.996507 PCI: 00:14.0: enabled 1
1469 07:03:07.998790 PCI: 00:14.1: enabled 0
1470 07:03:08.002035 PCI: 00:14.3: enabled 1
1471 07:03:08.003746 PCI: 00:14.5: enabled 0
1472 07:03:08.006159 PCI: 00:15.0: enabled 1
1473 07:03:08.008798 PCI: 00:15.1: enabled 1
1474 07:03:08.011384 PCI: 00:15.2: enabled 0
1475 07:03:08.013613 PCI: 00:15.3: enabled 0
1476 07:03:08.016201 PCI: 00:16.0: enabled 1
1477 07:03:08.018319 PCI: 00:16.1: enabled 0
1478 07:03:08.021260 PCI: 00:16.2: enabled 0
1479 07:03:08.023568 PCI: 00:16.3: enabled 0
1480 07:03:08.025647 PCI: 00:16.4: enabled 0
1481 07:03:08.028636 PCI: 00:16.5: enabled 0
1482 07:03:08.031115 PCI: 00:17.0: enabled 1
1483 07:03:08.033167 PCI: 00:19.0: enabled 1
1484 07:03:08.035283 PCI: 00:19.1: enabled 0
1485 07:03:08.037815 PCI: 00:19.2: enabled 1
1486 07:03:08.040319 PCI: 00:1a.0: enabled 0
1487 07:03:08.042868 PCI: 00:1c.0: enabled 1
1488 07:03:08.045110 PCI: 00:1c.1: enabled 0
1489 07:03:08.047834 PCI: 00:1c.2: enabled 0
1490 07:03:08.050492 PCI: 00:1c.3: enabled 0
1491 07:03:08.053174 PCI: 00:1c.4: enabled 0
1492 07:03:08.054648 PCI: 00:1c.5: enabled 0
1493 07:03:08.057554 PCI: 00:1c.6: enabled 0
1494 07:03:08.059640 PCI: 00:1c.7: enabled 0
1495 07:03:08.062493 PCI: 00:1d.0: enabled 1
1496 07:03:08.064654 PCI: 00:1d.1: enabled 0
1497 07:03:08.067378 PCI: 00:1d.2: enabled 0
1498 07:03:08.069248 PCI: 00:1d.3: enabled 0
1499 07:03:08.072658 PCI: 00:1d.4: enabled 0
1500 07:03:08.074204 PCI: 00:1e.0: enabled 0
1501 07:03:08.076891 PCI: 00:1e.1: enabled 0
1502 07:03:08.079048 PCI: 00:1e.2: enabled 0
1503 07:03:08.081761 PCI: 00:1e.3: enabled 0
1504 07:03:08.084328 PCI: 00:1f.0: enabled 1
1505 07:03:08.086581 PCI: 00:1f.1: enabled 0
1506 07:03:08.089240 PCI: 00:1f.2: enabled 0
1507 07:03:08.091443 PCI: 00:1f.3: enabled 1
1508 07:03:08.094681 PCI: 00:1f.4: enabled 1
1509 07:03:08.096266 PCI: 00:1f.5: enabled 1
1510 07:03:08.099053 PCI: 00:1f.6: enabled 1
1511 07:03:08.101457 USB0 port 0: enabled 1
1512 07:03:08.102979 I2C: 01:10: enabled 1
1513 07:03:08.106024 I2C: 01:10: enabled 1
1514 07:03:08.107769 I2C: 01:34: enabled 1
1515 07:03:08.109833 I2C: 02:2c: enabled 1
1516 07:03:08.111983 I2C: 03:50: enabled 1
1517 07:03:08.115464 PNP: 0c09.0: enabled 1
1518 07:03:08.117005 USB2 port 0: enabled 1
1519 07:03:08.118991 USB2 port 1: enabled 1
1520 07:03:08.121447 USB2 port 2: enabled 1
1521 07:03:08.124095 USB2 port 4: enabled 1
1522 07:03:08.126602 USB2 port 5: enabled 1
1523 07:03:08.128598 USB2 port 6: enabled 1
1524 07:03:08.130875 USB2 port 7: enabled 1
1525 07:03:08.133390 USB2 port 8: enabled 1
1526 07:03:08.135429 USB2 port 9: enabled 1
1527 07:03:08.137746 USB3 port 0: enabled 1
1528 07:03:08.140155 USB3 port 1: enabled 1
1529 07:03:08.142807 USB3 port 2: enabled 1
1530 07:03:08.145596 USB3 port 3: enabled 1
1531 07:03:08.147735 USB3 port 4: enabled 1
1532 07:03:08.149334 APIC: 02: enabled 1
1533 07:03:08.151512 PCI: 00:08.0: enabled 1
1534 07:03:08.154141 PCI: 00:14.2: enabled 1
1535 07:03:08.156500 PCI: 01:00.0: enabled 1
1536 07:03:08.158860 PCI: 02:00.0: enabled 1
1537 07:03:08.164132 Disabling ACPI via APMC:
1538 07:03:08.165989 done.
1539 07:03:08.171151 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1540 07:03:08.174925 ELOG: NV offset 0x1bf0000 size 0x4000
1541 07:03:08.182674 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1542 07:03:08.189013 ELOG: Event(17) added with size 13 at 2023-03-22 07:03:08 UTC
1543 07:03:08.193864 POST: Unexpected post code in previous boot: 0x75
1544 07:03:08.200786 ELOG: Event(A3) added with size 11 at 2023-03-22 07:03:08 UTC
1545 07:03:08.206590 ELOG: Event(A6) added with size 13 at 2023-03-22 07:03:08 UTC
1546 07:03:08.212882 ELOG: Event(92) added with size 9 at 2023-03-22 07:03:08 UTC
1547 07:03:08.218952 ELOG: Event(93) added with size 9 at 2023-03-22 07:03:08 UTC
1548 07:03:08.225484 ELOG: Event(9A) added with size 9 at 2023-03-22 07:03:08 UTC
1549 07:03:08.231898 ELOG: Event(9E) added with size 10 at 2023-03-22 07:03:08 UTC
1550 07:03:08.238207 ELOG: Event(9F) added with size 14 at 2023-03-22 07:03:08 UTC
1551 07:03:08.244101 BS: BS_DEV_INIT times (us): entry 0 run 456599 exit 78874
1552 07:03:08.250876 ELOG: Event(A1) added with size 10 at 2023-03-22 07:03:08 UTC
1553 07:03:08.258083 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1554 07:03:08.264192 ELOG: Event(A0) added with size 9 at 2023-03-22 07:03:08 UTC
1555 07:03:08.268802 elog_add_boot_reason: Logged dev mode boot
1556 07:03:08.270868 Finalize devices...
1557 07:03:08.273061 PCI: 00:17.0 final
1558 07:03:08.275064 Devices finalized
1559 07:03:08.280241 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1560 07:03:08.285950 BS: BS_POST_DEVICE times (us): entry 24783 run 5927 exit 5361
1561 07:03:08.292313 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1562 07:03:08.300143 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1563 07:03:08.304884 disable_unused_touchscreen: Disable ACPI0C50
1564 07:03:08.308961 disable_unused_touchscreen: Enable ELAN900C
1565 07:03:08.311789 CBFS @ 1d00000 size 300000
1566 07:03:08.318594 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1567 07:03:08.322013 CBFS: Locating 'fallback/dsdt.aml'
1568 07:03:08.325947 CBFS: Found @ offset 10b200 size 4448
1569 07:03:08.328662 CBFS @ 1d00000 size 300000
1570 07:03:08.335603 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1571 07:03:08.338140 CBFS: Locating 'fallback/slic'
1572 07:03:08.343037 CBFS: 'fallback/slic' not found.
1573 07:03:08.347539 ACPI: Writing ACPI tables at 89c0f000.
1574 07:03:08.349368 ACPI: * FACS
1575 07:03:08.350895 ACPI: * DSDT
1576 07:03:08.354066 Ramoops buffer: 0x100000@0x89b0e000.
1577 07:03:08.359120 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1578 07:03:08.363462 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1579 07:03:08.367293 ACPI: * FADT
1580 07:03:08.368617 SCI is IRQ9
1581 07:03:08.373227 ACPI: added table 1/32, length now 40
1582 07:03:08.374174 ACPI: * SSDT
1583 07:03:08.378288 Found 1 CPU(s) with 2 core(s) each.
1584 07:03:08.381875 Error: Could not locate 'wifi_sar' in VPD.
1585 07:03:08.386043 Error: failed from getting SAR limits!
1586 07:03:08.390687 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1587 07:03:08.394728 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1588 07:03:08.397996 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1589 07:03:08.402447 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1590 07:03:08.407432 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1591 07:03:08.413079 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1592 07:03:08.418368 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1593 07:03:08.421954 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1594 07:03:08.427376 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1595 07:03:08.433917 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1596 07:03:08.439602 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1597 07:03:08.445760 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1598 07:03:08.450089 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1599 07:03:08.454489 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1600 07:03:08.459091 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1601 07:03:08.465071 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1602 07:03:08.469385 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1603 07:03:08.475118 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1604 07:03:08.481514 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1605 07:03:08.487001 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1606 07:03:08.493291 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1607 07:03:08.497879 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1608 07:03:08.501450 ACPI: added table 2/32, length now 44
1609 07:03:08.503192 ACPI: * MCFG
1610 07:03:08.506589 ACPI: added table 3/32, length now 48
1611 07:03:08.508609 ACPI: * TPM2
1612 07:03:08.511540 TPM2 log created at 89afe000
1613 07:03:08.515018 ACPI: added table 4/32, length now 52
1614 07:03:08.517547 ACPI: * MADT
1615 07:03:08.517831 SCI is IRQ9
1616 07:03:08.521865 ACPI: added table 5/32, length now 56
1617 07:03:08.524384 current = 89c14720
1618 07:03:08.526643 ACPI: * IGD OpRegion
1619 07:03:08.529215 GMA: Found VBT in CBFS
1620 07:03:08.531477 GMA: Found valid VBT in CBFS
1621 07:03:08.535621 ACPI: added table 6/32, length now 60
1622 07:03:08.537354 ACPI: * HPET
1623 07:03:08.540796 ACPI: added table 7/32, length now 64
1624 07:03:08.542038 ACPI: done.
1625 07:03:08.544759 ACPI tables: 30672 bytes.
1626 07:03:08.547873 smbios_write_tables: 89afd000
1627 07:03:08.550557 recv_ec_data: 0x01
1628 07:03:08.552032 Create SMBIOS type 17
1629 07:03:08.555042 PCI: 00:14.3 (Intel WiFi)
1630 07:03:08.557326 SMBIOS tables: 707 bytes.
1631 07:03:08.561883 Writing table forward entry at 0x00000500
1632 07:03:08.568607 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1633 07:03:08.571444 Writing coreboot table at 0x89c33000
1634 07:03:08.577226 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1635 07:03:08.581327 1. 0000000000001000-000000000009ffff: RAM
1636 07:03:08.586376 2. 00000000000a0000-00000000000fffff: RESERVED
1637 07:03:08.590625 3. 0000000000100000-0000000089afcfff: RAM
1638 07:03:08.597688 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1639 07:03:08.601819 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1640 07:03:08.607525 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1641 07:03:08.611675 7. 000000008a000000-000000008f7fffff: RESERVED
1642 07:03:08.616630 8. 00000000e0000000-00000000efffffff: RESERVED
1643 07:03:08.621480 9. 00000000fc000000-00000000fc000fff: RESERVED
1644 07:03:08.626594 10. 00000000fe000000-00000000fe00ffff: RESERVED
1645 07:03:08.631066 11. 00000000fed10000-00000000fed17fff: RESERVED
1646 07:03:08.636206 12. 00000000fed80000-00000000fed83fff: RESERVED
1647 07:03:08.641087 13. 00000000feda0000-00000000feda1fff: RESERVED
1648 07:03:08.644652 14. 0000000100000000-000000016e7fffff: RAM
1649 07:03:08.648888 Graphics framebuffer located at 0xc0000000
1650 07:03:08.652084 Passing 6 GPIOs to payload:
1651 07:03:08.657748 NAME | PORT | POLARITY | VALUE
1652 07:03:08.663008 write protect | 0x000000dc | high | high
1653 07:03:08.667726 recovery | 0x000000d5 | low | high
1654 07:03:08.673574 lid | undefined | high | high
1655 07:03:08.678370 power | undefined | high | low
1656 07:03:08.683280 oprom | undefined | high | low
1657 07:03:08.689287 EC in RW | undefined | high | low
1658 07:03:08.690980 recv_ec_data: 0x01
1659 07:03:08.691826 SKU ID: 3
1660 07:03:08.695030 CBFS @ 1d00000 size 300000
1661 07:03:08.701116 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1662 07:03:08.707256 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 161f
1663 07:03:08.709798 coreboot table: 1484 bytes.
1664 07:03:08.713405 IMD ROOT 0. 89fff000 00001000
1665 07:03:08.716508 IMD SMALL 1. 89ffe000 00001000
1666 07:03:08.720370 FSP MEMORY 2. 89d0e000 002f0000
1667 07:03:08.723057 CONSOLE 3. 89cee000 00020000
1668 07:03:08.726551 TIME STAMP 4. 89ced000 00000910
1669 07:03:08.730412 VBOOT WORK 5. 89cea000 00003000
1670 07:03:08.733331 VBOOT 6. 89ce9000 00000c0c
1671 07:03:08.736511 MRC DATA 7. 89ce7000 000018f0
1672 07:03:08.739645 ROMSTG STCK 8. 89ce6000 00000400
1673 07:03:08.743620 AFTER CAR 9. 89cdc000 0000a000
1674 07:03:08.746454 RAMSTAGE 10. 89c80000 0005c000
1675 07:03:08.749933 REFCODE 11. 89c4b000 00035000
1676 07:03:08.753825 SMM BACKUP 12. 89c3b000 00010000
1677 07:03:08.756721 COREBOOT 13. 89c33000 00008000
1678 07:03:08.760452 ACPI 14. 89c0f000 00024000
1679 07:03:08.763012 ACPI GNVS 15. 89c0e000 00001000
1680 07:03:08.766508 RAMOOPS 16. 89b0e000 00100000
1681 07:03:08.769905 TPM2 TCGLOG17. 89afe000 00010000
1682 07:03:08.772799 SMBIOS 18. 89afd000 00000800
1683 07:03:08.775603 IMD small region:
1684 07:03:08.778282 IMD ROOT 0. 89ffec00 00000400
1685 07:03:08.781813 FSP RUNTIME 1. 89ffebe0 00000004
1686 07:03:08.785565 POWER STATE 2. 89ffeba0 00000040
1687 07:03:08.789252 ROMSTAGE 3. 89ffeb80 00000004
1688 07:03:08.792609 MEM INFO 4. 89ffe9c0 000001a9
1689 07:03:08.795605 VPD 5. 89ffe980 00000031
1690 07:03:08.799326 COREBOOTFWD 6. 89ffe940 00000028
1691 07:03:08.803125 MTRR: Physical address space:
1692 07:03:08.809349 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1693 07:03:08.815122 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1694 07:03:08.821828 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1695 07:03:08.827898 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1696 07:03:08.833545 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1697 07:03:08.839585 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1698 07:03:08.846265 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1699 07:03:08.850328 MTRR: Fixed MSR 0x250 0x0606060606060606
1700 07:03:08.853963 MTRR: Fixed MSR 0x258 0x0606060606060606
1701 07:03:08.858036 MTRR: Fixed MSR 0x259 0x0000000000000000
1702 07:03:08.862724 MTRR: Fixed MSR 0x268 0x0606060606060606
1703 07:03:08.866224 MTRR: Fixed MSR 0x269 0x0606060606060606
1704 07:03:08.870319 MTRR: Fixed MSR 0x26a 0x0606060606060606
1705 07:03:08.874799 MTRR: Fixed MSR 0x26b 0x0606060606060606
1706 07:03:08.878625 MTRR: Fixed MSR 0x26c 0x0606060606060606
1707 07:03:08.882555 MTRR: Fixed MSR 0x26d 0x0606060606060606
1708 07:03:08.886536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1709 07:03:08.890689 MTRR: Fixed MSR 0x26f 0x0606060606060606
1710 07:03:08.893949 call enable_fixed_mtrr()
1711 07:03:08.897805 CPU physical address size: 39 bits
1712 07:03:08.901473 MTRR: default type WB/UC MTRR counts: 7/6.
1713 07:03:08.905361 MTRR: UC selected as default type.
1714 07:03:08.912188 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1715 07:03:08.918313 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1716 07:03:08.924045 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1717 07:03:08.929866 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1718 07:03:08.936483 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1719 07:03:08.942257 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1720 07:03:08.942948
1721 07:03:08.944267 MTRR check
1722 07:03:08.946951 Fixed MTRRs : Enabled
1723 07:03:08.949531 Variable MTRRs: Enabled
1724 07:03:08.949806
1725 07:03:08.953274 MTRR: Fixed MSR 0x250 0x0606060606060606
1726 07:03:08.957394 MTRR: Fixed MSR 0x258 0x0606060606060606
1727 07:03:08.961534 MTRR: Fixed MSR 0x259 0x0000000000000000
1728 07:03:08.965828 MTRR: Fixed MSR 0x268 0x0606060606060606
1729 07:03:08.970419 MTRR: Fixed MSR 0x269 0x0606060606060606
1730 07:03:08.974469 MTRR: Fixed MSR 0x26a 0x0606060606060606
1731 07:03:08.978084 MTRR: Fixed MSR 0x26b 0x0606060606060606
1732 07:03:08.981916 MTRR: Fixed MSR 0x26c 0x0606060606060606
1733 07:03:08.986851 MTRR: Fixed MSR 0x26d 0x0606060606060606
1734 07:03:08.990089 MTRR: Fixed MSR 0x26e 0x0606060606060606
1735 07:03:08.994240 MTRR: Fixed MSR 0x26f 0x0606060606060606
1736 07:03:09.001200 BS: BS_WRITE_TABLES times (us): entry 17200 run 490346 exit 150049
1737 07:03:09.003730 call enable_fixed_mtrr()
1738 07:03:09.005985 CBFS @ 1d00000 size 300000
1739 07:03:09.012335 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1740 07:03:09.016419 CBFS: Locating 'fallback/payload'
1741 07:03:09.019252 CPU physical address size: 39 bits
1742 07:03:09.023316 CBFS: Found @ offset 1cf4c0 size 3a954
1743 07:03:09.027915 Checking segment from ROM address 0xffecf4f8
1744 07:03:09.032303 Checking segment from ROM address 0xffecf514
1745 07:03:09.036982 Loading segment from ROM address 0xffecf4f8
1746 07:03:09.039102 code (compression=0)
1747 07:03:09.047467 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1748 07:03:09.055904 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1749 07:03:09.058055 it's not compressed!
1750 07:03:09.140308 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1751 07:03:09.146667 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1752 07:03:09.155837 Loading segment from ROM address 0xffecf514
1753 07:03:09.157418 Entry Point 0x30100018
1754 07:03:09.159062 Loaded segments
1755 07:03:09.169618 Finalizing chipset.
1756 07:03:09.170455 Finalizing SMM.
1757 07:03:09.177069 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158409 exit 11521
1758 07:03:09.181094 mp_park_aps done after 0 msecs.
1759 07:03:09.184384 Jumping to boot code at 30100018(89c33000)
1760 07:03:09.193227 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1761 07:03:09.193343
1762 07:03:09.193779
1763 07:03:09.194051
1764 07:03:09.197743 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1765 07:03:09.197897 start: 2.2.4 bootloader-commands (timeout 00:04:29) [common]
1766 07:03:09.198024 Setting prompt string to ['sarien:']
1767 07:03:09.198148 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:29)
1768 07:03:09.198343 Starting depthcharge on sarien...
1769 07:03:09.198429
1770 07:03:09.204373 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1771 07:03:09.204487
1772 07:03:09.212264 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1773 07:03:09.212366
1774 07:03:09.220080 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1775 07:03:09.220176
1776 07:03:09.222186 BIOS MMAP details:
1777 07:03:09.222276
1778 07:03:09.225417 IFD Base Offset : 0x1000000
1779 07:03:09.225509
1780 07:03:09.227814 IFD End Offset : 0x2000000
1781 07:03:09.227900
1782 07:03:09.231090 MMAP Size : 0x1000000
1783 07:03:09.231383
1784 07:03:09.233482 MMAP Start : 0xff000000
1785 07:03:09.234485
1786 07:03:09.240679 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1787 07:03:09.243373
1788 07:03:09.247754 Failed to find BH720 with VID/DID 1217:8620
1789 07:03:09.247852
1790 07:03:09.252338 New NVMe Controller 0x3214e050 @ 00:1d:04
1791 07:03:09.252432
1792 07:03:09.256402 New NVMe Controller 0x3214e118 @ 00:1d:00
1793 07:03:09.257094
1794 07:03:09.262044 The GBB signature is at 0x30000014 and is: 24 47 42 42
1795 07:03:09.265991
1796 07:03:09.267886 Wipe memory regions:
1797 07:03:09.268953
1798 07:03:09.271783 [0x00000000001000, 0x000000000a0000)
1799 07:03:09.272371
1800 07:03:09.276107 [0x00000000100000, 0x00000030000000)
1801 07:03:09.357805
1802 07:03:09.361934 [0x00000032751910, 0x00000089afd000)
1803 07:03:09.512141
1804 07:03:09.515599 [0x00000100000000, 0x0000016e800000)
1805 07:03:10.285745
1806 07:03:10.287283 R8152: Initializing
1807 07:03:10.288280
1808 07:03:10.290787 Version 6 (ocp_data = 5c30)
1809 07:03:10.291423
1810 07:03:10.293554 R8152: Done initializing
1811 07:03:10.294488
1812 07:03:10.295940 Adding net device
1813 07:03:10.296024
1814 07:03:10.302328 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1815 07:03:10.302431
1816 07:03:10.302540
1817 07:03:10.302941
1818 07:03:10.303252 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1820 07:03:10.404063 sarien:tftpboot 192.168.201.1 9726634/tftp-deploy-ixp07mlz/kernel/bzImage 9726634/tftp-deploy-ixp07mlz/kernel/cmdline 9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
1821 07:03:10.404240 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1822 07:03:10.404335 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:28)
1823 07:03:10.405898 tftpboot 192.168.201.1 9726634/tftp-deploy-ixp07mlz/kernel/bzImage 9726634/tftp-deploy-ixp07mlz/kernel/cmdline 9726634/tftp-deploy-ixp07mlz/ramdisk/ramdisk.cpio.gz
1824 07:03:10.405998
1825 07:03:10.406882 Waiting for link
1826 07:03:10.607409
1827 07:03:10.607779 done.
1828 07:03:10.608056
1829 07:03:10.610602 MAC: 00:24:32:30:77:df
1830 07:03:10.610706
1831 07:03:10.613281 Sending DHCP discover... done.
1832 07:03:10.613571
1833 07:03:13.617497 Waiting for reply... done.
1834 07:03:13.617660
1835 07:03:13.619503 Sending DHCP request... done.
1836 07:03:13.619602
1837 07:03:13.624035 Waiting for reply... done.
1838 07:03:13.625487
1839 07:03:13.627066 My ip is 192.168.201.221
1840 07:03:13.627171
1841 07:03:13.630999 The DHCP server ip is 192.168.201.1
1842 07:03:13.631106
1843 07:03:13.635079 TFTP server IP predefined by user: 192.168.201.1
1844 07:03:13.635828
1845 07:03:13.642222 Bootfile predefined by user: 9726634/tftp-deploy-ixp07mlz/kernel/bzImage
1846 07:03:13.642513
1847 07:03:13.645844 Sending tftp read request... done.
1848 07:03:13.646154
1849 07:03:13.648592 Waiting for the transfer...
1850 07:03:13.648889
1851 07:03:14.108949 00000000 ################################################################
1852 07:03:14.109308
1853 07:03:14.566693 00080000 ################################################################
1854 07:03:14.567057
1855 07:03:15.022726 00100000 ################################################################
1856 07:03:15.023433
1857 07:03:15.498847 00180000 ################################################################
1858 07:03:15.499494
1859 07:03:15.987425 00200000 ################################################################
1860 07:03:15.987777
1861 07:03:16.487056 00280000 ################################################################
1862 07:03:16.487427
1863 07:03:16.986359 00300000 ################################################################
1864 07:03:16.986987
1865 07:03:17.476794 00380000 ################################################################
1866 07:03:17.477556
1867 07:03:17.967175 00400000 ################################################################
1868 07:03:17.967807
1869 07:03:18.453704 00480000 ################################################################
1870 07:03:18.453858
1871 07:03:18.937267 00500000 ################################################################
1872 07:03:18.937433
1873 07:03:19.434785 00580000 ################################################################
1874 07:03:19.435455
1875 07:03:19.938130 00600000 ################################################################
1876 07:03:19.938281
1877 07:03:20.434639 00680000 ################################################################
1878 07:03:20.435011
1879 07:03:20.924023 00700000 ################################################################
1880 07:03:20.924407
1881 07:03:21.401872 00780000 ################################################################
1882 07:03:21.402025
1883 07:03:21.895293 00800000 ################################################################
1884 07:03:21.896049
1885 07:03:22.374265 00880000 ################################################################
1886 07:03:22.374649
1887 07:03:22.857791 00900000 ################################################################
1888 07:03:22.858177
1889 07:03:23.358424 00980000 ################################################################
1890 07:03:23.359021
1891 07:03:23.848534 00a00000 ################################################################
1892 07:03:23.848939
1893 07:03:24.327063 00a80000 ################################################################
1894 07:03:24.327511
1895 07:03:24.421489 00b00000 ############# done.
1896 07:03:24.421636
1897 07:03:24.424785 The bootfile was 11637120 bytes long.
1898 07:03:24.425130
1899 07:03:24.428603 Sending tftp read request... done.
1900 07:03:24.429228
1901 07:03:24.431476 Waiting for the transfer...
1902 07:03:24.431575
1903 07:03:24.891255 00000000 ################################################################
1904 07:03:24.891667
1905 07:03:25.351830 00080000 ################################################################
1906 07:03:25.352230
1907 07:03:25.818969 00100000 ################################################################
1908 07:03:25.819391
1909 07:03:26.285738 00180000 ################################################################
1910 07:03:26.286399
1911 07:03:26.753396 00200000 ################################################################
1912 07:03:26.753810
1913 07:03:27.218310 00280000 ################################################################
1914 07:03:27.218739
1915 07:03:27.705857 00300000 ################################################################
1916 07:03:27.706282
1917 07:03:28.191887 00380000 ################################################################
1918 07:03:28.192789
1919 07:03:28.715794 00400000 ################################################################
1920 07:03:28.716418
1921 07:03:29.210966 00480000 ################################################################
1922 07:03:29.211124
1923 07:03:29.696755 00500000 ################################################################
1924 07:03:29.697182
1925 07:03:30.200126 00580000 ################################################################
1926 07:03:30.200682
1927 07:03:30.692383 00600000 ################################################################
1928 07:03:30.692815
1929 07:03:31.171437 00680000 ################################################################
1930 07:03:31.172242
1931 07:03:31.653235 00700000 ################################################################
1932 07:03:31.653977
1933 07:03:32.131772 00780000 ################################################################
1934 07:03:32.132398
1935 07:03:32.627881 00800000 ################################################################
1936 07:03:32.628311
1937 07:03:32.918140 00880000 ####################################### done.
1938 07:03:32.918299
1939 07:03:32.921276 Sending tftp read request... done.
1940 07:03:32.922210
1941 07:03:32.924476 Waiting for the transfer...
1942 07:03:32.924567
1943 07:03:32.926366 00000000 # done.
1944 07:03:32.926456
1945 07:03:32.935155 Command line loaded dynamically from TFTP file: 9726634/tftp-deploy-ixp07mlz/kernel/cmdline
1946 07:03:32.935543
1947 07:03:32.952552 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1948 07:03:32.957914
1949 07:03:32.961165 Shutting down all USB controllers.
1950 07:03:32.961567
1951 07:03:32.963768 Removing current net device
1952 07:03:32.965130
1953 07:03:32.967616 EC: exit firmware mode
1954 07:03:32.968952
1955 07:03:32.970601 Finalizing coreboot
1956 07:03:32.972293
1957 07:03:32.977137 Exiting depthcharge with code 4 at timestamp: 30689711
1958 07:03:32.977261
1959 07:03:32.977962
1960 07:03:32.979342 Starting kernel ...
1961 07:03:32.979784 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
1962 07:03:32.979903 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
1963 07:03:32.979992 Setting prompt string to ['Linux version [0-9]']
1964 07:03:32.980074 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1965 07:03:32.980158 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1966 07:03:32.980388
1967 07:03:32.980473
1969 07:07:38.980341 end: 2.2.5 auto-login-action (duration 00:04:06) [common]
1971 07:07:38.980584 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 246 seconds'
1973 07:07:38.980766 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1976 07:07:38.981064 end: 2 depthcharge-action (duration 00:05:00) [common]
1978 07:07:38.981339 Cleaning after the job
1979 07:07:38.981443 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/ramdisk
1980 07:07:38.982179 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/kernel
1981 07:07:38.983005 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726634/tftp-deploy-ixp07mlz/modules
1982 07:07:38.983405 start: 5.1 power-off (timeout 00:00:30) [common]
1983 07:07:38.983592 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-1' '--port=1' '--command=off'
1984 07:07:46.303761 >> Command sent successfully.
1985 07:07:46.309775 Returned 0 in 7 seconds
1986 07:07:46.411135 end: 5.1 power-off (duration 00:00:07) [common]
1988 07:07:46.413249 start: 5.2 read-feedback (timeout 00:09:53) [common]
1989 07:07:46.414801 Listened to connection for namespace 'common' for up to 1s
1990 07:07:47.419371 Finalising connection for namespace 'common'
1991 07:07:47.419979 Disconnecting from shell: Finalise
1992 07:07:47.420386
1993 07:07:47.521685 end: 5.2 read-feedback (duration 00:00:01) [common]
1994 07:07:47.522382 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726634
1995 07:07:47.550430 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726634
1996 07:07:47.550882 JobError: Your job cannot terminate cleanly.