Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 07:02:38.460684 lava-dispatcher, installed at version: 2023.01
2 07:02:38.460880 start: 0 validate
3 07:02:38.461001 Start time: 2023-03-22 07:02:38.460996+00:00 (UTC)
4 07:02:38.461126 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:02:38.461255 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 07:02:38.758990 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:02:38.759736 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:02:39.052292 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:02:39.053092 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:02:43.647855 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:02:43.648594 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-5.10.y-cip%2Fv5.10.175-cip29%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:02:43.947080 validate duration: 5.49
14 07:02:43.947361 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:02:43.947516 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:02:43.947609 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:02:43.947701 Not decompressing ramdisk as can be used compressed.
18 07:02:43.947781 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 07:02:43.947845 saving as /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/ramdisk/initrd.cpio.gz
20 07:02:43.947903 total size: 5432123 (5MB)
21 07:02:44.668095 progress 0% (0MB)
22 07:02:44.672639 progress 5% (0MB)
23 07:02:44.673962 progress 10% (0MB)
24 07:02:44.675322 progress 15% (0MB)
25 07:02:44.676858 progress 20% (1MB)
26 07:02:44.678218 progress 25% (1MB)
27 07:02:44.679559 progress 30% (1MB)
28 07:02:44.681062 progress 35% (1MB)
29 07:02:44.682404 progress 40% (2MB)
30 07:02:44.683735 progress 45% (2MB)
31 07:02:44.685072 progress 50% (2MB)
32 07:02:44.686562 progress 55% (2MB)
33 07:02:44.687914 progress 60% (3MB)
34 07:02:44.689254 progress 65% (3MB)
35 07:02:44.690742 progress 70% (3MB)
36 07:02:44.692072 progress 75% (3MB)
37 07:02:44.693413 progress 80% (4MB)
38 07:02:44.694743 progress 85% (4MB)
39 07:02:44.696227 progress 90% (4MB)
40 07:02:44.697561 progress 95% (4MB)
41 07:02:44.698898 progress 100% (5MB)
42 07:02:44.699090 5MB downloaded in 0.75s (6.90MB/s)
43 07:02:44.699238 end: 1.1.1 http-download (duration 00:00:01) [common]
45 07:02:44.699476 end: 1.1 download-retry (duration 00:00:01) [common]
46 07:02:44.699564 start: 1.2 download-retry (timeout 00:09:59) [common]
47 07:02:44.699651 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 07:02:44.699760 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:02:44.699829 saving as /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/kernel/bzImage
50 07:02:44.699889 total size: 11637120 (11MB)
51 07:02:44.699947 No compression specified
52 07:02:44.700867 progress 0% (0MB)
53 07:02:44.703639 progress 5% (0MB)
54 07:02:44.706469 progress 10% (1MB)
55 07:02:44.709290 progress 15% (1MB)
56 07:02:44.712112 progress 20% (2MB)
57 07:02:44.714787 progress 25% (2MB)
58 07:02:44.717566 progress 30% (3MB)
59 07:02:44.720361 progress 35% (3MB)
60 07:02:44.723144 progress 40% (4MB)
61 07:02:44.725774 progress 45% (5MB)
62 07:02:44.728626 progress 50% (5MB)
63 07:02:44.731439 progress 55% (6MB)
64 07:02:44.734246 progress 60% (6MB)
65 07:02:44.736903 progress 65% (7MB)
66 07:02:44.739671 progress 70% (7MB)
67 07:02:44.742446 progress 75% (8MB)
68 07:02:44.745251 progress 80% (8MB)
69 07:02:44.747858 progress 85% (9MB)
70 07:02:44.750619 progress 90% (10MB)
71 07:02:44.753350 progress 95% (10MB)
72 07:02:44.756089 progress 100% (11MB)
73 07:02:44.756204 11MB downloaded in 0.06s (197.09MB/s)
74 07:02:44.756388 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:02:44.756621 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:02:44.756709 start: 1.3 download-retry (timeout 00:09:59) [common]
78 07:02:44.756795 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 07:02:44.756901 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 07:02:44.756971 saving as /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/nfsrootfs/full.rootfs.tar
81 07:02:44.757030 total size: 133351768 (127MB)
82 07:02:44.757090 Using unxz to decompress xz
83 07:02:44.760291 progress 0% (0MB)
84 07:02:45.096603 progress 5% (6MB)
85 07:02:45.460492 progress 10% (12MB)
86 07:02:45.739729 progress 15% (19MB)
87 07:02:45.930246 progress 20% (25MB)
88 07:02:46.181548 progress 25% (31MB)
89 07:02:46.524911 progress 30% (38MB)
90 07:02:46.875421 progress 35% (44MB)
91 07:02:47.267703 progress 40% (50MB)
92 07:02:47.654029 progress 45% (57MB)
93 07:02:48.009864 progress 50% (63MB)
94 07:02:48.382404 progress 55% (69MB)
95 07:02:48.743578 progress 60% (76MB)
96 07:02:49.106917 progress 65% (82MB)
97 07:02:49.470724 progress 70% (89MB)
98 07:02:49.836145 progress 75% (95MB)
99 07:02:50.277206 progress 80% (101MB)
100 07:02:50.713980 progress 85% (108MB)
101 07:02:50.988478 progress 90% (114MB)
102 07:02:51.335460 progress 95% (120MB)
103 07:02:51.729831 progress 100% (127MB)
104 07:02:51.735630 127MB downloaded in 6.98s (18.22MB/s)
105 07:02:51.735926 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:02:51.736191 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:02:51.736287 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:02:51.736387 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:02:51.736506 downloading http://storage.kernelci.org/cip/linux-5.10.y-cip/v5.10.175-cip29/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:02:51.736578 saving as /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/modules/modules.tar
112 07:02:51.736641 total size: 499012 (0MB)
113 07:02:51.736703 Using unxz to decompress xz
114 07:02:51.739741 progress 6% (0MB)
115 07:02:51.740105 progress 13% (0MB)
116 07:02:51.740346 progress 19% (0MB)
117 07:02:51.741713 progress 26% (0MB)
118 07:02:51.743702 progress 32% (0MB)
119 07:02:51.745678 progress 39% (0MB)
120 07:02:51.747610 progress 45% (0MB)
121 07:02:51.749599 progress 52% (0MB)
122 07:02:51.751563 progress 59% (0MB)
123 07:02:51.753570 progress 65% (0MB)
124 07:02:51.755424 progress 72% (0MB)
125 07:02:51.757417 progress 78% (0MB)
126 07:02:51.759311 progress 85% (0MB)
127 07:02:51.761217 progress 91% (0MB)
128 07:02:51.763018 progress 98% (0MB)
129 07:02:51.770346 0MB downloaded in 0.03s (14.12MB/s)
130 07:02:51.770608 end: 1.4.1 http-download (duration 00:00:00) [common]
132 07:02:51.770879 end: 1.4 download-retry (duration 00:00:00) [common]
133 07:02:51.770975 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 07:02:51.771073 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 07:02:53.027353 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9726642/extract-nfsrootfs-_0oxowbo
136 07:02:53.027563 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
137 07:02:53.027669 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 07:02:53.027804 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r
139 07:02:53.027909 makedir: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin
140 07:02:53.027993 makedir: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/tests
141 07:02:53.028074 makedir: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/results
142 07:02:53.028175 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-add-keys
143 07:02:53.028304 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-add-sources
144 07:02:53.028422 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-background-process-start
145 07:02:53.028535 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-background-process-stop
146 07:02:53.028649 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-common-functions
147 07:02:53.028758 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-echo-ipv4
148 07:02:53.028869 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-install-packages
149 07:02:53.028976 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-installed-packages
150 07:02:53.029083 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-os-build
151 07:02:53.029190 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-probe-channel
152 07:02:53.029298 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-probe-ip
153 07:02:53.029405 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-target-ip
154 07:02:53.029512 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-target-mac
155 07:02:53.029618 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-target-storage
156 07:02:53.029729 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-case
157 07:02:53.029836 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-event
158 07:02:53.029942 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-feedback
159 07:02:53.030050 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-raise
160 07:02:53.030156 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-reference
161 07:02:53.030261 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-runner
162 07:02:53.030368 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-set
163 07:02:53.030473 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-test-shell
164 07:02:53.030584 Updating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-install-packages (oe)
165 07:02:53.030697 Updating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/bin/lava-installed-packages (oe)
166 07:02:53.030796 Creating /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/environment
167 07:02:53.030880 LAVA metadata
168 07:02:53.030948 - LAVA_JOB_ID=9726642
169 07:02:53.031013 - LAVA_DISPATCHER_IP=192.168.201.1
170 07:02:53.031111 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 07:02:53.031176 skipped lava-vland-overlay
172 07:02:53.031252 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 07:02:53.031333 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 07:02:53.031394 skipped lava-multinode-overlay
175 07:02:53.031468 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 07:02:53.031552 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 07:02:53.031625 Loading test definitions
178 07:02:53.031718 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 07:02:53.031789 Using /lava-9726642 at stage 0
180 07:02:53.032039 uuid=9726642_1.5.2.3.1 testdef=None
181 07:02:53.032127 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 07:02:53.032215 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 07:02:53.032858 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 07:02:53.033105 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 07:02:53.033661 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 07:02:53.033902 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 07:02:53.034434 runner path: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/0/tests/0_dmesg test_uuid 9726642_1.5.2.3.1
190 07:02:53.034580 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 07:02:53.034826 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 07:02:53.034935 Using /lava-9726642 at stage 1
194 07:02:53.035171 uuid=9726642_1.5.2.3.5 testdef=None
195 07:02:53.035264 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 07:02:53.035351 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 07:02:53.035790 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 07:02:53.036013 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 07:02:53.036620 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 07:02:53.036873 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 07:02:53.037413 runner path: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/1/tests/1_bootrr test_uuid 9726642_1.5.2.3.5
204 07:02:53.037556 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 07:02:53.037766 Creating lava-test-runner.conf files
207 07:02:53.037830 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/0 for stage 0
208 07:02:53.037911 - 0_dmesg
209 07:02:53.037983 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9726642/lava-overlay-5xia7i2r/lava-9726642/1 for stage 1
210 07:02:53.038063 - 1_bootrr
211 07:02:53.038152 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 07:02:53.038237 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 07:02:53.043800 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 07:02:53.043941 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 07:02:53.044037 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 07:02:53.044127 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 07:02:53.044215 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 07:02:53.146979 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 07:02:53.147357 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 07:02:53.147617 extracting modules file /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726642/extract-nfsrootfs-_0oxowbo
221 07:02:53.160314 extracting modules file /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9726642/extract-overlay-ramdisk-ertubbya/ramdisk
222 07:02:53.173081 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 07:02:53.173259 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
224 07:02:53.173353 [common] Applying overlay to NFS
225 07:02:53.173424 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9726642/compress-overlay-9vekv__g/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9726642/extract-nfsrootfs-_0oxowbo
226 07:02:53.177476 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 07:02:53.177608 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
228 07:02:53.177709 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 07:02:53.177802 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
230 07:02:53.177882 Building ramdisk /var/lib/lava/dispatcher/tmp/9726642/extract-overlay-ramdisk-ertubbya/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9726642/extract-overlay-ramdisk-ertubbya/ramdisk
231 07:02:53.219094 >> 30090 blocks
232 07:02:53.760716 rename /var/lib/lava/dispatcher/tmp/9726642/extract-overlay-ramdisk-ertubbya/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
233 07:02:53.761211 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 07:02:53.761387 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 07:02:53.761532 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 07:02:53.761662 No mkimage arch provided, not using FIT.
237 07:02:53.761791 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 07:02:53.761918 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 07:02:53.762058 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
240 07:02:53.762214 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 07:02:53.762330 No LXC device requested
242 07:02:53.762455 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 07:02:53.762587 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 07:02:53.762710 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 07:02:53.762816 Checking files for TFTP limit of 4294967296 bytes.
246 07:02:53.763335 end: 1 tftp-deploy (duration 00:00:10) [common]
247 07:02:53.763484 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 07:02:53.763621 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 07:02:53.763804 substitutions:
250 07:02:53.763907 - {DTB}: None
251 07:02:53.764006 - {INITRD}: 9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
252 07:02:53.764102 - {KERNEL}: 9726642/tftp-deploy-humh3605/kernel/bzImage
253 07:02:53.764215 - {LAVA_MAC}: None
254 07:02:53.764317 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9726642/extract-nfsrootfs-_0oxowbo
255 07:02:53.764413 - {NFS_SERVER_IP}: 192.168.201.1
256 07:02:53.764498 - {PRESEED_CONFIG}: None
257 07:02:53.764588 - {PRESEED_LOCAL}: None
258 07:02:53.764678 - {RAMDISK}: 9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
259 07:02:53.764773 - {ROOT_PART}: None
260 07:02:53.764864 - {ROOT}: None
261 07:02:53.764956 - {SERVER_IP}: 192.168.201.1
262 07:02:53.765046 - {TEE}: None
263 07:02:53.765138 Parsed boot commands:
264 07:02:53.765226 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 07:02:53.765443 Parsed boot commands: tftpboot 192.168.201.1 9726642/tftp-deploy-humh3605/kernel/bzImage 9726642/tftp-deploy-humh3605/kernel/cmdline 9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
266 07:02:53.765579 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 07:02:53.765710 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 07:02:53.765846 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 07:02:53.765988 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 07:02:53.766103 Not connected, no need to disconnect.
271 07:02:53.766239 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 07:02:53.766357 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 07:02:53.766463 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
274 07:02:53.769935 Setting prompt string to ['lava-test: # ']
275 07:02:53.770304 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 07:02:53.770453 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 07:02:53.770595 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 07:02:53.770735 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 07:02:53.771006 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
280 07:02:58.913554 >> Command sent successfully.
281 07:02:58.923067 Returned 0 in 5 seconds
282 07:02:59.024838 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 07:02:59.026831 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 07:02:59.027419 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 07:02:59.028093 Setting prompt string to 'Starting depthcharge on Helios...'
287 07:02:59.028534 Changing prompt to 'Starting depthcharge on Helios...'
288 07:02:59.028933 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 07:02:59.030345 [Enter `^Ec?' for help]
290 07:02:59.638497
291 07:02:59.639121
292 07:02:59.648241 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 07:02:59.651609 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 07:02:59.657962 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 07:02:59.661408 CPU: AES supported, TXT NOT supported, VT supported
296 07:02:59.668307 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 07:02:59.671605 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 07:02:59.677947 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 07:02:59.681294 VBOOT: Loading verstage.
300 07:02:59.684774 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 07:02:59.691307 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 07:02:59.694793 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 07:02:59.698037 CBFS @ c08000 size 3f8000
304 07:02:59.704448 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 07:02:59.708269 CBFS: Locating 'fallback/verstage'
306 07:02:59.711301 CBFS: Found @ offset 10fb80 size 1072c
307 07:02:59.714548
308 07:02:59.714985
309 07:02:59.724536 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 07:02:59.738880 Probing TPM: . done!
311 07:02:59.742233 TPM ready after 0 ms
312 07:02:59.746089 Connected to device vid:did:rid of 1ae0:0028:00
313 07:02:59.756228 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 07:02:59.759692 Initialized TPM device CR50 revision 0
315 07:02:59.803164 tlcl_send_startup: Startup return code is 0
316 07:02:59.803706 TPM: setup succeeded
317 07:02:59.815768 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 07:02:59.819569 Chrome EC: UHEPI supported
319 07:02:59.823386 Phase 1
320 07:02:59.826520 FMAP: area GBB found @ c05000 (12288 bytes)
321 07:02:59.833007 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 07:02:59.836156 Phase 2
323 07:02:59.836726 Phase 3
324 07:02:59.839166 FMAP: area GBB found @ c05000 (12288 bytes)
325 07:02:59.845626 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 07:02:59.852848 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 07:02:59.855863 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 07:02:59.862399 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 07:02:59.878483 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 07:02:59.881152 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 07:02:59.887711 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 07:02:59.892151 Phase 4
333 07:02:59.895673 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 07:02:59.902308 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 07:03:00.081720 VB2:vb2_rsa_verify_digest() Digest check failed!
336 07:03:00.088801 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 07:03:00.089409 Saving nvdata
338 07:03:00.091967 Reboot requested (10020007)
339 07:03:00.095378 board_reset() called!
340 07:03:00.095970 full_reset() called!
341 07:03:04.605067
342 07:03:04.605618
343 07:03:04.614850 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 07:03:04.617976 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 07:03:04.624553 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 07:03:04.628375 CPU: AES supported, TXT NOT supported, VT supported
347 07:03:04.634845 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 07:03:04.637885 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 07:03:04.644266 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 07:03:04.647711 VBOOT: Loading verstage.
351 07:03:04.651215 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 07:03:04.658348 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 07:03:04.664134 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 07:03:04.664640 CBFS @ c08000 size 3f8000
355 07:03:04.670965 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 07:03:04.674888 CBFS: Locating 'fallback/verstage'
357 07:03:04.677570 CBFS: Found @ offset 10fb80 size 1072c
358 07:03:04.681792
359 07:03:04.682251
360 07:03:04.691808 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 07:03:04.706136 Probing TPM: . done!
362 07:03:04.709289 TPM ready after 0 ms
363 07:03:04.712960 Connected to device vid:did:rid of 1ae0:0028:00
364 07:03:04.722896 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
365 07:03:04.726420 Initialized TPM device CR50 revision 0
366 07:03:04.769904 tlcl_send_startup: Startup return code is 0
367 07:03:04.770463 TPM: setup succeeded
368 07:03:04.783177 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 07:03:04.786819 Chrome EC: UHEPI supported
370 07:03:04.790175 Phase 1
371 07:03:04.793764 FMAP: area GBB found @ c05000 (12288 bytes)
372 07:03:04.799714 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 07:03:04.806623 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 07:03:04.809889 Recovery requested (1009000e)
375 07:03:04.810378 Saving nvdata
376 07:03:04.821779 tlcl_extend: response is 0
377 07:03:04.830481 tlcl_extend: response is 0
378 07:03:04.837605 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 07:03:04.840418 CBFS @ c08000 size 3f8000
380 07:03:04.847403 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 07:03:04.850750 CBFS: Locating 'fallback/romstage'
382 07:03:04.853868 CBFS: Found @ offset 80 size 145fc
383 07:03:04.856912 Accumulated console time in verstage 98 ms
384 07:03:04.857513
385 07:03:04.858100
386 07:03:04.870605 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 07:03:04.876943 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 07:03:04.880433 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 07:03:04.883972 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 07:03:04.890643 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 07:03:04.893995 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 07:03:04.897098 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 07:03:04.900162 TCO_STS: 0000 0000
394 07:03:04.903540 GEN_PMCON: e0015238 00000200
395 07:03:04.907146 GBLRST_CAUSE: 00000000 00000000
396 07:03:04.907590 prev_sleep_state 5
397 07:03:04.910673 Boot Count incremented to 58000
398 07:03:04.917282 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 07:03:04.920585 CBFS @ c08000 size 3f8000
400 07:03:04.927132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 07:03:04.927663 CBFS: Locating 'fspm.bin'
402 07:03:04.933821 CBFS: Found @ offset 5ffc0 size 71000
403 07:03:04.936970 Chrome EC: UHEPI supported
404 07:03:04.943896 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 07:03:04.947117 Probing TPM: done!
406 07:03:04.953466 Connected to device vid:did:rid of 1ae0:0028:00
407 07:03:04.963520 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
408 07:03:04.970132 Initialized TPM device CR50 revision 0
409 07:03:04.978578 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 07:03:04.988911 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 07:03:04.989479 MRC cache found, size 1948
412 07:03:04.991996 bootmode is set to: 2
413 07:03:04.995358 PRMRR disabled by config.
414 07:03:04.998576 SPD INDEX = 1
415 07:03:05.001890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 07:03:05.005326 CBFS @ c08000 size 3f8000
417 07:03:05.011742 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 07:03:05.012374 CBFS: Locating 'spd.bin'
419 07:03:05.015357 CBFS: Found @ offset 5fb80 size 400
420 07:03:05.018121 SPD: module type is LPDDR3
421 07:03:05.022306 SPD: module part is
422 07:03:05.028510 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 07:03:05.031560 SPD: device width 4 bits, bus width 8 bits
424 07:03:05.035221 SPD: module size is 4096 MB (per channel)
425 07:03:05.038093 memory slot: 0 configuration done.
426 07:03:05.041197 memory slot: 2 configuration done.
427 07:03:05.093480 CBMEM:
428 07:03:05.096850 IMD: root @ 99fff000 254 entries.
429 07:03:05.100057 IMD: root @ 99ffec00 62 entries.
430 07:03:05.103563 External stage cache:
431 07:03:05.106557 IMD: root @ 9abff000 254 entries.
432 07:03:05.109782 IMD: root @ 9abfec00 62 entries.
433 07:03:05.116810 Chrome EC: clear events_b mask to 0x0000000020004000
434 07:03:05.129190 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 07:03:05.143112 tlcl_write: response is 0
436 07:03:05.151942 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 07:03:05.158501 MRC: TPM MRC hash updated successfully.
438 07:03:05.159106 2 DIMMs found
439 07:03:05.161938 SMM Memory Map
440 07:03:05.164976 SMRAM : 0x9a000000 0x1000000
441 07:03:05.168387 Subregion 0: 0x9a000000 0xa00000
442 07:03:05.171364 Subregion 1: 0x9aa00000 0x200000
443 07:03:05.174872 Subregion 2: 0x9ac00000 0x400000
444 07:03:05.178111 top_of_ram = 0x9a000000
445 07:03:05.181981 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 07:03:05.188147 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 07:03:05.191393 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 07:03:05.198128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 07:03:05.201555 CBFS @ c08000 size 3f8000
450 07:03:05.204419 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 07:03:05.207973 CBFS: Locating 'fallback/postcar'
452 07:03:05.214190 CBFS: Found @ offset 107000 size 4b44
453 07:03:05.217655 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 07:03:05.230335 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 07:03:05.233244 Processing 180 relocs. Offset value of 0x97c0c000
456 07:03:05.241953 Accumulated console time in romstage 286 ms
457 07:03:05.242042
458 07:03:05.242129
459 07:03:05.251556 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 07:03:05.258323 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 07:03:05.261912 CBFS @ c08000 size 3f8000
462 07:03:05.268264 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 07:03:05.271563 CBFS: Locating 'fallback/ramstage'
464 07:03:05.274927 CBFS: Found @ offset 43380 size 1b9e8
465 07:03:05.281506 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 07:03:05.313884 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 07:03:05.316938 Processing 3976 relocs. Offset value of 0x98db0000
468 07:03:05.323967 Accumulated console time in postcar 52 ms
469 07:03:05.324200
470 07:03:05.324386
471 07:03:05.334167 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 07:03:05.340828 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 07:03:05.343715 WARNING: RO_VPD is uninitialized or empty.
474 07:03:05.347246 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 07:03:05.354606 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 07:03:05.355211 Normal boot.
477 07:03:05.360514 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 07:03:05.363882 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 07:03:05.367265 CBFS @ c08000 size 3f8000
480 07:03:05.373526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 07:03:05.377030 CBFS: Locating 'cpu_microcode_blob.bin'
482 07:03:05.380508 CBFS: Found @ offset 14700 size 2ec00
483 07:03:05.383674 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 07:03:05.386914 Skip microcode update
485 07:03:05.390388 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 07:03:05.394045 CBFS @ c08000 size 3f8000
487 07:03:05.400665 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 07:03:05.403797 CBFS: Locating 'fsps.bin'
489 07:03:05.407283 CBFS: Found @ offset d1fc0 size 35000
490 07:03:05.432079 Detected 4 core, 8 thread CPU.
491 07:03:05.435200 Setting up SMI for CPU
492 07:03:05.438596 IED base = 0x9ac00000
493 07:03:05.439044 IED size = 0x00400000
494 07:03:05.441808 Will perform SMM setup.
495 07:03:05.448505 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 07:03:05.455437 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 07:03:05.458821 Processing 16 relocs. Offset value of 0x00030000
498 07:03:05.462528 Attempting to start 7 APs
499 07:03:05.465569 Waiting for 10ms after sending INIT.
500 07:03:05.482067 Waiting for 1st SIPI to complete...done.
501 07:03:05.482614 AP: slot 1 apic_id 1.
502 07:03:05.488494 Waiting for 2nd SIPI to complete...done.
503 07:03:05.488981 AP: slot 6 apic_id 5.
504 07:03:05.491656 AP: slot 4 apic_id 4.
505 07:03:05.495376 AP: slot 3 apic_id 6.
506 07:03:05.495958 AP: slot 2 apic_id 7.
507 07:03:05.498893 AP: slot 7 apic_id 3.
508 07:03:05.501707 AP: slot 5 apic_id 2.
509 07:03:05.508350 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 07:03:05.512016 Processing 13 relocs. Offset value of 0x00038000
511 07:03:05.518161 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 07:03:05.524922 Installing SMM handler to 0x9a000000
513 07:03:05.531624 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 07:03:05.534861 Processing 658 relocs. Offset value of 0x9a010000
515 07:03:05.544994 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 07:03:05.548215 Processing 13 relocs. Offset value of 0x9a008000
517 07:03:05.555195 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 07:03:05.561587 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 07:03:05.565006 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 07:03:05.571391 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 07:03:05.578349 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 07:03:05.584722 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 07:03:05.588443 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 07:03:05.594817 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 07:03:05.597890 Clearing SMI status registers
526 07:03:05.601077 SMI_STS: PM1
527 07:03:05.601652 PM1_STS: PWRBTN
528 07:03:05.604679 TCO_STS: SECOND_TO
529 07:03:05.608177 New SMBASE 0x9a000000
530 07:03:05.611082 In relocation handler: CPU 0
531 07:03:05.614547 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 07:03:05.617862 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 07:03:05.621396 Relocation complete.
534 07:03:05.625033 New SMBASE 0x99fffc00
535 07:03:05.625529 In relocation handler: CPU 1
536 07:03:05.631229 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 07:03:05.634785 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 07:03:05.637849 Relocation complete.
539 07:03:05.638347 New SMBASE 0x99ffe800
540 07:03:05.641452 In relocation handler: CPU 6
541 07:03:05.647611 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
542 07:03:05.651388 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 07:03:05.654593 Relocation complete.
544 07:03:05.655155 New SMBASE 0x99fff000
545 07:03:05.657953 In relocation handler: CPU 4
546 07:03:05.664584 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 07:03:05.667916 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 07:03:05.671313 Relocation complete.
549 07:03:05.671897 New SMBASE 0x99fff800
550 07:03:05.674580 In relocation handler: CPU 2
551 07:03:05.678165 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
552 07:03:05.684784 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 07:03:05.688081 Relocation complete.
554 07:03:05.688713 New SMBASE 0x99fff400
555 07:03:05.691137 In relocation handler: CPU 3
556 07:03:05.694258 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
557 07:03:05.701139 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 07:03:05.704296 Relocation complete.
559 07:03:05.704913 New SMBASE 0x99ffec00
560 07:03:05.707577 In relocation handler: CPU 5
561 07:03:05.710820 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
562 07:03:05.717725 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 07:03:05.718302 Relocation complete.
564 07:03:05.721239 New SMBASE 0x99ffe400
565 07:03:05.724429 In relocation handler: CPU 7
566 07:03:05.728072 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
567 07:03:05.734245 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 07:03:05.734820 Relocation complete.
569 07:03:05.737866 Initializing CPU #0
570 07:03:05.740829 CPU: vendor Intel device 806ec
571 07:03:05.744530 CPU: family 06, model 8e, stepping 0c
572 07:03:05.747657 Clearing out pending MCEs
573 07:03:05.751176 Setting up local APIC...
574 07:03:05.751667 apic_id: 0x00 done.
575 07:03:05.754483 Turbo is available but hidden
576 07:03:05.757676 Turbo is available and visible
577 07:03:05.761062 VMX status: enabled
578 07:03:05.764066 IA32_FEATURE_CONTROL status: locked
579 07:03:05.767593 Skip microcode update
580 07:03:05.768082 CPU #0 initialized
581 07:03:05.770845 Initializing CPU #1
582 07:03:05.771422 Initializing CPU #2
583 07:03:05.774491 Initializing CPU #3
584 07:03:05.777603 CPU: vendor Intel device 806ec
585 07:03:05.780785 CPU: family 06, model 8e, stepping 0c
586 07:03:05.784000 CPU: vendor Intel device 806ec
587 07:03:05.787466 CPU: family 06, model 8e, stepping 0c
588 07:03:05.790781 Clearing out pending MCEs
589 07:03:05.794308 Clearing out pending MCEs
590 07:03:05.797677 Setting up local APIC...
591 07:03:05.798172 Initializing CPU #6
592 07:03:05.800783 Initializing CPU #4
593 07:03:05.804263 CPU: vendor Intel device 806ec
594 07:03:05.807498 CPU: family 06, model 8e, stepping 0c
595 07:03:05.811022 CPU: vendor Intel device 806ec
596 07:03:05.813959 CPU: family 06, model 8e, stepping 0c
597 07:03:05.817242 Clearing out pending MCEs
598 07:03:05.820662 Clearing out pending MCEs
599 07:03:05.821152 Setting up local APIC...
600 07:03:05.824113 CPU: vendor Intel device 806ec
601 07:03:05.827294 CPU: family 06, model 8e, stepping 0c
602 07:03:05.830574 Clearing out pending MCEs
603 07:03:05.833901 apic_id: 0x05 done.
604 07:03:05.837400 Setting up local APIC...
605 07:03:05.837859 Setting up local APIC...
606 07:03:05.840839 VMX status: enabled
607 07:03:05.843972 apic_id: 0x04 done.
608 07:03:05.847327 IA32_FEATURE_CONTROL status: locked
609 07:03:05.847891 apic_id: 0x01 done.
610 07:03:05.850533 VMX status: enabled
611 07:03:05.854251 Skip microcode update
612 07:03:05.856991 IA32_FEATURE_CONTROL status: locked
613 07:03:05.857441 CPU #6 initialized
614 07:03:05.860814 Skip microcode update
615 07:03:05.864098 Setting up local APIC...
616 07:03:05.864635 VMX status: enabled
617 07:03:05.867096 apic_id: 0x06 done.
618 07:03:05.870489 apic_id: 0x07 done.
619 07:03:05.870972 VMX status: enabled
620 07:03:05.874629 VMX status: enabled
621 07:03:05.876995 IA32_FEATURE_CONTROL status: locked
622 07:03:05.880716 IA32_FEATURE_CONTROL status: locked
623 07:03:05.883469 Skip microcode update
624 07:03:05.883905 Skip microcode update
625 07:03:05.887524 CPU #3 initialized
626 07:03:05.887962 CPU #2 initialized
627 07:03:05.890535 CPU #4 initialized
628 07:03:05.893981 Initializing CPU #5
629 07:03:05.894419 Initializing CPU #7
630 07:03:05.897148 CPU: vendor Intel device 806ec
631 07:03:05.900813 CPU: family 06, model 8e, stepping 0c
632 07:03:05.903913 CPU: vendor Intel device 806ec
633 07:03:05.907264 CPU: family 06, model 8e, stepping 0c
634 07:03:05.910520 Clearing out pending MCEs
635 07:03:05.913583 Clearing out pending MCEs
636 07:03:05.917299 Setting up local APIC...
637 07:03:05.920477 IA32_FEATURE_CONTROL status: locked
638 07:03:05.923519 apic_id: 0x03 done.
639 07:03:05.923958 Setting up local APIC...
640 07:03:05.926864 Skip microcode update
641 07:03:05.930555 VMX status: enabled
642 07:03:05.931097 apic_id: 0x02 done.
643 07:03:05.933589 IA32_FEATURE_CONTROL status: locked
644 07:03:05.937293 VMX status: enabled
645 07:03:05.940637 Skip microcode update
646 07:03:05.943752 IA32_FEATURE_CONTROL status: locked
647 07:03:05.944206 CPU #7 initialized
648 07:03:05.947112 Skip microcode update
649 07:03:05.950010 CPU #1 initialized
650 07:03:05.950521 CPU #5 initialized
651 07:03:05.953838 bsp_do_flight_plan done after 465 msecs.
652 07:03:05.957544 CPU: frequency set to 4200 MHz
653 07:03:05.959886 Enabling SMIs.
654 07:03:05.960366 Locking SMM.
655 07:03:05.975611 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 07:03:05.979183 CBFS @ c08000 size 3f8000
657 07:03:05.985491 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 07:03:05.985995 CBFS: Locating 'vbt.bin'
659 07:03:05.988913 CBFS: Found @ offset 5f5c0 size 499
660 07:03:05.995438 Found a VBT of 4608 bytes after decompression
661 07:03:06.175451 Display FSP Version Info HOB
662 07:03:06.179205 Reference Code - CPU = 9.0.1e.30
663 07:03:06.182130 uCode Version = 0.0.0.ca
664 07:03:06.185300 TXT ACM version = ff.ff.ff.ffff
665 07:03:06.188667 Display FSP Version Info HOB
666 07:03:06.192263 Reference Code - ME = 9.0.1e.30
667 07:03:06.195188 MEBx version = 0.0.0.0
668 07:03:06.199001 ME Firmware Version = Consumer SKU
669 07:03:06.201983 Display FSP Version Info HOB
670 07:03:06.205582 Reference Code - CML PCH = 9.0.1e.30
671 07:03:06.206135 PCH-CRID Status = Disabled
672 07:03:06.212261 PCH-CRID Original Value = ff.ff.ff.ffff
673 07:03:06.215235 PCH-CRID New Value = ff.ff.ff.ffff
674 07:03:06.218428 OPROM - RST - RAID = ff.ff.ff.ffff
675 07:03:06.221804 ChipsetInit Base Version = ff.ff.ff.ffff
676 07:03:06.225570 ChipsetInit Oem Version = ff.ff.ff.ffff
677 07:03:06.228657 Display FSP Version Info HOB
678 07:03:06.235088 Reference Code - SA - System Agent = 9.0.1e.30
679 07:03:06.238580 Reference Code - MRC = 0.7.1.6c
680 07:03:06.239073 SA - PCIe Version = 9.0.1e.30
681 07:03:06.242229 SA-CRID Status = Disabled
682 07:03:06.245047 SA-CRID Original Value = 0.0.0.c
683 07:03:06.248203 SA-CRID New Value = 0.0.0.c
684 07:03:06.251846 OPROM - VBIOS = ff.ff.ff.ffff
685 07:03:06.255076 RTC Init
686 07:03:06.258495 Set power on after power failure.
687 07:03:06.258995 Disabling Deep S3
688 07:03:06.261651 Disabling Deep S3
689 07:03:06.262134 Disabling Deep S4
690 07:03:06.264857 Disabling Deep S4
691 07:03:06.265338 Disabling Deep S5
692 07:03:06.268699 Disabling Deep S5
693 07:03:06.275359 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
694 07:03:06.275848 Enumerating buses...
695 07:03:06.281454 Show all devs... Before device enumeration.
696 07:03:06.281896 Root Device: enabled 1
697 07:03:06.284737 CPU_CLUSTER: 0: enabled 1
698 07:03:06.288519 DOMAIN: 0000: enabled 1
699 07:03:06.291486 APIC: 00: enabled 1
700 07:03:06.291995 PCI: 00:00.0: enabled 1
701 07:03:06.295245 PCI: 00:02.0: enabled 1
702 07:03:06.298175 PCI: 00:04.0: enabled 0
703 07:03:06.298612 PCI: 00:05.0: enabled 0
704 07:03:06.301530 PCI: 00:12.0: enabled 1
705 07:03:06.305069 PCI: 00:12.5: enabled 0
706 07:03:06.308172 PCI: 00:12.6: enabled 0
707 07:03:06.308653 PCI: 00:14.0: enabled 1
708 07:03:06.311558 PCI: 00:14.1: enabled 0
709 07:03:06.314974 PCI: 00:14.3: enabled 1
710 07:03:06.318059 PCI: 00:14.5: enabled 0
711 07:03:06.318500 PCI: 00:15.0: enabled 1
712 07:03:06.321320 PCI: 00:15.1: enabled 1
713 07:03:06.324658 PCI: 00:15.2: enabled 0
714 07:03:06.328391 PCI: 00:15.3: enabled 0
715 07:03:06.328834 PCI: 00:16.0: enabled 1
716 07:03:06.331383 PCI: 00:16.1: enabled 0
717 07:03:06.334629 PCI: 00:16.2: enabled 0
718 07:03:06.335164 PCI: 00:16.3: enabled 0
719 07:03:06.337744 PCI: 00:16.4: enabled 0
720 07:03:06.341404 PCI: 00:16.5: enabled 0
721 07:03:06.344765 PCI: 00:17.0: enabled 1
722 07:03:06.345248 PCI: 00:19.0: enabled 1
723 07:03:06.348109 PCI: 00:19.1: enabled 0
724 07:03:06.351422 PCI: 00:19.2: enabled 0
725 07:03:06.354744 PCI: 00:1a.0: enabled 0
726 07:03:06.355189 PCI: 00:1c.0: enabled 0
727 07:03:06.358220 PCI: 00:1c.1: enabled 0
728 07:03:06.361596 PCI: 00:1c.2: enabled 0
729 07:03:06.364885 PCI: 00:1c.3: enabled 0
730 07:03:06.365326 PCI: 00:1c.4: enabled 0
731 07:03:06.367860 PCI: 00:1c.5: enabled 0
732 07:03:06.371126 PCI: 00:1c.6: enabled 0
733 07:03:06.371566 PCI: 00:1c.7: enabled 0
734 07:03:06.374444 PCI: 00:1d.0: enabled 1
735 07:03:06.377751 PCI: 00:1d.1: enabled 0
736 07:03:06.380987 PCI: 00:1d.2: enabled 0
737 07:03:06.381428 PCI: 00:1d.3: enabled 0
738 07:03:06.384761 PCI: 00:1d.4: enabled 0
739 07:03:06.388205 PCI: 00:1d.5: enabled 1
740 07:03:06.391416 PCI: 00:1e.0: enabled 1
741 07:03:06.391922 PCI: 00:1e.1: enabled 0
742 07:03:06.394964 PCI: 00:1e.2: enabled 1
743 07:03:06.397684 PCI: 00:1e.3: enabled 1
744 07:03:06.398128 PCI: 00:1f.0: enabled 1
745 07:03:06.401035 PCI: 00:1f.1: enabled 1
746 07:03:06.404721 PCI: 00:1f.2: enabled 1
747 07:03:06.407821 PCI: 00:1f.3: enabled 1
748 07:03:06.408270 PCI: 00:1f.4: enabled 1
749 07:03:06.411196 PCI: 00:1f.5: enabled 1
750 07:03:06.414416 PCI: 00:1f.6: enabled 0
751 07:03:06.417703 USB0 port 0: enabled 1
752 07:03:06.418190 I2C: 00:15: enabled 1
753 07:03:06.421352 I2C: 00:5d: enabled 1
754 07:03:06.424426 GENERIC: 0.0: enabled 1
755 07:03:06.424912 I2C: 00:1a: enabled 1
756 07:03:06.428426 I2C: 00:38: enabled 1
757 07:03:06.431474 I2C: 00:39: enabled 1
758 07:03:06.431964 I2C: 00:3a: enabled 1
759 07:03:06.434741 I2C: 00:3b: enabled 1
760 07:03:06.438535 PCI: 00:00.0: enabled 1
761 07:03:06.439119 SPI: 00: enabled 1
762 07:03:06.441035 SPI: 01: enabled 1
763 07:03:06.444815 PNP: 0c09.0: enabled 1
764 07:03:06.445371 USB2 port 0: enabled 1
765 07:03:06.447717 USB2 port 1: enabled 1
766 07:03:06.451058 USB2 port 2: enabled 0
767 07:03:06.451546 USB2 port 3: enabled 0
768 07:03:06.454063 USB2 port 5: enabled 0
769 07:03:06.457797 USB2 port 6: enabled 1
770 07:03:06.461193 USB2 port 9: enabled 1
771 07:03:06.461681 USB3 port 0: enabled 1
772 07:03:06.464472 USB3 port 1: enabled 1
773 07:03:06.467443 USB3 port 2: enabled 1
774 07:03:06.467947 USB3 port 3: enabled 1
775 07:03:06.471065 USB3 port 4: enabled 0
776 07:03:06.474457 APIC: 01: enabled 1
777 07:03:06.474936 APIC: 07: enabled 1
778 07:03:06.477615 APIC: 06: enabled 1
779 07:03:06.481013 APIC: 04: enabled 1
780 07:03:06.481455 APIC: 02: enabled 1
781 07:03:06.484033 APIC: 05: enabled 1
782 07:03:06.484573 APIC: 03: enabled 1
783 07:03:06.487911 Compare with tree...
784 07:03:06.491083 Root Device: enabled 1
785 07:03:06.494506 CPU_CLUSTER: 0: enabled 1
786 07:03:06.495013 APIC: 00: enabled 1
787 07:03:06.498081 APIC: 01: enabled 1
788 07:03:06.500828 APIC: 07: enabled 1
789 07:03:06.501270 APIC: 06: enabled 1
790 07:03:06.504425 APIC: 04: enabled 1
791 07:03:06.507393 APIC: 02: enabled 1
792 07:03:06.507837 APIC: 05: enabled 1
793 07:03:06.510877 APIC: 03: enabled 1
794 07:03:06.514741 DOMAIN: 0000: enabled 1
795 07:03:06.517535 PCI: 00:00.0: enabled 1
796 07:03:06.517978 PCI: 00:02.0: enabled 1
797 07:03:06.520914 PCI: 00:04.0: enabled 0
798 07:03:06.523913 PCI: 00:05.0: enabled 0
799 07:03:06.527725 PCI: 00:12.0: enabled 1
800 07:03:06.528258 PCI: 00:12.5: enabled 0
801 07:03:06.530659 PCI: 00:12.6: enabled 0
802 07:03:06.534070 PCI: 00:14.0: enabled 1
803 07:03:06.537857 USB0 port 0: enabled 1
804 07:03:06.540896 USB2 port 0: enabled 1
805 07:03:06.544579 USB2 port 1: enabled 1
806 07:03:06.545193 USB2 port 2: enabled 0
807 07:03:06.547667 USB2 port 3: enabled 0
808 07:03:06.550952 USB2 port 5: enabled 0
809 07:03:06.554385 USB2 port 6: enabled 1
810 07:03:06.557540 USB2 port 9: enabled 1
811 07:03:06.558025 USB3 port 0: enabled 1
812 07:03:06.560635 USB3 port 1: enabled 1
813 07:03:06.564010 USB3 port 2: enabled 1
814 07:03:06.567383 USB3 port 3: enabled 1
815 07:03:06.571078 USB3 port 4: enabled 0
816 07:03:06.571652 PCI: 00:14.1: enabled 0
817 07:03:06.574124 PCI: 00:14.3: enabled 1
818 07:03:06.577165 PCI: 00:14.5: enabled 0
819 07:03:06.580359 PCI: 00:15.0: enabled 1
820 07:03:06.583697 I2C: 00:15: enabled 1
821 07:03:06.584131 PCI: 00:15.1: enabled 1
822 07:03:06.587620 I2C: 00:5d: enabled 1
823 07:03:06.590656 GENERIC: 0.0: enabled 1
824 07:03:06.593732 PCI: 00:15.2: enabled 0
825 07:03:06.596992 PCI: 00:15.3: enabled 0
826 07:03:06.597504 PCI: 00:16.0: enabled 1
827 07:03:06.600754 PCI: 00:16.1: enabled 0
828 07:03:06.604111 PCI: 00:16.2: enabled 0
829 07:03:06.607188 PCI: 00:16.3: enabled 0
830 07:03:06.610246 PCI: 00:16.4: enabled 0
831 07:03:06.610684 PCI: 00:16.5: enabled 0
832 07:03:06.613677 PCI: 00:17.0: enabled 1
833 07:03:06.616930 PCI: 00:19.0: enabled 1
834 07:03:06.621034 I2C: 00:1a: enabled 1
835 07:03:06.621476 I2C: 00:38: enabled 1
836 07:03:06.623747 I2C: 00:39: enabled 1
837 07:03:06.626928 I2C: 00:3a: enabled 1
838 07:03:06.630121 I2C: 00:3b: enabled 1
839 07:03:06.633453 PCI: 00:19.1: enabled 0
840 07:03:06.633913 PCI: 00:19.2: enabled 0
841 07:03:06.637184 PCI: 00:1a.0: enabled 0
842 07:03:06.640641 PCI: 00:1c.0: enabled 0
843 07:03:06.643646 PCI: 00:1c.1: enabled 0
844 07:03:06.644160 PCI: 00:1c.2: enabled 0
845 07:03:06.647035 PCI: 00:1c.3: enabled 0
846 07:03:06.650075 PCI: 00:1c.4: enabled 0
847 07:03:06.653769 PCI: 00:1c.5: enabled 0
848 07:03:06.657001 PCI: 00:1c.6: enabled 0
849 07:03:06.657451 PCI: 00:1c.7: enabled 0
850 07:03:06.660588 PCI: 00:1d.0: enabled 1
851 07:03:06.663897 PCI: 00:1d.1: enabled 0
852 07:03:06.667188 PCI: 00:1d.2: enabled 0
853 07:03:06.670978 PCI: 00:1d.3: enabled 0
854 07:03:06.671533 PCI: 00:1d.4: enabled 0
855 07:03:06.673717 PCI: 00:1d.5: enabled 1
856 07:03:06.676826 PCI: 00:00.0: enabled 1
857 07:03:06.680443 PCI: 00:1e.0: enabled 1
858 07:03:06.684012 PCI: 00:1e.1: enabled 0
859 07:03:06.684593 PCI: 00:1e.2: enabled 1
860 07:03:06.687036 SPI: 00: enabled 1
861 07:03:06.690352 PCI: 00:1e.3: enabled 1
862 07:03:06.690941 SPI: 01: enabled 1
863 07:03:06.693395 PCI: 00:1f.0: enabled 1
864 07:03:06.696898 PNP: 0c09.0: enabled 1
865 07:03:06.700006 PCI: 00:1f.1: enabled 1
866 07:03:06.703772 PCI: 00:1f.2: enabled 1
867 07:03:06.704224 PCI: 00:1f.3: enabled 1
868 07:03:06.706721 PCI: 00:1f.4: enabled 1
869 07:03:06.710193 PCI: 00:1f.5: enabled 1
870 07:03:06.713570 PCI: 00:1f.6: enabled 0
871 07:03:06.716542 Root Device scanning...
872 07:03:06.720211 scan_static_bus for Root Device
873 07:03:06.720707 CPU_CLUSTER: 0 enabled
874 07:03:06.723305 DOMAIN: 0000 enabled
875 07:03:06.726464 DOMAIN: 0000 scanning...
876 07:03:06.730304 PCI: pci_scan_bus for bus 00
877 07:03:06.733412 PCI: 00:00.0 [8086/0000] ops
878 07:03:06.736851 PCI: 00:00.0 [8086/9b61] enabled
879 07:03:06.740138 PCI: 00:02.0 [8086/0000] bus ops
880 07:03:06.743093 PCI: 00:02.0 [8086/9b41] enabled
881 07:03:06.746560 PCI: 00:04.0 [8086/1903] disabled
882 07:03:06.749901 PCI: 00:08.0 [8086/1911] enabled
883 07:03:06.753009 PCI: 00:12.0 [8086/02f9] enabled
884 07:03:06.756524 PCI: 00:14.0 [8086/0000] bus ops
885 07:03:06.760095 PCI: 00:14.0 [8086/02ed] enabled
886 07:03:06.763171 PCI: 00:14.2 [8086/02ef] enabled
887 07:03:06.766612 PCI: 00:14.3 [8086/02f0] enabled
888 07:03:06.770444 PCI: 00:15.0 [8086/0000] bus ops
889 07:03:06.773413 PCI: 00:15.0 [8086/02e8] enabled
890 07:03:06.776513 PCI: 00:15.1 [8086/0000] bus ops
891 07:03:06.779820 PCI: 00:15.1 [8086/02e9] enabled
892 07:03:06.783310 PCI: 00:16.0 [8086/0000] ops
893 07:03:06.786600 PCI: 00:16.0 [8086/02e0] enabled
894 07:03:06.787043 PCI: 00:17.0 [8086/0000] ops
895 07:03:06.790070 PCI: 00:17.0 [8086/02d3] enabled
896 07:03:06.793279 PCI: 00:19.0 [8086/0000] bus ops
897 07:03:06.796558 PCI: 00:19.0 [8086/02c5] enabled
898 07:03:06.799698 PCI: 00:1d.0 [8086/0000] bus ops
899 07:03:06.803288 PCI: 00:1d.0 [8086/02b0] enabled
900 07:03:06.809558 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 07:03:06.812989 PCI: 00:1e.0 [8086/0000] ops
902 07:03:06.816218 PCI: 00:1e.0 [8086/02a8] enabled
903 07:03:06.819650 PCI: 00:1e.2 [8086/0000] bus ops
904 07:03:06.822709 PCI: 00:1e.2 [8086/02aa] enabled
905 07:03:06.826440 PCI: 00:1e.3 [8086/0000] bus ops
906 07:03:06.829931 PCI: 00:1e.3 [8086/02ab] enabled
907 07:03:06.833229 PCI: 00:1f.0 [8086/0000] bus ops
908 07:03:06.836612 PCI: 00:1f.0 [8086/0284] enabled
909 07:03:06.842770 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 07:03:06.846172 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 07:03:06.849929 PCI: 00:1f.3 [8086/0000] bus ops
912 07:03:06.852721 PCI: 00:1f.3 [8086/02c8] enabled
913 07:03:06.856154 PCI: 00:1f.4 [8086/0000] bus ops
914 07:03:06.859493 PCI: 00:1f.4 [8086/02a3] enabled
915 07:03:06.863234 PCI: 00:1f.5 [8086/0000] bus ops
916 07:03:06.866304 PCI: 00:1f.5 [8086/02a4] enabled
917 07:03:06.869389 PCI: Leftover static devices:
918 07:03:06.873003 PCI: 00:05.0
919 07:03:06.873445 PCI: 00:12.5
920 07:03:06.876212 PCI: 00:12.6
921 07:03:06.876702 PCI: 00:14.1
922 07:03:06.877055 PCI: 00:14.5
923 07:03:06.879443 PCI: 00:15.2
924 07:03:06.879886 PCI: 00:15.3
925 07:03:06.883197 PCI: 00:16.1
926 07:03:06.883740 PCI: 00:16.2
927 07:03:06.884097 PCI: 00:16.3
928 07:03:06.886106 PCI: 00:16.4
929 07:03:06.886545 PCI: 00:16.5
930 07:03:06.889755 PCI: 00:19.1
931 07:03:06.890197 PCI: 00:19.2
932 07:03:06.892829 PCI: 00:1a.0
933 07:03:06.893421 PCI: 00:1c.0
934 07:03:06.893805 PCI: 00:1c.1
935 07:03:06.895929 PCI: 00:1c.2
936 07:03:06.896388 PCI: 00:1c.3
937 07:03:06.899421 PCI: 00:1c.4
938 07:03:06.899937 PCI: 00:1c.5
939 07:03:06.900292 PCI: 00:1c.6
940 07:03:06.902581 PCI: 00:1c.7
941 07:03:06.903020 PCI: 00:1d.1
942 07:03:06.906382 PCI: 00:1d.2
943 07:03:06.906824 PCI: 00:1d.3
944 07:03:06.907171 PCI: 00:1d.4
945 07:03:06.909533 PCI: 00:1d.5
946 07:03:06.909985 PCI: 00:1e.1
947 07:03:06.912609 PCI: 00:1f.1
948 07:03:06.913208 PCI: 00:1f.2
949 07:03:06.913609 PCI: 00:1f.6
950 07:03:06.916226 PCI: Check your devicetree.cb.
951 07:03:06.919356 PCI: 00:02.0 scanning...
952 07:03:06.923121 scan_generic_bus for PCI: 00:02.0
953 07:03:06.926566 scan_generic_bus for PCI: 00:02.0 done
954 07:03:06.932689 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
955 07:03:06.935811 PCI: 00:14.0 scanning...
956 07:03:06.939356 scan_static_bus for PCI: 00:14.0
957 07:03:06.942741 USB0 port 0 enabled
958 07:03:06.943191 USB0 port 0 scanning...
959 07:03:06.946435 scan_static_bus for USB0 port 0
960 07:03:06.949370 USB2 port 0 enabled
961 07:03:06.952559 USB2 port 1 enabled
962 07:03:06.953005 USB2 port 2 disabled
963 07:03:06.955988 USB2 port 3 disabled
964 07:03:06.959024 USB2 port 5 disabled
965 07:03:06.959476 USB2 port 6 enabled
966 07:03:06.962895 USB2 port 9 enabled
967 07:03:06.963455 USB3 port 0 enabled
968 07:03:06.966032 USB3 port 1 enabled
969 07:03:06.969381 USB3 port 2 enabled
970 07:03:06.969823 USB3 port 3 enabled
971 07:03:06.972281 USB3 port 4 disabled
972 07:03:06.976142 USB2 port 0 scanning...
973 07:03:06.979160 scan_static_bus for USB2 port 0
974 07:03:06.982404 scan_static_bus for USB2 port 0 done
975 07:03:06.985376 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
976 07:03:06.988839 USB2 port 1 scanning...
977 07:03:06.992293 scan_static_bus for USB2 port 1
978 07:03:06.995818 scan_static_bus for USB2 port 1 done
979 07:03:07.001976 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
980 07:03:07.005655 USB2 port 6 scanning...
981 07:03:07.008896 scan_static_bus for USB2 port 6
982 07:03:07.012744 scan_static_bus for USB2 port 6 done
983 07:03:07.018952 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
984 07:03:07.019434 USB2 port 9 scanning...
985 07:03:07.022131 scan_static_bus for USB2 port 9
986 07:03:07.025761 scan_static_bus for USB2 port 9 done
987 07:03:07.032229 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
988 07:03:07.035543 USB3 port 0 scanning...
989 07:03:07.038893 scan_static_bus for USB3 port 0
990 07:03:07.042344 scan_static_bus for USB3 port 0 done
991 07:03:07.048901 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
992 07:03:07.049373 USB3 port 1 scanning...
993 07:03:07.051747 scan_static_bus for USB3 port 1
994 07:03:07.055310 scan_static_bus for USB3 port 1 done
995 07:03:07.062111 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
996 07:03:07.065341 USB3 port 2 scanning...
997 07:03:07.068713 scan_static_bus for USB3 port 2
998 07:03:07.071713 scan_static_bus for USB3 port 2 done
999 07:03:07.079070 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
1000 07:03:07.079541 USB3 port 3 scanning...
1001 07:03:07.082087 scan_static_bus for USB3 port 3
1002 07:03:07.085669 scan_static_bus for USB3 port 3 done
1003 07:03:07.091970 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1004 07:03:07.095200 scan_static_bus for USB0 port 0 done
1005 07:03:07.101958 scan_bus: scanning of bus USB0 port 0 took 155473 usecs
1006 07:03:07.105256 scan_static_bus for PCI: 00:14.0 done
1007 07:03:07.111749 scan_bus: scanning of bus PCI: 00:14.0 took 173138 usecs
1008 07:03:07.112224 PCI: 00:15.0 scanning...
1009 07:03:07.118428 scan_generic_bus for PCI: 00:15.0
1010 07:03:07.121826 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 07:03:07.125126 scan_generic_bus for PCI: 00:15.0 done
1012 07:03:07.131937 scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs
1013 07:03:07.132619 PCI: 00:15.1 scanning...
1014 07:03:07.138648 scan_generic_bus for PCI: 00:15.1
1015 07:03:07.141885 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 07:03:07.145298 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 07:03:07.148445 scan_generic_bus for PCI: 00:15.1 done
1018 07:03:07.155044 scan_bus: scanning of bus PCI: 00:15.1 took 18616 usecs
1019 07:03:07.158551 PCI: 00:19.0 scanning...
1020 07:03:07.161886 scan_generic_bus for PCI: 00:19.0
1021 07:03:07.165070 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 07:03:07.168167 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 07:03:07.171902 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 07:03:07.178169 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 07:03:07.181623 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 07:03:07.184930 scan_generic_bus for PCI: 00:19.0 done
1027 07:03:07.190961 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
1028 07:03:07.194241 PCI: 00:1d.0 scanning...
1029 07:03:07.198031 do_pci_scan_bridge for PCI: 00:1d.0
1030 07:03:07.200894 PCI: pci_scan_bus for bus 01
1031 07:03:07.204521 PCI: 01:00.0 [1c5c/1327] enabled
1032 07:03:07.207834 Enabling Common Clock Configuration
1033 07:03:07.210826 L1 Sub-State supported from root port 29
1034 07:03:07.214221 L1 Sub-State Support = 0xf
1035 07:03:07.217589 CommonModeRestoreTime = 0x28
1036 07:03:07.221130 Power On Value = 0x16, Power On Scale = 0x0
1037 07:03:07.224410 ASPM: Enabled L1
1038 07:03:07.227583 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1039 07:03:07.231071 PCI: 00:1e.2 scanning...
1040 07:03:07.234421 scan_generic_bus for PCI: 00:1e.2
1041 07:03:07.237641 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 07:03:07.244282 scan_generic_bus for PCI: 00:1e.2 done
1043 07:03:07.247526 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1044 07:03:07.250856 PCI: 00:1e.3 scanning...
1045 07:03:07.254604 scan_generic_bus for PCI: 00:1e.3
1046 07:03:07.257511 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 07:03:07.261065 scan_generic_bus for PCI: 00:1e.3 done
1048 07:03:07.267470 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1049 07:03:07.271160 PCI: 00:1f.0 scanning...
1050 07:03:07.274427 scan_static_bus for PCI: 00:1f.0
1051 07:03:07.277288 PNP: 0c09.0 enabled
1052 07:03:07.281150 scan_static_bus for PCI: 00:1f.0 done
1053 07:03:07.284458 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1054 07:03:07.287962 PCI: 00:1f.3 scanning...
1055 07:03:07.294853 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1056 07:03:07.297849 PCI: 00:1f.4 scanning...
1057 07:03:07.301151 scan_generic_bus for PCI: 00:1f.4
1058 07:03:07.304397 scan_generic_bus for PCI: 00:1f.4 done
1059 07:03:07.311133 scan_bus: scanning of bus PCI: 00:1f.4 took 10180 usecs
1060 07:03:07.311649 PCI: 00:1f.5 scanning...
1061 07:03:07.314406 scan_generic_bus for PCI: 00:1f.5
1062 07:03:07.321078 scan_generic_bus for PCI: 00:1f.5 done
1063 07:03:07.324681 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1064 07:03:07.331315 scan_bus: scanning of bus DOMAIN: 0000 took 605257 usecs
1065 07:03:07.334767 scan_static_bus for Root Device done
1066 07:03:07.341082 scan_bus: scanning of bus Root Device took 625134 usecs
1067 07:03:07.341633 done
1068 07:03:07.344787 Chrome EC: UHEPI supported
1069 07:03:07.350790 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 07:03:07.357569 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 07:03:07.360594 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 07:03:07.368789 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 07:03:07.371914 SPI flash protection: WPSW=0 SRP0=0
1074 07:03:07.378565 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 07:03:07.381971 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1076 07:03:07.385307 found VGA at PCI: 00:02.0
1077 07:03:07.388474 Setting up VGA for PCI: 00:02.0
1078 07:03:07.395242 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 07:03:07.398556 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 07:03:07.401753 Allocating resources...
1081 07:03:07.405038 Reading resources...
1082 07:03:07.408141 Root Device read_resources bus 0 link: 0
1083 07:03:07.411888 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 07:03:07.418549 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 07:03:07.421669 DOMAIN: 0000 read_resources bus 0 link: 0
1086 07:03:07.428988 PCI: 00:14.0 read_resources bus 0 link: 0
1087 07:03:07.432183 USB0 port 0 read_resources bus 0 link: 0
1088 07:03:07.440248 USB0 port 0 read_resources bus 0 link: 0 done
1089 07:03:07.443509 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 07:03:07.451094 PCI: 00:15.0 read_resources bus 1 link: 0
1091 07:03:07.454233 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 07:03:07.461274 PCI: 00:15.1 read_resources bus 2 link: 0
1093 07:03:07.464276 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 07:03:07.471689 PCI: 00:19.0 read_resources bus 3 link: 0
1095 07:03:07.478098 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 07:03:07.481552 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 07:03:07.488691 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 07:03:07.491735 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 07:03:07.498192 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 07:03:07.501504 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 07:03:07.508242 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 07:03:07.511786 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 07:03:07.518401 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 07:03:07.521796 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 07:03:07.528509 Root Device read_resources bus 0 link: 0 done
1106 07:03:07.532672 Done reading resources.
1107 07:03:07.535169 Show resources in subtree (Root Device)...After reading.
1108 07:03:07.542195 Root Device child on link 0 CPU_CLUSTER: 0
1109 07:03:07.545312 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 07:03:07.545757 APIC: 00
1111 07:03:07.548776 APIC: 01
1112 07:03:07.549219 APIC: 07
1113 07:03:07.549572 APIC: 06
1114 07:03:07.552027 APIC: 04
1115 07:03:07.552507 APIC: 02
1116 07:03:07.555080 APIC: 05
1117 07:03:07.555608 APIC: 03
1118 07:03:07.558666 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 07:03:07.568920 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 07:03:07.624975 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 07:03:07.625641 PCI: 00:00.0
1122 07:03:07.626420 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 07:03:07.626845 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 07:03:07.627220 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 07:03:07.628010 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 07:03:07.651606 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 07:03:07.652249 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 07:03:07.653086 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 07:03:07.655288 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 07:03:07.665447 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 07:03:07.672119 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 07:03:07.681667 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 07:03:07.691455 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 07:03:07.701907 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 07:03:07.711648 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 07:03:07.721610 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 07:03:07.732087 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 07:03:07.732757 PCI: 00:02.0
1139 07:03:07.741289 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 07:03:07.751250 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 07:03:07.761247 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 07:03:07.761781 PCI: 00:04.0
1143 07:03:07.764583 PCI: 00:08.0
1144 07:03:07.774381 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 07:03:07.774885 PCI: 00:12.0
1146 07:03:07.784450 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 07:03:07.791066 PCI: 00:14.0 child on link 0 USB0 port 0
1148 07:03:07.801613 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 07:03:07.804439 USB0 port 0 child on link 0 USB2 port 0
1150 07:03:07.804886 USB2 port 0
1151 07:03:07.807382 USB2 port 1
1152 07:03:07.811003 USB2 port 2
1153 07:03:07.811419 USB2 port 3
1154 07:03:07.814615 USB2 port 5
1155 07:03:07.815060 USB2 port 6
1156 07:03:07.817505 USB2 port 9
1157 07:03:07.817974 USB3 port 0
1158 07:03:07.820846 USB3 port 1
1159 07:03:07.821290 USB3 port 2
1160 07:03:07.824220 USB3 port 3
1161 07:03:07.824744 USB3 port 4
1162 07:03:07.827628 PCI: 00:14.2
1163 07:03:07.837264 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 07:03:07.846773 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 07:03:07.846861 PCI: 00:14.3
1166 07:03:07.857150 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 07:03:07.863732 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 07:03:07.873733 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:03:07.873821 I2C: 01:15
1170 07:03:07.877129 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 07:03:07.886849 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 07:03:07.890119 I2C: 02:5d
1173 07:03:07.890204 GENERIC: 0.0
1174 07:03:07.893939 PCI: 00:16.0
1175 07:03:07.903586 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 07:03:07.903673 PCI: 00:17.0
1177 07:03:07.913577 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 07:03:07.923402 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 07:03:07.929857 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 07:03:07.940246 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 07:03:07.946432 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 07:03:07.956651 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 07:03:07.959947 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 07:03:07.969822 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 07:03:07.973314 I2C: 03:1a
1186 07:03:07.973400 I2C: 03:38
1187 07:03:07.976503 I2C: 03:39
1188 07:03:07.976589 I2C: 03:3a
1189 07:03:07.979991 I2C: 03:3b
1190 07:03:07.983145 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 07:03:07.993117 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 07:03:08.003917 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 07:03:08.009820 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 07:03:08.013438 PCI: 01:00.0
1195 07:03:08.023058 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 07:03:08.023220 PCI: 00:1e.0
1197 07:03:08.036615 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 07:03:08.046818 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 07:03:08.050150 PCI: 00:1e.2 child on link 0 SPI: 00
1200 07:03:08.059721 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 07:03:08.060221 SPI: 00
1202 07:03:08.063184 PCI: 00:1e.3 child on link 0 SPI: 01
1203 07:03:08.073072 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 07:03:08.076433 SPI: 01
1205 07:03:08.079782 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 07:03:08.089708 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 07:03:08.096415 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 07:03:08.099645 PNP: 0c09.0
1209 07:03:08.109643 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 07:03:08.110143 PCI: 00:1f.3
1211 07:03:08.119644 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 07:03:08.129202 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 07:03:08.132687 PCI: 00:1f.4
1214 07:03:08.139589 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 07:03:08.149164 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 07:03:08.152546 PCI: 00:1f.5
1217 07:03:08.162546 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 07:03:08.168855 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 07:03:08.172248 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 07:03:08.178875 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 07:03:08.185895 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 07:03:08.189518 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 07:03:08.192387 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 07:03:08.195789 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 07:03:08.202019 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 07:03:08.208768 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 07:03:08.215380 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 07:03:08.225512 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 07:03:08.232431 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 07:03:08.235250 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 07:03:08.242124 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 07:03:08.249060 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 07:03:08.251935 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 07:03:08.258339 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 07:03:08.262421 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 07:03:08.268992 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 07:03:08.272103 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 07:03:08.278518 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 07:03:08.282062 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 07:03:08.285277 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 07:03:08.292292 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 07:03:08.295324 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 07:03:08.301948 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 07:03:08.305411 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 07:03:08.311574 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 07:03:08.315084 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 07:03:08.321411 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 07:03:08.325474 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 07:03:08.331488 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 07:03:08.334714 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 07:03:08.341587 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 07:03:08.344726 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 07:03:08.351138 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 07:03:08.354549 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 07:03:08.364685 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 07:03:08.367952 avoid_fixed_resources: DOMAIN: 0000
1257 07:03:08.374564 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 07:03:08.377806 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 07:03:08.387574 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 07:03:08.394309 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 07:03:08.400911 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 07:03:08.411120 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 07:03:08.417685 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 07:03:08.424230 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 07:03:08.430640 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 07:03:08.440729 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 07:03:08.447162 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 07:03:08.453937 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 07:03:08.457431 Setting resources...
1270 07:03:08.463999 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 07:03:08.467338 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 07:03:08.470297 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 07:03:08.474099 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 07:03:08.480087 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 07:03:08.483894 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 07:03:08.490528 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 07:03:08.497560 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 07:03:08.506916 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 07:03:08.510122 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 07:03:08.517654 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 07:03:08.520127 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 07:03:08.523767 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 07:03:08.530541 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 07:03:08.533431 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 07:03:08.540448 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 07:03:08.543563 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 07:03:08.550581 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 07:03:08.553702 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 07:03:08.560441 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 07:03:08.563284 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 07:03:08.570043 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 07:03:08.573794 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 07:03:08.580496 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 07:03:08.583705 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 07:03:08.586958 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 07:03:08.593516 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 07:03:08.597159 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 07:03:08.603291 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 07:03:08.606969 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 07:03:08.613618 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 07:03:08.616976 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 07:03:08.623673 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 07:03:08.633528 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 07:03:08.640040 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 07:03:08.646603 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 07:03:08.653256 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 07:03:08.659683 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 07:03:08.663089 Root Device assign_resources, bus 0 link: 0
1309 07:03:08.669988 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 07:03:08.676666 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 07:03:08.686989 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 07:03:08.693391 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 07:03:08.702947 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 07:03:08.709693 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 07:03:08.719562 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 07:03:08.722912 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 07:03:08.726281 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 07:03:08.736102 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 07:03:08.742677 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 07:03:08.752874 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 07:03:08.759482 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 07:03:08.765918 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 07:03:08.769416 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 07:03:08.779613 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 07:03:08.782695 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 07:03:08.786215 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 07:03:08.796362 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 07:03:08.802989 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 07:03:08.812416 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 07:03:08.819281 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 07:03:08.826365 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 07:03:08.836214 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 07:03:08.842765 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 07:03:08.848883 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 07:03:08.856180 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 07:03:08.858784 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 07:03:08.868989 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 07:03:08.875429 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 07:03:08.885420 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 07:03:08.888874 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 07:03:08.898663 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 07:03:08.902416 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 07:03:08.911893 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 07:03:08.918443 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 07:03:08.925267 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 07:03:08.928768 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 07:03:08.938638 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 07:03:08.941893 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 07:03:08.945031 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 07:03:08.951758 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 07:03:08.954948 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 07:03:08.961603 LPC: Trying to open IO window from 800 size 1ff
1353 07:03:08.968621 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 07:03:08.978201 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 07:03:08.984622 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 07:03:08.994594 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 07:03:08.997893 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 07:03:09.004829 Root Device assign_resources, bus 0 link: 0
1359 07:03:09.005477 Done setting resources.
1360 07:03:09.011147 Show resources in subtree (Root Device)...After assigning values.
1361 07:03:09.018215 Root Device child on link 0 CPU_CLUSTER: 0
1362 07:03:09.021303 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 07:03:09.021886 APIC: 00
1364 07:03:09.024399 APIC: 01
1365 07:03:09.024889 APIC: 07
1366 07:03:09.025271 APIC: 06
1367 07:03:09.027681 APIC: 04
1368 07:03:09.028155 APIC: 02
1369 07:03:09.031342 APIC: 05
1370 07:03:09.031945 APIC: 03
1371 07:03:09.034370 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 07:03:09.044473 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 07:03:09.057637 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 07:03:09.058187 PCI: 00:00.0
1375 07:03:09.067322 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 07:03:09.077826 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 07:03:09.087230 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 07:03:09.093717 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 07:03:09.103769 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 07:03:09.113619 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 07:03:09.123672 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 07:03:09.133173 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 07:03:09.143467 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 07:03:09.150003 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 07:03:09.160393 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 07:03:09.170122 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 07:03:09.179763 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 07:03:09.189775 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 07:03:09.200084 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 07:03:09.206653 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 07:03:09.209637 PCI: 00:02.0
1392 07:03:09.219389 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 07:03:09.229244 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 07:03:09.239662 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 07:03:09.243001 PCI: 00:04.0
1396 07:03:09.243586 PCI: 00:08.0
1397 07:03:09.252904 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 07:03:09.255664 PCI: 00:12.0
1399 07:03:09.265922 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 07:03:09.268921 PCI: 00:14.0 child on link 0 USB0 port 0
1401 07:03:09.279098 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 07:03:09.285824 USB0 port 0 child on link 0 USB2 port 0
1403 07:03:09.286420 USB2 port 0
1404 07:03:09.289020 USB2 port 1
1405 07:03:09.289513 USB2 port 2
1406 07:03:09.292383 USB2 port 3
1407 07:03:09.293007 USB2 port 5
1408 07:03:09.295686 USB2 port 6
1409 07:03:09.296274 USB2 port 9
1410 07:03:09.299350 USB3 port 0
1411 07:03:09.299942 USB3 port 1
1412 07:03:09.302403 USB3 port 2
1413 07:03:09.305729 USB3 port 3
1414 07:03:09.306318 USB3 port 4
1415 07:03:09.309048 PCI: 00:14.2
1416 07:03:09.319039 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 07:03:09.328585 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 07:03:09.329198 PCI: 00:14.3
1419 07:03:09.338642 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 07:03:09.345235 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 07:03:09.355201 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 07:03:09.355871 I2C: 01:15
1423 07:03:09.361835 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 07:03:09.371812 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 07:03:09.372469 I2C: 02:5d
1426 07:03:09.375552 GENERIC: 0.0
1427 07:03:09.376135 PCI: 00:16.0
1428 07:03:09.385272 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 07:03:09.388608 PCI: 00:17.0
1430 07:03:09.398200 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 07:03:09.407831 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 07:03:09.418094 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 07:03:09.424208 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 07:03:09.434823 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 07:03:09.444484 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 07:03:09.451314 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 07:03:09.461164 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 07:03:09.461732 I2C: 03:1a
1439 07:03:09.463962 I2C: 03:38
1440 07:03:09.464610 I2C: 03:39
1441 07:03:09.467406 I2C: 03:3a
1442 07:03:09.467895 I2C: 03:3b
1443 07:03:09.470854 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 07:03:09.480528 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 07:03:09.491140 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 07:03:09.500690 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 07:03:09.504245 PCI: 01:00.0
1448 07:03:09.514033 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 07:03:09.517207 PCI: 00:1e.0
1450 07:03:09.526703 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 07:03:09.537009 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 07:03:09.540232 PCI: 00:1e.2 child on link 0 SPI: 00
1453 07:03:09.550429 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 07:03:09.553421 SPI: 00
1455 07:03:09.556572 PCI: 00:1e.3 child on link 0 SPI: 01
1456 07:03:09.566670 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 07:03:09.570465 SPI: 01
1458 07:03:09.573604 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 07:03:09.579891 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 07:03:09.589526 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 07:03:09.592923 PNP: 0c09.0
1462 07:03:09.599762 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 07:03:09.603216 PCI: 00:1f.3
1464 07:03:09.613046 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 07:03:09.622867 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 07:03:09.626351 PCI: 00:1f.4
1467 07:03:09.633018 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 07:03:09.643115 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 07:03:09.646193 PCI: 00:1f.5
1470 07:03:09.655530 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 07:03:09.659308 Done allocating resources.
1472 07:03:09.665467 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 07:03:09.666084 Enabling resources...
1474 07:03:09.672808 PCI: 00:00.0 subsystem <- 8086/9b61
1475 07:03:09.673300 PCI: 00:00.0 cmd <- 06
1476 07:03:09.676291 PCI: 00:02.0 subsystem <- 8086/9b41
1477 07:03:09.679526 PCI: 00:02.0 cmd <- 03
1478 07:03:09.682941 PCI: 00:08.0 cmd <- 06
1479 07:03:09.686523 PCI: 00:12.0 subsystem <- 8086/02f9
1480 07:03:09.689431 PCI: 00:12.0 cmd <- 02
1481 07:03:09.692772 PCI: 00:14.0 subsystem <- 8086/02ed
1482 07:03:09.696000 PCI: 00:14.0 cmd <- 02
1483 07:03:09.699438 PCI: 00:14.2 cmd <- 02
1484 07:03:09.702849 PCI: 00:14.3 subsystem <- 8086/02f0
1485 07:03:09.703404 PCI: 00:14.3 cmd <- 02
1486 07:03:09.709536 PCI: 00:15.0 subsystem <- 8086/02e8
1487 07:03:09.710097 PCI: 00:15.0 cmd <- 02
1488 07:03:09.712829 PCI: 00:15.1 subsystem <- 8086/02e9
1489 07:03:09.716056 PCI: 00:15.1 cmd <- 02
1490 07:03:09.719302 PCI: 00:16.0 subsystem <- 8086/02e0
1491 07:03:09.722990 PCI: 00:16.0 cmd <- 02
1492 07:03:09.725972 PCI: 00:17.0 subsystem <- 8086/02d3
1493 07:03:09.729287 PCI: 00:17.0 cmd <- 03
1494 07:03:09.732832 PCI: 00:19.0 subsystem <- 8086/02c5
1495 07:03:09.736449 PCI: 00:19.0 cmd <- 02
1496 07:03:09.739352 PCI: 00:1d.0 bridge ctrl <- 0013
1497 07:03:09.742562 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 07:03:09.745782 PCI: 00:1d.0 cmd <- 06
1499 07:03:09.749029 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 07:03:09.752626 PCI: 00:1e.0 cmd <- 06
1501 07:03:09.755899 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 07:03:09.756446 PCI: 00:1e.2 cmd <- 06
1503 07:03:09.762587 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 07:03:09.763036 PCI: 00:1e.3 cmd <- 02
1505 07:03:09.765844 PCI: 00:1f.0 subsystem <- 8086/0284
1506 07:03:09.769686 PCI: 00:1f.0 cmd <- 407
1507 07:03:09.772526 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 07:03:09.776182 PCI: 00:1f.3 cmd <- 02
1509 07:03:09.779500 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 07:03:09.782954 PCI: 00:1f.4 cmd <- 03
1511 07:03:09.786699 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 07:03:09.789185 PCI: 00:1f.5 cmd <- 406
1513 07:03:09.797924 PCI: 01:00.0 cmd <- 02
1514 07:03:09.803642 done.
1515 07:03:09.816656 ME: Version: 14.0.39.1367
1516 07:03:09.823420 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1517 07:03:09.826254 Initializing devices...
1518 07:03:09.826768 Root Device init ...
1519 07:03:09.832982 Chrome EC: Set SMI mask to 0x0000000000000000
1520 07:03:09.836373 Chrome EC: clear events_b mask to 0x0000000000000000
1521 07:03:09.843109 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 07:03:09.849768 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 07:03:09.855922 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 07:03:09.859063 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 07:03:09.863001 Root Device init finished in 35152 usecs
1526 07:03:09.866306 CPU_CLUSTER: 0 init ...
1527 07:03:09.872950 CPU_CLUSTER: 0 init finished in 2446 usecs
1528 07:03:09.877177 PCI: 00:00.0 init ...
1529 07:03:09.880412 CPU TDP: 15 Watts
1530 07:03:09.883373 CPU PL2 = 64 Watts
1531 07:03:09.886977 PCI: 00:00.0 init finished in 7078 usecs
1532 07:03:09.890234 PCI: 00:02.0 init ...
1533 07:03:09.893705 PCI: 00:02.0 init finished in 2243 usecs
1534 07:03:09.897015 PCI: 00:08.0 init ...
1535 07:03:09.900113 PCI: 00:08.0 init finished in 2252 usecs
1536 07:03:09.903614 PCI: 00:12.0 init ...
1537 07:03:09.906793 PCI: 00:12.0 init finished in 2251 usecs
1538 07:03:09.910341 PCI: 00:14.0 init ...
1539 07:03:09.913461 PCI: 00:14.0 init finished in 2253 usecs
1540 07:03:09.916659 PCI: 00:14.2 init ...
1541 07:03:09.920561 PCI: 00:14.2 init finished in 2253 usecs
1542 07:03:09.923332 PCI: 00:14.3 init ...
1543 07:03:09.926748 PCI: 00:14.3 init finished in 2270 usecs
1544 07:03:09.929940 PCI: 00:15.0 init ...
1545 07:03:09.933370 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 07:03:09.936953 PCI: 00:15.0 init finished in 5977 usecs
1547 07:03:09.939923 PCI: 00:15.1 init ...
1548 07:03:09.943570 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 07:03:09.949868 PCI: 00:15.1 init finished in 5976 usecs
1550 07:03:09.950383 PCI: 00:16.0 init ...
1551 07:03:09.956129 PCI: 00:16.0 init finished in 2252 usecs
1552 07:03:09.959564 PCI: 00:19.0 init ...
1553 07:03:09.963211 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 07:03:09.966430 PCI: 00:19.0 init finished in 5973 usecs
1555 07:03:09.969518 PCI: 00:1d.0 init ...
1556 07:03:09.972928 Initializing PCH PCIe bridge.
1557 07:03:09.976382 PCI: 00:1d.0 init finished in 5282 usecs
1558 07:03:09.979361 PCI: 00:1f.0 init ...
1559 07:03:09.982569 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 07:03:09.989455 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 07:03:09.989918 IOAPIC: ID = 0x02
1562 07:03:09.992794 IOAPIC: Dumping registers
1563 07:03:09.996010 reg 0x0000: 0x02000000
1564 07:03:09.999317 reg 0x0001: 0x00770020
1565 07:03:09.999754 reg 0x0002: 0x00000000
1566 07:03:10.006249 PCI: 00:1f.0 init finished in 23537 usecs
1567 07:03:10.009713 PCI: 00:1f.4 init ...
1568 07:03:10.012658 PCI: 00:1f.4 init finished in 2261 usecs
1569 07:03:10.023487 PCI: 01:00.0 init ...
1570 07:03:10.026424 PCI: 01:00.0 init finished in 2253 usecs
1571 07:03:10.030497 PNP: 0c09.0 init ...
1572 07:03:10.033673 Google Chrome EC uptime: 11.096 seconds
1573 07:03:10.040957 Google Chrome AP resets since EC boot: 0
1574 07:03:10.043917 Google Chrome most recent AP reset causes:
1575 07:03:10.050300 Google Chrome EC reset flags at last EC boot: reset-pin
1576 07:03:10.053817 PNP: 0c09.0 init finished in 20605 usecs
1577 07:03:10.056901 Devices initialized
1578 07:03:10.060175 Show all devs... After init.
1579 07:03:10.060673 Root Device: enabled 1
1580 07:03:10.063893 CPU_CLUSTER: 0: enabled 1
1581 07:03:10.067168 DOMAIN: 0000: enabled 1
1582 07:03:10.067666 APIC: 00: enabled 1
1583 07:03:10.070981 PCI: 00:00.0: enabled 1
1584 07:03:10.073608 PCI: 00:02.0: enabled 1
1585 07:03:10.076745 PCI: 00:04.0: enabled 0
1586 07:03:10.077255 PCI: 00:05.0: enabled 0
1587 07:03:10.080164 PCI: 00:12.0: enabled 1
1588 07:03:10.083788 PCI: 00:12.5: enabled 0
1589 07:03:10.087032 PCI: 00:12.6: enabled 0
1590 07:03:10.087478 PCI: 00:14.0: enabled 1
1591 07:03:10.090623 PCI: 00:14.1: enabled 0
1592 07:03:10.093469 PCI: 00:14.3: enabled 1
1593 07:03:10.093906 PCI: 00:14.5: enabled 0
1594 07:03:10.097469 PCI: 00:15.0: enabled 1
1595 07:03:10.100168 PCI: 00:15.1: enabled 1
1596 07:03:10.103192 PCI: 00:15.2: enabled 0
1597 07:03:10.103668 PCI: 00:15.3: enabled 0
1598 07:03:10.106733 PCI: 00:16.0: enabled 1
1599 07:03:10.110073 PCI: 00:16.1: enabled 0
1600 07:03:10.113454 PCI: 00:16.2: enabled 0
1601 07:03:10.113888 PCI: 00:16.3: enabled 0
1602 07:03:10.116546 PCI: 00:16.4: enabled 0
1603 07:03:10.119819 PCI: 00:16.5: enabled 0
1604 07:03:10.123133 PCI: 00:17.0: enabled 1
1605 07:03:10.123584 PCI: 00:19.0: enabled 1
1606 07:03:10.126409 PCI: 00:19.1: enabled 0
1607 07:03:10.129760 PCI: 00:19.2: enabled 0
1608 07:03:10.133119 PCI: 00:1a.0: enabled 0
1609 07:03:10.133557 PCI: 00:1c.0: enabled 0
1610 07:03:10.136356 PCI: 00:1c.1: enabled 0
1611 07:03:10.139933 PCI: 00:1c.2: enabled 0
1612 07:03:10.140595 PCI: 00:1c.3: enabled 0
1613 07:03:10.143169 PCI: 00:1c.4: enabled 0
1614 07:03:10.146499 PCI: 00:1c.5: enabled 0
1615 07:03:10.149879 PCI: 00:1c.6: enabled 0
1616 07:03:10.150415 PCI: 00:1c.7: enabled 0
1617 07:03:10.153094 PCI: 00:1d.0: enabled 1
1618 07:03:10.156255 PCI: 00:1d.1: enabled 0
1619 07:03:10.159552 PCI: 00:1d.2: enabled 0
1620 07:03:10.160007 PCI: 00:1d.3: enabled 0
1621 07:03:10.162926 PCI: 00:1d.4: enabled 0
1622 07:03:10.166511 PCI: 00:1d.5: enabled 0
1623 07:03:10.169433 PCI: 00:1e.0: enabled 1
1624 07:03:10.169895 PCI: 00:1e.1: enabled 0
1625 07:03:10.172792 PCI: 00:1e.2: enabled 1
1626 07:03:10.176035 PCI: 00:1e.3: enabled 1
1627 07:03:10.176514 PCI: 00:1f.0: enabled 1
1628 07:03:10.179714 PCI: 00:1f.1: enabled 0
1629 07:03:10.182740 PCI: 00:1f.2: enabled 0
1630 07:03:10.186440 PCI: 00:1f.3: enabled 1
1631 07:03:10.187006 PCI: 00:1f.4: enabled 1
1632 07:03:10.189045 PCI: 00:1f.5: enabled 1
1633 07:03:10.192414 PCI: 00:1f.6: enabled 0
1634 07:03:10.195677 USB0 port 0: enabled 1
1635 07:03:10.196120 I2C: 01:15: enabled 1
1636 07:03:10.199175 I2C: 02:5d: enabled 1
1637 07:03:10.203046 GENERIC: 0.0: enabled 1
1638 07:03:10.203606 I2C: 03:1a: enabled 1
1639 07:03:10.205849 I2C: 03:38: enabled 1
1640 07:03:10.209265 I2C: 03:39: enabled 1
1641 07:03:10.209831 I2C: 03:3a: enabled 1
1642 07:03:10.212342 I2C: 03:3b: enabled 1
1643 07:03:10.215897 PCI: 00:00.0: enabled 1
1644 07:03:10.216374 SPI: 00: enabled 1
1645 07:03:10.219285 SPI: 01: enabled 1
1646 07:03:10.222284 PNP: 0c09.0: enabled 1
1647 07:03:10.222746 USB2 port 0: enabled 1
1648 07:03:10.225694 USB2 port 1: enabled 1
1649 07:03:10.229179 USB2 port 2: enabled 0
1650 07:03:10.232531 USB2 port 3: enabled 0
1651 07:03:10.233063 USB2 port 5: enabled 0
1652 07:03:10.235318 USB2 port 6: enabled 1
1653 07:03:10.239115 USB2 port 9: enabled 1
1654 07:03:10.239649 USB3 port 0: enabled 1
1655 07:03:10.242528 USB3 port 1: enabled 1
1656 07:03:10.245649 USB3 port 2: enabled 1
1657 07:03:10.246087 USB3 port 3: enabled 1
1658 07:03:10.248848 USB3 port 4: enabled 0
1659 07:03:10.252397 APIC: 01: enabled 1
1660 07:03:10.252965 APIC: 07: enabled 1
1661 07:03:10.255331 APIC: 06: enabled 1
1662 07:03:10.258584 APIC: 04: enabled 1
1663 07:03:10.259037 APIC: 02: enabled 1
1664 07:03:10.262071 APIC: 05: enabled 1
1665 07:03:10.262535 APIC: 03: enabled 1
1666 07:03:10.265139 PCI: 00:08.0: enabled 1
1667 07:03:10.268634 PCI: 00:14.2: enabled 1
1668 07:03:10.271854 PCI: 01:00.0: enabled 1
1669 07:03:10.275200 Disabling ACPI via APMC:
1670 07:03:10.278749 done.
1671 07:03:10.282815 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 07:03:10.285243 ELOG: NV offset 0xaf0000 size 0x4000
1673 07:03:10.291908 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 07:03:10.299016 ELOG: Event(17) added with size 13 at 2023-03-22 07:03:10 UTC
1675 07:03:10.305496 ELOG: Event(92) added with size 9 at 2023-03-22 07:03:10 UTC
1676 07:03:10.312303 ELOG: Event(93) added with size 9 at 2023-03-22 07:03:10 UTC
1677 07:03:10.319224 ELOG: Event(9A) added with size 9 at 2023-03-22 07:03:10 UTC
1678 07:03:10.325400 ELOG: Event(9E) added with size 10 at 2023-03-22 07:03:10 UTC
1679 07:03:10.332053 ELOG: Event(9F) added with size 14 at 2023-03-22 07:03:10 UTC
1680 07:03:10.335410 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 07:03:10.342934 ELOG: Event(A1) added with size 10 at 2023-03-22 07:03:10 UTC
1682 07:03:10.352437 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 07:03:10.358716 ELOG: Event(A0) added with size 9 at 2023-03-22 07:03:10 UTC
1684 07:03:10.362724 elog_add_boot_reason: Logged dev mode boot
1685 07:03:10.365805 Finalize devices...
1686 07:03:10.366344 PCI: 00:17.0 final
1687 07:03:10.368913 Devices finalized
1688 07:03:10.372142 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 07:03:10.378804 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 07:03:10.382454 ME: HFSTS1 : 0x90000245
1691 07:03:10.385615 ME: HFSTS2 : 0x3B850126
1692 07:03:10.392133 ME: HFSTS3 : 0x00000020
1693 07:03:10.395532 ME: HFSTS4 : 0x00004800
1694 07:03:10.398398 ME: HFSTS5 : 0x00000000
1695 07:03:10.402139 ME: HFSTS6 : 0x40400006
1696 07:03:10.405287 ME: Manufacturing Mode : NO
1697 07:03:10.408918 ME: FW Partition Table : OK
1698 07:03:10.411840 ME: Bringup Loader Failure : NO
1699 07:03:10.414861 ME: Firmware Init Complete : YES
1700 07:03:10.418352 ME: Boot Options Present : NO
1701 07:03:10.421987 ME: Update In Progress : NO
1702 07:03:10.424993 ME: D0i3 Support : YES
1703 07:03:10.428665 ME: Low Power State Enabled : NO
1704 07:03:10.431967 ME: CPU Replaced : NO
1705 07:03:10.434726 ME: CPU Replacement Valid : YES
1706 07:03:10.438430 ME: Current Working State : 5
1707 07:03:10.441402 ME: Current Operation State : 1
1708 07:03:10.444984 ME: Current Operation Mode : 0
1709 07:03:10.447895 ME: Error Code : 0
1710 07:03:10.451774 ME: CPU Debug Disabled : YES
1711 07:03:10.455225 ME: TXT Support : NO
1712 07:03:10.461428 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 07:03:10.468241 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 07:03:10.468969 CBFS @ c08000 size 3f8000
1715 07:03:10.474635 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 07:03:10.477963 CBFS: Locating 'fallback/dsdt.aml'
1717 07:03:10.481398 CBFS: Found @ offset 10bb80 size 3fa5
1718 07:03:10.488395 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 07:03:10.491415 CBFS @ c08000 size 3f8000
1720 07:03:10.494321 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 07:03:10.497516 CBFS: Locating 'fallback/slic'
1722 07:03:10.503288 CBFS: 'fallback/slic' not found.
1723 07:03:10.509738 ACPI: Writing ACPI tables at 99b3e000.
1724 07:03:10.510281 ACPI: * FACS
1725 07:03:10.512918 ACPI: * DSDT
1726 07:03:10.516570 Ramoops buffer: 0x100000@0x99a3d000.
1727 07:03:10.520121 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 07:03:10.526048 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 07:03:10.529628 Google Chrome EC: version:
1730 07:03:10.532577 ro: helios_v2.0.2659-56403530b
1731 07:03:10.536036 rw: helios_v2.0.2849-c41de27e7d
1732 07:03:10.536705 running image: 1
1733 07:03:10.540525 ACPI: * FADT
1734 07:03:10.541064 SCI is IRQ9
1735 07:03:10.547465 ACPI: added table 1/32, length now 40
1736 07:03:10.548068 ACPI: * SSDT
1737 07:03:10.550473 Found 1 CPU(s) with 8 core(s) each.
1738 07:03:10.554010 Error: Could not locate 'wifi_sar' in VPD.
1739 07:03:10.560113 Checking CBFS for default SAR values
1740 07:03:10.563662 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 07:03:10.567430 CBFS @ c08000 size 3f8000
1742 07:03:10.573560 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 07:03:10.576510 CBFS: Locating 'wifi_sar_defaults.hex'
1744 07:03:10.580578 CBFS: Found @ offset 5fac0 size 77
1745 07:03:10.583468 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 07:03:10.589763 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 07:03:10.593161 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 07:03:10.599978 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 07:03:10.603522 failed to find key in VPD: dsm_calib_r0_0
1750 07:03:10.613526 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 07:03:10.616818 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 07:03:10.619632 failed to find key in VPD: dsm_calib_r0_1
1753 07:03:10.629771 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 07:03:10.636348 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 07:03:10.639364 failed to find key in VPD: dsm_calib_r0_2
1756 07:03:10.649589 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 07:03:10.653158 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 07:03:10.659544 failed to find key in VPD: dsm_calib_r0_3
1759 07:03:10.666290 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 07:03:10.672958 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 07:03:10.675858 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 07:03:10.679592 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 07:03:10.687271 EC returned error result code 1
1764 07:03:10.690611 EC returned error result code 1
1765 07:03:10.694255 EC returned error result code 1
1766 07:03:10.696701 PS2K: Bad resp from EC. Vivaldi disabled!
1767 07:03:10.703693 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 07:03:10.707163 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 07:03:10.713937 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 07:03:10.716773 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 07:03:10.723237 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 07:03:10.729920 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 07:03:10.736705 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 07:03:10.743612 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 07:03:10.746485 ACPI: added table 2/32, length now 44
1776 07:03:10.747031 ACPI: * MCFG
1777 07:03:10.750188 ACPI: added table 3/32, length now 48
1778 07:03:10.753253 ACPI: * TPM2
1779 07:03:10.756202 TPM2 log created at 99a2d000
1780 07:03:10.760398 ACPI: added table 4/32, length now 52
1781 07:03:10.760886 ACPI: * MADT
1782 07:03:10.763421 SCI is IRQ9
1783 07:03:10.766119 ACPI: added table 5/32, length now 56
1784 07:03:10.769671 current = 99b43ac0
1785 07:03:10.770259 ACPI: * DMAR
1786 07:03:10.773165 ACPI: added table 6/32, length now 60
1787 07:03:10.776202 ACPI: * IGD OpRegion
1788 07:03:10.779863 GMA: Found VBT in CBFS
1789 07:03:10.780509 GMA: Found valid VBT in CBFS
1790 07:03:10.786028 ACPI: added table 7/32, length now 64
1791 07:03:10.786617 ACPI: * HPET
1792 07:03:10.789884 ACPI: added table 8/32, length now 68
1793 07:03:10.793082 ACPI: done.
1794 07:03:10.793576 ACPI tables: 31744 bytes.
1795 07:03:10.795851 smbios_write_tables: 99a2c000
1796 07:03:10.800035 EC returned error result code 3
1797 07:03:10.806119 Couldn't obtain OEM name from CBI
1798 07:03:10.806708 Create SMBIOS type 17
1799 07:03:10.809848 PCI: 00:00.0 (Intel Cannonlake)
1800 07:03:10.812923 PCI: 00:14.3 (Intel WiFi)
1801 07:03:10.816282 SMBIOS tables: 939 bytes.
1802 07:03:10.819591 Writing table forward entry at 0x00000500
1803 07:03:10.826049 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 07:03:10.829289 Writing coreboot table at 0x99b62000
1805 07:03:10.835930 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 07:03:10.839232 1. 0000000000001000-000000000009ffff: RAM
1807 07:03:10.845939 2. 00000000000a0000-00000000000fffff: RESERVED
1808 07:03:10.849303 3. 0000000000100000-0000000099a2bfff: RAM
1809 07:03:10.855691 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 07:03:10.858717 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 07:03:10.865615 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 07:03:10.869270 7. 000000009a000000-000000009f7fffff: RESERVED
1813 07:03:10.875390 8. 00000000e0000000-00000000efffffff: RESERVED
1814 07:03:10.878853 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 07:03:10.885516 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 07:03:10.888446 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 07:03:10.895308 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 07:03:10.898824 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 07:03:10.905193 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 07:03:10.908600 15. 0000000100000000-000000045e7fffff: RAM
1821 07:03:10.911627 Graphics framebuffer located at 0xc0000000
1822 07:03:10.915120 Passing 5 GPIOs to payload:
1823 07:03:10.921564 NAME | PORT | POLARITY | VALUE
1824 07:03:10.924609 write protect | undefined | high | low
1825 07:03:10.931453 lid | undefined | high | high
1826 07:03:10.934545 power | undefined | high | low
1827 07:03:10.941181 oprom | undefined | high | low
1828 07:03:10.944272 EC in RW | 0x000000cb | high | low
1829 07:03:10.948112 Board ID: 4
1830 07:03:10.951443 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 07:03:10.954672 CBFS @ c08000 size 3f8000
1832 07:03:10.961118 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 07:03:10.967882 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1834 07:03:10.971065 coreboot table: 1492 bytes.
1835 07:03:10.974846 IMD ROOT 0. 99fff000 00001000
1836 07:03:10.977632 IMD SMALL 1. 99ffe000 00001000
1837 07:03:10.980990 FSP MEMORY 2. 99c4e000 003b0000
1838 07:03:10.984473 CONSOLE 3. 99c2e000 00020000
1839 07:03:10.987527 FMAP 4. 99c2d000 0000054e
1840 07:03:10.991143 TIME STAMP 5. 99c2c000 00000910
1841 07:03:10.994424 VBOOT WORK 6. 99c18000 00014000
1842 07:03:10.997799 MRC DATA 7. 99c16000 00001958
1843 07:03:11.000963 ROMSTG STCK 8. 99c15000 00001000
1844 07:03:11.004148 AFTER CAR 9. 99c0b000 0000a000
1845 07:03:11.007721 RAMSTAGE 10. 99baf000 0005c000
1846 07:03:11.010674 REFCODE 11. 99b7a000 00035000
1847 07:03:11.014121 SMM BACKUP 12. 99b6a000 00010000
1848 07:03:11.017309 COREBOOT 13. 99b62000 00008000
1849 07:03:11.020798 ACPI 14. 99b3e000 00024000
1850 07:03:11.023848 ACPI GNVS 15. 99b3d000 00001000
1851 07:03:11.027487 RAMOOPS 16. 99a3d000 00100000
1852 07:03:11.030774 TPM2 TCGLOG17. 99a2d000 00010000
1853 07:03:11.033878 SMBIOS 18. 99a2c000 00000800
1854 07:03:11.033963 IMD small region:
1855 07:03:11.037511 IMD ROOT 0. 99ffec00 00000400
1856 07:03:11.041022 FSP RUNTIME 1. 99ffebe0 00000004
1857 07:03:11.044147 EC HOSTEVENT 2. 99ffebc0 00000008
1858 07:03:11.050734 POWER STATE 3. 99ffeb80 00000040
1859 07:03:11.054321 ROMSTAGE 4. 99ffeb60 00000004
1860 07:03:11.057187 MEM INFO 5. 99ffe9a0 000001b9
1861 07:03:11.060515 VPD 6. 99ffe920 0000006c
1862 07:03:11.064525 MTRR: Physical address space:
1863 07:03:11.067965 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 07:03:11.074103 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 07:03:11.080491 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 07:03:11.087171 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 07:03:11.093655 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 07:03:11.100506 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 07:03:11.107424 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 07:03:11.110503 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 07:03:11.113734 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 07:03:11.117166 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 07:03:11.123743 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 07:03:11.127062 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 07:03:11.130201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 07:03:11.133663 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 07:03:11.140432 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 07:03:11.143494 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 07:03:11.146637 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 07:03:11.149911 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 07:03:11.153956 call enable_fixed_mtrr()
1882 07:03:11.157350 CPU physical address size: 39 bits
1883 07:03:11.163400 MTRR: default type WB/UC MTRR counts: 6/8.
1884 07:03:11.167133 MTRR: WB selected as default type.
1885 07:03:11.173538 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 07:03:11.177008 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 07:03:11.183792 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 07:03:11.189987 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 07:03:11.197049 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 07:03:11.203454 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 07:03:11.207422 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 07:03:11.213481 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 07:03:11.216590 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 07:03:11.220097 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 07:03:11.223358 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 07:03:11.229954 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 07:03:11.233496 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 07:03:11.236501 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 07:03:11.239711 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 07:03:11.246232 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 07:03:11.249833 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 07:03:11.249918
1903 07:03:11.249986 MTRR check
1904 07:03:11.253135 Fixed MTRRs : Enabled
1905 07:03:11.256321 Variable MTRRs: Enabled
1906 07:03:11.256421
1907 07:03:11.259917 call enable_fixed_mtrr()
1908 07:03:11.263068 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1909 07:03:11.266141 CPU physical address size: 39 bits
1910 07:03:11.273473 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1911 07:03:11.276626 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 07:03:11.279650 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 07:03:11.286904 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 07:03:11.290024 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 07:03:11.293034 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 07:03:11.296342 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 07:03:11.302802 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 07:03:11.306399 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 07:03:11.309735 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 07:03:11.312649 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 07:03:11.315896 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 07:03:11.322854 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 07:03:11.326399 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 07:03:11.329315 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 07:03:11.335815 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 07:03:11.339107 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 07:03:11.342739 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 07:03:11.345714 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 07:03:11.349237 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 07:03:11.355582 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 07:03:11.359229 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 07:03:11.362340 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 07:03:11.365741 call enable_fixed_mtrr()
1934 07:03:11.368846 call enable_fixed_mtrr()
1935 07:03:11.372111 CPU physical address size: 39 bits
1936 07:03:11.375467 CPU physical address size: 39 bits
1937 07:03:11.378752 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 07:03:11.385098 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 07:03:11.388629 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 07:03:11.391925 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 07:03:11.395182 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 07:03:11.401872 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 07:03:11.405142 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 07:03:11.408261 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 07:03:11.411996 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 07:03:11.414995 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 07:03:11.421698 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 07:03:11.424985 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 07:03:11.428138 call enable_fixed_mtrr()
1950 07:03:11.431484 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 07:03:11.435188 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 07:03:11.438028 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 07:03:11.445030 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 07:03:11.448440 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 07:03:11.451869 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 07:03:11.455013 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 07:03:11.461589 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 07:03:11.464645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 07:03:11.468256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 07:03:11.471336 CPU physical address size: 39 bits
1961 07:03:11.474998 call enable_fixed_mtrr()
1962 07:03:11.478134 CBFS @ c08000 size 3f8000
1963 07:03:11.484958 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1964 07:03:11.488114 CBFS: Locating 'fallback/payload'
1965 07:03:11.491625 CPU physical address size: 39 bits
1966 07:03:11.494800 CBFS: Found @ offset 1c96c0 size 3f798
1967 07:03:11.497957 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 07:03:11.501207 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 07:03:11.507924 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 07:03:11.511037 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 07:03:11.514524 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 07:03:11.517592 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 07:03:11.524562 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 07:03:11.527954 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 07:03:11.531231 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 07:03:11.534695 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 07:03:11.537509 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 07:03:11.544263 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 07:03:11.547690 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 07:03:11.551322 call enable_fixed_mtrr()
1981 07:03:11.554407 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 07:03:11.557478 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 07:03:11.564199 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 07:03:11.567237 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 07:03:11.571138 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 07:03:11.573929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 07:03:11.577658 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 07:03:11.584014 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 07:03:11.587563 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 07:03:11.590514 CPU physical address size: 39 bits
1991 07:03:11.594221 call enable_fixed_mtrr()
1992 07:03:11.597267 Checking segment from ROM address 0xffdd16f8
1993 07:03:11.600793 CPU physical address size: 39 bits
1994 07:03:11.607174 Checking segment from ROM address 0xffdd1714
1995 07:03:11.610915 Loading segment from ROM address 0xffdd16f8
1996 07:03:11.613570 code (compression=0)
1997 07:03:11.620245 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 07:03:11.630157 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 07:03:11.633409 it's not compressed!
2000 07:03:11.724433 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 07:03:11.731210 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 07:03:11.734666 Loading segment from ROM address 0xffdd1714
2003 07:03:11.737409 Entry Point 0x30000000
2004 07:03:11.741044 Loaded segments
2005 07:03:11.746380 Finalizing chipset.
2006 07:03:11.749937 Finalizing SMM.
2007 07:03:11.753239 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2008 07:03:11.756505 mp_park_aps done after 0 msecs.
2009 07:03:11.762843 Jumping to boot code at 30000000(99b62000)
2010 07:03:11.769685 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 07:03:11.769774
2012 07:03:11.769864
2013 07:03:11.769947
2014 07:03:11.772932 Starting depthcharge on Helios...
2015 07:03:11.773021
2016 07:03:11.773386 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2017 07:03:11.773492 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2018 07:03:11.773589 Setting prompt string to ['hatch:']
2019 07:03:11.773675 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2020 07:03:11.782800 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 07:03:11.782890
2022 07:03:11.789417 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2023 07:03:11.789503
2024 07:03:11.795996 board_setup: Info: eMMC controller not present; skipping
2025 07:03:11.796081
2026 07:03:11.799659 New NVMe Controller 0x30053ac0 @ 00:1d:00
2027 07:03:11.799745
2028 07:03:11.806023 board_setup: Info: SDHCI controller not present; skipping
2029 07:03:11.806109
2030 07:03:11.812573 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2031 07:03:11.812659
2032 07:03:11.812726 Wipe memory regions:
2033 07:03:11.812788
2034 07:03:11.815825 [0x00000000001000, 0x000000000a0000)
2035 07:03:11.815914
2036 07:03:11.819472 [0x00000000100000, 0x00000030000000)
2037 07:03:11.885403
2038 07:03:11.888535 [0x00000030657430, 0x00000099a2c000)
2039 07:03:12.025821
2040 07:03:12.029247 [0x00000100000000, 0x0000045e800000)
2041 07:03:13.411446
2042 07:03:13.411583 R8152: Initializing
2043 07:03:13.411651
2044 07:03:13.414728 Version 9 (ocp_data = 6010)
2045 07:03:13.418626
2046 07:03:13.418711 R8152: Done initializing
2047 07:03:13.418779
2048 07:03:13.421920 Adding net device
2049 07:03:14.031724
2050 07:03:14.031869 R8152: Initializing
2051 07:03:14.031938
2052 07:03:14.035088 Version 6 (ocp_data = 5c30)
2053 07:03:14.035174
2054 07:03:14.038207 R8152: Done initializing
2055 07:03:14.038291
2056 07:03:14.041709 net_add_device: Attemp to include the same device
2057 07:03:14.044920
2058 07:03:14.052126 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2059 07:03:14.052211
2060 07:03:14.052277
2061 07:03:14.052370
2062 07:03:14.052655 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 07:03:14.153424 hatch: tftpboot 192.168.201.1 9726642/tftp-deploy-humh3605/kernel/bzImage 9726642/tftp-deploy-humh3605/kernel/cmdline 9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
2065 07:03:14.153565 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2066 07:03:14.153645 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2067 07:03:14.157705 tftpboot 192.168.201.1 9726642/tftp-deploy-humh3605/kernel/bzImoy-humh3605/kernel/cmdline 9726642/tftp-deploy-humh3605/ramdisk/ramdisk.cpio.gz
2068 07:03:14.157791
2069 07:03:14.157857 Waiting for link
2070 07:03:14.358480
2071 07:03:14.358612 done.
2072 07:03:14.358679
2073 07:03:14.358743 MAC: 00:24:32:50:1a:5f
2074 07:03:14.358805
2075 07:03:14.361563 Sending DHCP discover... done.
2076 07:03:14.361652
2077 07:03:14.365002 Waiting for reply... done.
2078 07:03:14.365089
2079 07:03:14.368469 Sending DHCP request... done.
2080 07:03:14.368554
2081 07:03:14.371833 Waiting for reply... done.
2082 07:03:14.371918
2083 07:03:14.374889 My ip is 192.168.201.21
2084 07:03:14.374974
2085 07:03:14.378470 The DHCP server ip is 192.168.201.1
2086 07:03:14.378557
2087 07:03:14.381493 TFTP server IP predefined by user: 192.168.201.1
2088 07:03:14.381579
2089 07:03:14.388046 Bootfile predefined by user: 9726642/tftp-deploy-humh3605/kernel/bzImage
2090 07:03:14.388132
2091 07:03:14.391731 Sending tftp read request... done.
2092 07:03:14.391816
2093 07:03:14.394970 Waiting for the transfer...
2094 07:03:14.398265
2095 07:03:14.908661 00000000 ################################################################
2096 07:03:14.908806
2097 07:03:15.421607 00080000 ################################################################
2098 07:03:15.421791
2099 07:03:15.949155 00100000 ################################################################
2100 07:03:15.949302
2101 07:03:16.494812 00180000 ################################################################
2102 07:03:16.494957
2103 07:03:17.031304 00200000 ################################################################
2104 07:03:17.031458
2105 07:03:17.582219 00280000 ################################################################
2106 07:03:17.582373
2107 07:03:18.124004 00300000 ################################################################
2108 07:03:18.124142
2109 07:03:18.665861 00380000 ################################################################
2110 07:03:18.666004
2111 07:03:19.219872 00400000 ################################################################
2112 07:03:19.220057
2113 07:03:19.884659 00480000 ################################################################
2114 07:03:19.885250
2115 07:03:20.602637 00500000 ################################################################
2116 07:03:20.603245
2117 07:03:21.329584 00580000 ################################################################
2118 07:03:21.330160
2119 07:03:21.972871 00600000 ################################################################
2120 07:03:21.973052
2121 07:03:22.672822 00680000 ################################################################
2122 07:03:22.673358
2123 07:03:23.281683 00700000 ################################################################
2124 07:03:23.281833
2125 07:03:23.978520 00780000 ################################################################
2126 07:03:23.979136
2127 07:03:24.684064 00800000 ################################################################
2128 07:03:24.684756
2129 07:03:25.383147 00880000 ################################################################
2130 07:03:25.383738
2131 07:03:26.093478 00900000 ################################################################
2132 07:03:26.093687
2133 07:03:26.816927 00980000 ################################################################
2134 07:03:26.817515
2135 07:03:27.463454 00a00000 ################################################################
2136 07:03:27.463990
2137 07:03:28.159348 00a80000 ################################################################
2138 07:03:28.159883
2139 07:03:28.296533 00b00000 ############# done.
2140 07:03:28.297067
2141 07:03:28.299898 The bootfile was 11637120 bytes long.
2142 07:03:28.300454
2143 07:03:28.303120 Sending tftp read request... done.
2144 07:03:28.303556
2145 07:03:28.306341 Waiting for the transfer...
2146 07:03:28.306780
2147 07:03:29.008255 00000000 ################################################################
2148 07:03:29.008872
2149 07:03:29.710434 00080000 ################################################################
2150 07:03:29.711141
2151 07:03:30.419809 00100000 ################################################################
2152 07:03:30.420457
2153 07:03:31.132899 00180000 ################################################################
2154 07:03:31.133509
2155 07:03:31.854303 00200000 ################################################################
2156 07:03:31.854937
2157 07:03:32.499693 00280000 ################################################################
2158 07:03:32.500329
2159 07:03:33.194573 00300000 ################################################################
2160 07:03:33.194728
2161 07:03:33.875646 00380000 ################################################################
2162 07:03:33.876183
2163 07:03:34.594955 00400000 ################################################################
2164 07:03:34.595511
2165 07:03:35.310795 00480000 ################################################################
2166 07:03:35.311332
2167 07:03:36.001742 00500000 ################################################################
2168 07:03:36.001899
2169 07:03:36.435717 00580000 ################################################# done.
2170 07:03:36.435872
2171 07:03:36.439004 Sending tftp read request... done.
2172 07:03:36.439080
2173 07:03:36.442287 Waiting for the transfer...
2174 07:03:36.442361
2175 07:03:36.442425 00000000 # done.
2176 07:03:36.442488
2177 07:03:36.452238 Command line loaded dynamically from TFTP file: 9726642/tftp-deploy-humh3605/kernel/cmdline
2178 07:03:36.452320
2179 07:03:36.478604 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9726642/extract-nfsrootfs-_0oxowbo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2180 07:03:36.478699
2181 07:03:36.485115 ec_init(0): CrosEC protocol v3 supported (256, 256)
2182 07:03:36.488969
2183 07:03:36.492745 Shutting down all USB controllers.
2184 07:03:36.492822
2185 07:03:36.492889 Removing current net device
2186 07:03:36.499904
2187 07:03:36.499981 Finalizing coreboot
2188 07:03:36.500049
2189 07:03:36.506908 Exiting depthcharge with code 4 at timestamp: 32097931
2190 07:03:36.506988
2191 07:03:36.507056
2192 07:03:36.507121 Starting kernel ...
2193 07:03:36.507183
2194 07:03:36.507241
2195 07:03:36.507624 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2196 07:03:36.507740 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2197 07:03:36.507835 Setting prompt string to ['Linux version [0-9]']
2198 07:03:36.507913 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2199 07:03:36.508013 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2201 07:07:53.508813 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2203 07:07:53.509996 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2205 07:07:53.510886 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2208 07:07:53.512363 end: 2 depthcharge-action (duration 00:05:00) [common]
2210 07:07:53.513598 Cleaning after the job
2211 07:07:53.514069 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/ramdisk
2212 07:07:53.516535 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/kernel
2213 07:07:53.520099 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/nfsrootfs
2214 07:07:53.580305 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9726642/tftp-deploy-humh3605/modules
2215 07:07:53.580803 start: 5.1 power-off (timeout 00:00:30) [common]
2216 07:07:53.580966 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2217 07:07:53.656495 >> Command sent successfully.
2218 07:07:53.659819 Returned 0 in 0 seconds
2219 07:07:53.760924 end: 5.1 power-off (duration 00:00:00) [common]
2221 07:07:53.762359 start: 5.2 read-feedback (timeout 00:10:00) [common]
2222 07:07:53.763470 Listened to connection for namespace 'common' for up to 1s
2224 07:07:53.764793 Listened to connection for namespace 'common' for up to 1s
2225 07:07:54.764640 Finalising connection for namespace 'common'
2226 07:07:54.765341 Disconnecting from shell: Finalise
2227 07:07:54.765767
2228 07:07:54.866828 end: 5.2 read-feedback (duration 00:00:01) [common]
2229 07:07:54.867398 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9726642
2230 07:07:54.963738 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9726642
2231 07:07:54.963934 JobError: Your job cannot terminate cleanly.