Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Warnings: 1
- Kernel Warnings: 25
- Errors: 2
- Kernel Errors: 46
- Boot result: FAIL
1 20:27:04.741537 lava-dispatcher, installed at version: 2024.03
2 20:27:04.741733 start: 0 validate
3 20:27:04.741868 Start time: 2024-05-15 20:27:04.741860+00:00 (UTC)
4 20:27:04.741986 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:27:04.742117 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 20:27:04.995650 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:27:04.996337 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fstable-rc%2Fqueue-6.6%2Fv6.6.30-309-g2e98a199a3b8b%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 20:27:31.266153 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:27:31.266811 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fstable-rc%2Fqueue-6.6%2Fv6.6.30-309-g2e98a199a3b8b%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 20:27:31.519262 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:27:31.519426 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fstable-rc%2Fqueue-6.6%2Fv6.6.30-309-g2e98a199a3b8b%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:27:34.768025 validate duration: 30.03
14 20:27:34.768297 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:27:34.768400 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:27:34.768497 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:27:34.768623 Not decompressing ramdisk as can be used compressed.
18 20:27:34.768706 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 20:27:34.768770 saving as /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/ramdisk/rootfs.cpio.gz
20 20:27:34.768833 total size: 8181887 (7 MB)
21 20:27:34.769933 progress 0 % (0 MB)
22 20:27:34.772192 progress 5 % (0 MB)
23 20:27:34.774378 progress 10 % (0 MB)
24 20:27:34.776604 progress 15 % (1 MB)
25 20:27:34.778896 progress 20 % (1 MB)
26 20:27:34.781108 progress 25 % (1 MB)
27 20:27:34.783224 progress 30 % (2 MB)
28 20:27:34.785541 progress 35 % (2 MB)
29 20:27:34.787582 progress 40 % (3 MB)
30 20:27:34.789821 progress 45 % (3 MB)
31 20:27:34.791951 progress 50 % (3 MB)
32 20:27:34.794164 progress 55 % (4 MB)
33 20:27:34.796269 progress 60 % (4 MB)
34 20:27:34.798480 progress 65 % (5 MB)
35 20:27:34.800486 progress 70 % (5 MB)
36 20:27:34.802738 progress 75 % (5 MB)
37 20:27:34.804873 progress 80 % (6 MB)
38 20:27:34.807066 progress 85 % (6 MB)
39 20:27:34.809177 progress 90 % (7 MB)
40 20:27:34.811456 progress 95 % (7 MB)
41 20:27:34.813505 progress 100 % (7 MB)
42 20:27:34.813705 7 MB downloaded in 0.04 s (173.89 MB/s)
43 20:27:34.813858 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:27:34.814099 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:27:34.814185 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:27:34.814269 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:27:34.814401 downloading http://storage.kernelci.org/stable-rc/queue-6.6/v6.6.30-309-g2e98a199a3b8b/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 20:27:34.814470 saving as /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/kernel/Image
50 20:27:34.814530 total size: 58055168 (55 MB)
51 20:27:34.814590 No compression specified
52 20:27:34.815698 progress 0 % (0 MB)
53 20:27:34.830624 progress 5 % (2 MB)
54 20:27:34.845451 progress 10 % (5 MB)
55 20:27:34.860114 progress 15 % (8 MB)
56 20:27:34.875158 progress 20 % (11 MB)
57 20:27:34.890169 progress 25 % (13 MB)
58 20:27:34.905501 progress 30 % (16 MB)
59 20:27:34.920935 progress 35 % (19 MB)
60 20:27:34.935940 progress 40 % (22 MB)
61 20:27:34.951138 progress 45 % (24 MB)
62 20:27:34.966286 progress 50 % (27 MB)
63 20:27:34.981564 progress 55 % (30 MB)
64 20:27:34.996716 progress 60 % (33 MB)
65 20:27:35.011737 progress 65 % (36 MB)
66 20:27:35.026879 progress 70 % (38 MB)
67 20:27:35.042322 progress 75 % (41 MB)
68 20:27:35.057438 progress 80 % (44 MB)
69 20:27:35.072385 progress 85 % (47 MB)
70 20:27:35.087461 progress 90 % (49 MB)
71 20:27:35.102508 progress 95 % (52 MB)
72 20:27:35.117192 progress 100 % (55 MB)
73 20:27:35.117480 55 MB downloaded in 0.30 s (182.76 MB/s)
74 20:27:35.117634 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:27:35.117873 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:27:35.117960 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:27:35.118044 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:27:35.118181 downloading http://storage.kernelci.org/stable-rc/queue-6.6/v6.6.30-309-g2e98a199a3b8b/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 20:27:35.118251 saving as /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 20:27:35.118312 total size: 58972 (0 MB)
82 20:27:35.118374 No compression specified
83 20:27:35.119513 progress 55 % (0 MB)
84 20:27:35.119798 progress 100 % (0 MB)
85 20:27:35.120024 0 MB downloaded in 0.00 s (32.90 MB/s)
86 20:27:35.120150 end: 1.3.1 http-download (duration 00:00:00) [common]
88 20:27:35.120371 end: 1.3 download-retry (duration 00:00:00) [common]
89 20:27:35.120455 start: 1.4 download-retry (timeout 00:10:00) [common]
90 20:27:35.120541 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 20:27:35.120662 downloading http://storage.kernelci.org/stable-rc/queue-6.6/v6.6.30-309-g2e98a199a3b8b/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 20:27:35.120729 saving as /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/modules/modules.tar
93 20:27:35.120790 total size: 9549404 (9 MB)
94 20:27:35.120851 Using unxz to decompress xz
95 20:27:35.125001 progress 0 % (0 MB)
96 20:27:35.149853 progress 5 % (0 MB)
97 20:27:35.179438 progress 10 % (0 MB)
98 20:27:35.206991 progress 15 % (1 MB)
99 20:27:35.237749 progress 20 % (1 MB)
100 20:27:35.263672 progress 25 % (2 MB)
101 20:27:35.292191 progress 30 % (2 MB)
102 20:27:35.320286 progress 35 % (3 MB)
103 20:27:35.349464 progress 40 % (3 MB)
104 20:27:35.379384 progress 45 % (4 MB)
105 20:27:35.407345 progress 50 % (4 MB)
106 20:27:35.438357 progress 55 % (5 MB)
107 20:27:35.465555 progress 60 % (5 MB)
108 20:27:35.496624 progress 65 % (5 MB)
109 20:27:35.525028 progress 70 % (6 MB)
110 20:27:35.562696 progress 75 % (6 MB)
111 20:27:35.600652 progress 80 % (7 MB)
112 20:27:35.627185 progress 85 % (7 MB)
113 20:27:35.655276 progress 90 % (8 MB)
114 20:27:35.681062 progress 95 % (8 MB)
115 20:27:35.708884 progress 100 % (9 MB)
116 20:27:35.714081 9 MB downloaded in 0.59 s (15.35 MB/s)
117 20:27:35.714408 end: 1.4.1 http-download (duration 00:00:01) [common]
119 20:27:35.714809 end: 1.4 download-retry (duration 00:00:01) [common]
120 20:27:35.714948 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 20:27:35.715087 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 20:27:35.715210 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 20:27:35.715333 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 20:27:35.715633 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u
125 20:27:35.715821 makedir: /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin
126 20:27:35.715976 makedir: /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/tests
127 20:27:35.716117 makedir: /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/results
128 20:27:35.716279 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-add-keys
129 20:27:35.716473 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-add-sources
130 20:27:35.716658 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-background-process-start
131 20:27:35.716833 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-background-process-stop
132 20:27:35.717007 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-common-functions
133 20:27:35.717178 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-echo-ipv4
134 20:27:35.717364 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-install-packages
135 20:27:35.717534 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-installed-packages
136 20:27:35.717704 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-os-build
137 20:27:35.717874 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-probe-channel
138 20:27:35.718043 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-probe-ip
139 20:27:35.718220 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-target-ip
140 20:27:35.718401 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-target-mac
141 20:27:35.718583 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-target-storage
142 20:27:35.718772 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-case
143 20:27:35.718964 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-event
144 20:27:35.719146 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-feedback
145 20:27:35.719329 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-raise
146 20:27:35.719511 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-reference
147 20:27:35.719689 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-runner
148 20:27:35.719868 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-set
149 20:27:35.720047 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-test-shell
150 20:27:35.720229 Updating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-install-packages (oe)
151 20:27:35.720436 Updating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/bin/lava-installed-packages (oe)
152 20:27:35.720614 Creating /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/environment
153 20:27:35.720762 LAVA metadata
154 20:27:35.720874 - LAVA_JOB_ID=13828679
155 20:27:35.720977 - LAVA_DISPATCHER_IP=192.168.201.1
156 20:27:35.721124 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 20:27:35.721229 skipped lava-vland-overlay
158 20:27:35.721351 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 20:27:35.721477 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 20:27:35.721578 skipped lava-multinode-overlay
161 20:27:35.721690 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 20:27:35.721834 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 20:27:35.721944 Loading test definitions
164 20:27:35.722080 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 20:27:35.722199 Using /lava-13828679 at stage 0
166 20:27:35.722654 uuid=13828679_1.5.2.3.1 testdef=None
167 20:27:35.722777 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 20:27:35.722902 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 20:27:35.723682 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 20:27:35.724033 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 20:27:35.724961 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 20:27:35.725309 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 20:27:35.726226 runner path: /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/0/tests/0_dmesg test_uuid 13828679_1.5.2.3.1
176 20:27:35.726437 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 20:27:35.726763 Creating lava-test-runner.conf files
179 20:27:35.726864 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13828679/lava-overlay-c6xky74u/lava-13828679/0 for stage 0
180 20:27:35.726995 - 0_dmesg
181 20:27:35.727131 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 20:27:35.727258 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 20:27:35.737180 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 20:27:35.737370 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 20:27:35.737497 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 20:27:35.737630 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 20:27:35.737756 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 20:27:35.979681 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 20:27:35.980095 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 20:27:35.980241 extracting modules file /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13828679/extract-overlay-ramdisk-pxodptk6/ramdisk
191 20:27:36.243593 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 20:27:36.243784 start: 1.5.5 apply-overlay-tftp (timeout 00:09:59) [common]
193 20:27:36.243918 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13828679/compress-overlay-km_xsfzz/overlay-1.5.2.4.tar.gz to ramdisk
194 20:27:36.244016 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13828679/compress-overlay-km_xsfzz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13828679/extract-overlay-ramdisk-pxodptk6/ramdisk
195 20:27:36.252267 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 20:27:36.252402 start: 1.5.6 configure-preseed-file (timeout 00:09:59) [common]
197 20:27:36.252494 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 20:27:36.252583 start: 1.5.7 compress-ramdisk (timeout 00:09:59) [common]
199 20:27:36.252666 Building ramdisk /var/lib/lava/dispatcher/tmp/13828679/extract-overlay-ramdisk-pxodptk6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13828679/extract-overlay-ramdisk-pxodptk6/ramdisk
200 20:27:36.649741 >> 158407 blocks
201 20:27:39.250979 rename /var/lib/lava/dispatcher/tmp/13828679/extract-overlay-ramdisk-pxodptk6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/ramdisk/ramdisk.cpio.gz
202 20:27:39.251563 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 20:27:39.251736 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 20:27:39.251884 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 20:27:39.252043 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/kernel/Image']
206 20:27:54.512089 Returned 0 in 15 seconds
207 20:27:54.612782 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/kernel/image.itb
208 20:27:55.063695 output: FIT description: Kernel Image image with one or more FDT blobs
209 20:27:55.064124 output: Created: Wed May 15 21:27:54 2024
210 20:27:55.064204 output: Image 0 (kernel-1)
211 20:27:55.064270 output: Description:
212 20:27:55.064331 output: Created: Wed May 15 21:27:54 2024
213 20:27:55.064392 output: Type: Kernel Image
214 20:27:55.064454 output: Compression: lzma compressed
215 20:27:55.064512 output: Data Size: 13488920 Bytes = 13172.77 KiB = 12.86 MiB
216 20:27:55.064572 output: Architecture: AArch64
217 20:27:55.064631 output: OS: Linux
218 20:27:55.064690 output: Load Address: 0x00000000
219 20:27:55.064762 output: Entry Point: 0x00000000
220 20:27:55.064827 output: Hash algo: crc32
221 20:27:55.064885 output: Hash value: 6e7e6f90
222 20:27:55.064942 output: Image 1 (fdt-1)
223 20:27:55.065001 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 20:27:55.065058 output: Created: Wed May 15 21:27:54 2024
225 20:27:55.065117 output: Type: Flat Device Tree
226 20:27:55.065176 output: Compression: uncompressed
227 20:27:55.065230 output: Data Size: 58972 Bytes = 57.59 KiB = 0.06 MiB
228 20:27:55.065312 output: Architecture: AArch64
229 20:27:55.065370 output: Hash algo: crc32
230 20:27:55.065424 output: Hash value: 9c47dbdd
231 20:27:55.065478 output: Image 2 (ramdisk-1)
232 20:27:55.065530 output: Description: unavailable
233 20:27:55.065584 output: Created: Wed May 15 21:27:54 2024
234 20:27:55.065638 output: Type: RAMDisk Image
235 20:27:55.065691 output: Compression: Unknown Compression
236 20:27:55.065745 output: Data Size: 22849329 Bytes = 22313.80 KiB = 21.79 MiB
237 20:27:55.065799 output: Architecture: AArch64
238 20:27:55.065870 output: OS: Linux
239 20:27:55.065925 output: Load Address: unavailable
240 20:27:55.065979 output: Entry Point: unavailable
241 20:27:55.066032 output: Hash algo: crc32
242 20:27:55.066085 output: Hash value: 76e9cf74
243 20:27:55.066138 output: Default Configuration: 'conf-1'
244 20:27:55.066192 output: Configuration 0 (conf-1)
245 20:27:55.066246 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 20:27:55.066300 output: Kernel: kernel-1
247 20:27:55.066363 output: Init Ramdisk: ramdisk-1
248 20:27:55.066420 output: FDT: fdt-1
249 20:27:55.066474 output: Loadables: kernel-1
250 20:27:55.066527 output:
251 20:27:55.066738 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 20:27:55.066835 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 20:27:55.066942 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 20:27:55.067036 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
255 20:27:55.067129 No LXC device requested
256 20:27:55.067245 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 20:27:55.067362 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
258 20:27:55.067459 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 20:27:55.067530 Checking files for TFTP limit of 4294967296 bytes.
260 20:27:55.068077 end: 1 tftp-deploy (duration 00:00:20) [common]
261 20:27:55.068203 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 20:27:55.068351 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 20:27:55.068520 substitutions:
264 20:27:55.068627 - {DTB}: 13828679/tftp-deploy-l3paoah5/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 20:27:55.068735 - {INITRD}: 13828679/tftp-deploy-l3paoah5/ramdisk/ramdisk.cpio.gz
266 20:27:55.068802 - {KERNEL}: 13828679/tftp-deploy-l3paoah5/kernel/Image
267 20:27:55.068863 - {LAVA_MAC}: None
268 20:27:55.068924 - {PRESEED_CONFIG}: None
269 20:27:55.068982 - {PRESEED_LOCAL}: None
270 20:27:55.069040 - {RAMDISK}: 13828679/tftp-deploy-l3paoah5/ramdisk/ramdisk.cpio.gz
271 20:27:55.069135 - {ROOT_PART}: None
272 20:27:55.069223 - {ROOT}: None
273 20:27:55.069343 - {SERVER_IP}: 192.168.201.1
274 20:27:55.069415 - {TEE}: None
275 20:27:55.069475 Parsed boot commands:
276 20:27:55.069532 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 20:27:55.069734 Parsed boot commands: tftpboot 192.168.201.1 13828679/tftp-deploy-l3paoah5/kernel/image.itb 13828679/tftp-deploy-l3paoah5/kernel/cmdline
278 20:27:55.069858 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 20:27:55.069978 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 20:27:55.070090 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 20:27:55.070192 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 20:27:55.070271 Not connected, no need to disconnect.
283 20:27:55.070348 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 20:27:55.070434 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 20:27:55.070503 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
286 20:27:55.074684 Setting prompt string to ['lava-test: # ']
287 20:27:55.075163 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 20:27:55.075320 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 20:27:55.075462 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 20:27:55.075596 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 20:27:55.075918 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
292 20:28:17.932235 Returned 0 in 22 seconds
293 20:28:18.033442 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 20:28:18.034798 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 20:28:18.035378 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 20:28:18.035813 Setting prompt string to 'Starting depthcharge on Juniper...'
298 20:28:18.036198 Changing prompt to 'Starting depthcharge on Juniper...'
299 20:28:18.036546 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 20:28:18.038442 [Enter `^Ec?' for help]
301 20:28:18.038965 [DL] 00000000 00000000 010701
302 20:28:18.039314
303 20:28:18.039761
304 20:28:18.040097 F0: 102B 0000
305 20:28:18.040409
306 20:28:18.040717 F3: 1006 0033 [0200]
307 20:28:18.041003
308 20:28:18.041335 F3: 4001 00E0 [0200]
309 20:28:18.041650
310 20:28:18.042004 F3: 0000 0000
311 20:28:18.042313
312 20:28:18.042595 V0: 0000 0000 [0001]
313 20:28:18.042989
314 20:28:18.043288 00: 1027 0002
315 20:28:18.043590
316 20:28:18.043872 01: 0000 0000
317 20:28:18.044159
318 20:28:18.044435 BP: 0C00 0251 [0000]
319 20:28:18.044712
320 20:28:18.044989 G0: 1182 0000
321 20:28:18.045291
322 20:28:18.045643 EC: 0004 0000 [0001]
323 20:28:18.045993
324 20:28:18.046276 S7: 0000 0000 [0000]
325 20:28:18.046554
326 20:28:18.046827 CC: 0000 0000 [0001]
327 20:28:18.047103
328 20:28:18.047377 T0: 0000 00DB [000F]
329 20:28:18.047655
330 20:28:18.048005 Jump to BL
331 20:28:18.048456
332 20:28:18.048788
333 20:28:18.049073
334 20:28:18.049437 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 20:28:18.049753 ARM64: Exception handlers installed.
336 20:28:18.050035 ARM64: Testing exception
337 20:28:18.050313 ARM64: Done test exception
338 20:28:18.050588 WDT: Last reset was cold boot
339 20:28:18.050901 SPI0(PAD0) initialized at 992727 Hz
340 20:28:18.051198 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 20:28:18.051481 Manufacturer: ef
342 20:28:18.051757 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 20:28:18.052033 Probing TPM: . done!
344 20:28:18.052422 TPM ready after 0 ms
345 20:28:18.052709 Connected to device vid:did:rid of 1ae0:0028:00
346 20:28:18.052989 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 20:28:18.053449 Initialized TPM device CR50 revision 0
348 20:28:18.053743 tlcl_send_startup: Startup return code is 0
349 20:28:18.054026 TPM: setup succeeded
350 20:28:18.054304 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 20:28:18.054585 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 20:28:18.054862 in-header: 03 19 00 00 08 00 00 00
353 20:28:18.055216 in-data: a2 e0 47 00 13 00 00 00
354 20:28:18.055453 Chrome EC: UHEPI supported
355 20:28:18.055653 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 20:28:18.055852 in-header: 03 a1 00 00 08 00 00 00
357 20:28:18.056049 in-data: 84 60 60 10 00 00 00 00
358 20:28:18.056247 Phase 1
359 20:28:18.056445 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 20:28:18.056646 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 20:28:18.056844 VB2:vb2_check_recovery() Recovery was requested manually
362 20:28:18.057043 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 20:28:18.057240 Recovery requested (1009000e)
364 20:28:18.057492 tlcl_extend: response is 0
365 20:28:18.057690 tlcl_extend: response is 0
366 20:28:18.057885
367 20:28:18.058079
368 20:28:18.058275 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 20:28:18.058513 ARM64: Exception handlers installed.
370 20:28:18.058742 ARM64: Testing exception
371 20:28:18.058943 ARM64: Done test exception
372 20:28:18.059161 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2002
373 20:28:18.059419 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 20:28:18.059624 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 20:28:18.059822 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
376 20:28:18.060021 [RTC]rtc_get_frequency_meter,134: input=0x7, output=735
377 20:28:18.060217 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
378 20:28:18.060383 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
379 20:28:18.060531 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
380 20:28:18.060677 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
381 20:28:18.060824 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
382 20:28:18.060970 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
383 20:28:18.061118 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 20:28:18.061311 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 20:28:18.061471 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 20:28:18.061621 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 20:28:18.061776 in-header: 03 19 00 00 08 00 00 00
388 20:28:18.061971 in-data: a2 e0 47 00 13 00 00 00
389 20:28:18.062124 Chrome EC: UHEPI supported
390 20:28:18.062274 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 20:28:18.062425 in-header: 03 a1 00 00 08 00 00 00
392 20:28:18.062572 in-data: 84 60 60 10 00 00 00 00
393 20:28:18.062719 Skip loading cached calibration data
394 20:28:18.062867 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 20:28:18.063017 in-header: 03 a1 00 00 08 00 00 00
396 20:28:18.063163 in-data: 84 60 60 10 00 00 00 00
397 20:28:18.063311 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 20:28:18.063460 in-header: 03 a1 00 00 08 00 00 00
399 20:28:18.063650 in-data: 84 60 60 10 00 00 00 00
400 20:28:18.063801 ADC[3]: Raw value=1036764 ID=8
401 20:28:18.063950 Manufacturer: ef
402 20:28:18.064098 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 20:28:18.064248 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 20:28:18.064396 CBFS @ 21000 size 3d4000
405 20:28:18.064545 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 20:28:18.064692 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
407 20:28:18.064840 CBFS: Found @ offset 3c880 size 4b
408 20:28:18.064986 DRAM-K: Full Calibration
409 20:28:18.065207 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 20:28:18.065378 CBFS @ 21000 size 3d4000
411 20:28:18.065498 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 20:28:18.065618 CBFS: Locating 'fallback/dram'
413 20:28:18.065737 CBFS: Found @ offset 24b00 size 12268
414 20:28:18.065855 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 20:28:18.065974 ddr_geometry: 1, config: 0x0
416 20:28:18.066093 header.status = 0x0
417 20:28:18.066211 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 20:28:18.066329 header.version = 0x5 (expected: 0x5)
419 20:28:18.066686 header.size = 0x8f0 (expected: 0x8f0)
420 20:28:18.066831 header.config = 0x0
421 20:28:18.066953 header.flags = 0x0
422 20:28:18.067074 header.checksum = 0x0
423 20:28:18.067194 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 20:28:18.067313 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 20:28:18.067434 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 20:28:18.067553 ddr_geometry:1
427 20:28:18.067672 [EMI] new MDL number = 1
428 20:28:18.067790 dram_cbt_mode_extern: 0
429 20:28:18.067907 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 20:28:18.068025 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 20:28:18.068146
432 20:28:18.068265
433 20:28:18.068383 [Bianco] ETT version 0.0.0.1
434 20:28:18.068547 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 20:28:18.068674
436 20:28:18.068795 vSetVcoreByFreq with vcore:762500, freq=1600
437 20:28:18.068919
438 20:28:18.069036 [DramcInit]
439 20:28:18.069154 AutoRefreshCKEOff AutoREF OFF
440 20:28:18.069289 DDRPhyPLLSetting-CKEOFF
441 20:28:18.069412 DDRPhyPLLSetting-CKEON
442 20:28:18.069529
443 20:28:18.069648 Enable WDQS
444 20:28:18.069767 [ModeRegInit_LP4] CH0 RK0
445 20:28:18.069886 Write Rank0 MR13 =0x18
446 20:28:18.070004 Write Rank0 MR12 =0x5d
447 20:28:18.070121 Write Rank0 MR1 =0x56
448 20:28:18.070252 Write Rank0 MR2 =0x1a
449 20:28:18.070350 Write Rank0 MR11 =0x0
450 20:28:18.070448 Write Rank0 MR22 =0x38
451 20:28:18.070546 Write Rank0 MR14 =0x5d
452 20:28:18.070643 Write Rank0 MR3 =0x30
453 20:28:18.070740 Write Rank0 MR13 =0x58
454 20:28:18.070838 Write Rank0 MR12 =0x5d
455 20:28:18.070935 Write Rank0 MR1 =0x56
456 20:28:18.071033 Write Rank0 MR2 =0x2d
457 20:28:18.071130 Write Rank0 MR11 =0x23
458 20:28:18.071227 Write Rank0 MR22 =0x34
459 20:28:18.071331 Write Rank0 MR14 =0x10
460 20:28:18.071442 Write Rank0 MR3 =0x30
461 20:28:18.071541 Write Rank0 MR13 =0xd8
462 20:28:18.071639 [ModeRegInit_LP4] CH0 RK1
463 20:28:18.071738 Write Rank1 MR13 =0x18
464 20:28:18.071835 Write Rank1 MR12 =0x5d
465 20:28:18.071933 Write Rank1 MR1 =0x56
466 20:28:18.072031 Write Rank1 MR2 =0x1a
467 20:28:18.072169 Write Rank1 MR11 =0x0
468 20:28:18.072273 Write Rank1 MR22 =0x38
469 20:28:18.072373 Write Rank1 MR14 =0x5d
470 20:28:18.072472 Write Rank1 MR3 =0x30
471 20:28:18.072571 Write Rank1 MR13 =0x58
472 20:28:18.072669 Write Rank1 MR12 =0x5d
473 20:28:18.072767 Write Rank1 MR1 =0x56
474 20:28:18.072865 Write Rank1 MR2 =0x2d
475 20:28:18.072962 Write Rank1 MR11 =0x23
476 20:28:18.073059 Write Rank1 MR22 =0x34
477 20:28:18.073157 Write Rank1 MR14 =0x10
478 20:28:18.073262 Write Rank1 MR3 =0x30
479 20:28:18.073370 Write Rank1 MR13 =0xd8
480 20:28:18.073469 [ModeRegInit_LP4] CH1 RK0
481 20:28:18.073568 Write Rank0 MR13 =0x18
482 20:28:18.073666 Write Rank0 MR12 =0x5d
483 20:28:18.073764 Write Rank0 MR1 =0x56
484 20:28:18.073862 Write Rank0 MR2 =0x1a
485 20:28:18.073960 Write Rank0 MR11 =0x0
486 20:28:18.074058 Write Rank0 MR22 =0x38
487 20:28:18.074156 Write Rank0 MR14 =0x5d
488 20:28:18.074253 Write Rank0 MR3 =0x30
489 20:28:18.074351 Write Rank0 MR13 =0x58
490 20:28:18.074448 Write Rank0 MR12 =0x5d
491 20:28:18.074546 Write Rank0 MR1 =0x56
492 20:28:18.074643 Write Rank0 MR2 =0x2d
493 20:28:18.074741 Write Rank0 MR11 =0x23
494 20:28:18.074839 Write Rank0 MR22 =0x34
495 20:28:18.074937 Write Rank0 MR14 =0x10
496 20:28:18.075074 Write Rank0 MR3 =0x30
497 20:28:18.075178 Write Rank0 MR13 =0xd8
498 20:28:18.075291 [ModeRegInit_LP4] CH1 RK1
499 20:28:18.075375 Write Rank1 MR13 =0x18
500 20:28:18.075461 Write Rank1 MR12 =0x5d
501 20:28:18.075545 Write Rank1 MR1 =0x56
502 20:28:18.075630 Write Rank1 MR2 =0x1a
503 20:28:18.075715 Write Rank1 MR11 =0x0
504 20:28:18.075799 Write Rank1 MR22 =0x38
505 20:28:18.075884 Write Rank1 MR14 =0x5d
506 20:28:18.075968 Write Rank1 MR3 =0x30
507 20:28:18.076052 Write Rank1 MR13 =0x58
508 20:28:18.076136 Write Rank1 MR12 =0x5d
509 20:28:18.076220 Write Rank1 MR1 =0x56
510 20:28:18.076304 Write Rank1 MR2 =0x2d
511 20:28:18.076387 Write Rank1 MR11 =0x23
512 20:28:18.076471 Write Rank1 MR22 =0x34
513 20:28:18.076555 Write Rank1 MR14 =0x10
514 20:28:18.076639 Write Rank1 MR3 =0x30
515 20:28:18.076722 Write Rank1 MR13 =0xd8
516 20:28:18.076806 match AC timing 3
517 20:28:18.076891 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 20:28:18.076977 [MiockJmeterHQA]
519 20:28:18.077061 vSetVcoreByFreq with vcore:762500, freq=1600
520 20:28:18.077146
521 20:28:18.077231 MIOCK jitter meter ch=0
522 20:28:18.077334
523 20:28:18.077421 1T = (100-18) = 82 dly cells
524 20:28:18.077512 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
525 20:28:18.077599 vSetVcoreByFreq with vcore:725000, freq=1200
526 20:28:18.077683
527 20:28:18.077783 MIOCK jitter meter ch=0
528 20:28:18.077877
529 20:28:18.077964 1T = (95-17) = 78 dly cells
530 20:28:18.078055 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
531 20:28:18.078142 vSetVcoreByFreq with vcore:725000, freq=800
532 20:28:18.078226
533 20:28:18.078311 MIOCK jitter meter ch=0
534 20:28:18.078395
535 20:28:18.078512 1T = (95-17) = 78 dly cells
536 20:28:18.078602 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
537 20:28:18.078689 vSetVcoreByFreq with vcore:762500, freq=1600
538 20:28:18.078774 vSetVcoreByFreq with vcore:762500, freq=1600
539 20:28:18.078860
540 20:28:18.078956 K DRVP
541 20:28:18.079041 1. OCD DRVP=0 CALOUT=0
542 20:28:18.079129 1. OCD DRVP=1 CALOUT=0
543 20:28:18.079216 1. OCD DRVP=2 CALOUT=0
544 20:28:18.079302 1. OCD DRVP=3 CALOUT=0
545 20:28:18.079388 1. OCD DRVP=4 CALOUT=0
546 20:28:18.079474 1. OCD DRVP=5 CALOUT=0
547 20:28:18.079560 1. OCD DRVP=6 CALOUT=0
548 20:28:18.079646 1. OCD DRVP=7 CALOUT=0
549 20:28:18.079732 1. OCD DRVP=8 CALOUT=0
550 20:28:18.079818 1. OCD DRVP=9 CALOUT=1
551 20:28:18.079904
552 20:28:18.079989 1. OCD DRVP calibration OK! DRVP=9
553 20:28:18.080076
554 20:28:18.080160
555 20:28:18.080245
556 20:28:18.080334 K ODTN
557 20:28:18.080408 3. OCD ODTN=0 ,CALOUT=1
558 20:28:18.080488 3. OCD ODTN=1 ,CALOUT=1
559 20:28:18.080564 3. OCD ODTN=2 ,CALOUT=1
560 20:28:18.080640 3. OCD ODTN=3 ,CALOUT=1
561 20:28:18.080715 3. OCD ODTN=4 ,CALOUT=1
562 20:28:18.080791 3. OCD ODTN=5 ,CALOUT=1
563 20:28:18.080866 3. OCD ODTN=6 ,CALOUT=1
564 20:28:18.080942 3. OCD ODTN=7 ,CALOUT=0
565 20:28:18.081016
566 20:28:18.081089 3. OCD ODTN calibration OK! ODTN=7
567 20:28:18.081165
568 20:28:18.081240 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
569 20:28:18.081328 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
570 20:28:18.081405 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
571 20:28:18.081480
572 20:28:18.081555 K DRVP
573 20:28:18.081629 1. OCD DRVP=0 CALOUT=0
574 20:28:18.081713 1. OCD DRVP=1 CALOUT=0
575 20:28:18.081829 1. OCD DRVP=2 CALOUT=0
576 20:28:18.081911 1. OCD DRVP=3 CALOUT=0
577 20:28:18.081987 1. OCD DRVP=4 CALOUT=0
578 20:28:18.082063 1. OCD DRVP=5 CALOUT=0
579 20:28:18.082139 1. OCD DRVP=6 CALOUT=0
580 20:28:18.082214 1. OCD DRVP=7 CALOUT=0
581 20:28:18.082289 1. OCD DRVP=8 CALOUT=0
582 20:28:18.082365 1. OCD DRVP=9 CALOUT=0
583 20:28:18.082644 1. OCD DRVP=10 CALOUT=1
584 20:28:18.082734
585 20:28:18.082812 1. OCD DRVP calibration OK! DRVP=10
586 20:28:18.082890
587 20:28:18.082964
588 20:28:18.083038
589 20:28:18.083112 K ODTN
590 20:28:18.083187 3. OCD ODTN=0 ,CALOUT=1
591 20:28:18.083264 3. OCD ODTN=1 ,CALOUT=1
592 20:28:18.083340 3. OCD ODTN=2 ,CALOUT=1
593 20:28:18.083416 3. OCD ODTN=3 ,CALOUT=1
594 20:28:18.083491 3. OCD ODTN=4 ,CALOUT=1
595 20:28:18.083567 3. OCD ODTN=5 ,CALOUT=1
596 20:28:18.083643 3. OCD ODTN=6 ,CALOUT=1
597 20:28:18.083718 3. OCD ODTN=7 ,CALOUT=1
598 20:28:18.083809 3. OCD ODTN=8 ,CALOUT=1
599 20:28:18.083937 3. OCD ODTN=9 ,CALOUT=1
600 20:28:18.084018 3. OCD ODTN=10 ,CALOUT=1
601 20:28:18.084095 3. OCD ODTN=11 ,CALOUT=1
602 20:28:18.084171 3. OCD ODTN=12 ,CALOUT=1
603 20:28:18.084246 3. OCD ODTN=13 ,CALOUT=1
604 20:28:18.084322 3. OCD ODTN=14 ,CALOUT=0
605 20:28:18.084397
606 20:28:18.084471 3. OCD ODTN calibration OK! ODTN=14
607 20:28:18.084549
608 20:28:18.084623 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
609 20:28:18.084699 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
610 20:28:18.084774 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
611 20:28:18.084849
612 20:28:18.084923 [DramcInit]
613 20:28:18.084997 AutoRefreshCKEOff AutoREF OFF
614 20:28:18.085071 DDRPhyPLLSetting-CKEOFF
615 20:28:18.085145 DDRPhyPLLSetting-CKEON
616 20:28:18.085219
617 20:28:18.085314 Enable WDQS
618 20:28:18.085381 ==
619 20:28:18.085448 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 20:28:18.085515 fsp= 1, odt_onoff= 1, Byte mode= 0
621 20:28:18.085582 ==
622 20:28:18.085675 [Duty_Offset_Calibration]
623 20:28:18.085745
624 20:28:18.085812 ===========================
625 20:28:18.085879 B0:0 B1:1 CA:1
626 20:28:18.085945 ==
627 20:28:18.086011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 20:28:18.086078 fsp= 1, odt_onoff= 1, Byte mode= 0
629 20:28:18.086145 ==
630 20:28:18.086211 [Duty_Offset_Calibration]
631 20:28:18.086278
632 20:28:18.086367 ===========================
633 20:28:18.086436 B0:1 B1:1 CA:0
634 20:28:18.086502 [ModeRegInit_LP4] CH0 RK0
635 20:28:18.086568 Write Rank0 MR13 =0x18
636 20:28:18.086634 Write Rank0 MR12 =0x5d
637 20:28:18.086700 Write Rank0 MR1 =0x56
638 20:28:18.086766 Write Rank0 MR2 =0x1a
639 20:28:18.086832 Write Rank0 MR11 =0x0
640 20:28:18.086898 Write Rank0 MR22 =0x38
641 20:28:18.086963 Write Rank0 MR14 =0x5d
642 20:28:18.087029 Write Rank0 MR3 =0x30
643 20:28:18.087094 Write Rank0 MR13 =0x58
644 20:28:18.087160 Write Rank0 MR12 =0x5d
645 20:28:18.087225 Write Rank0 MR1 =0x56
646 20:28:18.087291 Write Rank0 MR2 =0x2d
647 20:28:18.087358 Write Rank0 MR11 =0x23
648 20:28:18.087423 Write Rank0 MR22 =0x34
649 20:28:18.087490 Write Rank0 MR14 =0x10
650 20:28:18.087555 Write Rank0 MR3 =0x30
651 20:28:18.087621 Write Rank0 MR13 =0xd8
652 20:28:18.087686 [ModeRegInit_LP4] CH0 RK1
653 20:28:18.087751 Write Rank1 MR13 =0x18
654 20:28:18.087817 Write Rank1 MR12 =0x5d
655 20:28:18.087882 Write Rank1 MR1 =0x56
656 20:28:18.087948 Write Rank1 MR2 =0x1a
657 20:28:18.088013 Write Rank1 MR11 =0x0
658 20:28:18.088079 Write Rank1 MR22 =0x38
659 20:28:18.088144 Write Rank1 MR14 =0x5d
660 20:28:18.088210 Write Rank1 MR3 =0x30
661 20:28:18.088276 Write Rank1 MR13 =0x58
662 20:28:18.088342 Write Rank1 MR12 =0x5d
663 20:28:18.088408 Write Rank1 MR1 =0x56
664 20:28:18.088498 Write Rank1 MR2 =0x2d
665 20:28:18.088566 Write Rank1 MR11 =0x23
666 20:28:18.088633 Write Rank1 MR22 =0x34
667 20:28:18.088699 Write Rank1 MR14 =0x10
668 20:28:18.088765 Write Rank1 MR3 =0x30
669 20:28:18.088830 Write Rank1 MR13 =0xd8
670 20:28:18.088896 [ModeRegInit_LP4] CH1 RK0
671 20:28:18.088962 Write Rank0 MR13 =0x18
672 20:28:18.089027 Write Rank0 MR12 =0x5d
673 20:28:18.089093 Write Rank0 MR1 =0x56
674 20:28:18.089159 Write Rank0 MR2 =0x1a
675 20:28:18.089225 Write Rank0 MR11 =0x0
676 20:28:18.089302 Write Rank0 MR22 =0x38
677 20:28:18.089369 Write Rank0 MR14 =0x5d
678 20:28:18.089435 Write Rank0 MR3 =0x30
679 20:28:18.089501 Write Rank0 MR13 =0x58
680 20:28:18.089566 Write Rank0 MR12 =0x5d
681 20:28:18.089632 Write Rank0 MR1 =0x56
682 20:28:18.089698 Write Rank0 MR2 =0x2d
683 20:28:18.089764 Write Rank0 MR11 =0x23
684 20:28:18.089829 Write Rank0 MR22 =0x34
685 20:28:18.089895 Write Rank0 MR14 =0x10
686 20:28:18.089960 Write Rank0 MR3 =0x30
687 20:28:18.090026 Write Rank0 MR13 =0xd8
688 20:28:18.090092 [ModeRegInit_LP4] CH1 RK1
689 20:28:18.090158 Write Rank1 MR13 =0x18
690 20:28:18.090235 Write Rank1 MR12 =0x5d
691 20:28:18.090295 Write Rank1 MR1 =0x56
692 20:28:18.090353 Write Rank1 MR2 =0x1a
693 20:28:18.090412 Write Rank1 MR11 =0x0
694 20:28:18.090471 Write Rank1 MR22 =0x38
695 20:28:18.090531 Write Rank1 MR14 =0x5d
696 20:28:18.090590 Write Rank1 MR3 =0x30
697 20:28:18.090649 Write Rank1 MR13 =0x58
698 20:28:18.090708 Write Rank1 MR12 =0x5d
699 20:28:18.090768 Write Rank1 MR1 =0x56
700 20:28:18.090827 Write Rank1 MR2 =0x2d
701 20:28:18.090887 Write Rank1 MR11 =0x23
702 20:28:18.090946 Write Rank1 MR22 =0x34
703 20:28:18.091005 Write Rank1 MR14 =0x10
704 20:28:18.091064 Write Rank1 MR3 =0x30
705 20:28:18.091123 Write Rank1 MR13 =0xd8
706 20:28:18.091182 match AC timing 3
707 20:28:18.091241 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 20:28:18.091302 DramC Write-DBI off
709 20:28:18.091361 DramC Read-DBI off
710 20:28:18.091420 Write Rank0 MR13 =0x59
711 20:28:18.091479 ==
712 20:28:18.091539 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 20:28:18.091599 fsp= 1, odt_onoff= 1, Byte mode= 0
714 20:28:18.091659 ==
715 20:28:18.091718 === u2Vref_new: 0x56 --> 0x2d
716 20:28:18.091778 === u2Vref_new: 0x58 --> 0x38
717 20:28:18.091838 === u2Vref_new: 0x5a --> 0x39
718 20:28:18.091897 === u2Vref_new: 0x5c --> 0x3c
719 20:28:18.091956 === u2Vref_new: 0x5e --> 0x3d
720 20:28:18.092027 === u2Vref_new: 0x60 --> 0xa0
721 20:28:18.092095
722 20:28:18.092155 CBT Vref found, early break!
723 20:28:18.092216 [CA 0] Center 33 (4~63) winsize 60
724 20:28:18.092276 [CA 1] Center 34 (5~63) winsize 59
725 20:28:18.092335 [CA 2] Center 29 (1~57) winsize 57
726 20:28:18.092395 [CA 3] Center 24 (-3~51) winsize 55
727 20:28:18.092455 [CA 4] Center 25 (-2~53) winsize 56
728 20:28:18.092514 [CA 5] Center 30 (2~58) winsize 57
729 20:28:18.092574
730 20:28:18.092633 [CATrainingPosCal] consider 1 rank data
731 20:28:18.092692 u2DelayCellTimex100 = 762/100 ps
732 20:28:18.092752 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
733 20:28:18.092812 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
734 20:28:18.092872 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
735 20:28:18.092932 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
736 20:28:18.092991 CA4 delay=25 (-2~53),Diff = 1 PI (1 cell)
737 20:28:18.093051 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
738 20:28:18.093110
739 20:28:18.093171 CA PerBit enable=1, Macro0, CA PI delay=24
740 20:28:18.093232 === u2Vref_new: 0x56 --> 0x2d
741 20:28:18.093298
742 20:28:18.093359 Vref(ca) range 1: 22
743 20:28:18.093419
744 20:28:18.093478 CS Dly= 10 (41-0-32)
745 20:28:18.093538 Write Rank0 MR13 =0xd8
746 20:28:18.093597 Write Rank0 MR13 =0xd8
747 20:28:18.093655 Write Rank0 MR12 =0x56
748 20:28:18.093920 Write Rank1 MR13 =0x59
749 20:28:18.093987 ==
750 20:28:18.094049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
751 20:28:18.094110 fsp= 1, odt_onoff= 1, Byte mode= 0
752 20:28:18.094171 ==
753 20:28:18.094231 === u2Vref_new: 0x56 --> 0x2d
754 20:28:18.094291 === u2Vref_new: 0x58 --> 0x38
755 20:28:18.094351 === u2Vref_new: 0x5a --> 0x39
756 20:28:18.094412 === u2Vref_new: 0x5c --> 0x3c
757 20:28:18.094471 === u2Vref_new: 0x5e --> 0x3d
758 20:28:18.094530 === u2Vref_new: 0x60 --> 0xa0
759 20:28:18.094590 [CA 0] Center 34 (5~63) winsize 59
760 20:28:18.094650 [CA 1] Center 34 (6~63) winsize 58
761 20:28:18.094709 [CA 2] Center 29 (1~58) winsize 58
762 20:28:18.094768 [CA 3] Center 23 (-4~51) winsize 56
763 20:28:18.094828 [CA 4] Center 24 (-3~52) winsize 56
764 20:28:18.094887 [CA 5] Center 30 (1~59) winsize 59
765 20:28:18.094946
766 20:28:18.095006 [CATrainingPosCal] consider 2 rank data
767 20:28:18.095065 u2DelayCellTimex100 = 762/100 ps
768 20:28:18.095127 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
769 20:28:18.095187 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
770 20:28:18.095247 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
771 20:28:18.095316 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
772 20:28:18.095370 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
773 20:28:18.095424 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
774 20:28:18.095478
775 20:28:18.095532 CA PerBit enable=1, Macro0, CA PI delay=24
776 20:28:18.095587 === u2Vref_new: 0x56 --> 0x2d
777 20:28:18.095641
778 20:28:18.095706 Vref(ca) range 1: 22
779 20:28:18.095768
780 20:28:18.095823 CS Dly= 11 (42-0-32)
781 20:28:18.095878 Write Rank1 MR13 =0xd8
782 20:28:18.095932 Write Rank1 MR13 =0xd8
783 20:28:18.095986 Write Rank1 MR12 =0x56
784 20:28:18.096040 [RankSwap] Rank num 2, (Multi 1), Rank 0
785 20:28:18.096094 Write Rank0 MR2 =0xad
786 20:28:18.096148 [Write Leveling]
787 20:28:18.096201 delay byte0 byte1 byte2 byte3
788 20:28:18.096255
789 20:28:18.096309 10 0 0
790 20:28:18.096363 11 0 0
791 20:28:18.096418 12 0 0
792 20:28:18.096473 13 0 0
793 20:28:18.096527 14 0 0
794 20:28:18.096581 15 0 0
795 20:28:18.096636 16 0 0
796 20:28:18.096691 17 0 0
797 20:28:18.096746 18 0 0
798 20:28:18.096800 19 0 0
799 20:28:18.096854 20 0 0
800 20:28:18.096909 21 0 0
801 20:28:18.096963 22 0 0
802 20:28:18.097017 23 0 0
803 20:28:18.097072 24 0 0
804 20:28:18.097126 25 0 0
805 20:28:18.097181 26 0 0
806 20:28:18.097235 27 0 0
807 20:28:18.097313 28 0 0
808 20:28:18.097370 29 0 ff
809 20:28:18.097425 30 0 ff
810 20:28:18.097481 31 ff ff
811 20:28:18.097535 32 0 ff
812 20:28:18.097591 33 ff ff
813 20:28:18.097646 34 ff ff
814 20:28:18.097701 35 ff ff
815 20:28:18.097756 36 ff ff
816 20:28:18.097810 37 ff ff
817 20:28:18.097865 38 ff ff
818 20:28:18.097920 39 ff ff
819 20:28:18.097975 pass bytecount = 0xff (0xff: all bytes pass)
820 20:28:18.098029
821 20:28:18.098084 DQS0 dly: 33
822 20:28:18.098138 DQS1 dly: 29
823 20:28:18.098191 Write Rank0 MR2 =0x2d
824 20:28:18.098246 [RankSwap] Rank num 2, (Multi 1), Rank 0
825 20:28:18.098300 Write Rank0 MR1 =0xd6
826 20:28:18.098354 [Gating]
827 20:28:18.098411 ==
828 20:28:18.098486 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
829 20:28:18.098542 fsp= 1, odt_onoff= 1, Byte mode= 0
830 20:28:18.098597 ==
831 20:28:18.098652 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
832 20:28:18.098708 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 20:28:18.098763 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 20:28:18.098829 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 20:28:18.098894 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 20:28:18.098950 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 20:28:18.099005 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 20:28:18.099061 3 1 28 |2c2c 2c2b |(11 0)(11 11) |(1 0)(1 0)| 0
839 20:28:18.099116 3 2 0 |404 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
840 20:28:18.099172 3 2 4 |3534 302 |(11 11)(11 11) |(0 0)(0 0)| 0
841 20:28:18.099227 3 2 8 |3534 f0f |(11 11)(11 11) |(0 0)(0 0)| 0
842 20:28:18.099281 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 20:28:18.099336 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 20:28:18.099391 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 20:28:18.099446 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 20:28:18.099501 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
847 20:28:18.099556 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 20:28:18.099611 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 20:28:18.099666 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 20:28:18.099721 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 20:28:18.099777 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 20:28:18.099832 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 20:28:18.099887 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
854 20:28:18.099941 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 20:28:18.099996 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
856 20:28:18.100051 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
857 20:28:18.100106 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 20:28:18.100162 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 20:28:18.100229 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 20:28:18.100283 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 20:28:18.100337 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 20:28:18.100391 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 20:28:18.100445 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 20:28:18.100499 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 20:28:18.100553 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 20:28:18.100606 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 20:28:18.100660 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 20:28:18.100714 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 20:28:18.100768 [Byte 0] Lead/lag falling Transition (3, 5, 20)
870 20:28:18.100822 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
871 20:28:18.100876 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 20:28:18.100929 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
873 20:28:18.101175 [Byte 0] Lead/lag Transition tap number (3)
874 20:28:18.101235 [Byte 1] Lead/lag Transition tap number (2)
875 20:28:18.101328 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
876 20:28:18.101384 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
877 20:28:18.101439 [Byte 0]First pass (3, 6, 4)
878 20:28:18.101492 3 6 8 |4646 3030 |(0 0)(1 1) |(0 0)(0 0)| 0
879 20:28:18.101547 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 20:28:18.101601 [Byte 1]First pass (3, 6, 12)
881 20:28:18.101732 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 20:28:18.101799 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 20:28:18.101853 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 20:28:18.101907 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 20:28:18.101961 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 20:28:18.102015 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 20:28:18.102069 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 20:28:18.102122 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 20:28:18.102176 All bytes gating window > 1UI, Early break!
890 20:28:18.102229
891 20:28:18.102282 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
892 20:28:18.102357
893 20:28:18.102413 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
894 20:28:18.102466
895 20:28:18.102519
896 20:28:18.102571
897 20:28:18.102624 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
898 20:28:18.102677
899 20:28:18.102730 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
900 20:28:18.102783
901 20:28:18.102835
902 20:28:18.102888 Write Rank0 MR1 =0x56
903 20:28:18.102941
904 20:28:18.102994 best RODT dly(2T, 0.5T) = (2, 2)
905 20:28:18.103046
906 20:28:18.103101 best RODT dly(2T, 0.5T) = (2, 2)
907 20:28:18.103154 ==
908 20:28:18.103206 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
909 20:28:18.103260 fsp= 1, odt_onoff= 1, Byte mode= 0
910 20:28:18.103313 ==
911 20:28:18.103366 Start DQ dly to find pass range UseTestEngine =0
912 20:28:18.103419 x-axis: bit #, y-axis: DQ dly (-127~63)
913 20:28:18.103472 RX Vref Scan = 0
914 20:28:18.103525 -26, [0] xxxxxxxx xxxxxxxx [MSB]
915 20:28:18.103582 -25, [0] xxxxxxxx xxxxxxxx [MSB]
916 20:28:18.103636 -24, [0] xxxxxxxx xxxxxxxx [MSB]
917 20:28:18.103690 -23, [0] xxxxxxxx xxxxxxxx [MSB]
918 20:28:18.103744 -22, [0] xxxxxxxx xxxxxxxx [MSB]
919 20:28:18.103797 -21, [0] xxxxxxxx xxxxxxxx [MSB]
920 20:28:18.103851 -20, [0] xxxxxxxx xxxxxxxx [MSB]
921 20:28:18.103905 -19, [0] xxxxxxxx xxxxxxxx [MSB]
922 20:28:18.103959 -18, [0] xxxxxxxx xxxxxxxx [MSB]
923 20:28:18.104013 -17, [0] xxxxxxxx xxxxxxxx [MSB]
924 20:28:18.104067 -16, [0] xxxxxxxx xxxxxxxx [MSB]
925 20:28:18.104121 -15, [0] xxxxxxxx xxxxxxxx [MSB]
926 20:28:18.104175 -14, [0] xxxxxxxx xxxxxxxx [MSB]
927 20:28:18.104229 -13, [0] xxxxxxxx xxxxxxxx [MSB]
928 20:28:18.104282 -12, [0] xxxxxxxx xxxxxxxx [MSB]
929 20:28:18.104336 -11, [0] xxxxxxxx xxxxxxxx [MSB]
930 20:28:18.104389 -10, [0] xxxxxxxx xxxxxxxx [MSB]
931 20:28:18.104443 -9, [0] xxxxxxxx xxxxxxxx [MSB]
932 20:28:18.104498 -8, [0] xxxxxxxx xxxxxxxx [MSB]
933 20:28:18.104552 -7, [0] xxxxxxxx xxxxxxxx [MSB]
934 20:28:18.104605 -6, [0] xxxxxxxx xxxxxxxx [MSB]
935 20:28:18.104659 -5, [0] xxxxxxxx xxxxxxxx [MSB]
936 20:28:18.104713 -4, [0] xxxxxxxx xxxxxxxx [MSB]
937 20:28:18.104767 -3, [0] xxxxxxxx xxxxxxxx [MSB]
938 20:28:18.104820 -2, [0] xxxxxxxx xxxxxxxx [MSB]
939 20:28:18.104874 -1, [0] xxxxxxxx xxxxxxxx [MSB]
940 20:28:18.104928 0, [0] xxxoxoxx xxxxxxxx [MSB]
941 20:28:18.104982 1, [0] xxxoxoxx xxxoxxxx [MSB]
942 20:28:18.105036 2, [0] xxxoxoxo xxxoxxxx [MSB]
943 20:28:18.105094 3, [0] xxxoxooo oxxoxoox [MSB]
944 20:28:18.105148 4, [0] xxxoxooo oxxoxoox [MSB]
945 20:28:18.105202 5, [0] xxxoxooo ooxooooo [MSB]
946 20:28:18.105259 6, [0] xxxoxooo ooxooooo [MSB]
947 20:28:18.105373 7, [0] xxoooooo ooxooooo [MSB]
948 20:28:18.105429 8, [0] xooooooo ooxooooo [MSB]
949 20:28:18.105483 9, [0] xooooooo oooooooo [MSB]
950 20:28:18.105537 10, [0] xooooooo oooooooo [MSB]
951 20:28:18.105591 32, [0] oooxoooo oooooooo [MSB]
952 20:28:18.105646 33, [0] oooxoooo oooooxoo [MSB]
953 20:28:18.105700 34, [0] oooxoxoo oooooxxo [MSB]
954 20:28:18.105753 35, [0] oooxoxxx xooooxxo [MSB]
955 20:28:18.105807 36, [0] oooxoxxx xooxoxxx [MSB]
956 20:28:18.105861 37, [0] oooxoxxx xxoxxxxx [MSB]
957 20:28:18.105915 38, [0] oooxoxxx xxoxxxxx [MSB]
958 20:28:18.105969 39, [0] oooxoxxx xxoxxxxx [MSB]
959 20:28:18.106023 40, [0] oooxxxxx xxoxxxxx [MSB]
960 20:28:18.106077 41, [0] xoxxxxxx xxoxxxxx [MSB]
961 20:28:18.106131 42, [0] xxxxxxxx xxxxxxxx [MSB]
962 20:28:18.106185 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
963 20:28:18.106238 iDelay=42, Bit 1, Center 24 (8 ~ 41) 34
964 20:28:18.106291 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
965 20:28:18.106344 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
966 20:28:18.106397 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
967 20:28:18.106450 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
968 20:28:18.106502 iDelay=42, Bit 6, Center 18 (3 ~ 34) 32
969 20:28:18.106555 iDelay=42, Bit 7, Center 18 (2 ~ 34) 33
970 20:28:18.106608 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
971 20:28:18.106661 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
972 20:28:18.106716 iDelay=42, Bit 10, Center 25 (9 ~ 41) 33
973 20:28:18.106769 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
974 20:28:18.106822 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
975 20:28:18.106875 iDelay=42, Bit 13, Center 17 (3 ~ 32) 30
976 20:28:18.106927 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
977 20:28:18.106979 iDelay=42, Bit 15, Center 20 (5 ~ 35) 31
978 20:28:18.107032 ==
979 20:28:18.107084 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
980 20:28:18.107137 fsp= 1, odt_onoff= 1, Byte mode= 0
981 20:28:18.107191 ==
982 20:28:18.107244 DQS Delay:
983 20:28:18.107297 DQS0 = 0, DQS1 = 0
984 20:28:18.107349 DQM Delay:
985 20:28:18.107402 DQM0 = 20, DQM1 = 19
986 20:28:18.107455 DQ Delay:
987 20:28:18.107508 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
988 20:28:18.107561 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
989 20:28:18.107614 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18
990 20:28:18.107668 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
991 20:28:18.107721
992 20:28:18.107786
993 20:28:18.107840 DramC Write-DBI off
994 20:28:18.107893 ==
995 20:28:18.107968 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
996 20:28:18.108024 fsp= 1, odt_onoff= 1, Byte mode= 0
997 20:28:18.108078 ==
998 20:28:18.108132 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
999 20:28:18.108185
1000 20:28:18.108238 Begin, DQ Scan Range 925~1181
1001 20:28:18.108291
1002 20:28:18.108343
1003 20:28:18.108395 TX Vref Scan disable
1004 20:28:18.108448 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1005 20:28:18.108693 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1006 20:28:18.108781 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1007 20:28:18.108854 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1008 20:28:18.108939 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1009 20:28:18.108993 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1010 20:28:18.109047 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1011 20:28:18.109101 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1012 20:28:18.109156 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1013 20:28:18.109210 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1014 20:28:18.109285 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1015 20:28:18.109370 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1016 20:28:18.109465 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1017 20:28:18.109521 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1018 20:28:18.109577 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1019 20:28:18.109631 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1020 20:28:18.109685 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1021 20:28:18.109739 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1022 20:28:18.109794 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1023 20:28:18.109847 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1024 20:28:18.109934 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1025 20:28:18.109995 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1026 20:28:18.110051 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1027 20:28:18.110107 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1028 20:28:18.110162 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1029 20:28:18.110215 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1030 20:28:18.110269 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1031 20:28:18.110323 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1032 20:28:18.110376 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1033 20:28:18.110429 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1034 20:28:18.110483 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1035 20:28:18.110536 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1036 20:28:18.110590 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1037 20:28:18.110643 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1038 20:28:18.110697 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1039 20:28:18.110750 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1040 20:28:18.110804 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1041 20:28:18.110857 962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB]
1042 20:28:18.110911 963 |3 6 3|[0] xxxxxxxx oxxoxoxx [MSB]
1043 20:28:18.110965 964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]
1044 20:28:18.111019 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1045 20:28:18.111073 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1046 20:28:18.111126 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1047 20:28:18.111179 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1048 20:28:18.111232 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1049 20:28:18.111286 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1050 20:28:18.111339 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1051 20:28:18.111392 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1052 20:28:18.111445 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1053 20:28:18.111499 974 |3 6 14|[0] xxxoooox oooooooo [MSB]
1054 20:28:18.111551 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1055 20:28:18.111605 987 |3 6 27|[0] oooooooo oooooxoo [MSB]
1056 20:28:18.111659 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1057 20:28:18.111712 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1058 20:28:18.111765 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1059 20:28:18.111818 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1060 20:28:18.111872 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1061 20:28:18.111924 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1062 20:28:18.111977 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1063 20:28:18.112030 Byte0, DQ PI dly=982, DQM PI dly= 982
1064 20:28:18.112083 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1065 20:28:18.112137
1066 20:28:18.112199 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1067 20:28:18.112254
1068 20:28:18.112314 Byte1, DQ PI dly=976, DQM PI dly= 976
1069 20:28:18.112377 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1070 20:28:18.112431
1071 20:28:18.112484 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1072 20:28:18.112537
1073 20:28:18.112589 ==
1074 20:28:18.112641 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1075 20:28:18.112694 fsp= 1, odt_onoff= 1, Byte mode= 0
1076 20:28:18.112748 ==
1077 20:28:18.112799 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1078 20:28:18.112852
1079 20:28:18.112903 Begin, DQ Scan Range 952~1016
1080 20:28:18.112956 Write Rank0 MR14 =0x0
1081 20:28:18.113007
1082 20:28:18.113059 CH=0, VrefRange= 0, VrefLevel = 0
1083 20:28:18.113112 TX Bit0 (978~994) 17 986, Bit8 (966~984) 19 975,
1084 20:28:18.113166 TX Bit1 (977~993) 17 985, Bit9 (967~984) 18 975,
1085 20:28:18.113218 TX Bit2 (977~993) 17 985, Bit10 (970~990) 21 980,
1086 20:28:18.113320 TX Bit3 (971~986) 16 978, Bit11 (965~983) 19 974,
1087 20:28:18.113404 TX Bit4 (976~994) 19 985, Bit12 (967~984) 18 975,
1088 20:28:18.113489 TX Bit5 (973~988) 16 980, Bit13 (966~983) 18 974,
1089 20:28:18.113555 TX Bit6 (974~989) 16 981, Bit14 (968~984) 17 976,
1090 20:28:18.113610 TX Bit7 (977~991) 15 984, Bit15 (969~986) 18 977,
1091 20:28:18.113663
1092 20:28:18.113716 Write Rank0 MR14 =0x2
1093 20:28:18.113768
1094 20:28:18.113820 CH=0, VrefRange= 0, VrefLevel = 2
1095 20:28:18.113873 TX Bit0 (978~995) 18 986, Bit8 (966~984) 19 975,
1096 20:28:18.113926 TX Bit1 (977~993) 17 985, Bit9 (967~984) 18 975,
1097 20:28:18.113979 TX Bit2 (977~993) 17 985, Bit10 (970~990) 21 980,
1098 20:28:18.114032 TX Bit3 (971~987) 17 979, Bit11 (965~984) 20 974,
1099 20:28:18.114085 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1100 20:28:18.114137 TX Bit5 (972~988) 17 980, Bit13 (966~983) 18 974,
1101 20:28:18.114190 TX Bit6 (974~990) 17 982, Bit14 (967~985) 19 976,
1102 20:28:18.114243 TX Bit7 (977~991) 15 984, Bit15 (969~987) 19 978,
1103 20:28:18.114295
1104 20:28:18.114348 Write Rank0 MR14 =0x4
1105 20:28:18.114399
1106 20:28:18.114452 CH=0, VrefRange= 0, VrefLevel = 4
1107 20:28:18.114505 TX Bit0 (977~995) 19 986, Bit8 (966~985) 20 975,
1108 20:28:18.114558 TX Bit1 (977~994) 18 985, Bit9 (967~985) 19 976,
1109 20:28:18.114611 TX Bit2 (976~993) 18 984, Bit10 (970~990) 21 980,
1110 20:28:18.114664 TX Bit3 (970~988) 19 979, Bit11 (965~984) 20 974,
1111 20:28:18.114921 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1112 20:28:18.114981 TX Bit5 (972~989) 18 980, Bit13 (966~984) 19 975,
1113 20:28:18.115035 TX Bit6 (973~990) 18 981, Bit14 (967~985) 19 976,
1114 20:28:18.115089 TX Bit7 (977~992) 16 984, Bit15 (969~988) 20 978,
1115 20:28:18.115142
1116 20:28:18.115194 Write Rank0 MR14 =0x6
1117 20:28:18.115246
1118 20:28:18.115298 CH=0, VrefRange= 0, VrefLevel = 6
1119 20:28:18.115351 TX Bit0 (977~996) 20 986, Bit8 (965~985) 21 975,
1120 20:28:18.115403 TX Bit1 (976~994) 19 985, Bit9 (967~985) 19 976,
1121 20:28:18.115456 TX Bit2 (977~994) 18 985, Bit10 (970~990) 21 980,
1122 20:28:18.115513 TX Bit3 (970~988) 19 979, Bit11 (965~985) 21 975,
1123 20:28:18.115579 TX Bit4 (976~994) 19 985, Bit12 (966~985) 20 975,
1124 20:28:18.115633 TX Bit5 (971~990) 20 980, Bit13 (966~984) 19 975,
1125 20:28:18.115686 TX Bit6 (973~991) 19 982, Bit14 (967~986) 20 976,
1126 20:28:18.115739 TX Bit7 (976~992) 17 984, Bit15 (969~988) 20 978,
1127 20:28:18.115792
1128 20:28:18.115844 Write Rank0 MR14 =0x8
1129 20:28:18.115896
1130 20:28:18.115948 CH=0, VrefRange= 0, VrefLevel = 8
1131 20:28:18.116000 TX Bit0 (977~996) 20 986, Bit8 (965~986) 22 975,
1132 20:28:18.116053 TX Bit1 (977~994) 18 985, Bit9 (966~986) 21 976,
1133 20:28:18.116106 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1134 20:28:18.116159 TX Bit3 (970~988) 19 979, Bit11 (964~985) 22 974,
1135 20:28:18.116212 TX Bit4 (975~995) 21 985, Bit12 (966~985) 20 975,
1136 20:28:18.116266 TX Bit5 (971~990) 20 980, Bit13 (965~984) 20 974,
1137 20:28:18.116319 TX Bit6 (972~991) 20 981, Bit14 (967~986) 20 976,
1138 20:28:18.116371 TX Bit7 (976~992) 17 984, Bit15 (969~989) 21 979,
1139 20:28:18.116424
1140 20:28:18.116475 Write Rank0 MR14 =0xa
1141 20:28:18.116528
1142 20:28:18.116580 CH=0, VrefRange= 0, VrefLevel = 10
1143 20:28:18.116633 TX Bit0 (977~996) 20 986, Bit8 (965~986) 22 975,
1144 20:28:18.116686 TX Bit1 (976~995) 20 985, Bit9 (966~986) 21 976,
1145 20:28:18.116739 TX Bit2 (976~994) 19 985, Bit10 (970~991) 22 980,
1146 20:28:18.116791 TX Bit3 (969~989) 21 979, Bit11 (963~986) 24 974,
1147 20:28:18.116844 TX Bit4 (975~995) 21 985, Bit12 (966~986) 21 976,
1148 20:28:18.116897 TX Bit5 (971~991) 21 981, Bit13 (965~985) 21 975,
1149 20:28:18.116949 TX Bit6 (971~991) 21 981, Bit14 (966~987) 22 976,
1150 20:28:18.117002 TX Bit7 (976~993) 18 984, Bit15 (969~989) 21 979,
1151 20:28:18.117054
1152 20:28:18.117106 Write Rank0 MR14 =0xc
1153 20:28:18.117158
1154 20:28:18.117209 CH=0, VrefRange= 0, VrefLevel = 12
1155 20:28:18.117268 TX Bit0 (977~997) 21 987, Bit8 (964~987) 24 975,
1156 20:28:18.117355 TX Bit1 (976~995) 20 985, Bit9 (966~987) 22 976,
1157 20:28:18.117409 TX Bit2 (975~995) 21 985, Bit10 (969~991) 23 980,
1158 20:28:18.117461 TX Bit3 (969~990) 22 979, Bit11 (964~987) 24 975,
1159 20:28:18.117513 TX Bit4 (974~996) 23 985, Bit12 (966~987) 22 976,
1160 20:28:18.117566 TX Bit5 (971~991) 21 981, Bit13 (964~985) 22 974,
1161 20:28:18.117619 TX Bit6 (972~992) 21 982, Bit14 (966~988) 23 977,
1162 20:28:18.117672 TX Bit7 (976~993) 18 984, Bit15 (968~989) 22 978,
1163 20:28:18.117724
1164 20:28:18.117776 Write Rank0 MR14 =0xe
1165 20:28:18.117829
1166 20:28:18.117880 CH=0, VrefRange= 0, VrefLevel = 14
1167 20:28:18.117933 TX Bit0 (976~997) 22 986, Bit8 (964~987) 24 975,
1168 20:28:18.117996 TX Bit1 (976~996) 21 986, Bit9 (966~988) 23 977,
1169 20:28:18.118049 TX Bit2 (975~995) 21 985, Bit10 (969~991) 23 980,
1170 20:28:18.118102 TX Bit3 (969~991) 23 980, Bit11 (963~987) 25 975,
1171 20:28:18.118154 TX Bit4 (974~996) 23 985, Bit12 (965~988) 24 976,
1172 20:28:18.118207 TX Bit5 (970~991) 22 980, Bit13 (964~986) 23 975,
1173 20:28:18.118294 TX Bit6 (971~992) 22 981, Bit14 (965~989) 25 977,
1174 20:28:18.118351 TX Bit7 (975~994) 20 984, Bit15 (968~989) 22 978,
1175 20:28:18.118404
1176 20:28:18.118457 Write Rank0 MR14 =0x10
1177 20:28:18.118510
1178 20:28:18.118562 CH=0, VrefRange= 0, VrefLevel = 16
1179 20:28:18.118614 TX Bit0 (976~998) 23 987, Bit8 (964~988) 25 976,
1180 20:28:18.118667 TX Bit1 (976~996) 21 986, Bit9 (965~988) 24 976,
1181 20:28:18.118720 TX Bit2 (975~996) 22 985, Bit10 (969~992) 24 980,
1182 20:28:18.118783 TX Bit3 (969~991) 23 980, Bit11 (963~987) 25 975,
1183 20:28:18.118843 TX Bit4 (974~997) 24 985, Bit12 (965~989) 25 977,
1184 20:28:18.118897 TX Bit5 (970~992) 23 981, Bit13 (964~986) 23 975,
1185 20:28:18.118950 TX Bit6 (971~993) 23 982, Bit14 (965~989) 25 977,
1186 20:28:18.119003 TX Bit7 (975~994) 20 984, Bit15 (968~990) 23 979,
1187 20:28:18.119056
1188 20:28:18.119107 Write Rank0 MR14 =0x12
1189 20:28:18.119160
1190 20:28:18.119211 CH=0, VrefRange= 0, VrefLevel = 18
1191 20:28:18.119264 TX Bit0 (976~999) 24 987, Bit8 (963~989) 27 976,
1192 20:28:18.119317 TX Bit1 (976~997) 22 986, Bit9 (965~989) 25 977,
1193 20:28:18.119369 TX Bit2 (975~996) 22 985, Bit10 (969~992) 24 980,
1194 20:28:18.119422 TX Bit3 (969~991) 23 980, Bit11 (962~989) 28 975,
1195 20:28:18.119474 TX Bit4 (974~997) 24 985, Bit12 (965~989) 25 977,
1196 20:28:18.119527 TX Bit5 (970~992) 23 981, Bit13 (964~987) 24 975,
1197 20:28:18.119580 TX Bit6 (970~993) 24 981, Bit14 (965~989) 25 977,
1198 20:28:18.119632 TX Bit7 (975~994) 20 984, Bit15 (968~990) 23 979,
1199 20:28:18.119684
1200 20:28:18.119736 Write Rank0 MR14 =0x14
1201 20:28:18.119788
1202 20:28:18.119840 CH=0, VrefRange= 0, VrefLevel = 20
1203 20:28:18.119893 TX Bit0 (976~999) 24 987, Bit8 (963~989) 27 976,
1204 20:28:18.119946 TX Bit1 (975~997) 23 986, Bit9 (965~989) 25 977,
1205 20:28:18.119999 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1206 20:28:18.120052 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1207 20:28:18.120104 TX Bit4 (973~998) 26 985, Bit12 (965~989) 25 977,
1208 20:28:18.120156 TX Bit5 (970~993) 24 981, Bit13 (963~988) 26 975,
1209 20:28:18.120209 TX Bit6 (970~993) 24 981, Bit14 (964~989) 26 976,
1210 20:28:18.120262 TX Bit7 (974~995) 22 984, Bit15 (968~990) 23 979,
1211 20:28:18.120347
1212 20:28:18.120611 Write Rank0 MR14 =0x16
1213 20:28:18.120672
1214 20:28:18.120726 CH=0, VrefRange= 0, VrefLevel = 22
1215 20:28:18.120780 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1216 20:28:18.120834 TX Bit1 (975~998) 24 986, Bit9 (964~989) 26 976,
1217 20:28:18.120887 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
1218 20:28:18.120941 TX Bit3 (968~992) 25 980, Bit11 (962~989) 28 975,
1219 20:28:18.120994 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1220 20:28:18.121047 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1221 20:28:18.121100 TX Bit6 (970~993) 24 981, Bit14 (964~989) 26 976,
1222 20:28:18.121153 TX Bit7 (972~995) 24 983, Bit15 (967~991) 25 979,
1223 20:28:18.121205
1224 20:28:18.121281 Write Rank0 MR14 =0x18
1225 20:28:18.121351
1226 20:28:18.121403 CH=0, VrefRange= 0, VrefLevel = 24
1227 20:28:18.121456 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1228 20:28:18.121509 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1229 20:28:18.121561 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1230 20:28:18.121614 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1231 20:28:18.121666 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1232 20:28:18.121720 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1233 20:28:18.121772 TX Bit6 (970~994) 25 982, Bit14 (964~989) 26 976,
1234 20:28:18.121825 TX Bit7 (972~995) 24 983, Bit15 (967~991) 25 979,
1235 20:28:18.121877
1236 20:28:18.121929 Write Rank0 MR14 =0x1a
1237 20:28:18.121981
1238 20:28:18.122032 CH=0, VrefRange= 0, VrefLevel = 26
1239 20:28:18.122086 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1240 20:28:18.122152 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1241 20:28:18.122209 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1242 20:28:18.122263 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1243 20:28:18.122317 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1244 20:28:18.122370 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1245 20:28:18.122422 TX Bit6 (970~994) 25 982, Bit14 (964~989) 26 976,
1246 20:28:18.122475 TX Bit7 (972~995) 24 983, Bit15 (967~991) 25 979,
1247 20:28:18.122528
1248 20:28:18.122580 Write Rank0 MR14 =0x1c
1249 20:28:18.122632
1250 20:28:18.122684 CH=0, VrefRange= 0, VrefLevel = 28
1251 20:28:18.122737 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1252 20:28:18.122790 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1253 20:28:18.122843 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1254 20:28:18.122895 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1255 20:28:18.122948 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1256 20:28:18.123000 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1257 20:28:18.123053 TX Bit6 (970~994) 25 982, Bit14 (964~989) 26 976,
1258 20:28:18.123105 TX Bit7 (972~995) 24 983, Bit15 (967~991) 25 979,
1259 20:28:18.123158
1260 20:28:18.123210 Write Rank0 MR14 =0x1e
1261 20:28:18.123262
1262 20:28:18.123314 CH=0, VrefRange= 0, VrefLevel = 30
1263 20:28:18.123367 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1264 20:28:18.123420 TX Bit1 (974~998) 25 986, Bit9 (964~989) 26 976,
1265 20:28:18.123473 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1266 20:28:18.123525 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1267 20:28:18.123578 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1268 20:28:18.123630 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1269 20:28:18.123682 TX Bit6 (970~994) 25 982, Bit14 (964~989) 26 976,
1270 20:28:18.123735 TX Bit7 (972~995) 24 983, Bit15 (967~991) 25 979,
1271 20:28:18.123787
1272 20:28:18.123838
1273 20:28:18.123890 TX Vref found, early break! 377< 385
1274 20:28:18.123943 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1275 20:28:18.123996 u1DelayCellOfst[0]=8 cells (7 PI)
1276 20:28:18.124049 u1DelayCellOfst[1]=7 cells (6 PI)
1277 20:28:18.124101 u1DelayCellOfst[2]=7 cells (6 PI)
1278 20:28:18.124156 u1DelayCellOfst[3]=0 cells (0 PI)
1279 20:28:18.124208 u1DelayCellOfst[4]=7 cells (6 PI)
1280 20:28:18.124260 u1DelayCellOfst[5]=1 cells (1 PI)
1281 20:28:18.124312 u1DelayCellOfst[6]=2 cells (2 PI)
1282 20:28:18.124364 u1DelayCellOfst[7]=3 cells (3 PI)
1283 20:28:18.124416 Byte0, DQ PI dly=980, DQM PI dly= 983
1284 20:28:18.124469 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1285 20:28:18.124522
1286 20:28:18.124597 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1287 20:28:18.124653
1288 20:28:18.124706 u1DelayCellOfst[8]=0 cells (0 PI)
1289 20:28:18.124758 u1DelayCellOfst[9]=1 cells (1 PI)
1290 20:28:18.124811 u1DelayCellOfst[10]=5 cells (4 PI)
1291 20:28:18.124864 u1DelayCellOfst[11]=0 cells (0 PI)
1292 20:28:18.124917 u1DelayCellOfst[12]=1 cells (1 PI)
1293 20:28:18.124969 u1DelayCellOfst[13]=0 cells (0 PI)
1294 20:28:18.125021 u1DelayCellOfst[14]=1 cells (1 PI)
1295 20:28:18.125073 u1DelayCellOfst[15]=5 cells (4 PI)
1296 20:28:18.125125 Byte1, DQ PI dly=975, DQM PI dly= 977
1297 20:28:18.125178 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1298 20:28:18.125230
1299 20:28:18.125322 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1300 20:28:18.125375
1301 20:28:18.125448 Write Rank0 MR14 =0x18
1302 20:28:18.125501
1303 20:28:18.125553 Final TX Range 0 Vref 24
1304 20:28:18.125605
1305 20:28:18.125657 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1306 20:28:18.125710
1307 20:28:18.125761 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1308 20:28:18.125813 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1309 20:28:18.125866 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1310 20:28:18.125919 Write Rank0 MR3 =0xb0
1311 20:28:18.125970 DramC Write-DBI on
1312 20:28:18.126022 ==
1313 20:28:18.126074 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1314 20:28:18.126125 fsp= 1, odt_onoff= 1, Byte mode= 0
1315 20:28:18.126178 ==
1316 20:28:18.126229 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1317 20:28:18.126281
1318 20:28:18.126332 Begin, DQ Scan Range 697~761
1319 20:28:18.126384
1320 20:28:18.126435
1321 20:28:18.126486 TX Vref Scan disable
1322 20:28:18.126538 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1323 20:28:18.126592 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1324 20:28:18.126835 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1325 20:28:18.126896 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1326 20:28:18.126951 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1327 20:28:18.127004 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1328 20:28:18.127057 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1329 20:28:18.127110 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1330 20:28:18.127163 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1331 20:28:18.127226 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1332 20:28:18.127322 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1333 20:28:18.127382 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1334 20:28:18.127437 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1335 20:28:18.127491 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1336 20:28:18.127544 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1337 20:28:18.127597 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1338 20:28:18.127650 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1339 20:28:18.127703 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1340 20:28:18.127755 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1341 20:28:18.127808 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1342 20:28:18.127861 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1343 20:28:18.127914 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1344 20:28:18.127967 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1345 20:28:18.128020 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1346 20:28:18.128073 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1347 20:28:18.128125 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1348 20:28:18.128178 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1349 20:28:18.128231 Byte0, DQ PI dly=728, DQM PI dly= 728
1350 20:28:18.128283 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1351 20:28:18.128335
1352 20:28:18.128386 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1353 20:28:18.128439
1354 20:28:18.128490 Byte1, DQ PI dly=719, DQM PI dly= 719
1355 20:28:18.128542 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1356 20:28:18.128594
1357 20:28:18.128646 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1358 20:28:18.128707
1359 20:28:18.128767 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1360 20:28:18.128820 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1361 20:28:18.128873 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1362 20:28:18.128925 Write Rank0 MR3 =0x30
1363 20:28:18.128976 DramC Write-DBI off
1364 20:28:18.129028
1365 20:28:18.129080 [DATLAT]
1366 20:28:18.129131 Freq=1600, CH0 RK0, use_rxtx_scan=0
1367 20:28:18.129183
1368 20:28:18.129234 DATLAT Default: 0xf
1369 20:28:18.129324 7, 0xFFFF, sum=0
1370 20:28:18.129377 8, 0xFFFF, sum=0
1371 20:28:18.129429 9, 0xFFFF, sum=0
1372 20:28:18.129482 10, 0xFFFF, sum=0
1373 20:28:18.129538 11, 0xFFFF, sum=0
1374 20:28:18.129591 12, 0xFFFF, sum=0
1375 20:28:18.129643 13, 0xFFFF, sum=0
1376 20:28:18.129696 14, 0x0, sum=1
1377 20:28:18.129749 15, 0x0, sum=2
1378 20:28:18.129801 16, 0x0, sum=3
1379 20:28:18.129858 17, 0x0, sum=4
1380 20:28:18.129925 pattern=2 first_step=14 total pass=5 best_step=16
1381 20:28:18.129990 ==
1382 20:28:18.130055 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1383 20:28:18.130111 fsp= 1, odt_onoff= 1, Byte mode= 0
1384 20:28:18.130163 ==
1385 20:28:18.130216 Start DQ dly to find pass range UseTestEngine =1
1386 20:28:18.130273 x-axis: bit #, y-axis: DQ dly (-127~63)
1387 20:28:18.130325 RX Vref Scan = 1
1388 20:28:18.130377
1389 20:28:18.130430 RX Vref found, early break!
1390 20:28:18.130483
1391 20:28:18.130534 Final RX Vref 13, apply to both rank0 and 1
1392 20:28:18.130586 ==
1393 20:28:18.130638 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1394 20:28:18.130690 fsp= 1, odt_onoff= 1, Byte mode= 0
1395 20:28:18.130742 ==
1396 20:28:18.130793 DQS Delay:
1397 20:28:18.130844 DQS0 = 0, DQS1 = 0
1398 20:28:18.130896 DQM Delay:
1399 20:28:18.130946 DQM0 = 20, DQM1 = 19
1400 20:28:18.130998 DQ Delay:
1401 20:28:18.131050 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1402 20:28:18.131102 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19
1403 20:28:18.131154 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1404 20:28:18.131206 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1405 20:28:18.131258
1406 20:28:18.131330
1407 20:28:18.131386
1408 20:28:18.131438 [DramC_TX_OE_Calibration] TA2
1409 20:28:18.131490 Original DQ_B0 (3 6) =30, OEN = 27
1410 20:28:18.131542 Original DQ_B1 (3 6) =30, OEN = 27
1411 20:28:18.131595 23, 0x0, End_B0=23 End_B1=23
1412 20:28:18.131648 24, 0x0, End_B0=24 End_B1=24
1413 20:28:18.131701 25, 0x0, End_B0=25 End_B1=25
1414 20:28:18.131755 26, 0x0, End_B0=26 End_B1=26
1415 20:28:18.131808 27, 0x0, End_B0=27 End_B1=27
1416 20:28:18.131861 28, 0x0, End_B0=28 End_B1=28
1417 20:28:18.131913 29, 0x0, End_B0=29 End_B1=29
1418 20:28:18.131966 30, 0x0, End_B0=30 End_B1=30
1419 20:28:18.132018 31, 0xFFFF, End_B0=30 End_B1=30
1420 20:28:18.132079 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1421 20:28:18.132142 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1422 20:28:18.132196
1423 20:28:18.132247
1424 20:28:18.132299 Write Rank0 MR23 =0x3f
1425 20:28:18.132351 [DQSOSC]
1426 20:28:18.132403 [DQSOSCAuto] RK0, (LSB)MR18= 0xac, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1427 20:28:18.132456 CH0_RK0: MR19=0x3, MR18=0xAC, DQSOSC=335, MR23=63, INC=21, DEC=32
1428 20:28:18.132508 Write Rank0 MR23 =0x3f
1429 20:28:18.132559 [DQSOSC]
1430 20:28:18.132611 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1431 20:28:18.132663 CH0 RK0: MR19=3, MR18=AA
1432 20:28:18.132715 [RankSwap] Rank num 2, (Multi 1), Rank 1
1433 20:28:18.132767 Write Rank0 MR2 =0xad
1434 20:28:18.132819 [Write Leveling]
1435 20:28:18.132871 delay byte0 byte1 byte2 byte3
1436 20:28:18.132923
1437 20:28:18.132975 10 0 0
1438 20:28:18.133027 11 0 0
1439 20:28:18.133080 12 0 0
1440 20:28:18.133132 13 0 0
1441 20:28:18.133184 14 0 0
1442 20:28:18.133237 15 0 0
1443 20:28:18.133305 16 0 0
1444 20:28:18.133359 17 0 0
1445 20:28:18.133411 18 0 0
1446 20:28:18.133464 19 0 0
1447 20:28:18.133517 20 0 0
1448 20:28:18.133568 21 0 0
1449 20:28:18.133621 22 0 0
1450 20:28:18.133673 23 0 0
1451 20:28:18.133726 24 0 0
1452 20:28:18.133777 25 0 0
1453 20:28:18.133830 26 0 0
1454 20:28:18.133882 27 0 0
1455 20:28:18.133934 28 0 0
1456 20:28:18.133987 29 0 0
1457 20:28:18.134040 30 0 ff
1458 20:28:18.134093 31 0 ff
1459 20:28:18.134145 32 0 ff
1460 20:28:18.134198 33 0 ff
1461 20:28:18.134251 34 ff ff
1462 20:28:18.134303 35 ff ff
1463 20:28:18.134356 36 ff ff
1464 20:28:18.134408 37 ff ff
1465 20:28:18.134461 38 ff ff
1466 20:28:18.134514 39 ff ff
1467 20:28:18.134566 40 ff ff
1468 20:28:18.134619 pass bytecount = 0xff (0xff: all bytes pass)
1469 20:28:18.134671
1470 20:28:18.134722 DQS0 dly: 34
1471 20:28:18.134774 DQS1 dly: 30
1472 20:28:18.134826 Write Rank0 MR2 =0x2d
1473 20:28:18.135070 [RankSwap] Rank num 2, (Multi 1), Rank 0
1474 20:28:18.135129 Write Rank1 MR1 =0xd6
1475 20:28:18.135183 [Gating]
1476 20:28:18.135236 ==
1477 20:28:18.135288 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1478 20:28:18.135340 fsp= 1, odt_onoff= 1, Byte mode= 0
1479 20:28:18.135392 ==
1480 20:28:18.135444 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1481 20:28:18.135497 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1482 20:28:18.135550 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
1483 20:28:18.135603 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1484 20:28:18.135684 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1485 20:28:18.135741 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1486 20:28:18.135794 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1487 20:28:18.135847 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1488 20:28:18.135900 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1489 20:28:18.135952 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1490 20:28:18.136004 3 2 8 |404 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1491 20:28:18.136057 3 2 12 |2d2d 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1492 20:28:18.136110 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1493 20:28:18.136166 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1494 20:28:18.136219 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1495 20:28:18.136272 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1496 20:28:18.136325 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1497 20:28:18.136378 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1498 20:28:18.136431 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1499 20:28:18.136484 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1500 20:28:18.136537 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1501 20:28:18.136589 [Byte 0] Lead/lag Transition tap number (1)
1502 20:28:18.136642 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1503 20:28:18.136695 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1504 20:28:18.136748 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1505 20:28:18.136800 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1506 20:28:18.136852 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1507 20:28:18.136905 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1508 20:28:18.136957 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1509 20:28:18.137010 3 4 16 |3d3d 2a2a |(11 11)(11 11) |(1 1)(1 1)| 0
1510 20:28:18.137063 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 20:28:18.137116 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 20:28:18.137168 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 20:28:18.137244 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 20:28:18.137321 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 20:28:18.137375 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 20:28:18.137428 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 20:28:18.137481 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1518 20:28:18.137533 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1519 20:28:18.137585 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1520 20:28:18.137637 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1521 20:28:18.137689 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1522 20:28:18.137742 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1523 20:28:18.137794 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1524 20:28:18.137846 [Byte 0] Lead/lag Transition tap number (2)
1525 20:28:18.137898 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1526 20:28:18.137950 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1527 20:28:18.138002 [Byte 1] Lead/lag Transition tap number (2)
1528 20:28:18.138054 3 6 12 |2020 3e3d |(1 1)(11 11) |(0 0)(0 0)| 0
1529 20:28:18.138107 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1530 20:28:18.138159 [Byte 0]First pass (3, 6, 16)
1531 20:28:18.138211 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1532 20:28:18.138265 [Byte 1]First pass (3, 6, 20)
1533 20:28:18.138316 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 20:28:18.138369 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 20:28:18.138422 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 20:28:18.138475 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1537 20:28:18.138528 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1538 20:28:18.138580 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1539 20:28:18.138632 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1540 20:28:18.138685 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1541 20:28:18.138750 All bytes gating window > 1UI, Early break!
1542 20:28:18.138812
1543 20:28:18.138864 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1544 20:28:18.138917
1545 20:28:18.138968 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1546 20:28:18.139020
1547 20:28:18.139072
1548 20:28:18.139123
1549 20:28:18.139174 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1550 20:28:18.139226
1551 20:28:18.139277 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1552 20:28:18.139329
1553 20:28:18.139380
1554 20:28:18.139431 Write Rank1 MR1 =0x56
1555 20:28:18.139482
1556 20:28:18.139533 best RODT dly(2T, 0.5T) = (2, 3)
1557 20:28:18.139585
1558 20:28:18.139636 best RODT dly(2T, 0.5T) = (2, 3)
1559 20:28:18.139687 ==
1560 20:28:18.139738 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1561 20:28:18.139790 fsp= 1, odt_onoff= 1, Byte mode= 0
1562 20:28:18.139842 ==
1563 20:28:18.139894 Start DQ dly to find pass range UseTestEngine =0
1564 20:28:18.139946 x-axis: bit #, y-axis: DQ dly (-127~63)
1565 20:28:18.139998 RX Vref Scan = 0
1566 20:28:18.140050 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1567 20:28:18.140104 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1568 20:28:18.140157 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1569 20:28:18.140209 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1570 20:28:18.140262 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1571 20:28:18.140314 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1572 20:28:18.140367 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1573 20:28:18.140420 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1574 20:28:18.140483 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1575 20:28:18.140537 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1576 20:28:18.140589 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1577 20:28:18.140642 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1578 20:28:18.140886 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1579 20:28:18.140945 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1580 20:28:18.140998 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1581 20:28:18.141051 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1582 20:28:18.141104 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1583 20:28:18.141157 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1584 20:28:18.141210 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1585 20:28:18.141271 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1586 20:28:18.141356 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1587 20:28:18.141410 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1588 20:28:18.141463 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1589 20:28:18.141525 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1590 20:28:18.141601 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1591 20:28:18.141656 -1, [0] xxxoxxxx xxxxxoxx [MSB]
1592 20:28:18.141709 0, [0] xxxoxoxx oxxoxoox [MSB]
1593 20:28:18.141773 1, [0] xxxoxoxx oxxoxoox [MSB]
1594 20:28:18.141828 2, [0] xxxoxoxx ooxoooox [MSB]
1595 20:28:18.141881 3, [0] xxxoxooo ooxooooo [MSB]
1596 20:28:18.141940 4, [0] xxxoxooo ooxooooo [MSB]
1597 20:28:18.141995 5, [0] xxxoxooo ooxooooo [MSB]
1598 20:28:18.142048 6, [0] xoxooooo oooooooo [MSB]
1599 20:28:18.142131 7, [0] xooooooo oooooooo [MSB]
1600 20:28:18.142187 8, [0] xooooooo oooooooo [MSB]
1601 20:28:18.142241 35, [0] oooxoooo oooxoooo [MSB]
1602 20:28:18.142297 36, [0] oooxoxoo oooxoxxo [MSB]
1603 20:28:18.142350 37, [0] oooxoxxx xooxoxxo [MSB]
1604 20:28:18.142403 38, [0] oooxoxxx xxoxxxxo [MSB]
1605 20:28:18.142456 39, [0] oooxoxxx xxoxxxxx [MSB]
1606 20:28:18.142514 40, [0] oooxoxxx xxoxxxxx [MSB]
1607 20:28:18.142567 41, [0] oooxoxxx xxoxxxxx [MSB]
1608 20:28:18.142620 42, [0] oooxxxxx xxoxxxxx [MSB]
1609 20:28:18.142675 43, [0] xoxxxxxx xxxxxxxx [MSB]
1610 20:28:18.142728 44, [0] xxxxxxxx xxxxxxxx [MSB]
1611 20:28:18.142782 iDelay=44, Bit 0, Center 25 (9 ~ 42) 34
1612 20:28:18.142834 iDelay=44, Bit 1, Center 24 (6 ~ 43) 38
1613 20:28:18.142886 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1614 20:28:18.142937 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1615 20:28:18.142990 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1616 20:28:18.143041 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1617 20:28:18.143093 iDelay=44, Bit 6, Center 19 (3 ~ 36) 34
1618 20:28:18.143144 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
1619 20:28:18.143196 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1620 20:28:18.143247 iDelay=44, Bit 9, Center 19 (2 ~ 37) 36
1621 20:28:18.143299 iDelay=44, Bit 10, Center 24 (6 ~ 42) 37
1622 20:28:18.143350 iDelay=44, Bit 11, Center 17 (0 ~ 34) 35
1623 20:28:18.143402 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
1624 20:28:18.143454 iDelay=44, Bit 13, Center 17 (-1 ~ 35) 37
1625 20:28:18.143506 iDelay=44, Bit 14, Center 17 (0 ~ 35) 36
1626 20:28:18.143558 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1627 20:28:18.143610 ==
1628 20:28:18.143662 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1629 20:28:18.143714 fsp= 1, odt_onoff= 1, Byte mode= 0
1630 20:28:18.143766 ==
1631 20:28:18.143817 DQS Delay:
1632 20:28:18.143868 DQS0 = 0, DQS1 = 0
1633 20:28:18.143920 DQM Delay:
1634 20:28:18.143971 DQM0 = 20, DQM1 = 18
1635 20:28:18.144023 DQ Delay:
1636 20:28:18.144075 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1637 20:28:18.144127 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
1638 20:28:18.144178 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
1639 20:28:18.144230 DQ12 =19, DQ13 =17, DQ14 =17, DQ15 =20
1640 20:28:18.144282
1641 20:28:18.144333
1642 20:28:18.144384 DramC Write-DBI off
1643 20:28:18.144436 ==
1644 20:28:18.144487 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1645 20:28:18.144539 fsp= 1, odt_onoff= 1, Byte mode= 0
1646 20:28:18.144591 ==
1647 20:28:18.144642 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1648 20:28:18.144694
1649 20:28:18.144745 Begin, DQ Scan Range 926~1182
1650 20:28:18.144796
1651 20:28:18.144848
1652 20:28:18.144900 TX Vref Scan disable
1653 20:28:18.144952 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1654 20:28:18.145006 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1655 20:28:18.145059 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1656 20:28:18.145111 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1657 20:28:18.145164 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1658 20:28:18.145216 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1659 20:28:18.145292 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1660 20:28:18.145363 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1661 20:28:18.145436 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1662 20:28:18.145535 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1663 20:28:18.145658 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1664 20:28:18.145789 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1665 20:28:18.145876 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1666 20:28:18.145933 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1667 20:28:18.145989 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1668 20:28:18.146042 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1669 20:28:18.146095 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1670 20:28:18.146148 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1671 20:28:18.146201 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1672 20:28:18.146254 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1673 20:28:18.146306 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1674 20:28:18.146359 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1675 20:28:18.146412 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1676 20:28:18.146464 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1677 20:28:18.146517 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1678 20:28:18.146570 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1679 20:28:18.146623 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1680 20:28:18.146676 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1681 20:28:18.146729 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1682 20:28:18.146782 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1683 20:28:18.146834 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1684 20:28:18.146887 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1685 20:28:18.146939 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1686 20:28:18.146991 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1687 20:28:18.147043 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1688 20:28:18.147097 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1689 20:28:18.147150 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1690 20:28:18.147202 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1691 20:28:18.147256 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1692 20:28:18.147308 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1693 20:28:18.147361 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1694 20:28:18.147413 967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]
1695 20:28:18.147465 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1696 20:28:18.147711 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1697 20:28:18.147775 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1698 20:28:18.147830 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1699 20:28:18.147884 972 |3 6 12|[0] xxxoxxxx ooxooooo [MSB]
1700 20:28:18.147937 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1701 20:28:18.147990 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1702 20:28:18.148043 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1703 20:28:18.148096 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1704 20:28:18.148149 977 |3 6 17|[0] xoooxooo oooooooo [MSB]
1705 20:28:18.148215 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1706 20:28:18.148296 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1707 20:28:18.148353 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1708 20:28:18.148411 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1709 20:28:18.148465 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1710 20:28:18.148518 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1711 20:28:18.148573 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1712 20:28:18.148629 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1713 20:28:18.148686 Byte0, DQ PI dly=985, DQM PI dly= 985
1714 20:28:18.148764 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1715 20:28:18.148847
1716 20:28:18.148928 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1717 20:28:18.149009
1718 20:28:18.149090 Byte1, DQ PI dly=979, DQM PI dly= 979
1719 20:28:18.149171 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1720 20:28:18.149252
1721 20:28:18.149348 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1722 20:28:18.149430
1723 20:28:18.149510 ==
1724 20:28:18.149592 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1725 20:28:18.149673 fsp= 1, odt_onoff= 1, Byte mode= 0
1726 20:28:18.149755 ==
1727 20:28:18.149837 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1728 20:28:18.149917
1729 20:28:18.149998 Begin, DQ Scan Range 955~1019
1730 20:28:18.150079 Write Rank1 MR14 =0x0
1731 20:28:18.150165
1732 20:28:18.150250 CH=0, VrefRange= 0, VrefLevel = 0
1733 20:28:18.150310 TX Bit0 (980~999) 20 989, Bit8 (969~986) 18 977,
1734 20:28:18.150364 TX Bit1 (979~997) 19 988, Bit9 (970~987) 18 978,
1735 20:28:18.150426 TX Bit2 (979~996) 18 987, Bit10 (975~991) 17 983,
1736 20:28:18.150586 TX Bit3 (974~991) 18 982, Bit11 (968~987) 20 977,
1737 20:28:18.150690 TX Bit4 (979~997) 19 988, Bit12 (969~987) 19 978,
1738 20:28:18.150777 TX Bit5 (977~991) 15 984, Bit13 (969~986) 18 977,
1739 20:28:18.150860 TX Bit6 (976~992) 17 984, Bit14 (970~987) 18 978,
1740 20:28:18.150943 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1741 20:28:18.151023
1742 20:28:18.151078 Write Rank1 MR14 =0x2
1743 20:28:18.151131
1744 20:28:18.151184 CH=0, VrefRange= 0, VrefLevel = 2
1745 20:28:18.151236 TX Bit0 (980~999) 20 989, Bit8 (969~987) 19 978,
1746 20:28:18.151288 TX Bit1 (978~997) 20 987, Bit9 (969~988) 20 978,
1747 20:28:18.151341 TX Bit2 (979~997) 19 988, Bit10 (975~991) 17 983,
1748 20:28:18.151393 TX Bit3 (974~992) 19 983, Bit11 (968~987) 20 977,
1749 20:28:18.151445 TX Bit4 (979~998) 20 988, Bit12 (969~988) 20 978,
1750 20:28:18.151497 TX Bit5 (976~991) 16 983, Bit13 (969~986) 18 977,
1751 20:28:18.151549 TX Bit6 (976~992) 17 984, Bit14 (969~987) 19 978,
1752 20:28:18.151601 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1753 20:28:18.151653
1754 20:28:18.151704 Write Rank1 MR14 =0x4
1755 20:28:18.151755
1756 20:28:18.151807 CH=0, VrefRange= 0, VrefLevel = 4
1757 20:28:18.151858 TX Bit0 (980~999) 20 989, Bit8 (969~987) 19 978,
1758 20:28:18.151910 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
1759 20:28:18.151962 TX Bit2 (978~998) 21 988, Bit10 (975~992) 18 983,
1760 20:28:18.152014 TX Bit3 (973~992) 20 982, Bit11 (968~988) 21 978,
1761 20:28:18.152066 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1762 20:28:18.152118 TX Bit5 (976~991) 16 983, Bit13 (968~987) 20 977,
1763 20:28:18.152171 TX Bit6 (976~993) 18 984, Bit14 (969~988) 20 978,
1764 20:28:18.152223 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1765 20:28:18.152275
1766 20:28:18.152326 Write Rank1 MR14 =0x6
1767 20:28:18.152378
1768 20:28:18.152429 CH=0, VrefRange= 0, VrefLevel = 6
1769 20:28:18.152480 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
1770 20:28:18.152533 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
1771 20:28:18.152584 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1772 20:28:18.152647 TX Bit3 (973~992) 20 982, Bit11 (968~988) 21 978,
1773 20:28:18.152728 TX Bit4 (978~998) 21 988, Bit12 (968~989) 22 978,
1774 20:28:18.152783 TX Bit5 (976~992) 17 984, Bit13 (968~988) 21 978,
1775 20:28:18.152835 TX Bit6 (976~993) 18 984, Bit14 (969~989) 21 979,
1776 20:28:18.152888 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1777 20:28:18.152940
1778 20:28:18.152991 Write Rank1 MR14 =0x8
1779 20:28:18.153043
1780 20:28:18.153094 CH=0, VrefRange= 0, VrefLevel = 8
1781 20:28:18.153146 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1782 20:28:18.153198 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1783 20:28:18.153250 TX Bit2 (978~998) 21 988, Bit10 (975~992) 18 983,
1784 20:28:18.153340 TX Bit3 (973~993) 21 983, Bit11 (968~989) 22 978,
1785 20:28:18.153393 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1786 20:28:18.153445 TX Bit5 (976~992) 17 984, Bit13 (968~988) 21 978,
1787 20:28:18.153497 TX Bit6 (975~994) 20 984, Bit14 (969~989) 21 979,
1788 20:28:18.153549 TX Bit7 (977~996) 20 986, Bit15 (972~990) 19 981,
1789 20:28:18.153601
1790 20:28:18.153652 Write Rank1 MR14 =0xa
1791 20:28:18.153703
1792 20:28:18.153754 CH=0, VrefRange= 0, VrefLevel = 10
1793 20:28:18.153806 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1794 20:28:18.153859 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1795 20:28:18.153910 TX Bit2 (978~998) 21 988, Bit10 (974~993) 20 983,
1796 20:28:18.153962 TX Bit3 (972~993) 22 982, Bit11 (967~989) 23 978,
1797 20:28:18.154014 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1798 20:28:18.154066 TX Bit5 (975~992) 18 983, Bit13 (968~989) 22 978,
1799 20:28:18.154119 TX Bit6 (975~995) 21 985, Bit14 (969~989) 21 979,
1800 20:28:18.154172 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1801 20:28:18.154227
1802 20:28:18.154400 Write Rank1 MR14 =0xc
1803 20:28:18.154509
1804 20:28:18.154765 CH=0, VrefRange= 0, VrefLevel = 12
1805 20:28:18.154827 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1806 20:28:18.154885 TX Bit1 (978~999) 22 988, Bit9 (968~990) 23 979,
1807 20:28:18.154942 TX Bit2 (978~999) 22 988, Bit10 (974~993) 20 983,
1808 20:28:18.154995 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1809 20:28:18.155143 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1810 20:28:18.155263 TX Bit5 (974~993) 20 983, Bit13 (968~989) 22 978,
1811 20:28:18.155337 TX Bit6 (975~995) 21 985, Bit14 (968~990) 23 979,
1812 20:28:18.155396 TX Bit7 (977~997) 21 987, Bit15 (970~991) 22 980,
1813 20:28:18.155455
1814 20:28:18.155511 Write Rank1 MR14 =0xe
1815 20:28:18.155601
1816 20:28:18.155693 CH=0, VrefRange= 0, VrefLevel = 14
1817 20:28:18.155792 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1818 20:28:18.155880 TX Bit1 (978~999) 22 988, Bit9 (968~990) 23 979,
1819 20:28:18.155970 TX Bit2 (978~999) 22 988, Bit10 (974~993) 20 983,
1820 20:28:18.156054 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1821 20:28:18.156136 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1822 20:28:18.156218 TX Bit5 (974~993) 20 983, Bit13 (968~989) 22 978,
1823 20:28:18.156301 TX Bit6 (975~995) 21 985, Bit14 (968~990) 23 979,
1824 20:28:18.156382 TX Bit7 (977~997) 21 987, Bit15 (970~991) 22 980,
1825 20:28:18.156463
1826 20:28:18.156544 Write Rank1 MR14 =0x10
1827 20:28:18.156624
1828 20:28:18.156705 CH=0, VrefRange= 0, VrefLevel = 16
1829 20:28:18.156786 TX Bit0 (978~1001) 24 989, Bit8 (968~990) 23 979,
1830 20:28:18.156868 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1831 20:28:18.156950 TX Bit2 (977~999) 23 988, Bit10 (974~993) 20 983,
1832 20:28:18.157032 TX Bit3 (971~995) 25 983, Bit11 (967~990) 24 978,
1833 20:28:18.157114 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1834 20:28:18.157196 TX Bit5 (974~994) 21 984, Bit13 (967~989) 23 978,
1835 20:28:18.157311 TX Bit6 (973~996) 24 984, Bit14 (968~990) 23 979,
1836 20:28:18.157367 TX Bit7 (976~998) 23 987, Bit15 (970~992) 23 981,
1837 20:28:18.157420
1838 20:28:18.157471 Write Rank1 MR14 =0x12
1839 20:28:18.157523
1840 20:28:18.157574 CH=0, VrefRange= 0, VrefLevel = 18
1841 20:28:18.157627 TX Bit0 (978~1001) 24 989, Bit8 (968~990) 23 979,
1842 20:28:18.157679 TX Bit1 (978~1000) 23 989, Bit9 (968~991) 24 979,
1843 20:28:18.157731 TX Bit2 (977~999) 23 988, Bit10 (972~994) 23 983,
1844 20:28:18.157784 TX Bit3 (971~995) 25 983, Bit11 (967~990) 24 978,
1845 20:28:18.157837 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1846 20:28:18.157892 TX Bit5 (973~994) 22 983, Bit13 (967~990) 24 978,
1847 20:28:18.157947 TX Bit6 (973~997) 25 985, Bit14 (968~991) 24 979,
1848 20:28:18.158003 TX Bit7 (976~998) 23 987, Bit15 (970~992) 23 981,
1849 20:28:18.158057
1850 20:28:18.158110 Write Rank1 MR14 =0x14
1851 20:28:18.158161
1852 20:28:18.158213 CH=0, VrefRange= 0, VrefLevel = 20
1853 20:28:18.158273 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1854 20:28:18.158326 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1855 20:28:18.158465 TX Bit2 (977~1000) 24 988, Bit10 (972~995) 24 983,
1856 20:28:18.158605 TX Bit3 (970~996) 27 983, Bit11 (967~991) 25 979,
1857 20:28:18.158702 TX Bit4 (977~1001) 25 989, Bit12 (967~991) 25 979,
1858 20:28:18.158760 TX Bit5 (973~995) 23 984, Bit13 (966~990) 25 978,
1859 20:28:18.158822 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1860 20:28:18.158877 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1861 20:28:18.158929
1862 20:28:18.159001 Write Rank1 MR14 =0x16
1863 20:28:18.159083
1864 20:28:18.159168 CH=0, VrefRange= 0, VrefLevel = 22
1865 20:28:18.159251 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1866 20:28:18.159334 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1867 20:28:18.159420 TX Bit2 (977~1000) 24 988, Bit10 (971~994) 24 982,
1868 20:28:18.159502 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1869 20:28:18.159587 TX Bit4 (977~1001) 25 989, Bit12 (967~991) 25 979,
1870 20:28:18.159753 TX Bit5 (972~996) 25 984, Bit13 (967~990) 24 978,
1871 20:28:18.159874 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1872 20:28:18.159968 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1873 20:28:18.160051
1874 20:28:18.160134 Write Rank1 MR14 =0x18
1875 20:28:18.160215
1876 20:28:18.160288 CH=0, VrefRange= 0, VrefLevel = 24
1877 20:28:18.160345 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1878 20:28:18.160398 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1879 20:28:18.160451 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1880 20:28:18.160504 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1881 20:28:18.160557 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1882 20:28:18.160609 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1883 20:28:18.160662 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1884 20:28:18.160714 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1885 20:28:18.160766
1886 20:28:18.160818 Write Rank1 MR14 =0x1a
1887 20:28:18.160870
1888 20:28:18.160921 CH=0, VrefRange= 0, VrefLevel = 26
1889 20:28:18.160974 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1890 20:28:18.161026 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1891 20:28:18.161078 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1892 20:28:18.161129 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1893 20:28:18.161182 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1894 20:28:18.161234 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1895 20:28:18.161339 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1896 20:28:18.161429 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1897 20:28:18.161512
1898 20:28:18.161593 wait MRW command Rank1 MR14 =0x1c fired (1)
1899 20:28:18.161674 Write Rank1 MR14 =0x1c
1900 20:28:18.161754
1901 20:28:18.161835 CH=0, VrefRange= 0, VrefLevel = 28
1902 20:28:18.161916 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1903 20:28:18.161999 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1904 20:28:18.162273 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1905 20:28:18.162361 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1906 20:28:18.162444 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1907 20:28:18.366740 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1908 20:28:18.367316 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1909 20:28:18.367657 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1910 20:28:18.367962
1911 20:28:18.368255 Write Rank1 MR14 =0x1e
1912 20:28:18.368548
1913 20:28:18.368902 CH=0, VrefRange= 0, VrefLevel = 30
1914 20:28:18.369418 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1915 20:28:18.369750 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1916 20:28:18.370043 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1917 20:28:18.370329 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1918 20:28:18.370612 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1919 20:28:18.370890 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1920 20:28:18.371164 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1921 20:28:18.371435 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1922 20:28:18.371718
1923 20:28:18.372028 Write Rank1 MR14 =0x20
1924 20:28:18.372304
1925 20:28:18.372577 CH=0, VrefRange= 0, VrefLevel = 32
1926 20:28:18.372851 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1927 20:28:18.373123 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1928 20:28:18.373454 TX Bit2 (977~1000) 24 988, Bit10 (970~994) 25 982,
1929 20:28:18.373734 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1930 20:28:18.374006 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1931 20:28:18.374278 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1932 20:28:18.374547 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1933 20:28:18.374819 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1934 20:28:18.375088
1935 20:28:18.375355
1936 20:28:18.375620 TX Vref found, early break! 369< 380
1937 20:28:18.375893 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1938 20:28:18.376165 u1DelayCellOfst[0]=10 cells (8 PI)
1939 20:28:18.376438 u1DelayCellOfst[1]=7 cells (6 PI)
1940 20:28:18.376707 u1DelayCellOfst[2]=7 cells (6 PI)
1941 20:28:18.376974 u1DelayCellOfst[3]=0 cells (0 PI)
1942 20:28:18.377244 u1DelayCellOfst[4]=7 cells (6 PI)
1943 20:28:18.377541 u1DelayCellOfst[5]=2 cells (2 PI)
1944 20:28:18.377808 u1DelayCellOfst[6]=3 cells (3 PI)
1945 20:28:18.378076 u1DelayCellOfst[7]=6 cells (5 PI)
1946 20:28:18.378348 Byte0, DQ PI dly=982, DQM PI dly= 986
1947 20:28:18.378621 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1948 20:28:18.378895
1949 20:28:18.379161 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1950 20:28:18.379432
1951 20:28:18.379697 u1DelayCellOfst[8]=0 cells (0 PI)
1952 20:28:18.379967 u1DelayCellOfst[9]=1 cells (1 PI)
1953 20:28:18.380232 u1DelayCellOfst[10]=5 cells (4 PI)
1954 20:28:18.380501 u1DelayCellOfst[11]=0 cells (0 PI)
1955 20:28:18.380770 u1DelayCellOfst[12]=1 cells (1 PI)
1956 20:28:18.381039 u1DelayCellOfst[13]=0 cells (0 PI)
1957 20:28:18.381322 u1DelayCellOfst[14]=1 cells (1 PI)
1958 20:28:18.381593 u1DelayCellOfst[15]=2 cells (2 PI)
1959 20:28:18.381862 Byte1, DQ PI dly=978, DQM PI dly= 980
1960 20:28:18.382131 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1961 20:28:18.382401
1962 20:28:18.382667 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1963 20:28:18.382942
1964 20:28:18.383206 Write Rank1 MR14 =0x18
1965 20:28:18.383473
1966 20:28:18.383733 Final TX Range 0 Vref 24
1967 20:28:18.384000
1968 20:28:18.384265 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1969 20:28:18.384535
1970 20:28:18.384796 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1971 20:28:18.385065 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1972 20:28:18.385353 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1973 20:28:18.385628 Write Rank1 MR3 =0xb0
1974 20:28:18.385891 DramC Write-DBI on
1975 20:28:18.386157 ==
1976 20:28:18.386427 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1977 20:28:18.386696 fsp= 1, odt_onoff= 1, Byte mode= 0
1978 20:28:18.387059 ==
1979 20:28:18.387338 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1980 20:28:18.387610
1981 20:28:18.387878 Begin, DQ Scan Range 700~764
1982 20:28:18.388147
1983 20:28:18.388412
1984 20:28:18.388681 TX Vref Scan disable
1985 20:28:18.388952 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1986 20:28:18.389228 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1987 20:28:18.389523 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1988 20:28:18.389798 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1989 20:28:18.390070 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1990 20:28:18.390320 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1991 20:28:18.390514 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1992 20:28:18.390710 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1993 20:28:18.390904 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1994 20:28:18.391096 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1995 20:28:18.391292 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1996 20:28:18.391485 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1997 20:28:18.391679 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1998 20:28:18.391873 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1999 20:28:18.392070 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2000 20:28:18.392264 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2001 20:28:18.392456 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2002 20:28:18.392650 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2003 20:28:18.392843 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2004 20:28:18.393037 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2005 20:28:18.393231 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2006 20:28:18.393457 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2007 20:28:18.393654 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2008 20:28:18.393845 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2009 20:28:18.394039 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2010 20:28:18.394233 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2011 20:28:18.394428 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2012 20:28:18.394621 Byte0, DQ PI dly=730, DQM PI dly= 730
2013 20:28:18.394815 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2014 20:28:18.395007
2015 20:28:18.395469 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2016 20:28:18.395633
2017 20:28:18.395780 Byte1, DQ PI dly=722, DQM PI dly= 722
2018 20:28:18.395926 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2019 20:28:18.396073
2020 20:28:18.396216 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2021 20:28:18.396362
2022 20:28:18.396505 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2023 20:28:18.396651 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2024 20:28:18.396796 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2025 20:28:18.396943 Write Rank1 MR3 =0x30
2026 20:28:18.397087 DramC Write-DBI off
2027 20:28:18.397232
2028 20:28:18.397394 [DATLAT]
2029 20:28:18.397541 Freq=1600, CH0 RK1, use_rxtx_scan=0
2030 20:28:18.397688
2031 20:28:18.397832 DATLAT Default: 0x10
2032 20:28:18.397977 7, 0xFFFF, sum=0
2033 20:28:18.398125 8, 0xFFFF, sum=0
2034 20:28:18.398273 9, 0xFFFF, sum=0
2035 20:28:18.398419 10, 0xFFFF, sum=0
2036 20:28:18.398568 11, 0xFFFF, sum=0
2037 20:28:18.398717 12, 0xFFFF, sum=0
2038 20:28:18.398864 13, 0xFFFF, sum=0
2039 20:28:18.399010 14, 0x0, sum=1
2040 20:28:18.399156 15, 0x0, sum=2
2041 20:28:18.399301 16, 0x0, sum=3
2042 20:28:18.399447 17, 0x0, sum=4
2043 20:28:18.399594 pattern=2 first_step=14 total pass=5 best_step=16
2044 20:28:18.399739 ==
2045 20:28:18.399885 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2046 20:28:18.400030 fsp= 1, odt_onoff= 1, Byte mode= 0
2047 20:28:18.400176 ==
2048 20:28:18.400317 Start DQ dly to find pass range UseTestEngine =1
2049 20:28:18.400434 x-axis: bit #, y-axis: DQ dly (-127~63)
2050 20:28:18.400550 RX Vref Scan = 0
2051 20:28:18.400666 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2052 20:28:18.400810 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2053 20:28:18.400931 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2054 20:28:18.401050 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2055 20:28:18.401169 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2056 20:28:18.401302 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2057 20:28:18.401424 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2058 20:28:18.401542 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2059 20:28:18.401662 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2060 20:28:18.401780 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2061 20:28:18.401899 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2062 20:28:18.402015 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2063 20:28:18.402134 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2064 20:28:18.402251 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2065 20:28:18.402370 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2066 20:28:18.402489 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2067 20:28:18.402607 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2068 20:28:18.402725 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2069 20:28:18.402842 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2070 20:28:18.402961 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2071 20:28:18.403079 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2072 20:28:18.403197 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2073 20:28:18.403314 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2074 20:28:18.403432 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2075 20:28:18.403550 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2076 20:28:18.403668 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2077 20:28:18.403786 0, [0] xxxoxxxx oxxxxoxx [MSB]
2078 20:28:18.403905 1, [0] xxxoxoxx ooxoooox [MSB]
2079 20:28:18.404023 2, [0] xxxoxooo ooxoooox [MSB]
2080 20:28:18.404141 3, [0] xxxoxooo ooxoooox [MSB]
2081 20:28:18.404258 4, [0] xxxoxooo ooxooooo [MSB]
2082 20:28:18.404375 5, [0] xxxooooo ooxooooo [MSB]
2083 20:28:18.404496 6, [0] xxxooooo oooooooo [MSB]
2084 20:28:18.404614 7, [0] xooooooo oooooooo [MSB]
2085 20:28:18.404741 34, [0] oooxoooo oooxoooo [MSB]
2086 20:28:18.404913 35, [0] oooxoxoo oooxoxoo [MSB]
2087 20:28:18.405094 36, [0] oooxoxxo oooxoxoo [MSB]
2088 20:28:18.405220 37, [0] oooxoxxx xooxxxxo [MSB]
2089 20:28:18.405356 38, [0] oooxoxxx xooxxxxo [MSB]
2090 20:28:18.405458 39, [0] oooxoxxx xxoxxxxx [MSB]
2091 20:28:18.405560 40, [0] oooxoxxx xxoxxxxx [MSB]
2092 20:28:18.405661 41, [0] oooxxxxx xxoxxxxx [MSB]
2093 20:28:18.405761 42, [0] oooxxxxx xxxxxxxx [MSB]
2094 20:28:18.405861 43, [0] xxxxxxxx xxxxxxxx [MSB]
2095 20:28:18.405961 iDelay=43, Bit 0, Center 25 (8 ~ 42) 35
2096 20:28:18.406060 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2097 20:28:18.406158 iDelay=43, Bit 2, Center 24 (7 ~ 42) 36
2098 20:28:18.406256 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
2099 20:28:18.406353 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
2100 20:28:18.406451 iDelay=43, Bit 5, Center 17 (1 ~ 34) 34
2101 20:28:18.406548 iDelay=43, Bit 6, Center 18 (2 ~ 35) 34
2102 20:28:18.406645 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
2103 20:28:18.406742 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
2104 20:28:18.406839 iDelay=43, Bit 9, Center 19 (1 ~ 38) 38
2105 20:28:18.406935 iDelay=43, Bit 10, Center 23 (6 ~ 41) 36
2106 20:28:18.407034 iDelay=43, Bit 11, Center 17 (1 ~ 33) 33
2107 20:28:18.407131 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
2108 20:28:18.407229 iDelay=43, Bit 13, Center 16 (-1 ~ 34) 36
2109 20:28:18.407327 iDelay=43, Bit 14, Center 18 (1 ~ 36) 36
2110 20:28:18.407424 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
2111 20:28:18.407521 ==
2112 20:28:18.407619 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2113 20:28:18.407717 fsp= 1, odt_onoff= 1, Byte mode= 0
2114 20:28:18.407814 ==
2115 20:28:18.407911 DQS Delay:
2116 20:28:18.408008 DQS0 = 0, DQS1 = 0
2117 20:28:18.408104 DQM Delay:
2118 20:28:18.408214 DQM0 = 20, DQM1 = 18
2119 20:28:18.408318 DQ Delay:
2120 20:28:18.408415 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
2121 20:28:18.408513 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2122 20:28:18.408611 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2123 20:28:18.408708 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =21
2124 20:28:18.408806
2125 20:28:18.408902
2126 20:28:18.408998
2127 20:28:18.409095 [DramC_TX_OE_Calibration] TA2
2128 20:28:18.409193 Original DQ_B0 (3 6) =30, OEN = 27
2129 20:28:18.409305 Original DQ_B1 (3 6) =30, OEN = 27
2130 20:28:18.409406 23, 0x0, End_B0=23 End_B1=23
2131 20:28:18.409506 24, 0x0, End_B0=24 End_B1=24
2132 20:28:18.409606 25, 0x0, End_B0=25 End_B1=25
2133 20:28:18.409706 26, 0x0, End_B0=26 End_B1=26
2134 20:28:18.409803 27, 0x0, End_B0=27 End_B1=27
2135 20:28:18.409901 28, 0x0, End_B0=28 End_B1=28
2136 20:28:18.410000 29, 0x0, End_B0=29 End_B1=29
2137 20:28:18.410100 30, 0x0, End_B0=30 End_B1=30
2138 20:28:18.410198 31, 0xFFFE, End_B0=30 End_B1=30
2139 20:28:18.410303 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2140 20:28:18.410388 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2141 20:28:18.410472
2142 20:28:18.410554
2143 20:28:18.410638 Write Rank1 MR23 =0x3f
2144 20:28:18.410722 [DQSOSC]
2145 20:28:18.410805 [DQSOSCAuto] RK1, (LSB)MR18= 0x79, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2146 20:28:18.411104 CH0_RK1: MR19=0x3, MR18=0x79, DQSOSC=354, MR23=63, INC=19, DEC=29
2147 20:28:18.411201 Write Rank1 MR23 =0x3f
2148 20:28:18.411287 [DQSOSC]
2149 20:28:18.411372 [DQSOSCAuto] RK1, (LSB)MR18= 0x7c, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2150 20:28:18.411458 CH0 RK1: MR19=3, MR18=7C
2151 20:28:18.411542 [RxdqsGatingPostProcess] freq 1600
2152 20:28:18.411626 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2153 20:28:18.411710 Rank: 0
2154 20:28:18.411794 best DQS0 dly(2T, 0.5T) = (2, 5)
2155 20:28:18.411878 best DQS1 dly(2T, 0.5T) = (2, 5)
2156 20:28:18.411962 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2157 20:28:18.412046 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2158 20:28:18.412130 Rank: 1
2159 20:28:18.412213 best DQS0 dly(2T, 0.5T) = (2, 6)
2160 20:28:18.412297 best DQS1 dly(2T, 0.5T) = (2, 6)
2161 20:28:18.412381 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2162 20:28:18.412464 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2163 20:28:18.412548 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2164 20:28:18.412634 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2165 20:28:18.412718 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2166 20:28:18.412802 Write Rank0 MR13 =0x59
2167 20:28:18.412886 ==
2168 20:28:18.412969 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2169 20:28:18.413053 fsp= 1, odt_onoff= 1, Byte mode= 0
2170 20:28:18.413138 ==
2171 20:28:18.413222 === u2Vref_new: 0x56 --> 0x3a
2172 20:28:18.413326 === u2Vref_new: 0x58 --> 0x58
2173 20:28:18.413412 === u2Vref_new: 0x5a --> 0x5a
2174 20:28:18.413495 === u2Vref_new: 0x5c --> 0x78
2175 20:28:18.413580 === u2Vref_new: 0x5e --> 0x7a
2176 20:28:18.413665 === u2Vref_new: 0x60 --> 0x90
2177 20:28:18.413749 [CA 0] Center 36 (9~63) winsize 55
2178 20:28:18.413832 [CA 1] Center 34 (6~63) winsize 58
2179 20:28:18.413916 [CA 2] Center 32 (3~62) winsize 60
2180 20:28:18.414008 [CA 3] Center 33 (5~62) winsize 58
2181 20:28:18.414106 [CA 4] Center 33 (3~63) winsize 61
2182 20:28:18.414191 [CA 5] Center 25 (-2~53) winsize 56
2183 20:28:18.414275
2184 20:28:18.414359 [CATrainingPosCal] consider 1 rank data
2185 20:28:18.414444 u2DelayCellTimex100 = 762/100 ps
2186 20:28:18.414528 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2187 20:28:18.414611 CA1 delay=34 (6~63),Diff = 9 PI (11 cell)
2188 20:28:18.414696 CA2 delay=32 (3~62),Diff = 7 PI (8 cell)
2189 20:28:18.414779 CA3 delay=33 (5~62),Diff = 8 PI (10 cell)
2190 20:28:18.414863 CA4 delay=33 (3~63),Diff = 8 PI (10 cell)
2191 20:28:18.414946 CA5 delay=25 (-2~53),Diff = 0 PI (0 cell)
2192 20:28:18.415030
2193 20:28:18.415114 CA PerBit enable=1, Macro0, CA PI delay=25
2194 20:28:18.415198 === u2Vref_new: 0x56 --> 0x3a
2195 20:28:18.415288
2196 20:28:18.415361 Vref(ca) range 1: 22
2197 20:28:18.415433
2198 20:28:18.415505 CS Dly= 10 (41-0-32)
2199 20:28:18.415578 Write Rank0 MR13 =0xd8
2200 20:28:18.415650 Write Rank0 MR13 =0xd8
2201 20:28:18.415723 Write Rank0 MR12 =0x56
2202 20:28:18.415796 Write Rank1 MR13 =0x59
2203 20:28:18.415868 ==
2204 20:28:18.415940 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2205 20:28:18.416013 fsp= 1, odt_onoff= 1, Byte mode= 0
2206 20:28:18.416087 ==
2207 20:28:18.416159 === u2Vref_new: 0x56 --> 0x3a
2208 20:28:18.416232 === u2Vref_new: 0x58 --> 0x58
2209 20:28:18.416306 === u2Vref_new: 0x5a --> 0x5a
2210 20:28:18.416378 === u2Vref_new: 0x5c --> 0x78
2211 20:28:18.416450 === u2Vref_new: 0x5e --> 0x7a
2212 20:28:18.416524 === u2Vref_new: 0x60 --> 0x90
2213 20:28:18.416597 [CA 0] Center 36 (10~63) winsize 54
2214 20:28:18.416669 [CA 1] Center 35 (7~63) winsize 57
2215 20:28:18.416742 [CA 2] Center 33 (3~63) winsize 61
2216 20:28:18.416815 [CA 3] Center 33 (3~63) winsize 61
2217 20:28:18.416887 [CA 4] Center 33 (4~63) winsize 60
2218 20:28:18.416960 [CA 5] Center 25 (-2~53) winsize 56
2219 20:28:18.417033
2220 20:28:18.417106 [CATrainingPosCal] consider 2 rank data
2221 20:28:18.417179 u2DelayCellTimex100 = 762/100 ps
2222 20:28:18.417253 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2223 20:28:18.417384 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2224 20:28:18.417464 CA2 delay=32 (3~62),Diff = 7 PI (8 cell)
2225 20:28:18.417538 CA3 delay=33 (5~62),Diff = 8 PI (10 cell)
2226 20:28:18.417613 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2227 20:28:18.417686 CA5 delay=25 (-2~53),Diff = 0 PI (0 cell)
2228 20:28:18.417760
2229 20:28:18.417833 CA PerBit enable=1, Macro0, CA PI delay=25
2230 20:28:18.417908 === u2Vref_new: 0x58 --> 0x58
2231 20:28:18.417981
2232 20:28:18.418054 Vref(ca) range 1: 24
2233 20:28:18.418128
2234 20:28:18.418200 CS Dly= 11 (42-0-32)
2235 20:28:18.418274 Write Rank1 MR13 =0xd8
2236 20:28:18.418348 Write Rank1 MR13 =0xd8
2237 20:28:18.418439 Write Rank1 MR12 =0x58
2238 20:28:18.418513 [RankSwap] Rank num 2, (Multi 1), Rank 0
2239 20:28:18.418587 Write Rank0 MR2 =0xad
2240 20:28:18.418661 [Write Leveling]
2241 20:28:18.418735 delay byte0 byte1 byte2 byte3
2242 20:28:18.418808
2243 20:28:18.418882 10 0 0
2244 20:28:18.418957 11 0 0
2245 20:28:18.419032 12 0 0
2246 20:28:18.419107 13 0 0
2247 20:28:18.419180 14 0 0
2248 20:28:18.419255 15 0 0
2249 20:28:18.419329 16 0 0
2250 20:28:18.419409 17 0 0
2251 20:28:18.419498 18 0 0
2252 20:28:18.419573 19 0 0
2253 20:28:18.419648 20 0 0
2254 20:28:18.419744 21 0 0
2255 20:28:18.419823 22 0 0
2256 20:28:18.419898 23 0 0
2257 20:28:18.419972 24 0 0
2258 20:28:18.420046 25 0 0
2259 20:28:18.420860 26 0 0
2260 20:28:18.420962 27 0 0
2261 20:28:18.424275 28 0 0
2262 20:28:18.424378 29 0 0
2263 20:28:18.424458 30 0 0
2264 20:28:18.427814 31 0 0
2265 20:28:18.427918 32 0 ff
2266 20:28:18.430672 33 0 ff
2267 20:28:18.430756 34 ff ff
2268 20:28:18.434398 35 0 ff
2269 20:28:18.434482 36 ff ff
2270 20:28:18.437455 37 ff ff
2271 20:28:18.437569 38 ff ff
2272 20:28:18.437678 39 ff ff
2273 20:28:18.440729 40 ff ff
2274 20:28:18.440813 41 ff ff
2275 20:28:18.444365 42 ff ff
2276 20:28:18.447906 pass bytecount = 0xff (0xff: all bytes pass)
2277 20:28:18.448020
2278 20:28:18.448120 DQS0 dly: 36
2279 20:28:18.450989 DQS1 dly: 32
2280 20:28:18.451103 Write Rank0 MR2 =0x2d
2281 20:28:18.454331 [RankSwap] Rank num 2, (Multi 1), Rank 0
2282 20:28:18.457432 Write Rank0 MR1 =0xd6
2283 20:28:18.457515 [Gating]
2284 20:28:18.457580 ==
2285 20:28:18.464522 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2286 20:28:18.467436 fsp= 1, odt_onoff= 1, Byte mode= 0
2287 20:28:18.467567 ==
2288 20:28:18.471163 3 1 0 |3131 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2289 20:28:18.477685 3 1 4 |3333 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2290 20:28:18.480949 3 1 8 |1c1c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2291 20:28:18.484418 3 1 12 |3231 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2292 20:28:18.487899 3 1 16 |f0e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2293 20:28:18.494551 3 1 20 |302f 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2294 20:28:18.498012 3 1 24 |2e2d 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2295 20:28:18.501286 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2296 20:28:18.508137 3 2 0 |504 706 |(11 11)(11 11) |(1 1)(1 1)| 0
2297 20:28:18.511440 3 2 4 |3030 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2298 20:28:18.514406 3 2 8 |3938 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2299 20:28:18.517843 [Byte 0] Lead/lag Transition tap number (1)
2300 20:28:18.524738 3 2 12 |3636 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2301 20:28:18.528076 3 2 16 |2d2c 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2302 20:28:18.531256 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2303 20:28:18.538076 3 2 24 |1a19 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2304 20:28:18.541364 3 2 28 |3636 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2305 20:28:18.545240 3 3 0 |504 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2306 20:28:18.547804 3 3 4 |3534 605 |(11 11)(11 11) |(0 1)(1 1)| 0
2307 20:28:18.554981 3 3 8 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
2308 20:28:18.558203 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2309 20:28:18.561582 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2310 20:28:18.564996 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2311 20:28:18.571829 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2312 20:28:18.575170 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2313 20:28:18.578164 3 3 28 |807 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2314 20:28:18.584991 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2315 20:28:18.588115 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2316 20:28:18.591987 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2317 20:28:18.598539 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2318 20:28:18.601613 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2319 20:28:18.605254 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2320 20:28:18.611663 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 20:28:18.615505 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2322 20:28:18.618518 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2323 20:28:18.621769 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2324 20:28:18.628211 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 20:28:18.631799 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2326 20:28:18.634944 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2327 20:28:18.642188 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2328 20:28:18.645131 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2329 20:28:18.648639 [Byte 0] Lead/lag Transition tap number (2)
2330 20:28:18.652044 [Byte 1] Lead/lag falling Transition (3, 5, 20)
2331 20:28:18.659267 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2332 20:28:18.662141 [Byte 1] Lead/lag Transition tap number (2)
2333 20:28:18.665436 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2334 20:28:18.668684 3 6 0 |4646 1413 |(0 0)(11 11) |(0 0)(0 0)| 0
2335 20:28:18.672091 [Byte 0]First pass (3, 6, 0)
2336 20:28:18.675529 3 6 4 |4646 3a3a |(0 0)(11 11) |(0 0)(0 0)| 0
2337 20:28:18.678613 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2338 20:28:18.681892 [Byte 1]First pass (3, 6, 8)
2339 20:28:18.685195 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2340 20:28:18.691860 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2341 20:28:18.695455 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2342 20:28:18.699014 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2343 20:28:18.701925 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2344 20:28:18.705529 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2345 20:28:18.712059 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2346 20:28:18.715395 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2347 20:28:18.718599 All bytes gating window > 1UI, Early break!
2348 20:28:18.719085
2349 20:28:18.721918 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2350 20:28:18.722217
2351 20:28:18.725175 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
2352 20:28:18.725445
2353 20:28:18.725623
2354 20:28:18.725787
2355 20:28:18.731917 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2356 20:28:18.732227
2357 20:28:18.735313 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2358 20:28:18.735503
2359 20:28:18.735624
2360 20:28:18.738610 Write Rank0 MR1 =0x56
2361 20:28:18.738793
2362 20:28:18.738919 best RODT dly(2T, 0.5T) = (2, 2)
2363 20:28:18.739055
2364 20:28:18.741776 best RODT dly(2T, 0.5T) = (2, 2)
2365 20:28:18.741980 ==
2366 20:28:18.748955 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2367 20:28:18.751904 fsp= 1, odt_onoff= 1, Byte mode= 0
2368 20:28:18.752142 ==
2369 20:28:18.755217 Start DQ dly to find pass range UseTestEngine =0
2370 20:28:18.758826 x-axis: bit #, y-axis: DQ dly (-127~63)
2371 20:28:18.761956 RX Vref Scan = 0
2372 20:28:18.765597 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2373 20:28:18.768404 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2374 20:28:18.768489 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2375 20:28:18.772062 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2376 20:28:18.775357 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2377 20:28:18.778652 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2378 20:28:18.782245 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2379 20:28:18.785868 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2380 20:28:18.788514 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2381 20:28:18.792048 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2382 20:28:18.792158 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2383 20:28:18.795132 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2384 20:28:18.798698 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2385 20:28:18.802174 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2386 20:28:18.805670 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2387 20:28:18.808660 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2388 20:28:18.812191 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2389 20:28:18.812268 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2390 20:28:18.815960 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2391 20:28:18.818530 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2392 20:28:18.822033 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2393 20:28:18.825400 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2394 20:28:18.828856 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2395 20:28:18.832082 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2396 20:28:18.832164 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2397 20:28:18.835785 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2398 20:28:18.839044 0, [0] xxxoxxxx xxxxxxxx [MSB]
2399 20:28:18.842757 1, [0] xxxoxxxx xxxxxxxo [MSB]
2400 20:28:18.845710 2, [0] xxooxxxo xxxxxxxo [MSB]
2401 20:28:18.849156 3, [0] xxooxxxo xxxxxxxo [MSB]
2402 20:28:18.849664 4, [0] xxoooxxo xooxxoxo [MSB]
2403 20:28:18.852834 5, [0] xxoooxxo oooooooo [MSB]
2404 20:28:18.856354 6, [0] xooooxxo oooooooo [MSB]
2405 20:28:18.859218 7, [0] xoooooxo oooooooo [MSB]
2406 20:28:18.862736 8, [0] xoooooxo oooooooo [MSB]
2407 20:28:18.866227 32, [0] ooxxoooo oooooooo [MSB]
2408 20:28:18.866690 33, [0] ooxxoooo ooooooox [MSB]
2409 20:28:18.869204 34, [0] ooxxoooo ooooooox [MSB]
2410 20:28:18.872936 35, [0] ooxxoooo ooxoooox [MSB]
2411 20:28:18.876220 36, [0] ooxxxoox xoxoooox [MSB]
2412 20:28:18.879868 37, [0] ooxxxoox xxxooxxx [MSB]
2413 20:28:18.882816 38, [0] ooxxxoox xxxxoxxx [MSB]
2414 20:28:18.886237 39, [0] ooxxxoox xxxxxxxx [MSB]
2415 20:28:18.886574 40, [0] oxxxxoox xxxxxxxx [MSB]
2416 20:28:18.889220 41, [0] xxxxxxxx xxxxxxxx [MSB]
2417 20:28:18.892859 iDelay=41, Bit 0, Center 24 (9 ~ 40) 32
2418 20:28:18.896001 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2419 20:28:18.899096 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2420 20:28:18.903091 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2421 20:28:18.906444 iDelay=41, Bit 4, Center 19 (4 ~ 35) 32
2422 20:28:18.909861 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2423 20:28:18.916336 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2424 20:28:18.919610 iDelay=41, Bit 7, Center 18 (2 ~ 35) 34
2425 20:28:18.922997 iDelay=41, Bit 8, Center 20 (5 ~ 35) 31
2426 20:28:18.926350 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2427 20:28:18.930041 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2428 20:28:18.933052 iDelay=41, Bit 11, Center 21 (5 ~ 37) 33
2429 20:28:18.936212 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2430 20:28:18.939336 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2431 20:28:18.942794 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2432 20:28:18.946072 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2433 20:28:18.946255 ==
2434 20:28:18.953215 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2435 20:28:18.956321 fsp= 1, odt_onoff= 1, Byte mode= 0
2436 20:28:18.956553 ==
2437 20:28:18.956811 DQS Delay:
2438 20:28:18.959637 DQS0 = 0, DQS1 = 0
2439 20:28:18.959878 DQM Delay:
2440 20:28:18.963291 DQM0 = 20, DQM1 = 19
2441 20:28:18.963587 DQ Delay:
2442 20:28:18.966238 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2443 20:28:18.969663 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =18
2444 20:28:18.973382 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =21
2445 20:28:18.976411 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2446 20:28:18.976833
2447 20:28:18.977162
2448 20:28:18.977506 DramC Write-DBI off
2449 20:28:18.977807 ==
2450 20:28:18.983704 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2451 20:28:18.986456 fsp= 1, odt_onoff= 1, Byte mode= 0
2452 20:28:18.986880 ==
2453 20:28:18.989689 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2454 20:28:18.990105
2455 20:28:18.992921 Begin, DQ Scan Range 928~1184
2456 20:28:18.993369
2457 20:28:18.993705
2458 20:28:18.996473 TX Vref Scan disable
2459 20:28:18.999715 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2460 20:28:19.002791 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2461 20:28:19.006373 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2462 20:28:19.009500 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2463 20:28:19.013329 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2464 20:28:19.016509 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2465 20:28:19.019420 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2466 20:28:19.023017 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2467 20:28:19.026170 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2468 20:28:19.029470 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2469 20:28:19.033007 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2470 20:28:19.039471 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2471 20:28:19.043133 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2472 20:28:19.046419 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2473 20:28:19.049801 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2474 20:28:19.052912 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2475 20:28:19.056306 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2476 20:28:19.059473 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2477 20:28:19.062920 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2478 20:28:19.066296 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2479 20:28:19.069987 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2480 20:28:19.072967 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2481 20:28:19.076260 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2482 20:28:19.079762 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2483 20:28:19.082662 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2484 20:28:19.086127 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2485 20:28:19.089500 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2486 20:28:19.093132 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2487 20:28:19.099974 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2488 20:28:19.103019 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2489 20:28:19.106356 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2490 20:28:19.109895 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2491 20:28:19.112956 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2492 20:28:19.116508 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2493 20:28:19.119354 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2494 20:28:19.123065 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2495 20:28:19.126588 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2496 20:28:19.129392 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2497 20:28:19.133101 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2498 20:28:19.136050 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2499 20:28:19.139324 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
2500 20:28:19.143038 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
2501 20:28:19.146004 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
2502 20:28:19.149697 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
2503 20:28:19.153011 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2504 20:28:19.156028 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2505 20:28:19.159435 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2506 20:28:19.162701 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2507 20:28:19.169751 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2508 20:28:19.172777 977 |3 6 17|[0] ooooooxo oooooooo [MSB]
2509 20:28:19.175912 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2510 20:28:19.179448 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2511 20:28:19.183091 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2512 20:28:19.186663 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2513 20:28:19.192990 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2514 20:28:19.195963 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
2515 20:28:19.199343 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2516 20:28:19.202808 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
2517 20:28:19.206185 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2518 20:28:19.209642 Byte0, DQ PI dly=986, DQM PI dly= 986
2519 20:28:19.212992 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2520 20:28:19.213438
2521 20:28:19.215969 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2522 20:28:19.216568
2523 20:28:19.219372 Byte1, DQ PI dly=979, DQM PI dly= 979
2524 20:28:19.226039 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2525 20:28:19.226473
2526 20:28:19.229693 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2527 20:28:19.230286
2528 20:28:19.230746 ==
2529 20:28:19.235912 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2530 20:28:19.239777 fsp= 1, odt_onoff= 1, Byte mode= 0
2531 20:28:19.240198 ==
2532 20:28:19.242710 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2533 20:28:19.243132
2534 20:28:19.246327 Begin, DQ Scan Range 955~1019
2535 20:28:19.246746 Write Rank0 MR14 =0x0
2536 20:28:19.256413
2537 20:28:19.256829 CH=1, VrefRange= 0, VrefLevel = 0
2538 20:28:19.262698 TX Bit0 (979~998) 20 988, Bit8 (970~986) 17 978,
2539 20:28:19.266275 TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978,
2540 20:28:19.272983 TX Bit2 (977~992) 16 984, Bit10 (972~986) 15 979,
2541 20:28:19.276374 TX Bit3 (975~990) 16 982, Bit11 (974~989) 16 981,
2542 20:28:19.279536 TX Bit4 (977~993) 17 985, Bit12 (973~989) 17 981,
2543 20:28:19.286268 TX Bit5 (978~997) 20 987, Bit13 (975~989) 15 982,
2544 20:28:19.289680 TX Bit6 (980~997) 18 988, Bit14 (973~987) 15 980,
2545 20:28:19.292906 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
2546 20:28:19.293402
2547 20:28:19.295964 Write Rank0 MR14 =0x2
2548 20:28:19.304964
2549 20:28:19.305466 CH=1, VrefRange= 0, VrefLevel = 2
2550 20:28:19.311805 TX Bit0 (979~998) 20 988, Bit8 (970~987) 18 978,
2551 20:28:19.315067 TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977,
2552 20:28:19.321584 TX Bit2 (977~992) 16 984, Bit10 (972~987) 16 979,
2553 20:28:19.325236 TX Bit3 (975~990) 16 982, Bit11 (974~990) 17 982,
2554 20:28:19.328131 TX Bit4 (977~994) 18 985, Bit12 (973~990) 18 981,
2555 20:28:19.335075 TX Bit5 (978~998) 21 988, Bit13 (975~990) 16 982,
2556 20:28:19.338471 TX Bit6 (979~998) 20 988, Bit14 (973~988) 16 980,
2557 20:28:19.341879 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
2558 20:28:19.342307
2559 20:28:19.345135 Write Rank0 MR14 =0x4
2560 20:28:19.353872
2561 20:28:19.354294 CH=1, VrefRange= 0, VrefLevel = 4
2562 20:28:19.360398 TX Bit0 (978~999) 22 988, Bit8 (970~987) 18 978,
2563 20:28:19.363875 TX Bit1 (977~997) 21 987, Bit9 (970~987) 18 978,
2564 20:28:19.370395 TX Bit2 (977~992) 16 984, Bit10 (971~987) 17 979,
2565 20:28:19.374055 TX Bit3 (975~991) 17 983, Bit11 (974~990) 17 982,
2566 20:28:19.377644 TX Bit4 (977~994) 18 985, Bit12 (972~991) 20 981,
2567 20:28:19.383913 TX Bit5 (978~998) 21 988, Bit13 (974~990) 17 982,
2568 20:28:19.386826 TX Bit6 (979~998) 20 988, Bit14 (972~988) 17 980,
2569 20:28:19.390357 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2570 20:28:19.391024
2571 20:28:19.393527 Write Rank0 MR14 =0x6
2572 20:28:19.402661
2573 20:28:19.403233 CH=1, VrefRange= 0, VrefLevel = 6
2574 20:28:19.409409 TX Bit0 (978~999) 22 988, Bit8 (970~987) 18 978,
2575 20:28:19.413206 TX Bit1 (977~998) 22 987, Bit9 (970~987) 18 978,
2576 20:28:19.419212 TX Bit2 (976~993) 18 984, Bit10 (972~989) 18 980,
2577 20:28:19.422958 TX Bit3 (975~991) 17 983, Bit11 (973~991) 19 982,
2578 20:28:19.426076 TX Bit4 (977~995) 19 986, Bit12 (972~991) 20 981,
2579 20:28:19.432544 TX Bit5 (978~999) 22 988, Bit13 (973~991) 19 982,
2580 20:28:19.436114 TX Bit6 (979~999) 21 989, Bit14 (972~989) 18 980,
2581 20:28:19.439646 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2582 20:28:19.440201
2583 20:28:19.442676 Write Rank0 MR14 =0x8
2584 20:28:19.451476
2585 20:28:19.451897 CH=1, VrefRange= 0, VrefLevel = 8
2586 20:28:19.458703 TX Bit0 (978~999) 22 988, Bit8 (969~988) 20 978,
2587 20:28:19.461734 TX Bit1 (977~998) 22 987, Bit9 (969~987) 19 978,
2588 20:28:19.468576 TX Bit2 (977~994) 18 985, Bit10 (970~990) 21 980,
2589 20:28:19.471445 TX Bit3 (974~992) 19 983, Bit11 (973~991) 19 982,
2590 20:28:19.474850 TX Bit4 (977~996) 20 986, Bit12 (971~991) 21 981,
2591 20:28:19.481993 TX Bit5 (977~998) 22 987, Bit13 (973~991) 19 982,
2592 20:28:19.484819 TX Bit6 (979~998) 20 988, Bit14 (972~990) 19 981,
2593 20:28:19.488529 TX Bit7 (977~994) 18 985, Bit15 (967~987) 21 977,
2594 20:28:19.488954
2595 20:28:19.491474 Write Rank0 MR14 =0xa
2596 20:28:19.500529
2597 20:28:19.504038 CH=1, VrefRange= 0, VrefLevel = 10
2598 20:28:19.507127 TX Bit0 (978~999) 22 988, Bit8 (969~988) 20 978,
2599 20:28:19.510905 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
2600 20:28:19.517158 TX Bit2 (976~994) 19 985, Bit10 (970~990) 21 980,
2601 20:28:19.520559 TX Bit3 (974~992) 19 983, Bit11 (972~992) 21 982,
2602 20:28:19.524442 TX Bit4 (977~997) 21 987, Bit12 (971~992) 22 981,
2603 20:28:19.530801 TX Bit5 (977~999) 23 988, Bit13 (973~991) 19 982,
2604 20:28:19.533824 TX Bit6 (978~999) 22 988, Bit14 (972~991) 20 981,
2605 20:28:19.537396 TX Bit7 (977~995) 19 986, Bit15 (967~988) 22 977,
2606 20:28:19.537819
2607 20:28:19.540675 Write Rank0 MR14 =0xc
2608 20:28:19.550074
2609 20:28:19.553305 CH=1, VrefRange= 0, VrefLevel = 12
2610 20:28:19.556457 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
2611 20:28:19.559607 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
2612 20:28:19.566260 TX Bit2 (976~995) 20 985, Bit10 (970~991) 22 980,
2613 20:28:19.569576 TX Bit3 (973~993) 21 983, Bit11 (972~992) 21 982,
2614 20:28:19.572979 TX Bit4 (977~997) 21 987, Bit12 (970~992) 23 981,
2615 20:28:19.579741 TX Bit5 (977~999) 23 988, Bit13 (973~991) 19 982,
2616 20:28:19.582924 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
2617 20:28:19.586082 TX Bit7 (976~996) 21 986, Bit15 (967~988) 22 977,
2618 20:28:19.589550
2619 20:28:19.589967 Write Rank0 MR14 =0xe
2620 20:28:19.599153
2621 20:28:19.602224 CH=1, VrefRange= 0, VrefLevel = 14
2622 20:28:19.605592 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
2623 20:28:19.609124 TX Bit1 (977~999) 23 988, Bit9 (969~989) 21 979,
2624 20:28:19.615555 TX Bit2 (975~996) 22 985, Bit10 (970~991) 22 980,
2625 20:28:19.618946 TX Bit3 (973~993) 21 983, Bit11 (971~992) 22 981,
2626 20:28:19.622074 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2627 20:28:19.629213 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
2628 20:28:19.632485 TX Bit6 (978~1000) 23 989, Bit14 (971~991) 21 981,
2629 20:28:19.638685 TX Bit7 (976~996) 21 986, Bit15 (967~989) 23 978,
2630 20:28:19.639110
2631 20:28:19.639440 Write Rank0 MR14 =0x10
2632 20:28:19.648134
2633 20:28:19.651521 CH=1, VrefRange= 0, VrefLevel = 16
2634 20:28:19.655105 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
2635 20:28:19.658185 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
2636 20:28:19.664709 TX Bit2 (975~996) 22 985, Bit10 (969~991) 23 980,
2637 20:28:19.668160 TX Bit3 (972~994) 23 983, Bit11 (970~992) 23 981,
2638 20:28:19.671888 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2639 20:28:19.678561 TX Bit5 (977~1000) 24 988, Bit13 (972~992) 21 982,
2640 20:28:19.681582 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
2641 20:28:19.688190 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2642 20:28:19.688697
2643 20:28:19.689026 Write Rank0 MR14 =0x12
2644 20:28:19.697920
2645 20:28:19.701087 CH=1, VrefRange= 0, VrefLevel = 18
2646 20:28:19.704463 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
2647 20:28:19.708132 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2648 20:28:19.714490 TX Bit2 (975~997) 23 986, Bit10 (969~992) 24 980,
2649 20:28:19.718009 TX Bit3 (972~994) 23 983, Bit11 (970~993) 24 981,
2650 20:28:19.721019 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2651 20:28:19.728027 TX Bit5 (977~1000) 24 988, Bit13 (970~993) 24 981,
2652 20:28:19.731271 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
2653 20:28:19.738020 TX Bit7 (976~997) 22 986, Bit15 (967~991) 25 979,
2654 20:28:19.738444
2655 20:28:19.738777 Write Rank0 MR14 =0x14
2656 20:28:19.747747
2657 20:28:19.750877 CH=1, VrefRange= 0, VrefLevel = 20
2658 20:28:19.754500 TX Bit0 (977~1001) 25 989, Bit8 (968~992) 25 980,
2659 20:28:19.757375 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2660 20:28:19.764368 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
2661 20:28:19.767435 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
2662 20:28:19.770692 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
2663 20:28:19.777408 TX Bit5 (977~1000) 24 988, Bit13 (971~992) 22 981,
2664 20:28:19.780780 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
2665 20:28:19.784099 TX Bit7 (976~998) 23 987, Bit15 (966~990) 25 978,
2666 20:28:19.787761
2667 20:28:19.788177 Write Rank0 MR14 =0x16
2668 20:28:19.797051
2669 20:28:19.800684 CH=1, VrefRange= 0, VrefLevel = 22
2670 20:28:19.803986 TX Bit0 (977~1001) 25 989, Bit8 (968~992) 25 980,
2671 20:28:19.807143 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
2672 20:28:19.813844 TX Bit2 (974~998) 25 986, Bit10 (969~992) 24 980,
2673 20:28:19.817104 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
2674 20:28:19.820771 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2675 20:28:19.827303 TX Bit5 (977~1001) 25 989, Bit13 (970~992) 23 981,
2676 20:28:19.830880 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
2677 20:28:19.837130 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2678 20:28:19.837603
2679 20:28:19.837935 Write Rank0 MR14 =0x18
2680 20:28:19.847275
2681 20:28:19.850669 CH=1, VrefRange= 0, VrefLevel = 24
2682 20:28:19.853755 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2683 20:28:19.856875 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2684 20:28:19.863654 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
2685 20:28:19.867165 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2686 20:28:19.870424 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2687 20:28:19.876788 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2688 20:28:19.880563 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2689 20:28:19.886776 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2690 20:28:19.887185
2691 20:28:19.887717 Write Rank0 MR14 =0x1a
2692 20:28:19.897123
2693 20:28:19.900274 CH=1, VrefRange= 0, VrefLevel = 26
2694 20:28:19.903831 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2695 20:28:19.907058 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2696 20:28:19.913365 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
2697 20:28:19.916742 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2698 20:28:19.919961 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2699 20:28:19.926868 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2700 20:28:19.930463 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2701 20:28:19.936939 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2702 20:28:19.937505
2703 20:28:19.937889 Write Rank0 MR14 =0x1c
2704 20:28:19.946924
2705 20:28:19.950282 CH=1, VrefRange= 0, VrefLevel = 28
2706 20:28:19.953218 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2707 20:28:19.956784 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2708 20:28:19.963247 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
2709 20:28:19.966580 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2710 20:28:19.969496 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2711 20:28:19.976887 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2712 20:28:19.980277 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2713 20:28:19.986375 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2714 20:28:19.986796
2715 20:28:19.987127 Write Rank0 MR14 =0x1e
2716 20:28:19.996266
2717 20:28:19.999942 CH=1, VrefRange= 0, VrefLevel = 30
2718 20:28:20.003297 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2719 20:28:20.006335 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2720 20:28:20.013119 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
2721 20:28:20.016650 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2722 20:28:20.019897 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2723 20:28:20.026239 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2724 20:28:20.029706 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2725 20:28:20.036136 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2726 20:28:20.036730
2727 20:28:20.037211 Write Rank0 MR14 =0x20
2728 20:28:20.046201
2729 20:28:20.049376 CH=1, VrefRange= 0, VrefLevel = 32
2730 20:28:20.052770 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2731 20:28:20.056470 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2732 20:28:20.062864 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
2733 20:28:20.065900 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2734 20:28:20.069396 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2735 20:28:20.076138 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2736 20:28:20.079356 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2737 20:28:20.086103 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2738 20:28:20.086527
2739 20:28:20.086854
2740 20:28:20.089375 TX Vref found, early break! 371< 378
2741 20:28:20.092702 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2742 20:28:20.095879 u1DelayCellOfst[0]=7 cells (6 PI)
2743 20:28:20.099524 u1DelayCellOfst[1]=6 cells (5 PI)
2744 20:28:20.102466 u1DelayCellOfst[2]=2 cells (2 PI)
2745 20:28:20.105961 u1DelayCellOfst[3]=0 cells (0 PI)
2746 20:28:20.109744 u1DelayCellOfst[4]=5 cells (4 PI)
2747 20:28:20.110182 u1DelayCellOfst[5]=6 cells (5 PI)
2748 20:28:20.112459 u1DelayCellOfst[6]=7 cells (6 PI)
2749 20:28:20.116077 u1DelayCellOfst[7]=3 cells (3 PI)
2750 20:28:20.119445 Byte0, DQ PI dly=983, DQM PI dly= 986
2751 20:28:20.126219 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2752 20:28:20.126657
2753 20:28:20.129482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2754 20:28:20.129921
2755 20:28:20.132841 u1DelayCellOfst[8]=2 cells (2 PI)
2756 20:28:20.136110 u1DelayCellOfst[9]=2 cells (2 PI)
2757 20:28:20.139567 u1DelayCellOfst[10]=2 cells (2 PI)
2758 20:28:20.143181 u1DelayCellOfst[11]=3 cells (3 PI)
2759 20:28:20.145861 u1DelayCellOfst[12]=3 cells (3 PI)
2760 20:28:20.149196 u1DelayCellOfst[13]=3 cells (3 PI)
2761 20:28:20.149667 u1DelayCellOfst[14]=2 cells (2 PI)
2762 20:28:20.152918 u1DelayCellOfst[15]=0 cells (0 PI)
2763 20:28:20.155695 Byte1, DQ PI dly=978, DQM PI dly= 979
2764 20:28:20.162498 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2765 20:28:20.162923
2766 20:28:20.165767 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2767 20:28:20.166195
2768 20:28:20.169108 Write Rank0 MR14 =0x18
2769 20:28:20.169595
2770 20:28:20.169928 Final TX Range 0 Vref 24
2771 20:28:20.170238
2772 20:28:20.175806 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2773 20:28:20.176242
2774 20:28:20.182397 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2775 20:28:20.192665 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2776 20:28:20.198835 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2777 20:28:20.199261 Write Rank0 MR3 =0xb0
2778 20:28:20.202385 DramC Write-DBI on
2779 20:28:20.202877 ==
2780 20:28:20.205882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2781 20:28:20.209394 fsp= 1, odt_onoff= 1, Byte mode= 0
2782 20:28:20.209866 ==
2783 20:28:20.215910 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2784 20:28:20.216521
2785 20:28:20.218980 Begin, DQ Scan Range 699~763
2786 20:28:20.219492
2787 20:28:20.220009
2788 20:28:20.220524 TX Vref Scan disable
2789 20:28:20.222157 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2790 20:28:20.225716 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2791 20:28:20.229255 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2792 20:28:20.232409 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2793 20:28:20.235309 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2794 20:28:20.242068 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2795 20:28:20.245309 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2796 20:28:20.248662 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2797 20:28:20.252074 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2798 20:28:20.255710 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2799 20:28:20.258667 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2800 20:28:20.262373 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2801 20:28:20.265524 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2802 20:28:20.268607 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2803 20:28:20.272091 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2804 20:28:20.275486 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2805 20:28:20.278851 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2806 20:28:20.281947 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2807 20:28:20.285175 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2808 20:28:20.288729 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2809 20:28:20.296581 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2810 20:28:20.300149 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2811 20:28:20.303326 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2812 20:28:20.306653 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2813 20:28:20.309866 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2814 20:28:20.313318 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2815 20:28:20.317077 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2816 20:28:20.319927 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2817 20:28:20.323401 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2818 20:28:20.326768 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2819 20:28:20.330158 Byte0, DQ PI dly=731, DQM PI dly= 731
2820 20:28:20.333765 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2821 20:28:20.333847
2822 20:28:20.340057 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2823 20:28:20.340140
2824 20:28:20.343407 Byte1, DQ PI dly=722, DQM PI dly= 722
2825 20:28:20.346433 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2826 20:28:20.346517
2827 20:28:20.350210 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2828 20:28:20.353149
2829 20:28:20.356681 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2830 20:28:20.366930 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2831 20:28:20.373664 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2832 20:28:20.373747 Write Rank0 MR3 =0x30
2833 20:28:20.376687 DramC Write-DBI off
2834 20:28:20.376769
2835 20:28:20.376834 [DATLAT]
2836 20:28:20.380195 Freq=1600, CH1 RK0, use_rxtx_scan=0
2837 20:28:20.380279
2838 20:28:20.383531 DATLAT Default: 0xf
2839 20:28:20.383612 7, 0xFFFF, sum=0
2840 20:28:20.386872 8, 0xFFFF, sum=0
2841 20:28:20.386954 9, 0xFFFF, sum=0
2842 20:28:20.390073 10, 0xFFFF, sum=0
2843 20:28:20.390156 11, 0xFFFF, sum=0
2844 20:28:20.390222 12, 0xFFFF, sum=0
2845 20:28:20.393713 13, 0xFFFF, sum=0
2846 20:28:20.393811 14, 0x0, sum=1
2847 20:28:20.397183 15, 0x0, sum=2
2848 20:28:20.397271 16, 0x0, sum=3
2849 20:28:20.400679 17, 0x0, sum=4
2850 20:28:20.403452 pattern=2 first_step=14 total pass=5 best_step=16
2851 20:28:20.403534 ==
2852 20:28:20.410956 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2853 20:28:20.411038 fsp= 1, odt_onoff= 1, Byte mode= 0
2854 20:28:20.413770 ==
2855 20:28:20.417408 Start DQ dly to find pass range UseTestEngine =1
2856 20:28:20.420141 x-axis: bit #, y-axis: DQ dly (-127~63)
2857 20:28:20.420223 RX Vref Scan = 1
2858 20:28:20.544005
2859 20:28:20.544145 RX Vref found, early break!
2860 20:28:20.544213
2861 20:28:20.550671 Final RX Vref 13, apply to both rank0 and 1
2862 20:28:20.550758 ==
2863 20:28:20.554064 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2864 20:28:20.557069 fsp= 1, odt_onoff= 1, Byte mode= 0
2865 20:28:20.557177 ==
2866 20:28:20.557320 DQS Delay:
2867 20:28:20.560848 DQS0 = 0, DQS1 = 0
2868 20:28:20.560951 DQM Delay:
2869 20:28:20.563734 DQM0 = 20, DQM1 = 18
2870 20:28:20.563822 DQ Delay:
2871 20:28:20.567483 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
2872 20:28:20.570784 DQ4 =19, DQ5 =23, DQ6 =25, DQ7 =19
2873 20:28:20.573814 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2874 20:28:20.577406 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2875 20:28:20.577490
2876 20:28:20.577593
2877 20:28:20.577653
2878 20:28:20.580665 [DramC_TX_OE_Calibration] TA2
2879 20:28:20.583908 Original DQ_B0 (3 6) =30, OEN = 27
2880 20:28:20.587132 Original DQ_B1 (3 6) =30, OEN = 27
2881 20:28:20.590548 23, 0x0, End_B0=23 End_B1=23
2882 20:28:20.590631 24, 0x0, End_B0=24 End_B1=24
2883 20:28:20.594233 25, 0x0, End_B0=25 End_B1=25
2884 20:28:20.597477 26, 0x0, End_B0=26 End_B1=26
2885 20:28:20.600609 27, 0x0, End_B0=27 End_B1=27
2886 20:28:20.600692 28, 0x0, End_B0=28 End_B1=28
2887 20:28:20.604407 29, 0x0, End_B0=29 End_B1=29
2888 20:28:20.607277 30, 0x0, End_B0=30 End_B1=30
2889 20:28:20.610682 31, 0xFFFF, End_B0=30 End_B1=30
2890 20:28:20.617141 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2891 20:28:20.620424 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2892 20:28:20.620507
2893 20:28:20.620571
2894 20:28:20.624024 Write Rank0 MR23 =0x3f
2895 20:28:20.624105 [DQSOSC]
2896 20:28:20.630369 [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2897 20:28:20.637387 CH1_RK0: MR19=0x3, MR18=0xBF, DQSOSC=328, MR23=63, INC=22, DEC=34
2898 20:28:20.640567 Write Rank0 MR23 =0x3f
2899 20:28:20.640648 [DQSOSC]
2900 20:28:20.647560 [DQSOSCAuto] RK0, (LSB)MR18= 0xba, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2901 20:28:20.650543 CH1 RK0: MR19=3, MR18=BA
2902 20:28:20.653850 [RankSwap] Rank num 2, (Multi 1), Rank 1
2903 20:28:20.657224 Write Rank0 MR2 =0xad
2904 20:28:20.657346 [Write Leveling]
2905 20:28:20.660766 delay byte0 byte1 byte2 byte3
2906 20:28:20.660847
2907 20:28:20.663908 10 0 0
2908 20:28:20.663991 11 0 0
2909 20:28:20.664057 12 0 0
2910 20:28:20.667200 13 0 0
2911 20:28:20.667282 14 0 0
2912 20:28:20.670684 15 0 0
2913 20:28:20.670767 16 0 0
2914 20:28:20.670832 17 0 0
2915 20:28:20.674411 18 0 0
2916 20:28:20.674494 19 0 0
2917 20:28:20.677088 20 0 0
2918 20:28:20.677170 21 0 0
2919 20:28:20.677252 22 0 0
2920 20:28:20.680831 23 0 0
2921 20:28:20.680913 24 0 0
2922 20:28:20.683839 25 0 0
2923 20:28:20.683922 26 0 0
2924 20:28:20.687010 27 0 0
2925 20:28:20.687092 28 0 0
2926 20:28:20.687158 29 0 0
2927 20:28:20.690418 30 0 0
2928 20:28:20.690500 31 0 0
2929 20:28:20.694214 32 0 ff
2930 20:28:20.694296 33 0 ff
2931 20:28:20.696972 34 0 ff
2932 20:28:20.697054 35 ff ff
2933 20:28:20.697134 36 ff ff
2934 20:28:20.700277 37 ff ff
2935 20:28:20.700359 38 ff ff
2936 20:28:20.703652 39 ff ff
2937 20:28:20.703734 40 ff ff
2938 20:28:20.706994 41 ff ff
2939 20:28:20.710364 pass bytecount = 0xff (0xff: all bytes pass)
2940 20:28:20.710446
2941 20:28:20.710509 DQS0 dly: 35
2942 20:28:20.714065 DQS1 dly: 32
2943 20:28:20.714145 Write Rank0 MR2 =0x2d
2944 20:28:20.717158 [RankSwap] Rank num 2, (Multi 1), Rank 0
2945 20:28:20.720173 Write Rank1 MR1 =0xd6
2946 20:28:20.720255 [Gating]
2947 20:28:20.720319 ==
2948 20:28:20.726921 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2949 20:28:20.730375 fsp= 1, odt_onoff= 1, Byte mode= 0
2950 20:28:20.730458 ==
2951 20:28:20.733678 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2952 20:28:20.739964 3 1 4 |202 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2953 20:28:20.743533 3 1 8 |e0d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2954 20:28:20.747067 3 1 12 |2625 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2955 20:28:20.750491 3 1 16 |2e2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2956 20:28:20.756828 3 1 20 |2c2c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2957 20:28:20.760311 3 1 24 |302f 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2958 20:28:20.763349 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2959 20:28:20.770130 3 2 0 |3131 807 |(11 11)(11 11) |(0 0)(1 1)| 0
2960 20:28:20.773456 3 2 4 |3535 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2961 20:28:20.776957 3 2 8 |201f 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2962 20:28:20.780594 3 2 12 |3535 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2963 20:28:20.787039 3 2 16 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2964 20:28:20.790049 3 2 20 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2965 20:28:20.793667 3 2 24 |3535 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2966 20:28:20.800335 3 2 28 |3535 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2967 20:28:20.803684 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2968 20:28:20.806876 [Byte 0] Lead/lag falling Transition (3, 3, 0)
2969 20:28:20.810108 3 3 4 |3534 403 |(11 11)(11 11) |(0 1)(1 1)| 0
2970 20:28:20.816895 3 3 8 |3534 2f2e |(11 11)(11 11) |(0 1)(1 1)| 0
2971 20:28:20.820045 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2972 20:28:20.823683 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2973 20:28:20.830416 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2974 20:28:20.833128 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2975 20:28:20.836649 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2976 20:28:20.843049 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2977 20:28:20.846360 3 4 0 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2978 20:28:20.849755 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2979 20:28:20.856271 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2980 20:28:20.859857 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 20:28:20.863194 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2982 20:28:20.866432 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2983 20:28:20.873468 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2984 20:28:20.876384 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2985 20:28:20.880148 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2986 20:28:20.886374 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2987 20:28:20.889998 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2988 20:28:20.893296 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2989 20:28:20.899911 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2990 20:28:20.903357 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2991 20:28:20.906762 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2992 20:28:20.910334 [Byte 0] Lead/lag Transition tap number (2)
2993 20:28:20.916706 [Byte 1] Lead/lag falling Transition (3, 5, 20)
2994 20:28:20.920140 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2995 20:28:20.923532 [Byte 1] Lead/lag Transition tap number (2)
2996 20:28:20.926869 3 5 28 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
2997 20:28:20.933506 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2998 20:28:20.933590 [Byte 0]First pass (3, 6, 0)
2999 20:28:20.939947 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3000 20:28:20.940031 [Byte 1]First pass (3, 6, 4)
3001 20:28:20.946535 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3002 20:28:20.949953 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3003 20:28:20.953461 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3004 20:28:20.956563 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3005 20:28:20.960126 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3006 20:28:20.966707 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3007 20:28:20.970174 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3008 20:28:20.973443 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3009 20:28:20.976909 All bytes gating window > 1UI, Early break!
3010 20:28:20.976992
3011 20:28:20.979751 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3012 20:28:20.979834
3013 20:28:20.982918 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
3014 20:28:20.986630
3015 20:28:20.986712
3016 20:28:20.986777
3017 20:28:20.989596 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3018 20:28:20.989678
3019 20:28:20.993415 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3020 20:28:20.993497
3021 20:28:20.993562
3022 20:28:20.996518 Write Rank1 MR1 =0x56
3023 20:28:20.996600
3024 20:28:21.000028 best RODT dly(2T, 0.5T) = (2, 2)
3025 20:28:21.000110
3026 20:28:21.002944 best RODT dly(2T, 0.5T) = (2, 2)
3027 20:28:21.003026 ==
3028 20:28:21.006605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3029 20:28:21.010152 fsp= 1, odt_onoff= 1, Byte mode= 0
3030 20:28:21.010235 ==
3031 20:28:21.013320 Start DQ dly to find pass range UseTestEngine =0
3032 20:28:21.019930 x-axis: bit #, y-axis: DQ dly (-127~63)
3033 20:28:21.020012 RX Vref Scan = 0
3034 20:28:21.023273 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3035 20:28:21.026329 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3036 20:28:21.029902 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3037 20:28:21.033141 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3038 20:28:21.033224 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3039 20:28:21.036383 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3040 20:28:21.039865 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3041 20:28:21.042895 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3042 20:28:21.046379 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3043 20:28:21.049804 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3044 20:28:21.052844 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3045 20:28:21.056838 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3046 20:28:21.056922 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3047 20:28:21.059814 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3048 20:28:21.063381 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3049 20:28:21.066364 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3050 20:28:21.069559 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3051 20:28:21.073113 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3052 20:28:21.076335 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3053 20:28:21.079607 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3054 20:28:21.079690 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3055 20:28:21.083373 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3056 20:28:21.086575 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3057 20:28:21.090145 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3058 20:28:21.093196 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3059 20:28:21.096624 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3060 20:28:21.096707 0, [0] xxooxxxx xxxxxxxo [MSB]
3061 20:28:21.099578 1, [0] xxoooxxo xxxxxxxo [MSB]
3062 20:28:21.103014 2, [0] xxoooxxo xxxxxxxo [MSB]
3063 20:28:21.106754 3, [0] xxoooxxo ooooxooo [MSB]
3064 20:28:21.109643 4, [0] xxoooxxo ooooxooo [MSB]
3065 20:28:21.113309 5, [0] xoooooxo oooooooo [MSB]
3066 20:28:21.113393 6, [0] xoooooxo oooooooo [MSB]
3067 20:28:21.116909 34, [0] oooxoooo oooooooo [MSB]
3068 20:28:21.120018 35, [0] ooxxoooo ooooooox [MSB]
3069 20:28:21.123715 36, [0] ooxxoooo ooooooox [MSB]
3070 20:28:21.126308 37, [0] ooxxxooo xoxoooox [MSB]
3071 20:28:21.129862 38, [0] ooxxxooo xxxooxox [MSB]
3072 20:28:21.133755 39, [0] ooxxxoox xxxxoxxx [MSB]
3073 20:28:21.133838 40, [0] ooxxxoox xxxxoxxx [MSB]
3074 20:28:21.136334 41, [0] ooxxxoox xxxxxxxx [MSB]
3075 20:28:21.139817 42, [0] xxxxxxxx xxxxxxxx [MSB]
3076 20:28:21.143152 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3077 20:28:21.146502 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3078 20:28:21.149842 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3079 20:28:21.153170 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3080 20:28:21.156699 iDelay=42, Bit 4, Center 18 (1 ~ 36) 36
3081 20:28:21.162862 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3082 20:28:21.166443 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3083 20:28:21.169992 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3084 20:28:21.173491 iDelay=42, Bit 8, Center 19 (3 ~ 36) 34
3085 20:28:21.176303 iDelay=42, Bit 9, Center 20 (3 ~ 37) 35
3086 20:28:21.179635 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3087 20:28:21.182873 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3088 20:28:21.186340 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3089 20:28:21.189698 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3090 20:28:21.192822 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3091 20:28:21.196331 iDelay=42, Bit 15, Center 17 (0 ~ 34) 35
3092 20:28:21.196413 ==
3093 20:28:21.202698 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3094 20:28:21.206315 fsp= 1, odt_onoff= 1, Byte mode= 0
3095 20:28:21.206398 ==
3096 20:28:21.206463 DQS Delay:
3097 20:28:21.209752 DQS0 = 0, DQS1 = 0
3098 20:28:21.209834 DQM Delay:
3099 20:28:21.212826 DQM0 = 20, DQM1 = 19
3100 20:28:21.212921 DQ Delay:
3101 20:28:21.216336 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3102 20:28:21.219692 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
3103 20:28:21.222998 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
3104 20:28:21.226156 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =17
3105 20:28:21.226329
3106 20:28:21.226486
3107 20:28:21.226548 DramC Write-DBI off
3108 20:28:21.229594 ==
3109 20:28:21.232863 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3110 20:28:21.236341 fsp= 1, odt_onoff= 1, Byte mode= 0
3111 20:28:21.236423 ==
3112 20:28:21.239771 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3113 20:28:21.239853
3114 20:28:21.242791 Begin, DQ Scan Range 928~1184
3115 20:28:21.242874
3116 20:28:21.242939
3117 20:28:21.246159 TX Vref Scan disable
3118 20:28:21.249592 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3119 20:28:21.252715 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3120 20:28:21.256279 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3121 20:28:21.259756 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3122 20:28:21.262817 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3123 20:28:21.266245 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3124 20:28:21.269732 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3125 20:28:21.273112 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3126 20:28:21.276464 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3127 20:28:21.282965 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3128 20:28:21.286218 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3129 20:28:21.289503 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3130 20:28:21.292869 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3131 20:28:21.296297 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3132 20:28:21.299585 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3133 20:28:21.302643 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3134 20:28:21.306166 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3135 20:28:21.309825 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3136 20:28:21.312588 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3137 20:28:21.316160 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3138 20:28:21.319847 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3139 20:28:21.322923 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3140 20:28:21.325990 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3141 20:28:21.329482 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3142 20:28:21.332770 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3143 20:28:21.339364 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3144 20:28:21.342460 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3145 20:28:21.346240 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3146 20:28:21.349798 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3147 20:28:21.352433 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3148 20:28:21.355688 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3149 20:28:21.359390 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3150 20:28:21.362595 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3151 20:28:21.365970 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3152 20:28:21.369243 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3153 20:28:21.372623 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3154 20:28:21.375880 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3155 20:28:21.379256 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3156 20:28:21.382790 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3157 20:28:21.386028 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3158 20:28:21.389017 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3159 20:28:21.392462 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3160 20:28:21.395737 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3161 20:28:21.399119 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3162 20:28:21.402710 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3163 20:28:21.405842 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
3164 20:28:21.412542 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3165 20:28:21.415604 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3166 20:28:21.419519 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3167 20:28:21.422487 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3168 20:28:21.425642 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3169 20:28:21.429224 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3170 20:28:21.432312 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3171 20:28:21.439021 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3172 20:28:21.442143 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3173 20:28:21.445573 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3174 20:28:21.449024 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3175 20:28:21.452486 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3176 20:28:21.455599 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3177 20:28:21.459017 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3178 20:28:21.462143 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3179 20:28:21.465724 Byte0, DQ PI dly=985, DQM PI dly= 985
3180 20:28:21.469393 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3181 20:28:21.469473
3182 20:28:21.475652 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3183 20:28:21.475730
3184 20:28:21.479313 Byte1, DQ PI dly=978, DQM PI dly= 978
3185 20:28:21.482788 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3186 20:28:21.482865
3187 20:28:21.485726 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3188 20:28:21.485802
3189 20:28:21.485882 ==
3190 20:28:21.492784 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3191 20:28:21.495710 fsp= 1, odt_onoff= 1, Byte mode= 0
3192 20:28:21.495788 ==
3193 20:28:21.499227 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3194 20:28:21.499327
3195 20:28:21.502424 Begin, DQ Scan Range 954~1018
3196 20:28:21.505663 Write Rank1 MR14 =0x0
3197 20:28:21.513778
3198 20:28:21.513868 CH=1, VrefRange= 0, VrefLevel = 0
3199 20:28:21.520044 TX Bit0 (979~997) 19 988, Bit8 (972~986) 15 979,
3200 20:28:21.523367 TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978,
3201 20:28:21.530438 TX Bit2 (976~991) 16 983, Bit10 (972~986) 15 979,
3202 20:28:21.533395 TX Bit3 (975~990) 16 982, Bit11 (974~991) 18 982,
3203 20:28:21.536755 TX Bit4 (976~992) 17 984, Bit12 (972~988) 17 980,
3204 20:28:21.543786 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3205 20:28:21.546904 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3206 20:28:21.550112 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3207 20:28:21.550212
3208 20:28:21.553700 Write Rank1 MR14 =0x2
3209 20:28:21.562455
3210 20:28:21.562530 CH=1, VrefRange= 0, VrefLevel = 2
3211 20:28:21.569205 TX Bit0 (979~997) 19 988, Bit8 (972~986) 15 979,
3212 20:28:21.572667 TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978,
3213 20:28:21.579421 TX Bit2 (976~991) 16 983, Bit10 (972~986) 15 979,
3214 20:28:21.582615 TX Bit3 (975~990) 16 982, Bit11 (974~991) 18 982,
3215 20:28:21.585823 TX Bit4 (976~992) 17 984, Bit12 (972~988) 17 980,
3216 20:28:21.592672 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3217 20:28:21.595700 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3218 20:28:21.599070 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3219 20:28:21.599154
3220 20:28:21.602637 Write Rank1 MR14 =0x4
3221 20:28:21.611342
3222 20:28:21.611425 CH=1, VrefRange= 0, VrefLevel = 4
3223 20:28:21.617805 TX Bit0 (979~999) 21 989, Bit8 (971~987) 17 979,
3224 20:28:21.621487 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3225 20:28:21.627902 TX Bit2 (975~992) 18 983, Bit10 (972~987) 16 979,
3226 20:28:21.631488 TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982,
3227 20:28:21.634613 TX Bit4 (976~994) 19 985, Bit12 (972~989) 18 980,
3228 20:28:21.641445 TX Bit5 (978~997) 20 987, Bit13 (973~988) 16 980,
3229 20:28:21.644498 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3230 20:28:21.648059 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3231 20:28:21.648142
3232 20:28:21.651576 Write Rank1 MR14 =0x6
3233 20:28:21.660507
3234 20:28:21.660603 CH=1, VrefRange= 0, VrefLevel = 6
3235 20:28:21.667036 TX Bit0 (979~999) 21 989, Bit8 (971~987) 17 979,
3236 20:28:21.670749 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3237 20:28:21.677236 TX Bit2 (975~992) 18 983, Bit10 (972~987) 16 979,
3238 20:28:21.680795 TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982,
3239 20:28:21.683779 TX Bit4 (976~994) 19 985, Bit12 (972~989) 18 980,
3240 20:28:21.690303 TX Bit5 (978~997) 20 987, Bit13 (973~988) 16 980,
3241 20:28:21.693941 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3242 20:28:21.696920 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3243 20:28:21.697004
3244 20:28:21.700297 Write Rank1 MR14 =0x8
3245 20:28:21.709275
3246 20:28:21.709424 CH=1, VrefRange= 0, VrefLevel = 8
3247 20:28:21.716241 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3248 20:28:21.719417 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3249 20:28:21.725898 TX Bit2 (975~993) 19 984, Bit10 (970~989) 20 979,
3250 20:28:21.729750 TX Bit3 (973~992) 20 982, Bit11 (972~991) 20 981,
3251 20:28:21.732782 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3252 20:28:21.739487 TX Bit5 (978~998) 21 988, Bit13 (972~989) 18 980,
3253 20:28:21.743163 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
3254 20:28:21.746156 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3255 20:28:21.746260
3256 20:28:21.749397 Write Rank1 MR14 =0xa
3257 20:28:21.758718
3258 20:28:21.761912 CH=1, VrefRange= 0, VrefLevel = 10
3259 20:28:21.765630 TX Bit0 (978~999) 22 988, Bit8 (970~990) 21 980,
3260 20:28:21.768338 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3261 20:28:21.775415 TX Bit2 (975~993) 19 984, Bit10 (970~990) 21 980,
3262 20:28:21.778359 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3263 20:28:21.781847 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3264 20:28:21.788587 TX Bit5 (977~998) 22 987, Bit13 (972~990) 19 981,
3265 20:28:21.792118 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
3266 20:28:21.794962 TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976,
3267 20:28:21.798497
3268 20:28:21.798579 Write Rank1 MR14 =0xc
3269 20:28:21.807757
3270 20:28:21.811096 CH=1, VrefRange= 0, VrefLevel = 12
3271 20:28:21.814667 TX Bit0 (978~1000) 23 989, Bit8 (970~990) 21 980,
3272 20:28:21.818245 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3273 20:28:21.824536 TX Bit2 (975~993) 19 984, Bit10 (969~990) 22 979,
3274 20:28:21.828261 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3275 20:28:21.831620 TX Bit4 (975~996) 22 985, Bit12 (971~991) 21 981,
3276 20:28:21.837855 TX Bit5 (977~998) 22 987, Bit13 (971~990) 20 980,
3277 20:28:21.841409 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3278 20:28:21.844734 TX Bit7 (977~995) 19 986, Bit15 (967~987) 21 977,
3279 20:28:21.844817
3280 20:28:21.848173 Write Rank1 MR14 =0xe
3281 20:28:21.857460
3282 20:28:21.860886 CH=1, VrefRange= 0, VrefLevel = 14
3283 20:28:21.863994 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3284 20:28:21.867574 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3285 20:28:21.873968 TX Bit2 (974~994) 21 984, Bit10 (970~991) 22 980,
3286 20:28:21.877077 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3287 20:28:21.880561 TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980,
3288 20:28:21.887334 TX Bit5 (977~999) 23 988, Bit13 (972~991) 20 981,
3289 20:28:21.890691 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3290 20:28:21.893802 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3291 20:28:21.897440
3292 20:28:21.897522 Write Rank1 MR14 =0x10
3293 20:28:21.906620
3294 20:28:21.910219 CH=1, VrefRange= 0, VrefLevel = 16
3295 20:28:21.913540 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3296 20:28:21.916714 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3297 20:28:21.923559 TX Bit2 (974~995) 22 984, Bit10 (969~991) 23 980,
3298 20:28:21.926489 TX Bit3 (971~994) 24 982, Bit11 (971~993) 23 982,
3299 20:28:21.929884 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3300 20:28:21.936739 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3301 20:28:21.940003 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3302 20:28:21.943698 TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977,
3303 20:28:21.947144
3304 20:28:21.947225 Write Rank1 MR14 =0x12
3305 20:28:21.956935
3306 20:28:21.960452 CH=1, VrefRange= 0, VrefLevel = 18
3307 20:28:21.963382 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3308 20:28:21.966624 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3309 20:28:21.973171 TX Bit2 (974~995) 22 984, Bit10 (969~991) 23 980,
3310 20:28:21.976849 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3311 20:28:21.979899 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3312 20:28:21.986464 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3313 20:28:21.990147 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3314 20:28:21.993418 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3315 20:28:21.996220
3316 20:28:21.996301 Write Rank1 MR14 =0x14
3317 20:28:22.006350
3318 20:28:22.009370 CH=1, VrefRange= 0, VrefLevel = 20
3319 20:28:22.013217 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3320 20:28:22.016327 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3321 20:28:22.023416 TX Bit2 (973~996) 24 984, Bit10 (969~991) 23 980,
3322 20:28:22.026304 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3323 20:28:22.029700 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3324 20:28:22.036675 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
3325 20:28:22.040013 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3326 20:28:22.042816 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3327 20:28:22.046250
3328 20:28:22.046331 Write Rank1 MR14 =0x16
3329 20:28:22.056514
3330 20:28:22.059857 CH=1, VrefRange= 0, VrefLevel = 22
3331 20:28:22.062937 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3332 20:28:22.066239 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3333 20:28:22.072840 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3334 20:28:22.076462 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3335 20:28:22.080000 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3336 20:28:22.086174 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3337 20:28:22.089769 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3338 20:28:22.096071 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3339 20:28:22.096154
3340 20:28:22.096219 Write Rank1 MR14 =0x18
3341 20:28:22.106299
3342 20:28:22.109898 CH=1, VrefRange= 0, VrefLevel = 24
3343 20:28:22.113915 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3344 20:28:22.116643 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3345 20:28:22.123484 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3346 20:28:22.126396 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3347 20:28:22.129882 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3348 20:28:22.136962 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3349 20:28:22.139583 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3350 20:28:22.146533 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3351 20:28:22.146616
3352 20:28:22.146681 Write Rank1 MR14 =0x1a
3353 20:28:22.156338
3354 20:28:22.159983 CH=1, VrefRange= 0, VrefLevel = 26
3355 20:28:22.163653 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3356 20:28:22.166473 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3357 20:28:22.173510 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3358 20:28:22.176460 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3359 20:28:22.179937 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3360 20:28:22.186428 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3361 20:28:22.190137 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3362 20:28:22.193229 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3363 20:28:22.196856
3364 20:28:22.196938 Write Rank1 MR14 =0x1c
3365 20:28:22.206949
3366 20:28:22.209670 CH=1, VrefRange= 0, VrefLevel = 28
3367 20:28:22.213383 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3368 20:28:22.216586 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3369 20:28:22.223024 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3370 20:28:22.226439 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3371 20:28:22.229784 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3372 20:28:22.236262 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3373 20:28:22.239773 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3374 20:28:22.246201 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3375 20:28:22.246285
3376 20:28:22.246349 Write Rank1 MR14 =0x1e
3377 20:28:22.256413
3378 20:28:22.259627 CH=1, VrefRange= 0, VrefLevel = 30
3379 20:28:22.263207 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3380 20:28:22.266185 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3381 20:28:22.273076 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3382 20:28:22.276354 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3383 20:28:22.279826 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3384 20:28:22.286315 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3385 20:28:22.289995 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3386 20:28:22.296695 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3387 20:28:22.296779
3388 20:28:22.296844 Write Rank1 MR14 =0x20
3389 20:28:22.306917
3390 20:28:22.307003 CH=1, VrefRange= 0, VrefLevel = 32
3391 20:28:22.313529 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3392 20:28:22.316727 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3393 20:28:22.323305 TX Bit2 (972~997) 26 984, Bit10 (969~991) 23 980,
3394 20:28:22.326749 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3395 20:28:22.329899 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3396 20:28:22.336452 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3397 20:28:22.340047 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3398 20:28:22.343438 TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977,
3399 20:28:22.346907
3400 20:28:22.346988
3401 20:28:22.349945 TX Vref found, early break! 363< 368
3402 20:28:22.353261 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3403 20:28:22.356860 u1DelayCellOfst[0]=7 cells (6 PI)
3404 20:28:22.360281 u1DelayCellOfst[1]=6 cells (5 PI)
3405 20:28:22.363647 u1DelayCellOfst[2]=1 cells (1 PI)
3406 20:28:22.366904 u1DelayCellOfst[3]=0 cells (0 PI)
3407 20:28:22.366987 u1DelayCellOfst[4]=3 cells (3 PI)
3408 20:28:22.370420 u1DelayCellOfst[5]=6 cells (5 PI)
3409 20:28:22.373530 u1DelayCellOfst[6]=6 cells (5 PI)
3410 20:28:22.376616 u1DelayCellOfst[7]=3 cells (3 PI)
3411 20:28:22.380204 Byte0, DQ PI dly=983, DQM PI dly= 986
3412 20:28:22.383378 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3413 20:28:22.386735
3414 20:28:22.390204 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3415 20:28:22.390313
3416 20:28:22.393721 u1DelayCellOfst[8]=3 cells (3 PI)
3417 20:28:22.397087 u1DelayCellOfst[9]=2 cells (2 PI)
3418 20:28:22.400062 u1DelayCellOfst[10]=3 cells (3 PI)
3419 20:28:22.403465 u1DelayCellOfst[11]=5 cells (4 PI)
3420 20:28:22.403547 u1DelayCellOfst[12]=5 cells (4 PI)
3421 20:28:22.406736 u1DelayCellOfst[13]=5 cells (4 PI)
3422 20:28:22.410209 u1DelayCellOfst[14]=3 cells (3 PI)
3423 20:28:22.413618 u1DelayCellOfst[15]=0 cells (0 PI)
3424 20:28:22.417099 Byte1, DQ PI dly=977, DQM PI dly= 979
3425 20:28:22.423759 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3426 20:28:22.423842
3427 20:28:22.426675 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3428 20:28:22.426757
3429 20:28:22.430100 Write Rank1 MR14 =0x16
3430 20:28:22.430182
3431 20:28:22.430246 Final TX Range 0 Vref 22
3432 20:28:22.430307
3433 20:28:22.436826 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3434 20:28:22.436908
3435 20:28:22.443313 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3436 20:28:22.450296 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3437 20:28:22.459921 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3438 20:28:22.460004 Write Rank1 MR3 =0xb0
3439 20:28:22.463569 DramC Write-DBI on
3440 20:28:22.463651 ==
3441 20:28:22.466390 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3442 20:28:22.469857 fsp= 1, odt_onoff= 1, Byte mode= 0
3443 20:28:22.469940 ==
3444 20:28:22.476632 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3445 20:28:22.476715
3446 20:28:22.476780 Begin, DQ Scan Range 699~763
3447 20:28:22.476841
3448 20:28:22.476899
3449 20:28:22.480018 TX Vref Scan disable
3450 20:28:22.483340 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3451 20:28:22.486722 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3452 20:28:22.489578 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3453 20:28:22.493096 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3454 20:28:22.496624 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3455 20:28:22.499826 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3456 20:28:22.503426 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3457 20:28:22.506777 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3458 20:28:22.510096 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3459 20:28:22.516888 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3460 20:28:22.519767 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3461 20:28:22.523287 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3462 20:28:22.526680 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3463 20:28:22.529809 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3464 20:28:22.533527 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3465 20:28:22.536851 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3466 20:28:22.539875 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3467 20:28:22.543759 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3468 20:28:22.546415 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3469 20:28:22.549789 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3470 20:28:22.557456 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3471 20:28:22.561017 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3472 20:28:22.564745 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3473 20:28:22.567501 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3474 20:28:22.570809 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3475 20:28:22.574376 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3476 20:28:22.577764 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3477 20:28:22.580714 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3478 20:28:22.584198 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3479 20:28:22.587478 Byte0, DQ PI dly=731, DQM PI dly= 731
3480 20:28:22.590935 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3481 20:28:22.591018
3482 20:28:22.597226 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3483 20:28:22.597348
3484 20:28:22.600765 Byte1, DQ PI dly=723, DQM PI dly= 723
3485 20:28:22.603829 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3486 20:28:22.603912
3487 20:28:22.607177 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3488 20:28:22.610612
3489 20:28:22.613836 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3490 20:28:22.623738 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3491 20:28:22.630583 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3492 20:28:22.630666 Write Rank1 MR3 =0x30
3493 20:28:22.633846 DramC Write-DBI off
3494 20:28:22.633927
3495 20:28:22.633992 [DATLAT]
3496 20:28:22.637243 Freq=1600, CH1 RK1, use_rxtx_scan=0
3497 20:28:22.637396
3498 20:28:22.640760 DATLAT Default: 0x10
3499 20:28:22.640842 7, 0xFFFF, sum=0
3500 20:28:22.644031 8, 0xFFFF, sum=0
3501 20:28:22.644115 9, 0xFFFF, sum=0
3502 20:28:22.647257 10, 0xFFFF, sum=0
3503 20:28:22.647341 11, 0xFFFF, sum=0
3504 20:28:22.650373 12, 0xFFFF, sum=0
3505 20:28:22.650457 13, 0xFFFF, sum=0
3506 20:28:22.654111 14, 0x0, sum=1
3507 20:28:22.654194 15, 0x0, sum=2
3508 20:28:22.654260 16, 0x0, sum=3
3509 20:28:22.657586 17, 0x0, sum=4
3510 20:28:22.660568 pattern=2 first_step=14 total pass=5 best_step=16
3511 20:28:22.660650 ==
3512 20:28:22.667396 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3513 20:28:22.670528 fsp= 1, odt_onoff= 1, Byte mode= 0
3514 20:28:22.670611 ==
3515 20:28:22.673959 Start DQ dly to find pass range UseTestEngine =1
3516 20:28:22.677118 x-axis: bit #, y-axis: DQ dly (-127~63)
3517 20:28:22.680307 RX Vref Scan = 0
3518 20:28:22.680392 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3519 20:28:22.683730 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3520 20:28:22.687096 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3521 20:28:22.690561 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3522 20:28:22.694165 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3523 20:28:22.697100 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3524 20:28:22.700712 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3525 20:28:22.703854 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3526 20:28:22.703938 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3527 20:28:22.706752 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3528 20:28:22.710512 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3529 20:28:22.713568 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3530 20:28:22.716874 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3531 20:28:22.720774 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3532 20:28:22.723409 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3533 20:28:22.727180 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3534 20:28:22.727264 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3535 20:28:22.730454 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3536 20:28:22.734074 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3537 20:28:22.736785 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3538 20:28:22.740343 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3539 20:28:22.743881 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3540 20:28:22.747152 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3541 20:28:22.747260 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3542 20:28:22.750458 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3543 20:28:22.753520 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3544 20:28:22.756947 0, [0] xxooxxxx xxxxxxxo [MSB]
3545 20:28:22.759951 1, [0] xxoooxxo xxxxxxxo [MSB]
3546 20:28:22.763636 2, [0] xxoooxxo oooxxxxo [MSB]
3547 20:28:22.767008 3, [0] xxoooxxo oooxxooo [MSB]
3548 20:28:22.767092 4, [0] xxoooxxo oooooooo [MSB]
3549 20:28:22.770533 5, [0] xoooooxo oooooooo [MSB]
3550 20:28:22.773506 6, [0] xoooooxo oooooooo [MSB]
3551 20:28:22.777592 34, [0] oooxoooo oooooooo [MSB]
3552 20:28:22.780452 35, [0] oooxoooo ooooooox [MSB]
3553 20:28:22.784444 36, [0] ooxxoooo ooooooox [MSB]
3554 20:28:22.787288 37, [0] ooxxxoox ooxooxxx [MSB]
3555 20:28:22.790716 38, [0] ooxxxoox xxxooxxx [MSB]
3556 20:28:22.794148 39, [0] ooxxxoox xxxxoxxx [MSB]
3557 20:28:22.794231 40, [0] ooxxxoox xxxxxxxx [MSB]
3558 20:28:22.797677 41, [0] oxxxxoox xxxxxxxx [MSB]
3559 20:28:22.801216 42, [0] oxxxxxox xxxxxxxx [MSB]
3560 20:28:22.804479 43, [0] xxxxxxxx xxxxxxxx [MSB]
3561 20:28:22.807468 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3562 20:28:22.811021 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3563 20:28:22.814412 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3564 20:28:22.817475 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3565 20:28:22.820911 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3566 20:28:22.824566 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3567 20:28:22.827977 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3568 20:28:22.830692 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3569 20:28:22.837835 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3570 20:28:22.841038 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3571 20:28:22.844128 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3572 20:28:22.847569 iDelay=43, Bit 11, Center 21 (4 ~ 38) 35
3573 20:28:22.851412 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3574 20:28:22.854187 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3575 20:28:22.857587 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3576 20:28:22.861008 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3577 20:28:22.861110 ==
3578 20:28:22.867633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3579 20:28:22.871302 fsp= 1, odt_onoff= 1, Byte mode= 0
3580 20:28:22.871414 ==
3581 20:28:22.871517 DQS Delay:
3582 20:28:22.874347 DQS0 = 0, DQS1 = 0
3583 20:28:22.874425 DQM Delay:
3584 20:28:22.874506 DQM0 = 20, DQM1 = 19
3585 20:28:22.877732 DQ Delay:
3586 20:28:22.880945 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3587 20:28:22.884672 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3588 20:28:22.887842 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =21
3589 20:28:22.890663 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3590 20:28:22.890739
3591 20:28:22.890819
3592 20:28:22.890898
3593 20:28:22.894622 [DramC_TX_OE_Calibration] TA2
3594 20:28:22.894697 Original DQ_B0 (3 6) =30, OEN = 27
3595 20:28:22.897904 Original DQ_B1 (3 6) =30, OEN = 27
3596 20:28:22.900765 23, 0x0, End_B0=23 End_B1=23
3597 20:28:22.904496 24, 0x0, End_B0=24 End_B1=24
3598 20:28:22.907994 25, 0x0, End_B0=25 End_B1=25
3599 20:28:22.908103 26, 0x0, End_B0=26 End_B1=26
3600 20:28:22.911034 27, 0x0, End_B0=27 End_B1=27
3601 20:28:22.914205 28, 0x0, End_B0=28 End_B1=28
3602 20:28:22.917816 29, 0x0, End_B0=29 End_B1=29
3603 20:28:22.920852 30, 0x0, End_B0=30 End_B1=30
3604 20:28:22.920928 31, 0xFFFF, End_B0=30 End_B1=30
3605 20:28:22.927970 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3606 20:28:22.934612 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3607 20:28:22.934701
3608 20:28:22.934786
3609 20:28:22.934867 Write Rank1 MR23 =0x3f
3610 20:28:22.937893 [DQSOSC]
3611 20:28:22.944343 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3612 20:28:22.951192 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3613 20:28:22.951278 Write Rank1 MR23 =0x3f
3614 20:28:22.954294 [DQSOSC]
3615 20:28:22.961176 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3616 20:28:22.964178 CH1 RK1: MR19=3, MR18=B1
3617 20:28:22.967854 [RxdqsGatingPostProcess] freq 1600
3618 20:28:22.971400 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3619 20:28:22.971482 Rank: 0
3620 20:28:22.974241 best DQS0 dly(2T, 0.5T) = (2, 5)
3621 20:28:22.978002 best DQS1 dly(2T, 0.5T) = (2, 5)
3622 20:28:22.981024 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3623 20:28:22.984334 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3624 20:28:22.984415 Rank: 1
3625 20:28:22.987710 best DQS0 dly(2T, 0.5T) = (2, 5)
3626 20:28:22.991241 best DQS1 dly(2T, 0.5T) = (2, 5)
3627 20:28:22.994621 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3628 20:28:22.997521 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3629 20:28:23.000807 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3630 20:28:23.004229 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3631 20:28:23.010882 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3632 20:28:23.010965
3633 20:28:23.011029
3634 20:28:23.014411 [Calibration Summary] Freqency 1600
3635 20:28:23.014493 CH 0, Rank 0
3636 20:28:23.017697 All Pass.
3637 20:28:23.017778
3638 20:28:23.017842 CH 0, Rank 1
3639 20:28:23.017901 All Pass.
3640 20:28:23.017959
3641 20:28:23.021148 CH 1, Rank 0
3642 20:28:23.021229 All Pass.
3643 20:28:23.021333
3644 20:28:23.021436 CH 1, Rank 1
3645 20:28:23.024023 All Pass.
3646 20:28:23.024104
3647 20:28:23.030927 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3648 20:28:23.037252 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3649 20:28:23.044415 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3650 20:28:23.047422 Write Rank0 MR3 =0xb0
3651 20:28:23.050919 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3652 20:28:23.061094 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3653 20:28:23.067852 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3654 20:28:23.067935 Write Rank1 MR3 =0xb0
3655 20:28:23.074119 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3656 20:28:23.080495 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3657 20:28:23.087682 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3658 20:28:23.090387 Write Rank0 MR3 =0xb0
3659 20:28:23.097633 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3660 20:28:23.104539 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3661 20:28:23.110755 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3662 20:28:23.114247 Write Rank1 MR3 =0xb0
3663 20:28:23.114328 DramC Write-DBI on
3664 20:28:23.117483 [GetDramInforAfterCalByMRR] Vendor 1.
3665 20:28:23.120728 [GetDramInforAfterCalByMRR] Revision 7.
3666 20:28:23.124258 MR8 12
3667 20:28:23.127625 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3668 20:28:23.127707 MR8 12
3669 20:28:23.134236 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3670 20:28:23.134318 MR8 12
3671 20:28:23.137146 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3672 20:28:23.140834 MR8 12
3673 20:28:23.144347 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3674 20:28:23.153985 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3675 20:28:23.154068 Write Rank0 MR13 =0xd0
3676 20:28:23.157104 Write Rank1 MR13 =0xd0
3677 20:28:23.160643 Write Rank0 MR13 =0xd0
3678 20:28:23.160724 Write Rank1 MR13 =0xd0
3679 20:28:23.163795 Save calibration result to emmc
3680 20:28:23.163876
3681 20:28:23.163939
3682 20:28:23.167297 [DramcModeReg_Check] Freq_1600, FSP_1
3683 20:28:23.171028 FSP_1, CH_0, RK0
3684 20:28:23.171110 Write Rank0 MR13 =0xd8
3685 20:28:23.174321 MR12 = 0x56 (global = 0x56) match
3686 20:28:23.177320 MR14 = 0x18 (global = 0x18) match
3687 20:28:23.180819 FSP_1, CH_0, RK1
3688 20:28:23.180904 Write Rank1 MR13 =0xd8
3689 20:28:23.184317 MR12 = 0x56 (global = 0x56) match
3690 20:28:23.187341 MR14 = 0x18 (global = 0x18) match
3691 20:28:23.190775 FSP_1, CH_1, RK0
3692 20:28:23.190856 Write Rank0 MR13 =0xd8
3693 20:28:23.194470 MR12 = 0x56 (global = 0x56) match
3694 20:28:23.197328 MR14 = 0x18 (global = 0x18) match
3695 20:28:23.200552 FSP_1, CH_1, RK1
3696 20:28:23.200633 Write Rank1 MR13 =0xd8
3697 20:28:23.203833 MR12 = 0x58 (global = 0x58) match
3698 20:28:23.207777 MR14 = 0x16 (global = 0x16) match
3699 20:28:23.207859
3700 20:28:23.210998 [MEM_TEST] 02: After DFS, before run time config
3701 20:28:23.223058 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3702 20:28:23.223141
3703 20:28:23.223205 [TA2_TEST]
3704 20:28:23.223265 === TA2 HW
3705 20:28:23.226721 TA2 PAT: XTALK
3706 20:28:23.229674 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3707 20:28:23.236329 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3708 20:28:23.239448 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3709 20:28:23.242739 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3710 20:28:23.246157
3711 20:28:23.246238
3712 20:28:23.246302 Settings after calibration
3713 20:28:23.246362
3714 20:28:23.249418 [DramcRunTimeConfig]
3715 20:28:23.253072 TransferPLLToSPMControl - MODE SW PHYPLL
3716 20:28:23.253155 TX_TRACKING: ON
3717 20:28:23.256332 RX_TRACKING: ON
3718 20:28:23.256413 HW_GATING: ON
3719 20:28:23.259405 HW_GATING DBG: OFF
3720 20:28:23.259486 ddr_geometry:1
3721 20:28:23.263220 ddr_geometry:1
3722 20:28:23.263301 ddr_geometry:1
3723 20:28:23.263366 ddr_geometry:1
3724 20:28:23.266574 ddr_geometry:1
3725 20:28:23.266655 ddr_geometry:1
3726 20:28:23.269452 ddr_geometry:1
3727 20:28:23.269534 ddr_geometry:1
3728 20:28:23.272887 High Freq DUMMY_READ_FOR_TRACKING: ON
3729 20:28:23.276446 ZQCS_ENABLE_LP4: OFF
3730 20:28:23.279360 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3731 20:28:23.283186 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3732 20:28:23.283268 SPM_CONTROL_AFTERK: ON
3733 20:28:23.286504 IMPEDANCE_TRACKING: ON
3734 20:28:23.286586 TEMP_SENSOR: ON
3735 20:28:23.289437 PER_BANK_REFRESH: ON
3736 20:28:23.289518 HW_SAVE_FOR_SR: ON
3737 20:28:23.292976 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3738 20:28:23.296391 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3739 20:28:23.299522 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3740 20:28:23.303184 Read ODT Tracking: ON
3741 20:28:23.306504 =========================
3742 20:28:23.306586
3743 20:28:23.306675 [TA2_TEST]
3744 20:28:23.306740 === TA2 HW
3745 20:28:23.312816 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3746 20:28:23.316600 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3747 20:28:23.322846 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3748 20:28:23.326747 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3749 20:28:23.326833
3750 20:28:23.329673 [MEM_TEST] 03: After run time config
3751 20:28:23.340689 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3752 20:28:23.344103 [complex_mem_test] start addr:0x40024000, len:131072
3753 20:28:23.548823 1st complex R/W mem test pass
3754 20:28:23.555203 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3755 20:28:23.558294 sync preloader write leveling
3756 20:28:23.561491 sync preloader cbt_mr12
3757 20:28:23.564976 sync preloader cbt_clk_dly
3758 20:28:23.565058 sync preloader cbt_cmd_dly
3759 20:28:23.568373 sync preloader cbt_cs
3760 20:28:23.571785 sync preloader cbt_ca_perbit_delay
3761 20:28:23.571867 sync preloader clk_delay
3762 20:28:23.574982 sync preloader dqs_delay
3763 20:28:23.578185 sync preloader u1Gating2T_Save
3764 20:28:23.581793 sync preloader u1Gating05T_Save
3765 20:28:23.585180 sync preloader u1Gatingfine_tune_Save
3766 20:28:23.588093 sync preloader u1Gatingucpass_count_Save
3767 20:28:23.591800 sync preloader u1TxWindowPerbitVref_Save
3768 20:28:23.594493 sync preloader u1TxCenter_min_Save
3769 20:28:23.598103 sync preloader u1TxCenter_max_Save
3770 20:28:23.601098 sync preloader u1Txwin_center_Save
3771 20:28:23.604667 sync preloader u1Txfirst_pass_Save
3772 20:28:23.607806 sync preloader u1Txlast_pass_Save
3773 20:28:23.611291 sync preloader u1RxDatlat_Save
3774 20:28:23.614583 sync preloader u1RxWinPerbitVref_Save
3775 20:28:23.618073 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3776 20:28:23.621403 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3777 20:28:23.624434 sync preloader delay_cell_unit
3778 20:28:23.631104 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3779 20:28:23.634361 sync preloader write leveling
3780 20:28:23.634472 sync preloader cbt_mr12
3781 20:28:23.637805 sync preloader cbt_clk_dly
3782 20:28:23.641168 sync preloader cbt_cmd_dly
3783 20:28:23.641250 sync preloader cbt_cs
3784 20:28:23.644764 sync preloader cbt_ca_perbit_delay
3785 20:28:23.647778 sync preloader clk_delay
3786 20:28:23.651334 sync preloader dqs_delay
3787 20:28:23.654661 sync preloader u1Gating2T_Save
3788 20:28:23.654743 sync preloader u1Gating05T_Save
3789 20:28:23.657547 sync preloader u1Gatingfine_tune_Save
3790 20:28:23.660891 sync preloader u1Gatingucpass_count_Save
3791 20:28:23.667910 sync preloader u1TxWindowPerbitVref_Save
3792 20:28:23.671078 sync preloader u1TxCenter_min_Save
3793 20:28:23.671166 sync preloader u1TxCenter_max_Save
3794 20:28:23.674597 sync preloader u1Txwin_center_Save
3795 20:28:23.677632 sync preloader u1Txfirst_pass_Save
3796 20:28:23.681074 sync preloader u1Txlast_pass_Save
3797 20:28:23.684832 sync preloader u1RxDatlat_Save
3798 20:28:23.687730 sync preloader u1RxWinPerbitVref_Save
3799 20:28:23.691415 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3800 20:28:23.697730 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3801 20:28:23.697813 sync preloader delay_cell_unit
3802 20:28:23.704136 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3803 20:28:23.707701 sync preloader write leveling
3804 20:28:23.711035 sync preloader cbt_mr12
3805 20:28:23.714208 sync preloader cbt_clk_dly
3806 20:28:23.714312 sync preloader cbt_cmd_dly
3807 20:28:23.717983 sync preloader cbt_cs
3808 20:28:23.720970 sync preloader cbt_ca_perbit_delay
3809 20:28:23.721051 sync preloader clk_delay
3810 20:28:23.724487 sync preloader dqs_delay
3811 20:28:23.727881 sync preloader u1Gating2T_Save
3812 20:28:23.730911 sync preloader u1Gating05T_Save
3813 20:28:23.734196 sync preloader u1Gatingfine_tune_Save
3814 20:28:23.737495 sync preloader u1Gatingucpass_count_Save
3815 20:28:23.740914 sync preloader u1TxWindowPerbitVref_Save
3816 20:28:23.744352 sync preloader u1TxCenter_min_Save
3817 20:28:23.748011 sync preloader u1TxCenter_max_Save
3818 20:28:23.751210 sync preloader u1Txwin_center_Save
3819 20:28:23.754093 sync preloader u1Txfirst_pass_Save
3820 20:28:23.757658 sync preloader u1Txlast_pass_Save
3821 20:28:23.757740 sync preloader u1RxDatlat_Save
3822 20:28:23.761182 sync preloader u1RxWinPerbitVref_Save
3823 20:28:23.767960 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3824 20:28:23.770794 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3825 20:28:23.774606 sync preloader delay_cell_unit
3826 20:28:23.777450 just_for_test_dump_coreboot_params dump all params
3827 20:28:23.780861 dump source = 0x0
3828 20:28:23.780943 dump params frequency:1600
3829 20:28:23.784444 dump params rank number:2
3830 20:28:23.784526
3831 20:28:23.787902 dump params write leveling
3832 20:28:23.791031 write leveling[0][0][0] = 0x21
3833 20:28:23.794311 write leveling[0][0][1] = 0x1d
3834 20:28:23.794393 write leveling[0][1][0] = 0x22
3835 20:28:23.797518 write leveling[0][1][1] = 0x1e
3836 20:28:23.800712 write leveling[1][0][0] = 0x24
3837 20:28:23.804184 write leveling[1][0][1] = 0x20
3838 20:28:23.807277 write leveling[1][1][0] = 0x23
3839 20:28:23.807360 write leveling[1][1][1] = 0x20
3840 20:28:23.810887 dump params cbt_cs
3841 20:28:23.814277 cbt_cs[0][0] = 0xa
3842 20:28:23.814359 cbt_cs[0][1] = 0xa
3843 20:28:23.817316 cbt_cs[1][0] = 0xa
3844 20:28:23.817424 cbt_cs[1][1] = 0xa
3845 20:28:23.820678 dump params cbt_mr12
3846 20:28:23.820760 cbt_mr12[0][0] = 0x16
3847 20:28:23.824329 cbt_mr12[0][1] = 0x16
3848 20:28:23.824411 cbt_mr12[1][0] = 0x16
3849 20:28:23.827794 cbt_mr12[1][1] = 0x18
3850 20:28:23.830475 dump params tx window
3851 20:28:23.830556 tx_center_min[0][0][0] = 980
3852 20:28:23.834132 tx_center_max[0][0][0] = 987
3853 20:28:23.837525 tx_center_min[0][0][1] = 975
3854 20:28:23.841059 tx_center_max[0][0][1] = 979
3855 20:28:23.843931 tx_center_min[0][1][0] = 982
3856 20:28:23.844013 tx_center_max[0][1][0] = 990
3857 20:28:23.847699 tx_center_min[0][1][1] = 978
3858 20:28:23.850561 tx_center_max[0][1][1] = 982
3859 20:28:23.854057 tx_center_min[1][0][0] = 983
3860 20:28:23.857446 tx_center_max[1][0][0] = 989
3861 20:28:23.857528 tx_center_min[1][0][1] = 978
3862 20:28:23.860824 tx_center_max[1][0][1] = 981
3863 20:28:23.863880 tx_center_min[1][1][0] = 983
3864 20:28:23.867517 tx_center_max[1][1][0] = 989
3865 20:28:23.867599 tx_center_min[1][1][1] = 977
3866 20:28:23.871100 tx_center_max[1][1][1] = 981
3867 20:28:23.874188 dump params tx window
3868 20:28:23.877752 tx_win_center[0][0][0] = 987
3869 20:28:23.877856 tx_first_pass[0][0][0] = 975
3870 20:28:23.880917 tx_last_pass[0][0][0] = 999
3871 20:28:23.883799 tx_win_center[0][0][1] = 986
3872 20:28:23.887171 tx_first_pass[0][0][1] = 974
3873 20:28:23.890593 tx_last_pass[0][0][1] = 998
3874 20:28:23.890681 tx_win_center[0][0][2] = 986
3875 20:28:23.894373 tx_first_pass[0][0][2] = 974
3876 20:28:23.897739 tx_last_pass[0][0][2] = 998
3877 20:28:23.900842 tx_win_center[0][0][3] = 980
3878 20:28:23.900923 tx_first_pass[0][0][3] = 968
3879 20:28:23.903854 tx_last_pass[0][0][3] = 992
3880 20:28:23.907410 tx_win_center[0][0][4] = 986
3881 20:28:23.910473 tx_first_pass[0][0][4] = 974
3882 20:28:23.914048 tx_last_pass[0][0][4] = 998
3883 20:28:23.914151 tx_win_center[0][0][5] = 981
3884 20:28:23.917178 tx_first_pass[0][0][5] = 969
3885 20:28:23.920827 tx_last_pass[0][0][5] = 993
3886 20:28:23.924171 tx_win_center[0][0][6] = 982
3887 20:28:23.924270 tx_first_pass[0][0][6] = 970
3888 20:28:23.927177 tx_last_pass[0][0][6] = 994
3889 20:28:23.930749 tx_win_center[0][0][7] = 983
3890 20:28:23.934355 tx_first_pass[0][0][7] = 972
3891 20:28:23.937633 tx_last_pass[0][0][7] = 995
3892 20:28:23.937737 tx_win_center[0][0][8] = 975
3893 20:28:23.940648 tx_first_pass[0][0][8] = 962
3894 20:28:23.944163 tx_last_pass[0][0][8] = 988
3895 20:28:23.947511 tx_win_center[0][0][9] = 976
3896 20:28:23.947585 tx_first_pass[0][0][9] = 964
3897 20:28:23.950518 tx_last_pass[0][0][9] = 989
3898 20:28:23.953910 tx_win_center[0][0][10] = 979
3899 20:28:23.957079 tx_first_pass[0][0][10] = 968
3900 20:28:23.960502 tx_last_pass[0][0][10] = 991
3901 20:28:23.960585 tx_win_center[0][0][11] = 975
3902 20:28:23.963748 tx_first_pass[0][0][11] = 962
3903 20:28:23.967076 tx_last_pass[0][0][11] = 988
3904 20:28:23.970362 tx_win_center[0][0][12] = 976
3905 20:28:23.973738 tx_first_pass[0][0][12] = 964
3906 20:28:23.973821 tx_last_pass[0][0][12] = 989
3907 20:28:23.977172 tx_win_center[0][0][13] = 975
3908 20:28:23.980760 tx_first_pass[0][0][13] = 963
3909 20:28:23.983874 tx_last_pass[0][0][13] = 988
3910 20:28:23.987839 tx_win_center[0][0][14] = 976
3911 20:28:23.987922 tx_first_pass[0][0][14] = 964
3912 20:28:23.990703 tx_last_pass[0][0][14] = 989
3913 20:28:23.993772 tx_win_center[0][0][15] = 979
3914 20:28:23.997292 tx_first_pass[0][0][15] = 967
3915 20:28:24.000694 tx_last_pass[0][0][15] = 991
3916 20:28:24.000776 tx_win_center[0][1][0] = 990
3917 20:28:24.004338 tx_first_pass[0][1][0] = 978
3918 20:28:24.007196 tx_last_pass[0][1][0] = 1002
3919 20:28:24.010834 tx_win_center[0][1][1] = 988
3920 20:28:24.014004 tx_first_pass[0][1][1] = 977
3921 20:28:24.014086 tx_last_pass[0][1][1] = 1000
3922 20:28:24.017532 tx_win_center[0][1][2] = 988
3923 20:28:24.020654 tx_first_pass[0][1][2] = 977
3924 20:28:24.024080 tx_last_pass[0][1][2] = 1000
3925 20:28:24.024162 tx_win_center[0][1][3] = 982
3926 20:28:24.027507 tx_first_pass[0][1][3] = 970
3927 20:28:24.031053 tx_last_pass[0][1][3] = 995
3928 20:28:24.033880 tx_win_center[0][1][4] = 988
3929 20:28:24.037327 tx_first_pass[0][1][4] = 976
3930 20:28:24.037430 tx_last_pass[0][1][4] = 1001
3931 20:28:24.040567 tx_win_center[0][1][5] = 984
3932 20:28:24.043991 tx_first_pass[0][1][5] = 972
3933 20:28:24.047633 tx_last_pass[0][1][5] = 996
3934 20:28:24.047715 tx_win_center[0][1][6] = 985
3935 20:28:24.050590 tx_first_pass[0][1][6] = 972
3936 20:28:24.053987 tx_last_pass[0][1][6] = 998
3937 20:28:24.057047 tx_win_center[0][1][7] = 987
3938 20:28:24.060540 tx_first_pass[0][1][7] = 975
3939 20:28:24.060648 tx_last_pass[0][1][7] = 999
3940 20:28:24.063608 tx_win_center[0][1][8] = 978
3941 20:28:24.067043 tx_first_pass[0][1][8] = 966
3942 20:28:24.070814 tx_last_pass[0][1][8] = 990
3943 20:28:24.070918 tx_win_center[0][1][9] = 979
3944 20:28:24.073890 tx_first_pass[0][1][9] = 968
3945 20:28:24.076898 tx_last_pass[0][1][9] = 991
3946 20:28:24.080698 tx_win_center[0][1][10] = 982
3947 20:28:24.084021 tx_first_pass[0][1][10] = 970
3948 20:28:24.084125 tx_last_pass[0][1][10] = 994
3949 20:28:24.087134 tx_win_center[0][1][11] = 978
3950 20:28:24.090371 tx_first_pass[0][1][11] = 967
3951 20:28:24.093552 tx_last_pass[0][1][11] = 990
3952 20:28:24.097191 tx_win_center[0][1][12] = 979
3953 20:28:24.100456 tx_first_pass[0][1][12] = 967
3954 20:28:24.100538 tx_last_pass[0][1][12] = 991
3955 20:28:24.103498 tx_win_center[0][1][13] = 978
3956 20:28:24.107159 tx_first_pass[0][1][13] = 966
3957 20:28:24.110411 tx_last_pass[0][1][13] = 990
3958 20:28:24.113590 tx_win_center[0][1][14] = 979
3959 20:28:24.113696 tx_first_pass[0][1][14] = 967
3960 20:28:24.117032 tx_last_pass[0][1][14] = 991
3961 20:28:24.120140 tx_win_center[0][1][15] = 980
3962 20:28:24.123731 tx_first_pass[0][1][15] = 968
3963 20:28:24.127077 tx_last_pass[0][1][15] = 992
3964 20:28:24.127159 tx_win_center[1][0][0] = 989
3965 20:28:24.129779 tx_first_pass[1][0][0] = 977
3966 20:28:24.133233 tx_last_pass[1][0][0] = 1002
3967 20:28:24.136986 tx_win_center[1][0][1] = 988
3968 20:28:24.140183 tx_first_pass[1][0][1] = 976
3969 20:28:24.140258 tx_last_pass[1][0][1] = 1000
3970 20:28:24.143404 tx_win_center[1][0][2] = 985
3971 20:28:24.146634 tx_first_pass[1][0][2] = 973
3972 20:28:24.149956 tx_last_pass[1][0][2] = 997
3973 20:28:24.150057 tx_win_center[1][0][3] = 983
3974 20:28:24.153523 tx_first_pass[1][0][3] = 971
3975 20:28:24.156508 tx_last_pass[1][0][3] = 995
3976 20:28:24.159534 tx_win_center[1][0][4] = 987
3977 20:28:24.162959 tx_first_pass[1][0][4] = 975
3978 20:28:24.163034 tx_last_pass[1][0][4] = 999
3979 20:28:24.166441 tx_win_center[1][0][5] = 988
3980 20:28:24.169749 tx_first_pass[1][0][5] = 976
3981 20:28:24.173303 tx_last_pass[1][0][5] = 1001
3982 20:28:24.173410 tx_win_center[1][0][6] = 989
3983 20:28:24.176197 tx_first_pass[1][0][6] = 977
3984 20:28:24.179477 tx_last_pass[1][0][6] = 1002
3985 20:28:24.183179 tx_win_center[1][0][7] = 986
3986 20:28:24.186335 tx_first_pass[1][0][7] = 975
3987 20:28:24.186415 tx_last_pass[1][0][7] = 998
3988 20:28:24.190003 tx_win_center[1][0][8] = 980
3989 20:28:24.192850 tx_first_pass[1][0][8] = 968
3990 20:28:24.196481 tx_last_pass[1][0][8] = 992
3991 20:28:24.199523 tx_win_center[1][0][9] = 980
3992 20:28:24.199594 tx_first_pass[1][0][9] = 968
3993 20:28:24.202966 tx_last_pass[1][0][9] = 992
3994 20:28:24.206295 tx_win_center[1][0][10] = 980
3995 20:28:24.209598 tx_first_pass[1][0][10] = 969
3996 20:28:24.209670 tx_last_pass[1][0][10] = 992
3997 20:28:24.213104 tx_win_center[1][0][11] = 981
3998 20:28:24.216311 tx_first_pass[1][0][11] = 969
3999 20:28:24.219365 tx_last_pass[1][0][11] = 993
4000 20:28:24.223092 tx_win_center[1][0][12] = 981
4001 20:28:24.226021 tx_first_pass[1][0][12] = 969
4002 20:28:24.226095 tx_last_pass[1][0][12] = 993
4003 20:28:24.229494 tx_win_center[1][0][13] = 981
4004 20:28:24.233427 tx_first_pass[1][0][13] = 970
4005 20:28:24.236157 tx_last_pass[1][0][13] = 992
4006 20:28:24.239989 tx_win_center[1][0][14] = 980
4007 20:28:24.240065 tx_first_pass[1][0][14] = 969
4008 20:28:24.242670 tx_last_pass[1][0][14] = 992
4009 20:28:24.246437 tx_win_center[1][0][15] = 978
4010 20:28:24.249275 tx_first_pass[1][0][15] = 966
4011 20:28:24.249390 tx_last_pass[1][0][15] = 990
4012 20:28:24.252819 tx_win_center[1][1][0] = 989
4013 20:28:24.256314 tx_first_pass[1][1][0] = 977
4014 20:28:24.259921 tx_last_pass[1][1][0] = 1002
4015 20:28:24.263055 tx_win_center[1][1][1] = 988
4016 20:28:24.263135 tx_first_pass[1][1][1] = 976
4017 20:28:24.265915 tx_last_pass[1][1][1] = 1000
4018 20:28:24.269278 tx_win_center[1][1][2] = 984
4019 20:28:24.272973 tx_first_pass[1][1][2] = 972
4020 20:28:24.276381 tx_last_pass[1][1][2] = 997
4021 20:28:24.276481 tx_win_center[1][1][3] = 983
4022 20:28:24.279780 tx_first_pass[1][1][3] = 971
4023 20:28:24.283188 tx_last_pass[1][1][3] = 995
4024 20:28:24.286644 tx_win_center[1][1][4] = 986
4025 20:28:24.286726 tx_first_pass[1][1][4] = 974
4026 20:28:24.289417 tx_last_pass[1][1][4] = 998
4027 20:28:24.292835 tx_win_center[1][1][5] = 988
4028 20:28:24.295994 tx_first_pass[1][1][5] = 976
4029 20:28:24.299577 tx_last_pass[1][1][5] = 1000
4030 20:28:24.299658 tx_win_center[1][1][6] = 988
4031 20:28:24.302901 tx_first_pass[1][1][6] = 976
4032 20:28:24.305986 tx_last_pass[1][1][6] = 1001
4033 20:28:24.309232 tx_win_center[1][1][7] = 986
4034 20:28:24.309340 tx_first_pass[1][1][7] = 975
4035 20:28:24.312683 tx_last_pass[1][1][7] = 997
4036 20:28:24.316217 tx_win_center[1][1][8] = 980
4037 20:28:24.319396 tx_first_pass[1][1][8] = 969
4038 20:28:24.322710 tx_last_pass[1][1][8] = 991
4039 20:28:24.322792 tx_win_center[1][1][9] = 979
4040 20:28:24.325850 tx_first_pass[1][1][9] = 968
4041 20:28:24.329484 tx_last_pass[1][1][9] = 991
4042 20:28:24.332905 tx_win_center[1][1][10] = 980
4043 20:28:24.336190 tx_first_pass[1][1][10] = 969
4044 20:28:24.336291 tx_last_pass[1][1][10] = 991
4045 20:28:24.339580 tx_win_center[1][1][11] = 981
4046 20:28:24.342830 tx_first_pass[1][1][11] = 970
4047 20:28:24.346507 tx_last_pass[1][1][11] = 992
4048 20:28:24.349515 tx_win_center[1][1][12] = 981
4049 20:28:24.349607 tx_first_pass[1][1][12] = 970
4050 20:28:24.352479 tx_last_pass[1][1][12] = 992
4051 20:28:24.355820 tx_win_center[1][1][13] = 981
4052 20:28:24.359509 tx_first_pass[1][1][13] = 970
4053 20:28:24.362799 tx_last_pass[1][1][13] = 992
4054 20:28:24.362873 tx_win_center[1][1][14] = 980
4055 20:28:24.366525 tx_first_pass[1][1][14] = 969
4056 20:28:24.369402 tx_last_pass[1][1][14] = 992
4057 20:28:24.372879 tx_win_center[1][1][15] = 977
4058 20:28:24.376501 tx_first_pass[1][1][15] = 966
4059 20:28:24.376579 tx_last_pass[1][1][15] = 989
4060 20:28:24.379303 dump params rx window
4061 20:28:24.382611 rx_firspass[0][0][0] = 9
4062 20:28:24.382690 rx_lastpass[0][0][0] = 42
4063 20:28:24.385910 rx_firspass[0][0][1] = 8
4064 20:28:24.389630 rx_lastpass[0][0][1] = 40
4065 20:28:24.389701 rx_firspass[0][0][2] = 9
4066 20:28:24.393037 rx_lastpass[0][0][2] = 39
4067 20:28:24.396504 rx_firspass[0][0][3] = -1
4068 20:28:24.399494 rx_lastpass[0][0][3] = 31
4069 20:28:24.399571 rx_firspass[0][0][4] = 7
4070 20:28:24.402817 rx_lastpass[0][0][4] = 39
4071 20:28:24.406001 rx_firspass[0][0][5] = 3
4072 20:28:24.406083 rx_lastpass[0][0][5] = 29
4073 20:28:24.409224 rx_firspass[0][0][6] = 2
4074 20:28:24.412428 rx_lastpass[0][0][6] = 32
4075 20:28:24.412509 rx_firspass[0][0][7] = 4
4076 20:28:24.416147 rx_lastpass[0][0][7] = 34
4077 20:28:24.419285 rx_firspass[0][0][8] = 2
4078 20:28:24.422731 rx_lastpass[0][0][8] = 34
4079 20:28:24.422811 rx_firspass[0][0][9] = 5
4080 20:28:24.425886 rx_lastpass[0][0][9] = 35
4081 20:28:24.429166 rx_firspass[0][0][10] = 9
4082 20:28:24.429286 rx_lastpass[0][0][10] = 38
4083 20:28:24.432885 rx_firspass[0][0][11] = 2
4084 20:28:24.436008 rx_lastpass[0][0][11] = 31
4085 20:28:24.439503 rx_firspass[0][0][12] = 5
4086 20:28:24.439586 rx_lastpass[0][0][12] = 34
4087 20:28:24.442726 rx_firspass[0][0][13] = 1
4088 20:28:24.445935 rx_lastpass[0][0][13] = 31
4089 20:28:24.446011 rx_firspass[0][0][14] = 3
4090 20:28:24.449613 rx_lastpass[0][0][14] = 33
4091 20:28:24.452836 rx_firspass[0][0][15] = 4
4092 20:28:24.456250 rx_lastpass[0][0][15] = 35
4093 20:28:24.456352 rx_firspass[0][1][0] = 8
4094 20:28:24.459273 rx_lastpass[0][1][0] = 42
4095 20:28:24.462787 rx_firspass[0][1][1] = 7
4096 20:28:24.462889 rx_lastpass[0][1][1] = 42
4097 20:28:24.466348 rx_firspass[0][1][2] = 7
4098 20:28:24.469751 rx_lastpass[0][1][2] = 42
4099 20:28:24.469823 rx_firspass[0][1][3] = -2
4100 20:28:24.472834 rx_lastpass[0][1][3] = 33
4101 20:28:24.476546 rx_firspass[0][1][4] = 5
4102 20:28:24.479644 rx_lastpass[0][1][4] = 40
4103 20:28:24.479717 rx_firspass[0][1][5] = 1
4104 20:28:24.482508 rx_lastpass[0][1][5] = 34
4105 20:28:24.486373 rx_firspass[0][1][6] = 2
4106 20:28:24.486446 rx_lastpass[0][1][6] = 35
4107 20:28:24.489684 rx_firspass[0][1][7] = 2
4108 20:28:24.492844 rx_lastpass[0][1][7] = 36
4109 20:28:24.492917 rx_firspass[0][1][8] = 0
4110 20:28:24.496158 rx_lastpass[0][1][8] = 36
4111 20:28:24.499644 rx_firspass[0][1][9] = 1
4112 20:28:24.502938 rx_lastpass[0][1][9] = 38
4113 20:28:24.503010 rx_firspass[0][1][10] = 6
4114 20:28:24.506130 rx_lastpass[0][1][10] = 41
4115 20:28:24.509657 rx_firspass[0][1][11] = 1
4116 20:28:24.509740 rx_lastpass[0][1][11] = 33
4117 20:28:24.512714 rx_firspass[0][1][12] = 1
4118 20:28:24.515729 rx_lastpass[0][1][12] = 36
4119 20:28:24.519388 rx_firspass[0][1][13] = -1
4120 20:28:24.519469 rx_lastpass[0][1][13] = 34
4121 20:28:24.522583 rx_firspass[0][1][14] = 1
4122 20:28:24.525977 rx_lastpass[0][1][14] = 36
4123 20:28:24.529153 rx_firspass[0][1][15] = 4
4124 20:28:24.529253 rx_lastpass[0][1][15] = 38
4125 20:28:24.532800 rx_firspass[1][0][0] = 8
4126 20:28:24.536036 rx_lastpass[1][0][0] = 40
4127 20:28:24.536115 rx_firspass[1][0][1] = 7
4128 20:28:24.539354 rx_lastpass[1][0][1] = 38
4129 20:28:24.542449 rx_firspass[1][0][2] = 0
4130 20:28:24.546096 rx_lastpass[1][0][2] = 32
4131 20:28:24.546178 rx_firspass[1][0][3] = 0
4132 20:28:24.548927 rx_lastpass[1][0][3] = 31
4133 20:28:24.552567 rx_firspass[1][0][4] = 3
4134 20:28:24.552648 rx_lastpass[1][0][4] = 33
4135 20:28:24.555940 rx_firspass[1][0][5] = 9
4136 20:28:24.559280 rx_lastpass[1][0][5] = 38
4137 20:28:24.559380 rx_firspass[1][0][6] = 10
4138 20:28:24.562356 rx_lastpass[1][0][6] = 40
4139 20:28:24.565576 rx_firspass[1][0][7] = 5
4140 20:28:24.569166 rx_lastpass[1][0][7] = 33
4141 20:28:24.569248 rx_firspass[1][0][8] = 3
4142 20:28:24.572337 rx_lastpass[1][0][8] = 35
4143 20:28:24.575931 rx_firspass[1][0][9] = 4
4144 20:28:24.576013 rx_lastpass[1][0][9] = 35
4145 20:28:24.578866 rx_firspass[1][0][10] = 3
4146 20:28:24.582330 rx_lastpass[1][0][10] = 34
4147 20:28:24.585704 rx_firspass[1][0][11] = 4
4148 20:28:24.585781 rx_lastpass[1][0][11] = 34
4149 20:28:24.589321 rx_firspass[1][0][12] = 5
4150 20:28:24.592683 rx_lastpass[1][0][12] = 35
4151 20:28:24.592759 rx_firspass[1][0][13] = 5
4152 20:28:24.595688 rx_lastpass[1][0][13] = 32
4153 20:28:24.599547 rx_firspass[1][0][14] = 3
4154 20:28:24.602385 rx_lastpass[1][0][14] = 34
4155 20:28:24.602461 rx_firspass[1][0][15] = 1
4156 20:28:24.605924 rx_lastpass[1][0][15] = 32
4157 20:28:24.609009 rx_firspass[1][1][0] = 7
4158 20:28:24.609110 rx_lastpass[1][1][0] = 42
4159 20:28:24.612448 rx_firspass[1][1][1] = 5
4160 20:28:24.615894 rx_lastpass[1][1][1] = 40
4161 20:28:24.615991 rx_firspass[1][1][2] = 0
4162 20:28:24.619175 rx_lastpass[1][1][2] = 35
4163 20:28:24.622139 rx_firspass[1][1][3] = -2
4164 20:28:24.625747 rx_lastpass[1][1][3] = 33
4165 20:28:24.625828 rx_firspass[1][1][4] = 1
4166 20:28:24.628628 rx_lastpass[1][1][4] = 36
4167 20:28:24.632436 rx_firspass[1][1][5] = 5
4168 20:28:24.632517 rx_lastpass[1][1][5] = 41
4169 20:28:24.635513 rx_firspass[1][1][6] = 7
4170 20:28:24.638774 rx_lastpass[1][1][6] = 42
4171 20:28:24.642073 rx_firspass[1][1][7] = 1
4172 20:28:24.642154 rx_lastpass[1][1][7] = 36
4173 20:28:24.645566 rx_firspass[1][1][8] = 2
4174 20:28:24.649099 rx_lastpass[1][1][8] = 37
4175 20:28:24.649189 rx_firspass[1][1][9] = 2
4176 20:28:24.652031 rx_lastpass[1][1][9] = 37
4177 20:28:24.655670 rx_firspass[1][1][10] = 2
4178 20:28:24.658786 rx_lastpass[1][1][10] = 36
4179 20:28:24.658867 rx_firspass[1][1][11] = 4
4180 20:28:24.661990 rx_lastpass[1][1][11] = 38
4181 20:28:24.665286 rx_firspass[1][1][12] = 4
4182 20:28:24.665367 rx_lastpass[1][1][12] = 39
4183 20:28:24.668932 rx_firspass[1][1][13] = 3
4184 20:28:24.671985 rx_lastpass[1][1][13] = 36
4185 20:28:24.675613 rx_firspass[1][1][14] = 3
4186 20:28:24.675695 rx_lastpass[1][1][14] = 36
4187 20:28:24.679056 rx_firspass[1][1][15] = 0
4188 20:28:24.681861 rx_lastpass[1][1][15] = 34
4189 20:28:24.681943 dump params clk_delay
4190 20:28:24.685347 clk_delay[0] = -1
4191 20:28:24.685451 clk_delay[1] = 0
4192 20:28:24.688897 dump params dqs_delay
4193 20:28:24.692541 dqs_delay[0][0] = -1
4194 20:28:24.692624 dqs_delay[0][1] = 0
4195 20:28:24.695376 dqs_delay[1][0] = -1
4196 20:28:24.695458 dqs_delay[1][1] = 0
4197 20:28:24.699303 dump params delay_cell_unit = 762
4198 20:28:24.702499 dump source = 0x0
4199 20:28:24.702581 dump params frequency:1200
4200 20:28:24.705505 dump params rank number:2
4201 20:28:24.705598
4202 20:28:24.708976 dump params write leveling
4203 20:28:24.712487 write leveling[0][0][0] = 0x0
4204 20:28:24.712569 write leveling[0][0][1] = 0x0
4205 20:28:24.715555 write leveling[0][1][0] = 0x0
4206 20:28:24.718965 write leveling[0][1][1] = 0x0
4207 20:28:24.722417 write leveling[1][0][0] = 0x0
4208 20:28:24.725509 write leveling[1][0][1] = 0x0
4209 20:28:24.725591 write leveling[1][1][0] = 0x0
4210 20:28:24.729109 write leveling[1][1][1] = 0x0
4211 20:28:24.732293 dump params cbt_cs
4212 20:28:24.732375 cbt_cs[0][0] = 0x0
4213 20:28:24.735508 cbt_cs[0][1] = 0x0
4214 20:28:24.735590 cbt_cs[1][0] = 0x0
4215 20:28:24.739111 cbt_cs[1][1] = 0x0
4216 20:28:24.739193 dump params cbt_mr12
4217 20:28:24.742549 cbt_mr12[0][0] = 0x0
4218 20:28:24.742631 cbt_mr12[0][1] = 0x0
4219 20:28:24.745802 cbt_mr12[1][0] = 0x0
4220 20:28:24.749073 cbt_mr12[1][1] = 0x0
4221 20:28:24.749154 dump params tx window
4222 20:28:24.752511 tx_center_min[0][0][0] = 0
4223 20:28:24.755681 tx_center_max[0][0][0] = 0
4224 20:28:24.755764 tx_center_min[0][0][1] = 0
4225 20:28:24.758724 tx_center_max[0][0][1] = 0
4226 20:28:24.762312 tx_center_min[0][1][0] = 0
4227 20:28:24.765764 tx_center_max[0][1][0] = 0
4228 20:28:24.765855 tx_center_min[0][1][1] = 0
4229 20:28:24.768645 tx_center_max[0][1][1] = 0
4230 20:28:24.772547 tx_center_min[1][0][0] = 0
4231 20:28:24.775892 tx_center_max[1][0][0] = 0
4232 20:28:24.775974 tx_center_min[1][0][1] = 0
4233 20:28:24.778803 tx_center_max[1][0][1] = 0
4234 20:28:24.781978 tx_center_min[1][1][0] = 0
4235 20:28:24.782060 tx_center_max[1][1][0] = 0
4236 20:28:24.785633 tx_center_min[1][1][1] = 0
4237 20:28:24.788668 tx_center_max[1][1][1] = 0
4238 20:28:24.792287 dump params tx window
4239 20:28:24.792369 tx_win_center[0][0][0] = 0
4240 20:28:24.795630 tx_first_pass[0][0][0] = 0
4241 20:28:24.798943 tx_last_pass[0][0][0] = 0
4242 20:28:24.799025 tx_win_center[0][0][1] = 0
4243 20:28:24.802050 tx_first_pass[0][0][1] = 0
4244 20:28:24.805508 tx_last_pass[0][0][1] = 0
4245 20:28:24.808674 tx_win_center[0][0][2] = 0
4246 20:28:24.808756 tx_first_pass[0][0][2] = 0
4247 20:28:24.812530 tx_last_pass[0][0][2] = 0
4248 20:28:24.815888 tx_win_center[0][0][3] = 0
4249 20:28:24.818997 tx_first_pass[0][0][3] = 0
4250 20:28:24.819079 tx_last_pass[0][0][3] = 0
4251 20:28:24.822045 tx_win_center[0][0][4] = 0
4252 20:28:24.825557 tx_first_pass[0][0][4] = 0
4253 20:28:24.825660 tx_last_pass[0][0][4] = 0
4254 20:28:24.829011 tx_win_center[0][0][5] = 0
4255 20:28:24.832236 tx_first_pass[0][0][5] = 0
4256 20:28:24.835645 tx_last_pass[0][0][5] = 0
4257 20:28:24.835727 tx_win_center[0][0][6] = 0
4258 20:28:24.839286 tx_first_pass[0][0][6] = 0
4259 20:28:24.842075 tx_last_pass[0][0][6] = 0
4260 20:28:24.842157 tx_win_center[0][0][7] = 0
4261 20:28:24.845746 tx_first_pass[0][0][7] = 0
4262 20:28:24.848874 tx_last_pass[0][0][7] = 0
4263 20:28:24.852251 tx_win_center[0][0][8] = 0
4264 20:28:24.852334 tx_first_pass[0][0][8] = 0
4265 20:28:24.855746 tx_last_pass[0][0][8] = 0
4266 20:28:24.858832 tx_win_center[0][0][9] = 0
4267 20:28:24.862123 tx_first_pass[0][0][9] = 0
4268 20:28:24.862208 tx_last_pass[0][0][9] = 0
4269 20:28:24.865724 tx_win_center[0][0][10] = 0
4270 20:28:24.869432 tx_first_pass[0][0][10] = 0
4271 20:28:24.872224 tx_last_pass[0][0][10] = 0
4272 20:28:24.872302 tx_win_center[0][0][11] = 0
4273 20:28:24.875512 tx_first_pass[0][0][11] = 0
4274 20:28:24.878805 tx_last_pass[0][0][11] = 0
4275 20:28:24.882650 tx_win_center[0][0][12] = 0
4276 20:28:24.882728 tx_first_pass[0][0][12] = 0
4277 20:28:24.885760 tx_last_pass[0][0][12] = 0
4278 20:28:24.889170 tx_win_center[0][0][13] = 0
4279 20:28:24.892244 tx_first_pass[0][0][13] = 0
4280 20:28:24.892322 tx_last_pass[0][0][13] = 0
4281 20:28:24.895724 tx_win_center[0][0][14] = 0
4282 20:28:24.899027 tx_first_pass[0][0][14] = 0
4283 20:28:24.902364 tx_last_pass[0][0][14] = 0
4284 20:28:24.902435 tx_win_center[0][0][15] = 0
4285 20:28:24.905415 tx_first_pass[0][0][15] = 0
4286 20:28:24.908825 tx_last_pass[0][0][15] = 0
4287 20:28:24.908902 tx_win_center[0][1][0] = 0
4288 20:28:24.912345 tx_first_pass[0][1][0] = 0
4289 20:28:24.915391 tx_last_pass[0][1][0] = 0
4290 20:28:24.919136 tx_win_center[0][1][1] = 0
4291 20:28:24.919211 tx_first_pass[0][1][1] = 0
4292 20:28:24.922162 tx_last_pass[0][1][1] = 0
4293 20:28:24.925412 tx_win_center[0][1][2] = 0
4294 20:28:24.928858 tx_first_pass[0][1][2] = 0
4295 20:28:24.928963 tx_last_pass[0][1][2] = 0
4296 20:28:24.932541 tx_win_center[0][1][3] = 0
4297 20:28:24.935542 tx_first_pass[0][1][3] = 0
4298 20:28:24.935616 tx_last_pass[0][1][3] = 0
4299 20:28:24.939032 tx_win_center[0][1][4] = 0
4300 20:28:24.942596 tx_first_pass[0][1][4] = 0
4301 20:28:24.945533 tx_last_pass[0][1][4] = 0
4302 20:28:24.945606 tx_win_center[0][1][5] = 0
4303 20:28:24.949175 tx_first_pass[0][1][5] = 0
4304 20:28:24.952694 tx_last_pass[0][1][5] = 0
4305 20:28:24.952771 tx_win_center[0][1][6] = 0
4306 20:28:24.955741 tx_first_pass[0][1][6] = 0
4307 20:28:24.959007 tx_last_pass[0][1][6] = 0
4308 20:28:24.962515 tx_win_center[0][1][7] = 0
4309 20:28:24.962587 tx_first_pass[0][1][7] = 0
4310 20:28:24.965737 tx_last_pass[0][1][7] = 0
4311 20:28:24.968832 tx_win_center[0][1][8] = 0
4312 20:28:24.972304 tx_first_pass[0][1][8] = 0
4313 20:28:24.972379 tx_last_pass[0][1][8] = 0
4314 20:28:24.975707 tx_win_center[0][1][9] = 0
4315 20:28:24.979047 tx_first_pass[0][1][9] = 0
4316 20:28:24.979120 tx_last_pass[0][1][9] = 0
4317 20:28:24.982590 tx_win_center[0][1][10] = 0
4318 20:28:24.985580 tx_first_pass[0][1][10] = 0
4319 20:28:24.988940 tx_last_pass[0][1][10] = 0
4320 20:28:24.989012 tx_win_center[0][1][11] = 0
4321 20:28:24.992340 tx_first_pass[0][1][11] = 0
4322 20:28:24.995490 tx_last_pass[0][1][11] = 0
4323 20:28:24.998980 tx_win_center[0][1][12] = 0
4324 20:28:25.002549 tx_first_pass[0][1][12] = 0
4325 20:28:25.002621 tx_last_pass[0][1][12] = 0
4326 20:28:25.005401 tx_win_center[0][1][13] = 0
4327 20:28:25.008959 tx_first_pass[0][1][13] = 0
4328 20:28:25.009037 tx_last_pass[0][1][13] = 0
4329 20:28:25.012572 tx_win_center[0][1][14] = 0
4330 20:28:25.015449 tx_first_pass[0][1][14] = 0
4331 20:28:25.018696 tx_last_pass[0][1][14] = 0
4332 20:28:25.018773 tx_win_center[0][1][15] = 0
4333 20:28:25.022190 tx_first_pass[0][1][15] = 0
4334 20:28:25.025541 tx_last_pass[0][1][15] = 0
4335 20:28:25.028593 tx_win_center[1][0][0] = 0
4336 20:28:25.028662 tx_first_pass[1][0][0] = 0
4337 20:28:25.032281 tx_last_pass[1][0][0] = 0
4338 20:28:25.035274 tx_win_center[1][0][1] = 0
4339 20:28:25.038638 tx_first_pass[1][0][1] = 0
4340 20:28:25.038713 tx_last_pass[1][0][1] = 0
4341 20:28:25.042076 tx_win_center[1][0][2] = 0
4342 20:28:25.045149 tx_first_pass[1][0][2] = 0
4343 20:28:25.048470 tx_last_pass[1][0][2] = 0
4344 20:28:25.048542 tx_win_center[1][0][3] = 0
4345 20:28:25.051858 tx_first_pass[1][0][3] = 0
4346 20:28:25.055214 tx_last_pass[1][0][3] = 0
4347 20:28:25.055295 tx_win_center[1][0][4] = 0
4348 20:28:25.058844 tx_first_pass[1][0][4] = 0
4349 20:28:25.062387 tx_last_pass[1][0][4] = 0
4350 20:28:25.065322 tx_win_center[1][0][5] = 0
4351 20:28:25.065396 tx_first_pass[1][0][5] = 0
4352 20:28:25.068263 tx_last_pass[1][0][5] = 0
4353 20:28:25.071862 tx_win_center[1][0][6] = 0
4354 20:28:25.075483 tx_first_pass[1][0][6] = 0
4355 20:28:25.075560 tx_last_pass[1][0][6] = 0
4356 20:28:25.078717 tx_win_center[1][0][7] = 0
4357 20:28:25.081707 tx_first_pass[1][0][7] = 0
4358 20:28:25.081780 tx_last_pass[1][0][7] = 0
4359 20:28:25.085081 tx_win_center[1][0][8] = 0
4360 20:28:25.088366 tx_first_pass[1][0][8] = 0
4361 20:28:25.092269 tx_last_pass[1][0][8] = 0
4362 20:28:25.092344 tx_win_center[1][0][9] = 0
4363 20:28:25.095048 tx_first_pass[1][0][9] = 0
4364 20:28:25.098592 tx_last_pass[1][0][9] = 0
4365 20:28:25.102310 tx_win_center[1][0][10] = 0
4366 20:28:25.102410 tx_first_pass[1][0][10] = 0
4367 20:28:25.105036 tx_last_pass[1][0][10] = 0
4368 20:28:25.108547 tx_win_center[1][0][11] = 0
4369 20:28:25.112076 tx_first_pass[1][0][11] = 0
4370 20:28:25.112152 tx_last_pass[1][0][11] = 0
4371 20:28:25.115899 tx_win_center[1][0][12] = 0
4372 20:28:25.118591 tx_first_pass[1][0][12] = 0
4373 20:28:25.122099 tx_last_pass[1][0][12] = 0
4374 20:28:25.122174 tx_win_center[1][0][13] = 0
4375 20:28:25.125073 tx_first_pass[1][0][13] = 0
4376 20:28:25.128502 tx_last_pass[1][0][13] = 0
4377 20:28:25.131800 tx_win_center[1][0][14] = 0
4378 20:28:25.131871 tx_first_pass[1][0][14] = 0
4379 20:28:25.135381 tx_last_pass[1][0][14] = 0
4380 20:28:25.138479 tx_win_center[1][0][15] = 0
4381 20:28:25.141960 tx_first_pass[1][0][15] = 0
4382 20:28:25.142038 tx_last_pass[1][0][15] = 0
4383 20:28:25.145474 tx_win_center[1][1][0] = 0
4384 20:28:25.148381 tx_first_pass[1][1][0] = 0
4385 20:28:25.148457 tx_last_pass[1][1][0] = 0
4386 20:28:25.151814 tx_win_center[1][1][1] = 0
4387 20:28:25.155373 tx_first_pass[1][1][1] = 0
4388 20:28:25.158447 tx_last_pass[1][1][1] = 0
4389 20:28:25.158522 tx_win_center[1][1][2] = 0
4390 20:28:25.161776 tx_first_pass[1][1][2] = 0
4391 20:28:25.165183 tx_last_pass[1][1][2] = 0
4392 20:28:25.168343 tx_win_center[1][1][3] = 0
4393 20:28:25.168418 tx_first_pass[1][1][3] = 0
4394 20:28:25.172020 tx_last_pass[1][1][3] = 0
4395 20:28:25.175414 tx_win_center[1][1][4] = 0
4396 20:28:25.175486 tx_first_pass[1][1][4] = 0
4397 20:28:25.178522 tx_last_pass[1][1][4] = 0
4398 20:28:25.181792 tx_win_center[1][1][5] = 0
4399 20:28:25.185279 tx_first_pass[1][1][5] = 0
4400 20:28:25.185365 tx_last_pass[1][1][5] = 0
4401 20:28:25.188717 tx_win_center[1][1][6] = 0
4402 20:28:25.191945 tx_first_pass[1][1][6] = 0
4403 20:28:25.192015 tx_last_pass[1][1][6] = 0
4404 20:28:25.195284 tx_win_center[1][1][7] = 0
4405 20:28:25.198278 tx_first_pass[1][1][7] = 0
4406 20:28:25.201870 tx_last_pass[1][1][7] = 0
4407 20:28:25.201941 tx_win_center[1][1][8] = 0
4408 20:28:25.205293 tx_first_pass[1][1][8] = 0
4409 20:28:25.208680 tx_last_pass[1][1][8] = 0
4410 20:28:25.212113 tx_win_center[1][1][9] = 0
4411 20:28:25.212190 tx_first_pass[1][1][9] = 0
4412 20:28:25.215388 tx_last_pass[1][1][9] = 0
4413 20:28:25.218460 tx_win_center[1][1][10] = 0
4414 20:28:25.222073 tx_first_pass[1][1][10] = 0
4415 20:28:25.222145 tx_last_pass[1][1][10] = 0
4416 20:28:25.225565 tx_win_center[1][1][11] = 0
4417 20:28:25.228342 tx_first_pass[1][1][11] = 0
4418 20:28:25.232037 tx_last_pass[1][1][11] = 0
4419 20:28:25.232112 tx_win_center[1][1][12] = 0
4420 20:28:25.234800 tx_first_pass[1][1][12] = 0
4421 20:28:25.238323 tx_last_pass[1][1][12] = 0
4422 20:28:25.241754 tx_win_center[1][1][13] = 0
4423 20:28:25.241833 tx_first_pass[1][1][13] = 0
4424 20:28:25.245006 tx_last_pass[1][1][13] = 0
4425 20:28:25.248390 tx_win_center[1][1][14] = 0
4426 20:28:25.251821 tx_first_pass[1][1][14] = 0
4427 20:28:25.251912 tx_last_pass[1][1][14] = 0
4428 20:28:25.255340 tx_win_center[1][1][15] = 0
4429 20:28:25.258303 tx_first_pass[1][1][15] = 0
4430 20:28:25.261839 tx_last_pass[1][1][15] = 0
4431 20:28:25.261922 dump params rx window
4432 20:28:25.265405 rx_firspass[0][0][0] = 0
4433 20:28:25.265479 rx_lastpass[0][0][0] = 0
4434 20:28:25.268617 rx_firspass[0][0][1] = 0
4435 20:28:25.271891 rx_lastpass[0][0][1] = 0
4436 20:28:25.274919 rx_firspass[0][0][2] = 0
4437 20:28:25.274995 rx_lastpass[0][0][2] = 0
4438 20:28:25.278163 rx_firspass[0][0][3] = 0
4439 20:28:25.281459 rx_lastpass[0][0][3] = 0
4440 20:28:25.281536 rx_firspass[0][0][4] = 0
4441 20:28:25.284998 rx_lastpass[0][0][4] = 0
4442 20:28:25.288403 rx_firspass[0][0][5] = 0
4443 20:28:25.288478 rx_lastpass[0][0][5] = 0
4444 20:28:25.291832 rx_firspass[0][0][6] = 0
4445 20:28:25.295204 rx_lastpass[0][0][6] = 0
4446 20:28:25.295278 rx_firspass[0][0][7] = 0
4447 20:28:25.298556 rx_lastpass[0][0][7] = 0
4448 20:28:25.301737 rx_firspass[0][0][8] = 0
4449 20:28:25.301812 rx_lastpass[0][0][8] = 0
4450 20:28:25.305251 rx_firspass[0][0][9] = 0
4451 20:28:25.308247 rx_lastpass[0][0][9] = 0
4452 20:28:25.311605 rx_firspass[0][0][10] = 0
4453 20:28:25.311679 rx_lastpass[0][0][10] = 0
4454 20:28:25.315497 rx_firspass[0][0][11] = 0
4455 20:28:25.318130 rx_lastpass[0][0][11] = 0
4456 20:28:25.318207 rx_firspass[0][0][12] = 0
4457 20:28:25.321617 rx_lastpass[0][0][12] = 0
4458 20:28:25.324801 rx_firspass[0][0][13] = 0
4459 20:28:25.328423 rx_lastpass[0][0][13] = 0
4460 20:28:25.328498 rx_firspass[0][0][14] = 0
4461 20:28:25.331311 rx_lastpass[0][0][14] = 0
4462 20:28:25.334838 rx_firspass[0][0][15] = 0
4463 20:28:25.334916 rx_lastpass[0][0][15] = 0
4464 20:28:25.338456 rx_firspass[0][1][0] = 0
4465 20:28:25.341937 rx_lastpass[0][1][0] = 0
4466 20:28:25.342013 rx_firspass[0][1][1] = 0
4467 20:28:25.344806 rx_lastpass[0][1][1] = 0
4468 20:28:25.348159 rx_firspass[0][1][2] = 0
4469 20:28:25.351520 rx_lastpass[0][1][2] = 0
4470 20:28:25.351593 rx_firspass[0][1][3] = 0
4471 20:28:25.354688 rx_lastpass[0][1][3] = 0
4472 20:28:25.358228 rx_firspass[0][1][4] = 0
4473 20:28:25.358304 rx_lastpass[0][1][4] = 0
4474 20:28:25.361222 rx_firspass[0][1][5] = 0
4475 20:28:25.364747 rx_lastpass[0][1][5] = 0
4476 20:28:25.364819 rx_firspass[0][1][6] = 0
4477 20:28:25.368323 rx_lastpass[0][1][6] = 0
4478 20:28:25.371160 rx_firspass[0][1][7] = 0
4479 20:28:25.371233 rx_lastpass[0][1][7] = 0
4480 20:28:25.374691 rx_firspass[0][1][8] = 0
4481 20:28:25.378271 rx_lastpass[0][1][8] = 0
4482 20:28:25.378345 rx_firspass[0][1][9] = 0
4483 20:28:25.381706 rx_lastpass[0][1][9] = 0
4484 20:28:25.384580 rx_firspass[0][1][10] = 0
4485 20:28:25.387998 rx_lastpass[0][1][10] = 0
4486 20:28:25.388081 rx_firspass[0][1][11] = 0
4487 20:28:25.391519 rx_lastpass[0][1][11] = 0
4488 20:28:25.394824 rx_firspass[0][1][12] = 0
4489 20:28:25.394906 rx_lastpass[0][1][12] = 0
4490 20:28:25.398267 rx_firspass[0][1][13] = 0
4491 20:28:25.401292 rx_lastpass[0][1][13] = 0
4492 20:28:25.404702 rx_firspass[0][1][14] = 0
4493 20:28:25.404784 rx_lastpass[0][1][14] = 0
4494 20:28:25.408002 rx_firspass[0][1][15] = 0
4495 20:28:25.411653 rx_lastpass[0][1][15] = 0
4496 20:28:25.411735 rx_firspass[1][0][0] = 0
4497 20:28:25.414604 rx_lastpass[1][0][0] = 0
4498 20:28:25.418175 rx_firspass[1][0][1] = 0
4499 20:28:25.418258 rx_lastpass[1][0][1] = 0
4500 20:28:25.421580 rx_firspass[1][0][2] = 0
4501 20:28:25.424936 rx_lastpass[1][0][2] = 0
4502 20:28:25.425018 rx_firspass[1][0][3] = 0
4503 20:28:25.428417 rx_lastpass[1][0][3] = 0
4504 20:28:25.431466 rx_firspass[1][0][4] = 0
4505 20:28:25.434776 rx_lastpass[1][0][4] = 0
4506 20:28:25.434859 rx_firspass[1][0][5] = 0
4507 20:28:25.438089 rx_lastpass[1][0][5] = 0
4508 20:28:25.441679 rx_firspass[1][0][6] = 0
4509 20:28:25.441762 rx_lastpass[1][0][6] = 0
4510 20:28:25.445068 rx_firspass[1][0][7] = 0
4511 20:28:25.447878 rx_lastpass[1][0][7] = 0
4512 20:28:25.447961 rx_firspass[1][0][8] = 0
4513 20:28:25.451646 rx_lastpass[1][0][8] = 0
4514 20:28:25.454506 rx_firspass[1][0][9] = 0
4515 20:28:25.454589 rx_lastpass[1][0][9] = 0
4516 20:28:25.458109 rx_firspass[1][0][10] = 0
4517 20:28:25.461370 rx_lastpass[1][0][10] = 0
4518 20:28:25.464552 rx_firspass[1][0][11] = 0
4519 20:28:25.464634 rx_lastpass[1][0][11] = 0
4520 20:28:25.468247 rx_firspass[1][0][12] = 0
4521 20:28:25.471722 rx_lastpass[1][0][12] = 0
4522 20:28:25.471806 rx_firspass[1][0][13] = 0
4523 20:28:25.474825 rx_lastpass[1][0][13] = 0
4524 20:28:25.477650 rx_firspass[1][0][14] = 0
4525 20:28:25.481203 rx_lastpass[1][0][14] = 0
4526 20:28:25.481322 rx_firspass[1][0][15] = 0
4527 20:28:25.484564 rx_lastpass[1][0][15] = 0
4528 20:28:25.488107 rx_firspass[1][1][0] = 0
4529 20:28:25.488219 rx_lastpass[1][1][0] = 0
4530 20:28:25.491451 rx_firspass[1][1][1] = 0
4531 20:28:25.494779 rx_lastpass[1][1][1] = 0
4532 20:28:25.494862 rx_firspass[1][1][2] = 0
4533 20:28:25.497682 rx_lastpass[1][1][2] = 0
4534 20:28:25.500941 rx_firspass[1][1][3] = 0
4535 20:28:25.501048 rx_lastpass[1][1][3] = 0
4536 20:28:25.504616 rx_firspass[1][1][4] = 0
4537 20:28:25.507634 rx_lastpass[1][1][4] = 0
4538 20:28:25.511056 rx_firspass[1][1][5] = 0
4539 20:28:25.511134 rx_lastpass[1][1][5] = 0
4540 20:28:25.514278 rx_firspass[1][1][6] = 0
4541 20:28:25.517472 rx_lastpass[1][1][6] = 0
4542 20:28:25.517546 rx_firspass[1][1][7] = 0
4543 20:28:25.521409 rx_lastpass[1][1][7] = 0
4544 20:28:25.524290 rx_firspass[1][1][8] = 0
4545 20:28:25.524387 rx_lastpass[1][1][8] = 0
4546 20:28:25.527551 rx_firspass[1][1][9] = 0
4547 20:28:25.531164 rx_lastpass[1][1][9] = 0
4548 20:28:25.531247 rx_firspass[1][1][10] = 0
4549 20:28:25.534175 rx_lastpass[1][1][10] = 0
4550 20:28:25.537656 rx_firspass[1][1][11] = 0
4551 20:28:25.540972 rx_lastpass[1][1][11] = 0
4552 20:28:25.541054 rx_firspass[1][1][12] = 0
4553 20:28:25.544469 rx_lastpass[1][1][12] = 0
4554 20:28:25.547791 rx_firspass[1][1][13] = 0
4555 20:28:25.547873 rx_lastpass[1][1][13] = 0
4556 20:28:25.551196 rx_firspass[1][1][14] = 0
4557 20:28:25.554258 rx_lastpass[1][1][14] = 0
4558 20:28:25.557688 rx_firspass[1][1][15] = 0
4559 20:28:25.557770 rx_lastpass[1][1][15] = 0
4560 20:28:25.561022 dump params clk_delay
4561 20:28:25.561104 clk_delay[0] = 0
4562 20:28:25.564462 clk_delay[1] = 0
4563 20:28:25.564544 dump params dqs_delay
4564 20:28:25.567606 dqs_delay[0][0] = 0
4565 20:28:25.567687 dqs_delay[0][1] = 0
4566 20:28:25.571190 dqs_delay[1][0] = 0
4567 20:28:25.574620 dqs_delay[1][1] = 0
4568 20:28:25.574702 dump params delay_cell_unit = 762
4569 20:28:25.577804 dump source = 0x0
4570 20:28:25.581168 dump params frequency:800
4571 20:28:25.581310 dump params rank number:2
4572 20:28:25.581378
4573 20:28:25.584379 dump params write leveling
4574 20:28:25.588002 write leveling[0][0][0] = 0x0
4575 20:28:25.590825 write leveling[0][0][1] = 0x0
4576 20:28:25.594310 write leveling[0][1][0] = 0x0
4577 20:28:25.594388 write leveling[0][1][1] = 0x0
4578 20:28:25.597895 write leveling[1][0][0] = 0x0
4579 20:28:25.601275 write leveling[1][0][1] = 0x0
4580 20:28:25.604547 write leveling[1][1][0] = 0x0
4581 20:28:25.607968 write leveling[1][1][1] = 0x0
4582 20:28:25.608084 dump params cbt_cs
4583 20:28:25.610839 cbt_cs[0][0] = 0x0
4584 20:28:25.610937 cbt_cs[0][1] = 0x0
4585 20:28:25.614430 cbt_cs[1][0] = 0x0
4586 20:28:25.614535 cbt_cs[1][1] = 0x0
4587 20:28:25.617485 dump params cbt_mr12
4588 20:28:25.617645 cbt_mr12[0][0] = 0x0
4589 20:28:25.620878 cbt_mr12[0][1] = 0x0
4590 20:28:25.621045 cbt_mr12[1][0] = 0x0
4591 20:28:25.624536 cbt_mr12[1][1] = 0x0
4592 20:28:25.627495 dump params tx window
4593 20:28:25.627640 tx_center_min[0][0][0] = 0
4594 20:28:25.631082 tx_center_max[0][0][0] = 0
4595 20:28:25.634431 tx_center_min[0][0][1] = 0
4596 20:28:25.637755 tx_center_max[0][0][1] = 0
4597 20:28:25.637856 tx_center_min[0][1][0] = 0
4598 20:28:25.640819 tx_center_max[0][1][0] = 0
4599 20:28:25.644351 tx_center_min[0][1][1] = 0
4600 20:28:25.644471 tx_center_max[0][1][1] = 0
4601 20:28:25.647495 tx_center_min[1][0][0] = 0
4602 20:28:25.650751 tx_center_max[1][0][0] = 0
4603 20:28:25.654062 tx_center_min[1][0][1] = 0
4604 20:28:25.654154 tx_center_max[1][0][1] = 0
4605 20:28:25.657712 tx_center_min[1][1][0] = 0
4606 20:28:25.661145 tx_center_max[1][1][0] = 0
4607 20:28:25.664350 tx_center_min[1][1][1] = 0
4608 20:28:25.664448 tx_center_max[1][1][1] = 0
4609 20:28:25.667719 dump params tx window
4610 20:28:25.670745 tx_win_center[0][0][0] = 0
4611 20:28:25.670861 tx_first_pass[0][0][0] = 0
4612 20:28:25.674150 tx_last_pass[0][0][0] = 0
4613 20:28:25.677462 tx_win_center[0][0][1] = 0
4614 20:28:25.681031 tx_first_pass[0][0][1] = 0
4615 20:28:25.681218 tx_last_pass[0][0][1] = 0
4616 20:28:25.684576 tx_win_center[0][0][2] = 0
4617 20:28:25.687535 tx_first_pass[0][0][2] = 0
4618 20:28:25.691084 tx_last_pass[0][0][2] = 0
4619 20:28:25.691268 tx_win_center[0][0][3] = 0
4620 20:28:25.694588 tx_first_pass[0][0][3] = 0
4621 20:28:25.697570 tx_last_pass[0][0][3] = 0
4622 20:28:25.697654 tx_win_center[0][0][4] = 0
4623 20:28:25.701051 tx_first_pass[0][0][4] = 0
4624 20:28:25.704449 tx_last_pass[0][0][4] = 0
4625 20:28:25.707512 tx_win_center[0][0][5] = 0
4626 20:28:25.707597 tx_first_pass[0][0][5] = 0
4627 20:28:25.710853 tx_last_pass[0][0][5] = 0
4628 20:28:25.714507 tx_win_center[0][0][6] = 0
4629 20:28:25.714591 tx_first_pass[0][0][6] = 0
4630 20:28:25.717234 tx_last_pass[0][0][6] = 0
4631 20:28:25.721214 tx_win_center[0][0][7] = 0
4632 20:28:25.724301 tx_first_pass[0][0][7] = 0
4633 20:28:25.724386 tx_last_pass[0][0][7] = 0
4634 20:28:25.727656 tx_win_center[0][0][8] = 0
4635 20:28:25.731003 tx_first_pass[0][0][8] = 0
4636 20:28:25.734173 tx_last_pass[0][0][8] = 0
4637 20:28:25.734258 tx_win_center[0][0][9] = 0
4638 20:28:25.737629 tx_first_pass[0][0][9] = 0
4639 20:28:25.740935 tx_last_pass[0][0][9] = 0
4640 20:28:25.741023 tx_win_center[0][0][10] = 0
4641 20:28:25.744066 tx_first_pass[0][0][10] = 0
4642 20:28:25.747555 tx_last_pass[0][0][10] = 0
4643 20:28:25.750824 tx_win_center[0][0][11] = 0
4644 20:28:25.750940 tx_first_pass[0][0][11] = 0
4645 20:28:25.754461 tx_last_pass[0][0][11] = 0
4646 20:28:25.757774 tx_win_center[0][0][12] = 0
4647 20:28:25.761183 tx_first_pass[0][0][12] = 0
4648 20:28:25.761304 tx_last_pass[0][0][12] = 0
4649 20:28:25.764153 tx_win_center[0][0][13] = 0
4650 20:28:25.767645 tx_first_pass[0][0][13] = 0
4651 20:28:25.771341 tx_last_pass[0][0][13] = 0
4652 20:28:25.771424 tx_win_center[0][0][14] = 0
4653 20:28:25.774494 tx_first_pass[0][0][14] = 0
4654 20:28:25.777363 tx_last_pass[0][0][14] = 0
4655 20:28:25.780573 tx_win_center[0][0][15] = 0
4656 20:28:25.780657 tx_first_pass[0][0][15] = 0
4657 20:28:25.783962 tx_last_pass[0][0][15] = 0
4658 20:28:25.787431 tx_win_center[0][1][0] = 0
4659 20:28:25.791003 tx_first_pass[0][1][0] = 0
4660 20:28:25.791086 tx_last_pass[0][1][0] = 0
4661 20:28:25.794298 tx_win_center[0][1][1] = 0
4662 20:28:25.797218 tx_first_pass[0][1][1] = 0
4663 20:28:25.800733 tx_last_pass[0][1][1] = 0
4664 20:28:25.800816 tx_win_center[0][1][2] = 0
4665 20:28:25.804127 tx_first_pass[0][1][2] = 0
4666 20:28:25.807481 tx_last_pass[0][1][2] = 0
4667 20:28:25.807564 tx_win_center[0][1][3] = 0
4668 20:28:25.810577 tx_first_pass[0][1][3] = 0
4669 20:28:25.814158 tx_last_pass[0][1][3] = 0
4670 20:28:25.817509 tx_win_center[0][1][4] = 0
4671 20:28:25.817591 tx_first_pass[0][1][4] = 0
4672 20:28:25.820732 tx_last_pass[0][1][4] = 0
4673 20:28:25.824308 tx_win_center[0][1][5] = 0
4674 20:28:25.827200 tx_first_pass[0][1][5] = 0
4675 20:28:25.827283 tx_last_pass[0][1][5] = 0
4676 20:28:25.830751 tx_win_center[0][1][6] = 0
4677 20:28:25.834370 tx_first_pass[0][1][6] = 0
4678 20:28:25.834452 tx_last_pass[0][1][6] = 0
4679 20:28:25.837179 tx_win_center[0][1][7] = 0
4680 20:28:25.840549 tx_first_pass[0][1][7] = 0
4681 20:28:25.843863 tx_last_pass[0][1][7] = 0
4682 20:28:25.843946 tx_win_center[0][1][8] = 0
4683 20:28:25.847904 tx_first_pass[0][1][8] = 0
4684 20:28:25.850863 tx_last_pass[0][1][8] = 0
4685 20:28:25.853990 tx_win_center[0][1][9] = 0
4686 20:28:25.854096 tx_first_pass[0][1][9] = 0
4687 20:28:25.857335 tx_last_pass[0][1][9] = 0
4688 20:28:25.860425 tx_win_center[0][1][10] = 0
4689 20:28:25.864029 tx_first_pass[0][1][10] = 0
4690 20:28:25.864111 tx_last_pass[0][1][10] = 0
4691 20:28:25.867036 tx_win_center[0][1][11] = 0
4692 20:28:25.870443 tx_first_pass[0][1][11] = 0
4693 20:28:25.873707 tx_last_pass[0][1][11] = 0
4694 20:28:25.873790 tx_win_center[0][1][12] = 0
4695 20:28:25.877160 tx_first_pass[0][1][12] = 0
4696 20:28:25.880681 tx_last_pass[0][1][12] = 0
4697 20:28:25.883621 tx_win_center[0][1][13] = 0
4698 20:28:25.883704 tx_first_pass[0][1][13] = 0
4699 20:28:25.887322 tx_last_pass[0][1][13] = 0
4700 20:28:25.890808 tx_win_center[0][1][14] = 0
4701 20:28:25.893834 tx_first_pass[0][1][14] = 0
4702 20:28:25.893917 tx_last_pass[0][1][14] = 0
4703 20:28:25.897507 tx_win_center[0][1][15] = 0
4704 20:28:25.900718 tx_first_pass[0][1][15] = 0
4705 20:28:25.903763 tx_last_pass[0][1][15] = 0
4706 20:28:25.903846 tx_win_center[1][0][0] = 0
4707 20:28:25.907333 tx_first_pass[1][0][0] = 0
4708 20:28:25.910526 tx_last_pass[1][0][0] = 0
4709 20:28:25.910636 tx_win_center[1][0][1] = 0
4710 20:28:25.914243 tx_first_pass[1][0][1] = 0
4711 20:28:25.917185 tx_last_pass[1][0][1] = 0
4712 20:28:25.920761 tx_win_center[1][0][2] = 0
4713 20:28:25.920843 tx_first_pass[1][0][2] = 0
4714 20:28:25.923966 tx_last_pass[1][0][2] = 0
4715 20:28:25.927200 tx_win_center[1][0][3] = 0
4716 20:28:25.927283 tx_first_pass[1][0][3] = 0
4717 20:28:25.930512 tx_last_pass[1][0][3] = 0
4718 20:28:25.933566 tx_win_center[1][0][4] = 0
4719 20:28:25.937371 tx_first_pass[1][0][4] = 0
4720 20:28:25.937453 tx_last_pass[1][0][4] = 0
4721 20:28:25.940599 tx_win_center[1][0][5] = 0
4722 20:28:25.943624 tx_first_pass[1][0][5] = 0
4723 20:28:25.947069 tx_last_pass[1][0][5] = 0
4724 20:28:25.947151 tx_win_center[1][0][6] = 0
4725 20:28:25.950612 tx_first_pass[1][0][6] = 0
4726 20:28:25.953550 tx_last_pass[1][0][6] = 0
4727 20:28:25.953633 tx_win_center[1][0][7] = 0
4728 20:28:25.956954 tx_first_pass[1][0][7] = 0
4729 20:28:25.960525 tx_last_pass[1][0][7] = 0
4730 20:28:25.963426 tx_win_center[1][0][8] = 0
4731 20:28:25.963508 tx_first_pass[1][0][8] = 0
4732 20:28:25.966855 tx_last_pass[1][0][8] = 0
4733 20:28:25.970090 tx_win_center[1][0][9] = 0
4734 20:28:25.973580 tx_first_pass[1][0][9] = 0
4735 20:28:25.973663 tx_last_pass[1][0][9] = 0
4736 20:28:25.976986 tx_win_center[1][0][10] = 0
4737 20:28:25.980440 tx_first_pass[1][0][10] = 0
4738 20:28:25.983507 tx_last_pass[1][0][10] = 0
4739 20:28:25.983589 tx_win_center[1][0][11] = 0
4740 20:28:25.987245 tx_first_pass[1][0][11] = 0
4741 20:28:25.990161 tx_last_pass[1][0][11] = 0
4742 20:28:25.993517 tx_win_center[1][0][12] = 0
4743 20:28:25.993599 tx_first_pass[1][0][12] = 0
4744 20:28:25.997332 tx_last_pass[1][0][12] = 0
4745 20:28:26.000226 tx_win_center[1][0][13] = 0
4746 20:28:26.003451 tx_first_pass[1][0][13] = 0
4747 20:28:26.003533 tx_last_pass[1][0][13] = 0
4748 20:28:26.006524 tx_win_center[1][0][14] = 0
4749 20:28:26.010121 tx_first_pass[1][0][14] = 0
4750 20:28:26.013599 tx_last_pass[1][0][14] = 0
4751 20:28:26.013681 tx_win_center[1][0][15] = 0
4752 20:28:26.016871 tx_first_pass[1][0][15] = 0
4753 20:28:26.020327 tx_last_pass[1][0][15] = 0
4754 20:28:26.023442 tx_win_center[1][1][0] = 0
4755 20:28:26.023524 tx_first_pass[1][1][0] = 0
4756 20:28:26.026721 tx_last_pass[1][1][0] = 0
4757 20:28:26.030286 tx_win_center[1][1][1] = 0
4758 20:28:26.030367 tx_first_pass[1][1][1] = 0
4759 20:28:26.033164 tx_last_pass[1][1][1] = 0
4760 20:28:26.036558 tx_win_center[1][1][2] = 0
4761 20:28:26.040291 tx_first_pass[1][1][2] = 0
4762 20:28:26.040373 tx_last_pass[1][1][2] = 0
4763 20:28:26.043202 tx_win_center[1][1][3] = 0
4764 20:28:26.046620 tx_first_pass[1][1][3] = 0
4765 20:28:26.049943 tx_last_pass[1][1][3] = 0
4766 20:28:26.050024 tx_win_center[1][1][4] = 0
4767 20:28:26.053547 tx_first_pass[1][1][4] = 0
4768 20:28:26.056503 tx_last_pass[1][1][4] = 0
4769 20:28:26.056585 tx_win_center[1][1][5] = 0
4770 20:28:26.060264 tx_first_pass[1][1][5] = 0
4771 20:28:26.063932 tx_last_pass[1][1][5] = 0
4772 20:28:26.066566 tx_win_center[1][1][6] = 0
4773 20:28:26.066647 tx_first_pass[1][1][6] = 0
4774 20:28:26.069852 tx_last_pass[1][1][6] = 0
4775 20:28:26.073396 tx_win_center[1][1][7] = 0
4776 20:28:26.073478 tx_first_pass[1][1][7] = 0
4777 20:28:26.076944 tx_last_pass[1][1][7] = 0
4778 20:28:26.080497 tx_win_center[1][1][8] = 0
4779 20:28:26.083327 tx_first_pass[1][1][8] = 0
4780 20:28:26.083410 tx_last_pass[1][1][8] = 0
4781 20:28:26.086645 tx_win_center[1][1][9] = 0
4782 20:28:26.090237 tx_first_pass[1][1][9] = 0
4783 20:28:26.093585 tx_last_pass[1][1][9] = 0
4784 20:28:26.093668 tx_win_center[1][1][10] = 0
4785 20:28:26.097045 tx_first_pass[1][1][10] = 0
4786 20:28:26.100389 tx_last_pass[1][1][10] = 0
4787 20:28:26.103291 tx_win_center[1][1][11] = 0
4788 20:28:26.103373 tx_first_pass[1][1][11] = 0
4789 20:28:26.106544 tx_last_pass[1][1][11] = 0
4790 20:28:26.110099 tx_win_center[1][1][12] = 0
4791 20:28:26.113359 tx_first_pass[1][1][12] = 0
4792 20:28:26.113442 tx_last_pass[1][1][12] = 0
4793 20:28:26.116414 tx_win_center[1][1][13] = 0
4794 20:28:26.120282 tx_first_pass[1][1][13] = 0
4795 20:28:26.123092 tx_last_pass[1][1][13] = 0
4796 20:28:26.123175 tx_win_center[1][1][14] = 0
4797 20:28:26.126478 tx_first_pass[1][1][14] = 0
4798 20:28:26.129924 tx_last_pass[1][1][14] = 0
4799 20:28:26.133589 tx_win_center[1][1][15] = 0
4800 20:28:26.133672 tx_first_pass[1][1][15] = 0
4801 20:28:26.136411 tx_last_pass[1][1][15] = 0
4802 20:28:26.139995 dump params rx window
4803 20:28:26.140078 rx_firspass[0][0][0] = 0
4804 20:28:26.142962 rx_lastpass[0][0][0] = 0
4805 20:28:26.146521 rx_firspass[0][0][1] = 0
4806 20:28:26.146603 rx_lastpass[0][0][1] = 0
4807 20:28:26.149999 rx_firspass[0][0][2] = 0
4808 20:28:26.153511 rx_lastpass[0][0][2] = 0
4809 20:28:26.153595 rx_firspass[0][0][3] = 0
4810 20:28:26.156504 rx_lastpass[0][0][3] = 0
4811 20:28:26.159922 rx_firspass[0][0][4] = 0
4812 20:28:26.163312 rx_lastpass[0][0][4] = 0
4813 20:28:26.163395 rx_firspass[0][0][5] = 0
4814 20:28:26.166312 rx_lastpass[0][0][5] = 0
4815 20:28:26.169988 rx_firspass[0][0][6] = 0
4816 20:28:26.170070 rx_lastpass[0][0][6] = 0
4817 20:28:26.173113 rx_firspass[0][0][7] = 0
4818 20:28:26.176688 rx_lastpass[0][0][7] = 0
4819 20:28:26.176771 rx_firspass[0][0][8] = 0
4820 20:28:26.179989 rx_lastpass[0][0][8] = 0
4821 20:28:26.182999 rx_firspass[0][0][9] = 0
4822 20:28:26.183153 rx_lastpass[0][0][9] = 0
4823 20:28:26.186378 rx_firspass[0][0][10] = 0
4824 20:28:26.189861 rx_lastpass[0][0][10] = 0
4825 20:28:26.193302 rx_firspass[0][0][11] = 0
4826 20:28:26.193384 rx_lastpass[0][0][11] = 0
4827 20:28:26.196292 rx_firspass[0][0][12] = 0
4828 20:28:26.199867 rx_lastpass[0][0][12] = 0
4829 20:28:26.199949 rx_firspass[0][0][13] = 0
4830 20:28:26.203613 rx_lastpass[0][0][13] = 0
4831 20:28:26.206382 rx_firspass[0][0][14] = 0
4832 20:28:26.209809 rx_lastpass[0][0][14] = 0
4833 20:28:26.209891 rx_firspass[0][0][15] = 0
4834 20:28:26.213172 rx_lastpass[0][0][15] = 0
4835 20:28:26.216354 rx_firspass[0][1][0] = 0
4836 20:28:26.216436 rx_lastpass[0][1][0] = 0
4837 20:28:26.219660 rx_firspass[0][1][1] = 0
4838 20:28:26.223433 rx_lastpass[0][1][1] = 0
4839 20:28:26.223515 rx_firspass[0][1][2] = 0
4840 20:28:26.226436 rx_lastpass[0][1][2] = 0
4841 20:28:26.229963 rx_firspass[0][1][3] = 0
4842 20:28:26.230045 rx_lastpass[0][1][3] = 0
4843 20:28:26.233297 rx_firspass[0][1][4] = 0
4844 20:28:26.236585 rx_lastpass[0][1][4] = 0
4845 20:28:26.236666 rx_firspass[0][1][5] = 0
4846 20:28:26.240138 rx_lastpass[0][1][5] = 0
4847 20:28:26.243514 rx_firspass[0][1][6] = 0
4848 20:28:26.246837 rx_lastpass[0][1][6] = 0
4849 20:28:26.246920 rx_firspass[0][1][7] = 0
4850 20:28:26.249887 rx_lastpass[0][1][7] = 0
4851 20:28:26.253404 rx_firspass[0][1][8] = 0
4852 20:28:26.253486 rx_lastpass[0][1][8] = 0
4853 20:28:26.256363 rx_firspass[0][1][9] = 0
4854 20:28:26.259860 rx_lastpass[0][1][9] = 0
4855 20:28:26.259943 rx_firspass[0][1][10] = 0
4856 20:28:26.263539 rx_lastpass[0][1][10] = 0
4857 20:28:26.266388 rx_firspass[0][1][11] = 0
4858 20:28:26.266471 rx_lastpass[0][1][11] = 0
4859 20:28:26.269783 rx_firspass[0][1][12] = 0
4860 20:28:26.273388 rx_lastpass[0][1][12] = 0
4861 20:28:26.276281 rx_firspass[0][1][13] = 0
4862 20:28:26.276363 rx_lastpass[0][1][13] = 0
4863 20:28:26.279735 rx_firspass[0][1][14] = 0
4864 20:28:26.283199 rx_lastpass[0][1][14] = 0
4865 20:28:26.283281 rx_firspass[0][1][15] = 0
4866 20:28:26.286260 rx_lastpass[0][1][15] = 0
4867 20:28:26.289623 rx_firspass[1][0][0] = 0
4868 20:28:26.293056 rx_lastpass[1][0][0] = 0
4869 20:28:26.293138 rx_firspass[1][0][1] = 0
4870 20:28:26.296192 rx_lastpass[1][0][1] = 0
4871 20:28:26.299586 rx_firspass[1][0][2] = 0
4872 20:28:26.299668 rx_lastpass[1][0][2] = 0
4873 20:28:26.302910 rx_firspass[1][0][3] = 0
4874 20:28:26.306403 rx_lastpass[1][0][3] = 0
4875 20:28:26.306485 rx_firspass[1][0][4] = 0
4876 20:28:26.309743 rx_lastpass[1][0][4] = 0
4877 20:28:26.313031 rx_firspass[1][0][5] = 0
4878 20:28:26.313140 rx_lastpass[1][0][5] = 0
4879 20:28:26.316593 rx_firspass[1][0][6] = 0
4880 20:28:26.319497 rx_lastpass[1][0][6] = 0
4881 20:28:26.319579 rx_firspass[1][0][7] = 0
4882 20:28:26.322772 rx_lastpass[1][0][7] = 0
4883 20:28:26.326248 rx_firspass[1][0][8] = 0
4884 20:28:26.329757 rx_lastpass[1][0][8] = 0
4885 20:28:26.329839 rx_firspass[1][0][9] = 0
4886 20:28:26.332715 rx_lastpass[1][0][9] = 0
4887 20:28:26.336209 rx_firspass[1][0][10] = 0
4888 20:28:26.336291 rx_lastpass[1][0][10] = 0
4889 20:28:26.339606 rx_firspass[1][0][11] = 0
4890 20:28:26.342975 rx_lastpass[1][0][11] = 0
4891 20:28:26.343058 rx_firspass[1][0][12] = 0
4892 20:28:26.346509 rx_lastpass[1][0][12] = 0
4893 20:28:26.349680 rx_firspass[1][0][13] = 0
4894 20:28:26.352905 rx_lastpass[1][0][13] = 0
4895 20:28:26.352988 rx_firspass[1][0][14] = 0
4896 20:28:26.356255 rx_lastpass[1][0][14] = 0
4897 20:28:26.359640 rx_firspass[1][0][15] = 0
4898 20:28:26.359723 rx_lastpass[1][0][15] = 0
4899 20:28:26.363039 rx_firspass[1][1][0] = 0
4900 20:28:26.366014 rx_lastpass[1][1][0] = 0
4901 20:28:26.369782 rx_firspass[1][1][1] = 0
4902 20:28:26.369869 rx_lastpass[1][1][1] = 0
4903 20:28:26.373086 rx_firspass[1][1][2] = 0
4904 20:28:26.376209 rx_lastpass[1][1][2] = 0
4905 20:28:26.376296 rx_firspass[1][1][3] = 0
4906 20:28:26.379513 rx_lastpass[1][1][3] = 0
4907 20:28:26.382930 rx_firspass[1][1][4] = 0
4908 20:28:26.383030 rx_lastpass[1][1][4] = 0
4909 20:28:26.386852 rx_firspass[1][1][5] = 0
4910 20:28:26.389860 rx_lastpass[1][1][5] = 0
4911 20:28:26.389982 rx_firspass[1][1][6] = 0
4912 20:28:26.393003 rx_lastpass[1][1][6] = 0
4913 20:28:26.396211 rx_firspass[1][1][7] = 0
4914 20:28:26.396322 rx_lastpass[1][1][7] = 0
4915 20:28:26.399626 rx_firspass[1][1][8] = 0
4916 20:28:26.403394 rx_lastpass[1][1][8] = 0
4917 20:28:26.403518 rx_firspass[1][1][9] = 0
4918 20:28:26.406763 rx_lastpass[1][1][9] = 0
4919 20:28:26.410155 rx_firspass[1][1][10] = 0
4920 20:28:26.413224 rx_lastpass[1][1][10] = 0
4921 20:28:26.413397 rx_firspass[1][1][11] = 0
4922 20:28:26.416352 rx_lastpass[1][1][11] = 0
4923 20:28:26.419785 rx_firspass[1][1][12] = 0
4924 20:28:26.419959 rx_lastpass[1][1][12] = 0
4925 20:28:26.423178 rx_firspass[1][1][13] = 0
4926 20:28:26.426490 rx_lastpass[1][1][13] = 0
4927 20:28:26.429850 rx_firspass[1][1][14] = 0
4928 20:28:26.430092 rx_lastpass[1][1][14] = 0
4929 20:28:26.433305 rx_firspass[1][1][15] = 0
4930 20:28:26.436400 rx_lastpass[1][1][15] = 0
4931 20:28:26.436790 dump params clk_delay
4932 20:28:26.439801 clk_delay[0] = 0
4933 20:28:26.440210 clk_delay[1] = 0
4934 20:28:26.442996 dump params dqs_delay
4935 20:28:26.443416 dqs_delay[0][0] = 0
4936 20:28:26.446936 dqs_delay[0][1] = 0
4937 20:28:26.447356 dqs_delay[1][0] = 0
4938 20:28:26.449757 dqs_delay[1][1] = 0
4939 20:28:26.453110 dump params delay_cell_unit = 762
4940 20:28:26.456201 mt_set_emi_preloader end
4941 20:28:26.460909 [mt_mem_init] dram size: 0x100000000, rank number: 2
4942 20:28:26.462848 [complex_mem_test] start addr:0x40000000, len:20480
4943 20:28:26.500906 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4944 20:28:26.507757 [complex_mem_test] start addr:0x80000000, len:20480
4945 20:28:26.543366 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4946 20:28:26.550319 [complex_mem_test] start addr:0xc0000000, len:20480
4947 20:28:26.585787 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4948 20:28:26.592357 [complex_mem_test] start addr:0x56000000, len:8192
4949 20:28:26.609159 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4950 20:28:26.609878 ddr_geometry:1
4951 20:28:26.615602 [complex_mem_test] start addr:0x80000000, len:8192
4952 20:28:26.632160 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4953 20:28:26.635667 dram_init: dram init end (result: 0)
4954 20:28:26.642707 Successfully loaded DRAM blobs and ran DRAM calibration
4955 20:28:26.651989 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4956 20:28:26.652175 CBMEM:
4957 20:28:26.655638 IMD: root @ 00000000fffff000 254 entries.
4958 20:28:26.659128 IMD: root @ 00000000ffffec00 62 entries.
4959 20:28:26.665740 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4960 20:28:26.672294 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4961 20:28:26.675566 in-header: 03 a1 00 00 08 00 00 00
4962 20:28:26.679132 in-data: 84 60 60 10 00 00 00 00
4963 20:28:26.682211 Chrome EC: clear events_b mask to 0x0000000020004000
4964 20:28:26.689571 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4965 20:28:26.692418 in-header: 03 fd 00 00 00 00 00 00
4966 20:28:26.696207 in-data:
4967 20:28:26.699249 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4968 20:28:26.702355 CBFS @ 21000 size 3d4000
4969 20:28:26.706360 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4970 20:28:26.709457 CBFS: Locating 'fallback/ramstage'
4971 20:28:26.712646 CBFS: Found @ offset 10d40 size d563
4972 20:28:26.734487 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4973 20:28:26.746613 Accumulated console time in romstage 12836 ms
4974 20:28:26.746800
4975 20:28:26.746923
4976 20:28:26.756553 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4977 20:28:26.760607 ARM64: Exception handlers installed.
4978 20:28:26.760784 ARM64: Testing exception
4979 20:28:26.763263 ARM64: Done test exception
4980 20:28:26.766954 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4981 20:28:26.770401 Manufacturer: ef
4982 20:28:26.773501 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4983 20:28:26.780416 WARNING: RO_VPD is uninitialized or empty.
4984 20:28:26.783466 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4985 20:28:26.786637 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4986 20:28:26.796379 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4987 20:28:26.799900 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4988 20:28:26.806155 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4989 20:28:26.806370 Enumerating buses...
4990 20:28:26.813384 Show all devs... Before device enumeration.
4991 20:28:26.813569 Root Device: enabled 1
4992 20:28:26.816317 CPU_CLUSTER: 0: enabled 1
4993 20:28:26.816429 CPU: 00: enabled 1
4994 20:28:26.819718 Compare with tree...
4995 20:28:26.823051 Root Device: enabled 1
4996 20:28:26.823162 CPU_CLUSTER: 0: enabled 1
4997 20:28:26.826156 CPU: 00: enabled 1
4998 20:28:26.829653 Root Device scanning...
4999 20:28:26.829737 root_dev_scan_bus for Root Device
5000 20:28:26.833351 CPU_CLUSTER: 0 enabled
5001 20:28:26.836557 root_dev_scan_bus for Root Device done
5002 20:28:26.843335 scan_bus: scanning of bus Root Device took 10690 usecs
5003 20:28:26.843419 done
5004 20:28:26.846591 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5005 20:28:26.849809 Allocating resources...
5006 20:28:26.849882 Reading resources...
5007 20:28:26.853327 Root Device read_resources bus 0 link: 0
5008 20:28:26.860012 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5009 20:28:26.860090 CPU: 00 missing read_resources
5010 20:28:26.866539 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5011 20:28:26.869898 Root Device read_resources bus 0 link: 0 done
5012 20:28:26.872712 Done reading resources.
5013 20:28:26.876377 Show resources in subtree (Root Device)...After reading.
5014 20:28:26.879957 Root Device child on link 0 CPU_CLUSTER: 0
5015 20:28:26.882819 CPU_CLUSTER: 0 child on link 0 CPU: 00
5016 20:28:26.892801 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5017 20:28:26.892918 CPU: 00
5018 20:28:26.896663 Setting resources...
5019 20:28:26.899360 Root Device assign_resources, bus 0 link: 0
5020 20:28:26.903087 CPU_CLUSTER: 0 missing set_resources
5021 20:28:26.906218 Root Device assign_resources, bus 0 link: 0
5022 20:28:26.909557 Done setting resources.
5023 20:28:26.916134 Show resources in subtree (Root Device)...After assigning values.
5024 20:28:26.919709 Root Device child on link 0 CPU_CLUSTER: 0
5025 20:28:26.922866 CPU_CLUSTER: 0 child on link 0 CPU: 00
5026 20:28:26.929550 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5027 20:28:26.932677 CPU: 00
5028 20:28:26.936474 Done allocating resources.
5029 20:28:26.939585 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5030 20:28:26.942803 Enabling resources...
5031 20:28:26.942973 done.
5032 20:28:26.946162 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5033 20:28:26.949407 Initializing devices...
5034 20:28:26.949576 Root Device init ...
5035 20:28:26.953182 mainboard_init: Starting display init.
5036 20:28:26.955880 ADC[4]: Raw value=76850 ID=0
5037 20:28:26.979702 anx7625_power_on_init: Init interface.
5038 20:28:26.982759 anx7625_disable_pd_protocol: Disabled PD feature.
5039 20:28:26.989124 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5040 20:28:27.036237 anx7625_start_dp_work: Secure OCM version=00
5041 20:28:27.039210 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5042 20:28:27.056189 sp_tx_get_edid_block: EDID Block = 1
5043 20:28:27.173588 Extracted contents:
5044 20:28:27.177292 header: 00 ff ff ff ff ff ff 00
5045 20:28:27.179990 serial number: 06 af 5c 14 00 00 00 00 00 1a
5046 20:28:27.183252 version: 01 04
5047 20:28:27.186819 basic params: 95 1a 0e 78 02
5048 20:28:27.190381 chroma info: 99 85 95 55 56 92 28 22 50 54
5049 20:28:27.193473 established: 00 00 00
5050 20:28:27.199998 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5051 20:28:27.203406 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5052 20:28:27.209698 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5053 20:28:27.216457 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5054 20:28:27.223877 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5055 20:28:27.226622 extensions: 00
5056 20:28:27.226707 checksum: ae
5057 20:28:27.226792
5058 20:28:27.230106 Manufacturer: AUO Model 145c Serial Number 0
5059 20:28:27.233402 Made week 0 of 2016
5060 20:28:27.233516 EDID version: 1.4
5061 20:28:27.236895 Digital display
5062 20:28:27.239910 6 bits per primary color channel
5063 20:28:27.239983 DisplayPort interface
5064 20:28:27.243558 Maximum image size: 26 cm x 14 cm
5065 20:28:27.246659 Gamma: 220%
5066 20:28:27.246730 Check DPMS levels
5067 20:28:27.249921 Supported color formats: RGB 4:4:4
5068 20:28:27.253808 First detailed timing is preferred timing
5069 20:28:27.257063 Established timings supported:
5070 20:28:27.260077 Standard timings supported:
5071 20:28:27.260152 Detailed timings
5072 20:28:27.266851 Hex of detail: ce1d56ea50001a3030204600009010000018
5073 20:28:27.270297 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5074 20:28:27.273486 0556 0586 05a6 0640 hborder 0
5075 20:28:27.276752 0300 0304 030a 031a vborder 0
5076 20:28:27.280099 -hsync -vsync
5077 20:28:27.283517 Did detailed timing
5078 20:28:27.286932 Hex of detail: 0000000f0000000000000000000000000020
5079 20:28:27.290155 Manufacturer-specified data, tag 15
5080 20:28:27.293704 Hex of detail: 000000fe0041554f0a202020202020202020
5081 20:28:27.296622 ASCII string: AUO
5082 20:28:27.300049 Hex of detail: 000000fe004231313658414230312e34200a
5083 20:28:27.303557 ASCII string: B116XAB01.4
5084 20:28:27.303642 Checksum
5085 20:28:27.306549 Checksum: 0xae (valid)
5086 20:28:27.313501 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5087 20:28:27.313612 DSI data_rate: 457800000 bps
5088 20:28:27.320475 anx7625_parse_edid: set default k value to 0x3d for panel
5089 20:28:27.323899 anx7625_parse_edid: pixelclock(76300).
5090 20:28:27.327419 hactive(1366), hsync(32), hfp(48), hbp(154)
5091 20:28:27.330501 vactive(768), vsync(6), vfp(4), vbp(16)
5092 20:28:27.333963 anx7625_dsi_config: config dsi.
5093 20:28:27.342141 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5094 20:28:27.363165 anx7625_dsi_config: success to config DSI
5095 20:28:27.366088 anx7625_dp_start: MIPI phy setup OK.
5096 20:28:27.369602 [SSUSB] Setting up USB HOST controller...
5097 20:28:27.372740 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5098 20:28:27.376202 [SSUSB] phy power-on done.
5099 20:28:27.380021 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5100 20:28:27.383592 in-header: 03 fc 01 00 00 00 00 00
5101 20:28:27.383677 in-data:
5102 20:28:27.386612 handle_proto3_response: EC response with error code: 1
5103 20:28:27.389962 SPM: pcm index = 1
5104 20:28:27.393397 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5105 20:28:27.396697 CBFS @ 21000 size 3d4000
5106 20:28:27.403419 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5107 20:28:27.406992 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5108 20:28:27.410387 CBFS: Found @ offset 1e7c0 size 1026
5109 20:28:27.416951 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5110 20:28:27.420125 SPM: binary array size = 2988
5111 20:28:27.423378 SPM: version = pcm_allinone_v1.17.2_20180829
5112 20:28:27.426767 SPM binary loaded in 32 msecs
5113 20:28:27.433736 spm_kick_im_to_fetch: ptr = 000000004021eec2
5114 20:28:27.437241 spm_kick_im_to_fetch: len = 2988
5115 20:28:27.437344 SPM: spm_kick_pcm_to_run
5116 20:28:27.440827 SPM: spm_kick_pcm_to_run done
5117 20:28:27.444011 SPM: spm_init done in 52 msecs
5118 20:28:27.447135 Root Device init finished in 494985 usecs
5119 20:28:27.450568 CPU_CLUSTER: 0 init ...
5120 20:28:27.457265 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5121 20:28:27.464273 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5122 20:28:27.467260 CBFS @ 21000 size 3d4000
5123 20:28:27.470704 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5124 20:28:27.473992 CBFS: Locating 'sspm.bin'
5125 20:28:27.477524 CBFS: Found @ offset 208c0 size 41cb
5126 20:28:27.487209 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5127 20:28:27.495101 CPU_CLUSTER: 0 init finished in 42802 usecs
5128 20:28:27.495186 Devices initialized
5129 20:28:27.498520 Show all devs... After init.
5130 20:28:27.501555 Root Device: enabled 1
5131 20:28:27.501637 CPU_CLUSTER: 0: enabled 1
5132 20:28:27.504869 CPU: 00: enabled 1
5133 20:28:27.508483 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5134 20:28:27.511895 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5135 20:28:27.514711 ELOG: NV offset 0x558000 size 0x1000
5136 20:28:27.522841 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5137 20:28:27.529184 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5138 20:28:27.532670 ELOG: Event(17) added with size 13 at 2024-05-15 20:28:27 UTC
5139 20:28:27.536039 out: cmd=0x121: 03 db 21 01 00 00 00 00
5140 20:28:27.539566 in-header: 03 08 00 00 2c 00 00 00
5141 20:28:27.552672 in-data: 30 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 85 fa 02 00 06 80 00 00 1c 1a 15 00 06 80 00 00 e9 71 03 00 06 80 00 00 d3 26 05 00
5142 20:28:27.555945 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5143 20:28:27.559137 in-header: 03 19 00 00 08 00 00 00
5144 20:28:27.562422 in-data: a2 e0 47 00 13 00 00 00
5145 20:28:27.565856 Chrome EC: UHEPI supported
5146 20:28:27.572792 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5147 20:28:27.575820 in-header: 03 e1 00 00 08 00 00 00
5148 20:28:27.579215 in-data: 84 20 60 10 00 00 00 00
5149 20:28:27.582620 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5150 20:28:27.589519 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5151 20:28:27.592548 in-header: 03 e1 00 00 08 00 00 00
5152 20:28:27.596239 in-data: 84 20 60 10 00 00 00 00
5153 20:28:27.602787 ELOG: Event(A1) added with size 10 at 2024-05-15 20:28:27 UTC
5154 20:28:27.609557 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5155 20:28:27.612502 ELOG: Event(A0) added with size 9 at 2024-05-15 20:28:27 UTC
5156 20:28:27.619338 elog_add_boot_reason: Logged dev mode boot
5157 20:28:27.619423 Finalize devices...
5158 20:28:27.623027 Devices finalized
5159 20:28:27.626208 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5160 20:28:27.629388 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5161 20:28:27.635959 ELOG: Event(91) added with size 10 at 2024-05-15 20:28:27 UTC
5162 20:28:27.639918 Writing coreboot table at 0xffeda000
5163 20:28:27.642992 0. 0000000000114000-000000000011efff: RAMSTAGE
5164 20:28:27.649156 1. 0000000040000000-000000004023cfff: RAMSTAGE
5165 20:28:27.652541 2. 000000004023d000-00000000545fffff: RAM
5166 20:28:27.655881 3. 0000000054600000-000000005465ffff: BL31
5167 20:28:27.659421 4. 0000000054660000-00000000ffed9fff: RAM
5168 20:28:27.665967 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5169 20:28:27.669367 6. 0000000100000000-000000013fffffff: RAM
5170 20:28:27.669451 Passing 5 GPIOs to payload:
5171 20:28:27.675863 NAME | PORT | POLARITY | VALUE
5172 20:28:27.679347 write protect | 0x00000096 | low | high
5173 20:28:27.686003 EC in RW | 0x000000b1 | high | undefined
5174 20:28:27.689134 EC interrupt | 0x00000097 | low | undefined
5175 20:28:27.692741 TPM interrupt | 0x00000099 | high | undefined
5176 20:28:27.699147 speaker enable | 0x000000af | high | undefined
5177 20:28:27.702609 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5178 20:28:27.705859 in-header: 03 f7 00 00 02 00 00 00
5179 20:28:27.705951 in-data: 04 00
5180 20:28:27.709020 Board ID: 4
5181 20:28:27.712465 ADC[3]: Raw value=1034985 ID=8
5182 20:28:27.712547 RAM code: 8
5183 20:28:27.712612 SKU ID: 16
5184 20:28:27.719244 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5185 20:28:27.719334 CBFS @ 21000 size 3d4000
5186 20:28:27.726047 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5187 20:28:27.732519 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum bc5f
5188 20:28:27.732629 coreboot table: 940 bytes.
5189 20:28:27.735970 IMD ROOT 0. 00000000fffff000 00001000
5190 20:28:27.742431 IMD SMALL 1. 00000000ffffe000 00001000
5191 20:28:27.746056 CONSOLE 2. 00000000fffde000 00020000
5192 20:28:27.749056 FMAP 3. 00000000fffdd000 0000047c
5193 20:28:27.752384 TIME STAMP 4. 00000000fffdc000 00000910
5194 20:28:27.755503 RAMOOPS 5. 00000000ffedc000 00100000
5195 20:28:27.759317 COREBOOT 6. 00000000ffeda000 00002000
5196 20:28:27.759430 IMD small region:
5197 20:28:27.765460 IMD ROOT 0. 00000000ffffec00 00000400
5198 20:28:27.769130 VBOOT WORK 1. 00000000ffffeb00 00000100
5199 20:28:27.772538 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5200 20:28:27.775927 VPD 3. 00000000ffffea60 0000006c
5201 20:28:27.779087 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5202 20:28:27.785529 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5203 20:28:27.789063 in-header: 03 e1 00 00 08 00 00 00
5204 20:28:27.792615 in-data: 84 20 60 10 00 00 00 00
5205 20:28:27.798984 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5206 20:28:27.799088 CBFS @ 21000 size 3d4000
5207 20:28:27.805940 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5208 20:28:27.808830 CBFS: Locating 'fallback/payload'
5209 20:28:27.816780 CBFS: Found @ offset dc040 size 439a0
5210 20:28:27.905016 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5211 20:28:27.907802 Checking segment from ROM address 0x0000000040003a00
5212 20:28:27.914279 Checking segment from ROM address 0x0000000040003a1c
5213 20:28:27.917925 Loading segment from ROM address 0x0000000040003a00
5214 20:28:27.921491 code (compression=0)
5215 20:28:27.931229 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5216 20:28:27.938136 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5217 20:28:27.941233 it's not compressed!
5218 20:28:27.944677 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5219 20:28:27.951149 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5220 20:28:27.959326 Loading segment from ROM address 0x0000000040003a1c
5221 20:28:27.962317 Entry Point 0x0000000080000000
5222 20:28:27.962408 Loaded segments
5223 20:28:27.968975 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5224 20:28:27.972467 Jumping to boot code at 0000000080000000(00000000ffeda000)
5225 20:28:27.982559 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5226 20:28:27.985569 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5227 20:28:27.988723 CBFS @ 21000 size 3d4000
5228 20:28:27.995635 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5229 20:28:27.999019 CBFS: Locating 'fallback/bl31'
5230 20:28:28.002020 CBFS: Found @ offset 36dc0 size 5820
5231 20:28:28.013065 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5232 20:28:28.016107 Checking segment from ROM address 0x0000000040003a00
5233 20:28:28.022811 Checking segment from ROM address 0x0000000040003a1c
5234 20:28:28.026185 Loading segment from ROM address 0x0000000040003a00
5235 20:28:28.029506 code (compression=1)
5236 20:28:28.036043 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5237 20:28:28.046598 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5238 20:28:28.046707 using LZMA
5239 20:28:28.054655 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5240 20:28:28.061828 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5241 20:28:28.064966 Loading segment from ROM address 0x0000000040003a1c
5242 20:28:28.068024 Entry Point 0x0000000054601000
5243 20:28:28.068102 Loaded segments
5244 20:28:28.071083 NOTICE: MT8183 bl31_setup
5245 20:28:28.078747 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5246 20:28:28.081764 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5247 20:28:28.085253 INFO: [DEVAPC] dump DEVAPC registers:
5248 20:28:28.095131 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5249 20:28:28.101881 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5250 20:28:28.111915 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5251 20:28:28.118380 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5252 20:28:28.128380 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5253 20:28:28.135293 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5254 20:28:28.145029 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5255 20:28:28.151851 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5256 20:28:28.158506 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5257 20:28:28.168227 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5258 20:28:28.175252 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5259 20:28:28.184936 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5260 20:28:28.191741 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5261 20:28:28.198071 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5262 20:28:28.208578 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5263 20:28:28.215093 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5264 20:28:28.221896 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5265 20:28:28.228592 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5266 20:28:28.235369 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5267 20:28:28.245143 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5268 20:28:28.251976 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5269 20:28:28.258472 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5270 20:28:28.262045 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5271 20:28:28.265096 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5272 20:28:28.268382 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5273 20:28:28.271560 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5274 20:28:28.275326 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5275 20:28:28.281868 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5276 20:28:28.284768 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5277 20:28:28.288268 WARNING: region 0:
5278 20:28:28.291454 WARNING: apc:0x168, sa:0x0, ea:0xfff
5279 20:28:28.291615 WARNING: region 1:
5280 20:28:28.298301 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5281 20:28:28.298378 WARNING: region 2:
5282 20:28:28.301635 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5283 20:28:28.305007 WARNING: region 3:
5284 20:28:28.308401 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5285 20:28:28.308478 WARNING: region 4:
5286 20:28:28.311349 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5287 20:28:28.314973 WARNING: region 5:
5288 20:28:28.318398 WARNING: apc:0x0, sa:0x0, ea:0x0
5289 20:28:28.318480 WARNING: region 6:
5290 20:28:28.321451 WARNING: apc:0x0, sa:0x0, ea:0x0
5291 20:28:28.324793 WARNING: region 7:
5292 20:28:28.328124 WARNING: apc:0x0, sa:0x0, ea:0x0
5293 20:28:28.335015 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5294 20:28:28.337859 INFO: SPM: enable SPMC mode
5295 20:28:28.341440 NOTICE: spm_boot_init() start
5296 20:28:28.341522 NOTICE: spm_boot_init() end
5297 20:28:28.348263 INFO: BL31: Initializing runtime services
5298 20:28:28.351120 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5299 20:28:28.358107 INFO: BL31: Preparing for EL3 exit to normal world
5300 20:28:28.360981 INFO: Entry point address = 0x80000000
5301 20:28:28.361092 INFO: SPSR = 0x8
5302 20:28:28.384684
5303 20:28:28.384767
5304 20:28:28.384866
5305 20:28:28.385420 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5306 20:28:28.385518 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5307 20:28:28.385615 Setting prompt string to ['jacuzzi:']
5308 20:28:28.385697 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5309 20:28:28.388485 Starting depthcharge on Juniper...
5310 20:28:28.388576
5311 20:28:28.391703 vboot_handoff: creating legacy vboot_handoff structure
5312 20:28:28.391809
5313 20:28:28.394878 ec_init(0): CrosEC protocol v3 supported (544, 544)
5314 20:28:28.394950
5315 20:28:28.398539 Wipe memory regions:
5316 20:28:28.398638
5317 20:28:28.401794 [0x00000040000000, 0x00000054600000)
5318 20:28:28.444263
5319 20:28:28.444359 [0x00000054660000, 0x00000080000000)
5320 20:28:28.535845
5321 20:28:28.535953 [0x000000811994a0, 0x000000ffeda000)
5322 20:28:28.795948
5323 20:28:28.796096 [0x00000100000000, 0x00000140000000)
5324 20:28:28.928571
5325 20:28:28.932077 Initializing XHCI USB controller at 0x11200000.
5326 20:28:28.955570
5327 20:28:28.959028 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5328 20:28:28.959120
5329 20:28:28.959186
5330 20:28:28.959467 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5332 20:28:29.059796 jacuzzi: tftpboot 192.168.201.1 13828679/tftp-deploy-l3paoah5/kernel/image.itb 13828679/tftp-deploy-l3paoah5/kernel/cmdline
5333 20:28:29.059957 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5334 20:28:29.060043 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5335 20:28:29.064675 tftpboot 192.168.201.1 13828679/tftp-deploy-l3paoah5/kernel/image.itp-deploy-l3paoah5/kernel/cmdline
5336 20:28:29.064761
5337 20:28:29.064826 Waiting for link
5338 20:28:29.469070
5339 20:28:29.469219 R8152: Initializing
5340 20:28:29.469326
5341 20:28:29.472226 Version 9 (ocp_data = 6010)
5342 20:28:29.472307
5343 20:28:29.475742 R8152: Done initializing
5344 20:28:29.475824
5345 20:28:29.475887 Adding net device
5346 20:28:29.861715
5347 20:28:29.861864 done.
5348 20:28:29.861933
5349 20:28:29.861994 MAC: 00:e0:4c:71:a7:1f
5350 20:28:29.862053
5351 20:28:29.864142 Sending DHCP discover... done.
5352 20:28:29.864218
5353 20:28:29.867639 Waiting for reply... done.
5354 20:28:29.867723
5355 20:28:29.871314 Sending DHCP request... done.
5356 20:28:29.871398
5357 20:28:29.871464 Waiting for reply... done.
5358 20:28:29.871538
5359 20:28:29.874393 My ip is 192.168.201.23
5360 20:28:29.874477
5361 20:28:29.877705 The DHCP server ip is 192.168.201.1
5362 20:28:29.877789
5363 20:28:29.881175 TFTP server IP predefined by user: 192.168.201.1
5364 20:28:29.881269
5365 20:28:29.887746 Bootfile predefined by user: 13828679/tftp-deploy-l3paoah5/kernel/image.itb
5366 20:28:29.887831
5367 20:28:29.891275 Sending tftp read request... done.
5368 20:28:29.891357
5369 20:28:29.894408 Waiting for the transfer...
5370 20:28:29.894492
5371 20:28:30.150138 00000000 ################################################################
5372 20:28:30.150285
5373 20:28:30.409297 00080000 ################################################################
5374 20:28:30.409436
5375 20:28:30.666441 00100000 ################################################################
5376 20:28:30.666582
5377 20:28:30.929058 00180000 ################################################################
5378 20:28:30.929202
5379 20:28:31.182522 00200000 ################################################################
5380 20:28:31.182665
5381 20:28:31.438306 00280000 ################################################################
5382 20:28:31.438466
5383 20:28:31.692190 00300000 ################################################################
5384 20:28:31.692341
5385 20:28:31.945536 00380000 ################################################################
5386 20:28:31.945687
5387 20:28:32.205756 00400000 ################################################################
5388 20:28:32.205904
5389 20:28:32.462309 00480000 ################################################################
5390 20:28:32.462468
5391 20:28:32.718282 00500000 ################################################################
5392 20:28:32.718434
5393 20:28:32.971732 00580000 ################################################################
5394 20:28:32.971903
5395 20:28:33.223628 00600000 ################################################################
5396 20:28:33.223775
5397 20:28:33.476894 00680000 ################################################################
5398 20:28:33.477046
5399 20:28:33.727018 00700000 ################################################################
5400 20:28:33.727154
5401 20:28:33.982012 00780000 ################################################################
5402 20:28:33.982155
5403 20:28:34.233727 00800000 ################################################################
5404 20:28:34.233861
5405 20:28:34.484909 00880000 ################################################################
5406 20:28:34.485053
5407 20:28:34.733760 00900000 ################################################################
5408 20:28:34.733902
5409 20:28:34.988664 00980000 ################################################################
5410 20:28:34.988810
5411 20:28:35.242541 00a00000 ################################################################
5412 20:28:35.242712
5413 20:28:35.504646 00a80000 ################################################################
5414 20:28:35.504785
5415 20:28:35.759937 00b00000 ################################################################
5416 20:28:35.760115
5417 20:28:36.013472 00b80000 ################################################################
5418 20:28:36.013607
5419 20:28:36.270564 00c00000 ################################################################
5420 20:28:36.270734
5421 20:28:36.532462 00c80000 ################################################################
5422 20:28:36.532626
5423 20:28:36.785969 00d00000 ################################################################
5424 20:28:36.786102
5425 20:28:37.043465 00d80000 ################################################################
5426 20:28:37.043633
5427 20:28:37.307962 00e00000 ################################################################
5428 20:28:37.308093
5429 20:28:37.565012 00e80000 ################################################################
5430 20:28:37.565147
5431 20:28:37.834127 00f00000 ################################################################
5432 20:28:37.834262
5433 20:28:38.110210 00f80000 ################################################################
5434 20:28:38.110463
5435 20:28:38.367019 01000000 ################################################################
5436 20:28:38.367159
5437 20:28:38.618300 01080000 ################################################################
5438 20:28:38.618448
5439 20:28:38.871473 01100000 ################################################################
5440 20:28:38.871607
5441 20:28:39.148197 01180000 ################################################################
5442 20:28:39.148365
5443 20:28:39.432558 01200000 ################################################################
5444 20:28:39.432705
5445 20:28:39.721003 01280000 ################################################################
5446 20:28:39.721144
5447 20:28:40.003724 01300000 ################################################################
5448 20:28:40.003892
5449 20:28:40.290436 01380000 ################################################################
5450 20:28:40.290588
5451 20:28:40.573840 01400000 ################################################################
5452 20:28:40.573982
5453 20:28:40.831572 01480000 ################################################################
5454 20:28:40.831716
5455 20:28:41.093604 01500000 ################################################################
5456 20:28:41.093743
5457 20:28:41.353572 01580000 ################################################################
5458 20:28:41.353704
5459 20:28:41.614041 01600000 ################################################################
5460 20:28:41.614195
5461 20:28:41.872600 01680000 ################################################################
5462 20:28:41.872760
5463 20:28:42.143318 01700000 ################################################################
5464 20:28:42.143496
5465 20:28:42.398041 01780000 ################################################################
5466 20:28:42.398187
5467 20:28:42.659215 01800000 ################################################################
5468 20:28:42.659349
5469 20:28:42.917168 01880000 ################################################################
5470 20:28:42.917335
5471 20:28:43.174099 01900000 ################################################################
5472 20:28:43.174233
5473 20:28:43.427802 01980000 ################################################################
5474 20:28:43.427939
5475 20:28:43.687399 01a00000 ################################################################
5476 20:28:43.687531
5477 20:28:43.952170 01a80000 ################################################################
5478 20:28:43.952305
5479 20:28:44.217777 01b00000 ################################################################
5480 20:28:44.217908
5481 20:28:44.479797 01b80000 ################################################################
5482 20:28:44.479929
5483 20:28:44.739554 01c00000 ################################################################
5484 20:28:44.739694
5485 20:28:44.996380 01c80000 ################################################################
5486 20:28:44.996514
5487 20:28:45.251455 01d00000 ################################################################
5488 20:28:45.251586
5489 20:28:45.531506 01d80000 ################################################################
5490 20:28:45.531638
5491 20:28:45.824187 01e00000 ################################################################
5492 20:28:45.824320
5493 20:28:46.123971 01e80000 ################################################################
5494 20:28:46.124101
5495 20:28:46.433930 01f00000 ################################################################
5496 20:28:46.434073
5497 20:28:46.716880 01f80000 ################################################################
5498 20:28:46.717014
5499 20:28:46.998292 02000000 ################################################################
5500 20:28:46.998440
5501 20:28:47.284331 02080000 ################################################################
5502 20:28:47.284472
5503 20:28:47.568923 02100000 ################################################################
5504 20:28:47.569075
5505 20:28:47.829495 02180000 ################################################################
5506 20:28:47.829627
5507 20:28:48.099394 02200000 ################################################################
5508 20:28:48.099529
5509 20:28:48.225140 02280000 ############################ done.
5510 20:28:48.225311
5511 20:28:48.228535 The bootfile was 36399270 bytes long.
5512 20:28:48.228620
5513 20:28:48.232068 Sending tftp read request... done.
5514 20:28:48.232161
5515 20:28:48.234824 Waiting for the transfer...
5516 20:28:48.234910
5517 20:28:48.234975 00000000 # done.
5518 20:28:48.235038
5519 20:28:48.244992 Command line loaded dynamically from TFTP file: 13828679/tftp-deploy-l3paoah5/kernel/cmdline
5520 20:28:48.245117
5521 20:28:48.261924 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5522 20:28:48.262030
5523 20:28:48.262098 Loading FIT.
5524 20:28:48.262160
5525 20:28:48.265234 Image ramdisk-1 has 22849329 bytes.
5526 20:28:48.265342
5527 20:28:48.268232 Image fdt-1 has 58972 bytes.
5528 20:28:48.268319
5529 20:28:48.271815 Image kernel-1 has 13488920 bytes.
5530 20:28:48.271899
5531 20:28:48.278482 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5532 20:28:48.278569
5533 20:28:48.291600 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5534 20:28:48.291694
5535 20:28:48.298489 Choosing best match conf-1 for compat google,juniper-sku16.
5536 20:28:48.298577
5537 20:28:48.306085 Connected to device vid:did:rid of 1ae0:0028:00
5538 20:28:48.313683
5539 20:28:48.317131 tpm_get_response: command 0x17b, return code 0x0
5540 20:28:48.317244
5541 20:28:48.320242 tpm_cleanup: add release locality here.
5542 20:28:48.320326
5543 20:28:48.323706 Shutting down all USB controllers.
5544 20:28:48.323795
5545 20:28:48.327137 Removing current net device
5546 20:28:48.327218
5547 20:28:48.330582 Exiting depthcharge with code 4 at timestamp: 36344857
5548 20:28:48.330665
5549 20:28:48.333603 LZMA decompressing kernel-1 to 0x80193568
5550 20:28:48.333687
5551 20:28:48.340087 LZMA decompressing kernel-1 to 0x40000000
5552 20:28:50.269103
5553 20:28:50.269242 jumping to kernel
5554 20:28:50.269738 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
5555 20:28:50.269836 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5556 20:28:50.269916 Setting prompt string to ['Linux version [0-9]']
5557 20:28:50.269985 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5558 20:28:50.270054 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5559 20:28:50.343647
5560 20:28:50.346820 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5561 20:28:50.350530 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5562 20:28:50.350630 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5563 20:28:50.350704 Setting prompt string to []
5564 20:28:50.350783 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5565 20:28:50.350857 Using line separator: #'\n'#
5566 20:28:50.350917 No login prompt set.
5567 20:28:50.350977 Parsing kernel messages
5568 20:28:50.351032 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5569 20:28:50.351135 [login-action] Waiting for messages, (timeout 00:04:05)
5570 20:28:50.351203 Waiting using forced prompt support (timeout 00:02:02)
5571 20:28:50.370390 [ 0.000000] Linux version 6.6.30 (KernelCI@build-j196925-arm64-gcc-10-defconfig-arm64-chromebook-bfm5n) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed May 15 20:10:17 UTC 2024
5572 20:28:50.373807 [ 0.000000] KASLR enabled
5573 20:28:50.377128 [ 0.000000] random: crng init done
5574 20:28:50.380486 [ 0.000000] Machine model: Google juniper sku16 board
5575 20:28:50.383668 [ 0.000000] efi: UEFI not found.
5576 20:28:50.393527 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5577 20:28:50.400522 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5578 20:28:50.410288 [ 0.000000] OF: reserved mem: 0x0000000050000000..0x00000000528fffff (41984 KiB) nomap non-reusable memory@50000000
5579 20:28:50.420030 [ 0.000000] OF: reserved mem: 0x00000000ffedc000..0x00000000fffdbfff (1024 KiB) map non-reusable ramoops
5580 20:28:50.427142 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5581 20:28:50.433698 [ 0.000000] printk: bootconsole [mtk8250] enabled
5582 20:28:50.440946 [ 0.000000] NUMA: No NUMA configuration found
5583 20:28:50.447733 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5584 20:28:50.453756 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7be9c0-0x13f7c0fff]
5585 20:28:50.453841 [ 0.000000] Zone ranges:
5586 20:28:50.460570 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5587 20:28:50.463666 [ 0.000000] DMA32 empty
5588 20:28:50.470656 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5589 20:28:50.474224 [ 0.000000] Movable zone start for each node
5590 20:28:50.477021 [ 0.000000] Early memory node ranges
5591 20:28:50.484135 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5592 20:28:50.491118 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5593 20:28:50.497333 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5594 20:28:50.503723 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5595 20:28:50.510639 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5596 20:28:50.516720 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5597 20:28:50.534817 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5598 20:28:50.541016 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5599 20:28:50.547628 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000 on node -1
5600 20:28:50.554360 [ 0.000000] psci: probing for conduit method from DT.
5601 20:28:50.557914 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5602 20:28:50.561004 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5603 20:28:50.567806 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5604 20:28:50.570828 [ 0.000000] psci: SMC Calling Convention v1.1
5605 20:28:50.577530 [ 0.000000] percpu: Embedded 22 pages/cpu s51112 r8192 d30808 u90112
5606 20:28:50.580855 [ 0.000000] Detected VIPT I-cache on CPU0
5607 20:28:50.587271 [ 0.000000] CPU features: detected: GIC system register CPU interface
5608 20:28:50.594176 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5609 20:28:50.600609 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5610 20:28:50.607682 [ 0.000000] CPU features: detected: ARM erratum 845719
5611 20:28:50.610827 [ 0.000000] alternatives: applying boot alternatives
5612 20:28:50.630837 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5613 20:28:50.643897 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5614 20:28:50.651134 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5615 20:28:50.660599 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5616 20:28:50.664087 <6>[ 0.000000] Fallback order for Node 0: 0
5617 20:28:50.670622 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5618 20:28:50.674061 <6>[ 0.000000] Policy zone: Normal
5619 20:28:50.680637 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5620 20:28:50.683967 <6>[ 0.000000] software IO TLB: area num 8.
5621 20:28:50.710646 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5622 20:28:50.765561 <6>[ 0.000000] Memory: 3889584K/4191232K available (18432K kernel code, 4598K rwdata, 23556K rodata, 9984K init, 612K bss, 268880K reserved, 32768K cma-reserved)
5623 20:28:50.772040 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5624 20:28:50.778934 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5625 20:28:50.782049 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5626 20:28:50.788871 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5627 20:28:50.795599 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5628 20:28:50.799255 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5629 20:28:50.808939 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5630 20:28:50.815365 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5631 20:28:50.818595 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5632 20:28:50.830702 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5633 20:28:50.837610 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5634 20:28:50.840891 <6>[ 0.000000] GICv3: 640 SPIs implemented
5635 20:28:50.844207 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5636 20:28:50.847702 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5637 20:28:50.854621 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5638 20:28:50.861074 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5639 20:28:50.870599 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5640 20:28:50.884090 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5641 20:28:50.890761 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5642 20:28:50.902011 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5643 20:28:50.914746 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5644 20:28:50.921619 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5645 20:28:50.928396 <6>[ 0.009521] Console: colour dummy device 80x25
5646 20:28:50.932010 <6>[ 0.014195] printk: console [tty1] enabled
5647 20:28:50.941812 <6>[ 0.018956] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5648 20:28:50.948504 <6>[ 0.029421] pid_max: default: 32768 minimum: 301
5649 20:28:50.954985 <6>[ 0.034323] LSM: initializing lsm=capability,integrity
5650 20:28:50.961460 <6>[ 0.039756] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5651 20:28:50.968082 <6>[ 0.047381] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5652 20:28:50.979149 <6>[ 0.056657] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
5653 20:28:50.985711 <6>[ 0.063965] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1.
5654 20:28:50.992197 <6>[ 0.071861] rcu: Hierarchical SRCU implementation.
5655 20:28:50.995189 <6>[ 0.076884] rcu: Max phase no-delay instances is 1000.
5656 20:28:51.003886 <6>[ 0.084827] EFI services will not be available.
5657 20:28:51.006847 <6>[ 0.089771] smp: Bringing up secondary CPUs ...
5658 20:28:51.017662 <6>[ 0.095094] Detected VIPT I-cache on CPU1
5659 20:28:51.024416 <6>[ 0.095139] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5660 20:28:51.031155 <6>[ 0.095174] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5661 20:28:51.034281 <6>[ 0.095666] Detected VIPT I-cache on CPU2
5662 20:28:51.041060 <6>[ 0.095691] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5663 20:28:51.047304 <6>[ 0.095706] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5664 20:28:51.054086 <6>[ 0.096163] Detected VIPT I-cache on CPU3
5665 20:28:51.061212 <6>[ 0.096186] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5666 20:28:51.067570 <6>[ 0.096199] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5667 20:28:51.071083 <6>[ 0.096784] CPU features: detected: Spectre-v2
5668 20:28:51.077280 <6>[ 0.096794] CPU features: detected: Spectre-BHB
5669 20:28:51.080460 <6>[ 0.096798] CPU features: detected: ARM erratum 858921
5670 20:28:51.087298 <6>[ 0.096804] Detected VIPT I-cache on CPU4
5671 20:28:51.093784 <6>[ 0.096844] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5672 20:28:51.100904 <6>[ 0.096853] arch_timer: Enabling local workaround for ARM erratum 858921
5673 20:28:51.103789 <6>[ 0.096864] arch_timer: CPU4: Trapping CNTVCT access
5674 20:28:51.111013 <6>[ 0.096872] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5675 20:28:51.117292 <6>[ 0.097371] Detected VIPT I-cache on CPU5
5676 20:28:51.123949 <6>[ 0.097405] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5677 20:28:51.130847 <6>[ 0.097413] arch_timer: Enabling local workaround for ARM erratum 858921
5678 20:28:51.133802 <6>[ 0.097420] arch_timer: CPU5: Trapping CNTVCT access
5679 20:28:51.140896 <6>[ 0.097426] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5680 20:28:51.147414 <6>[ 0.097970] Detected VIPT I-cache on CPU6
5681 20:28:51.153975 <6>[ 0.098006] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5682 20:28:51.161202 <6>[ 0.098013] arch_timer: Enabling local workaround for ARM erratum 858921
5683 20:28:51.167325 <6>[ 0.098020] arch_timer: CPU6: Trapping CNTVCT access
5684 20:28:51.174201 <6>[ 0.098026] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5685 20:28:51.177478 <6>[ 0.098571] Detected VIPT I-cache on CPU7
5686 20:28:51.183671 <6>[ 0.098609] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5687 20:28:51.190417 <6>[ 0.098617] arch_timer: Enabling local workaround for ARM erratum 858921
5688 20:28:51.197254 <6>[ 0.098624] arch_timer: CPU7: Trapping CNTVCT access
5689 20:28:51.204056 <6>[ 0.098630] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5690 20:28:51.207501 <6>[ 0.098693] smp: Brought up 1 node, 8 CPUs
5691 20:28:51.210354 <6>[ 0.293388] SMP: Total of 8 processors activated.
5692 20:28:51.217428 <6>[ 0.298324] CPU features: detected: 32-bit EL0 Support
5693 20:28:51.224031 <6>[ 0.303694] CPU features: detected: 32-bit EL1 Support
5694 20:28:51.227025 <6>[ 0.309060] CPU features: detected: CRC32 instructions
5695 20:28:51.233665 <6>[ 0.314493] CPU: All CPU(s) started at EL2
5696 20:28:51.237291 <6>[ 0.318832] alternatives: applying system-wide alternatives
5697 20:28:51.245431 <6>[ 0.326685] devtmpfs: initialized
5698 20:28:51.258706 <6>[ 0.336224] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5699 20:28:51.268655 <6>[ 0.346174] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5700 20:28:51.271641 <6>[ 0.353819] pinctrl core: initialized pinctrl subsystem
5701 20:28:51.279755 <6>[ 0.360920] DMI not present or invalid.
5702 20:28:51.286385 <6>[ 0.365340] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5703 20:28:51.293328 <6>[ 0.372255] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5704 20:28:51.302875 <6>[ 0.379761] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5705 20:28:51.309703 <6>[ 0.387935] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5706 20:28:51.316411 <6>[ 0.396086] audit: initializing netlink subsys (disabled)
5707 20:28:51.322976 <5>[ 0.401803] audit: type=2000 audit(0.292:1): state=initialized audit_enabled=0 res=1
5708 20:28:51.329847 <6>[ 0.402938] thermal_sys: Registered thermal governor 'step_wise'
5709 20:28:51.336236 <6>[ 0.409751] thermal_sys: Registered thermal governor 'power_allocator'
5710 20:28:51.339745 <6>[ 0.416059] cpuidle: using governor menu
5711 20:28:51.346827 <6>[ 0.427109] NET: Registered PF_QIPCRTR protocol family
5712 20:28:51.353132 <6>[ 0.432623] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5713 20:28:51.359857 <6>[ 0.439729] ASID allocator initialised with 32768 entries
5714 20:28:51.366283 <6>[ 0.446791] Serial: AMBA PL011 UART driver
5715 20:28:51.394338 <6>[ 0.472300] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5716 20:28:51.411150 <6>[ 0.488936] Modules: 2G module region forced by RANDOMIZE_MODULE_REGION_FULL
5717 20:28:51.414803 <6>[ 0.496204] Modules: 0 pages in range for non-PLT usage
5718 20:28:51.421010 <6>[ 0.496207] Modules: 509952 pages in range for PLT usage
5719 20:28:51.427926 <6>[ 0.502071] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5720 20:28:51.434595 <6>[ 0.514594] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5721 20:28:51.441480 <6>[ 0.521070] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5722 20:28:51.447451 <6>[ 0.528060] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5723 20:28:51.454017 <6>[ 0.534534] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5724 20:28:51.460801 <6>[ 0.541524] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5725 20:28:51.467807 <6>[ 0.547997] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5726 20:28:51.474406 <6>[ 0.554987] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5727 20:28:51.481610 <6>[ 0.562633] ACPI: Interpreter disabled.
5728 20:28:51.488699 <6>[ 0.569868] iommu: Default domain type: Translated
5729 20:28:51.495347 <6>[ 0.574913] iommu: DMA domain TLB invalidation policy: strict mode
5730 20:28:51.498887 <5>[ 0.581510] SCSI subsystem initialized
5731 20:28:51.505629 <6>[ 0.585717] usbcore: registered new interface driver usbfs
5732 20:28:51.512510 <6>[ 0.591443] usbcore: registered new interface driver hub
5733 20:28:51.515327 <6>[ 0.596993] usbcore: registered new device driver usb
5734 20:28:51.522202 <6>[ 0.603311] pps_core: LinuxPPS API ver. 1 registered
5735 20:28:51.532430 <6>[ 0.608496] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5736 20:28:51.535410 <6>[ 0.617822] PTP clock support registered
5737 20:28:51.539010 <6>[ 0.622099] EDAC MC: Ver: 3.0.0
5738 20:28:51.545695 <6>[ 0.626096] scmi_core: SCMI protocol bus registered
5739 20:28:51.548894 <6>[ 0.632439] FPGA manager framework
5740 20:28:51.555357 <6>[ 0.636137] Advanced Linux Sound Architecture Driver Initialized.
5741 20:28:51.558946 <6>[ 0.643041] vgaarb: loaded
5742 20:28:51.565528 <6>[ 0.646267] clocksource: Switched to clocksource arch_sys_counter
5743 20:28:51.572017 <5>[ 0.652721] VFS: Disk quotas dquot_6.6.0
5744 20:28:51.578827 <6>[ 0.656892] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5745 20:28:51.581886 <6>[ 0.664071] pnp: PnP ACPI: disabled
5746 20:28:51.590270 <6>[ 0.670989] NET: Registered PF_INET protocol family
5747 20:28:51.596379 <6>[ 0.676221] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5748 20:28:51.608329 <6>[ 0.686139] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5749 20:28:51.618520 <6>[ 0.694886] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5750 20:28:51.625002 <6>[ 0.702836] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5751 20:28:51.631530 <6>[ 0.711068] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5752 20:28:51.638358 <6>[ 0.719168] TCP: Hash tables configured (established 32768 bind 32768)
5753 20:28:51.648488 <6>[ 0.725998] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5754 20:28:51.655314 <6>[ 0.732970] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5755 20:28:51.661775 <6>[ 0.740447] NET: Registered PF_UNIX/PF_LOCAL protocol family
5756 20:28:51.665179 <6>[ 0.746575] RPC: Registered named UNIX socket transport module.
5757 20:28:51.671621 <6>[ 0.752717] RPC: Registered udp transport module.
5758 20:28:51.675066 <6>[ 0.757643] RPC: Registered tcp transport module.
5759 20:28:51.681848 <6>[ 0.762570] RPC: Registered tcp-with-tls transport module.
5760 20:28:51.688282 <6>[ 0.768269] RPC: Registered tcp NFSv4.1 backchannel transport module.
5761 20:28:51.691428 <6>[ 0.774922] PCI: CLS 0 bytes, default 64
5762 20:28:51.698254 <6>[ 0.779187] Unpacking initramfs...
5763 20:28:51.701146 <6>[ 0.782933] kvm [1]: IPA Size Limit: 40 bits
5764 20:28:51.708516 <6>[ 0.789588] kvm [1]: vgic-v2@c420000
5765 20:28:51.712123 <6>[ 0.793415] kvm [1]: GIC system register CPU interface enabled
5766 20:28:51.718336 <6>[ 0.799481] kvm [1]: vgic interrupt IRQ18
5767 20:28:51.721629 <6>[ 0.803740] kvm [1]: Hyp mode initialized successfully
5768 20:28:51.729377 <5>[ 0.810048] Initialise system trusted keyrings
5769 20:28:51.735831 <6>[ 0.814821] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5770 20:28:51.742311 <6>[ 0.821718] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5771 20:28:51.745732 <5>[ 0.827948] NFS: Registering the id_resolver key type
5772 20:28:51.752079 <5>[ 0.833243] Key type id_resolver registered
5773 20:28:51.755564 <5>[ 0.837655] Key type id_legacy registered
5774 20:28:51.762569 <6>[ 0.841916] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5775 20:28:51.769228 <6>[ 0.848835] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5776 20:28:51.775336 <6>[ 0.856545] 9p: Installing v9fs 9p2000 file system support
5777 20:28:51.803712 <5>[ 0.884885] Key type asymmetric registered
5778 20:28:51.807004 <5>[ 0.889217] Asymmetric key parser 'x509' registered
5779 20:28:51.816990 <6>[ 0.894362] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5780 20:28:51.820282 <6>[ 0.901969] io scheduler mq-deadline registered
5781 20:28:51.823671 <6>[ 0.906724] io scheduler kyber registered
5782 20:28:51.830356 <6>[ 0.910993] io scheduler bfq registered
5783 20:28:51.849588 <6>[ 0.930868] EINJ: ACPI disabled.
5784 20:28:51.893343 <6>[ 0.974665] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5785 20:28:51.902455 <6>[ 0.983451] printk: console [ttyS0] disabled
5786 20:28:51.930382 <6>[ 1.008263] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 240, base_baud = 1625000) is a ST16650V2
5787 20:28:51.937712 <6>[ 1.017729] printk: console [ttyS0] enabled
5788 20:28:51.940497 <6>[ 1.017729] printk: console [ttyS0] enabled
5789 20:28:51.946991 <6>[ 1.026646] printk: bootconsole [mtk8250] disabled
5790 20:28:51.950114 <6>[ 1.026646] printk: bootconsole [mtk8250] disabled
5791 20:28:51.960654 <3>[ 1.038705] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5792 20:28:51.967420 <3>[ 1.047080] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5793 20:28:51.997792 <6>[ 1.075650] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 241, base_baud = 1625000) is a ST16650V2
5794 20:28:52.004768 <6>[ 1.085294] serial serial0: tty port ttyS1 registered
5795 20:28:52.011615 <6>[ 1.091809] SuperH (H)SCI(F) driver initialized
5796 20:28:52.014851 <6>[ 1.097323] msm_serial: driver initialized
5797 20:28:52.021437 <6>[ 1.102739] STM32 USART driver initialized
5798 20:28:52.034627 <6>[ 1.116057] loop: module loaded
5799 20:28:52.044174 <6>[ 1.125141] megasas: 07.725.01.00-rc1
5800 20:28:52.051015 <6>[ 1.129391] vsim1: Bringing 1800000uV into 2700000-2700000uV
5801 20:28:52.054044 <6>[ 1.134057] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5802 20:28:52.062577 <6>[ 1.143766] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5803 20:28:52.078428 <6>[ 1.159768] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5804 20:28:52.148290 <6>[ 1.221848] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5805 20:28:52.466549 <6>[ 1.547388] Freeing initrd memory: 22312K
5806 20:28:52.489892 <6>[ 1.570598] tun: Universal TUN/TAP device driver, 1.6
5807 20:28:52.492833 <6>[ 1.576847] thunder_xcv, ver 1.0
5808 20:28:52.496525 <6>[ 1.580377] thunder_bgx, ver 1.0
5809 20:28:52.499931 <6>[ 1.583881] nicpf, ver 1.0
5810 20:28:52.510204 <6>[ 1.588058] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5811 20:28:52.513651 <6>[ 1.595541] hns3: Copyright (c) 2017 Huawei Corporation.
5812 20:28:52.517012 <6>[ 1.601131] hclge is initializing
5813 20:28:52.523996 <6>[ 1.604740] e1000: Intel(R) PRO/1000 Network Driver
5814 20:28:52.530211 <6>[ 1.609877] e1000: Copyright (c) 1999-2006 Intel Corporation.
5815 20:28:52.533846 <6>[ 1.615899] e1000e: Intel(R) PRO/1000 Network Driver
5816 20:28:52.540299 <6>[ 1.621122] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5817 20:28:52.547390 <6>[ 1.627315] igb: Intel(R) Gigabit Ethernet Network Driver
5818 20:28:52.553632 <6>[ 1.632991] igb: Copyright (c) 2007-2014 Intel Corporation.
5819 20:28:52.560266 <6>[ 1.638865] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5820 20:28:52.567391 <6>[ 1.645391] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5821 20:28:52.570215 <6>[ 1.652034] sky2: driver version 1.30
5822 20:28:52.577362 <6>[ 1.657430] usbcore: registered new device driver r8152-cfgselector
5823 20:28:52.583919 <6>[ 1.663969] usbcore: registered new interface driver r8152
5824 20:28:52.590848 <6>[ 1.669961] VFIO - User Level meta-driver version: 0.3
5825 20:28:52.597370 <6>[ 1.677609] mtu3 11201000.usb: uwk - reg:0x420, version:101
5826 20:28:52.604058 <4>[ 1.683482] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5827 20:28:52.610198 <6>[ 1.690770] mtu3 11201000.usb: dr_mode: 1, drd: auto
5828 20:28:52.616874 <6>[ 1.695996] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5829 20:28:52.620480 <6>[ 1.702180] mtu3 11201000.usb: usb3-drd: 0
5830 20:28:52.630534 <6>[ 1.707829] mtu3 11201000.usb: xHCI platform device register success...
5831 20:28:52.636845 <4>[ 1.716233] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5832 20:28:52.643234 <6>[ 1.724288] xhci-mtk 11200000.usb: xHCI Host Controller
5833 20:28:52.650242 <6>[ 1.729791] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5834 20:28:52.656781 <6>[ 1.737508] xhci-mtk 11200000.usb: USB3 root hub has no ports
5835 20:28:52.666846 <6>[ 1.743515] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000200010
5836 20:28:52.673560 <6>[ 1.752943] xhci-mtk 11200000.usb: irq 251, io mem 0x11200000
5837 20:28:52.676975 <6>[ 1.759375] hub 1-0:1.0: USB hub found
5838 20:28:52.680575 <6>[ 1.763404] hub 1-0:1.0: 1 port detected
5839 20:28:52.688318 <6>[ 1.769020] usbcore: registered new interface driver usb-storage
5840 20:28:52.694670 <6>[ 1.775614] usbcore: registered new device driver onboard-usb-hub
5841 20:28:52.704722 <4>[ 1.782350] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5842 20:28:52.713565 <6>[ 1.794628] mt6397-rtc mt6358-rtc: registered as rtc0
5843 20:28:52.723480 <6>[ 1.800107] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-15T20:28:52 UTC (1715804932)
5844 20:28:52.727021 <6>[ 1.810023] i2c_dev: i2c /dev entries driver
5845 20:28:52.738950 <6>[ 1.816546] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5846 20:28:52.748995 <6>[ 1.825468] i2c 4-0058: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58/aux-bus/panel
5847 20:28:52.755498 <6>[ 1.834617] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5848 20:28:52.765218 <3>[ 1.842158] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5849 20:28:52.781191 <6>[ 1.859189] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
5850 20:28:52.790105 <6>[ 1.871101] cpu cpu0: EM: created perf domain
5851 20:28:52.800362 <6>[ 1.876165] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5852 20:28:52.806881 <6>[ 1.887452] cpu cpu4: EM: created perf domain
5853 20:28:52.813365 <6>[ 1.894500] sdhci: Secure Digital Host Controller Interface driver
5854 20:28:52.820409 <6>[ 1.900947] sdhci: Copyright(c) Pierre Ossman
5855 20:28:52.826645 <6>[ 1.906302] Synopsys Designware Multimedia Card Interface Driver
5856 20:28:52.833873 <6>[ 1.906567] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5857 20:28:52.836652 <6>[ 1.913391] sdhci-pltfm: SDHCI platform and OF driver helper
5858 20:28:52.845089 <6>[ 1.926220] ledtrig-cpu: registered to indicate activity on CPUs
5859 20:28:52.853208 <6>[ 1.934094] usbcore: registered new interface driver usbhid
5860 20:28:52.856428 <6>[ 1.939952] usbhid: USB HID core driver
5861 20:28:52.864222 <6>[ 1.944382] spi_master spi2: will run message pump with realtime priority
5862 20:28:52.871991 <4>[ 1.944384] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5863 20:28:52.878530 <4>[ 1.958727] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5864 20:28:52.888667 <6>[ 1.959347] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5865 20:28:52.898637 <6>[ 1.976128] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5866 20:28:52.911893 <6>[ 1.989485] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5867 20:28:52.918593 <4>[ 1.990579] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5868 20:28:52.932372 <6>[ 1.992945] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5869 20:28:52.945881 <6>[ 2.001211] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5870 20:28:52.955912 <6>[ 2.001638] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5871 20:28:52.963211 <6>[ 2.002558] NET: Registered PF_PACKET protocol family
5872 20:28:52.966467 <6>[ 2.002599] 9pnet: Installing 9P2000 support
5873 20:28:52.969278 <5>[ 2.002628] Key type dns_resolver registered
5874 20:28:52.976389 <6>[ 2.006590] registered taskstats version 1
5875 20:28:52.983220 <4>[ 2.013745] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5876 20:28:52.989793 <4>[ 2.017654] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5877 20:28:52.995795 <4>[ 2.018288] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5878 20:28:53.002614 <6>[ 2.021938] cros-ec-spi spi2.0: Chrome EC device registered
5879 20:28:53.006007 <5>[ 2.031939] Loading compiled-in X.509 certificates
5880 20:28:53.013391 <6>[ 2.036856] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5881 20:28:53.019355 <6>[ 2.037341] mmc0: new HS400 MMC card at address 0001
5882 20:28:53.022637 <6>[ 2.038201] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5883 20:28:53.029157 <6>[ 2.042198] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5884 20:28:53.036260 <6>[ 2.045378] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5885 20:28:53.042644 <6>[ 2.046872] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5886 20:28:53.049566 <3>[ 2.064425] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5887 20:28:53.055948 <6>[ 2.070053] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5888 20:28:53.065966 <6>[ 2.096058] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5889 20:28:53.072825 <6>[ 2.100707] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5890 20:28:53.079580 <3>[ 2.111549] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5891 20:28:53.092949 <6>[ 2.114599] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5892 20:28:53.103066 <6>[ 2.115146] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5893 20:28:53.109407 <6>[ 2.186370] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5894 20:28:53.126001 <6>[ 2.199736] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5895 20:28:53.140084 <3>[ 2.217566] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5896 20:28:53.146653 <6>[ 2.226511] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
5897 20:28:53.157684 <6>[ 2.235348] input: volume-buttons as /devices/platform/volume-buttons/input/input5
5898 20:28:53.172469 <6>[ 2.247021] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5899 20:28:53.188276 <3>[ 2.265278] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5900 20:28:53.267565 <6>[ 2.348166] hub 1-1:1.0: USB hub found
5901 20:28:53.270499 <6>[ 2.352851] hub 1-1:1.0: 3 ports detected
5902 20:28:53.290367 <6>[ 2.364853] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5903 20:28:53.306640 <3>[ 2.384275] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5904 20:28:53.569410 <6>[ 2.646754] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
5905 20:28:53.773930 <6>[ 2.851642] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
5906 20:28:53.925199 <4>[ 3.002861] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
5907 20:28:53.935276 <4>[ 3.012127] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
5908 20:28:53.999779 <6>[ 3.080141] r8152 1-1.2:1.0 eth0: v1.12.13
5909 20:28:54.023658 <6>[ 3.097936] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5910 20:28:54.048432 <3>[ 3.125899] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5911 20:28:54.092826 <6>[ 3.170595] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
5912 20:28:54.232290 <6>[ 3.306516] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5913 20:28:54.256199 <3>[ 3.333896] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5914 20:28:55.614629 <6>[ 4.695460] r8152 1-1.2:1.0 eth0: carrier on
5915 20:28:57.785724 <5>[ 4.722642] Sending DHCP requests .., OK
5916 20:28:57.792774 <6>[ 6.871079] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
5917 20:28:57.796125 <6>[ 6.879393] IP-Config: Complete:
5918 20:28:57.806370 <6>[ 6.882900] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
5919 20:28:57.816201 <6>[ 6.893630] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
5920 20:28:57.826141 <6>[ 6.902960] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
5921 20:28:57.829292 <6>[ 6.902969] nameserver0=192.168.201.1
5922 20:28:57.833172 <6>[ 6.915193] clk: Disabling unused clocks
5923 20:28:57.836174 <6>[ 6.920122] ALSA device list:
5924 20:28:57.839812 <6>[ 6.923374] No soundcards found.
5925 20:28:57.851082 <6>[ 6.931781] Freeing unused kernel memory: 9984K
5926 20:28:57.854107 <6>[ 6.936796] Run /init as init process
5927 20:28:57.892632 Starting syslogd: OK
5928 20:28:57.896328 Starting klogd: OK
5929 20:28:57.905725 Running sysctl: OK
5930 20:28:57.912360 Populating /dev using udev: <30>[ 6.994853] udevd[168]: starting version 3.2.9
5931 20:28:57.922187 <27>[ 7.002745] udevd[168]: specified user 'tss' unknown
5932 20:28:57.928836 <27>[ 7.008296] udevd[168]: specified group 'tss' unknown
5933 20:28:57.932036 <30>[ 7.014702] udevd[169]: starting eudev-3.2.9
5934 20:28:57.969880 <27>[ 7.050829] udevd[169]: specified user 'tss' unknown
5935 20:28:57.976576 <27>[ 7.056273] udevd[169]: specified group 'tss' unknown
5936 20:28:58.144847 <3>[ 7.225568] mtk-scp 10500000.scp: invalid resource (null)
5937 20:28:58.154763 <6>[ 7.231384] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
5938 20:28:58.168061 <6>[ 7.241681] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5939 20:28:58.171375 <6>[ 7.242389] remoteproc remoteproc0: scp is available
5940 20:28:58.178050 <6>[ 7.257893] remoteproc remoteproc0: powering up scp
5941 20:28:58.184726 <6>[ 7.263097] remoteproc remoteproc0: Booting fw image mediatek/mt8183/scp.img, size 1030776
5942 20:28:58.191252 <6>[ 7.271660] mtk-scp 10500000.scp: IPI buf addr 0x0007bdb0
5943 20:28:58.197740 <4>[ 7.277642] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
5944 20:28:58.213085 <3>[ 7.290357] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5945 20:28:58.222976 <3>[ 7.291260] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
5946 20:28:58.226132 <6>[ 7.302251] mc: Linux media interface: v0.10
5947 20:28:58.232848 <4>[ 7.304095] elants_i2c 0-0010: supply vccio not found, using dummy regulator
5948 20:28:58.246091 <6>[ 7.305484] input: mtk-pmic-keys as /devices/platform/soc/1000d000.pwrap/1000d000.pwrap:pmic/mt6358-keys/input/input6
5949 20:28:58.249247 <3>[ 7.307397] thermal_sys: Failed to find 'trips' node
5950 20:28:58.256301 <3>[ 7.307405] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
5951 20:28:58.266487 <3>[ 7.307413] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
5952 20:28:58.273134 <4>[ 7.307418] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
5953 20:28:58.279780 <3>[ 7.308293] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
5954 20:28:58.286831 <3>[ 7.310372] thermal_sys: Failed to find 'trips' node
5955 20:28:58.293078 <3>[ 7.310380] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
5956 20:28:58.299865 <3>[ 7.310389] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
5957 20:28:58.309858 <4>[ 7.310393] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
5958 20:28:58.316647 <3>[ 7.314734] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5959 20:28:58.330076 <3>[ 7.320187] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
5960 20:28:58.336827 <3>[ 7.331291] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5961 20:28:58.343688 <6>[ 7.335285] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
5962 20:28:58.353502 <3>[ 7.336265] elan_i2c 2-0015: Error applying setting, reverse things back
5963 20:28:58.363461 <6>[ 7.341618] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5964 20:28:58.370029 <3>[ 7.343898] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5965 20:28:58.380155 <5>[ 7.361072] cfg80211: Loading compiled-in X.509 certificates for regulatory database
5966 20:28:58.386728 <3>[ 7.362666] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5967 20:28:58.396956 <6>[ 7.364525] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/ovl@14008000
5968 20:28:58.403904 <6>[ 7.364570] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/ovl@14009000
5969 20:28:58.413571 <6>[ 7.364596] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/ovl@1400a000
5970 20:28:58.420306 <6>[ 7.364624] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/rdma@1400b000
5971 20:28:58.430798 <6>[ 7.364650] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/rdma@1400c000
5972 20:28:58.440363 <6>[ 7.364685] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/color@1400e000
5973 20:28:58.446901 <6>[ 7.364711] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/ccorr@1400f000
5974 20:28:58.456963 <6>[ 7.364742] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/aal@14010000
5975 20:28:58.463909 <6>[ 7.364770] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/gamma@14011000
5976 20:28:58.473692 <6>[ 7.364861] mediatek-drm mediatek-drm.9.auto: Adding component match for /soc/dsi@14014000
5977 20:28:58.480602 <3>[ 7.366550] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5978 20:28:58.489999 <4>[ 7.376264] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
5979 20:28:58.500437 <3>[ 7.379025] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5980 20:28:58.510458 <6>[ 7.387989] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
5981 20:28:58.520247 <3>[ 7.395020] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5982 20:28:58.526962 <3>[ 7.395030] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5983 20:28:58.533657 <5>[ 7.398929] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
5984 20:28:58.540543 <5>[ 7.399404] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
5985 20:28:58.550223 <4>[ 7.399513] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
5986 20:28:58.553649 <6>[ 7.399521] cfg80211: failed to load regulatory.db
5987 20:28:58.566626 <6>[ 7.408144] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5988 20:28:58.573486 <3>[ 7.414488] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5989 20:28:58.583295 <3>[ 7.414495] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5990 20:28:58.590161 <3>[ 7.414541] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5991 20:28:58.603055 <3>[ 7.423371] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
5992 20:28:58.610527 <3>[ 7.430756] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5993 20:28:58.621872 <6>[ 7.433547] mtk-scp 10500000.scp: SCP is ready. FW version kukui_scp_v2.0.13324-280b9fce97
5994 20:28:58.628549 <6>[ 7.433565] mtk-scp 10500000.scp: creating channel cros-ec-rpmsg addr 0xd
5995 20:28:58.638788 <6>[ 7.460972] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input8
5996 20:28:58.644878 <6>[ 7.465146] remoteproc remoteproc0: remote processor scp is now up
5997 20:28:58.648745 <6>[ 7.533893] videodev: Linux video capture interface: v2.00
5998 20:28:58.655191 <6>[ 7.560333] cs_system_cfg: CoreSight Configuration manager initialised
5999 20:28:58.658921 <6>[ 7.614288] Bluetooth: Core ver 2.22
6000 20:28:58.668551 <6>[ 7.677218] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6001 20:28:58.675440 <6>[ 7.689792] NET: Registered PF_BLUETOOTH protocol family
6002 20:28:58.681761 <6>[ 7.690742] cros-ec-dev cros-ec-dev.10.auto: CrOS System Control Processor MCU detected
6003 20:28:58.688454 <6>[ 7.692915] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6004 20:28:58.695299 <6>[ 7.693894] cros-ec-rpmsg 10500000.scp.cros-ec-rpmsg.13.-1: Chrome EC device registered
6005 20:28:58.705307 <4>[ 7.695188] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6006 20:28:58.711665 <4>[ 7.695188] Fallback method does not support PEC.
6007 20:28:58.718394 <3>[ 7.697701] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6008 20:28:58.727952 <6>[ 7.698365] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6009 20:28:58.734695 <3>[ 7.703834] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6010 20:28:58.741369 <6>[ 7.706676] Bluetooth: HCI device and connection manager initialized
6011 20:28:58.748212 <6>[ 7.706689] Bluetooth: HCI socket layer initialized
6012 20:28:58.751383 <6>[ 7.711666] usbcore: registered new interface driver uvcvideo
6013 20:28:58.761589 <6>[ 7.713931] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6014 20:28:58.764643 <6>[ 7.723202] Bluetooth: L2CAP socket layer initialized
6015 20:28:58.774609 <6>[ 7.729641] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6016 20:28:58.777504 <6>[ 7.735244] Bluetooth: SCO socket layer initialized
6017 20:28:58.791252 <3>[ 7.735855] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6018 20:28:58.797799 <3>[ 7.736700] debugfs: File 'Playback' in directory 'dapm' already present!
6019 20:28:58.804031 <3>[ 7.736707] debugfs: File 'Capture' in directory 'dapm' already present!
6020 20:28:58.814227 <6>[ 7.738721] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6021 20:28:58.824279 <6>[ 7.742109] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6022 20:28:58.830814 <6>[ 7.742127] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6023 20:28:58.840647 <6>[ 7.742132] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6024 20:28:58.850732 <6>[ 7.742137] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6025 20:28:58.857533 <6>[ 7.742142] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6026 20:28:58.867600 <6>[ 7.742248] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6027 20:28:58.877171 <6>[ 7.743519] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6028 20:28:58.883974 <6>[ 7.743525] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6029 20:28:58.893790 <6>[ 7.743611] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6030 20:28:58.903686 <6>[ 7.746000] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6031 20:28:58.910454 <6>[ 7.753983] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6032 20:28:58.921135 <6>[ 7.759603] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6033 20:28:58.927944 <6>[ 7.767731] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6034 20:28:58.934714 <6>[ 7.774286] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6035 20:28:58.941133 <6>[ 7.783403] panfrost 13040000.gpu: clock rate = 511999970
6036 20:28:58.947835 <6>[ 7.838532] Bluetooth: HCI UART driver ver 2.3
6037 20:28:58.954484 <6>[ 7.848264] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6038 20:28:58.961053 <6>[ 7.851538] Bluetooth: HCI UART protocol H4 registered
6039 20:28:58.964483 <6>[ 7.851582] Bluetooth: HCI UART protocol LL registered
6040 20:28:58.974648 <6>[ 7.859460] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6041 20:28:58.981039 <6>[ 7.864616] Bluetooth: HCI UART protocol Three-wire (H5) registered
6042 20:28:58.990813 <6>[ 7.876404] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6043 20:28:58.997555 <6>[ 7.883795] Bluetooth: HCI UART protocol Broadcom registered
6044 20:28:59.004504 <6>[ 7.890401] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6045 20:28:59.010883 <6>[ 7.893023] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6046 20:28:59.020609 <6>[ 7.893138] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6047 20:28:59.024217 <6>[ 7.901148] Bluetooth: HCI UART protocol QCA registered
6048 20:28:59.031061 <6>[ 7.902011] Bluetooth: hci0: setting up ROME/QCA6390
6049 20:28:59.031144 done
6050 20:28:59.037362 <6>[ 8.084958] panel-simple-dp-aux aux-4-0058: Detected AUO B116XAB01.4 (0x145c)
6051 20:28:59.044485 <6>[ 8.090651] Bluetooth: HCI UART protocol Marvell registered
6052 20:28:59.050730 Saving random se<6>[ 8.099820] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6053 20:28:59.057812 ed: <3>[ 8.113503] Bluetooth: hci0: Frame reassembly failed (-84)
6054 20:28:59.064131 <6>[ 8.118409] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6055 20:28:59.064213 OK
6056 20:28:59.071865 <6>[ 8.152667] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6057 20:28:59.081507 Starting network: <6>[ 8.160717] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6058 20:28:59.091706 ip: RTNETLINK answers: File exis<6>[ 8.169000] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6059 20:28:59.091795 ts
6060 20:28:59.091863 FAIL
6061 20:28:59.102220 <6>[ 8.177391] mediatek-drm mediatek-drm.9.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops [mediatek_drm])
6062 20:28:59.111995 <6>[ 8.188249] mediatek-drm mediatek-drm.9.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops [mediatek_drm])
6063 20:28:59.121548 <6>[ 8.198696] mediatek-drm mediatek-drm.9.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops [mediatek_drm])
6064 20:28:59.135046 <6>[ 8.209142] mediatek-drm mediatek-drm.9.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops [mediatek_drm])
6065 20:28:59.144776 <6>[ 8.219758] mediatek-drm mediatek-drm.9.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops [mediatek_drm])
6066 20:28:59.158244 Starting dropbea<6>[ 8.230373] mediatek-drm mediatek-drm.9.auto: bound 1400e000.color (ops mtk_disp_color_component_ops [mediatek_drm])
6067 20:28:59.167995 r sshd: <6>[ 8.242550] mediatek-drm mediatek-drm.9.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops [mediatek_drm])
6068 20:28:59.178175 <6>[ 8.254005] mediatek-drm mediatek-drm.9.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops [mediatek_drm])
6069 20:28:59.187925 <6>[ 8.256414] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6070 20:28:59.197911 <6>[ 8.264443] mediatek-drm mediatek-drm.9.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops [mediatek_drm])
6071 20:28:59.204754 <6>[ 8.285873] NET: Registered PF_INET6 protocol family
6072 20:28:59.214713 <6>[ 8.286534] mediatek-drm mediatek-drm.9.auto: bound 14014000.dsi (ops mtk_dsi_component_ops [mediatek_drm])
6073 20:28:59.218870 <6>[ 8.292498] Segment Routing with IPv6
6074 20:28:59.227812 <6>[ 8.301158] mediatek-drm mediatek-drm.9.auto: Not creating crtc 1 because component 10 is disabled or missing
6075 20:28:59.234642 <6>[ 8.305124] In-situ OAM (IOAM) with IPv6
6076 20:28:59.241400 <6>[ 8.317198] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.9.auto on minor 1
6077 20:28:59.241483 OK
6078 20:28:59.252659 /bin/sh: can't access tty; job control turned off
6079 20:28:59.253000 Matched prompt #10: / #
6081 20:28:59.253199 Setting prompt string to ['/ #']
6082 20:28:59.253330 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6084 20:28:59.253525 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6085 20:28:59.253611 start: 2.2.6 expect-shell-connection (timeout 00:03:56) [common]
6086 20:28:59.253682 Setting prompt string to ['/ #']
6087 20:28:59.253741 Forcing a shell prompt, looking for ['/ #']
6089 20:28:59.303956 / #
6090 20:28:59.304077 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6091 20:28:59.304150 Waiting using forced prompt support (timeout 00:02:30)
6092 20:28:59.304247 <4>[ 8.350173] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6093 20:28:59.304312 <4>[ 8.364990] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6094 20:28:59.304371 <4>[ 8.375778] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6095 20:28:59.304684 <4>[ 8.384608] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6096 20:28:59.345423
6097 20:28:59.345511 / # <6>[ 8.396480] Bluetooth: hci0: QCA Product ID :0x00000008
6098 20:28:59.345577 <6>[ 8.402208] Bluetooth: hci0: QCA SOC Version :0x00000044
6099 20:28:59.345637 <6>[ 8.407903] Bluetooth: hci0: QCA ROM Version :0x00000302
6100 20:28:59.345695 <6>[ 8.413575] Bluetooth: hci0: QCA Patch Version:0x00000111
6101 20:28:59.345751 <6>[ 8.419262] Bluetooth: hci0: QCA controller version 0x00440302
6102 20:28:59.346006 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6103 20:28:59.346143 start: 2.2.7 export-device-env (timeout 00:03:56) [common]
6104 20:28:59.346319 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6105 20:28:59.346434 end: 2.2 depthcharge-retry (duration 00:01:04) [common]
6106 20:28:59.346545 end: 2 depthcharge-action (duration 00:01:04) [common]
6107 20:28:59.346658 start: 3 lava-test-retry (timeout 00:01:00) [common]
6108 20:28:59.346774 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6109 20:28:59.346875 Using namespace: common
6111 20:28:59.447261 <6>[ 8.425376] #
6112 20:28:59.447401 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6113 20:28:59.447514 Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6114 20:28:59.447581 <4>[ 8.432287] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6115 20:28:59.447643 <3>[ 8.441650] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6116 20:28:59.447705 <3>[ 8.449968] Bluetooth: hci0: QCA Failed to download patch (-2)
6117 20:28:59.453215 #
6118 20:28:59.453495 Using /lava-13828679
6120 20:28:59.553826 / # export SHELL=/bin/sh
6121 20:28:59.559762 export SHELL=/bin/sh
6123 20:28:59.660253 / # . /lava-13828679/environment
6124 20:28:59.660452 <3>[ 8.515767] Bluetooth: hci0: Frame reassembly failed (-84)
6125 20:28:59.660539 <4>[ 8.516130] Bluetooth: hci0: Received unexpected HCI Event 0x00
6126 20:28:59.660615 <6>[ 8.631621] Console: switching to colour frame buffer device 170x48
6127 20:28:59.660686 <6>[ 8.676050] mediatek-drm mediatek-drm.9.auto: [drm] fb0: mediatekdrmfb frame buffer device
6128 20:28:59.660744 . /lava-13828679/environment<3>[ 8.703371] anx7625 4-0058: Failed to create device link (0x180) with backlight_lcd0
6129 20:28:59.660836 <6>[ 8.716968] mtk-svs 1100b000.svs: M_HW_RES0: 0x00120090
6130 20:28:59.660916 <6>[ 8.723021] mtk-svs 1100b000.svs: M_HW_RES1: 0xe2febf1f
6131 20:28:59.661022 <6>[ 8.728649] mtk-svs 1100b000.svs: M_HW_RES2: 0x478f47cb
6132 20:28:59.661095 <6>[ 8.734577] mtk-svs 1100b000.svs: M_HW_RES3: 0xa6fdfb5b
6133 20:28:59.661149 <6>[ 8.740401] mtk-svs 1100b000.svs: M_HW_RES4: 0xe2fea4e8
6134 20:28:59.705413 <6>[ 8.746200] mtk-svs 1100b000.svs: M_HW_RES5: 0x47b84bc1
6135 20:28:59.705509 <6>[ 8.752014] mtk-svs 1100b000.svs: M_HW_RES6: 0xe2fec1ed
6136 20:28:59.705575
6137 20:28:59.705635 <6>[ 8.757754] mtk-svs 1100b000.svs: M_HW_RES7: 0xe2fe6833
6138 20:28:59.705692 / # <6>[ 8.763498] mtk-svs 1100b000.svs: M_HW_RES8: 0x4bb84be7
6139 20:28:59.705749 <6>[ 8.769410] mtk-svs 1100b000.svs: M_HW_RES9: 0xa6fd0d6a
6140 20:28:59.705813 <6>[ 8.775103] mtk-svs 1100b000.svs: M_HW_RES14: 0x9e8e2d7e
6141 20:28:59.705924 <6>[ 8.780870] mtk-svs 1100b000.svs: M_HW_RES15: 0x01460015
6143 20:28:59.806440 <6>/lava-13828679/bin/lava-test-runner /lava-13828679/0
6144 20:28:59.806575 Test shell timeout: 10s (minimum of the action and connection timeout)
6145 20:28:59.806902 [ 8.786642] mtk-svs 1100b000.svs: M_HW_RES16: 0xe2fe8e1b
6146 20:28:59.806978 <6>[ 8.792338] mtk-svs 1100b000.svs: M_HW_RES17: 0x47b847e7
6147 20:28:59.807042 <6>[ 8.798175] mtk-svs 1100b000.svs: M_HW_RES18: 0xa6fdc140
6148 20:28:59.807101 <3>[ 8.804228] SVSB_GPU: cannot get "tzts2" thermal zone
6149 20:28:59.807159 <3>[ 8.809777] mtk-svs 1100b000.svs: svs bank resource setup fail: -19
6150 20:28:59.807216 <6>[ 8.817999] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6151 20:28:59.807272 <6>[ 8.825859] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6152 20:28:59.807327 <6>[ 8.827320] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6153 20:28:59.807381 <6>[ 8.845970] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6154 20:28:59.807435 /lava-138<4>[ 8.854846] ttyS ttyS0: 1 input overrun(s)
6155 20:28:59.812536 28679/bin/lava-test-runner /lav
6156 20:28:59.853479 /lava-13828679/bin/lava-test-runner: .: line 18: can't open '/lav/../bin/lava-common-functions': No such file or directory
6157 20:29:01.458028 / # <3>[ 10.538758] Bluetooth: hci0: command 0x1002 tx timeout
6158 20:29:01.467585 <3>[ 10.538758] Bluetooth: hci0: Opcode 0x1002 failed: -110
6159 20:29:28.880622 <6>[ 37.963255] vaux18: disabling
6160 20:29:28.891303 <6>[ 37.974499] vio28: disabling
6162 20:29:59.347020 end: 3.1 lava-test-shell (duration 00:01:00) [common]
6164 20:29:59.347305 lava-test-retry failed: 1 of 5 attempts. 'lava-test-shell timed out after 60 seconds'
6166 20:29:59.347510 end: 3 lava-test-retry (duration 00:01:00) [common]
6168 20:29:59.347854 Cleaning after the job
6169 20:29:59.347966 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/ramdisk
6170 20:29:59.350580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/kernel
6171 20:29:59.361911 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/dtb
6172 20:29:59.362079 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13828679/tftp-deploy-l3paoah5/modules
6173 20:29:59.368347 start: 4.1 power-off (timeout 00:00:30) [common]
6174 20:29:59.368522 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6175 20:30:00.768670 >> Command sent successfully.
6176 20:30:00.771101 Returned 0 in 1 seconds
6177 20:30:00.871493 end: 4.1 power-off (duration 00:00:02) [common]
6179 20:30:00.871852 start: 4.2 read-feedback (timeout 00:09:58) [common]
6180 20:30:00.872157 Listened to connection for namespace 'common' for up to 1s
6181 20:30:01.873092 Finalising connection for namespace 'common'
6182 20:30:01.873265 Disconnecting from shell: Finalise
6183 20:30:01.973663 end: 4.2 read-feedback (duration 00:00:01) [common]
6184 20:30:01.973806 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13828679
6185 20:30:02.016909 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13828679
6186 20:30:02.017085 TestError: A test failed to run, look at the error message.