Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:31:05.362757 lava-dispatcher, installed at version: 2024.01
2 19:31:05.363611 start: 0 validate
3 19:31:05.364140 Start time: 2024-11-05 19:31:05.364105+00:00 (UTC)
4 19:31:05.364777 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:31:05.365350 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 19:31:05.412514 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:31:05.413374 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fardb%2Ffor-kernelci%2Fv6.12-rc1-122-g309bfa414d7e4%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:31:05.449556 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:31:05.450302 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fardb%2Ffor-kernelci%2Fv6.12-rc1-122-g309bfa414d7e4%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 19:31:05.485793 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:31:05.486335 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fardb%2Ffor-kernelci%2Fv6.12-rc1-122-g309bfa414d7e4%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 19:31:05.528098 validate duration: 0.16
14 19:31:05.529032 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 19:31:05.529388 start: 1.1 download-retry (timeout 00:10:00) [common]
16 19:31:05.529727 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 19:31:05.530373 Not decompressing ramdisk as can be used compressed.
18 19:31:05.530881 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 19:31:05.531144 saving as /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/ramdisk/rootfs.cpio.gz
20 19:31:05.531410 total size: 47897469 (45 MB)
21 19:31:05.575228 progress 0 % (0 MB)
22 19:31:05.609642 progress 5 % (2 MB)
23 19:31:05.643042 progress 10 % (4 MB)
24 19:31:05.675733 progress 15 % (6 MB)
25 19:31:05.746010 progress 20 % (9 MB)
26 19:31:05.809109 progress 25 % (11 MB)
27 19:31:05.882241 progress 30 % (13 MB)
28 19:31:05.915439 progress 35 % (16 MB)
29 19:31:05.948021 progress 40 % (18 MB)
30 19:31:05.986918 progress 45 % (20 MB)
31 19:31:06.054166 progress 50 % (22 MB)
32 19:31:06.095259 progress 55 % (25 MB)
33 19:31:06.131422 progress 60 % (27 MB)
34 19:31:06.166290 progress 65 % (29 MB)
35 19:31:06.216773 progress 70 % (32 MB)
36 19:31:06.285537 progress 75 % (34 MB)
37 19:31:06.325466 progress 80 % (36 MB)
38 19:31:06.365187 progress 85 % (38 MB)
39 19:31:06.401572 progress 90 % (41 MB)
40 19:31:06.442286 progress 95 % (43 MB)
41 19:31:06.476300 progress 100 % (45 MB)
42 19:31:06.477145 45 MB downloaded in 0.95 s (48.30 MB/s)
43 19:31:06.477712 end: 1.1.1 http-download (duration 00:00:01) [common]
45 19:31:06.478633 end: 1.1 download-retry (duration 00:00:01) [common]
46 19:31:06.478930 start: 1.2 download-retry (timeout 00:09:59) [common]
47 19:31:06.479204 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 19:31:06.479719 downloading http://storage.kernelci.org/ardb/for-kernelci/v6.12-rc1-122-g309bfa414d7e4/arm64/defconfig/gcc-12/kernel/Image
49 19:31:06.479977 saving as /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/kernel/Image
50 19:31:06.480335 total size: 45713920 (43 MB)
51 19:31:06.480564 No compression specified
52 19:31:06.522967 progress 0 % (0 MB)
53 19:31:06.553629 progress 5 % (2 MB)
54 19:31:06.585064 progress 10 % (4 MB)
55 19:31:06.614240 progress 15 % (6 MB)
56 19:31:06.643484 progress 20 % (8 MB)
57 19:31:06.672211 progress 25 % (10 MB)
58 19:31:06.701096 progress 30 % (13 MB)
59 19:31:06.730063 progress 35 % (15 MB)
60 19:31:06.759849 progress 40 % (17 MB)
61 19:31:06.790959 progress 45 % (19 MB)
62 19:31:06.830193 progress 50 % (21 MB)
63 19:31:06.861711 progress 55 % (24 MB)
64 19:31:06.892612 progress 60 % (26 MB)
65 19:31:06.921138 progress 65 % (28 MB)
66 19:31:06.950105 progress 70 % (30 MB)
67 19:31:06.979825 progress 75 % (32 MB)
68 19:31:07.008557 progress 80 % (34 MB)
69 19:31:07.036534 progress 85 % (37 MB)
70 19:31:07.066137 progress 90 % (39 MB)
71 19:31:07.096632 progress 95 % (41 MB)
72 19:31:07.124722 progress 100 % (43 MB)
73 19:31:07.125248 43 MB downloaded in 0.64 s (67.60 MB/s)
74 19:31:07.125723 end: 1.2.1 http-download (duration 00:00:01) [common]
76 19:31:07.126536 end: 1.2 download-retry (duration 00:00:01) [common]
77 19:31:07.126810 start: 1.3 download-retry (timeout 00:09:58) [common]
78 19:31:07.127073 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 19:31:07.127539 downloading http://storage.kernelci.org/ardb/for-kernelci/v6.12-rc1-122-g309bfa414d7e4/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 19:31:07.127808 saving as /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/dtb/meson-g12b-a311d-libretech-cc.dtb
81 19:31:07.128041 total size: 54703 (0 MB)
82 19:31:07.128254 No compression specified
83 19:31:07.171695 progress 59 % (0 MB)
84 19:31:07.172583 progress 100 % (0 MB)
85 19:31:07.173124 0 MB downloaded in 0.05 s (1.16 MB/s)
86 19:31:07.173610 end: 1.3.1 http-download (duration 00:00:00) [common]
88 19:31:07.174429 end: 1.3 download-retry (duration 00:00:00) [common]
89 19:31:07.174689 start: 1.4 download-retry (timeout 00:09:58) [common]
90 19:31:07.174951 start: 1.4.1 http-download (timeout 00:09:58) [common]
91 19:31:07.175411 downloading http://storage.kernelci.org/ardb/for-kernelci/v6.12-rc1-122-g309bfa414d7e4/arm64/defconfig/gcc-12/modules.tar.xz
92 19:31:07.175649 saving as /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/modules/modules.tar
93 19:31:07.175854 total size: 11611380 (11 MB)
94 19:31:07.176089 Using unxz to decompress xz
95 19:31:07.210819 progress 0 % (0 MB)
96 19:31:07.276505 progress 5 % (0 MB)
97 19:31:07.350677 progress 10 % (1 MB)
98 19:31:07.447111 progress 15 % (1 MB)
99 19:31:07.539721 progress 20 % (2 MB)
100 19:31:07.626704 progress 25 % (2 MB)
101 19:31:07.703503 progress 30 % (3 MB)
102 19:31:07.782066 progress 35 % (3 MB)
103 19:31:07.854008 progress 40 % (4 MB)
104 19:31:07.929599 progress 45 % (5 MB)
105 19:31:08.013220 progress 50 % (5 MB)
106 19:31:08.089378 progress 55 % (6 MB)
107 19:31:08.174215 progress 60 % (6 MB)
108 19:31:08.254471 progress 65 % (7 MB)
109 19:31:08.335582 progress 70 % (7 MB)
110 19:31:08.418756 progress 75 % (8 MB)
111 19:31:08.520779 progress 80 % (8 MB)
112 19:31:08.619577 progress 85 % (9 MB)
113 19:31:08.717813 progress 90 % (9 MB)
114 19:31:08.812399 progress 95 % (10 MB)
115 19:31:08.905207 progress 100 % (11 MB)
116 19:31:08.919348 11 MB downloaded in 1.74 s (6.35 MB/s)
117 19:31:08.920256 end: 1.4.1 http-download (duration 00:00:02) [common]
119 19:31:08.921915 end: 1.4 download-retry (duration 00:00:02) [common]
120 19:31:08.922463 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 19:31:08.923000 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 19:31:08.923517 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 19:31:08.924067 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 19:31:08.925074 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i
125 19:31:08.925922 makedir: /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin
126 19:31:08.926602 makedir: /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/tests
127 19:31:08.927260 makedir: /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/results
128 19:31:08.927901 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-add-keys
129 19:31:08.928906 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-add-sources
130 19:31:08.929860 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-background-process-start
131 19:31:08.930829 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-background-process-stop
132 19:31:08.931836 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-common-functions
133 19:31:08.932832 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-echo-ipv4
134 19:31:08.933797 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-install-packages
135 19:31:08.934739 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-installed-packages
136 19:31:08.935654 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-os-build
137 19:31:08.936625 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-probe-channel
138 19:31:08.937560 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-probe-ip
139 19:31:08.938490 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-target-ip
140 19:31:08.939414 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-target-mac
141 19:31:08.940375 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-target-storage
142 19:31:08.941314 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-case
143 19:31:08.942243 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-event
144 19:31:08.943154 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-feedback
145 19:31:08.944097 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-raise
146 19:31:08.945030 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-reference
147 19:31:08.946069 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-runner
148 19:31:08.947010 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-set
149 19:31:08.947941 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-test-shell
150 19:31:08.948929 Updating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-install-packages (oe)
151 19:31:08.949928 Updating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/bin/lava-installed-packages (oe)
152 19:31:08.950779 Creating /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/environment
153 19:31:08.951504 LAVA metadata
154 19:31:08.952029 - LAVA_JOB_ID=941891
155 19:31:08.952481 - LAVA_DISPATCHER_IP=192.168.6.2
156 19:31:08.953156 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 19:31:08.954930 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 19:31:08.955517 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 19:31:08.955945 skipped lava-vland-overlay
160 19:31:08.956477 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 19:31:08.957001 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 19:31:08.957437 skipped lava-multinode-overlay
163 19:31:08.957934 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 19:31:08.958446 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 19:31:08.958932 Loading test definitions
166 19:31:08.959481 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 19:31:08.959927 Using /lava-941891 at stage 0
168 19:31:08.962120 uuid=941891_1.5.2.4.1 testdef=None
169 19:31:08.962690 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 19:31:08.963223 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 19:31:08.965426 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 19:31:08.966286 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 19:31:08.968520 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 19:31:08.969385 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 19:31:08.971522 runner path: /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/0/tests/0_igt-gpu-panfrost test_uuid 941891_1.5.2.4.1
178 19:31:08.972145 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 19:31:08.972986 Creating lava-test-runner.conf files
181 19:31:08.973206 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/941891/lava-overlay-65pn1b1i/lava-941891/0 for stage 0
182 19:31:08.973571 - 0_igt-gpu-panfrost
183 19:31:08.973942 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 19:31:08.974237 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 19:31:08.997742 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 19:31:08.998117 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 19:31:08.998407 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 19:31:08.998691 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 19:31:08.998966 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 19:31:16.239169 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 19:31:16.239644 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
192 19:31:16.239894 extracting modules file /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/modules/modules.tar to /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk
193 19:31:17.653151 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 19:31:17.653631 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 19:31:17.653909 [common] Applying overlay /var/lib/lava/dispatcher/tmp/941891/compress-overlay-4ryt8ugs/overlay-1.5.2.5.tar.gz to ramdisk
196 19:31:17.654122 [common] Applying overlay /var/lib/lava/dispatcher/tmp/941891/compress-overlay-4ryt8ugs/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk
197 19:31:17.683769 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 19:31:17.684163 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 19:31:17.684437 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 19:31:17.684669 Converting downloaded kernel to a uImage
201 19:31:17.684973 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/kernel/Image /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/kernel/uImage
202 19:31:18.147142 output: Image Name:
203 19:31:18.147552 output: Created: Tue Nov 5 19:31:17 2024
204 19:31:18.147763 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 19:31:18.147968 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 19:31:18.148215 output: Load Address: 01080000
207 19:31:18.148418 output: Entry Point: 01080000
208 19:31:18.148620 output:
209 19:31:18.148952 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 19:31:18.149219 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 19:31:18.149486 start: 1.5.7 configure-preseed-file (timeout 00:09:47) [common]
212 19:31:18.149738 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 19:31:18.149993 start: 1.5.8 compress-ramdisk (timeout 00:09:47) [common]
214 19:31:18.150266 Building ramdisk /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk
215 19:31:24.728541 >> 502368 blocks
216 19:31:45.528391 Adding RAMdisk u-boot header.
217 19:31:45.529020 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk.cpio.gz.uboot
218 19:31:46.216152 output: Image Name:
219 19:31:46.216576 output: Created: Tue Nov 5 19:31:45 2024
220 19:31:46.216787 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 19:31:46.216992 output: Data Size: 65707327 Bytes = 64167.31 KiB = 62.66 MiB
222 19:31:46.217193 output: Load Address: 00000000
223 19:31:46.217392 output: Entry Point: 00000000
224 19:31:46.217590 output:
225 19:31:46.218236 rename /var/lib/lava/dispatcher/tmp/941891/extract-overlay-ramdisk-ipth9cji/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
226 19:31:46.218658 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 19:31:46.218945 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 19:31:46.219217 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 19:31:46.219457 No LXC device requested
230 19:31:46.219713 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 19:31:46.219971 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 19:31:46.220634 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 19:31:46.221108 Checking files for TFTP limit of 4294967296 bytes.
234 19:31:46.224040 end: 1 tftp-deploy (duration 00:00:41) [common]
235 19:31:46.224671 start: 2 uboot-action (timeout 00:05:00) [common]
236 19:31:46.225244 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 19:31:46.225790 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 19:31:46.226338 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 19:31:46.226912 Using kernel file from prepare-kernel: 941891/tftp-deploy-6_4l2f67/kernel/uImage
240 19:31:46.227570 substitutions:
241 19:31:46.228050 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 19:31:46.228508 - {DTB_ADDR}: 0x01070000
243 19:31:46.228949 - {DTB}: 941891/tftp-deploy-6_4l2f67/dtb/meson-g12b-a311d-libretech-cc.dtb
244 19:31:46.229389 - {INITRD}: 941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
245 19:31:46.229822 - {KERNEL_ADDR}: 0x01080000
246 19:31:46.230254 - {KERNEL}: 941891/tftp-deploy-6_4l2f67/kernel/uImage
247 19:31:46.230687 - {LAVA_MAC}: None
248 19:31:46.231162 - {PRESEED_CONFIG}: None
249 19:31:46.231597 - {PRESEED_LOCAL}: None
250 19:31:46.232055 - {RAMDISK_ADDR}: 0x08000000
251 19:31:46.232488 - {RAMDISK}: 941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
252 19:31:46.232921 - {ROOT_PART}: None
253 19:31:46.233347 - {ROOT}: None
254 19:31:46.233777 - {SERVER_IP}: 192.168.6.2
255 19:31:46.234207 - {TEE_ADDR}: 0x83000000
256 19:31:46.234633 - {TEE}: None
257 19:31:46.235060 Parsed boot commands:
258 19:31:46.235472 - setenv autoload no
259 19:31:46.235897 - setenv initrd_high 0xffffffff
260 19:31:46.236353 - setenv fdt_high 0xffffffff
261 19:31:46.236780 - dhcp
262 19:31:46.237206 - setenv serverip 192.168.6.2
263 19:31:46.237629 - tftpboot 0x01080000 941891/tftp-deploy-6_4l2f67/kernel/uImage
264 19:31:46.238057 - tftpboot 0x08000000 941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
265 19:31:46.238483 - tftpboot 0x01070000 941891/tftp-deploy-6_4l2f67/dtb/meson-g12b-a311d-libretech-cc.dtb
266 19:31:46.238911 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 19:31:46.239343 - bootm 0x01080000 0x08000000 0x01070000
268 19:31:46.239889 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 19:31:46.241563 start: 2.3 connect-device (timeout 00:05:00) [common]
271 19:31:46.242054 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 19:31:46.259163 Setting prompt string to ['lava-test: # ']
273 19:31:46.260787 end: 2.3 connect-device (duration 00:00:00) [common]
274 19:31:46.261431 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 19:31:46.262030 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 19:31:46.262601 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 19:31:46.263813 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 19:31:46.301180 >> OK - accepted request
279 19:31:46.303487 Returned 0 in 0 seconds
280 19:31:46.404725 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 19:31:46.406468 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 19:31:46.407089 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 19:31:46.407646 Setting prompt string to ['Hit any key to stop autoboot']
285 19:31:46.408203 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 19:31:46.409903 Trying 192.168.56.21...
287 19:31:46.410438 Connected to conserv1.
288 19:31:46.410891 Escape character is '^]'.
289 19:31:46.411353
290 19:31:46.411818 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 19:31:46.412318
292 19:31:58.350618 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
293 19:31:58.351362 bl2_stage_init 0x81
294 19:31:58.353397 hw id: 0x0000 - pwm id 0x01
295 19:31:58.353936 bl2_stage_init 0xc1
296 19:31:58.354393 bl2_stage_init 0x02
297 19:31:58.354827
298 19:31:58.358380 L0:00000000
299 19:31:58.358882 L1:20000703
300 19:31:58.359329 L2:00008067
301 19:31:58.359758 L3:14000000
302 19:31:58.360294 B2:00402000
303 19:31:58.361345 B1:e0f83180
304 19:31:58.361854
305 19:31:58.362292 TE: 58150
306 19:31:58.362723
307 19:31:58.372459 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
308 19:31:58.373003
309 19:31:58.373441 Board ID = 1
310 19:31:58.373871 Set A53 clk to 24M
311 19:31:58.374295 Set A73 clk to 24M
312 19:31:58.378392 Set clk81 to 24M
313 19:31:58.378970 A53 clk: 1200 MHz
314 19:31:58.379420 A73 clk: 1200 MHz
315 19:31:58.383654 CLK81: 166.6M
316 19:31:58.384440 smccc: 00012aab
317 19:31:58.389336 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
318 19:31:58.389918 board id: 1
319 19:31:58.397930 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
320 19:31:58.408507 fw parse done
321 19:31:58.414552 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
322 19:31:58.456943 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
323 19:31:58.470434 PIEI prepare done
324 19:31:58.470949 fastboot data load
325 19:31:58.471382 fastboot data verify
326 19:31:58.473638 verify result: 266
327 19:31:58.479229 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
328 19:31:58.479867 LPDDR4 probe
329 19:31:58.480398 ddr clk to 1584MHz
330 19:31:58.487889 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
331 19:31:58.524380
332 19:31:58.524822 dmc_version 0001
333 19:31:58.532112 Check phy result
334 19:31:58.536951 INFO : End of CA training
335 19:31:58.537363 INFO : End of initialization
336 19:31:58.542419 INFO : Training has run successfully!
337 19:31:58.542831 Check phy result
338 19:31:58.548050 INFO : End of initialization
339 19:31:58.548476 INFO : End of read enable training
340 19:31:58.553655 INFO : End of fine write leveling
341 19:31:58.559255 INFO : End of Write leveling coarse delay
342 19:31:58.559668 INFO : Training has run successfully!
343 19:31:58.559906 Check phy result
344 19:31:58.564854 INFO : End of initialization
345 19:31:58.565275 INFO : End of read dq deskew training
346 19:31:58.570463 INFO : End of MPR read delay center optimization
347 19:31:58.576074 INFO : End of write delay center optimization
348 19:31:58.581653 INFO : End of read delay center optimization
349 19:31:58.582089 INFO : End of max read latency training
350 19:31:58.587247 INFO : Training has run successfully!
351 19:31:58.587653 1D training succeed
352 19:31:58.596394 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
353 19:31:58.644109 Check phy result
354 19:31:58.644535 INFO : End of initialization
355 19:31:58.666922 INFO : End of 2D read delay Voltage center optimization
356 19:31:58.686950 INFO : End of 2D read delay Voltage center optimization
357 19:31:58.738980 INFO : End of 2D write delay Voltage center optimization
358 19:31:58.788352 INFO : End of 2D write delay Voltage center optimization
359 19:31:58.793905 INFO : Training has run successfully!
360 19:31:58.794492
361 19:31:58.794903 channel==0
362 19:31:58.799456 RxClkDly_Margin_A0==88 ps 9
363 19:31:58.800024 TxDqDly_Margin_A0==98 ps 10
364 19:31:58.802816 RxClkDly_Margin_A1==88 ps 9
365 19:31:58.803341 TxDqDly_Margin_A1==88 ps 9
366 19:31:58.808434 TrainedVREFDQ_A0==74
367 19:31:58.809008 TrainedVREFDQ_A1==74
368 19:31:58.809411 VrefDac_Margin_A0==24
369 19:31:58.813989 DeviceVref_Margin_A0==40
370 19:31:58.814509 VrefDac_Margin_A1==24
371 19:31:58.819590 DeviceVref_Margin_A1==40
372 19:31:58.819936
373 19:31:58.820186
374 19:31:58.820422 channel==1
375 19:31:58.820632 RxClkDly_Margin_A0==98 ps 10
376 19:31:58.825215 TxDqDly_Margin_A0==98 ps 10
377 19:31:58.825791 RxClkDly_Margin_A1==98 ps 10
378 19:31:58.830836 TxDqDly_Margin_A1==88 ps 9
379 19:31:58.831362 TrainedVREFDQ_A0==77
380 19:31:58.831756 TrainedVREFDQ_A1==77
381 19:31:58.836423 VrefDac_Margin_A0==22
382 19:31:58.836924 DeviceVref_Margin_A0==37
383 19:31:58.842332 VrefDac_Margin_A1==22
384 19:31:58.842800 DeviceVref_Margin_A1==37
385 19:31:58.843210
386 19:31:58.847595 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
387 19:31:58.848095
388 19:31:58.875840 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000018 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
389 19:31:58.881157 2D training succeed
390 19:31:58.886781 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
391 19:31:58.887240 auto size-- 65535DDR cs0 size: 2048MB
392 19:31:58.892359 DDR cs1 size: 2048MB
393 19:31:58.892807 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
394 19:31:58.897980 cs0 DataBus test pass
395 19:31:58.898412 cs1 DataBus test pass
396 19:31:58.898815 cs0 AddrBus test pass
397 19:31:58.903699 cs1 AddrBus test pass
398 19:31:58.904175
399 19:31:58.904587 100bdlr_step_size ps== 420
400 19:31:58.904997 result report
401 19:31:58.909225 boot times 0Enable ddr reg access
402 19:31:58.916750 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
403 19:31:58.930266 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
404 19:31:59.504021 0.0;M3 CHK:0;cm4_sp_mode 0
405 19:31:59.504418 MVN_1=0x00000000
406 19:31:59.509342 MVN_2=0x00000000
407 19:31:59.515083 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
408 19:31:59.515474 OPS=0x10
409 19:31:59.515720 ring efuse init
410 19:31:59.515928 chipver efuse init
411 19:31:59.523362 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
412 19:31:59.523654 [0.018961 Inits done]
413 19:31:59.523860 secure task start!
414 19:31:59.530920 high task start!
415 19:31:59.531229 low task start!
416 19:31:59.531452 run into bl31
417 19:31:59.537670 NOTICE: BL31: v1.3(release):4fc40b1
418 19:31:59.545356 NOTICE: BL31: Built : 15:58:17, May 22 2019
419 19:31:59.545697 NOTICE: BL31: G12A normal boot!
420 19:31:59.570916 NOTICE: BL31: BL33 decompress pass
421 19:31:59.576419 ERROR: Error initializing runtime service opteed_fast
422 19:32:00.809333
423 19:32:00.810929
424 19:32:00.817729 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
425 19:32:00.818291
426 19:32:00.818534 Model: Libre Computer AML-A311D-CC Alta
427 19:32:01.026214 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
428 19:32:01.050120 DRAM: 2 GiB (effective 3.8 GiB)
429 19:32:01.192594 Core: 408 devices, 31 uclasses, devicetree: separate
430 19:32:01.198443 WDT: Not starting watchdog@f0d0
431 19:32:01.230734 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
432 19:32:01.243242 Loading Environment from FAT... Card did not respond to voltage select! : -110
433 19:32:01.248153 ** Bad device specification mmc 0 **
434 19:32:01.258453 Card did not respond to voltage select! : -110
435 19:32:01.266177 ** Bad device specification mmc 0 **
436 19:32:01.266658 Couldn't find partition mmc 0
437 19:32:01.274459 Card did not respond to voltage select! : -110
438 19:32:01.280092 ** Bad device specification mmc 0 **
439 19:32:01.280566 Couldn't find partition mmc 0
440 19:32:01.285129 Error: could not access storage.
441 19:32:02.547336 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
442 19:32:02.547787 bl2_stage_init 0x01
443 19:32:02.548085 bl2_stage_init 0x81
444 19:32:02.552755 hw id: 0x0000 - pwm id 0x01
445 19:32:02.553101 bl2_stage_init 0xc1
446 19:32:02.553338 bl2_stage_init 0x02
447 19:32:02.553563
448 19:32:02.558350 L0:00000000
449 19:32:02.558657 L1:20000703
450 19:32:02.559244 L2:00008067
451 19:32:02.559476 L3:14000000
452 19:32:02.563938 B2:00402000
453 19:32:02.564347 B1:e0f83180
454 19:32:02.564656
455 19:32:02.564959 TE: 58124
456 19:32:02.565263
457 19:32:02.569532 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
458 19:32:02.569845
459 19:32:02.570090 Board ID = 1
460 19:32:02.575189 Set A53 clk to 24M
461 19:32:02.575490 Set A73 clk to 24M
462 19:32:02.575745 Set clk81 to 24M
463 19:32:02.580734 A53 clk: 1200 MHz
464 19:32:02.581026 A73 clk: 1200 MHz
465 19:32:02.581231 CLK81: 166.6M
466 19:32:02.581442 smccc: 00012a92
467 19:32:02.586358 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
468 19:32:02.591943 board id: 1
469 19:32:02.597813 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
470 19:32:02.608523 fw parse done
471 19:32:02.614446 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
472 19:32:02.657117 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
473 19:32:02.668046 PIEI prepare done
474 19:32:02.668396 fastboot data load
475 19:32:02.668603 fastboot data verify
476 19:32:02.673709 verify result: 266
477 19:32:02.679301 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
478 19:32:02.679776 LPDDR4 probe
479 19:32:02.680134 ddr clk to 1584MHz
480 19:32:02.687267 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
481 19:32:02.724539
482 19:32:02.724968 dmc_version 0001
483 19:32:02.731189 Check phy result
484 19:32:02.737066 INFO : End of CA training
485 19:32:02.737561 INFO : End of initialization
486 19:32:02.742607 INFO : Training has run successfully!
487 19:32:02.742902 Check phy result
488 19:32:02.748299 INFO : End of initialization
489 19:32:02.748612 INFO : End of read enable training
490 19:32:02.753851 INFO : End of fine write leveling
491 19:32:02.759499 INFO : End of Write leveling coarse delay
492 19:32:02.760074 INFO : Training has run successfully!
493 19:32:02.760348 Check phy result
494 19:32:02.765082 INFO : End of initialization
495 19:32:02.765559 INFO : End of read dq deskew training
496 19:32:02.770606 INFO : End of MPR read delay center optimization
497 19:32:02.776289 INFO : End of write delay center optimization
498 19:32:02.781846 INFO : End of read delay center optimization
499 19:32:02.782153 INFO : End of max read latency training
500 19:32:02.787479 INFO : Training has run successfully!
501 19:32:02.787952 1D training succeed
502 19:32:02.796599 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
503 19:32:02.844326 Check phy result
504 19:32:02.844766 INFO : End of initialization
505 19:32:02.866853 INFO : End of 2D read delay Voltage center optimization
506 19:32:02.887057 INFO : End of 2D read delay Voltage center optimization
507 19:32:02.939112 INFO : End of 2D write delay Voltage center optimization
508 19:32:02.988523 INFO : End of 2D write delay Voltage center optimization
509 19:32:02.994058 INFO : Training has run successfully!
510 19:32:02.994550
511 19:32:02.994976 channel==0
512 19:32:02.999633 RxClkDly_Margin_A0==88 ps 9
513 19:32:03.000138 TxDqDly_Margin_A0==98 ps 10
514 19:32:03.005236 RxClkDly_Margin_A1==88 ps 9
515 19:32:03.005705 TxDqDly_Margin_A1==88 ps 9
516 19:32:03.006118 TrainedVREFDQ_A0==74
517 19:32:03.010840 TrainedVREFDQ_A1==74
518 19:32:03.011310 VrefDac_Margin_A0==24
519 19:32:03.011722 DeviceVref_Margin_A0==40
520 19:32:03.016461 VrefDac_Margin_A1==24
521 19:32:03.016935 DeviceVref_Margin_A1==40
522 19:32:03.017344
523 19:32:03.017755
524 19:32:03.018156 channel==1
525 19:32:03.022034 RxClkDly_Margin_A0==98 ps 10
526 19:32:03.022507 TxDqDly_Margin_A0==98 ps 10
527 19:32:03.027633 RxClkDly_Margin_A1==88 ps 9
528 19:32:03.028147 TxDqDly_Margin_A1==88 ps 9
529 19:32:03.033253 TrainedVREFDQ_A0==77
530 19:32:03.033734 TrainedVREFDQ_A1==77
531 19:32:03.034146 VrefDac_Margin_A0==22
532 19:32:03.038854 DeviceVref_Margin_A0==37
533 19:32:03.039312 VrefDac_Margin_A1==24
534 19:32:03.044471 DeviceVref_Margin_A1==37
535 19:32:03.044941
536 19:32:03.045356 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
537 19:32:03.045760
538 19:32:03.078034 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
539 19:32:03.078575 2D training succeed
540 19:32:03.083646 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
541 19:32:03.089238 auto size-- 65535DDR cs0 size: 2048MB
542 19:32:03.089725 DDR cs1 size: 2048MB
543 19:32:03.094836 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
544 19:32:03.095302 cs0 DataBus test pass
545 19:32:03.100470 cs1 DataBus test pass
546 19:32:03.100949 cs0 AddrBus test pass
547 19:32:03.101356 cs1 AddrBus test pass
548 19:32:03.101757
549 19:32:03.106045 100bdlr_step_size ps== 420
550 19:32:03.106530 result report
551 19:32:03.111669 boot times 0Enable ddr reg access
552 19:32:03.116916 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
553 19:32:03.130430 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
554 19:32:03.704253 0.0;M3 CHK:0;cm4_sp_mode 0
555 19:32:03.704851 MVN_1=0x00000000
556 19:32:03.709569 MVN_2=0x00000000
557 19:32:03.715324 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
558 19:32:03.715822 OPS=0x10
559 19:32:03.716327 ring efuse init
560 19:32:03.716734 chipver efuse init
561 19:32:03.720985 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
562 19:32:03.726552 [0.018960 Inits done]
563 19:32:03.726975 secure task start!
564 19:32:03.727359 high task start!
565 19:32:03.731167 low task start!
566 19:32:03.731585 run into bl31
567 19:32:03.737719 NOTICE: BL31: v1.3(release):4fc40b1
568 19:32:03.745605 NOTICE: BL31: Built : 15:58:17, May 22 2019
569 19:32:03.746030 NOTICE: BL31: G12A normal boot!
570 19:32:03.770985 NOTICE: BL31: BL33 decompress pass
571 19:32:03.776596 ERROR: Error initializing runtime service opteed_fast
572 19:32:05.009836
573 19:32:05.010473
574 19:32:05.018095 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
575 19:32:05.018591
576 19:32:05.019046 Model: Libre Computer AML-A311D-CC Alta
577 19:32:05.226539 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
578 19:32:05.249953 DRAM: 2 GiB (effective 3.8 GiB)
579 19:32:05.392885 Core: 408 devices, 31 uclasses, devicetree: separate
580 19:32:05.398632 WDT: Not starting watchdog@f0d0
581 19:32:05.430898 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
582 19:32:05.443405 Loading Environment from FAT... Card did not respond to voltage select! : -110
583 19:32:05.448358 ** Bad device specification mmc 0 **
584 19:32:05.458825 Card did not respond to voltage select! : -110
585 19:32:05.466352 ** Bad device specification mmc 0 **
586 19:32:05.466604 Couldn't find partition mmc 0
587 19:32:05.474640 Card did not respond to voltage select! : -110
588 19:32:05.480213 ** Bad device specification mmc 0 **
589 19:32:05.480674 Couldn't find partition mmc 0
590 19:32:05.485326 Error: could not access storage.
591 19:32:05.828808 Net: eth0: ethernet@ff3f0000
592 19:32:05.829339 starting USB...
593 19:32:06.080518 Bus usb@ff500000: Register 3000140 NbrPorts 3
594 19:32:06.081014 Starting the controller
595 19:32:06.087507 USB XHCI 1.10
596 19:32:07.799015 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
597 19:32:07.799625 bl2_stage_init 0x01
598 19:32:07.800096 bl2_stage_init 0x81
599 19:32:07.804490 hw id: 0x0000 - pwm id 0x01
600 19:32:07.804955 bl2_stage_init 0xc1
601 19:32:07.805370 bl2_stage_init 0x02
602 19:32:07.805782
603 19:32:07.810176 L0:00000000
604 19:32:07.810656 L1:20000703
605 19:32:07.811075 L2:00008067
606 19:32:07.811485 L3:14000000
607 19:32:07.813225 B2:00402000
608 19:32:07.813680 B1:e0f83180
609 19:32:07.814086
610 19:32:07.814488 TE: 58124
611 19:32:07.814888
612 19:32:07.824368 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
613 19:32:07.824838
614 19:32:07.825249 Board ID = 1
615 19:32:07.825650 Set A53 clk to 24M
616 19:32:07.826045 Set A73 clk to 24M
617 19:32:07.830078 Set clk81 to 24M
618 19:32:07.830511 A53 clk: 1200 MHz
619 19:32:07.830915 A73 clk: 1200 MHz
620 19:32:07.835717 CLK81: 166.6M
621 19:32:07.836181 smccc: 00012a92
622 19:32:07.841927 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
623 19:32:07.842364 board id: 1
624 19:32:07.849819 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
625 19:32:07.860411 fw parse done
626 19:32:07.866359 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
627 19:32:07.908874 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
628 19:32:07.919745 PIEI prepare done
629 19:32:07.920229 fastboot data load
630 19:32:07.920643 fastboot data verify
631 19:32:07.925341 verify result: 266
632 19:32:07.930982 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
633 19:32:07.931419 LPDDR4 probe
634 19:32:07.931825 ddr clk to 1584MHz
635 19:32:07.938981 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
636 19:32:07.976264
637 19:32:07.976740 dmc_version 0001
638 19:32:07.982848 Check phy result
639 19:32:07.988710 INFO : End of CA training
640 19:32:07.989149 INFO : End of initialization
641 19:32:07.994291 INFO : Training has run successfully!
642 19:32:07.994720 Check phy result
643 19:32:07.999880 INFO : End of initialization
644 19:32:08.000342 INFO : End of read enable training
645 19:32:08.005547 INFO : End of fine write leveling
646 19:32:08.011128 INFO : End of Write leveling coarse delay
647 19:32:08.011559 INFO : Training has run successfully!
648 19:32:08.011961 Check phy result
649 19:32:08.016749 INFO : End of initialization
650 19:32:08.017174 INFO : End of read dq deskew training
651 19:32:08.022345 INFO : End of MPR read delay center optimization
652 19:32:08.027929 INFO : End of write delay center optimization
653 19:32:08.033551 INFO : End of read delay center optimization
654 19:32:08.033982 INFO : End of max read latency training
655 19:32:08.039149 INFO : Training has run successfully!
656 19:32:08.039579 1D training succeed
657 19:32:08.048350 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
658 19:32:08.095924 Check phy result
659 19:32:08.096418 INFO : End of initialization
660 19:32:08.117507 INFO : End of 2D read delay Voltage center optimization
661 19:32:08.137599 INFO : End of 2D read delay Voltage center optimization
662 19:32:08.189493 INFO : End of 2D write delay Voltage center optimization
663 19:32:08.238782 INFO : End of 2D write delay Voltage center optimization
664 19:32:08.244382 INFO : Training has run successfully!
665 19:32:08.244816
666 19:32:08.245252 channel==0
667 19:32:08.250259 RxClkDly_Margin_A0==88 ps 9
668 19:32:08.251229 TxDqDly_Margin_A0==98 ps 10
669 19:32:08.255875 RxClkDly_Margin_A1==88 ps 9
670 19:32:08.256535 TxDqDly_Margin_A1==98 ps 10
671 19:32:08.257012 TrainedVREFDQ_A0==74
672 19:32:08.261472 TrainedVREFDQ_A1==74
673 19:32:08.262024 VrefDac_Margin_A0==25
674 19:32:08.262488 DeviceVref_Margin_A0==40
675 19:32:08.266868 VrefDac_Margin_A1==25
676 19:32:08.267411 DeviceVref_Margin_A1==40
677 19:32:08.267872
678 19:32:08.268366
679 19:32:08.272578 channel==1
680 19:32:08.273120 RxClkDly_Margin_A0==98 ps 10
681 19:32:08.273577 TxDqDly_Margin_A0==98 ps 10
682 19:32:08.278134 RxClkDly_Margin_A1==88 ps 9
683 19:32:08.278673 TxDqDly_Margin_A1==88 ps 9
684 19:32:08.283771 TrainedVREFDQ_A0==77
685 19:32:08.284345 TrainedVREFDQ_A1==77
686 19:32:08.284810 VrefDac_Margin_A0==22
687 19:32:08.289402 DeviceVref_Margin_A0==37
688 19:32:08.290021 VrefDac_Margin_A1==24
689 19:32:08.294938 DeviceVref_Margin_A1==37
690 19:32:08.295488
691 19:32:08.295948 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
692 19:32:08.296439
693 19:32:08.328479 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
694 19:32:08.329123 2D training succeed
695 19:32:08.333967 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
696 19:32:08.339536 auto size-- 65535DDR cs0 size: 2048MB
697 19:32:08.340153 DDR cs1 size: 2048MB
698 19:32:08.345261 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
699 19:32:08.345801 cs0 DataBus test pass
700 19:32:08.350801 cs1 DataBus test pass
701 19:32:08.351387 cs0 AddrBus test pass
702 19:32:08.351854 cs1 AddrBus test pass
703 19:32:08.352390
704 19:32:08.356436 100bdlr_step_size ps== 420
705 19:32:08.357021 result report
706 19:32:08.362007 boot times 0Enable ddr reg access
707 19:32:08.367454 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
708 19:32:08.380770 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
709 19:32:08.952773 0.0;M3 CHK:0;cm4_sp_mode 0
710 19:32:08.953463 MVN_1=0x00000000
711 19:32:08.958197 MVN_2=0x00000000
712 19:32:08.964117 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
713 19:32:08.964701 OPS=0x10
714 19:32:08.965161 ring efuse init
715 19:32:08.965594 chipver efuse init
716 19:32:08.969568 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
717 19:32:08.975174 [0.018961 Inits done]
718 19:32:08.975656 secure task start!
719 19:32:08.976145 high task start!
720 19:32:08.979719 low task start!
721 19:32:08.980216 run into bl31
722 19:32:08.986363 NOTICE: BL31: v1.3(release):4fc40b1
723 19:32:08.994264 NOTICE: BL31: Built : 15:58:17, May 22 2019
724 19:32:08.994749 NOTICE: BL31: G12A normal boot!
725 19:32:09.019539 NOTICE: BL31: BL33 decompress pass
726 19:32:09.025277 ERROR: Error initializing runtime service opteed_fast
727 19:32:10.258213
728 19:32:10.258863
729 19:32:10.266515 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
730 19:32:10.267032
731 19:32:10.267494 Model: Libre Computer AML-A311D-CC Alta
732 19:32:10.475006 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
733 19:32:10.498310 DRAM: 2 GiB (effective 3.8 GiB)
734 19:32:10.641385 Core: 408 devices, 31 uclasses, devicetree: separate
735 19:32:10.647201 WDT: Not starting watchdog@f0d0
736 19:32:10.679528 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
737 19:32:10.691880 Loading Environment from FAT... Card did not respond to voltage select! : -110
738 19:32:10.696896 ** Bad device specification mmc 0 **
739 19:32:10.707216 Card did not respond to voltage select! : -110
740 19:32:10.714850 ** Bad device specification mmc 0 **
741 19:32:10.715263 Couldn't find partition mmc 0
742 19:32:10.723175 Card did not respond to voltage select! : -110
743 19:32:10.728706 ** Bad device specification mmc 0 **
744 19:32:10.729084 Couldn't find partition mmc 0
745 19:32:10.733761 Error: could not access storage.
746 19:32:11.076291 Net: eth0: ethernet@ff3f0000
747 19:32:11.076887 starting USB...
748 19:32:11.328117 Bus usb@ff500000: Register 3000140 NbrPorts 3
749 19:32:11.328537 Starting the controller
750 19:32:11.334996 USB XHCI 1.10
751 19:32:13.497478 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
752 19:32:13.497914 bl2_stage_init 0x01
753 19:32:13.498149 bl2_stage_init 0x81
754 19:32:13.502987 hw id: 0x0000 - pwm id 0x01
755 19:32:13.503291 bl2_stage_init 0xc1
756 19:32:13.503519 bl2_stage_init 0x02
757 19:32:13.503738
758 19:32:13.508679 L0:00000000
759 19:32:13.508974 L1:20000703
760 19:32:13.509197 L2:00008067
761 19:32:13.509409 L3:14000000
762 19:32:13.511462 B2:00402000
763 19:32:13.511745 B1:e0f83180
764 19:32:13.511965
765 19:32:13.512232 TE: 58124
766 19:32:13.512454
767 19:32:13.522669 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 19:32:13.522994
769 19:32:13.523221 Board ID = 1
770 19:32:13.523432 Set A53 clk to 24M
771 19:32:13.523641 Set A73 clk to 24M
772 19:32:13.528201 Set clk81 to 24M
773 19:32:13.528506 A53 clk: 1200 MHz
774 19:32:13.528731 A73 clk: 1200 MHz
775 19:32:13.534025 CLK81: 166.6M
776 19:32:13.534427 smccc: 00012a91
777 19:32:13.539472 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 19:32:13.539874 board id: 1
779 19:32:13.544975 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 19:32:13.558633 fw parse done
781 19:32:13.564713 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 19:32:13.607259 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 19:32:13.618156 PIEI prepare done
784 19:32:13.618500 fastboot data load
785 19:32:13.618736 fastboot data verify
786 19:32:13.623940 verify result: 266
787 19:32:13.629391 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 19:32:13.629846 LPDDR4 probe
789 19:32:13.630234 ddr clk to 1584MHz
790 19:32:13.637377 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 19:32:13.674741
792 19:32:13.675142 dmc_version 0001
793 19:32:13.681401 Check phy result
794 19:32:13.687267 INFO : End of CA training
795 19:32:13.687711 INFO : End of initialization
796 19:32:13.692916 INFO : Training has run successfully!
797 19:32:13.693225 Check phy result
798 19:32:13.698442 INFO : End of initialization
799 19:32:13.698880 INFO : End of read enable training
800 19:32:13.704037 INFO : End of fine write leveling
801 19:32:13.709629 INFO : End of Write leveling coarse delay
802 19:32:13.709970 INFO : Training has run successfully!
803 19:32:13.710203 Check phy result
804 19:32:13.715206 INFO : End of initialization
805 19:32:13.715534 INFO : End of read dq deskew training
806 19:32:13.720825 INFO : End of MPR read delay center optimization
807 19:32:13.726441 INFO : End of write delay center optimization
808 19:32:13.731976 INFO : End of read delay center optimization
809 19:32:13.732358 INFO : End of max read latency training
810 19:32:13.737617 INFO : Training has run successfully!
811 19:32:13.738101 1D training succeed
812 19:32:13.746790 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 19:32:13.794509 Check phy result
814 19:32:13.795186 INFO : End of initialization
815 19:32:13.817088 INFO : End of 2D read delay Voltage center optimization
816 19:32:13.837212 INFO : End of 2D read delay Voltage center optimization
817 19:32:13.889388 INFO : End of 2D write delay Voltage center optimization
818 19:32:13.938705 INFO : End of 2D write delay Voltage center optimization
819 19:32:13.944197 INFO : Training has run successfully!
820 19:32:13.944736
821 19:32:13.945203 channel==0
822 19:32:13.949773 RxClkDly_Margin_A0==88 ps 9
823 19:32:13.950271 TxDqDly_Margin_A0==98 ps 10
824 19:32:13.953137 RxClkDly_Margin_A1==88 ps 9
825 19:32:13.953638 TxDqDly_Margin_A1==98 ps 10
826 19:32:13.958636 TrainedVREFDQ_A0==74
827 19:32:13.959212 TrainedVREFDQ_A1==74
828 19:32:13.964271 VrefDac_Margin_A0==25
829 19:32:13.964809 DeviceVref_Margin_A0==40
830 19:32:13.965250 VrefDac_Margin_A1==24
831 19:32:13.969803 DeviceVref_Margin_A1==40
832 19:32:13.970299
833 19:32:13.970736
834 19:32:13.971168 channel==1
835 19:32:13.971593 RxClkDly_Margin_A0==98 ps 10
836 19:32:13.973339 TxDqDly_Margin_A0==88 ps 9
837 19:32:13.978977 RxClkDly_Margin_A1==88 ps 9
838 19:32:13.979466 TxDqDly_Margin_A1==88 ps 9
839 19:32:13.979906 TrainedVREFDQ_A0==77
840 19:32:13.984563 TrainedVREFDQ_A1==77
841 19:32:13.985037 VrefDac_Margin_A0==22
842 19:32:13.990097 DeviceVref_Margin_A0==37
843 19:32:13.990569 VrefDac_Margin_A1==24
844 19:32:13.990997 DeviceVref_Margin_A1==37
845 19:32:13.991422
846 19:32:13.995722 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 19:32:13.996213
848 19:32:14.029365 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000018 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
849 19:32:14.029900 2D training succeed
850 19:32:14.034960 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 19:32:14.040495 auto size-- 65535DDR cs0 size: 2048MB
852 19:32:14.040969 DDR cs1 size: 2048MB
853 19:32:14.046143 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 19:32:14.046615 cs0 DataBus test pass
855 19:32:14.047046 cs1 DataBus test pass
856 19:32:14.051756 cs0 AddrBus test pass
857 19:32:14.052255 cs1 AddrBus test pass
858 19:32:14.052682
859 19:32:14.057300 100bdlr_step_size ps== 420
860 19:32:14.057771 result report
861 19:32:14.058200 boot times 0Enable ddr reg access
862 19:32:14.066963 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 19:32:14.080439 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 19:32:14.653555 0.0;M3 CHK:0;cm4_sp_mode 0
865 19:32:14.654206 MVN_1=0x00000000
866 19:32:14.659014 MVN_2=0x00000000
867 19:32:14.664826 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 19:32:14.665328 OPS=0x10
869 19:32:14.665784 ring efuse init
870 19:32:14.666233 chipver efuse init
871 19:32:14.670352 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 19:32:14.676027 [0.018961 Inits done]
873 19:32:14.676524 secure task start!
874 19:32:14.676972 high task start!
875 19:32:14.680594 low task start!
876 19:32:14.681073 run into bl31
877 19:32:14.687207 NOTICE: BL31: v1.3(release):4fc40b1
878 19:32:14.695122 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 19:32:14.695632 NOTICE: BL31: G12A normal boot!
880 19:32:14.720406 NOTICE: BL31: BL33 decompress pass
881 19:32:14.726097 ERROR: Error initializing runtime service opteed_fast
882 19:32:15.958988
883 19:32:15.959633
884 19:32:15.967316 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 19:32:15.967823
886 19:32:15.968324 Model: Libre Computer AML-A311D-CC Alta
887 19:32:16.175848 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 19:32:16.199172 DRAM: 2 GiB (effective 3.8 GiB)
889 19:32:16.342240 Core: 408 devices, 31 uclasses, devicetree: separate
890 19:32:16.348084 WDT: Not starting watchdog@f0d0
891 19:32:16.380228 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 19:32:16.392730 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 19:32:16.397649 ** Bad device specification mmc 0 **
894 19:32:16.408036 Card did not respond to voltage select! : -110
895 19:32:16.415635 ** Bad device specification mmc 0 **
896 19:32:16.416145 Couldn't find partition mmc 0
897 19:32:16.424018 Card did not respond to voltage select! : -110
898 19:32:16.429499 ** Bad device specification mmc 0 **
899 19:32:16.429972 Couldn't find partition mmc 0
900 19:32:16.434549 Error: could not access storage.
901 19:32:16.777031 Net: eth0: ethernet@ff3f0000
902 19:32:16.777631 starting USB...
903 19:32:17.028876 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 19:32:17.029442 Starting the controller
905 19:32:17.035779 USB XHCI 1.10
906 19:32:18.589954 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
907 19:32:18.598195 scanning usb for storage devices... 0 Storage Device(s) found
909 19:32:18.649787 Hit any key to stop autoboot: 1
910 19:32:18.650630 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
911 19:32:18.651275 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
912 19:32:18.651790 Setting prompt string to ['=>']
913 19:32:18.652412 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
914 19:32:18.665677 0
915 19:32:18.666625 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
916 19:32:18.667163 Sending with 10 millisecond of delay
918 19:32:19.802434 => setenv autoload no
919 19:32:19.813655 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
920 19:32:19.816525 setenv autoload no
921 19:32:19.817168 Sending with 10 millisecond of delay
923 19:32:21.614000 => setenv initrd_high 0xffffffff
924 19:32:21.624773 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
925 19:32:21.625606 setenv initrd_high 0xffffffff
926 19:32:21.626315 Sending with 10 millisecond of delay
928 19:32:23.242492 => setenv fdt_high 0xffffffff
929 19:32:23.253278 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
930 19:32:23.254070 setenv fdt_high 0xffffffff
931 19:32:23.254777 Sending with 10 millisecond of delay
933 19:32:23.546594 => dhcp
934 19:32:23.557344 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
935 19:32:23.558124 dhcp
936 19:32:23.558551 Speed: 1000, full duplex
937 19:32:23.558958 BOOTP broadcast 1
938 19:32:23.565520 DHCP client bound to address 192.168.6.27 (8 ms)
939 19:32:23.566205 Sending with 10 millisecond of delay
941 19:32:25.242980 => setenv serverip 192.168.6.2
942 19:32:25.253816 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
943 19:32:25.254801 setenv serverip 192.168.6.2
944 19:32:25.255501 Sending with 10 millisecond of delay
946 19:32:28.978867 => tftpboot 0x01080000 941891/tftp-deploy-6_4l2f67/kernel/uImage
947 19:32:28.989671 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
948 19:32:28.990556 tftpboot 0x01080000 941891/tftp-deploy-6_4l2f67/kernel/uImage
949 19:32:28.991022 Speed: 1000, full duplex
950 19:32:28.991440 Using ethernet@ff3f0000 device
951 19:32:28.992553 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
952 19:32:28.997952 Filename '941891/tftp-deploy-6_4l2f67/kernel/uImage'.
953 19:32:29.001946 Load address: 0x1080000
954 19:32:31.918589 Loading: *################################################## 43.6 MiB
955 19:32:31.919195 14.9 MiB/s
956 19:32:31.919626 done
957 19:32:31.923027 Bytes transferred = 45713984 (2b98a40 hex)
958 19:32:31.923826 Sending with 10 millisecond of delay
960 19:32:36.611499 => tftpboot 0x08000000 941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
961 19:32:36.622282 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
962 19:32:36.622787 tftpboot 0x08000000 941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot
963 19:32:36.623017 Speed: 1000, full duplex
964 19:32:36.623219 Using ethernet@ff3f0000 device
965 19:32:36.624962 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
966 19:32:36.636737 Filename '941891/tftp-deploy-6_4l2f67/ramdisk/ramdisk.cpio.gz.uboot'.
967 19:32:36.637147 Load address: 0x8000000
968 19:32:47.073726 Loading: *######T ########################################### UDP wrong checksum 0000000f 0000a75d
969 19:32:52.008891 UDP wrong checksum 000000ff 00009c5f
970 19:32:52.074870 T UDP wrong checksum 0000000f 0000a75d
971 19:32:52.229505 UDP wrong checksum 000000ff 00003552
972 19:33:02.078089 T T UDP wrong checksum 0000000f 0000a75d
973 19:33:14.632680 T T UDP wrong checksum 000000ff 0000ba63
974 19:33:14.644227 UDP wrong checksum 000000ff 00004f56
975 19:33:22.079911 T UDP wrong checksum 0000000f 0000a75d
976 19:33:35.523123 T T T UDP wrong checksum 000000ff 000092aa
977 19:33:37.086156
978 19:33:37.086785 Retry count exceeded; starting again
980 19:33:37.088325 end: 2.4.3 bootloader-commands (duration 00:01:18) [common]
983 19:33:37.090307 end: 2.4 uboot-commands (duration 00:01:51) [common]
985 19:33:37.091790 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
987 19:33:37.092955 end: 2 uboot-action (duration 00:01:51) [common]
989 19:33:37.094623 Cleaning after the job
990 19:33:37.095248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/ramdisk
991 19:33:37.096670 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/kernel
992 19:33:37.144669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/dtb
993 19:33:37.145424 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/941891/tftp-deploy-6_4l2f67/modules
994 19:33:37.166632 start: 4.1 power-off (timeout 00:00:30) [common]
995 19:33:37.167281 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
996 19:33:37.201092 >> OK - accepted request
997 19:33:37.203184 Returned 0 in 0 seconds
998 19:33:37.304317 end: 4.1 power-off (duration 00:00:00) [common]
1000 19:33:37.305915 start: 4.2 read-feedback (timeout 00:10:00) [common]
1001 19:33:37.307007 Listened to connection for namespace 'common' for up to 1s
1002 19:33:38.307832 Finalising connection for namespace 'common'
1003 19:33:38.308629 Disconnecting from shell: Finalise
1004 19:33:38.309192 =>
1005 19:33:38.410262 end: 4.2 read-feedback (duration 00:00:01) [common]
1006 19:33:38.410985 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/941891
1007 19:33:39.063310 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/941891
1008 19:33:39.063902 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.