Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:15:46.277869 lava-dispatcher, installed at version: 2024.01
2 22:15:46.278671 start: 0 validate
3 22:15:46.279139 Start time: 2024-11-08 22:15:46.279108+00:00 (UTC)
4 22:15:46.279707 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:15:46.280272 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:15:46.314504 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:15:46.315057 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regmap%2Ffor-next%2Fv6.12-rc3-8-gd1f4390dd28b%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:15:46.347779 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:15:46.348428 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regmap%2Ffor-next%2Fv6.12-rc3-8-gd1f4390dd28b%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:15:46.376827 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:15:46.377424 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:15:46.414507 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:15:46.415442 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regmap%2Ffor-next%2Fv6.12-rc3-8-gd1f4390dd28b%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:15:46.457264 validate duration: 0.18
16 22:15:46.458261 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:15:46.458675 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:15:46.459053 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:15:46.459770 Not decompressing ramdisk as can be used compressed.
20 22:15:46.460359 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:15:46.460712 saving as /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/ramdisk/initrd.cpio.gz
22 22:15:46.461061 total size: 5628169 (5 MB)
23 22:15:46.503609 progress 0 % (0 MB)
24 22:15:46.508707 progress 5 % (0 MB)
25 22:15:46.513698 progress 10 % (0 MB)
26 22:15:46.518134 progress 15 % (0 MB)
27 22:15:46.523076 progress 20 % (1 MB)
28 22:15:46.527516 progress 25 % (1 MB)
29 22:15:46.532525 progress 30 % (1 MB)
30 22:15:46.537404 progress 35 % (1 MB)
31 22:15:46.541746 progress 40 % (2 MB)
32 22:15:46.546564 progress 45 % (2 MB)
33 22:15:46.551014 progress 50 % (2 MB)
34 22:15:46.555850 progress 55 % (2 MB)
35 22:15:46.560717 progress 60 % (3 MB)
36 22:15:46.565064 progress 65 % (3 MB)
37 22:15:46.570041 progress 70 % (3 MB)
38 22:15:46.576244 progress 75 % (4 MB)
39 22:15:46.580272 progress 80 % (4 MB)
40 22:15:46.583820 progress 85 % (4 MB)
41 22:15:46.587649 progress 90 % (4 MB)
42 22:15:46.591770 progress 95 % (5 MB)
43 22:15:46.595112 progress 100 % (5 MB)
44 22:15:46.595785 5 MB downloaded in 0.13 s (39.85 MB/s)
45 22:15:46.596368 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:15:46.597272 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:15:46.597565 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:15:46.597840 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:15:46.598328 downloading http://storage.kernelci.org/broonie-regmap/for-next/v6.12-rc3-8-gd1f4390dd28b/arm64/defconfig/gcc-12/kernel/Image
51 22:15:46.598584 saving as /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/kernel/Image
52 22:15:46.598795 total size: 45713920 (43 MB)
53 22:15:46.599005 No compression specified
54 22:15:46.636480 progress 0 % (0 MB)
55 22:15:46.665648 progress 5 % (2 MB)
56 22:15:46.694744 progress 10 % (4 MB)
57 22:15:46.723804 progress 15 % (6 MB)
58 22:15:46.752655 progress 20 % (8 MB)
59 22:15:46.781595 progress 25 % (10 MB)
60 22:15:46.810327 progress 30 % (13 MB)
61 22:15:46.839190 progress 35 % (15 MB)
62 22:15:46.868609 progress 40 % (17 MB)
63 22:15:46.897110 progress 45 % (19 MB)
64 22:15:46.926193 progress 50 % (21 MB)
65 22:15:46.954807 progress 55 % (24 MB)
66 22:15:46.983666 progress 60 % (26 MB)
67 22:15:47.011911 progress 65 % (28 MB)
68 22:15:47.041337 progress 70 % (30 MB)
69 22:15:47.070142 progress 75 % (32 MB)
70 22:15:47.099803 progress 80 % (34 MB)
71 22:15:47.128825 progress 85 % (37 MB)
72 22:15:47.157760 progress 90 % (39 MB)
73 22:15:47.186806 progress 95 % (41 MB)
74 22:15:47.214561 progress 100 % (43 MB)
75 22:15:47.215087 43 MB downloaded in 0.62 s (70.74 MB/s)
76 22:15:47.215555 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:15:47.216413 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:15:47.216693 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:15:47.216959 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:15:47.217453 downloading http://storage.kernelci.org/broonie-regmap/for-next/v6.12-rc3-8-gd1f4390dd28b/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:15:47.217734 saving as /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:15:47.217940 total size: 53209 (0 MB)
84 22:15:47.218149 No compression specified
85 22:15:47.251095 progress 61 % (0 MB)
86 22:15:47.251938 progress 100 % (0 MB)
87 22:15:47.252567 0 MB downloaded in 0.03 s (1.47 MB/s)
88 22:15:47.253040 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:15:47.253851 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:15:47.254113 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:15:47.254377 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:15:47.254845 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:15:47.255098 saving as /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/nfsrootfs/full.rootfs.tar
95 22:15:47.255303 total size: 120894716 (115 MB)
96 22:15:47.255513 Using unxz to decompress xz
97 22:15:47.288939 progress 0 % (0 MB)
98 22:15:48.093786 progress 5 % (5 MB)
99 22:15:48.940843 progress 10 % (11 MB)
100 22:15:49.749216 progress 15 % (17 MB)
101 22:15:50.493824 progress 20 % (23 MB)
102 22:15:51.089232 progress 25 % (28 MB)
103 22:15:51.924806 progress 30 % (34 MB)
104 22:15:52.722485 progress 35 % (40 MB)
105 22:15:53.067953 progress 40 % (46 MB)
106 22:15:53.452938 progress 45 % (51 MB)
107 22:15:54.171186 progress 50 % (57 MB)
108 22:15:55.054282 progress 55 % (63 MB)
109 22:15:55.838829 progress 60 % (69 MB)
110 22:15:56.595756 progress 65 % (74 MB)
111 22:15:57.382840 progress 70 % (80 MB)
112 22:15:58.222910 progress 75 % (86 MB)
113 22:15:59.005934 progress 80 % (92 MB)
114 22:15:59.764546 progress 85 % (98 MB)
115 22:16:00.615589 progress 90 % (103 MB)
116 22:16:01.396166 progress 95 % (109 MB)
117 22:16:02.269428 progress 100 % (115 MB)
118 22:16:02.283050 115 MB downloaded in 15.03 s (7.67 MB/s)
119 22:16:02.284090 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:16:02.285889 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:16:02.286471 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:16:02.287053 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:16:02.287932 downloading http://storage.kernelci.org/broonie-regmap/for-next/v6.12-rc3-8-gd1f4390dd28b/arm64/defconfig/gcc-12/modules.tar.xz
125 22:16:02.288476 saving as /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/modules/modules.tar
126 22:16:02.288937 total size: 11607860 (11 MB)
127 22:16:02.289404 Using unxz to decompress xz
128 22:16:02.338499 progress 0 % (0 MB)
129 22:16:02.408260 progress 5 % (0 MB)
130 22:16:02.484083 progress 10 % (1 MB)
131 22:16:02.582961 progress 15 % (1 MB)
132 22:16:02.674829 progress 20 % (2 MB)
133 22:16:02.753779 progress 25 % (2 MB)
134 22:16:02.829000 progress 30 % (3 MB)
135 22:16:02.902707 progress 35 % (3 MB)
136 22:16:02.979328 progress 40 % (4 MB)
137 22:16:03.055570 progress 45 % (5 MB)
138 22:16:03.140313 progress 50 % (5 MB)
139 22:16:03.217453 progress 55 % (6 MB)
140 22:16:03.302513 progress 60 % (6 MB)
141 22:16:03.383204 progress 65 % (7 MB)
142 22:16:03.460207 progress 70 % (7 MB)
143 22:16:03.542102 progress 75 % (8 MB)
144 22:16:03.630625 progress 80 % (8 MB)
145 22:16:03.712866 progress 85 % (9 MB)
146 22:16:03.793440 progress 90 % (9 MB)
147 22:16:03.873054 progress 95 % (10 MB)
148 22:16:03.951010 progress 100 % (11 MB)
149 22:16:03.963594 11 MB downloaded in 1.67 s (6.61 MB/s)
150 22:16:03.964841 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:16:03.968080 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:16:03.969119 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 22:16:03.970152 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 22:16:20.526709 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/963004/extract-nfsrootfs-2z39t9as
156 22:16:20.527319 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 22:16:20.527603 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:16:20.528245 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r
159 22:16:20.528682 makedir: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin
160 22:16:20.529090 makedir: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/tests
161 22:16:20.529427 makedir: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/results
162 22:16:20.529761 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-add-keys
163 22:16:20.530290 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-add-sources
164 22:16:20.530801 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-background-process-start
165 22:16:20.531298 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-background-process-stop
166 22:16:20.531829 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-common-functions
167 22:16:20.532384 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-echo-ipv4
168 22:16:20.532875 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-install-packages
169 22:16:20.533357 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-installed-packages
170 22:16:20.533830 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-os-build
171 22:16:20.534304 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-probe-channel
172 22:16:20.534781 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-probe-ip
173 22:16:20.535258 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-target-ip
174 22:16:20.535738 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-target-mac
175 22:16:20.536291 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-target-storage
176 22:16:20.536843 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-case
177 22:16:20.537339 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-event
178 22:16:20.537817 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-feedback
179 22:16:20.538293 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-raise
180 22:16:20.538767 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-reference
181 22:16:20.539244 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-runner
182 22:16:20.539724 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-set
183 22:16:20.540275 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-test-shell
184 22:16:20.540812 Updating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-add-keys (debian)
185 22:16:20.541357 Updating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-add-sources (debian)
186 22:16:20.541868 Updating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-install-packages (debian)
187 22:16:20.542393 Updating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-installed-packages (debian)
188 22:16:20.542892 Updating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/bin/lava-os-build (debian)
189 22:16:20.543326 Creating /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/environment
190 22:16:20.543721 LAVA metadata
191 22:16:20.544010 - LAVA_JOB_ID=963004
192 22:16:20.544235 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:16:20.544612 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:16:20.545592 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:16:20.545913 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:16:20.546120 skipped lava-vland-overlay
197 22:16:20.546362 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:16:20.546617 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:16:20.546837 skipped lava-multinode-overlay
200 22:16:20.547079 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:16:20.547329 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:16:20.547577 Loading test definitions
203 22:16:20.547854 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:16:20.548107 Using /lava-963004 at stage 0
205 22:16:20.549199 uuid=963004_1.6.2.4.1 testdef=None
206 22:16:20.549508 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:16:20.549772 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:16:20.551346 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:16:20.552170 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:16:20.554118 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:16:20.554942 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:16:20.556822 runner path: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/0/tests/0_timesync-off test_uuid 963004_1.6.2.4.1
215 22:16:20.557385 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:16:20.558192 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:16:20.558416 Using /lava-963004 at stage 0
219 22:16:20.558775 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:16:20.559068 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/0/tests/1_kselftest-alsa'
221 22:16:23.955692 Running '/usr/bin/git checkout kernelci.org
222 22:16:24.403509 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 22:16:24.405823 uuid=963004_1.6.2.4.5 testdef=None
224 22:16:24.406432 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:16:24.407863 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 22:16:24.413258 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:16:24.414847 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 22:16:24.422278 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:16:24.423918 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 22:16:24.430807 runner path: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/0/tests/1_kselftest-alsa test_uuid 963004_1.6.2.4.5
234 22:16:24.431321 BOARD='meson-sm1-s905d3-libretech-cc'
235 22:16:24.431725 BRANCH='broonie-regmap'
236 22:16:24.432170 SKIPFILE='/dev/null'
237 22:16:24.432562 SKIP_INSTALL='True'
238 22:16:24.432947 TESTPROG_URL='http://storage.kernelci.org/broonie-regmap/for-next/v6.12-rc3-8-gd1f4390dd28b/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:16:24.433340 TST_CASENAME=''
240 22:16:24.433725 TST_CMDFILES='alsa'
241 22:16:24.434689 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:16:24.436248 Creating lava-test-runner.conf files
244 22:16:24.436659 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/963004/lava-overlay-obt5em4r/lava-963004/0 for stage 0
245 22:16:24.437290 - 0_timesync-off
246 22:16:24.437736 - 1_kselftest-alsa
247 22:16:24.438350 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:16:24.438879 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 22:16:47.760739 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:16:47.761187 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:16:47.761454 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:16:47.761724 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:16:47.761986 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:16:48.359544 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:16:48.360063 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 22:16:48.360326 extracting modules file /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963004/extract-nfsrootfs-2z39t9as
257 22:16:49.714828 extracting modules file /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk
258 22:16:51.099296 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:16:51.099778 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 22:16:51.100093 [common] Applying overlay to NFS
261 22:16:51.100313 [common] Applying overlay /var/lib/lava/dispatcher/tmp/963004/compress-overlay-n88pvr1a/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/963004/extract-nfsrootfs-2z39t9as
262 22:16:53.834679 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:16:53.835159 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:16:53.835432 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:16:53.835661 Converting downloaded kernel to a uImage
266 22:16:53.835967 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/kernel/Image /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/kernel/uImage
267 22:16:54.344289 output: Image Name:
268 22:16:54.344712 output: Created: Fri Nov 8 22:16:53 2024
269 22:16:54.344936 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:16:54.345150 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:16:54.345358 output: Load Address: 01080000
272 22:16:54.345564 output: Entry Point: 01080000
273 22:16:54.345765 output:
274 22:16:54.346106 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 22:16:54.346386 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 22:16:54.346666 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 22:16:54.346932 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:16:54.347200 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 22:16:54.347466 Building ramdisk /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk
280 22:16:56.549762 >> 166779 blocks
281 22:17:04.280228 Adding RAMdisk u-boot header.
282 22:17:04.281095 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk.cpio.gz.uboot
283 22:17:04.519269 output: Image Name:
284 22:17:04.519706 output: Created: Fri Nov 8 22:17:04 2024
285 22:17:04.519943 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:17:04.520206 output: Data Size: 23424047 Bytes = 22875.05 KiB = 22.34 MiB
287 22:17:04.520434 output: Load Address: 00000000
288 22:17:04.520651 output: Entry Point: 00000000
289 22:17:04.520867 output:
290 22:17:04.521458 rename /var/lib/lava/dispatcher/tmp/963004/extract-overlay-ramdisk-3wpyy94q/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
291 22:17:04.521905 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:17:04.522221 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 22:17:04.522523 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 22:17:04.522786 No LXC device requested
295 22:17:04.523068 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:17:04.523355 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 22:17:04.523634 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:17:04.523863 Checking files for TFTP limit of 4294967296 bytes.
299 22:17:04.525387 end: 1 tftp-deploy (duration 00:01:18) [common]
300 22:17:04.525726 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:17:04.526029 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:17:04.526310 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:17:04.526596 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:17:04.526900 Using kernel file from prepare-kernel: 963004/tftp-deploy-54gz64qm/kernel/uImage
305 22:17:04.527255 substitutions:
306 22:17:04.527487 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:17:04.527709 - {DTB_ADDR}: 0x01070000
308 22:17:04.527927 - {DTB}: 963004/tftp-deploy-54gz64qm/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 22:17:04.528183 - {INITRD}: 963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
310 22:17:04.528404 - {KERNEL_ADDR}: 0x01080000
311 22:17:04.528618 - {KERNEL}: 963004/tftp-deploy-54gz64qm/kernel/uImage
312 22:17:04.528834 - {LAVA_MAC}: None
313 22:17:04.529078 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/963004/extract-nfsrootfs-2z39t9as
314 22:17:04.529302 - {NFS_SERVER_IP}: 192.168.6.2
315 22:17:04.529514 - {PRESEED_CONFIG}: None
316 22:17:04.529726 - {PRESEED_LOCAL}: None
317 22:17:04.529938 - {RAMDISK_ADDR}: 0x08000000
318 22:17:04.530147 - {RAMDISK}: 963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
319 22:17:04.530356 - {ROOT_PART}: None
320 22:17:04.530564 - {ROOT}: None
321 22:17:04.530772 - {SERVER_IP}: 192.168.6.2
322 22:17:04.530976 - {TEE_ADDR}: 0x83000000
323 22:17:04.531184 - {TEE}: None
324 22:17:04.531393 Parsed boot commands:
325 22:17:04.531596 - setenv autoload no
326 22:17:04.531804 - setenv initrd_high 0xffffffff
327 22:17:04.532036 - setenv fdt_high 0xffffffff
328 22:17:04.532391 - dhcp
329 22:17:04.532779 - setenv serverip 192.168.6.2
330 22:17:04.533167 - tftpboot 0x01080000 963004/tftp-deploy-54gz64qm/kernel/uImage
331 22:17:04.533555 - tftpboot 0x08000000 963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
332 22:17:04.533942 - tftpboot 0x01070000 963004/tftp-deploy-54gz64qm/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 22:17:04.534329 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/963004/extract-nfsrootfs-2z39t9as,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:17:04.534727 - bootm 0x01080000 0x08000000 0x01070000
335 22:17:04.535224 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:17:04.536751 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:17:04.537171 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 22:17:04.552023 Setting prompt string to ['lava-test: # ']
340 22:17:04.553546 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:17:04.554148 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:17:04.554704 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:17:04.555232 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:17:04.556395 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 22:17:04.590549 >> OK - accepted request
346 22:17:04.592444 Returned 0 in 0 seconds
347 22:17:04.693524 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:17:04.695081 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:17:04.695620 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:17:04.696154 Setting prompt string to ['Hit any key to stop autoboot']
352 22:17:04.696601 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:17:04.698144 Trying 192.168.56.21...
354 22:17:04.698616 Connected to conserv1.
355 22:17:04.699024 Escape character is '^]'.
356 22:17:04.699430
357 22:17:04.699831 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:17:04.700277
359 22:17:11.709570 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 22:17:11.710189 bl2_stage_init 0x01
361 22:17:11.710609 bl2_stage_init 0x81
362 22:17:11.715174 hw id: 0x0000 - pwm id 0x01
363 22:17:11.715620 bl2_stage_init 0xc1
364 22:17:11.720228 bl2_stage_init 0x02
365 22:17:11.720669
366 22:17:11.721099 L0:00000000
367 22:17:11.721512 L1:00000703
368 22:17:11.721922 L2:00008067
369 22:17:11.725539 L3:15000000
370 22:17:11.725981 S1:00000000
371 22:17:11.726391 B2:20282000
372 22:17:11.726785 B1:a0f83180
373 22:17:11.727171
374 22:17:11.727555 TE: 70856
375 22:17:11.727944
376 22:17:11.736693 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 22:17:11.737121
378 22:17:11.737517 Board ID = 1
379 22:17:11.737901 Set cpu clk to 24M
380 22:17:11.738284 Set clk81 to 24M
381 22:17:11.742414 Use GP1_pll as DSU clk.
382 22:17:11.742837 DSU clk: 1200 Mhz
383 22:17:11.743229 CPU clk: 1200 MHz
384 22:17:11.747889 Set clk81 to 166.6M
385 22:17:11.753448 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 22:17:11.753874 board id: 1
387 22:17:11.761378 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:17:11.772067 fw parse done
389 22:17:11.777962 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:17:11.820785 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:17:11.831659 PIEI prepare done
392 22:17:11.832129 fastboot data load
393 22:17:11.832530 fastboot data verify
394 22:17:11.837261 verify result: 266
395 22:17:11.842744 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 22:17:11.843160 LPDDR4 probe
397 22:17:11.843550 ddr clk to 1584MHz
398 22:17:11.850760 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:17:11.888146
400 22:17:11.888598 dmc_version 0001
401 22:17:11.894777 Check phy result
402 22:17:11.900627 INFO : End of CA training
403 22:17:11.901042 INFO : End of initialization
404 22:17:11.906370 INFO : Training has run successfully!
405 22:17:11.906781 Check phy result
406 22:17:11.911890 INFO : End of initialization
407 22:17:11.912341 INFO : End of read enable training
408 22:17:11.917509 INFO : End of fine write leveling
409 22:17:11.923007 INFO : End of Write leveling coarse delay
410 22:17:11.923417 INFO : Training has run successfully!
411 22:17:11.923807 Check phy result
412 22:17:11.928637 INFO : End of initialization
413 22:17:11.929047 INFO : End of read dq deskew training
414 22:17:11.934271 INFO : End of MPR read delay center optimization
415 22:17:11.939819 INFO : End of write delay center optimization
416 22:17:11.945421 INFO : End of read delay center optimization
417 22:17:11.945835 INFO : End of max read latency training
418 22:17:11.951031 INFO : Training has run successfully!
419 22:17:11.951441 1D training succeed
420 22:17:11.960266 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:17:12.007818 Check phy result
422 22:17:12.008272 INFO : End of initialization
423 22:17:12.030126 INFO : End of 2D read delay Voltage center optimization
424 22:17:12.049469 INFO : End of 2D read delay Voltage center optimization
425 22:17:12.101255 INFO : End of 2D write delay Voltage center optimization
426 22:17:12.150514 INFO : End of 2D write delay Voltage center optimization
427 22:17:12.155918 INFO : Training has run successfully!
428 22:17:12.156369
429 22:17:12.156767 channel==0
430 22:17:12.161667 RxClkDly_Margin_A0==78 ps 8
431 22:17:12.162082 TxDqDly_Margin_A0==98 ps 10
432 22:17:12.164933 RxClkDly_Margin_A1==88 ps 9
433 22:17:12.165342 TxDqDly_Margin_A1==98 ps 10
434 22:17:12.170549 TrainedVREFDQ_A0==74
435 22:17:12.170966 TrainedVREFDQ_A1==75
436 22:17:12.171359 VrefDac_Margin_A0==24
437 22:17:12.176096 DeviceVref_Margin_A0==40
438 22:17:12.176554 VrefDac_Margin_A1==23
439 22:17:12.181739 DeviceVref_Margin_A1==39
440 22:17:12.182180
441 22:17:12.182576
442 22:17:12.182965 channel==1
443 22:17:12.183351 RxClkDly_Margin_A0==88 ps 9
444 22:17:12.185255 TxDqDly_Margin_A0==98 ps 10
445 22:17:12.190802 RxClkDly_Margin_A1==78 ps 8
446 22:17:12.191219 TxDqDly_Margin_A1==88 ps 9
447 22:17:12.191610 TrainedVREFDQ_A0==78
448 22:17:12.196460 TrainedVREFDQ_A1==75
449 22:17:12.196877 VrefDac_Margin_A0==23
450 22:17:12.201930 DeviceVref_Margin_A0==36
451 22:17:12.202342 VrefDac_Margin_A1==22
452 22:17:12.202733 DeviceVref_Margin_A1==39
453 22:17:12.203118
454 22:17:12.207472 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:17:12.207887
456 22:17:12.241081 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 22:17:12.241568 2D training succeed
458 22:17:12.246651 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:17:12.252265 auto size-- 65535DDR cs0 size: 2048MB
460 22:17:12.252695 DDR cs1 size: 2048MB
461 22:17:12.257801 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:17:12.258219 cs0 DataBus test pass
463 22:17:12.258612 cs1 DataBus test pass
464 22:17:12.263389 cs0 AddrBus test pass
465 22:17:12.263803 cs1 AddrBus test pass
466 22:17:12.264238
467 22:17:12.269024 100bdlr_step_size ps== 478
468 22:17:12.269448 result report
469 22:17:12.269837 boot times 0Enable ddr reg access
470 22:17:12.278713 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:17:12.292571 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 22:17:12.946685 bl2z: ptr: 05129330, size: 00001e40
473 22:17:12.953602 0.0;M3 CHK:0;cm4_sp_mode 0
474 22:17:12.954072 MVN_1=0x00000000
475 22:17:12.954483 MVN_2=0x00000000
476 22:17:12.965122 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 22:17:12.965607 OPS=0x04
478 22:17:12.966022 ring efuse init
479 22:17:12.968112 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 22:17:12.974572 [0.017310 Inits done]
481 22:17:12.974999 secure task start!
482 22:17:12.975400 high task start!
483 22:17:12.975799 low task start!
484 22:17:12.978768 run into bl31
485 22:17:12.987439 NOTICE: BL31: v1.3(release):4fc40b1
486 22:17:12.995208 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 22:17:12.995641 NOTICE: BL31: G12A normal boot!
488 22:17:13.010756 NOTICE: BL31: BL33 decompress pass
489 22:17:13.016438 ERROR: Error initializing runtime service opteed_fast
490 22:17:14.257123 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 22:17:14.257703 bl2_stage_init 0x01
492 22:17:14.258126 bl2_stage_init 0x81
493 22:17:14.262661 hw id: 0x0000 - pwm id 0x01
494 22:17:14.263098 bl2_stage_init 0xc1
495 22:17:14.268305 bl2_stage_init 0x02
496 22:17:14.268733
497 22:17:14.269143 L0:00000000
498 22:17:14.269550 L1:00000703
499 22:17:14.269950 L2:00008067
500 22:17:14.270343 L3:15000000
501 22:17:14.273831 S1:00000000
502 22:17:14.274254 B2:20282000
503 22:17:14.274655 B1:a0f83180
504 22:17:14.275050
505 22:17:14.275445 TE: 66847
506 22:17:14.275841
507 22:17:14.279412 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 22:17:14.279847
509 22:17:14.285087 Board ID = 1
510 22:17:14.285517 Set cpu clk to 24M
511 22:17:14.285925 Set clk81 to 24M
512 22:17:14.290662 Use GP1_pll as DSU clk.
513 22:17:14.291093 DSU clk: 1200 Mhz
514 22:17:14.291497 CPU clk: 1200 MHz
515 22:17:14.296285 Set clk81 to 166.6M
516 22:17:14.301912 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 22:17:14.302338 board id: 1
518 22:17:14.308373 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 22:17:14.319744 fw parse done
520 22:17:14.324887 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 22:17:14.368384 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 22:17:14.379212 PIEI prepare done
523 22:17:14.379659 fastboot data load
524 22:17:14.380112 fastboot data verify
525 22:17:14.384825 verify result: 266
526 22:17:14.390477 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 22:17:14.390902 LPDDR4 probe
528 22:17:14.391329 ddr clk to 1584MHz
529 22:17:15.759130 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 22:17:15.759753 bl2_stage_init 0x01
531 22:17:15.760283 bl2_stage_init 0x81
532 22:17:15.764688 hw id: 0x0000 - pwm id 0x01
533 22:17:15.765154 bl2_stage_init 0xc1
534 22:17:15.770363 bl2_stage_init 0x02
535 22:17:15.770857
536 22:17:15.771252 L0:00000000
537 22:17:15.771638 L1:00000703
538 22:17:15.772055 L2:00008067
539 22:17:15.772442 L3:15000000
540 22:17:15.775879 S1:00000000
541 22:17:15.776323 B2:20282000
542 22:17:15.776711 B1:a0f83180
543 22:17:15.777092
544 22:17:15.777478 TE: 70484
545 22:17:15.777857
546 22:17:15.781481 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 22:17:15.781899
548 22:17:15.787114 Board ID = 1
549 22:17:15.787532 Set cpu clk to 24M
550 22:17:15.787918 Set clk81 to 24M
551 22:17:15.792674 Use GP1_pll as DSU clk.
552 22:17:15.793091 DSU clk: 1200 Mhz
553 22:17:15.793474 CPU clk: 1200 MHz
554 22:17:15.798260 Set clk81 to 166.6M
555 22:17:15.803898 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 22:17:15.804420 board id: 1
557 22:17:15.811128 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 22:17:15.821804 fw parse done
559 22:17:15.826757 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 22:17:15.870292 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 22:17:15.881332 PIEI prepare done
562 22:17:15.881740 fastboot data load
563 22:17:15.882130 fastboot data verify
564 22:17:15.886945 verify result: 266
565 22:17:15.892477 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 22:17:15.892885 LPDDR4 probe
567 22:17:15.893270 ddr clk to 1584MHz
568 22:17:15.900478 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 22:17:15.937731
570 22:17:15.938178 dmc_version 0001
571 22:17:15.944454 Check phy result
572 22:17:15.950329 INFO : End of CA training
573 22:17:15.950743 INFO : End of initialization
574 22:17:15.955865 INFO : Training has run successfully!
575 22:17:15.956324 Check phy result
576 22:17:15.961481 INFO : End of initialization
577 22:17:15.961909 INFO : End of read enable training
578 22:17:15.967091 INFO : End of fine write leveling
579 22:17:15.972708 INFO : End of Write leveling coarse delay
580 22:17:15.973132 INFO : Training has run successfully!
581 22:17:15.973534 Check phy result
582 22:17:15.978296 INFO : End of initialization
583 22:17:15.978715 INFO : End of read dq deskew training
584 22:17:15.983878 INFO : End of MPR read delay center optimization
585 22:17:15.989505 INFO : End of write delay center optimization
586 22:17:15.995079 INFO : End of read delay center optimization
587 22:17:15.995511 INFO : End of max read latency training
588 22:17:16.000706 INFO : Training has run successfully!
589 22:17:16.001136 1D training succeed
590 22:17:16.009966 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 22:17:16.057542 Check phy result
592 22:17:16.057998 INFO : End of initialization
593 22:17:16.079904 INFO : End of 2D read delay Voltage center optimization
594 22:17:16.098067 INFO : End of 2D read delay Voltage center optimization
595 22:17:16.150883 INFO : End of 2D write delay Voltage center optimization
596 22:17:16.200091 INFO : End of 2D write delay Voltage center optimization
597 22:17:16.205597 INFO : Training has run successfully!
598 22:17:16.206027
599 22:17:16.206430 channel==0
600 22:17:16.211164 RxClkDly_Margin_A0==78 ps 8
601 22:17:16.211584 TxDqDly_Margin_A0==98 ps 10
602 22:17:16.214455 RxClkDly_Margin_A1==88 ps 9
603 22:17:16.214894 TxDqDly_Margin_A1==88 ps 9
604 22:17:16.220094 TrainedVREFDQ_A0==74
605 22:17:16.220570 TrainedVREFDQ_A1==75
606 22:17:16.221019 VrefDac_Margin_A0==23
607 22:17:16.225853 DeviceVref_Margin_A0==40
608 22:17:16.226497 VrefDac_Margin_A1==23
609 22:17:16.231427 DeviceVref_Margin_A1==39
610 22:17:16.232067
611 22:17:16.232537
612 22:17:16.232980 channel==1
613 22:17:16.233422 RxClkDly_Margin_A0==78 ps 8
614 22:17:16.237122 TxDqDly_Margin_A0==98 ps 10
615 22:17:16.237718 RxClkDly_Margin_A1==78 ps 8
616 22:17:16.242619 TxDqDly_Margin_A1==78 ps 8
617 22:17:16.243200 TrainedVREFDQ_A0==78
618 22:17:16.243668 TrainedVREFDQ_A1==75
619 22:17:16.248284 VrefDac_Margin_A0==22
620 22:17:16.248874 DeviceVref_Margin_A0==36
621 22:17:16.253880 VrefDac_Margin_A1==22
622 22:17:16.254523 DeviceVref_Margin_A1==39
623 22:17:16.254998
624 22:17:16.259355 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 22:17:16.259972
626 22:17:16.287376 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 22:17:16.293149 2D training succeed
628 22:17:16.298599 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 22:17:16.299155 auto size-- 65535DDR cs0 size: 2048MB
630 22:17:16.304279 DDR cs1 size: 2048MB
631 22:17:16.304840 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 22:17:16.309804 cs0 DataBus test pass
633 22:17:16.310379 cs1 DataBus test pass
634 22:17:16.310843 cs0 AddrBus test pass
635 22:17:16.315356 cs1 AddrBus test pass
636 22:17:16.315887
637 22:17:16.316398 100bdlr_step_size ps== 478
638 22:17:16.316859 result report
639 22:17:16.321023 boot times 0Enable ddr reg access
640 22:17:16.328467 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 22:17:16.341356 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 22:17:16.996613 bl2z: ptr: 05129330, size: 00001e40
643 22:17:17.003535 0.0;M3 CHK:0;cm4_sp_mode 0
644 22:17:17.004122 MVN_1=0x00000000
645 22:17:17.004592 MVN_2=0x00000000
646 22:17:17.015067 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 22:17:17.015595 OPS=0x04
648 22:17:17.016099 ring efuse init
649 22:17:17.020642 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 22:17:17.021185 [0.017310 Inits done]
651 22:17:17.021642 secure task start!
652 22:17:17.028506 high task start!
653 22:17:17.029048 low task start!
654 22:17:17.029507 run into bl31
655 22:17:17.037088 NOTICE: BL31: v1.3(release):4fc40b1
656 22:17:17.044972 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 22:17:17.045503 NOTICE: BL31: G12A normal boot!
658 22:17:17.060410 NOTICE: BL31: BL33 decompress pass
659 22:17:17.066214 ERROR: Error initializing runtime service opteed_fast
660 22:17:18.309903 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 22:17:18.310524 bl2_stage_init 0x01
662 22:17:18.311005 bl2_stage_init 0x81
663 22:17:18.315446 hw id: 0x0000 - pwm id 0x01
664 22:17:18.315956 bl2_stage_init 0xc1
665 22:17:18.321078 bl2_stage_init 0x02
666 22:17:18.321593
667 22:17:18.322055 L0:00000000
668 22:17:18.322501 L1:00000703
669 22:17:18.322941 L2:00008067
670 22:17:18.323379 L3:15000000
671 22:17:18.326626 S1:00000000
672 22:17:18.327127 B2:20282000
673 22:17:18.327581 B1:a0f83180
674 22:17:18.328058
675 22:17:18.328506 TE: 70657
676 22:17:18.328945
677 22:17:18.332241 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 22:17:18.332748
679 22:17:18.337832 Board ID = 1
680 22:17:18.338341 Set cpu clk to 24M
681 22:17:18.338795 Set clk81 to 24M
682 22:17:18.343444 Use GP1_pll as DSU clk.
683 22:17:18.343942 DSU clk: 1200 Mhz
684 22:17:18.344435 CPU clk: 1200 MHz
685 22:17:18.349182 Set clk81 to 166.6M
686 22:17:18.354577 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 22:17:18.355078 board id: 1
688 22:17:18.361766 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 22:17:18.372587 fw parse done
690 22:17:18.378518 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 22:17:18.421712 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 22:17:18.432807 PIEI prepare done
693 22:17:18.433329 fastboot data load
694 22:17:18.433796 fastboot data verify
695 22:17:18.438363 verify result: 266
696 22:17:18.444039 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 22:17:18.444566 LPDDR4 probe
698 22:17:18.445026 ddr clk to 1584MHz
699 22:17:18.451943 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 22:17:18.489826
701 22:17:18.490364 dmc_version 0001
702 22:17:18.496826 Check phy result
703 22:17:18.502674 INFO : End of CA training
704 22:17:18.503211 INFO : End of initialization
705 22:17:18.508448 INFO : Training has run successfully!
706 22:17:18.508974 Check phy result
707 22:17:18.514080 INFO : End of initialization
708 22:17:18.514594 INFO : End of read enable training
709 22:17:18.517268 INFO : End of fine write leveling
710 22:17:18.522833 INFO : End of Write leveling coarse delay
711 22:17:18.528423 INFO : Training has run successfully!
712 22:17:18.528936 Check phy result
713 22:17:18.529385 INFO : End of initialization
714 22:17:18.534089 INFO : End of read dq deskew training
715 22:17:18.539669 INFO : End of MPR read delay center optimization
716 22:17:18.540237 INFO : End of write delay center optimization
717 22:17:18.545180 INFO : End of read delay center optimization
718 22:17:18.550883 INFO : End of max read latency training
719 22:17:18.551404 INFO : Training has run successfully!
720 22:17:18.556437 1D training succeed
721 22:17:18.562450 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 22:17:18.610723 Check phy result
723 22:17:18.611297 INFO : End of initialization
724 22:17:18.637994 INFO : End of 2D read delay Voltage center optimization
725 22:17:18.662230 INFO : End of 2D read delay Voltage center optimization
726 22:17:18.718918 INFO : End of 2D write delay Voltage center optimization
727 22:17:18.772887 INFO : End of 2D write delay Voltage center optimization
728 22:17:18.778552 INFO : Training has run successfully!
729 22:17:18.779046
730 22:17:18.779502 channel==0
731 22:17:18.784118 RxClkDly_Margin_A0==78 ps 8
732 22:17:18.784614 TxDqDly_Margin_A0==88 ps 9
733 22:17:18.789721 RxClkDly_Margin_A1==88 ps 9
734 22:17:18.790222 TxDqDly_Margin_A1==98 ps 10
735 22:17:18.790677 TrainedVREFDQ_A0==74
736 22:17:18.795265 TrainedVREFDQ_A1==75
737 22:17:18.795761 VrefDac_Margin_A0==25
738 22:17:18.796262 DeviceVref_Margin_A0==40
739 22:17:18.800877 VrefDac_Margin_A1==23
740 22:17:18.801375 DeviceVref_Margin_A1==39
741 22:17:18.801824
742 22:17:18.802288
743 22:17:18.802756 channel==1
744 22:17:18.806543 RxClkDly_Margin_A0==88 ps 9
745 22:17:18.807041 TxDqDly_Margin_A0==98 ps 10
746 22:17:18.812261 RxClkDly_Margin_A1==78 ps 8
747 22:17:18.812762 TxDqDly_Margin_A1==88 ps 9
748 22:17:18.817662 TrainedVREFDQ_A0==78
749 22:17:18.818170 TrainedVREFDQ_A1==75
750 22:17:18.818626 VrefDac_Margin_A0==23
751 22:17:18.823322 DeviceVref_Margin_A0==36
752 22:17:18.823815 VrefDac_Margin_A1==22
753 22:17:18.828895 DeviceVref_Margin_A1==39
754 22:17:18.829387
755 22:17:18.829832 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 22:17:18.830270
757 22:17:18.862646 soc_vref_reg_value 0x 00000019 00000019 00000019 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 22:17:18.863183 2D training succeed
759 22:17:18.868086 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 22:17:18.873575 auto size-- 65535DDR cs0 size: 2048MB
761 22:17:18.874093 DDR cs1 size: 2048MB
762 22:17:18.879162 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 22:17:18.879666 cs0 DataBus test pass
764 22:17:18.884787 cs1 DataBus test pass
765 22:17:18.885288 cs0 AddrBus test pass
766 22:17:18.885744 cs1 AddrBus test pass
767 22:17:18.886192
768 22:17:18.890383 100bdlr_step_size ps== 478
769 22:17:18.890895 result report
770 22:17:18.895937 boot times 0Enable ddr reg access
771 22:17:18.901088 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 22:17:18.914682 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 22:17:19.574398 bl2z: ptr: 05129330, size: 00001e40
774 22:17:19.582163 0.0;M3 CHK:0;cm4_sp_mode 0
775 22:17:19.582725 MVN_1=0x00000000
776 22:17:19.583194 MVN_2=0x00000000
777 22:17:19.593499 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 22:17:19.594052 OPS=0x04
779 22:17:19.594517 ring efuse init
780 22:17:19.599176 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 22:17:19.599709 [0.017354 Inits done]
782 22:17:19.600208 secure task start!
783 22:17:19.606526 high task start!
784 22:17:19.607039 low task start!
785 22:17:19.607492 run into bl31
786 22:17:19.615149 NOTICE: BL31: v1.3(release):4fc40b1
787 22:17:19.622964 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 22:17:19.623472 NOTICE: BL31: G12A normal boot!
789 22:17:19.638542 NOTICE: BL31: BL33 decompress pass
790 22:17:19.644238 ERROR: Error initializing runtime service opteed_fast
791 22:17:20.439531
792 22:17:20.440214
793 22:17:20.445061 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 22:17:20.445587
795 22:17:20.448589 Model: Libre Computer AML-S905D3-CC Solitude
796 22:17:20.595651 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 22:17:20.610946 DRAM: 2 GiB (effective 3.8 GiB)
798 22:17:20.711913 Core: 406 devices, 33 uclasses, devicetree: separate
799 22:17:20.717833 WDT: Not starting watchdog@f0d0
800 22:17:20.742910 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 22:17:20.755125 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 22:17:20.760084 ** Bad device specification mmc 0 **
803 22:17:20.770195 Card did not respond to voltage select! : -110
804 22:17:20.777810 ** Bad device specification mmc 0 **
805 22:17:20.778329 Couldn't find partition mmc 0
806 22:17:20.786143 Card did not respond to voltage select! : -110
807 22:17:20.791839 ** Bad device specification mmc 0 **
808 22:17:20.792382 Couldn't find partition mmc 0
809 22:17:20.796730 Error: could not access storage.
810 22:17:21.093128 Net: eth0: ethernet@ff3f0000
811 22:17:21.093746 starting USB...
812 22:17:21.337856 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 22:17:21.338444 Starting the controller
814 22:17:21.344859 USB XHCI 1.10
815 22:17:22.898715 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 22:17:22.907103 scanning usb for storage devices... 0 Storage Device(s) found
818 22:17:22.958751 Hit any key to stop autoboot: 1
819 22:17:22.959616 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
820 22:17:22.960449 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
821 22:17:22.960985 Setting prompt string to ['=>']
822 22:17:22.961531 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
823 22:17:22.973168 0
824 22:17:22.974101 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 22:17:23.075386 => setenv autoload no
827 22:17:23.076214 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 22:17:23.081580 setenv autoload no
830 22:17:23.183122 => setenv initrd_high 0xffffffff
831 22:17:23.184094 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 22:17:23.188274 setenv initrd_high 0xffffffff
834 22:17:23.289789 => setenv fdt_high 0xffffffff
835 22:17:23.290484 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 22:17:23.294811 setenv fdt_high 0xffffffff
838 22:17:23.396389 => dhcp
839 22:17:23.397080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 22:17:23.401158 dhcp
841 22:17:24.407118 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 22:17:24.407747 Speed: 1000, full duplex
843 22:17:24.408277 BOOTP broadcast 1
844 22:17:24.418419 DHCP client bound to address 192.168.6.21 (10 ms)
846 22:17:24.520075 => setenv serverip 192.168.6.2
847 22:17:24.520857 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
848 22:17:24.525485 setenv serverip 192.168.6.2
850 22:17:24.627036 => tftpboot 0x01080000 963004/tftp-deploy-54gz64qm/kernel/uImage
851 22:17:24.627795 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
852 22:17:24.634615 tftpboot 0x01080000 963004/tftp-deploy-54gz64qm/kernel/uImage
853 22:17:24.635126 Speed: 1000, full duplex
854 22:17:24.635581 Using ethernet@ff3f0000 device
855 22:17:24.640190 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 22:17:24.645574 Filename '963004/tftp-deploy-54gz64qm/kernel/uImage'.
857 22:17:24.649473 Load address: 0x1080000
858 22:17:25.666139 Loading: *################## UDP wrong checksum 000000ff 0000deae
859 22:17:25.691838 UDP wrong checksum 000000ff 000075a1
860 22:17:27.560467 ################################ 43.6 MiB
861 22:17:27.560897 15 MiB/s
862 22:17:27.561125 done
863 22:17:27.564758 Bytes transferred = 45713984 (2b98a40 hex)
865 22:17:27.665893 => tftpboot 0x08000000 963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
866 22:17:27.666721 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
867 22:17:27.673705 tftpboot 0x08000000 963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot
868 22:17:27.674230 Speed: 1000, full duplex
869 22:17:27.674666 Using ethernet@ff3f0000 device
870 22:17:27.679115 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
871 22:17:27.688908 Filename '963004/tftp-deploy-54gz64qm/ramdisk/ramdisk.cpio.gz.uboot'.
872 22:17:27.689443 Load address: 0x8000000
873 22:17:29.169033 Loading: *################################################# UDP wrong checksum 00000005 0000e93a
874 22:17:34.169681 T UDP wrong checksum 00000005 0000e93a
875 22:17:35.894187 UDP wrong checksum 000000ff 00000983
876 22:17:35.907819 UDP wrong checksum 000000ff 00009f75
877 22:17:44.171509 T T UDP wrong checksum 00000005 0000e93a
878 22:17:54.785116 T T UDP wrong checksum 000000ff 00004e84
879 22:17:54.834723 UDP wrong checksum 000000ff 0000e976
880 22:17:57.164327 UDP wrong checksum 000000ff 00009b7a
881 22:17:57.201617 UDP wrong checksum 000000ff 0000206d
882 22:17:57.362675 UDP wrong checksum 000000ff 0000ac55
883 22:17:57.404048 UDP wrong checksum 000000ff 00003648
884 22:18:04.175649 T T UDP wrong checksum 00000005 0000e93a
885 22:18:09.632165 T UDP wrong checksum 000000ff 00001a80
886 22:18:09.691918 UDP wrong checksum 000000ff 0000ad72
887 22:18:24.180364 T T
888 22:18:24.180778 Retry count exceeded; starting again
890 22:18:24.183249 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
893 22:18:24.185093 end: 2.4 uboot-commands (duration 00:01:20) [common]
895 22:18:24.186416 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
897 22:18:24.187401 end: 2 uboot-action (duration 00:01:20) [common]
899 22:18:24.188946 Cleaning after the job
900 22:18:24.189489 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/ramdisk
901 22:18:24.190814 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/kernel
902 22:18:24.236148 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/dtb
903 22:18:24.236942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/nfsrootfs
904 22:18:24.262914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963004/tftp-deploy-54gz64qm/modules
905 22:18:24.269791 start: 4.1 power-off (timeout 00:00:30) [common]
906 22:18:24.270422 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
907 22:18:24.318338 >> OK - accepted request
908 22:18:24.320510 Returned 0 in 0 seconds
909 22:18:24.421407 end: 4.1 power-off (duration 00:00:00) [common]
911 22:18:24.422448 start: 4.2 read-feedback (timeout 00:10:00) [common]
912 22:18:24.423113 Listened to connection for namespace 'common' for up to 1s
913 22:18:25.424157 Finalising connection for namespace 'common'
914 22:18:25.424910 Disconnecting from shell: Finalise
915 22:18:25.425430 =>
916 22:18:25.526478 end: 4.2 read-feedback (duration 00:00:01) [common]
917 22:18:25.526948 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/963004
918 22:18:28.245093 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/963004
919 22:18:28.245687 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.