Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 15:46:46.278732 lava-dispatcher, installed at version: 2024.01
2 15:46:46.279513 start: 0 validate
3 15:46:46.280013 Start time: 2024-11-04 15:46:46.279962+00:00 (UTC)
4 15:46:46.280567 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 15:46:46.281102 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 15:46:46.324999 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 15:46:46.325574 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regulator%2Ffor-linus%2Fv6.12-rc3-2-g5e53e4a66bc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 15:46:46.355292 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 15:46:46.356230 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regulator%2Ffor-linus%2Fv6.12-rc3-2-g5e53e4a66bc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 15:46:46.385807 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 15:46:46.386263 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 15:46:46.419429 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 15:46:46.419882 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-regulator%2Ffor-linus%2Fv6.12-rc3-2-g5e53e4a66bc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 15:46:46.465176 validate duration: 0.19
16 15:46:46.466632 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 15:46:46.467256 start: 1.1 download-retry (timeout 00:10:00) [common]
18 15:46:46.467835 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 15:46:46.468846 Not decompressing ramdisk as can be used compressed.
20 15:46:46.469543 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 15:46:46.470045 saving as /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/ramdisk/initrd.cpio.gz
22 15:46:46.470547 total size: 5628140 (5 MB)
23 15:46:46.515194 progress 0 % (0 MB)
24 15:46:46.523310 progress 5 % (0 MB)
25 15:46:46.531785 progress 10 % (0 MB)
26 15:46:46.539514 progress 15 % (0 MB)
27 15:46:46.547773 progress 20 % (1 MB)
28 15:46:46.553369 progress 25 % (1 MB)
29 15:46:46.557321 progress 30 % (1 MB)
30 15:46:46.561266 progress 35 % (1 MB)
31 15:46:46.564809 progress 40 % (2 MB)
32 15:46:46.568716 progress 45 % (2 MB)
33 15:46:46.572222 progress 50 % (2 MB)
34 15:46:46.576156 progress 55 % (2 MB)
35 15:46:46.580075 progress 60 % (3 MB)
36 15:46:46.583548 progress 65 % (3 MB)
37 15:46:46.587457 progress 70 % (3 MB)
38 15:46:46.590936 progress 75 % (4 MB)
39 15:46:46.594829 progress 80 % (4 MB)
40 15:46:46.598344 progress 85 % (4 MB)
41 15:46:46.602212 progress 90 % (4 MB)
42 15:46:46.605780 progress 95 % (5 MB)
43 15:46:46.608992 progress 100 % (5 MB)
44 15:46:46.609620 5 MB downloaded in 0.14 s (38.60 MB/s)
45 15:46:46.610154 end: 1.1.1 http-download (duration 00:00:00) [common]
47 15:46:46.611034 end: 1.1 download-retry (duration 00:00:00) [common]
48 15:46:46.611322 start: 1.2 download-retry (timeout 00:10:00) [common]
49 15:46:46.611588 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 15:46:46.612090 downloading http://storage.kernelci.org/broonie-regulator/for-linus/v6.12-rc3-2-g5e53e4a66bc7/arm64/defconfig/gcc-12/kernel/Image
51 15:46:46.612349 saving as /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/kernel/Image
52 15:46:46.612559 total size: 45713920 (43 MB)
53 15:46:46.612769 No compression specified
54 15:46:46.649931 progress 0 % (0 MB)
55 15:46:46.678268 progress 5 % (2 MB)
56 15:46:46.707214 progress 10 % (4 MB)
57 15:46:46.736485 progress 15 % (6 MB)
58 15:46:46.765785 progress 20 % (8 MB)
59 15:46:46.794454 progress 25 % (10 MB)
60 15:46:46.823628 progress 30 % (13 MB)
61 15:46:46.852647 progress 35 % (15 MB)
62 15:46:46.881980 progress 40 % (17 MB)
63 15:46:46.910584 progress 45 % (19 MB)
64 15:46:46.939957 progress 50 % (21 MB)
65 15:46:46.969358 progress 55 % (24 MB)
66 15:46:46.998434 progress 60 % (26 MB)
67 15:46:47.027094 progress 65 % (28 MB)
68 15:46:47.056639 progress 70 % (30 MB)
69 15:46:47.087352 progress 75 % (32 MB)
70 15:46:47.116555 progress 80 % (34 MB)
71 15:46:47.144976 progress 85 % (37 MB)
72 15:46:47.174248 progress 90 % (39 MB)
73 15:46:47.203146 progress 95 % (41 MB)
74 15:46:47.231390 progress 100 % (43 MB)
75 15:46:47.231943 43 MB downloaded in 0.62 s (70.39 MB/s)
76 15:46:47.232466 end: 1.2.1 http-download (duration 00:00:01) [common]
78 15:46:47.233291 end: 1.2 download-retry (duration 00:00:01) [common]
79 15:46:47.233565 start: 1.3 download-retry (timeout 00:09:59) [common]
80 15:46:47.233834 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 15:46:47.234305 downloading http://storage.kernelci.org/broonie-regulator/for-linus/v6.12-rc3-2-g5e53e4a66bc7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 15:46:47.234578 saving as /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 15:46:47.234789 total size: 53209 (0 MB)
84 15:46:47.234998 No compression specified
85 15:46:47.280487 progress 61 % (0 MB)
86 15:46:47.281349 progress 100 % (0 MB)
87 15:46:47.281894 0 MB downloaded in 0.05 s (1.08 MB/s)
88 15:46:47.282363 end: 1.3.1 http-download (duration 00:00:00) [common]
90 15:46:47.283173 end: 1.3 download-retry (duration 00:00:00) [common]
91 15:46:47.283434 start: 1.4 download-retry (timeout 00:09:59) [common]
92 15:46:47.283697 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 15:46:47.284165 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 15:46:47.284427 saving as /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/nfsrootfs/full.rootfs.tar
95 15:46:47.284631 total size: 474398908 (452 MB)
96 15:46:47.284842 Using unxz to decompress xz
97 15:46:47.318184 progress 0 % (0 MB)
98 15:46:48.413403 progress 5 % (22 MB)
99 15:46:49.859525 progress 10 % (45 MB)
100 15:46:50.310050 progress 15 % (67 MB)
101 15:46:51.104939 progress 20 % (90 MB)
102 15:46:51.660582 progress 25 % (113 MB)
103 15:46:52.039921 progress 30 % (135 MB)
104 15:46:52.664669 progress 35 % (158 MB)
105 15:46:53.642052 progress 40 % (181 MB)
106 15:46:54.526454 progress 45 % (203 MB)
107 15:46:55.262765 progress 50 % (226 MB)
108 15:46:55.921635 progress 55 % (248 MB)
109 15:46:57.157000 progress 60 % (271 MB)
110 15:46:58.646682 progress 65 % (294 MB)
111 15:47:00.311492 progress 70 % (316 MB)
112 15:47:03.435651 progress 75 % (339 MB)
113 15:47:05.876289 progress 80 % (361 MB)
114 15:47:08.776454 progress 85 % (384 MB)
115 15:47:11.933541 progress 90 % (407 MB)
116 15:47:15.118034 progress 95 % (429 MB)
117 15:47:18.266360 progress 100 % (452 MB)
118 15:47:18.279185 452 MB downloaded in 30.99 s (14.60 MB/s)
119 15:47:18.280212 end: 1.4.1 http-download (duration 00:00:31) [common]
121 15:47:18.282018 end: 1.4 download-retry (duration 00:00:31) [common]
122 15:47:18.282598 start: 1.5 download-retry (timeout 00:09:28) [common]
123 15:47:18.283174 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 15:47:18.284359 downloading http://storage.kernelci.org/broonie-regulator/for-linus/v6.12-rc3-2-g5e53e4a66bc7/arm64/defconfig/gcc-12/modules.tar.xz
125 15:47:18.284907 saving as /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/modules/modules.tar
126 15:47:18.285367 total size: 11613116 (11 MB)
127 15:47:18.285836 Using unxz to decompress xz
128 15:47:18.330377 progress 0 % (0 MB)
129 15:47:18.396494 progress 5 % (0 MB)
130 15:47:18.469977 progress 10 % (1 MB)
131 15:47:18.565523 progress 15 % (1 MB)
132 15:47:18.657299 progress 20 % (2 MB)
133 15:47:18.736581 progress 25 % (2 MB)
134 15:47:18.811712 progress 30 % (3 MB)
135 15:47:18.889929 progress 35 % (3 MB)
136 15:47:18.962126 progress 40 % (4 MB)
137 15:47:19.038139 progress 45 % (5 MB)
138 15:47:19.123239 progress 50 % (5 MB)
139 15:47:19.202477 progress 55 % (6 MB)
140 15:47:19.287113 progress 60 % (6 MB)
141 15:47:19.367806 progress 65 % (7 MB)
142 15:47:19.448071 progress 70 % (7 MB)
143 15:47:19.526435 progress 75 % (8 MB)
144 15:47:19.610623 progress 80 % (8 MB)
145 15:47:19.692419 progress 85 % (9 MB)
146 15:47:19.770367 progress 90 % (9 MB)
147 15:47:19.848141 progress 95 % (10 MB)
148 15:47:19.927095 progress 100 % (11 MB)
149 15:47:19.938772 11 MB downloaded in 1.65 s (6.70 MB/s)
150 15:47:19.939364 end: 1.5.1 http-download (duration 00:00:02) [common]
152 15:47:19.940702 end: 1.5 download-retry (duration 00:00:02) [common]
153 15:47:19.941336 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 15:47:19.941927 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 15:47:35.822086 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/934548/extract-nfsrootfs-pt2ktuao
156 15:47:35.822725 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 15:47:35.823024 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 15:47:35.823763 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch
159 15:47:35.824289 makedir: /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin
160 15:47:35.824644 makedir: /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/tests
161 15:47:35.824980 makedir: /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/results
162 15:47:35.825354 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-add-keys
163 15:47:35.825952 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-add-sources
164 15:47:35.826646 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-background-process-start
165 15:47:35.827321 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-background-process-stop
166 15:47:35.827921 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-common-functions
167 15:47:35.828509 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-echo-ipv4
168 15:47:35.829031 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-install-packages
169 15:47:35.829565 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-installed-packages
170 15:47:35.830081 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-os-build
171 15:47:35.830591 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-probe-channel
172 15:47:35.831099 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-probe-ip
173 15:47:35.831619 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-target-ip
174 15:47:35.832168 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-target-mac
175 15:47:35.832688 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-target-storage
176 15:47:35.833208 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-case
177 15:47:35.833728 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-event
178 15:47:35.834229 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-feedback
179 15:47:35.834732 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-raise
180 15:47:35.835330 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-reference
181 15:47:35.835918 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-runner
182 15:47:35.836503 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-set
183 15:47:35.837046 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-test-shell
184 15:47:35.837604 Updating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-install-packages (oe)
185 15:47:35.838219 Updating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/bin/lava-installed-packages (oe)
186 15:47:35.838714 Creating /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/environment
187 15:47:35.839127 LAVA metadata
188 15:47:35.839418 - LAVA_JOB_ID=934548
189 15:47:35.839636 - LAVA_DISPATCHER_IP=192.168.6.2
190 15:47:35.840062 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 15:47:35.841236 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 15:47:35.841619 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 15:47:35.841835 skipped lava-vland-overlay
194 15:47:35.842084 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 15:47:35.842339 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 15:47:35.842565 skipped lava-multinode-overlay
197 15:47:35.842809 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 15:47:35.843060 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 15:47:35.843324 Loading test definitions
200 15:47:35.843618 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 15:47:35.843842 Using /lava-934548 at stage 0
202 15:47:35.845176 uuid=934548_1.6.2.4.1 testdef=None
203 15:47:35.845533 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 15:47:35.845807 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 15:47:35.847709 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 15:47:35.848607 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 15:47:35.851108 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 15:47:35.852041 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 15:47:35.854338 runner path: /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 934548_1.6.2.4.1
212 15:47:35.855038 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 15:47:35.855830 Creating lava-test-runner.conf files
215 15:47:35.856057 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/934548/lava-overlay-6gxpzmch/lava-934548/0 for stage 0
216 15:47:35.856442 - 0_v4l2-decoder-conformance-vp9
217 15:47:35.856821 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 15:47:35.857105 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 15:47:35.880033 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 15:47:35.880512 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 15:47:35.880776 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 15:47:35.881051 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 15:47:35.881324 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 15:47:36.553715 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 15:47:36.554200 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 15:47:36.554476 extracting modules file /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/934548/extract-nfsrootfs-pt2ktuao
227 15:47:37.899535 extracting modules file /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk
228 15:47:39.283515 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 15:47:39.284010 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 15:47:39.284311 [common] Applying overlay to NFS
231 15:47:39.284538 [common] Applying overlay /var/lib/lava/dispatcher/tmp/934548/compress-overlay-p4zuhdkf/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/934548/extract-nfsrootfs-pt2ktuao
232 15:47:39.313935 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 15:47:39.314356 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 15:47:39.314654 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 15:47:39.314898 Converting downloaded kernel to a uImage
236 15:47:39.315219 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/kernel/Image /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/kernel/uImage
237 15:47:39.771914 output: Image Name:
238 15:47:39.772371 output: Created: Mon Nov 4 15:47:39 2024
239 15:47:39.772601 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 15:47:39.772815 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 15:47:39.773024 output: Load Address: 01080000
242 15:47:39.773233 output: Entry Point: 01080000
243 15:47:39.773435 output:
244 15:47:39.773779 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 15:47:39.774056 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 15:47:39.774337 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 15:47:39.774604 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 15:47:39.774874 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 15:47:39.775138 Building ramdisk /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk
250 15:47:42.089466 >> 166779 blocks
251 15:47:49.771819 Adding RAMdisk u-boot header.
252 15:47:49.772578 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk.cpio.gz.uboot
253 15:47:50.064063 output: Image Name:
254 15:47:50.064879 output: Created: Mon Nov 4 15:47:49 2024
255 15:47:50.065475 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 15:47:50.066027 output: Data Size: 23423921 Bytes = 22874.92 KiB = 22.34 MiB
257 15:47:50.066563 output: Load Address: 00000000
258 15:47:50.067080 output: Entry Point: 00000000
259 15:47:50.067596 output:
260 15:47:50.068999 rename /var/lib/lava/dispatcher/tmp/934548/extract-overlay-ramdisk-ti3801q4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
261 15:47:50.069933 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 15:47:50.070657 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 15:47:50.071357 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 15:47:50.071958 No LXC device requested
265 15:47:50.072672 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 15:47:50.073349 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 15:47:50.074012 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 15:47:50.074548 Checking files for TFTP limit of 4294967296 bytes.
269 15:47:50.078047 end: 1 tftp-deploy (duration 00:01:04) [common]
270 15:47:50.078793 start: 2 uboot-action (timeout 00:05:00) [common]
271 15:47:50.079493 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 15:47:50.080190 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 15:47:50.080869 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 15:47:50.081559 Using kernel file from prepare-kernel: 934548/tftp-deploy-yr0g4a8h/kernel/uImage
275 15:47:50.082385 substitutions:
276 15:47:50.082955 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 15:47:50.083540 - {DTB_ADDR}: 0x01070000
278 15:47:50.084100 - {DTB}: 934548/tftp-deploy-yr0g4a8h/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 15:47:50.084626 - {INITRD}: 934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
280 15:47:50.085155 - {KERNEL_ADDR}: 0x01080000
281 15:47:50.085672 - {KERNEL}: 934548/tftp-deploy-yr0g4a8h/kernel/uImage
282 15:47:50.086186 - {LAVA_MAC}: None
283 15:47:50.086756 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/934548/extract-nfsrootfs-pt2ktuao
284 15:47:50.087277 - {NFS_SERVER_IP}: 192.168.6.2
285 15:47:50.087790 - {PRESEED_CONFIG}: None
286 15:47:50.088343 - {PRESEED_LOCAL}: None
287 15:47:50.088869 - {RAMDISK_ADDR}: 0x08000000
288 15:47:50.089380 - {RAMDISK}: 934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
289 15:47:50.089897 - {ROOT_PART}: None
290 15:47:50.090414 - {ROOT}: None
291 15:47:50.090921 - {SERVER_IP}: 192.168.6.2
292 15:47:50.091447 - {TEE_ADDR}: 0x83000000
293 15:47:50.091957 - {TEE}: None
294 15:47:50.092516 Parsed boot commands:
295 15:47:50.093027 - setenv autoload no
296 15:47:50.093544 - setenv initrd_high 0xffffffff
297 15:47:50.094059 - setenv fdt_high 0xffffffff
298 15:47:50.094574 - dhcp
299 15:47:50.095098 - setenv serverip 192.168.6.2
300 15:47:50.095613 - tftpboot 0x01080000 934548/tftp-deploy-yr0g4a8h/kernel/uImage
301 15:47:50.096162 - tftpboot 0x08000000 934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
302 15:47:50.096685 - tftpboot 0x01070000 934548/tftp-deploy-yr0g4a8h/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 15:47:50.097210 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/934548/extract-nfsrootfs-pt2ktuao,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 15:47:50.097737 - bootm 0x01080000 0x08000000 0x01070000
305 15:47:50.098434 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 15:47:50.100474 start: 2.3 connect-device (timeout 00:05:00) [common]
308 15:47:50.101053 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 15:47:50.117949 Setting prompt string to ['lava-test: # ']
310 15:47:50.119831 end: 2.3 connect-device (duration 00:00:00) [common]
311 15:47:50.120717 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 15:47:50.121627 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 15:47:50.122352 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 15:47:50.123788 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 15:47:50.162623 >> OK - accepted request
316 15:47:50.164895 Returned 0 in 0 seconds
317 15:47:50.266404 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 15:47:50.268659 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 15:47:50.269417 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 15:47:50.270106 Setting prompt string to ['Hit any key to stop autoboot']
322 15:47:50.270731 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 15:47:50.272811 Trying 192.168.56.21...
324 15:47:50.273504 Connected to conserv1.
325 15:47:50.274109 Escape character is '^]'.
326 15:47:50.274686
327 15:47:50.275273 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 15:47:50.275850
329 15:47:57.925109 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 15:47:57.925791 bl2_stage_init 0x01
331 15:47:57.926221 bl2_stage_init 0x81
332 15:47:57.930600 hw id: 0x0000 - pwm id 0x01
333 15:47:57.931079 bl2_stage_init 0xc1
334 15:47:57.937789 bl2_stage_init 0x02
335 15:47:57.938132
336 15:47:57.938357 L0:00000000
337 15:47:57.938567 L1:00000703
338 15:47:57.938779 L2:00008067
339 15:47:57.938988 L3:15000000
340 15:47:57.942127 S1:00000000
341 15:47:57.942475 B2:20282000
342 15:47:57.942688 B1:a0f83180
343 15:47:57.942897
344 15:47:57.943104 TE: 69094
345 15:47:57.943316
346 15:47:57.947415 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 15:47:57.947748
348 15:47:57.952824 Board ID = 1
349 15:47:57.953143 Set cpu clk to 24M
350 15:47:57.953358 Set clk81 to 24M
351 15:47:57.958465 Use GP1_pll as DSU clk.
352 15:47:57.958800 DSU clk: 1200 Mhz
353 15:47:57.959021 CPU clk: 1200 MHz
354 15:47:57.964003 Set clk81 to 166.6M
355 15:47:57.969649 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 15:47:57.970112 board id: 1
357 15:47:57.976888 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 15:47:57.987786 fw parse done
359 15:47:57.993757 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 15:47:58.036879 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 15:47:58.047951 PIEI prepare done
362 15:47:58.048429 fastboot data load
363 15:47:58.048832 fastboot data verify
364 15:47:58.053644 verify result: 266
365 15:47:58.059179 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 15:47:58.059622 LPDDR4 probe
367 15:47:58.060046 ddr clk to 1584MHz
368 15:47:58.067169 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 15:47:58.105158
370 15:47:58.105686 dmc_version 0001
371 15:47:58.112138 Check phy result
372 15:47:58.118016 INFO : End of CA training
373 15:47:58.118469 INFO : End of initialization
374 15:47:58.123469 INFO : Training has run successfully!
375 15:47:58.123926 Check phy result
376 15:47:58.129130 INFO : End of initialization
377 15:47:58.129608 INFO : End of read enable training
378 15:47:58.132485 INFO : End of fine write leveling
379 15:47:58.138096 INFO : End of Write leveling coarse delay
380 15:47:58.143800 INFO : Training has run successfully!
381 15:47:58.144284 Check phy result
382 15:47:58.144686 INFO : End of initialization
383 15:47:58.149702 INFO : End of read dq deskew training
384 15:47:58.154928 INFO : End of MPR read delay center optimization
385 15:47:58.155382 INFO : End of write delay center optimization
386 15:47:58.160621 INFO : End of read delay center optimization
387 15:47:58.166482 INFO : End of max read latency training
388 15:47:58.166876 INFO : Training has run successfully!
389 15:47:58.172560 1D training succeed
390 15:47:58.177692 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 15:47:58.225945 Check phy result
392 15:47:58.226602 INFO : End of initialization
393 15:47:58.253194 INFO : End of 2D read delay Voltage center optimization
394 15:47:58.277553 INFO : End of 2D read delay Voltage center optimization
395 15:47:58.334463 INFO : End of 2D write delay Voltage center optimization
396 15:47:58.388307 INFO : End of 2D write delay Voltage center optimization
397 15:47:58.393915 INFO : Training has run successfully!
398 15:47:58.394412
399 15:47:58.394782 channel==0
400 15:47:58.399272 RxClkDly_Margin_A0==78 ps 8
401 15:47:58.399879 TxDqDly_Margin_A0==98 ps 10
402 15:47:58.404990 RxClkDly_Margin_A1==69 ps 7
403 15:47:58.405518 TxDqDly_Margin_A1==88 ps 9
404 15:47:58.405938 TrainedVREFDQ_A0==74
405 15:47:58.410580 TrainedVREFDQ_A1==74
406 15:47:58.411125 VrefDac_Margin_A0==22
407 15:47:58.411536 DeviceVref_Margin_A0==40
408 15:47:58.416318 VrefDac_Margin_A1==23
409 15:47:58.416878 DeviceVref_Margin_A1==40
410 15:47:58.417282
411 15:47:58.417684
412 15:47:58.418084 channel==1
413 15:47:58.421881 RxClkDly_Margin_A0==78 ps 8
414 15:47:58.422401 TxDqDly_Margin_A0==88 ps 9
415 15:47:58.427385 RxClkDly_Margin_A1==78 ps 8
416 15:47:58.427922 TxDqDly_Margin_A1==78 ps 8
417 15:47:58.432903 TrainedVREFDQ_A0==77
418 15:47:58.433447 TrainedVREFDQ_A1==75
419 15:47:58.433860 VrefDac_Margin_A0==22
420 15:47:58.440433 DeviceVref_Margin_A0==37
421 15:47:58.440867 VrefDac_Margin_A1==22
422 15:47:58.441109 DeviceVref_Margin_A1==39
423 15:47:58.444267
424 15:47:58.444589 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 15:47:58.444814
426 15:47:58.478135 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 15:47:58.478607 2D training succeed
428 15:47:58.483353 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 15:47:58.488679 auto size-- 65535DDR cs0 size: 2048MB
430 15:47:58.489016 DDR cs1 size: 2048MB
431 15:47:58.494395 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 15:47:58.494725 cs0 DataBus test pass
433 15:47:58.499917 cs1 DataBus test pass
434 15:47:58.500303 cs0 AddrBus test pass
435 15:47:58.500528 cs1 AddrBus test pass
436 15:47:58.500743
437 15:47:58.505704 100bdlr_step_size ps== 471
438 15:47:58.506097 result report
439 15:47:58.511110 boot times 0Enable ddr reg access
440 15:47:58.516179 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 15:47:58.530223 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 15:47:59.190418 bl2z: ptr: 05129330, size: 00001e40
443 15:47:59.198670 0.0;M3 CHK:0;cm4_sp_mode 0
444 15:47:59.199036 MVN_1=0x00000000
445 15:47:59.199264 MVN_2=0x00000000
446 15:47:59.210055 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 15:47:59.210439 OPS=0x04
448 15:47:59.210668 ring efuse init
449 15:47:59.216507 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 15:47:59.216828 [0.017354 Inits done]
451 15:47:59.217049 secure task start!
452 15:47:59.223838 high task start!
453 15:47:59.224253 low task start!
454 15:47:59.224480 run into bl31
455 15:47:59.232340 NOTICE: BL31: v1.3(release):4fc40b1
456 15:47:59.240146 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 15:47:59.240492 NOTICE: BL31: G12A normal boot!
458 15:47:59.255780 NOTICE: BL31: BL33 decompress pass
459 15:47:59.261434 ERROR: Error initializing runtime service opteed_fast
460 15:48:01.894866 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 15:48:01.895300 bl2_stage_init 0x01
462 15:48:01.895521 bl2_stage_init 0x81
463 15:48:01.900344 hw id: 0x0000 - pwm id 0x01
464 15:48:01.900624 bl2_stage_init 0xc1
465 15:48:01.906074 bl2_stage_init 0x02
466 15:48:01.906348
467 15:48:01.906564 L0:00000000
468 15:48:01.906773 L1:00000703
469 15:48:01.906981 L2:00008067
470 15:48:01.907183 L3:15000000
471 15:48:01.911536 S1:00000000
472 15:48:01.911806 B2:20282000
473 15:48:01.912044 B1:a0f83180
474 15:48:01.912252
475 15:48:01.912452 TE: 69194
476 15:48:01.912651
477 15:48:01.917116 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 15:48:01.917381
479 15:48:01.922691 Board ID = 1
480 15:48:01.922948 Set cpu clk to 24M
481 15:48:01.923154 Set clk81 to 24M
482 15:48:01.928309 Use GP1_pll as DSU clk.
483 15:48:01.928567 DSU clk: 1200 Mhz
484 15:48:01.928774 CPU clk: 1200 MHz
485 15:48:01.933922 Set clk81 to 166.6M
486 15:48:01.939561 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 15:48:01.939855 board id: 1
488 15:48:01.946751 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 15:48:01.957411 fw parse done
490 15:48:01.963346 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 15:48:02.006011 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 15:48:02.016996 PIEI prepare done
493 15:48:02.017285 fastboot data load
494 15:48:02.017492 fastboot data verify
495 15:48:02.022562 verify result: 266
496 15:48:02.028183 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 15:48:02.028452 LPDDR4 probe
498 15:48:02.028658 ddr clk to 1584MHz
499 15:48:02.036234 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 15:48:02.073434
501 15:48:02.073811 dmc_version 0001
502 15:48:02.080068 Check phy result
503 15:48:02.085949 INFO : End of CA training
504 15:48:02.086237 INFO : End of initialization
505 15:48:02.091591 INFO : Training has run successfully!
506 15:48:02.091887 Check phy result
507 15:48:02.097233 INFO : End of initialization
508 15:48:02.097528 INFO : End of read enable training
509 15:48:02.102807 INFO : End of fine write leveling
510 15:48:02.108367 INFO : End of Write leveling coarse delay
511 15:48:02.108665 INFO : Training has run successfully!
512 15:48:02.108889 Check phy result
513 15:48:02.114002 INFO : End of initialization
514 15:48:02.114283 INFO : End of read dq deskew training
515 15:48:02.119621 INFO : End of MPR read delay center optimization
516 15:48:02.125200 INFO : End of write delay center optimization
517 15:48:02.130811 INFO : End of read delay center optimization
518 15:48:02.131107 INFO : End of max read latency training
519 15:48:02.136416 INFO : Training has run successfully!
520 15:48:02.136732 1D training succeed
521 15:48:02.144717 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 15:48:02.193186 Check phy result
523 15:48:02.193567 INFO : End of initialization
524 15:48:02.215551 INFO : End of 2D read delay Voltage center optimization
525 15:48:02.234655 INFO : End of 2D read delay Voltage center optimization
526 15:48:02.286615 INFO : End of 2D write delay Voltage center optimization
527 15:48:02.335846 INFO : End of 2D write delay Voltage center optimization
528 15:48:02.341253 INFO : Training has run successfully!
529 15:48:02.341523
530 15:48:02.341753 channel==0
531 15:48:02.346840 RxClkDly_Margin_A0==78 ps 8
532 15:48:02.347106 TxDqDly_Margin_A0==98 ps 10
533 15:48:02.350219 RxClkDly_Margin_A1==88 ps 9
534 15:48:02.350477 TxDqDly_Margin_A1==88 ps 9
535 15:48:02.355817 TrainedVREFDQ_A0==74
536 15:48:02.356164 TrainedVREFDQ_A1==74
537 15:48:02.356380 VrefDac_Margin_A0==22
538 15:48:02.361378 DeviceVref_Margin_A0==40
539 15:48:02.361671 VrefDac_Margin_A1==23
540 15:48:02.367105 DeviceVref_Margin_A1==40
541 15:48:02.367418
542 15:48:02.367641
543 15:48:02.367854 channel==1
544 15:48:02.368092 RxClkDly_Margin_A0==88 ps 9
545 15:48:02.372535 TxDqDly_Margin_A0==98 ps 10
546 15:48:02.372813 RxClkDly_Margin_A1==78 ps 8
547 15:48:02.378190 TxDqDly_Margin_A1==88 ps 9
548 15:48:02.378471 TrainedVREFDQ_A0==78
549 15:48:02.378691 TrainedVREFDQ_A1==75
550 15:48:02.383839 VrefDac_Margin_A0==22
551 15:48:02.384161 DeviceVref_Margin_A0==36
552 15:48:02.389427 VrefDac_Margin_A1==22
553 15:48:02.389736 DeviceVref_Margin_A1==39
554 15:48:02.389958
555 15:48:02.394981 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 15:48:02.395248
557 15:48:02.423004 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 15:48:02.428563 2D training succeed
559 15:48:02.434241 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 15:48:02.434536 auto size-- 65535DDR cs0 size: 2048MB
561 15:48:02.439807 DDR cs1 size: 2048MB
562 15:48:02.440120 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 15:48:02.445413 cs0 DataBus test pass
564 15:48:02.445665 cs1 DataBus test pass
565 15:48:02.445869 cs0 AddrBus test pass
566 15:48:02.450944 cs1 AddrBus test pass
567 15:48:02.451193
568 15:48:02.451406 100bdlr_step_size ps== 478
569 15:48:02.451613 result report
570 15:48:02.456567 boot times 0Enable ddr reg access
571 15:48:02.464038 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 15:48:02.477854 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 15:48:03.132470 bl2z: ptr: 05129330, size: 00001e40
574 15:48:03.138874 0.0;M3 CHK:0;cm4_sp_mode 0
575 15:48:03.139147 MVN_1=0x00000000
576 15:48:03.139358 MVN_2=0x00000000
577 15:48:03.150370 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 15:48:03.150636 OPS=0x04
579 15:48:03.150850 ring efuse init
580 15:48:03.156020 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 15:48:03.156293 [0.017319 Inits done]
582 15:48:03.156502 secure task start!
583 15:48:03.163434 high task start!
584 15:48:03.163686 low task start!
585 15:48:03.163895 run into bl31
586 15:48:03.172077 NOTICE: BL31: v1.3(release):4fc40b1
587 15:48:03.179869 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 15:48:03.180191 NOTICE: BL31: G12A normal boot!
589 15:48:03.195373 NOTICE: BL31: BL33 decompress pass
590 15:48:03.200996 ERROR: Error initializing runtime service opteed_fast
591 15:48:04.597998 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 15:48:04.598420 bl2_stage_init 0x01
593 15:48:04.598629 bl2_stage_init 0x81
594 15:48:04.603309 hw id: 0x0000 - pwm id 0x01
595 15:48:04.603686 bl2_stage_init 0xc1
596 15:48:04.607182 bl2_stage_init 0x02
597 15:48:04.607553
598 15:48:04.607871 L0:00000000
599 15:48:04.608129 L1:00000703
600 15:48:04.612704 L2:00008067
601 15:48:04.612959 L3:15000000
602 15:48:04.613165 S1:00000000
603 15:48:04.613365 B2:20282000
604 15:48:04.613563 B1:a0f83180
605 15:48:04.613762
606 15:48:04.618338 TE: 70255
607 15:48:04.618703
608 15:48:04.623904 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 15:48:04.624316
610 15:48:04.624648 Board ID = 1
611 15:48:04.624962 Set cpu clk to 24M
612 15:48:04.627428 Set clk81 to 24M
613 15:48:04.627780 Use GP1_pll as DSU clk.
614 15:48:04.632974 DSU clk: 1200 Mhz
615 15:48:04.633336 CPU clk: 1200 MHz
616 15:48:04.633646 Set clk81 to 166.6M
617 15:48:04.638548 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 15:48:04.644193 board id: 1
619 15:48:04.648774 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 15:48:04.660466 fw parse done
621 15:48:04.666553 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 15:48:04.709711 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 15:48:04.720697 PIEI prepare done
624 15:48:04.720980 fastboot data load
625 15:48:04.721193 fastboot data verify
626 15:48:04.726317 verify result: 266
627 15:48:04.731896 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 15:48:04.732179 LPDDR4 probe
629 15:48:04.732402 ddr clk to 1584MHz
630 15:48:04.739878 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 15:48:04.777667
632 15:48:04.778061 dmc_version 0001
633 15:48:04.784686 Check phy result
634 15:48:04.790584 INFO : End of CA training
635 15:48:04.790845 INFO : End of initialization
636 15:48:04.796186 INFO : Training has run successfully!
637 15:48:04.796446 Check phy result
638 15:48:04.801879 INFO : End of initialization
639 15:48:04.802133 INFO : End of read enable training
640 15:48:04.805132 INFO : End of fine write leveling
641 15:48:04.810689 INFO : End of Write leveling coarse delay
642 15:48:04.816330 INFO : Training has run successfully!
643 15:48:04.816591 Check phy result
644 15:48:04.816800 INFO : End of initialization
645 15:48:04.821921 INFO : End of read dq deskew training
646 15:48:04.827587 INFO : End of MPR read delay center optimization
647 15:48:04.827961 INFO : End of write delay center optimization
648 15:48:04.833187 INFO : End of read delay center optimization
649 15:48:04.838773 INFO : End of max read latency training
650 15:48:04.839235 INFO : Training has run successfully!
651 15:48:04.844393 1D training succeed
652 15:48:04.850373 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 15:48:04.898489 Check phy result
654 15:48:04.898954 INFO : End of initialization
655 15:48:04.925833 INFO : End of 2D read delay Voltage center optimization
656 15:48:04.949963 INFO : End of 2D read delay Voltage center optimization
657 15:48:05.006736 INFO : End of 2D write delay Voltage center optimization
658 15:48:05.060619 INFO : End of 2D write delay Voltage center optimization
659 15:48:05.066190 INFO : Training has run successfully!
660 15:48:05.066668
661 15:48:05.067100 channel==0
662 15:48:05.071746 RxClkDly_Margin_A0==78 ps 8
663 15:48:05.072277 TxDqDly_Margin_A0==98 ps 10
664 15:48:05.077351 RxClkDly_Margin_A1==69 ps 7
665 15:48:05.077843 TxDqDly_Margin_A1==88 ps 9
666 15:48:05.078269 TrainedVREFDQ_A0==76
667 15:48:05.082995 TrainedVREFDQ_A1==74
668 15:48:05.083476 VrefDac_Margin_A0==24
669 15:48:05.083895 DeviceVref_Margin_A0==38
670 15:48:05.088605 VrefDac_Margin_A1==22
671 15:48:05.089086 DeviceVref_Margin_A1==40
672 15:48:05.089508
673 15:48:05.089921
674 15:48:05.090328 channel==1
675 15:48:05.094173 RxClkDly_Margin_A0==78 ps 8
676 15:48:05.094652 TxDqDly_Margin_A0==98 ps 10
677 15:48:05.099732 RxClkDly_Margin_A1==78 ps 8
678 15:48:05.100243 TxDqDly_Margin_A1==88 ps 9
679 15:48:05.105434 TrainedVREFDQ_A0==78
680 15:48:05.105963 TrainedVREFDQ_A1==75
681 15:48:05.106405 VrefDac_Margin_A0==22
682 15:48:05.111011 DeviceVref_Margin_A0==36
683 15:48:05.111504 VrefDac_Margin_A1==22
684 15:48:05.116638 DeviceVref_Margin_A1==39
685 15:48:05.117129
686 15:48:05.117558 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 15:48:05.117978
688 15:48:05.150191 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 15:48:05.150723 2D training succeed
690 15:48:05.155752 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 15:48:05.161381 auto size-- 65535DDR cs0 size: 2048MB
692 15:48:05.161874 DDR cs1 size: 2048MB
693 15:48:05.167023 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 15:48:05.167507 cs0 DataBus test pass
695 15:48:05.172644 cs1 DataBus test pass
696 15:48:05.173140 cs0 AddrBus test pass
697 15:48:05.173564 cs1 AddrBus test pass
698 15:48:05.173974
699 15:48:05.178208 100bdlr_step_size ps== 471
700 15:48:05.178711 result report
701 15:48:05.183790 boot times 0Enable ddr reg access
702 15:48:05.188994 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 15:48:05.202778 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 15:48:05.861636 bl2z: ptr: 05129330, size: 00001e40
705 15:48:05.870126 0.0;M3 CHK:0;cm4_sp_mode 0
706 15:48:05.870659 MVN_1=0x00000000
707 15:48:05.871092 MVN_2=0x00000000
708 15:48:05.881654 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 15:48:05.882166 OPS=0x04
710 15:48:05.882597 ring efuse init
711 15:48:05.887226 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 15:48:05.887731 [0.017354 Inits done]
713 15:48:05.888183 secure task start!
714 15:48:05.894419 high task start!
715 15:48:05.894915 low task start!
716 15:48:05.895341 run into bl31
717 15:48:05.902953 NOTICE: BL31: v1.3(release):4fc40b1
718 15:48:05.910757 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 15:48:05.911257 NOTICE: BL31: G12A normal boot!
720 15:48:05.926343 NOTICE: BL31: BL33 decompress pass
721 15:48:05.932055 ERROR: Error initializing runtime service opteed_fast
722 15:48:06.726140
723 15:48:06.726798
724 15:48:06.731545 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 15:48:06.732131
726 15:48:06.735025 Model: Libre Computer AML-S905D3-CC Solitude
727 15:48:06.881984 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 15:48:06.897365 DRAM: 2 GiB (effective 3.8 GiB)
729 15:48:06.998261 Core: 406 devices, 33 uclasses, devicetree: separate
730 15:48:07.004131 WDT: Not starting watchdog@f0d0
731 15:48:07.029124 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 15:48:07.041504 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 15:48:07.046418 ** Bad device specification mmc 0 **
734 15:48:07.056487 Card did not respond to voltage select! : -110
735 15:48:07.064113 ** Bad device specification mmc 0 **
736 15:48:07.064589 Couldn't find partition mmc 0
737 15:48:07.072467 Card did not respond to voltage select! : -110
738 15:48:07.077982 ** Bad device specification mmc 0 **
739 15:48:07.078465 Couldn't find partition mmc 0
740 15:48:07.083016 Error: could not access storage.
741 15:48:07.380510 Net: eth0: ethernet@ff3f0000
742 15:48:07.380974 starting USB...
743 15:48:07.625181 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 15:48:07.625612 Starting the controller
745 15:48:07.632143 USB XHCI 1.10
746 15:48:09.188902 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 15:48:09.197204 scanning usb for storage devices... 0 Storage Device(s) found
749 15:48:09.248666 Hit any key to stop autoboot: 1
750 15:48:09.249641 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 15:48:09.250252 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 15:48:09.250735 Setting prompt string to ['=>']
753 15:48:09.251216 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 15:48:09.263290 0
755 15:48:09.264212 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 15:48:09.365436 => setenv autoload no
758 15:48:09.366338 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 15:48:09.371227 setenv autoload no
761 15:48:09.472691 => setenv initrd_high 0xffffffff
762 15:48:09.473319 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 15:48:09.477804 setenv initrd_high 0xffffffff
765 15:48:09.579197 => setenv fdt_high 0xffffffff
766 15:48:09.579824 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 15:48:09.584295 setenv fdt_high 0xffffffff
769 15:48:09.685745 => dhcp
770 15:48:09.686379 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 15:48:09.690980 dhcp
772 15:48:10.646479 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 15:48:10.647098 Speed: 1000, full duplex
774 15:48:10.647526 BOOTP broadcast 1
775 15:48:10.674885 DHCP client bound to address 192.168.6.21 (29 ms)
777 15:48:10.776562 => setenv serverip 192.168.6.2
778 15:48:10.777554 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 15:48:10.781937 setenv serverip 192.168.6.2
781 15:48:10.883537 => tftpboot 0x01080000 934548/tftp-deploy-yr0g4a8h/kernel/uImage
782 15:48:10.884633 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 15:48:10.891257 tftpboot 0x01080000 934548/tftp-deploy-yr0g4a8h/kernel/uImage
784 15:48:10.891809 Speed: 1000, full duplex
785 15:48:10.892270 Using ethernet@ff3f0000 device
786 15:48:10.896733 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 15:48:10.902265 Filename '934548/tftp-deploy-yr0g4a8h/kernel/uImage'.
788 15:48:10.906189 Load address: 0x1080000
789 15:48:13.662594 Loading: *################################################## 43.6 MiB
790 15:48:13.663208 15.8 MiB/s
791 15:48:13.663637 done
792 15:48:13.667199 Bytes transferred = 45713984 (2b98a40 hex)
794 15:48:13.768750 => tftpboot 0x08000000 934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
795 15:48:13.769415 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 15:48:13.776271 tftpboot 0x08000000 934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot
797 15:48:13.776738 Speed: 1000, full duplex
798 15:48:13.777133 Using ethernet@ff3f0000 device
799 15:48:13.781771 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 15:48:13.791561 Filename '934548/tftp-deploy-yr0g4a8h/ramdisk/ramdisk.cpio.gz.uboot'.
801 15:48:13.792055 Load address: 0x8000000
802 15:48:15.215549 Loading: *################################################# UDP wrong checksum 00000005 0000a57e
803 15:48:17.825952 UDP wrong checksum 000000ff 0000b02e
804 15:48:17.865441 UDP wrong checksum 000000ff 00004021
805 15:48:20.217112 T UDP wrong checksum 00000005 0000a57e
806 15:48:29.307606 T UDP wrong checksum 000000ff 0000e2ac
807 15:48:29.346791 UDP wrong checksum 000000ff 00003b37
808 15:48:30.218967 T UDP wrong checksum 00000005 0000a57e
809 15:48:50.222741 T T T T UDP wrong checksum 00000005 0000a57e
810 15:49:10.227414 T T T
811 15:49:10.228069 Retry count exceeded; starting again
813 15:49:10.229483 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
816 15:49:10.231307 end: 2.4 uboot-commands (duration 00:01:20) [common]
818 15:49:10.232832 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
820 15:49:10.233849 end: 2 uboot-action (duration 00:01:20) [common]
822 15:49:10.235326 Cleaning after the job
823 15:49:10.235824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/ramdisk
824 15:49:10.236949 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/kernel
825 15:49:10.280984 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/dtb
826 15:49:10.281890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/nfsrootfs
827 15:49:10.591067 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/934548/tftp-deploy-yr0g4a8h/modules
828 15:49:10.610135 start: 4.1 power-off (timeout 00:00:30) [common]
829 15:49:10.610785 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
830 15:49:10.643261 >> OK - accepted request
831 15:49:10.645325 Returned 0 in 0 seconds
832 15:49:10.746201 end: 4.1 power-off (duration 00:00:00) [common]
834 15:49:10.747233 start: 4.2 read-feedback (timeout 00:10:00) [common]
835 15:49:10.748239 Listened to connection for namespace 'common' for up to 1s
836 15:49:11.748921 Finalising connection for namespace 'common'
837 15:49:11.749466 Disconnecting from shell: Finalise
838 15:49:11.749793 =>
839 15:49:11.850562 end: 4.2 read-feedback (duration 00:00:01) [common]
840 15:49:11.851076 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/934548
841 15:49:14.415666 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/934548
842 15:49:14.416339 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.