Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:54:21.671192 lava-dispatcher, installed at version: 2024.01
2 17:54:21.672006 start: 0 validate
3 17:54:21.672499 Start time: 2024-11-07 17:54:21.672468+00:00 (UTC)
4 17:54:21.673039 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:54:21.673596 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 17:54:21.719347 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:54:21.719863 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-linus%2Fasoc-fix-v6.12-rc5-5-g94debe5eaa0ad%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:54:21.753845 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:54:21.754794 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-linus%2Fasoc-fix-v6.12-rc5-5-g94debe5eaa0ad%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 17:54:21.789465 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:54:21.789949 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 17:54:21.821563 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 17:54:21.822068 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-linus%2Fasoc-fix-v6.12-rc5-5-g94debe5eaa0ad%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 17:54:21.873411 validate duration: 0.20
16 17:54:21.874843 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 17:54:21.875422 start: 1.1 download-retry (timeout 00:10:00) [common]
18 17:54:21.876025 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 17:54:21.876977 Not decompressing ramdisk as can be used compressed.
20 17:54:21.877734 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 17:54:21.878229 saving as /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/ramdisk/initrd.cpio.gz
22 17:54:21.878712 total size: 5628169 (5 MB)
23 17:54:21.925276 progress 0 % (0 MB)
24 17:54:21.932834 progress 5 % (0 MB)
25 17:54:21.940583 progress 10 % (0 MB)
26 17:54:21.947438 progress 15 % (0 MB)
27 17:54:21.954969 progress 20 % (1 MB)
28 17:54:21.960970 progress 25 % (1 MB)
29 17:54:21.965073 progress 30 % (1 MB)
30 17:54:21.969067 progress 35 % (1 MB)
31 17:54:21.972631 progress 40 % (2 MB)
32 17:54:21.976626 progress 45 % (2 MB)
33 17:54:21.980227 progress 50 % (2 MB)
34 17:54:21.984236 progress 55 % (2 MB)
35 17:54:21.988166 progress 60 % (3 MB)
36 17:54:21.991819 progress 65 % (3 MB)
37 17:54:21.995785 progress 70 % (3 MB)
38 17:54:21.999356 progress 75 % (4 MB)
39 17:54:22.003282 progress 80 % (4 MB)
40 17:54:22.006830 progress 85 % (4 MB)
41 17:54:22.010636 progress 90 % (4 MB)
42 17:54:22.014211 progress 95 % (5 MB)
43 17:54:22.017495 progress 100 % (5 MB)
44 17:54:22.018160 5 MB downloaded in 0.14 s (38.49 MB/s)
45 17:54:22.018673 end: 1.1.1 http-download (duration 00:00:00) [common]
47 17:54:22.019558 end: 1.1 download-retry (duration 00:00:00) [common]
48 17:54:22.019845 start: 1.2 download-retry (timeout 00:10:00) [common]
49 17:54:22.020151 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 17:54:22.020644 downloading http://storage.kernelci.org/broonie-sound/for-linus/asoc-fix-v6.12-rc5-5-g94debe5eaa0ad/arm64/defconfig/gcc-12/kernel/Image
51 17:54:22.020895 saving as /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/kernel/Image
52 17:54:22.021104 total size: 45713920 (43 MB)
53 17:54:22.021314 No compression specified
54 17:54:22.054185 progress 0 % (0 MB)
55 17:54:22.083536 progress 5 % (2 MB)
56 17:54:22.112303 progress 10 % (4 MB)
57 17:54:22.140935 progress 15 % (6 MB)
58 17:54:22.169332 progress 20 % (8 MB)
59 17:54:22.197929 progress 25 % (10 MB)
60 17:54:22.226583 progress 30 % (13 MB)
61 17:54:22.255264 progress 35 % (15 MB)
62 17:54:22.284473 progress 40 % (17 MB)
63 17:54:22.313943 progress 45 % (19 MB)
64 17:54:22.343527 progress 50 % (21 MB)
65 17:54:22.372785 progress 55 % (24 MB)
66 17:54:22.402248 progress 60 % (26 MB)
67 17:54:22.431306 progress 65 % (28 MB)
68 17:54:22.459955 progress 70 % (30 MB)
69 17:54:22.488603 progress 75 % (32 MB)
70 17:54:22.517232 progress 80 % (34 MB)
71 17:54:22.545688 progress 85 % (37 MB)
72 17:54:22.575777 progress 90 % (39 MB)
73 17:54:22.604478 progress 95 % (41 MB)
74 17:54:22.632059 progress 100 % (43 MB)
75 17:54:22.632581 43 MB downloaded in 0.61 s (71.30 MB/s)
76 17:54:22.633043 end: 1.2.1 http-download (duration 00:00:01) [common]
78 17:54:22.633851 end: 1.2 download-retry (duration 00:00:01) [common]
79 17:54:22.634120 start: 1.3 download-retry (timeout 00:09:59) [common]
80 17:54:22.634381 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 17:54:22.634845 downloading http://storage.kernelci.org/broonie-sound/for-linus/asoc-fix-v6.12-rc5-5-g94debe5eaa0ad/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 17:54:22.635108 saving as /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/dtb/meson-g12b-a311d-libretech-cc.dtb
83 17:54:22.635315 total size: 54703 (0 MB)
84 17:54:22.635521 No compression specified
85 17:54:22.671480 progress 59 % (0 MB)
86 17:54:22.672355 progress 100 % (0 MB)
87 17:54:22.672913 0 MB downloaded in 0.04 s (1.39 MB/s)
88 17:54:22.673366 end: 1.3.1 http-download (duration 00:00:00) [common]
90 17:54:22.674166 end: 1.3 download-retry (duration 00:00:00) [common]
91 17:54:22.674423 start: 1.4 download-retry (timeout 00:09:59) [common]
92 17:54:22.674682 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 17:54:22.675139 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 17:54:22.675373 saving as /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/nfsrootfs/full.rootfs.tar
95 17:54:22.675577 total size: 120894716 (115 MB)
96 17:54:22.675783 Using unxz to decompress xz
97 17:54:22.718056 progress 0 % (0 MB)
98 17:54:23.508019 progress 5 % (5 MB)
99 17:54:24.354058 progress 10 % (11 MB)
100 17:54:25.146917 progress 15 % (17 MB)
101 17:54:25.889487 progress 20 % (23 MB)
102 17:54:26.486752 progress 25 % (28 MB)
103 17:54:27.314293 progress 30 % (34 MB)
104 17:54:28.117881 progress 35 % (40 MB)
105 17:54:28.490330 progress 40 % (46 MB)
106 17:54:28.874001 progress 45 % (51 MB)
107 17:54:29.704461 progress 50 % (57 MB)
108 17:54:30.740210 progress 55 % (63 MB)
109 17:54:31.654334 progress 60 % (69 MB)
110 17:54:32.439263 progress 65 % (74 MB)
111 17:54:33.209623 progress 70 % (80 MB)
112 17:54:34.026759 progress 75 % (86 MB)
113 17:54:34.810122 progress 80 % (92 MB)
114 17:54:35.568883 progress 85 % (98 MB)
115 17:54:36.422010 progress 90 % (103 MB)
116 17:54:37.201912 progress 95 % (109 MB)
117 17:54:38.029906 progress 100 % (115 MB)
118 17:54:38.042466 115 MB downloaded in 15.37 s (7.50 MB/s)
119 17:54:38.043453 end: 1.4.1 http-download (duration 00:00:15) [common]
121 17:54:38.045219 end: 1.4 download-retry (duration 00:00:15) [common]
122 17:54:38.045773 start: 1.5 download-retry (timeout 00:09:44) [common]
123 17:54:38.046318 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 17:54:38.047243 downloading http://storage.kernelci.org/broonie-sound/for-linus/asoc-fix-v6.12-rc5-5-g94debe5eaa0ad/arm64/defconfig/gcc-12/modules.tar.xz
125 17:54:38.047768 saving as /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/modules/modules.tar
126 17:54:38.048246 total size: 11609576 (11 MB)
127 17:54:38.048696 Using unxz to decompress xz
128 17:54:38.094975 progress 0 % (0 MB)
129 17:54:38.163381 progress 5 % (0 MB)
130 17:54:38.238181 progress 10 % (1 MB)
131 17:54:38.333198 progress 15 % (1 MB)
132 17:54:38.424835 progress 20 % (2 MB)
133 17:54:38.503602 progress 25 % (2 MB)
134 17:54:38.579024 progress 30 % (3 MB)
135 17:54:38.656400 progress 35 % (3 MB)
136 17:54:38.729737 progress 40 % (4 MB)
137 17:54:38.805278 progress 45 % (5 MB)
138 17:54:38.889347 progress 50 % (5 MB)
139 17:54:38.966374 progress 55 % (6 MB)
140 17:54:39.051863 progress 60 % (6 MB)
141 17:54:39.134791 progress 65 % (7 MB)
142 17:54:39.216761 progress 70 % (7 MB)
143 17:54:39.296344 progress 75 % (8 MB)
144 17:54:39.380024 progress 80 % (8 MB)
145 17:54:39.460414 progress 85 % (9 MB)
146 17:54:39.540028 progress 90 % (9 MB)
147 17:54:39.618302 progress 95 % (10 MB)
148 17:54:39.695543 progress 100 % (11 MB)
149 17:54:39.706821 11 MB downloaded in 1.66 s (6.68 MB/s)
150 17:54:39.707411 end: 1.5.1 http-download (duration 00:00:02) [common]
152 17:54:39.708517 end: 1.5 download-retry (duration 00:00:02) [common]
153 17:54:39.709032 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 17:54:39.709538 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 17:54:56.419782 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953299/extract-nfsrootfs-5lhd7l4q
156 17:54:56.420423 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 17:54:56.420714 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 17:54:56.421334 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n
159 17:54:56.421770 makedir: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin
160 17:54:56.422095 makedir: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/tests
161 17:54:56.422410 makedir: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/results
162 17:54:56.422747 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-add-keys
163 17:54:56.423290 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-add-sources
164 17:54:56.423808 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-background-process-start
165 17:54:56.424347 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-background-process-stop
166 17:54:56.424878 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-common-functions
167 17:54:56.425371 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-echo-ipv4
168 17:54:56.425850 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-install-packages
169 17:54:56.426325 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-installed-packages
170 17:54:56.426794 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-os-build
171 17:54:56.427266 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-probe-channel
172 17:54:56.427741 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-probe-ip
173 17:54:56.428239 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-target-ip
174 17:54:56.428820 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-target-mac
175 17:54:56.429319 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-target-storage
176 17:54:56.429805 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-case
177 17:54:56.430287 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-event
178 17:54:56.430756 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-feedback
179 17:54:56.431232 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-raise
180 17:54:56.431723 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-reference
181 17:54:56.432284 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-runner
182 17:54:56.432779 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-set
183 17:54:56.433254 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-test-shell
184 17:54:56.433743 Updating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-add-keys (debian)
185 17:54:56.434271 Updating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-add-sources (debian)
186 17:54:56.434775 Updating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-install-packages (debian)
187 17:54:56.435271 Updating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-installed-packages (debian)
188 17:54:56.435758 Updating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/bin/lava-os-build (debian)
189 17:54:56.436216 Creating /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/environment
190 17:54:56.436594 LAVA metadata
191 17:54:56.436853 - LAVA_JOB_ID=953299
192 17:54:56.437067 - LAVA_DISPATCHER_IP=192.168.6.2
193 17:54:56.437427 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 17:54:56.438385 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 17:54:56.438695 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 17:54:56.438902 skipped lava-vland-overlay
197 17:54:56.439141 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 17:54:56.439395 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 17:54:56.439615 skipped lava-multinode-overlay
200 17:54:56.439856 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 17:54:56.440131 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 17:54:56.440379 Loading test definitions
203 17:54:56.440657 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 17:54:56.440877 Using /lava-953299 at stage 0
205 17:54:56.441986 uuid=953299_1.6.2.4.1 testdef=None
206 17:54:56.442296 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 17:54:56.442560 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 17:54:56.444138 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 17:54:56.444931 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 17:54:56.446865 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 17:54:56.447681 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 17:54:56.449570 runner path: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/0/tests/0_timesync-off test_uuid 953299_1.6.2.4.1
215 17:54:56.450125 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 17:54:56.450934 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 17:54:56.451156 Using /lava-953299 at stage 0
219 17:54:56.451506 Fetching tests from https://github.com/kernelci/test-definitions.git
220 17:54:56.451794 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/0/tests/1_kselftest-rtc'
221 17:54:59.819583 Running '/usr/bin/git checkout kernelci.org
222 17:55:00.267647 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 17:55:00.270116 uuid=953299_1.6.2.4.5 testdef=None
224 17:55:00.270767 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 17:55:00.272334 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 17:55:00.277711 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 17:55:00.279315 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 17:55:00.286458 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 17:55:00.288165 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 17:55:00.295119 runner path: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/0/tests/1_kselftest-rtc test_uuid 953299_1.6.2.4.5
234 17:55:00.295658 BOARD='meson-g12b-a311d-libretech-cc'
235 17:55:00.296114 BRANCH='broonie-sound'
236 17:55:00.296527 SKIPFILE='/dev/null'
237 17:55:00.296928 SKIP_INSTALL='True'
238 17:55:00.297322 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-linus/asoc-fix-v6.12-rc5-5-g94debe5eaa0ad/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 17:55:00.297724 TST_CASENAME=''
240 17:55:00.298117 TST_CMDFILES='rtc'
241 17:55:00.299121 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 17:55:00.300714 Creating lava-test-runner.conf files
244 17:55:00.301137 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953299/lava-overlay-zs_z1l2n/lava-953299/0 for stage 0
245 17:55:00.302000 - 0_timesync-off
246 17:55:00.302499 - 1_kselftest-rtc
247 17:55:00.303156 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 17:55:00.303718 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 17:55:23.517488 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 17:55:23.517937 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 17:55:23.518198 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 17:55:23.518467 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 17:55:23.518732 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 17:55:24.165491 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 17:55:24.165964 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 17:55:24.166218 extracting modules file /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953299/extract-nfsrootfs-5lhd7l4q
257 17:55:25.519346 extracting modules file /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk
258 17:55:26.941969 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 17:55:26.942483 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 17:55:26.942770 [common] Applying overlay to NFS
261 17:55:26.942987 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953299/compress-overlay-cn742kmr/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953299/extract-nfsrootfs-5lhd7l4q
262 17:55:29.680062 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 17:55:29.680518 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 17:55:29.680790 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 17:55:29.681022 Converting downloaded kernel to a uImage
266 17:55:29.681331 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/kernel/Image /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/kernel/uImage
267 17:55:30.161689 output: Image Name:
268 17:55:30.162110 output: Created: Thu Nov 7 17:55:29 2024
269 17:55:30.162330 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 17:55:30.162537 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 17:55:30.162738 output: Load Address: 01080000
272 17:55:30.162938 output: Entry Point: 01080000
273 17:55:30.163136 output:
274 17:55:30.163467 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 17:55:30.163733 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 17:55:30.164035 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 17:55:30.164302 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 17:55:30.164562 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 17:55:30.164816 Building ramdisk /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk
280 17:55:32.355324 >> 166783 blocks
281 17:55:40.064013 Adding RAMdisk u-boot header.
282 17:55:40.064679 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk.cpio.gz.uboot
283 17:55:40.301766 output: Image Name:
284 17:55:40.302170 output: Created: Thu Nov 7 17:55:40 2024
285 17:55:40.302384 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 17:55:40.302588 output: Data Size: 23429577 Bytes = 22880.45 KiB = 22.34 MiB
287 17:55:40.302790 output: Load Address: 00000000
288 17:55:40.302989 output: Entry Point: 00000000
289 17:55:40.303187 output:
290 17:55:40.303859 rename /var/lib/lava/dispatcher/tmp/953299/extract-overlay-ramdisk-d6mke6f2/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
291 17:55:40.304559 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 17:55:40.305156 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 17:55:40.305729 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 17:55:40.306227 No LXC device requested
295 17:55:40.306774 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 17:55:40.307331 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 17:55:40.307874 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 17:55:40.308366 Checking files for TFTP limit of 4294967296 bytes.
299 17:55:40.311268 end: 1 tftp-deploy (duration 00:01:18) [common]
300 17:55:40.311891 start: 2 uboot-action (timeout 00:05:00) [common]
301 17:55:40.312508 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 17:55:40.313058 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 17:55:40.313614 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 17:55:40.314189 Using kernel file from prepare-kernel: 953299/tftp-deploy-wn6hwk_f/kernel/uImage
305 17:55:40.314880 substitutions:
306 17:55:40.315333 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 17:55:40.315783 - {DTB_ADDR}: 0x01070000
308 17:55:40.316260 - {DTB}: 953299/tftp-deploy-wn6hwk_f/dtb/meson-g12b-a311d-libretech-cc.dtb
309 17:55:40.316711 - {INITRD}: 953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
310 17:55:40.317154 - {KERNEL_ADDR}: 0x01080000
311 17:55:40.317591 - {KERNEL}: 953299/tftp-deploy-wn6hwk_f/kernel/uImage
312 17:55:40.318027 - {LAVA_MAC}: None
313 17:55:40.318501 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953299/extract-nfsrootfs-5lhd7l4q
314 17:55:40.318937 - {NFS_SERVER_IP}: 192.168.6.2
315 17:55:40.319366 - {PRESEED_CONFIG}: None
316 17:55:40.319796 - {PRESEED_LOCAL}: None
317 17:55:40.320302 - {RAMDISK_ADDR}: 0x08000000
318 17:55:40.320738 - {RAMDISK}: 953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
319 17:55:40.321169 - {ROOT_PART}: None
320 17:55:40.321599 - {ROOT}: None
321 17:55:40.322030 - {SERVER_IP}: 192.168.6.2
322 17:55:40.322456 - {TEE_ADDR}: 0x83000000
323 17:55:40.322882 - {TEE}: None
324 17:55:40.323312 Parsed boot commands:
325 17:55:40.323726 - setenv autoload no
326 17:55:40.324188 - setenv initrd_high 0xffffffff
327 17:55:40.324612 - setenv fdt_high 0xffffffff
328 17:55:40.325035 - dhcp
329 17:55:40.325456 - setenv serverip 192.168.6.2
330 17:55:40.325880 - tftpboot 0x01080000 953299/tftp-deploy-wn6hwk_f/kernel/uImage
331 17:55:40.326307 - tftpboot 0x08000000 953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
332 17:55:40.326734 - tftpboot 0x01070000 953299/tftp-deploy-wn6hwk_f/dtb/meson-g12b-a311d-libretech-cc.dtb
333 17:55:40.327164 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953299/extract-nfsrootfs-5lhd7l4q,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 17:55:40.327604 - bootm 0x01080000 0x08000000 0x01070000
335 17:55:40.328167 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 17:55:40.329788 start: 2.3 connect-device (timeout 00:05:00) [common]
338 17:55:40.330246 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 17:55:40.346415 Setting prompt string to ['lava-test: # ']
340 17:55:40.348094 end: 2.3 connect-device (duration 00:00:00) [common]
341 17:55:40.348783 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 17:55:40.349407 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 17:55:40.349970 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 17:55:40.351207 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 17:55:40.389153 >> OK - accepted request
346 17:55:40.391234 Returned 0 in 0 seconds
347 17:55:40.492430 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 17:55:40.494185 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 17:55:40.494798 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 17:55:40.495351 Setting prompt string to ['Hit any key to stop autoboot']
352 17:55:40.495841 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 17:55:40.497613 Trying 192.168.56.21...
354 17:55:40.498130 Connected to conserv1.
355 17:55:40.498581 Escape character is '^]'.
356 17:55:40.499041
357 17:55:40.499490 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 17:55:40.499948
359 17:55:51.601702 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 17:55:51.602390 bl2_stage_init 0x01
361 17:55:51.602895 bl2_stage_init 0x81
362 17:55:51.607676 hw id: 0x0000 - pwm id 0x01
363 17:55:51.608302 bl2_stage_init 0xc1
364 17:55:51.608764 bl2_stage_init 0x02
365 17:55:51.609219
366 17:55:51.612836 L0:00000000
367 17:55:51.613333 L1:20000703
368 17:55:51.613787 L2:00008067
369 17:55:51.614232 L3:14000000
370 17:55:51.618319 B2:00402000
371 17:55:51.618801 B1:e0f83180
372 17:55:51.619245
373 17:55:51.619676 TE: 58159
374 17:55:51.620140
375 17:55:51.623546 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 17:55:51.624037
377 17:55:51.624472 Board ID = 1
378 17:55:51.629210 Set A53 clk to 24M
379 17:55:51.629670 Set A73 clk to 24M
380 17:55:51.630100 Set clk81 to 24M
381 17:55:51.634829 A53 clk: 1200 MHz
382 17:55:51.635287 A73 clk: 1200 MHz
383 17:55:51.635713 CLK81: 166.6M
384 17:55:51.636180 smccc: 00012ab5
385 17:55:51.640333 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 17:55:51.645983 board id: 1
387 17:55:51.650928 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 17:55:51.662476 fw parse done
389 17:55:51.668521 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 17:55:51.710677 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 17:55:51.722239 PIEI prepare done
392 17:55:51.722692 fastboot data load
393 17:55:51.723123 fastboot data verify
394 17:55:51.727589 verify result: 266
395 17:55:51.733197 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 17:55:51.733655 LPDDR4 probe
397 17:55:51.734085 ddr clk to 1584MHz
398 17:55:51.741186 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 17:55:51.778468
400 17:55:51.778973 dmc_version 0001
401 17:55:51.785174 Check phy result
402 17:55:51.791031 INFO : End of CA training
403 17:55:51.791509 INFO : End of initialization
404 17:55:51.796576 INFO : Training has run successfully!
405 17:55:51.797057 Check phy result
406 17:55:51.802157 INFO : End of initialization
407 17:55:51.802636 INFO : End of read enable training
408 17:55:51.805445 INFO : End of fine write leveling
409 17:55:51.811017 INFO : End of Write leveling coarse delay
410 17:55:51.818111 INFO : Training has run successfully!
411 17:55:51.818586 Check phy result
412 17:55:51.819034 INFO : End of initialization
413 17:55:51.822181 INFO : End of read dq deskew training
414 17:55:51.827771 INFO : End of MPR read delay center optimization
415 17:55:51.828297 INFO : End of write delay center optimization
416 17:55:51.833365 INFO : End of read delay center optimization
417 17:55:51.839015 INFO : End of max read latency training
418 17:55:51.839489 INFO : Training has run successfully!
419 17:55:51.844534 1D training succeed
420 17:55:51.850583 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 17:55:51.900272 Check phy result
422 17:55:51.900819 INFO : End of initialization
423 17:55:51.920721 INFO : End of 2D read delay Voltage center optimization
424 17:55:51.940843 INFO : End of 2D read delay Voltage center optimization
425 17:55:51.992753 INFO : End of 2D write delay Voltage center optimization
426 17:55:52.042041 INFO : End of 2D write delay Voltage center optimization
427 17:55:52.047591 INFO : Training has run successfully!
428 17:55:52.048159
429 17:55:52.048630 channel==0
430 17:55:52.053183 RxClkDly_Margin_A0==88 ps 9
431 17:55:52.053698 TxDqDly_Margin_A0==98 ps 10
432 17:55:52.056597 RxClkDly_Margin_A1==88 ps 9
433 17:55:52.057101 TxDqDly_Margin_A1==98 ps 10
434 17:55:52.062210 TrainedVREFDQ_A0==74
435 17:55:52.062721 TrainedVREFDQ_A1==74
436 17:55:52.063181 VrefDac_Margin_A0==24
437 17:55:52.067769 DeviceVref_Margin_A0==40
438 17:55:52.068318 VrefDac_Margin_A1==24
439 17:55:52.073298 DeviceVref_Margin_A1==40
440 17:55:52.073818
441 17:55:52.074272
442 17:55:52.074719 channel==1
443 17:55:52.075157 RxClkDly_Margin_A0==98 ps 10
444 17:55:52.079003 TxDqDly_Margin_A0==98 ps 10
445 17:55:52.079514 RxClkDly_Margin_A1==88 ps 9
446 17:55:52.084577 TxDqDly_Margin_A1==88 ps 9
447 17:55:52.085098 TrainedVREFDQ_A0==77
448 17:55:52.085551 TrainedVREFDQ_A1==77
449 17:55:52.090133 VrefDac_Margin_A0==22
450 17:55:52.090642 DeviceVref_Margin_A0==37
451 17:55:52.095807 VrefDac_Margin_A1==24
452 17:55:52.096345 DeviceVref_Margin_A1==37
453 17:55:52.096795
454 17:55:52.101422 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 17:55:52.101936
456 17:55:52.129341 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 17:55:52.135009 2D training succeed
458 17:55:52.140454 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 17:55:52.140971 auto size-- 65535DDR cs0 size: 2048MB
460 17:55:52.146066 DDR cs1 size: 2048MB
461 17:55:52.146577 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 17:55:52.151712 cs0 DataBus test pass
463 17:55:52.152289 cs1 DataBus test pass
464 17:55:52.152745 cs0 AddrBus test pass
465 17:55:52.157237 cs1 AddrBus test pass
466 17:55:52.157744
467 17:55:52.158198 100bdlr_step_size ps== 420
468 17:55:52.158656 result report
469 17:55:52.162887 boot times 0Enable ddr reg access
470 17:55:52.170415 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 17:55:52.183819 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 17:55:52.755816 0.0;M3 CHK:0;cm4_sp_mode 0
473 17:55:52.756522 MVN_1=0x00000000
474 17:55:52.761248 MVN_2=0x00000000
475 17:55:52.767002 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 17:55:52.767494 OPS=0x10
477 17:55:52.767950 ring efuse init
478 17:55:52.768436 chipver efuse init
479 17:55:52.772621 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 17:55:52.778200 [0.018960 Inits done]
481 17:55:52.778679 secure task start!
482 17:55:52.779127 high task start!
483 17:55:52.782808 low task start!
484 17:55:52.783294 run into bl31
485 17:55:52.789426 NOTICE: BL31: v1.3(release):4fc40b1
486 17:55:52.797280 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 17:55:52.797775 NOTICE: BL31: G12A normal boot!
488 17:55:52.822665 NOTICE: BL31: BL33 decompress pass
489 17:55:52.828335 ERROR: Error initializing runtime service opteed_fast
490 17:55:54.061368
491 17:55:54.062044
492 17:55:54.069740 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 17:55:54.070301
494 17:55:54.070769 Model: Libre Computer AML-A311D-CC Alta
495 17:55:54.278238 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 17:55:54.301533 DRAM: 2 GiB (effective 3.8 GiB)
497 17:55:54.444531 Core: 408 devices, 31 uclasses, devicetree: separate
498 17:55:54.450355 WDT: Not starting watchdog@f0d0
499 17:55:54.482610 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 17:55:54.495178 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 17:55:54.500128 ** Bad device specification mmc 0 **
502 17:55:54.510403 Card did not respond to voltage select! : -110
503 17:55:54.518086 ** Bad device specification mmc 0 **
504 17:55:54.518612 Couldn't find partition mmc 0
505 17:55:54.526436 Card did not respond to voltage select! : -110
506 17:55:54.532018 ** Bad device specification mmc 0 **
507 17:55:54.532572 Couldn't find partition mmc 0
508 17:55:54.537051 Error: could not access storage.
509 17:55:55.801283 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
510 17:55:55.801972 bl2_stage_init 0x81
511 17:55:55.806794 hw id: 0x0000 - pwm id 0x01
512 17:55:55.807330 bl2_stage_init 0xc1
513 17:55:55.807801 bl2_stage_init 0x02
514 17:55:55.808314
515 17:55:55.812393 L0:00000000
516 17:55:55.812893 L1:20000703
517 17:55:55.813345 L2:00008067
518 17:55:55.813786 L3:14000000
519 17:55:55.814227 B2:00402000
520 17:55:55.815227 B1:e0f83180
521 17:55:55.815707
522 17:55:55.816202 TE: 58150
523 17:55:55.816627
524 17:55:55.826362 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 17:55:55.826886
526 17:55:55.827345 Board ID = 1
527 17:55:55.827786 Set A53 clk to 24M
528 17:55:55.828271 Set A73 clk to 24M
529 17:55:55.831953 Set clk81 to 24M
530 17:55:55.832431 A53 clk: 1200 MHz
531 17:55:55.832926 A73 clk: 1200 MHz
532 17:55:55.837602 CLK81: 166.6M
533 17:55:55.838086 smccc: 00012aac
534 17:55:55.843216 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 17:55:55.843700 board id: 1
536 17:55:55.851802 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 17:55:55.862432 fw parse done
538 17:55:55.868404 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 17:55:55.911051 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 17:55:55.921955 PIEI prepare done
541 17:55:55.922439 fastboot data load
542 17:55:55.922893 fastboot data verify
543 17:55:55.927662 verify result: 266
544 17:55:55.933276 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 17:55:55.933779 LPDDR4 probe
546 17:55:55.934243 ddr clk to 1584MHz
547 17:55:55.941249 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 17:55:55.978475
549 17:55:55.979050 dmc_version 0001
550 17:55:55.985179 Check phy result
551 17:55:55.991058 INFO : End of CA training
552 17:55:55.991585 INFO : End of initialization
553 17:55:55.996653 INFO : Training has run successfully!
554 17:55:55.997153 Check phy result
555 17:55:56.002251 INFO : End of initialization
556 17:55:56.002749 INFO : End of read enable training
557 17:55:56.007827 INFO : End of fine write leveling
558 17:55:56.013444 INFO : End of Write leveling coarse delay
559 17:55:56.013938 INFO : Training has run successfully!
560 17:55:56.014387 Check phy result
561 17:55:56.019026 INFO : End of initialization
562 17:55:56.019521 INFO : End of read dq deskew training
563 17:55:56.024629 INFO : End of MPR read delay center optimization
564 17:55:56.030283 INFO : End of write delay center optimization
565 17:55:56.035854 INFO : End of read delay center optimization
566 17:55:56.036402 INFO : End of max read latency training
567 17:55:56.041449 INFO : Training has run successfully!
568 17:55:56.041949 1D training succeed
569 17:55:56.050603 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 17:55:56.098189 Check phy result
571 17:55:56.098687 INFO : End of initialization
572 17:55:56.120639 INFO : End of 2D read delay Voltage center optimization
573 17:55:56.141005 INFO : End of 2D read delay Voltage center optimization
574 17:55:56.193049 INFO : End of 2D write delay Voltage center optimization
575 17:55:56.242327 INFO : End of 2D write delay Voltage center optimization
576 17:55:56.248038 INFO : Training has run successfully!
577 17:55:56.248385
578 17:55:56.248638 channel==0
579 17:55:56.253556 RxClkDly_Margin_A0==88 ps 9
580 17:55:56.254047 TxDqDly_Margin_A0==98 ps 10
581 17:55:56.259021 RxClkDly_Margin_A1==88 ps 9
582 17:55:56.259362 TxDqDly_Margin_A1==88 ps 9
583 17:55:56.259606 TrainedVREFDQ_A0==74
584 17:55:56.264634 TrainedVREFDQ_A1==74
585 17:55:56.266488 VrefDac_Margin_A0==24
586 17:55:56.266822 DeviceVref_Margin_A0==40
587 17:55:56.270278 VrefDac_Margin_A1==24
588 17:55:56.271770 DeviceVref_Margin_A1==40
589 17:55:56.272250
590 17:55:56.272637
591 17:55:56.273007 channel==1
592 17:55:56.276058 RxClkDly_Margin_A0==98 ps 10
593 17:55:56.276391 TxDqDly_Margin_A0==88 ps 9
594 17:55:56.281461 RxClkDly_Margin_A1==98 ps 10
595 17:55:56.281801 TxDqDly_Margin_A1==88 ps 9
596 17:55:56.287030 TrainedVREFDQ_A0==77
597 17:55:56.287386 TrainedVREFDQ_A1==77
598 17:55:56.287632 VrefDac_Margin_A0==22
599 17:55:56.292826 DeviceVref_Margin_A0==37
600 17:55:56.293312 VrefDac_Margin_A1==22
601 17:55:56.298243 DeviceVref_Margin_A1==37
602 17:55:56.298715
603 17:55:56.299097 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 17:55:56.299373
605 17:55:56.331909 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
606 17:55:56.332655 2D training succeed
607 17:55:56.337564 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 17:55:56.343176 auto size-- 65535DDR cs0 size: 2048MB
609 17:55:56.345630 DDR cs1 size: 2048MB
610 17:55:56.348732 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 17:55:56.349317 cs0 DataBus test pass
612 17:55:56.354379 cs1 DataBus test pass
613 17:55:56.356068 cs0 AddrBus test pass
614 17:55:56.356329 cs1 AddrBus test pass
615 17:55:56.356551
616 17:55:56.360554 100bdlr_step_size ps== 420
617 17:55:56.361181 result report
618 17:55:56.365525 boot times 0Enable ddr reg access
619 17:55:56.370898 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 17:55:56.385123 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 17:55:56.958020 0.0;M3 CHK:0;cm4_sp_mode 0
622 17:55:56.958928 MVN_1=0x00000000
623 17:55:56.963435 MVN_2=0x00000000
624 17:55:56.969360 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 17:55:56.969976 OPS=0x10
626 17:55:56.970386 ring efuse init
627 17:55:56.970786 chipver efuse init
628 17:55:56.974735 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 17:55:56.980773 [0.018961 Inits done]
630 17:55:56.981171 secure task start!
631 17:55:56.981430 high task start!
632 17:55:56.985001 low task start!
633 17:55:56.985392 run into bl31
634 17:55:56.991685 NOTICE: BL31: v1.3(release):4fc40b1
635 17:55:56.999430 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 17:55:56.999963 NOTICE: BL31: G12A normal boot!
637 17:55:57.024822 NOTICE: BL31: BL33 decompress pass
638 17:55:57.030524 ERROR: Error initializing runtime service opteed_fast
639 17:55:58.263551
640 17:55:58.264008
641 17:55:58.271819 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 17:55:58.272135
643 17:55:58.272360 Model: Libre Computer AML-A311D-CC Alta
644 17:55:58.480506 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 17:55:58.503825 DRAM: 2 GiB (effective 3.8 GiB)
646 17:55:58.646754 Core: 408 devices, 31 uclasses, devicetree: separate
647 17:55:58.652573 WDT: Not starting watchdog@f0d0
648 17:55:58.684805 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 17:55:58.697302 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 17:55:58.702330 ** Bad device specification mmc 0 **
651 17:55:58.712586 Card did not respond to voltage select! : -110
652 17:55:58.720283 ** Bad device specification mmc 0 **
653 17:55:58.720781 Couldn't find partition mmc 0
654 17:55:58.728606 Card did not respond to voltage select! : -110
655 17:55:58.734089 ** Bad device specification mmc 0 **
656 17:55:58.734561 Couldn't find partition mmc 0
657 17:55:58.739149 Error: could not access storage.
658 17:55:59.081907 Net: eth0: ethernet@ff3f0000
659 17:55:59.082530 starting USB...
660 17:55:59.333539 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 17:55:59.334120 Starting the controller
662 17:55:59.340518 USB XHCI 1.10
663 17:56:01.051820 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
664 17:56:01.052498 bl2_stage_init 0x81
665 17:56:01.057397 hw id: 0x0000 - pwm id 0x01
666 17:56:01.057884 bl2_stage_init 0xc1
667 17:56:01.058307 bl2_stage_init 0x02
668 17:56:01.058713
669 17:56:01.063001 L0:00000000
670 17:56:01.063468 L1:20000703
671 17:56:01.063873 L2:00008067
672 17:56:01.064310 L3:14000000
673 17:56:01.064715 B2:00402000
674 17:56:01.068535 B1:e0f83180
675 17:56:01.069004
676 17:56:01.069417 TE: 58150
677 17:56:01.069821
678 17:56:01.074259 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
679 17:56:01.074723
680 17:56:01.075135 Board ID = 1
681 17:56:01.079661 Set A53 clk to 24M
682 17:56:01.080154 Set A73 clk to 24M
683 17:56:01.080569 Set clk81 to 24M
684 17:56:01.085334 A53 clk: 1200 MHz
685 17:56:01.085795 A73 clk: 1200 MHz
686 17:56:01.086197 CLK81: 166.6M
687 17:56:01.086592 smccc: 00012aac
688 17:56:01.090962 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
689 17:56:01.096487 board id: 1
690 17:56:01.102472 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
691 17:56:01.112870 fw parse done
692 17:56:01.118788 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 17:56:01.161401 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
694 17:56:01.172345 PIEI prepare done
695 17:56:01.172809 fastboot data load
696 17:56:01.173221 fastboot data verify
697 17:56:01.177965 verify result: 266
698 17:56:01.183558 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
699 17:56:01.184053 LPDDR4 probe
700 17:56:01.184470 ddr clk to 1584MHz
701 17:56:01.191527 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
702 17:56:01.228782
703 17:56:01.229265 dmc_version 0001
704 17:56:01.235453 Check phy result
705 17:56:01.241353 INFO : End of CA training
706 17:56:01.241813 INFO : End of initialization
707 17:56:01.246945 INFO : Training has run successfully!
708 17:56:01.247403 Check phy result
709 17:56:01.252516 INFO : End of initialization
710 17:56:01.252972 INFO : End of read enable training
711 17:56:01.258130 INFO : End of fine write leveling
712 17:56:01.263722 INFO : End of Write leveling coarse delay
713 17:56:01.264209 INFO : Training has run successfully!
714 17:56:01.264616 Check phy result
715 17:56:01.269336 INFO : End of initialization
716 17:56:01.269793 INFO : End of read dq deskew training
717 17:56:01.274908 INFO : End of MPR read delay center optimization
718 17:56:01.280527 INFO : End of write delay center optimization
719 17:56:01.286137 INFO : End of read delay center optimization
720 17:56:01.286593 INFO : End of max read latency training
721 17:56:01.292219 INFO : Training has run successfully!
722 17:56:01.292698 1D training succeed
723 17:56:01.300878 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
724 17:56:01.348531 Check phy result
725 17:56:01.349011 INFO : End of initialization
726 17:56:01.370099 INFO : End of 2D read delay Voltage center optimization
727 17:56:01.390285 INFO : End of 2D read delay Voltage center optimization
728 17:56:01.442214 INFO : End of 2D write delay Voltage center optimization
729 17:56:01.491355 INFO : End of 2D write delay Voltage center optimization
730 17:56:01.496905 INFO : Training has run successfully!
731 17:56:01.497376
732 17:56:01.497796 channel==0
733 17:56:01.502534 RxClkDly_Margin_A0==88 ps 9
734 17:56:01.503017 TxDqDly_Margin_A0==98 ps 10
735 17:56:01.508203 RxClkDly_Margin_A1==88 ps 9
736 17:56:01.508680 TxDqDly_Margin_A1==98 ps 10
737 17:56:01.509091 TrainedVREFDQ_A0==74
738 17:56:01.513714 TrainedVREFDQ_A1==74
739 17:56:01.514195 VrefDac_Margin_A0==25
740 17:56:01.514606 DeviceVref_Margin_A0==40
741 17:56:01.519314 VrefDac_Margin_A1==25
742 17:56:01.519799 DeviceVref_Margin_A1==40
743 17:56:01.520253
744 17:56:01.520657
745 17:56:01.524910 channel==1
746 17:56:01.525379 RxClkDly_Margin_A0==98 ps 10
747 17:56:01.525781 TxDqDly_Margin_A0==98 ps 10
748 17:56:01.530510 RxClkDly_Margin_A1==98 ps 10
749 17:56:01.530982 TxDqDly_Margin_A1==88 ps 9
750 17:56:01.536205 TrainedVREFDQ_A0==77
751 17:56:01.536711 TrainedVREFDQ_A1==77
752 17:56:01.537125 VrefDac_Margin_A0==22
753 17:56:01.541747 DeviceVref_Margin_A0==37
754 17:56:01.542232 VrefDac_Margin_A1==22
755 17:56:01.547352 DeviceVref_Margin_A1==37
756 17:56:01.547831
757 17:56:01.548281 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
758 17:56:01.552900
759 17:56:01.580883 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
760 17:56:01.581435 2D training succeed
761 17:56:01.586537 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
762 17:56:01.592178 auto size-- 65535DDR cs0 size: 2048MB
763 17:56:01.592641 DDR cs1 size: 2048MB
764 17:56:01.597709 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
765 17:56:01.598170 cs0 DataBus test pass
766 17:56:01.603303 cs1 DataBus test pass
767 17:56:01.603764 cs0 AddrBus test pass
768 17:56:01.604209 cs1 AddrBus test pass
769 17:56:01.604610
770 17:56:01.608930 100bdlr_step_size ps== 420
771 17:56:01.609400 result report
772 17:56:01.614504 boot times 0Enable ddr reg access
773 17:56:01.619950 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
774 17:56:01.633342 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
775 17:56:02.205472 0.0;M3 CHK:0;cm4_sp_mode 0
776 17:56:02.206111 MVN_1=0x00000000
777 17:56:02.211014 MVN_2=0x00000000
778 17:56:02.216727 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
779 17:56:02.217295 OPS=0x10
780 17:56:02.217689 ring efuse init
781 17:56:02.218080 chipver efuse init
782 17:56:02.222376 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
783 17:56:02.227918 [0.018961 Inits done]
784 17:56:02.228459 secure task start!
785 17:56:02.228850 high task start!
786 17:56:02.232469 low task start!
787 17:56:02.232951 run into bl31
788 17:56:02.239115 NOTICE: BL31: v1.3(release):4fc40b1
789 17:56:02.246903 NOTICE: BL31: Built : 15:58:17, May 22 2019
790 17:56:02.247360 NOTICE: BL31: G12A normal boot!
791 17:56:02.272305 NOTICE: BL31: BL33 decompress pass
792 17:56:02.277990 ERROR: Error initializing runtime service opteed_fast
793 17:56:03.510930
794 17:56:03.511562
795 17:56:03.519263 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
796 17:56:03.519756
797 17:56:03.520213 Model: Libre Computer AML-A311D-CC Alta
798 17:56:03.727682 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
799 17:56:03.751027 DRAM: 2 GiB (effective 3.8 GiB)
800 17:56:03.893976 Core: 408 devices, 31 uclasses, devicetree: separate
801 17:56:03.899891 WDT: Not starting watchdog@f0d0
802 17:56:03.932165 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
803 17:56:03.944552 Loading Environment from FAT... Card did not respond to voltage select! : -110
804 17:56:03.949577 ** Bad device specification mmc 0 **
805 17:56:03.959895 Card did not respond to voltage select! : -110
806 17:56:03.967580 ** Bad device specification mmc 0 **
807 17:56:03.968067 Couldn't find partition mmc 0
808 17:56:03.975903 Card did not respond to voltage select! : -110
809 17:56:03.981521 ** Bad device specification mmc 0 **
810 17:56:03.982037 Couldn't find partition mmc 0
811 17:56:03.986560 Error: could not access storage.
812 17:56:04.328911 Net: eth0: ethernet@ff3f0000
813 17:56:04.329454 starting USB...
814 17:56:04.580854 Bus usb@ff500000: Register 3000140 NbrPorts 3
815 17:56:04.581476 Starting the controller
816 17:56:04.587741 USB XHCI 1.10
817 17:56:06.752044 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
818 17:56:06.752699 bl2_stage_init 0x01
819 17:56:06.753128 bl2_stage_init 0x81
820 17:56:06.757414 hw id: 0x0000 - pwm id 0x01
821 17:56:06.757882 bl2_stage_init 0xc1
822 17:56:06.758292 bl2_stage_init 0x02
823 17:56:06.758690
824 17:56:06.763000 L0:00000000
825 17:56:06.763462 L1:20000703
826 17:56:06.763864 L2:00008067
827 17:56:06.764299 L3:14000000
828 17:56:06.768520 B2:00402000
829 17:56:06.768976 B1:e0f83180
830 17:56:06.769381
831 17:56:06.769779 TE: 58159
832 17:56:06.770173
833 17:56:06.774190 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
834 17:56:06.774653
835 17:56:06.775057 Board ID = 1
836 17:56:06.779764 Set A53 clk to 24M
837 17:56:06.780258 Set A73 clk to 24M
838 17:56:06.780670 Set clk81 to 24M
839 17:56:06.785374 A53 clk: 1200 MHz
840 17:56:06.785828 A73 clk: 1200 MHz
841 17:56:06.786234 CLK81: 166.6M
842 17:56:06.786629 smccc: 00012ab5
843 17:56:06.790903 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
844 17:56:06.796569 board id: 1
845 17:56:06.802554 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
846 17:56:06.813117 fw parse done
847 17:56:06.818946 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
848 17:56:06.861554 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
849 17:56:06.872474 PIEI prepare done
850 17:56:06.872928 fastboot data load
851 17:56:06.873334 fastboot data verify
852 17:56:06.878098 verify result: 266
853 17:56:06.883693 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
854 17:56:06.884190 LPDDR4 probe
855 17:56:06.884604 ddr clk to 1584MHz
856 17:56:06.891674 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
857 17:56:06.928967
858 17:56:06.929433 dmc_version 0001
859 17:56:06.935607 Check phy result
860 17:56:06.941481 INFO : End of CA training
861 17:56:06.941936 INFO : End of initialization
862 17:56:06.947079 INFO : Training has run successfully!
863 17:56:06.947532 Check phy result
864 17:56:06.952650 INFO : End of initialization
865 17:56:06.953102 INFO : End of read enable training
866 17:56:06.958253 INFO : End of fine write leveling
867 17:56:06.963885 INFO : End of Write leveling coarse delay
868 17:56:06.964363 INFO : Training has run successfully!
869 17:56:06.964770 Check phy result
870 17:56:06.969481 INFO : End of initialization
871 17:56:06.969936 INFO : End of read dq deskew training
872 17:56:06.975049 INFO : End of MPR read delay center optimization
873 17:56:06.980658 INFO : End of write delay center optimization
874 17:56:06.986277 INFO : End of read delay center optimization
875 17:56:06.986729 INFO : End of max read latency training
876 17:56:06.991863 INFO : Training has run successfully!
877 17:56:06.992350 1D training succeed
878 17:56:07.001009 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
879 17:56:07.048673 Check phy result
880 17:56:07.049172 INFO : End of initialization
881 17:56:07.071187 INFO : End of 2D read delay Voltage center optimization
882 17:56:07.091442 INFO : End of 2D read delay Voltage center optimization
883 17:56:07.143493 INFO : End of 2D write delay Voltage center optimization
884 17:56:07.192859 INFO : End of 2D write delay Voltage center optimization
885 17:56:07.198430 INFO : Training has run successfully!
886 17:56:07.198886
887 17:56:07.199297 channel==0
888 17:56:07.204066 RxClkDly_Margin_A0==88 ps 9
889 17:56:07.204521 TxDqDly_Margin_A0==98 ps 10
890 17:56:07.209636 RxClkDly_Margin_A1==88 ps 9
891 17:56:07.210089 TxDqDly_Margin_A1==98 ps 10
892 17:56:07.210510 TrainedVREFDQ_A0==74
893 17:56:07.215276 TrainedVREFDQ_A1==74
894 17:56:07.215749 VrefDac_Margin_A0==24
895 17:56:07.216194 DeviceVref_Margin_A0==40
896 17:56:07.220812 VrefDac_Margin_A1==24
897 17:56:07.221276 DeviceVref_Margin_A1==40
898 17:56:07.221662
899 17:56:07.222051
900 17:56:07.226421 channel==1
901 17:56:07.226866 RxClkDly_Margin_A0==98 ps 10
902 17:56:07.227251 TxDqDly_Margin_A0==88 ps 9
903 17:56:07.232031 RxClkDly_Margin_A1==98 ps 10
904 17:56:07.232484 TxDqDly_Margin_A1==88 ps 9
905 17:56:07.237621 TrainedVREFDQ_A0==76
906 17:56:07.238097 TrainedVREFDQ_A1==77
907 17:56:07.238487 VrefDac_Margin_A0==22
908 17:56:07.243210 DeviceVref_Margin_A0==38
909 17:56:07.243653 VrefDac_Margin_A1==24
910 17:56:07.248819 DeviceVref_Margin_A1==37
911 17:56:07.249268
912 17:56:07.249655 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
913 17:56:07.250040
914 17:56:07.282386 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000019 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
915 17:56:07.282880 2D training succeed
916 17:56:07.288027 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
917 17:56:07.293627 auto size-- 65535DDR cs0 size: 2048MB
918 17:56:07.294092 DDR cs1 size: 2048MB
919 17:56:07.299245 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
920 17:56:07.299717 cs0 DataBus test pass
921 17:56:07.304818 cs1 DataBus test pass
922 17:56:07.305276 cs0 AddrBus test pass
923 17:56:07.305665 cs1 AddrBus test pass
924 17:56:07.306045
925 17:56:07.310403 100bdlr_step_size ps== 420
926 17:56:07.310860 result report
927 17:56:07.316041 boot times 0Enable ddr reg access
928 17:56:07.321346 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
929 17:56:07.334836 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
930 17:56:07.908605 0.0;M3 CHK:0;cm4_sp_mode 0
931 17:56:07.909249 MVN_1=0x00000000
932 17:56:07.914060 MVN_2=0x00000000
933 17:56:07.919801 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
934 17:56:07.920311 OPS=0x10
935 17:56:07.920728 ring efuse init
936 17:56:07.921129 chipver efuse init
937 17:56:07.925385 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
938 17:56:07.930987 [0.018960 Inits done]
939 17:56:07.931449 secure task start!
940 17:56:07.931858 high task start!
941 17:56:07.935561 low task start!
942 17:56:07.936045 run into bl31
943 17:56:07.942263 NOTICE: BL31: v1.3(release):4fc40b1
944 17:56:07.950088 NOTICE: BL31: Built : 15:58:17, May 22 2019
945 17:56:07.950560 NOTICE: BL31: G12A normal boot!
946 17:56:07.975408 NOTICE: BL31: BL33 decompress pass
947 17:56:07.981134 ERROR: Error initializing runtime service opteed_fast
948 17:56:09.214042
949 17:56:09.214658
950 17:56:09.222426 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
951 17:56:09.222901
952 17:56:09.223320 Model: Libre Computer AML-A311D-CC Alta
953 17:56:09.430943 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
954 17:56:09.454329 DRAM: 2 GiB (effective 3.8 GiB)
955 17:56:09.597331 Core: 408 devices, 31 uclasses, devicetree: separate
956 17:56:09.603112 WDT: Not starting watchdog@f0d0
957 17:56:09.635375 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
958 17:56:09.647770 Loading Environment from FAT... Card did not respond to voltage select! : -110
959 17:56:09.652795 ** Bad device specification mmc 0 **
960 17:56:09.663156 Card did not respond to voltage select! : -110
961 17:56:09.670766 ** Bad device specification mmc 0 **
962 17:56:09.671235 Couldn't find partition mmc 0
963 17:56:09.679112 Card did not respond to voltage select! : -110
964 17:56:09.684613 ** Bad device specification mmc 0 **
965 17:56:09.685078 Couldn't find partition mmc 0
966 17:56:09.689691 Error: could not access storage.
967 17:56:10.032170 Net: eth0: ethernet@ff3f0000
968 17:56:10.032746 starting USB...
969 17:56:10.284033 Bus usb@ff500000: Register 3000140 NbrPorts 3
970 17:56:10.284584 Starting the controller
971 17:56:10.290963 USB XHCI 1.10
972 17:56:11.845182 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
973 17:56:11.853401 scanning usb for storage devices... 0 Storage Device(s) found
975 17:56:11.904735 Hit any key to stop autoboot: 1
976 17:56:11.905742 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
977 17:56:11.906104 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
978 17:56:11.906355 Setting prompt string to ['=>']
979 17:56:11.906609 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
980 17:56:11.920846 0
981 17:56:11.921462 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
982 17:56:11.921742 Sending with 10 millisecond of delay
984 17:56:13.056076 => setenv autoload no
985 17:56:13.066898 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
986 17:56:13.071840 setenv autoload no
987 17:56:13.072581 Sending with 10 millisecond of delay
989 17:56:14.869283 => setenv initrd_high 0xffffffff
990 17:56:14.880062 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
991 17:56:14.880923 setenv initrd_high 0xffffffff
992 17:56:14.881633 Sending with 10 millisecond of delay
994 17:56:16.498137 => setenv fdt_high 0xffffffff
995 17:56:16.508942 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
996 17:56:16.509797 setenv fdt_high 0xffffffff
997 17:56:16.510506 Sending with 10 millisecond of delay
999 17:56:16.802260 => dhcp
1000 17:56:16.812959 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1001 17:56:16.813764 dhcp
1002 17:56:16.814196 Speed: 1000, full duplex
1003 17:56:16.814603 BOOTP broadcast 1
1004 17:56:16.821364 DHCP client bound to address 192.168.6.27 (8 ms)
1005 17:56:16.822079 Sending with 10 millisecond of delay
1007 17:56:18.498335 => setenv serverip 192.168.6.2
1008 17:56:18.509152 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1009 17:56:18.510061 setenv serverip 192.168.6.2
1010 17:56:18.510752 Sending with 10 millisecond of delay
1012 17:56:22.234036 => tftpboot 0x01080000 953299/tftp-deploy-wn6hwk_f/kernel/uImage
1013 17:56:22.244819 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1014 17:56:22.245668 tftpboot 0x01080000 953299/tftp-deploy-wn6hwk_f/kernel/uImage
1015 17:56:22.246107 Speed: 1000, full duplex
1016 17:56:22.246516 Using ethernet@ff3f0000 device
1017 17:56:22.247597 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1018 17:56:22.253146 Filename '953299/tftp-deploy-wn6hwk_f/kernel/uImage'.
1019 17:56:22.257087 Load address: 0x1080000
1020 17:56:25.169802 Loading: *################################################## 43.6 MiB
1021 17:56:25.170486 15 MiB/s
1022 17:56:25.170937 done
1023 17:56:25.174212 Bytes transferred = 45713984 (2b98a40 hex)
1024 17:56:25.174980 Sending with 10 millisecond of delay
1026 17:56:29.862691 => tftpboot 0x08000000 953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
1027 17:56:29.873515 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1028 17:56:29.874364 tftpboot 0x08000000 953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot
1029 17:56:29.874853 Speed: 1000, full duplex
1030 17:56:29.875307 Using ethernet@ff3f0000 device
1031 17:56:29.876206 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1032 17:56:29.884774 Filename '953299/tftp-deploy-wn6hwk_f/ramdisk/ramdisk.cpio.gz.uboot'.
1033 17:56:29.885266 Load address: 0x8000000
1034 17:56:36.362279 Loading: *######################T ########################### UDP wrong checksum 00000005 00009aba
1035 17:56:41.362560 T UDP wrong checksum 00000005 00009aba
1036 17:56:51.364878 T T UDP wrong checksum 00000005 00009aba
1037 17:56:56.691226 T UDP wrong checksum 000000ff 00009070
1038 17:56:56.743171 UDP wrong checksum 000000ff 00001b63
1039 17:57:11.369908 T T T UDP wrong checksum 00000005 00009aba
1040 17:57:26.374290 T T
1041 17:57:26.374959 Retry count exceeded; starting again
1043 17:57:26.376577 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1046 17:57:26.378668 end: 2.4 uboot-commands (duration 00:01:46) [common]
1048 17:57:26.380255 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 17:57:26.381432 end: 2 uboot-action (duration 00:01:46) [common]
1052 17:57:26.383135 Cleaning after the job
1053 17:57:26.383737 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/ramdisk
1054 17:57:26.385047 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/kernel
1055 17:57:26.421096 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/dtb
1056 17:57:26.422505 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/nfsrootfs
1057 17:57:26.486583 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953299/tftp-deploy-wn6hwk_f/modules
1058 17:57:26.495615 start: 4.1 power-off (timeout 00:00:30) [common]
1059 17:57:26.496287 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 17:57:26.533461 >> OK - accepted request
1061 17:57:26.535569 Returned 0 in 0 seconds
1062 17:57:26.636280 end: 4.1 power-off (duration 00:00:00) [common]
1064 17:57:26.637241 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 17:57:26.637898 Listened to connection for namespace 'common' for up to 1s
1066 17:57:27.638851 Finalising connection for namespace 'common'
1067 17:57:27.639328 Disconnecting from shell: Finalise
1068 17:57:27.639615 =>
1069 17:57:27.740391 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 17:57:27.741048 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953299
1071 17:57:30.639976 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953299
1072 17:57:30.640603 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.