Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:37:21.914236 lava-dispatcher, installed at version: 2024.01
2 22:37:21.915050 start: 0 validate
3 22:37:21.915537 Start time: 2024-11-04 22:37:21.915507+00:00 (UTC)
4 22:37:21.916124 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:37:21.916670 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:37:21.964373 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:37:21.964928 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:37:21.994249 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:37:21.995207 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:37:22.027681 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:37:22.028387 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:37:22.058315 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:37:22.058830 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:37:22.099661 validate duration: 0.18
16 22:37:22.101194 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:37:22.101782 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:37:22.102358 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:37:22.103294 Not decompressing ramdisk as can be used compressed.
20 22:37:22.104064 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:37:22.104354 saving as /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/ramdisk/initrd.cpio.gz
22 22:37:22.104613 total size: 5628169 (5 MB)
23 22:37:22.140679 progress 0 % (0 MB)
24 22:37:22.144973 progress 5 % (0 MB)
25 22:37:22.149356 progress 10 % (0 MB)
26 22:37:22.153332 progress 15 % (0 MB)
27 22:37:22.157621 progress 20 % (1 MB)
28 22:37:22.161461 progress 25 % (1 MB)
29 22:37:22.165733 progress 30 % (1 MB)
30 22:37:22.170142 progress 35 % (1 MB)
31 22:37:22.173984 progress 40 % (2 MB)
32 22:37:22.178192 progress 45 % (2 MB)
33 22:37:22.182002 progress 50 % (2 MB)
34 22:37:22.186195 progress 55 % (2 MB)
35 22:37:22.190411 progress 60 % (3 MB)
36 22:37:22.194285 progress 65 % (3 MB)
37 22:37:22.198701 progress 70 % (3 MB)
38 22:37:22.202462 progress 75 % (4 MB)
39 22:37:22.206489 progress 80 % (4 MB)
40 22:37:22.210213 progress 85 % (4 MB)
41 22:37:22.214294 progress 90 % (4 MB)
42 22:37:22.218036 progress 95 % (5 MB)
43 22:37:22.221323 progress 100 % (5 MB)
44 22:37:22.221973 5 MB downloaded in 0.12 s (45.74 MB/s)
45 22:37:22.222521 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:37:22.223416 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:37:22.223709 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:37:22.223998 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:37:22.224489 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/kernel/Image
51 22:37:22.224745 saving as /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/kernel/Image
52 22:37:22.224956 total size: 45713920 (43 MB)
53 22:37:22.225167 No compression specified
54 22:37:22.259513 progress 0 % (0 MB)
55 22:37:22.287399 progress 5 % (2 MB)
56 22:37:22.315360 progress 10 % (4 MB)
57 22:37:22.343267 progress 15 % (6 MB)
58 22:37:22.371540 progress 20 % (8 MB)
59 22:37:22.398982 progress 25 % (10 MB)
60 22:37:22.426671 progress 30 % (13 MB)
61 22:37:22.454358 progress 35 % (15 MB)
62 22:37:22.482254 progress 40 % (17 MB)
63 22:37:22.509927 progress 45 % (19 MB)
64 22:37:22.537935 progress 50 % (21 MB)
65 22:37:22.566134 progress 55 % (24 MB)
66 22:37:22.594219 progress 60 % (26 MB)
67 22:37:22.621665 progress 65 % (28 MB)
68 22:37:22.649340 progress 70 % (30 MB)
69 22:37:22.677163 progress 75 % (32 MB)
70 22:37:22.705024 progress 80 % (34 MB)
71 22:37:22.732372 progress 85 % (37 MB)
72 22:37:22.760246 progress 90 % (39 MB)
73 22:37:22.787952 progress 95 % (41 MB)
74 22:37:22.815079 progress 100 % (43 MB)
75 22:37:22.815606 43 MB downloaded in 0.59 s (73.81 MB/s)
76 22:37:22.816118 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:37:22.816953 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:37:22.817231 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:37:22.817500 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:37:22.817977 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:37:22.818255 saving as /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:37:22.818465 total size: 54703 (0 MB)
84 22:37:22.818674 No compression specified
85 22:37:22.856195 progress 59 % (0 MB)
86 22:37:22.857042 progress 100 % (0 MB)
87 22:37:22.857596 0 MB downloaded in 0.04 s (1.33 MB/s)
88 22:37:22.858060 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:37:22.858891 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:37:22.859159 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:37:22.859427 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:37:22.859884 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:37:22.860185 saving as /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/nfsrootfs/full.rootfs.tar
95 22:37:22.860398 total size: 120894716 (115 MB)
96 22:37:22.860614 Using unxz to decompress xz
97 22:37:22.893302 progress 0 % (0 MB)
98 22:37:23.677197 progress 5 % (5 MB)
99 22:37:24.536060 progress 10 % (11 MB)
100 22:37:25.332731 progress 15 % (17 MB)
101 22:37:26.069665 progress 20 % (23 MB)
102 22:37:26.661528 progress 25 % (28 MB)
103 22:37:27.482762 progress 30 % (34 MB)
104 22:37:28.270053 progress 35 % (40 MB)
105 22:37:28.616390 progress 40 % (46 MB)
106 22:37:29.001555 progress 45 % (51 MB)
107 22:37:29.740995 progress 50 % (57 MB)
108 22:37:30.635672 progress 55 % (63 MB)
109 22:37:31.411973 progress 60 % (69 MB)
110 22:37:32.162111 progress 65 % (74 MB)
111 22:37:32.938413 progress 70 % (80 MB)
112 22:37:33.758883 progress 75 % (86 MB)
113 22:37:34.557230 progress 80 % (92 MB)
114 22:37:35.342033 progress 85 % (98 MB)
115 22:37:36.196904 progress 90 % (103 MB)
116 22:37:36.966742 progress 95 % (109 MB)
117 22:37:37.795010 progress 100 % (115 MB)
118 22:37:37.807491 115 MB downloaded in 14.95 s (7.71 MB/s)
119 22:37:37.808434 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:37:37.810059 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:37:37.810585 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:37:37.811115 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:37:37.812127 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/modules.tar.xz
125 22:37:37.812681 saving as /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/modules/modules.tar
126 22:37:37.813113 total size: 11607844 (11 MB)
127 22:37:37.813546 Using unxz to decompress xz
128 22:37:37.859925 progress 0 % (0 MB)
129 22:37:37.926383 progress 5 % (0 MB)
130 22:37:38.003118 progress 10 % (1 MB)
131 22:37:38.102361 progress 15 % (1 MB)
132 22:37:38.194045 progress 20 % (2 MB)
133 22:37:38.274967 progress 25 % (2 MB)
134 22:37:38.351663 progress 30 % (3 MB)
135 22:37:38.426364 progress 35 % (3 MB)
136 22:37:38.504274 progress 40 % (4 MB)
137 22:37:38.580599 progress 45 % (5 MB)
138 22:37:38.665861 progress 50 % (5 MB)
139 22:37:38.745919 progress 55 % (6 MB)
140 22:37:38.832748 progress 60 % (6 MB)
141 22:37:38.916493 progress 65 % (7 MB)
142 22:37:38.993527 progress 70 % (7 MB)
143 22:37:39.077364 progress 75 % (8 MB)
144 22:37:39.161657 progress 80 % (8 MB)
145 22:37:39.242939 progress 85 % (9 MB)
146 22:37:39.322541 progress 90 % (9 MB)
147 22:37:39.401617 progress 95 % (10 MB)
148 22:37:39.478733 progress 100 % (11 MB)
149 22:37:39.490502 11 MB downloaded in 1.68 s (6.60 MB/s)
150 22:37:39.491083 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:37:39.491923 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:37:39.492452 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:37:39.493032 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:37:55.967504 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/937027/extract-nfsrootfs-809g3dkm
156 22:37:55.968138 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:37:55.968433 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:37:55.969219 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj
159 22:37:55.969670 makedir: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin
160 22:37:55.969996 makedir: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/tests
161 22:37:55.970309 makedir: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/results
162 22:37:55.970639 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-add-keys
163 22:37:55.971154 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-add-sources
164 22:37:55.971644 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-background-process-start
165 22:37:55.972178 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-background-process-stop
166 22:37:55.972710 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-common-functions
167 22:37:55.973192 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-echo-ipv4
168 22:37:55.973662 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-install-packages
169 22:37:55.974125 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-installed-packages
170 22:37:55.974585 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-os-build
171 22:37:55.975073 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-probe-channel
172 22:37:55.975564 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-probe-ip
173 22:37:55.976043 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-target-ip
174 22:37:55.976521 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-target-mac
175 22:37:55.977004 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-target-storage
176 22:37:55.977477 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-case
177 22:37:55.977941 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-event
178 22:37:55.978402 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-feedback
179 22:37:55.978957 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-raise
180 22:37:55.979466 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-reference
181 22:37:55.979931 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-runner
182 22:37:55.980434 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-set
183 22:37:55.980905 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-test-shell
184 22:37:55.981374 Updating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-add-keys (debian)
185 22:37:55.981891 Updating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-add-sources (debian)
186 22:37:55.982382 Updating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-install-packages (debian)
187 22:37:55.982868 Updating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-installed-packages (debian)
188 22:37:55.983351 Updating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/bin/lava-os-build (debian)
189 22:37:55.983772 Creating /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/environment
190 22:37:55.984150 LAVA metadata
191 22:37:55.984411 - LAVA_JOB_ID=937027
192 22:37:55.984628 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:37:55.984986 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:37:55.985910 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:37:55.986217 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:37:55.986424 skipped lava-vland-overlay
197 22:37:55.986665 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:37:55.986919 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:37:55.987134 skipped lava-multinode-overlay
200 22:37:55.987376 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:37:55.987625 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:37:55.987864 Loading test definitions
203 22:37:55.988199 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:37:55.988426 Using /lava-937027 at stage 0
205 22:37:55.989515 uuid=937027_1.6.2.4.1 testdef=None
206 22:37:55.989827 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:37:55.990089 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:37:55.991614 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:37:55.992437 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:37:55.994335 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:37:55.995152 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:37:55.996975 runner path: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/0/tests/0_timesync-off test_uuid 937027_1.6.2.4.1
215 22:37:55.997519 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:37:55.998331 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:37:55.998556 Using /lava-937027 at stage 0
219 22:37:55.998899 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:37:55.999183 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/0/tests/1_kselftest-alsa'
221 22:37:59.352108 Running '/usr/bin/git checkout kernelci.org
222 22:37:59.663509 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 22:37:59.664964 uuid=937027_1.6.2.4.5 testdef=None
224 22:37:59.665313 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:37:59.666060 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 22:37:59.668948 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:37:59.669771 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 22:37:59.673486 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:37:59.674357 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 22:37:59.677944 runner path: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/0/tests/1_kselftest-alsa test_uuid 937027_1.6.2.4.5
234 22:37:59.678228 BOARD='meson-g12b-a311d-libretech-cc'
235 22:37:59.678434 BRANCH='broonie-sound'
236 22:37:59.678633 SKIPFILE='/dev/null'
237 22:37:59.678833 SKIP_INSTALL='True'
238 22:37:59.679030 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:37:59.679230 TST_CASENAME=''
240 22:37:59.679428 TST_CMDFILES='alsa'
241 22:37:59.679963 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:37:59.680773 Creating lava-test-runner.conf files
244 22:37:59.680980 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/937027/lava-overlay-7lj5v_mj/lava-937027/0 for stage 0
245 22:37:59.681327 - 0_timesync-off
246 22:37:59.681567 - 1_kselftest-alsa
247 22:37:59.681894 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:37:59.682174 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 22:38:22.979756 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:38:22.980221 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:38:22.980491 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:38:22.980763 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:38:22.981029 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:38:23.596135 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:38:23.596619 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 22:38:23.596875 extracting modules file /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937027/extract-nfsrootfs-809g3dkm
257 22:38:24.945672 extracting modules file /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk
258 22:38:26.341534 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:38:26.342021 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 22:38:26.342307 [common] Applying overlay to NFS
261 22:38:26.342526 [common] Applying overlay /var/lib/lava/dispatcher/tmp/937027/compress-overlay-x0xoaw1q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/937027/extract-nfsrootfs-809g3dkm
262 22:38:29.073348 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:38:29.073816 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:38:29.074096 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:38:29.074329 Converting downloaded kernel to a uImage
266 22:38:29.074645 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/kernel/Image /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/kernel/uImage
267 22:38:29.577539 output: Image Name:
268 22:38:29.577959 output: Created: Mon Nov 4 22:38:29 2024
269 22:38:29.578172 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:38:29.578378 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:38:29.578582 output: Load Address: 01080000
272 22:38:29.578784 output: Entry Point: 01080000
273 22:38:29.578984 output:
274 22:38:29.579319 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 22:38:29.579591 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 22:38:29.579862 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 22:38:29.580171 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:38:29.580439 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 22:38:29.580699 Building ramdisk /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk
280 22:38:31.698846 >> 166790 blocks
281 22:38:39.428433 Adding RAMdisk u-boot header.
282 22:38:39.429159 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk.cpio.gz.uboot
283 22:38:39.681745 output: Image Name:
284 22:38:39.682175 output: Created: Mon Nov 4 22:38:39 2024
285 22:38:39.682388 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:38:39.682594 output: Data Size: 23431379 Bytes = 22882.21 KiB = 22.35 MiB
287 22:38:39.682797 output: Load Address: 00000000
288 22:38:39.682997 output: Entry Point: 00000000
289 22:38:39.683198 output:
290 22:38:39.683865 rename /var/lib/lava/dispatcher/tmp/937027/extract-overlay-ramdisk-iboaq_bo/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
291 22:38:39.684539 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:38:39.685088 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 22:38:39.685612 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 22:38:39.686062 No LXC device requested
295 22:38:39.686556 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:38:39.687062 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 22:38:39.687554 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:38:39.687966 Checking files for TFTP limit of 4294967296 bytes.
299 22:38:39.690664 end: 1 tftp-deploy (duration 00:01:18) [common]
300 22:38:39.691235 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:38:39.691757 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:38:39.692291 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:38:39.692794 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:38:39.693320 Using kernel file from prepare-kernel: 937027/tftp-deploy-9yuw0wkj/kernel/uImage
305 22:38:39.693946 substitutions:
306 22:38:39.694352 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:38:39.694755 - {DTB_ADDR}: 0x01070000
308 22:38:39.695160 - {DTB}: 937027/tftp-deploy-9yuw0wkj/dtb/meson-g12b-a311d-libretech-cc.dtb
309 22:38:39.695560 - {INITRD}: 937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
310 22:38:39.695960 - {KERNEL_ADDR}: 0x01080000
311 22:38:39.696381 - {KERNEL}: 937027/tftp-deploy-9yuw0wkj/kernel/uImage
312 22:38:39.696775 - {LAVA_MAC}: None
313 22:38:39.697202 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/937027/extract-nfsrootfs-809g3dkm
314 22:38:39.697601 - {NFS_SERVER_IP}: 192.168.6.2
315 22:38:39.697991 - {PRESEED_CONFIG}: None
316 22:38:39.698382 - {PRESEED_LOCAL}: None
317 22:38:39.698769 - {RAMDISK_ADDR}: 0x08000000
318 22:38:39.699154 - {RAMDISK}: 937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
319 22:38:39.699545 - {ROOT_PART}: None
320 22:38:39.699929 - {ROOT}: None
321 22:38:39.700346 - {SERVER_IP}: 192.168.6.2
322 22:38:39.700732 - {TEE_ADDR}: 0x83000000
323 22:38:39.701116 - {TEE}: None
324 22:38:39.701501 Parsed boot commands:
325 22:38:39.701874 - setenv autoload no
326 22:38:39.702257 - setenv initrd_high 0xffffffff
327 22:38:39.702637 - setenv fdt_high 0xffffffff
328 22:38:39.703017 - dhcp
329 22:38:39.703396 - setenv serverip 192.168.6.2
330 22:38:39.703779 - tftpboot 0x01080000 937027/tftp-deploy-9yuw0wkj/kernel/uImage
331 22:38:39.704234 - tftpboot 0x08000000 937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
332 22:38:39.704631 - tftpboot 0x01070000 937027/tftp-deploy-9yuw0wkj/dtb/meson-g12b-a311d-libretech-cc.dtb
333 22:38:39.705020 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/937027/extract-nfsrootfs-809g3dkm,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:38:39.705418 - bootm 0x01080000 0x08000000 0x01070000
335 22:38:39.705905 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:38:39.707388 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:38:39.707803 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 22:38:39.723292 Setting prompt string to ['lava-test: # ']
340 22:38:39.724825 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:38:39.725416 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:38:39.726031 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:38:39.726664 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:38:39.727814 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 22:38:39.765975 >> OK - accepted request
346 22:38:39.768295 Returned 0 in 0 seconds
347 22:38:39.869365 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:38:39.870917 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:38:39.871475 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:38:39.871976 Setting prompt string to ['Hit any key to stop autoboot']
352 22:38:39.872470 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:38:39.874011 Trying 192.168.56.21...
354 22:38:39.874481 Connected to conserv1.
355 22:38:39.874895 Escape character is '^]'.
356 22:38:39.875311
357 22:38:39.875725 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:38:39.876179
359 22:38:51.439073 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 22:38:51.439686 bl2_stage_init 0x01
361 22:38:51.440161 bl2_stage_init 0x81
362 22:38:51.444700 hw id: 0x0000 - pwm id 0x01
363 22:38:51.445171 bl2_stage_init 0xc1
364 22:38:51.445591 bl2_stage_init 0x02
365 22:38:51.446005
366 22:38:51.450341 L0:00000000
367 22:38:51.450799 L1:20000703
368 22:38:51.451215 L2:00008067
369 22:38:51.451617 L3:14000000
370 22:38:51.455849 B2:00402000
371 22:38:51.456313 B1:e0f83180
372 22:38:51.456718
373 22:38:51.457113 TE: 58124
374 22:38:51.457508
375 22:38:51.461435 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 22:38:51.461864
377 22:38:51.462260 Board ID = 1
378 22:38:51.466977 Set A53 clk to 24M
379 22:38:51.467396 Set A73 clk to 24M
380 22:38:51.467788 Set clk81 to 24M
381 22:38:51.472661 A53 clk: 1200 MHz
382 22:38:51.473104 A73 clk: 1200 MHz
383 22:38:51.473497 CLK81: 166.6M
384 22:38:51.473883 smccc: 00012a92
385 22:38:51.478205 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 22:38:51.483747 board id: 1
387 22:38:51.489803 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:38:51.500283 fw parse done
389 22:38:51.506221 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:38:51.548879 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:38:51.559828 PIEI prepare done
392 22:38:51.560289 fastboot data load
393 22:38:51.560689 fastboot data verify
394 22:38:51.565416 verify result: 266
395 22:38:51.571002 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 22:38:51.571428 LPDDR4 probe
397 22:38:51.571823 ddr clk to 1584MHz
398 22:38:51.579036 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:38:51.616326
400 22:38:51.616752 dmc_version 0001
401 22:38:51.622995 Check phy result
402 22:38:51.628783 INFO : End of CA training
403 22:38:51.629200 INFO : End of initialization
404 22:38:51.634476 INFO : Training has run successfully!
405 22:38:51.634897 Check phy result
406 22:38:51.640071 INFO : End of initialization
407 22:38:51.640491 INFO : End of read enable training
408 22:38:51.643343 INFO : End of fine write leveling
409 22:38:51.648912 INFO : End of Write leveling coarse delay
410 22:38:51.654533 INFO : Training has run successfully!
411 22:38:51.654956 Check phy result
412 22:38:51.655362 INFO : End of initialization
413 22:38:51.660140 INFO : End of read dq deskew training
414 22:38:51.663538 INFO : End of MPR read delay center optimization
415 22:38:51.669140 INFO : End of write delay center optimization
416 22:38:51.674705 INFO : End of read delay center optimization
417 22:38:51.675122 INFO : End of max read latency training
418 22:38:51.680322 INFO : Training has run successfully!
419 22:38:51.680743 1D training succeed
420 22:38:51.688488 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:38:51.735972 Check phy result
422 22:38:51.736452 INFO : End of initialization
423 22:38:51.757755 INFO : End of 2D read delay Voltage center optimization
424 22:38:51.777989 INFO : End of 2D read delay Voltage center optimization
425 22:38:51.830065 INFO : End of 2D write delay Voltage center optimization
426 22:38:51.879383 INFO : End of 2D write delay Voltage center optimization
427 22:38:51.885048 INFO : Training has run successfully!
428 22:38:51.885501
429 22:38:51.885907 channel==0
430 22:38:51.890632 RxClkDly_Margin_A0==88 ps 9
431 22:38:51.891075 TxDqDly_Margin_A0==98 ps 10
432 22:38:51.893918 RxClkDly_Margin_A1==88 ps 9
433 22:38:51.894353 TxDqDly_Margin_A1==98 ps 10
434 22:38:51.899389 TrainedVREFDQ_A0==74
435 22:38:51.899828 TrainedVREFDQ_A1==74
436 22:38:51.904918 VrefDac_Margin_A0==25
437 22:38:51.905361 DeviceVref_Margin_A0==40
438 22:38:51.905757 VrefDac_Margin_A1==25
439 22:38:51.910493 DeviceVref_Margin_A1==40
440 22:38:51.910931
441 22:38:51.911332
442 22:38:51.911729 channel==1
443 22:38:51.912155 RxClkDly_Margin_A0==88 ps 9
444 22:38:51.914144 TxDqDly_Margin_A0==98 ps 10
445 22:38:51.919681 RxClkDly_Margin_A1==88 ps 9
446 22:38:51.920155 TxDqDly_Margin_A1==88 ps 9
447 22:38:51.920561 TrainedVREFDQ_A0==77
448 22:38:51.925279 TrainedVREFDQ_A1==77
449 22:38:51.925718 VrefDac_Margin_A0==22
450 22:38:51.930826 DeviceVref_Margin_A0==37
451 22:38:51.931261 VrefDac_Margin_A1==24
452 22:38:51.931662 DeviceVref_Margin_A1==37
453 22:38:51.932094
454 22:38:51.936406 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:38:51.936836
456 22:38:51.970031 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 22:38:51.970555 2D training succeed
458 22:38:51.975612 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:38:51.981203 auto size-- 65535DDR cs0 size: 2048MB
460 22:38:51.981645 DDR cs1 size: 2048MB
461 22:38:51.986861 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:38:51.987322 cs0 DataBus test pass
463 22:38:51.987722 cs1 DataBus test pass
464 22:38:51.992415 cs0 AddrBus test pass
465 22:38:51.992868 cs1 AddrBus test pass
466 22:38:51.993264
467 22:38:51.998035 100bdlr_step_size ps== 420
468 22:38:51.998498 result report
469 22:38:51.998899 boot times 0Enable ddr reg access
470 22:38:52.007877 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:38:52.021353 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 22:38:52.594971 0.0;M3 CHK:0;cm4_sp_mode 0
473 22:38:52.595533 MVN_1=0x00000000
474 22:38:52.600414 MVN_2=0x00000000
475 22:38:52.606157 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 22:38:52.606597 OPS=0x10
477 22:38:52.607014 ring efuse init
478 22:38:52.607415 chipver efuse init
479 22:38:52.611856 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 22:38:52.617361 [0.018961 Inits done]
481 22:38:52.617791 secure task start!
482 22:38:52.618198 high task start!
483 22:38:52.621949 low task start!
484 22:38:52.622381 run into bl31
485 22:38:52.628622 NOTICE: BL31: v1.3(release):4fc40b1
486 22:38:52.636419 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 22:38:52.636854 NOTICE: BL31: G12A normal boot!
488 22:38:52.661764 NOTICE: BL31: BL33 decompress pass
489 22:38:52.667462 ERROR: Error initializing runtime service opteed_fast
490 22:38:53.900469
491 22:38:53.901112
492 22:38:53.908782 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 22:38:53.909287
494 22:38:53.909716 Model: Libre Computer AML-A311D-CC Alta
495 22:38:54.117190 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 22:38:54.140577 DRAM: 2 GiB (effective 3.8 GiB)
497 22:38:54.283778 Core: 408 devices, 31 uclasses, devicetree: separate
498 22:38:54.289528 WDT: Not starting watchdog@f0d0
499 22:38:54.321787 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 22:38:54.334265 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 22:38:54.339201 ** Bad device specification mmc 0 **
502 22:38:54.349578 Card did not respond to voltage select! : -110
503 22:38:54.357246 ** Bad device specification mmc 0 **
504 22:38:54.357692 Couldn't find partition mmc 0
505 22:38:54.365540 Card did not respond to voltage select! : -110
506 22:38:54.371051 ** Bad device specification mmc 0 **
507 22:38:54.371480 Couldn't find partition mmc 0
508 22:38:54.376115 Error: could not access storage.
509 22:38:55.639276 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 22:38:55.639958 bl2_stage_init 0x01
511 22:38:55.640519 bl2_stage_init 0x81
512 22:38:55.644850 hw id: 0x0000 - pwm id 0x01
513 22:38:55.645381 bl2_stage_init 0xc1
514 22:38:55.645854 bl2_stage_init 0x02
515 22:38:55.646318
516 22:38:55.650430 L0:00000000
517 22:38:55.650961 L1:20000703
518 22:38:55.651426 L2:00008067
519 22:38:55.651874 L3:14000000
520 22:38:55.653332 B2:00402000
521 22:38:55.653837 B1:e0f83180
522 22:38:55.654301
523 22:38:55.654756 TE: 58167
524 22:38:55.655210
525 22:38:55.664496 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 22:38:55.665041
527 22:38:55.665505 Board ID = 1
528 22:38:55.665939 Set A53 clk to 24M
529 22:38:55.666375 Set A73 clk to 24M
530 22:38:55.670092 Set clk81 to 24M
531 22:38:55.670607 A53 clk: 1200 MHz
532 22:38:55.671063 A73 clk: 1200 MHz
533 22:38:55.675706 CLK81: 166.6M
534 22:38:55.676257 smccc: 00012abd
535 22:38:55.681321 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 22:38:55.681846 board id: 1
537 22:38:55.689895 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 22:38:55.700567 fw parse done
539 22:38:55.706523 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:38:55.749165 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 22:38:55.760080 PIEI prepare done
542 22:38:55.760620 fastboot data load
543 22:38:55.761096 fastboot data verify
544 22:38:55.765650 verify result: 266
545 22:38:55.771247 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 22:38:55.771761 LPDDR4 probe
547 22:38:55.772256 ddr clk to 1584MHz
548 22:38:55.779237 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 22:38:55.816478
550 22:38:55.817011 dmc_version 0001
551 22:38:55.823166 Check phy result
552 22:38:55.829029 INFO : End of CA training
553 22:38:55.829545 INFO : End of initialization
554 22:38:55.834638 INFO : Training has run successfully!
555 22:38:55.835145 Check phy result
556 22:38:55.840232 INFO : End of initialization
557 22:38:55.840745 INFO : End of read enable training
558 22:38:55.845839 INFO : End of fine write leveling
559 22:38:55.851436 INFO : End of Write leveling coarse delay
560 22:38:55.851948 INFO : Training has run successfully!
561 22:38:55.852454 Check phy result
562 22:38:55.857042 INFO : End of initialization
563 22:38:55.857557 INFO : End of read dq deskew training
564 22:38:55.862630 INFO : End of MPR read delay center optimization
565 22:38:55.868234 INFO : End of write delay center optimization
566 22:38:55.873847 INFO : End of read delay center optimization
567 22:38:55.874363 INFO : End of max read latency training
568 22:38:55.879441 INFO : Training has run successfully!
569 22:38:55.879950 1D training succeed
570 22:38:55.888611 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 22:38:55.936220 Check phy result
572 22:38:55.936751 INFO : End of initialization
573 22:38:55.958836 INFO : End of 2D read delay Voltage center optimization
574 22:38:55.978236 INFO : End of 2D read delay Voltage center optimization
575 22:38:56.030224 INFO : End of 2D write delay Voltage center optimization
576 22:38:56.079573 INFO : End of 2D write delay Voltage center optimization
577 22:38:56.085168 INFO : Training has run successfully!
578 22:38:56.085692
579 22:38:56.086156 channel==0
580 22:38:56.090771 RxClkDly_Margin_A0==88 ps 9
581 22:38:56.091282 TxDqDly_Margin_A0==98 ps 10
582 22:38:56.096384 RxClkDly_Margin_A1==88 ps 9
583 22:38:56.096905 TxDqDly_Margin_A1==98 ps 10
584 22:38:56.097375 TrainedVREFDQ_A0==74
585 22:38:56.101952 TrainedVREFDQ_A1==74
586 22:38:56.102471 VrefDac_Margin_A0==24
587 22:38:56.102928 DeviceVref_Margin_A0==40
588 22:38:56.107540 VrefDac_Margin_A1==25
589 22:38:56.108077 DeviceVref_Margin_A1==40
590 22:38:56.108541
591 22:38:56.109000
592 22:38:56.113211 channel==1
593 22:38:56.113724 RxClkDly_Margin_A0==98 ps 10
594 22:38:56.114182 TxDqDly_Margin_A0==98 ps 10
595 22:38:56.118785 RxClkDly_Margin_A1==88 ps 9
596 22:38:56.119311 TxDqDly_Margin_A1==98 ps 10
597 22:38:56.124402 TrainedVREFDQ_A0==77
598 22:38:56.124928 TrainedVREFDQ_A1==77
599 22:38:56.125386 VrefDac_Margin_A0==23
600 22:38:56.129985 DeviceVref_Margin_A0==37
601 22:38:56.130489 VrefDac_Margin_A1==24
602 22:38:56.135558 DeviceVref_Margin_A1==37
603 22:38:56.136119
604 22:38:56.136592 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 22:38:56.141173
606 22:38:56.169180 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 22:38:56.169770 2D training succeed
608 22:38:56.174778 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 22:38:56.180406 auto size-- 65535DDR cs0 size: 2048MB
610 22:38:56.180941 DDR cs1 size: 2048MB
611 22:38:56.185979 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 22:38:56.186512 cs0 DataBus test pass
613 22:38:56.191538 cs1 DataBus test pass
614 22:38:56.192129 cs0 AddrBus test pass
615 22:38:56.192604 cs1 AddrBus test pass
616 22:38:56.193057
617 22:38:56.197562 100bdlr_step_size ps== 420
618 22:38:56.198098 result report
619 22:38:56.202769 boot times 0Enable ddr reg access
620 22:38:56.208245 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 22:38:56.221712 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 22:38:56.795431 0.0;M3 CHK:0;cm4_sp_mode 0
623 22:38:56.796106 MVN_1=0x00000000
624 22:38:56.800846 MVN_2=0x00000000
625 22:38:56.806622 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 22:38:56.807146 OPS=0x10
627 22:38:56.807616 ring efuse init
628 22:38:56.808145 chipver efuse init
629 22:38:56.812251 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 22:38:56.817809 [0.018961 Inits done]
631 22:38:56.818291 secure task start!
632 22:38:56.818737 high task start!
633 22:38:56.822363 low task start!
634 22:38:56.822837 run into bl31
635 22:38:56.829027 NOTICE: BL31: v1.3(release):4fc40b1
636 22:38:56.836840 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 22:38:56.837315 NOTICE: BL31: G12A normal boot!
638 22:38:56.862226 NOTICE: BL31: BL33 decompress pass
639 22:38:56.867878 ERROR: Error initializing runtime service opteed_fast
640 22:38:58.100963
641 22:38:58.101615
642 22:38:58.109411 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 22:38:58.109925
644 22:38:58.110393 Model: Libre Computer AML-A311D-CC Alta
645 22:38:58.317730 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 22:38:58.341244 DRAM: 2 GiB (effective 3.8 GiB)
647 22:38:58.484100 Core: 408 devices, 31 uclasses, devicetree: separate
648 22:38:58.490033 WDT: Not starting watchdog@f0d0
649 22:38:58.522508 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 22:38:58.534874 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 22:38:58.539750 ** Bad device specification mmc 0 **
652 22:38:58.550181 Card did not respond to voltage select! : -110
653 22:38:58.557752 ** Bad device specification mmc 0 **
654 22:38:58.558317 Couldn't find partition mmc 0
655 22:38:58.566211 Card did not respond to voltage select! : -110
656 22:38:58.571586 ** Bad device specification mmc 0 **
657 22:38:58.572253 Couldn't find partition mmc 0
658 22:38:58.576818 Error: could not access storage.
659 22:38:58.919105 Net: eth0: ethernet@ff3f0000
660 22:38:58.919767 starting USB...
661 22:38:59.171023 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 22:38:59.171598 Starting the controller
663 22:38:59.177933 USB XHCI 1.10
664 22:39:00.891396 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 22:39:00.892125 bl2_stage_init 0x01
666 22:39:00.892614 bl2_stage_init 0x81
667 22:39:00.896793 hw id: 0x0000 - pwm id 0x01
668 22:39:00.897291 bl2_stage_init 0xc1
669 22:39:00.897752 bl2_stage_init 0x02
670 22:39:00.898202
671 22:39:00.902407 L0:00000000
672 22:39:00.902887 L1:20000703
673 22:39:00.903345 L2:00008067
674 22:39:00.903794 L3:14000000
675 22:39:00.908065 B2:00402000
676 22:39:00.908578 B1:e0f83180
677 22:39:00.909038
678 22:39:00.909491 TE: 58159
679 22:39:00.909939
680 22:39:00.913534 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 22:39:00.914027
682 22:39:00.914484 Board ID = 1
683 22:39:00.919142 Set A53 clk to 24M
684 22:39:00.919623 Set A73 clk to 24M
685 22:39:00.920111 Set clk81 to 24M
686 22:39:00.924730 A53 clk: 1200 MHz
687 22:39:00.925210 A73 clk: 1200 MHz
688 22:39:00.925662 CLK81: 166.6M
689 22:39:00.926110 smccc: 00012ab5
690 22:39:00.930321 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 22:39:00.936023 board id: 1
692 22:39:00.941867 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 22:39:00.952513 fw parse done
694 22:39:00.958524 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:39:01.000968 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 22:39:01.011873 PIEI prepare done
697 22:39:01.012419 fastboot data load
698 22:39:01.012889 fastboot data verify
699 22:39:01.017562 verify result: 266
700 22:39:01.023132 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 22:39:01.023626 LPDDR4 probe
702 22:39:01.024110 ddr clk to 1584MHz
703 22:39:01.031138 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 22:39:01.068342
705 22:39:01.068860 dmc_version 0001
706 22:39:01.075013 Check phy result
707 22:39:01.080886 INFO : End of CA training
708 22:39:01.081368 INFO : End of initialization
709 22:39:01.086493 INFO : Training has run successfully!
710 22:39:01.086973 Check phy result
711 22:39:01.092115 INFO : End of initialization
712 22:39:01.092595 INFO : End of read enable training
713 22:39:01.097708 INFO : End of fine write leveling
714 22:39:01.103317 INFO : End of Write leveling coarse delay
715 22:39:01.103801 INFO : Training has run successfully!
716 22:39:01.104296 Check phy result
717 22:39:01.108903 INFO : End of initialization
718 22:39:01.109385 INFO : End of read dq deskew training
719 22:39:01.114500 INFO : End of MPR read delay center optimization
720 22:39:01.120117 INFO : End of write delay center optimization
721 22:39:01.125708 INFO : End of read delay center optimization
722 22:39:01.126193 INFO : End of max read latency training
723 22:39:01.131323 INFO : Training has run successfully!
724 22:39:01.131805 1D training succeed
725 22:39:01.140519 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 22:39:01.188085 Check phy result
727 22:39:01.188596 INFO : End of initialization
728 22:39:01.209688 INFO : End of 2D read delay Voltage center optimization
729 22:39:01.229766 INFO : End of 2D read delay Voltage center optimization
730 22:39:01.281657 INFO : End of 2D write delay Voltage center optimization
731 22:39:01.330888 INFO : End of 2D write delay Voltage center optimization
732 22:39:01.336468 INFO : Training has run successfully!
733 22:39:01.336955
734 22:39:01.337415 channel==0
735 22:39:01.342114 RxClkDly_Margin_A0==88 ps 9
736 22:39:01.342604 TxDqDly_Margin_A0==98 ps 10
737 22:39:01.347685 RxClkDly_Margin_A1==88 ps 9
738 22:39:01.348217 TxDqDly_Margin_A1==98 ps 10
739 22:39:01.348674 TrainedVREFDQ_A0==74
740 22:39:01.353279 TrainedVREFDQ_A1==74
741 22:39:01.353775 VrefDac_Margin_A0==25
742 22:39:01.354227 DeviceVref_Margin_A0==40
743 22:39:01.358881 VrefDac_Margin_A1==25
744 22:39:01.359370 DeviceVref_Margin_A1==40
745 22:39:01.359823
746 22:39:01.360311
747 22:39:01.364479 channel==1
748 22:39:01.364992 RxClkDly_Margin_A0==98 ps 10
749 22:39:01.365445 TxDqDly_Margin_A0==88 ps 9
750 22:39:01.370099 RxClkDly_Margin_A1==88 ps 9
751 22:39:01.370583 TxDqDly_Margin_A1==88 ps 9
752 22:39:01.375649 TrainedVREFDQ_A0==76
753 22:39:01.376171 TrainedVREFDQ_A1==77
754 22:39:01.376632 VrefDac_Margin_A0==22
755 22:39:01.381270 DeviceVref_Margin_A0==38
756 22:39:01.381750 VrefDac_Margin_A1==24
757 22:39:01.386869 DeviceVref_Margin_A1==37
758 22:39:01.387349
759 22:39:01.387806 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 22:39:01.388293
761 22:39:01.420484 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 22:39:01.421031 2D training succeed
763 22:39:01.426122 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 22:39:01.431677 auto size-- 65535DDR cs0 size: 2048MB
765 22:39:01.432198 DDR cs1 size: 2048MB
766 22:39:01.437273 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 22:39:01.437758 cs0 DataBus test pass
768 22:39:01.442869 cs1 DataBus test pass
769 22:39:01.443356 cs0 AddrBus test pass
770 22:39:01.443807 cs1 AddrBus test pass
771 22:39:01.444294
772 22:39:01.448477 100bdlr_step_size ps== 420
773 22:39:01.448983 result report
774 22:39:01.454104 boot times 0Enable ddr reg access
775 22:39:01.459316 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 22:39:01.472810 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 22:39:02.045014 0.0;M3 CHK:0;cm4_sp_mode 0
778 22:39:02.045684 MVN_1=0x00000000
779 22:39:02.050457 MVN_2=0x00000000
780 22:39:02.056128 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 22:39:02.056685 OPS=0x10
782 22:39:02.057142 ring efuse init
783 22:39:02.057582 chipver efuse init
784 22:39:02.061648 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 22:39:02.067257 [0.018961 Inits done]
786 22:39:02.067748 secure task start!
787 22:39:02.068241 high task start!
788 22:39:02.071823 low task start!
789 22:39:02.072330 run into bl31
790 22:39:02.078572 NOTICE: BL31: v1.3(release):4fc40b1
791 22:39:02.086364 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 22:39:02.086869 NOTICE: BL31: G12A normal boot!
793 22:39:02.111697 NOTICE: BL31: BL33 decompress pass
794 22:39:02.117322 ERROR: Error initializing runtime service opteed_fast
795 22:39:03.350354
796 22:39:03.351007
797 22:39:03.358630 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 22:39:03.359133
799 22:39:03.359591 Model: Libre Computer AML-A311D-CC Alta
800 22:39:03.567023 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 22:39:03.590454 DRAM: 2 GiB (effective 3.8 GiB)
802 22:39:03.733606 Core: 408 devices, 31 uclasses, devicetree: separate
803 22:39:03.739296 WDT: Not starting watchdog@f0d0
804 22:39:03.771578 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 22:39:03.784047 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 22:39:03.788987 ** Bad device specification mmc 0 **
807 22:39:03.799325 Card did not respond to voltage select! : -110
808 22:39:03.806987 ** Bad device specification mmc 0 **
809 22:39:03.807478 Couldn't find partition mmc 0
810 22:39:03.815320 Card did not respond to voltage select! : -110
811 22:39:03.820838 ** Bad device specification mmc 0 **
812 22:39:03.821326 Couldn't find partition mmc 0
813 22:39:03.825881 Error: could not access storage.
814 22:39:04.169390 Net: eth0: ethernet@ff3f0000
815 22:39:04.170000 starting USB...
816 22:39:04.421308 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 22:39:04.421886 Starting the controller
818 22:39:04.428176 USB XHCI 1.10
819 22:39:06.589713 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 22:39:06.590366 bl2_stage_init 0x01
821 22:39:06.590832 bl2_stage_init 0x81
822 22:39:06.595341 hw id: 0x0000 - pwm id 0x01
823 22:39:06.595825 bl2_stage_init 0xc1
824 22:39:06.596327 bl2_stage_init 0x02
825 22:39:06.596780
826 22:39:06.600974 L0:00000000
827 22:39:06.601450 L1:20000703
828 22:39:06.601894 L2:00008067
829 22:39:06.602337 L3:14000000
830 22:39:06.603836 B2:00402000
831 22:39:06.604343 B1:e0f83180
832 22:39:06.604789
833 22:39:06.605236 TE: 58124
834 22:39:06.605683
835 22:39:06.615085 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 22:39:06.615592
837 22:39:06.616087 Board ID = 1
838 22:39:06.616540 Set A53 clk to 24M
839 22:39:06.616983 Set A73 clk to 24M
840 22:39:06.620597 Set clk81 to 24M
841 22:39:06.621075 A53 clk: 1200 MHz
842 22:39:06.621523 A73 clk: 1200 MHz
843 22:39:06.624222 CLK81: 166.6M
844 22:39:06.624706 smccc: 00012a92
845 22:39:06.629777 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 22:39:06.635357 board id: 1
847 22:39:06.640458 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 22:39:06.650977 fw parse done
849 22:39:06.656886 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:39:06.699560 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 22:39:06.710510 PIEI prepare done
852 22:39:06.711009 fastboot data load
853 22:39:06.711461 fastboot data verify
854 22:39:06.716075 verify result: 266
855 22:39:06.721672 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 22:39:06.722186 LPDDR4 probe
857 22:39:06.722649 ddr clk to 1584MHz
858 22:39:06.729683 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 22:39:06.766962
860 22:39:06.767511 dmc_version 0001
861 22:39:06.773679 Check phy result
862 22:39:06.779549 INFO : End of CA training
863 22:39:06.780075 INFO : End of initialization
864 22:39:06.785118 INFO : Training has run successfully!
865 22:39:06.785609 Check phy result
866 22:39:06.790750 INFO : End of initialization
867 22:39:06.791244 INFO : End of read enable training
868 22:39:06.794010 INFO : End of fine write leveling
869 22:39:06.799553 INFO : End of Write leveling coarse delay
870 22:39:06.805155 INFO : Training has run successfully!
871 22:39:06.805645 Check phy result
872 22:39:06.806099 INFO : End of initialization
873 22:39:06.810767 INFO : End of read dq deskew training
874 22:39:06.816367 INFO : End of MPR read delay center optimization
875 22:39:06.816865 INFO : End of write delay center optimization
876 22:39:06.821957 INFO : End of read delay center optimization
877 22:39:06.827589 INFO : End of max read latency training
878 22:39:06.828129 INFO : Training has run successfully!
879 22:39:06.833142 1D training succeed
880 22:39:06.839110 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 22:39:06.886626 Check phy result
882 22:39:06.887113 INFO : End of initialization
883 22:39:06.908357 INFO : End of 2D read delay Voltage center optimization
884 22:39:06.928575 INFO : End of 2D read delay Voltage center optimization
885 22:39:06.981667 INFO : End of 2D write delay Voltage center optimization
886 22:39:07.030100 INFO : End of 2D write delay Voltage center optimization
887 22:39:07.035669 INFO : Training has run successfully!
888 22:39:07.036200
889 22:39:07.036660 channel==0
890 22:39:07.041207 RxClkDly_Margin_A0==88 ps 9
891 22:39:07.041683 TxDqDly_Margin_A0==98 ps 10
892 22:39:07.044513 RxClkDly_Margin_A1==88 ps 9
893 22:39:07.044988 TxDqDly_Margin_A1==98 ps 10
894 22:39:07.050070 TrainedVREFDQ_A0==74
895 22:39:07.050545 TrainedVREFDQ_A1==74
896 22:39:07.055703 VrefDac_Margin_A0==25
897 22:39:07.056274 DeviceVref_Margin_A0==40
898 22:39:07.056732 VrefDac_Margin_A1==25
899 22:39:07.061287 DeviceVref_Margin_A1==40
900 22:39:07.061794
901 22:39:07.062229
902 22:39:07.062662 channel==1
903 22:39:07.063087 RxClkDly_Margin_A0==98 ps 10
904 22:39:07.064668 TxDqDly_Margin_A0==98 ps 10
905 22:39:07.070286 RxClkDly_Margin_A1==98 ps 10
906 22:39:07.070748 TxDqDly_Margin_A1==88 ps 9
907 22:39:07.071185 TrainedVREFDQ_A0==77
908 22:39:07.075869 TrainedVREFDQ_A1==77
909 22:39:07.076363 VrefDac_Margin_A0==22
910 22:39:07.081398 DeviceVref_Margin_A0==37
911 22:39:07.081871 VrefDac_Margin_A1==22
912 22:39:07.082308 DeviceVref_Margin_A1==37
913 22:39:07.082734
914 22:39:07.090382 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 22:39:07.090850
916 22:39:07.118387 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 22:39:07.118909 2D training succeed
918 22:39:07.129603 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 22:39:07.130088 auto size-- 65535DDR cs0 size: 2048MB
920 22:39:07.130525 DDR cs1 size: 2048MB
921 22:39:07.135203 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 22:39:07.135678 cs0 DataBus test pass
923 22:39:07.140816 cs1 DataBus test pass
924 22:39:07.141289 cs0 AddrBus test pass
925 22:39:07.146400 cs1 AddrBus test pass
926 22:39:07.146866
927 22:39:07.147302 100bdlr_step_size ps== 420
928 22:39:07.147745 result report
929 22:39:07.152014 boot times 0Enable ddr reg access
930 22:39:07.158606 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 22:39:07.172113 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 22:39:07.745802 0.0;M3 CHK:0;cm4_sp_mode 0
933 22:39:07.746469 MVN_1=0x00000000
934 22:39:07.751201 MVN_2=0x00000000
935 22:39:07.756971 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 22:39:07.757460 OPS=0x10
937 22:39:07.757914 ring efuse init
938 22:39:07.758361 chipver efuse init
939 22:39:07.762526 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 22:39:07.768212 [0.018961 Inits done]
941 22:39:07.768691 secure task start!
942 22:39:07.769144 high task start!
943 22:39:07.772754 low task start!
944 22:39:07.773228 run into bl31
945 22:39:07.779394 NOTICE: BL31: v1.3(release):4fc40b1
946 22:39:07.787181 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 22:39:07.787670 NOTICE: BL31: G12A normal boot!
948 22:39:07.812577 NOTICE: BL31: BL33 decompress pass
949 22:39:07.818270 ERROR: Error initializing runtime service opteed_fast
950 22:39:09.051246
951 22:39:09.051897
952 22:39:09.059566 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 22:39:09.060094
954 22:39:09.060554 Model: Libre Computer AML-A311D-CC Alta
955 22:39:09.267961 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 22:39:09.291346 DRAM: 2 GiB (effective 3.8 GiB)
957 22:39:09.434306 Core: 408 devices, 31 uclasses, devicetree: separate
958 22:39:09.440227 WDT: Not starting watchdog@f0d0
959 22:39:09.472412 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 22:39:09.484909 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 22:39:09.489874 ** Bad device specification mmc 0 **
962 22:39:09.500206 Card did not respond to voltage select! : -110
963 22:39:09.508503 ** Bad device specification mmc 0 **
964 22:39:09.508989 Couldn't find partition mmc 0
965 22:39:09.516285 Card did not respond to voltage select! : -110
966 22:39:09.521801 ** Bad device specification mmc 0 **
967 22:39:09.522292 Couldn't find partition mmc 0
968 22:39:09.526879 Error: could not access storage.
969 22:39:09.870320 Net: eth0: ethernet@ff3f0000
970 22:39:09.870912 starting USB...
971 22:39:10.122161 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 22:39:10.122766 Starting the controller
973 22:39:10.129020 USB XHCI 1.10
974 22:39:11.989598 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 22:39:11.990247 bl2_stage_init 0x01
976 22:39:11.990714 bl2_stage_init 0x81
977 22:39:11.995073 hw id: 0x0000 - pwm id 0x01
978 22:39:11.995553 bl2_stage_init 0xc1
979 22:39:11.996045 bl2_stage_init 0x02
980 22:39:11.996498
981 22:39:12.000672 L0:00000000
982 22:39:12.001149 L1:20000703
983 22:39:12.001600 L2:00008067
984 22:39:12.002040 L3:14000000
985 22:39:12.006270 B2:00402000
986 22:39:12.006742 B1:e0f83180
987 22:39:12.007190
988 22:39:12.007638 TE: 58124
989 22:39:12.008125
990 22:39:12.011865 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 22:39:12.012381
992 22:39:12.012832 Board ID = 1
993 22:39:12.017525 Set A53 clk to 24M
994 22:39:12.018002 Set A73 clk to 24M
995 22:39:12.018447 Set clk81 to 24M
996 22:39:12.023072 A53 clk: 1200 MHz
997 22:39:12.023542 A73 clk: 1200 MHz
998 22:39:12.024021 CLK81: 166.6M
999 22:39:12.024471 smccc: 00012a92
1000 22:39:12.028666 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 22:39:12.034246 board id: 1
1002 22:39:12.040160 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 22:39:12.050806 fw parse done
1004 22:39:12.056783 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:39:12.099408 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 22:39:12.110310 PIEI prepare done
1007 22:39:12.110775 fastboot data load
1008 22:39:12.111213 fastboot data verify
1009 22:39:12.115965 verify result: 266
1010 22:39:12.121570 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 22:39:12.122035 LPDDR4 probe
1012 22:39:12.122470 ddr clk to 1584MHz
1013 22:39:12.129521 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 22:39:12.166817
1015 22:39:12.167325 dmc_version 0001
1016 22:39:12.173467 Check phy result
1017 22:39:12.179345 INFO : End of CA training
1018 22:39:12.179807 INFO : End of initialization
1019 22:39:12.185146 INFO : Training has run successfully!
1020 22:39:12.185673 Check phy result
1021 22:39:12.190817 INFO : End of initialization
1022 22:39:12.191296 INFO : End of read enable training
1023 22:39:12.196413 INFO : End of fine write leveling
1024 22:39:12.201941 INFO : End of Write leveling coarse delay
1025 22:39:12.202416 INFO : Training has run successfully!
1026 22:39:12.202869 Check phy result
1027 22:39:12.207426 INFO : End of initialization
1028 22:39:12.207897 INFO : End of read dq deskew training
1029 22:39:12.212998 INFO : End of MPR read delay center optimization
1030 22:39:12.218780 INFO : End of write delay center optimization
1031 22:39:12.224274 INFO : End of read delay center optimization
1032 22:39:12.224750 INFO : End of max read latency training
1033 22:39:12.229891 INFO : Training has run successfully!
1034 22:39:12.230377 1D training succeed
1035 22:39:12.239146 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 22:39:12.286576 Check phy result
1037 22:39:12.287067 INFO : End of initialization
1038 22:39:12.308233 INFO : End of 2D read delay Voltage center optimization
1039 22:39:12.328262 INFO : End of 2D read delay Voltage center optimization
1040 22:39:12.380246 INFO : End of 2D write delay Voltage center optimization
1041 22:39:12.429484 INFO : End of 2D write delay Voltage center optimization
1042 22:39:12.435055 INFO : Training has run successfully!
1043 22:39:12.435532
1044 22:39:12.436023 channel==0
1045 22:39:12.440668 RxClkDly_Margin_A0==88 ps 9
1046 22:39:12.441145 TxDqDly_Margin_A0==98 ps 10
1047 22:39:12.443914 RxClkDly_Margin_A1==88 ps 9
1048 22:39:12.444415 TxDqDly_Margin_A1==98 ps 10
1049 22:39:12.449485 TrainedVREFDQ_A0==74
1050 22:39:12.449958 TrainedVREFDQ_A1==74
1051 22:39:12.455077 VrefDac_Margin_A0==25
1052 22:39:12.455546 DeviceVref_Margin_A0==40
1053 22:39:12.456021 VrefDac_Margin_A1==25
1054 22:39:12.460714 DeviceVref_Margin_A1==40
1055 22:39:12.461186
1056 22:39:12.461636
1057 22:39:12.462080 channel==1
1058 22:39:12.462520 RxClkDly_Margin_A0==98 ps 10
1059 22:39:12.464116 TxDqDly_Margin_A0==98 ps 10
1060 22:39:12.469809 RxClkDly_Margin_A1==88 ps 9
1061 22:39:12.470277 TxDqDly_Margin_A1==88 ps 9
1062 22:39:12.470725 TrainedVREFDQ_A0==77
1063 22:39:12.475206 TrainedVREFDQ_A1==77
1064 22:39:12.475681 VrefDac_Margin_A0==22
1065 22:39:12.480853 DeviceVref_Margin_A0==37
1066 22:39:12.481320 VrefDac_Margin_A1==24
1067 22:39:12.481766 DeviceVref_Margin_A1==37
1068 22:39:12.482206
1069 22:39:12.486410 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 22:39:12.486890
1071 22:39:12.520036 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1072 22:39:12.520553 2D training succeed
1073 22:39:12.525669 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 22:39:12.531194 auto size-- 65535DDR cs0 size: 2048MB
1075 22:39:12.531672 DDR cs1 size: 2048MB
1076 22:39:12.536814 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 22:39:12.537289 cs0 DataBus test pass
1078 22:39:12.537735 cs1 DataBus test pass
1079 22:39:12.542392 cs0 AddrBus test pass
1080 22:39:12.542862 cs1 AddrBus test pass
1081 22:39:12.543309
1082 22:39:12.547973 100bdlr_step_size ps== 420
1083 22:39:12.548480 result report
1084 22:39:12.548933 boot times 0Enable ddr reg access
1085 22:39:12.557921 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 22:39:12.571385 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 22:39:13.143528 0.0;M3 CHK:0;cm4_sp_mode 0
1088 22:39:13.144239 MVN_1=0x00000000
1089 22:39:13.148951 MVN_2=0x00000000
1090 22:39:13.154811 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 22:39:13.155292 OPS=0x10
1092 22:39:13.155742 ring efuse init
1093 22:39:13.156235 chipver efuse init
1094 22:39:13.160292 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 22:39:13.165919 [0.018961 Inits done]
1096 22:39:13.166392 secure task start!
1097 22:39:13.166846 high task start!
1098 22:39:13.170540 low task start!
1099 22:39:13.171020 run into bl31
1100 22:39:13.177088 NOTICE: BL31: v1.3(release):4fc40b1
1101 22:39:13.184927 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 22:39:13.185419 NOTICE: BL31: G12A normal boot!
1103 22:39:13.210238 NOTICE: BL31: BL33 decompress pass
1104 22:39:13.215965 ERROR: Error initializing runtime service opteed_fast
1105 22:39:14.449065
1106 22:39:14.449700
1107 22:39:14.457334 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 22:39:14.457826
1109 22:39:14.458283 Model: Libre Computer AML-A311D-CC Alta
1110 22:39:14.665861 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 22:39:14.689166 DRAM: 2 GiB (effective 3.8 GiB)
1112 22:39:14.832119 Core: 408 devices, 31 uclasses, devicetree: separate
1113 22:39:14.838090 WDT: Not starting watchdog@f0d0
1114 22:39:14.870197 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 22:39:14.882757 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 22:39:14.887762 ** Bad device specification mmc 0 **
1117 22:39:14.898082 Card did not respond to voltage select! : -110
1118 22:39:14.905683 ** Bad device specification mmc 0 **
1119 22:39:14.906158 Couldn't find partition mmc 0
1120 22:39:14.914051 Card did not respond to voltage select! : -110
1121 22:39:14.919481 ** Bad device specification mmc 0 **
1122 22:39:14.919954 Couldn't find partition mmc 0
1123 22:39:14.924602 Error: could not access storage.
1124 22:39:15.267146 Net: eth0: ethernet@ff3f0000
1125 22:39:15.267754 starting USB...
1126 22:39:15.518853 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 22:39:15.519400 Starting the controller
1128 22:39:15.525910 USB XHCI 1.10
1129 22:39:17.082176 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 22:39:17.090371 scanning usb for storage devices... 0 Storage Device(s) found
1132 22:39:17.142049 Hit any key to stop autoboot: 1
1133 22:39:17.142864 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1134 22:39:17.143478 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1135 22:39:17.144063 Setting prompt string to ['=>']
1136 22:39:17.144588 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1137 22:39:17.157783 0
1138 22:39:17.158680 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 22:39:17.159222 Sending with 10 millisecond of delay
1141 22:39:18.293994 => setenv autoload no
1142 22:39:18.304842 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1143 22:39:18.310222 setenv autoload no
1144 22:39:18.311015 Sending with 10 millisecond of delay
1146 22:39:20.107868 => setenv initrd_high 0xffffffff
1147 22:39:20.118748 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1148 22:39:20.119651 setenv initrd_high 0xffffffff
1149 22:39:20.120468 Sending with 10 millisecond of delay
1151 22:39:21.736969 => setenv fdt_high 0xffffffff
1152 22:39:21.747806 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 22:39:21.748734 setenv fdt_high 0xffffffff
1154 22:39:21.749499 Sending with 10 millisecond of delay
1156 22:39:22.041398 => dhcp
1157 22:39:22.052157 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1158 22:39:22.053049 dhcp
1159 22:39:22.053533 Speed: 1000, full duplex
1160 22:39:22.053987 BOOTP broadcast 1
1161 22:39:22.063893 DHCP client bound to address 192.168.6.27 (12 ms)
1162 22:39:22.064714 Sending with 10 millisecond of delay
1164 22:39:23.741142 => setenv serverip 192.168.6.2
1165 22:39:23.751974 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1166 22:39:23.752980 setenv serverip 192.168.6.2
1167 22:39:23.753719 Sending with 10 millisecond of delay
1169 22:39:27.476880 => tftpboot 0x01080000 937027/tftp-deploy-9yuw0wkj/kernel/uImage
1170 22:39:27.487726 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 22:39:27.488676 tftpboot 0x01080000 937027/tftp-deploy-9yuw0wkj/kernel/uImage
1172 22:39:27.489177 Speed: 1000, full duplex
1173 22:39:27.489636 Using ethernet@ff3f0000 device
1174 22:39:27.490420 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 22:39:27.495949 Filename '937027/tftp-deploy-9yuw0wkj/kernel/uImage'.
1176 22:39:27.499813 Load address: 0x1080000
1177 22:39:30.897515 Loading: *################################################## 43.6 MiB
1178 22:39:30.898192 12.8 MiB/s
1179 22:39:30.898683 done
1180 22:39:30.902088 Bytes transferred = 45713984 (2b98a40 hex)
1181 22:39:30.902951 Sending with 10 millisecond of delay
1183 22:39:35.589804 => tftpboot 0x08000000 937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
1184 22:39:35.600671 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1185 22:39:35.601589 tftpboot 0x08000000 937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot
1186 22:39:35.602090 Speed: 1000, full duplex
1187 22:39:35.602553 Using ethernet@ff3f0000 device
1188 22:39:35.603566 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 22:39:35.615266 Filename '937027/tftp-deploy-9yuw0wkj/ramdisk/ramdisk.cpio.gz.uboot'.
1190 22:39:35.615828 Load address: 0x8000000
1191 22:39:37.124771 Loading: *################################################# UDP wrong checksum 00000005 000001d8
1192 22:39:41.408926 UDP wrong checksum 000000ff 00002a42
1193 22:39:41.450080 UDP wrong checksum 000000ff 0000c434
1194 22:39:42.127066 T UDP wrong checksum 00000005 000001d8
1195 22:39:52.128944 T T UDP wrong checksum 00000005 000001d8
1196 22:40:12.132696 T T T T UDP wrong checksum 00000005 000001d8
1197 22:40:32.137489 T T T
1198 22:40:32.138143 Retry count exceeded; starting again
1200 22:40:32.139701 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1203 22:40:32.141883 end: 2.4 uboot-commands (duration 00:01:52) [common]
1205 22:40:32.143452 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1207 22:40:32.144680 end: 2 uboot-action (duration 00:01:52) [common]
1209 22:40:32.146349 Cleaning after the job
1210 22:40:32.146960 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/ramdisk
1211 22:40:32.148437 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/kernel
1212 22:40:32.196763 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/dtb
1213 22:40:32.197682 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/nfsrootfs
1214 22:40:32.371902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937027/tftp-deploy-9yuw0wkj/modules
1215 22:40:32.393746 start: 4.1 power-off (timeout 00:00:30) [common]
1216 22:40:32.394421 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1217 22:40:32.425325 >> OK - accepted request
1218 22:40:32.427355 Returned 0 in 0 seconds
1219 22:40:32.528153 end: 4.1 power-off (duration 00:00:00) [common]
1221 22:40:32.529160 start: 4.2 read-feedback (timeout 00:10:00) [common]
1222 22:40:32.529819 Listened to connection for namespace 'common' for up to 1s
1223 22:40:33.530755 Finalising connection for namespace 'common'
1224 22:40:33.531246 Disconnecting from shell: Finalise
1225 22:40:33.531534 =>
1226 22:40:33.632232 end: 4.2 read-feedback (duration 00:00:01) [common]
1227 22:40:33.632625 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/937027
1228 22:40:36.798481 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/937027
1229 22:40:36.799281 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.