Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:43:22.192711 lava-dispatcher, installed at version: 2024.01
2 22:43:22.193504 start: 0 validate
3 22:43:22.193962 Start time: 2024-11-04 22:43:22.193934+00:00 (UTC)
4 22:43:22.194506 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:43:22.195035 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:43:22.238788 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:43:22.239478 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:43:22.270287 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:43:22.271030 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:43:22.300735 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:43:22.301290 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:43:22.332660 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:43:22.333228 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-194-g71c9d5bcfa2c%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:43:22.371138 validate duration: 0.18
16 22:43:22.372132 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:43:22.372555 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:43:22.372935 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:43:22.373644 Not decompressing ramdisk as can be used compressed.
20 22:43:22.374188 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:43:22.374529 saving as /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/ramdisk/initrd.cpio.gz
22 22:43:22.374889 total size: 5628169 (5 MB)
23 22:43:22.409942 progress 0 % (0 MB)
24 22:43:22.414052 progress 5 % (0 MB)
25 22:43:22.418239 progress 10 % (0 MB)
26 22:43:22.421896 progress 15 % (0 MB)
27 22:43:22.425931 progress 20 % (1 MB)
28 22:43:22.429552 progress 25 % (1 MB)
29 22:43:22.433652 progress 30 % (1 MB)
30 22:43:22.437713 progress 35 % (1 MB)
31 22:43:22.441414 progress 40 % (2 MB)
32 22:43:22.445514 progress 45 % (2 MB)
33 22:43:22.449121 progress 50 % (2 MB)
34 22:43:22.453158 progress 55 % (2 MB)
35 22:43:22.457190 progress 60 % (3 MB)
36 22:43:22.460799 progress 65 % (3 MB)
37 22:43:22.464833 progress 70 % (3 MB)
38 22:43:22.468447 progress 75 % (4 MB)
39 22:43:22.472440 progress 80 % (4 MB)
40 22:43:22.476215 progress 85 % (4 MB)
41 22:43:22.480204 progress 90 % (4 MB)
42 22:43:22.483841 progress 95 % (5 MB)
43 22:43:22.487120 progress 100 % (5 MB)
44 22:43:22.487765 5 MB downloaded in 0.11 s (47.56 MB/s)
45 22:43:22.488356 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:43:22.489288 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:43:22.489603 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:43:22.489889 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:43:22.490367 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/kernel/Image
51 22:43:22.490624 saving as /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/kernel/Image
52 22:43:22.490841 total size: 45713920 (43 MB)
53 22:43:22.491059 No compression specified
54 22:43:22.524362 progress 0 % (0 MB)
55 22:43:22.552607 progress 5 % (2 MB)
56 22:43:22.581042 progress 10 % (4 MB)
57 22:43:22.609629 progress 15 % (6 MB)
58 22:43:22.638504 progress 20 % (8 MB)
59 22:43:22.666493 progress 25 % (10 MB)
60 22:43:22.694695 progress 30 % (13 MB)
61 22:43:22.722992 progress 35 % (15 MB)
62 22:43:22.751615 progress 40 % (17 MB)
63 22:43:22.779676 progress 45 % (19 MB)
64 22:43:22.808126 progress 50 % (21 MB)
65 22:43:22.836515 progress 55 % (24 MB)
66 22:43:22.865374 progress 60 % (26 MB)
67 22:43:22.893227 progress 65 % (28 MB)
68 22:43:22.921505 progress 70 % (30 MB)
69 22:43:22.950032 progress 75 % (32 MB)
70 22:43:22.978286 progress 80 % (34 MB)
71 22:43:23.008868 progress 85 % (37 MB)
72 22:43:23.037307 progress 90 % (39 MB)
73 22:43:23.065595 progress 95 % (41 MB)
74 22:43:23.093486 progress 100 % (43 MB)
75 22:43:23.094011 43 MB downloaded in 0.60 s (72.28 MB/s)
76 22:43:23.094504 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:43:23.095332 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:43:23.095610 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:43:23.095880 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:43:23.096373 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:43:23.096662 saving as /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:43:23.096872 total size: 53209 (0 MB)
84 22:43:23.097080 No compression specified
85 22:43:23.134397 progress 61 % (0 MB)
86 22:43:23.135252 progress 100 % (0 MB)
87 22:43:23.135823 0 MB downloaded in 0.04 s (1.30 MB/s)
88 22:43:23.136352 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:43:23.137193 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:43:23.137466 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:43:23.137735 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:43:23.138189 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:43:23.138451 saving as /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/nfsrootfs/full.rootfs.tar
95 22:43:23.138661 total size: 120894716 (115 MB)
96 22:43:23.138872 Using unxz to decompress xz
97 22:43:23.173259 progress 0 % (0 MB)
98 22:43:23.961253 progress 5 % (5 MB)
99 22:43:24.799188 progress 10 % (11 MB)
100 22:43:25.591223 progress 15 % (17 MB)
101 22:43:26.328121 progress 20 % (23 MB)
102 22:43:26.921927 progress 25 % (28 MB)
103 22:43:27.751353 progress 30 % (34 MB)
104 22:43:28.542462 progress 35 % (40 MB)
105 22:43:28.890566 progress 40 % (46 MB)
106 22:43:29.262217 progress 45 % (51 MB)
107 22:43:29.975171 progress 50 % (57 MB)
108 22:43:30.890964 progress 55 % (63 MB)
109 22:43:31.667957 progress 60 % (69 MB)
110 22:43:32.423187 progress 65 % (74 MB)
111 22:43:33.202702 progress 70 % (80 MB)
112 22:43:34.030829 progress 75 % (86 MB)
113 22:43:34.819043 progress 80 % (92 MB)
114 22:43:35.581944 progress 85 % (98 MB)
115 22:43:36.478517 progress 90 % (103 MB)
116 22:43:37.238898 progress 95 % (109 MB)
117 22:43:38.054970 progress 100 % (115 MB)
118 22:43:38.067285 115 MB downloaded in 14.93 s (7.72 MB/s)
119 22:43:38.068252 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:43:38.070006 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:43:38.070569 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:43:38.071131 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:43:38.072338 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/modules.tar.xz
125 22:43:38.072943 saving as /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/modules/modules.tar
126 22:43:38.073402 total size: 11607844 (11 MB)
127 22:43:38.073859 Using unxz to decompress xz
128 22:43:38.117518 progress 0 % (0 MB)
129 22:43:38.183236 progress 5 % (0 MB)
130 22:43:38.256294 progress 10 % (1 MB)
131 22:43:38.351059 progress 15 % (1 MB)
132 22:43:38.442826 progress 20 % (2 MB)
133 22:43:38.523545 progress 25 % (2 MB)
134 22:43:38.598106 progress 30 % (3 MB)
135 22:43:38.671021 progress 35 % (3 MB)
136 22:43:38.748713 progress 40 % (4 MB)
137 22:43:38.824123 progress 45 % (5 MB)
138 22:43:38.907977 progress 50 % (5 MB)
139 22:43:38.983940 progress 55 % (6 MB)
140 22:43:39.067613 progress 60 % (6 MB)
141 22:43:39.147115 progress 65 % (7 MB)
142 22:43:39.224673 progress 70 % (7 MB)
143 22:43:39.309591 progress 75 % (8 MB)
144 22:43:39.394362 progress 80 % (8 MB)
145 22:43:39.476088 progress 85 % (9 MB)
146 22:43:39.553060 progress 90 % (9 MB)
147 22:43:39.629407 progress 95 % (10 MB)
148 22:43:39.705137 progress 100 % (11 MB)
149 22:43:39.715962 11 MB downloaded in 1.64 s (6.74 MB/s)
150 22:43:39.716930 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:43:39.718698 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:43:39.719271 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:43:39.719841 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:43:55.999865 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/937053/extract-nfsrootfs-f6vazp6f
156 22:43:56.000500 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:43:56.000788 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:43:56.001475 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd
159 22:43:56.001949 makedir: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin
160 22:43:56.002285 makedir: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/tests
161 22:43:56.002601 makedir: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/results
162 22:43:56.002936 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-add-keys
163 22:43:56.003468 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-add-sources
164 22:43:56.004003 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-background-process-start
165 22:43:56.004570 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-background-process-stop
166 22:43:56.005176 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-common-functions
167 22:43:56.005687 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-echo-ipv4
168 22:43:56.006178 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-install-packages
169 22:43:56.006656 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-installed-packages
170 22:43:56.007196 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-os-build
171 22:43:56.007684 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-probe-channel
172 22:43:56.008195 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-probe-ip
173 22:43:56.008725 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-target-ip
174 22:43:56.009252 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-target-mac
175 22:43:56.009737 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-target-storage
176 22:43:56.010227 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-case
177 22:43:56.010712 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-event
178 22:43:56.011191 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-feedback
179 22:43:56.011670 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-raise
180 22:43:56.012182 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-reference
181 22:43:56.012709 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-runner
182 22:43:56.013223 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-set
183 22:43:56.013706 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-test-shell
184 22:43:56.014191 Updating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-add-keys (debian)
185 22:43:56.014730 Updating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-add-sources (debian)
186 22:43:56.015236 Updating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-install-packages (debian)
187 22:43:56.015738 Updating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-installed-packages (debian)
188 22:43:56.016272 Updating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/bin/lava-os-build (debian)
189 22:43:56.016721 Creating /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/environment
190 22:43:56.017098 LAVA metadata
191 22:43:56.017362 - LAVA_JOB_ID=937053
192 22:43:56.017579 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:43:56.017935 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:43:56.018882 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:43:56.019194 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:43:56.019402 skipped lava-vland-overlay
197 22:43:56.019641 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:43:56.019893 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:43:56.020145 skipped lava-multinode-overlay
200 22:43:56.020391 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:43:56.020641 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:43:56.020891 Loading test definitions
203 22:43:56.021164 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:43:56.021383 Using /lava-937053 at stage 0
205 22:43:56.022485 uuid=937053_1.6.2.4.1 testdef=None
206 22:43:56.022795 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:43:56.023059 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:43:56.024662 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:43:56.025455 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:43:56.027355 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:43:56.028216 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:43:56.030033 runner path: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/0/tests/0_timesync-off test_uuid 937053_1.6.2.4.1
215 22:43:56.030576 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:43:56.031386 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:43:56.031608 Using /lava-937053 at stage 0
219 22:43:56.031956 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:43:56.032278 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/0/tests/1_kselftest-kvm'
221 22:43:59.765075 Running '/usr/bin/git checkout kernelci.org
222 22:44:00.210499 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 22:44:00.211940 uuid=937053_1.6.2.4.5 testdef=None
224 22:44:00.212323 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:44:00.213091 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 22:44:00.215943 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:44:00.216804 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 22:44:00.220529 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:44:00.221395 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 22:44:00.225001 runner path: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/0/tests/1_kselftest-kvm test_uuid 937053_1.6.2.4.5
234 22:44:00.225288 BOARD='meson-sm1-s905d3-libretech-cc'
235 22:44:00.225504 BRANCH='broonie-sound'
236 22:44:00.225709 SKIPFILE='/dev/null'
237 22:44:00.225911 SKIP_INSTALL='True'
238 22:44:00.226111 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-194-g71c9d5bcfa2c/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:44:00.226315 TST_CASENAME=''
240 22:44:00.226515 TST_CMDFILES='kvm'
241 22:44:00.227061 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:44:00.227863 Creating lava-test-runner.conf files
244 22:44:00.228102 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/937053/lava-overlay-z8d149vd/lava-937053/0 for stage 0
245 22:44:00.228494 - 0_timesync-off
246 22:44:00.228742 - 1_kselftest-kvm
247 22:44:00.229086 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:44:00.229377 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 22:44:23.349697 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:44:23.350131 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:44:23.350396 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:44:23.350666 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:44:23.350934 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:44:23.966762 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:44:23.967265 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 22:44:23.967539 extracting modules file /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937053/extract-nfsrootfs-f6vazp6f
257 22:44:25.308535 extracting modules file /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk
258 22:44:26.681419 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:44:26.681902 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 22:44:26.682202 [common] Applying overlay to NFS
261 22:44:26.682433 [common] Applying overlay /var/lib/lava/dispatcher/tmp/937053/compress-overlay-x4xo4akb/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/937053/extract-nfsrootfs-f6vazp6f
262 22:44:29.441523 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:44:29.441975 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:44:29.442281 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:44:29.442541 Converting downloaded kernel to a uImage
266 22:44:29.442872 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/kernel/Image /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/kernel/uImage
267 22:44:29.893697 output: Image Name:
268 22:44:29.894102 output: Created: Mon Nov 4 22:44:29 2024
269 22:44:29.894312 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:44:29.894518 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:44:29.894720 output: Load Address: 01080000
272 22:44:29.894920 output: Entry Point: 01080000
273 22:44:29.895117 output:
274 22:44:29.895447 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 22:44:29.895715 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 22:44:29.896011 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 22:44:29.896279 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:44:29.896538 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 22:44:29.896793 Building ramdisk /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk
280 22:44:32.037435 >> 166790 blocks
281 22:44:39.721002 Adding RAMdisk u-boot header.
282 22:44:39.721710 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk.cpio.gz.uboot
283 22:44:39.985393 output: Image Name:
284 22:44:39.985810 output: Created: Mon Nov 4 22:44:39 2024
285 22:44:39.986024 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:44:39.986231 output: Data Size: 23432231 Bytes = 22883.04 KiB = 22.35 MiB
287 22:44:39.986434 output: Load Address: 00000000
288 22:44:39.986636 output: Entry Point: 00000000
289 22:44:39.986836 output:
290 22:44:39.987454 rename /var/lib/lava/dispatcher/tmp/937053/extract-overlay-ramdisk-m4nya4mr/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
291 22:44:39.987878 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:44:39.988386 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 22:44:39.988949 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 22:44:39.989398 No LXC device requested
295 22:44:39.989893 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:44:39.990403 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 22:44:39.990891 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:44:39.991302 Checking files for TFTP limit of 4294967296 bytes.
299 22:44:39.993987 end: 1 tftp-deploy (duration 00:01:18) [common]
300 22:44:39.994578 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:44:39.995104 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:44:39.995602 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:44:39.996137 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:44:39.996672 Using kernel file from prepare-kernel: 937053/tftp-deploy-vusn1jqx/kernel/uImage
305 22:44:39.997301 substitutions:
306 22:44:39.997713 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:44:39.998117 - {DTB_ADDR}: 0x01070000
308 22:44:39.998516 - {DTB}: 937053/tftp-deploy-vusn1jqx/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 22:44:39.998919 - {INITRD}: 937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
310 22:44:39.999317 - {KERNEL_ADDR}: 0x01080000
311 22:44:39.999709 - {KERNEL}: 937053/tftp-deploy-vusn1jqx/kernel/uImage
312 22:44:40.000138 - {LAVA_MAC}: None
313 22:44:40.000576 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/937053/extract-nfsrootfs-f6vazp6f
314 22:44:40.000979 - {NFS_SERVER_IP}: 192.168.6.2
315 22:44:40.001371 - {PRESEED_CONFIG}: None
316 22:44:40.001762 - {PRESEED_LOCAL}: None
317 22:44:40.002153 - {RAMDISK_ADDR}: 0x08000000
318 22:44:40.002540 - {RAMDISK}: 937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
319 22:44:40.002929 - {ROOT_PART}: None
320 22:44:40.003317 - {ROOT}: None
321 22:44:40.003705 - {SERVER_IP}: 192.168.6.2
322 22:44:40.004119 - {TEE_ADDR}: 0x83000000
323 22:44:40.004511 - {TEE}: None
324 22:44:40.004895 Parsed boot commands:
325 22:44:40.005269 - setenv autoload no
326 22:44:40.005651 - setenv initrd_high 0xffffffff
327 22:44:40.006031 - setenv fdt_high 0xffffffff
328 22:44:40.006407 - dhcp
329 22:44:40.006787 - setenv serverip 192.168.6.2
330 22:44:40.007172 - tftpboot 0x01080000 937053/tftp-deploy-vusn1jqx/kernel/uImage
331 22:44:40.007561 - tftpboot 0x08000000 937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
332 22:44:40.007949 - tftpboot 0x01070000 937053/tftp-deploy-vusn1jqx/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 22:44:40.008371 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/937053/extract-nfsrootfs-f6vazp6f,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:44:40.008776 - bootm 0x01080000 0x08000000 0x01070000
335 22:44:40.009275 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:44:40.010749 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:44:40.011164 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 22:44:40.026034 Setting prompt string to ['lava-test: # ']
340 22:44:40.027555 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:44:40.028202 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:44:40.028786 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:44:40.029318 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:44:40.030475 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 22:44:40.067799 >> OK - accepted request
346 22:44:40.069976 Returned 0 in 0 seconds
347 22:44:40.171082 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:44:40.172741 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:44:40.173292 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:44:40.173800 Setting prompt string to ['Hit any key to stop autoboot']
352 22:44:40.174245 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:44:40.175820 Trying 192.168.56.21...
354 22:44:40.176351 Connected to conserv1.
355 22:44:40.176757 Escape character is '^]'.
356 22:44:40.177172
357 22:44:40.177589 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:44:40.177996
359 22:44:47.876707 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 22:44:47.877327 bl2_stage_init 0x01
361 22:44:47.877790 bl2_stage_init 0x81
362 22:44:47.882277 hw id: 0x0000 - pwm id 0x01
363 22:44:47.882742 bl2_stage_init 0xc1
364 22:44:47.887824 bl2_stage_init 0x02
365 22:44:47.888374
366 22:44:47.888816 L0:00000000
367 22:44:47.889250 L1:00000703
368 22:44:47.889658 L2:00008067
369 22:44:47.890072 L3:15000000
370 22:44:47.893459 S1:00000000
371 22:44:47.893914 B2:20282000
372 22:44:47.894330 B1:a0f83180
373 22:44:47.894727
374 22:44:47.895123 TE: 69584
375 22:44:47.895519
376 22:44:47.899017 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 22:44:47.899457
378 22:44:47.904712 Board ID = 1
379 22:44:47.905170 Set cpu clk to 24M
380 22:44:47.905574 Set clk81 to 24M
381 22:44:47.910369 Use GP1_pll as DSU clk.
382 22:44:47.910811 DSU clk: 1200 Mhz
383 22:44:47.911213 CPU clk: 1200 MHz
384 22:44:47.915883 Set clk81 to 166.6M
385 22:44:47.921457 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 22:44:47.921890 board id: 1
387 22:44:47.928636 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:44:47.939412 fw parse done
389 22:44:47.945395 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:44:47.988509 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:44:47.999740 PIEI prepare done
392 22:44:48.000207 fastboot data load
393 22:44:48.000617 fastboot data verify
394 22:44:48.005263 verify result: 266
395 22:44:48.010879 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 22:44:48.011307 LPDDR4 probe
397 22:44:48.011710 ddr clk to 1584MHz
398 22:44:48.018896 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:44:48.056546
400 22:44:48.056968 dmc_version 0001
401 22:44:48.063612 Check phy result
402 22:44:48.069608 INFO : End of CA training
403 22:44:48.070033 INFO : End of initialization
404 22:44:48.075216 INFO : Training has run successfully!
405 22:44:48.075649 Check phy result
406 22:44:48.080823 INFO : End of initialization
407 22:44:48.081249 INFO : End of read enable training
408 22:44:48.086410 INFO : End of fine write leveling
409 22:44:48.092027 INFO : End of Write leveling coarse delay
410 22:44:48.092456 INFO : Training has run successfully!
411 22:44:48.092859 Check phy result
412 22:44:48.097592 INFO : End of initialization
413 22:44:48.098026 INFO : End of read dq deskew training
414 22:44:48.103206 INFO : End of MPR read delay center optimization
415 22:44:48.108836 INFO : End of write delay center optimization
416 22:44:48.114419 INFO : End of read delay center optimization
417 22:44:48.114841 INFO : End of max read latency training
418 22:44:48.120040 INFO : Training has run successfully!
419 22:44:48.120485 1D training succeed
420 22:44:48.129199 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:44:48.177468 Check phy result
422 22:44:48.177890 INFO : End of initialization
423 22:44:48.204932 INFO : End of 2D read delay Voltage center optimization
424 22:44:48.229016 INFO : End of 2D read delay Voltage center optimization
425 22:44:48.285663 INFO : End of 2D write delay Voltage center optimization
426 22:44:48.339639 INFO : End of 2D write delay Voltage center optimization
427 22:44:48.345243 INFO : Training has run successfully!
428 22:44:48.345671
429 22:44:48.346077 channel==0
430 22:44:48.350858 RxClkDly_Margin_A0==78 ps 8
431 22:44:48.351279 TxDqDly_Margin_A0==98 ps 10
432 22:44:48.356435 RxClkDly_Margin_A1==78 ps 8
433 22:44:48.356854 TxDqDly_Margin_A1==98 ps 10
434 22:44:48.357255 TrainedVREFDQ_A0==74
435 22:44:48.362029 TrainedVREFDQ_A1==75
436 22:44:48.362450 VrefDac_Margin_A0==23
437 22:44:48.362853 DeviceVref_Margin_A0==40
438 22:44:48.367650 VrefDac_Margin_A1==23
439 22:44:48.368098 DeviceVref_Margin_A1==39
440 22:44:48.368501
441 22:44:48.368901
442 22:44:48.373232 channel==1
443 22:44:48.373656 RxClkDly_Margin_A0==78 ps 8
444 22:44:48.374060 TxDqDly_Margin_A0==98 ps 10
445 22:44:48.378850 RxClkDly_Margin_A1==78 ps 8
446 22:44:48.379274 TxDqDly_Margin_A1==88 ps 9
447 22:44:48.384419 TrainedVREFDQ_A0==78
448 22:44:48.384844 TrainedVREFDQ_A1==78
449 22:44:48.385246 VrefDac_Margin_A0==22
450 22:44:48.390039 DeviceVref_Margin_A0==36
451 22:44:48.390462 VrefDac_Margin_A1==22
452 22:44:48.395636 DeviceVref_Margin_A1==36
453 22:44:48.396083
454 22:44:48.396490 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:44:48.396885
456 22:44:48.429241 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
457 22:44:48.429747 2D training succeed
458 22:44:48.434860 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:44:48.440419 auto size-- 65535DDR cs0 size: 2048MB
460 22:44:48.440846 DDR cs1 size: 2048MB
461 22:44:48.446027 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:44:48.446449 cs0 DataBus test pass
463 22:44:48.451634 cs1 DataBus test pass
464 22:44:48.452093 cs0 AddrBus test pass
465 22:44:48.452503 cs1 AddrBus test pass
466 22:44:48.452903
467 22:44:48.457230 100bdlr_step_size ps== 471
468 22:44:48.457666 result report
469 22:44:48.462856 boot times 0Enable ddr reg access
470 22:44:48.468104 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:44:48.482007 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 22:44:49.141416 bl2z: ptr: 05129330, size: 00001e40
473 22:44:49.148773 0.0;M3 CHK:0;cm4_sp_mode 0
474 22:44:49.149216 MVN_1=0x00000000
475 22:44:49.149624 MVN_2=0x00000000
476 22:44:49.160276 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 22:44:49.160726 OPS=0x04
478 22:44:49.161133 ring efuse init
479 22:44:49.165908 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 22:44:49.166343 [0.017354 Inits done]
481 22:44:49.166743 secure task start!
482 22:44:49.173540 high task start!
483 22:44:49.173969 low task start!
484 22:44:49.174371 run into bl31
485 22:44:49.182154 NOTICE: BL31: v1.3(release):4fc40b1
486 22:44:49.189988 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 22:44:49.190416 NOTICE: BL31: G12A normal boot!
488 22:44:49.205454 NOTICE: BL31: BL33 decompress pass
489 22:44:49.211149 ERROR: Error initializing runtime service opteed_fast
490 22:44:50.430512 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 22:44:50.431053 bl2_stage_init 0x01
492 22:44:50.431476 bl2_stage_init 0x81
493 22:44:50.436113 hw id: 0x0000 - pwm id 0x01
494 22:44:50.436600 bl2_stage_init 0xc1
495 22:44:50.441723 bl2_stage_init 0x02
496 22:44:50.442219
497 22:44:50.442610 L0:00000000
498 22:44:50.442999 L1:00000703
499 22:44:50.443379 L2:00008067
500 22:44:50.443761 L3:15000000
501 22:44:50.447285 S1:00000000
502 22:44:50.447709 B2:20282000
503 22:44:50.448122 B1:a0f83180
504 22:44:50.448507
505 22:44:50.448892 TE: 71896
506 22:44:50.449272
507 22:44:50.452887 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 22:44:50.453305
509 22:44:50.458486 Board ID = 1
510 22:44:50.458909 Set cpu clk to 24M
511 22:44:50.459295 Set clk81 to 24M
512 22:44:50.464090 Use GP1_pll as DSU clk.
513 22:44:50.464523 DSU clk: 1200 Mhz
514 22:44:50.464909 CPU clk: 1200 MHz
515 22:44:50.469668 Set clk81 to 166.6M
516 22:44:50.475278 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 22:44:50.475699 board id: 1
518 22:44:50.482455 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 22:44:50.493148 fw parse done
520 22:44:50.499155 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 22:44:50.541755 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 22:44:50.552732 PIEI prepare done
523 22:44:50.553148 fastboot data load
524 22:44:50.553536 fastboot data verify
525 22:44:50.558295 verify result: 266
526 22:44:50.565576 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 22:44:50.566011 LPDDR4 probe
528 22:44:50.566397 ddr clk to 1584MHz
529 22:44:51.927523 Load ddrf SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 22:44:51.928158 bl2_stage_init 0x01
531 22:44:51.928568 bl2_stage_init 0x81
532 22:44:51.933099 hw id: 0x0000 - pwm id 0x01
533 22:44:51.933535 bl2_stage_init 0xc1
534 22:44:51.938692 bl2_stage_init 0x02
535 22:44:51.939129
536 22:44:51.939538 L0:00000000
537 22:44:51.939940 L1:00000703
538 22:44:51.940383 L2:00008067
539 22:44:51.940783 L3:15000000
540 22:44:51.944384 S1:00000000
541 22:44:51.944819 B2:20282000
542 22:44:51.945223 B1:a0f83180
543 22:44:51.945620
544 22:44:51.946018 TE: 70591
545 22:44:51.946415
546 22:44:51.949920 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 22:44:51.950375
548 22:44:51.955514 Board ID = 1
549 22:44:51.955947 Set cpu clk to 24M
550 22:44:51.956386 Set clk81 to 24M
551 22:44:51.961118 Use GP1_pll as DSU clk.
552 22:44:51.961549 DSU clk: 1200 Mhz
553 22:44:51.961948 CPU clk: 1200 MHz
554 22:44:51.966709 Set clk81 to 166.6M
555 22:44:51.972299 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 22:44:51.972728 board id: 1
557 22:44:51.979497 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 22:44:51.990403 fw parse done
559 22:44:51.996370 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 22:44:52.039499 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 22:44:52.050668 PIEI prepare done
562 22:44:52.051111 fastboot data load
563 22:44:52.051520 fastboot data verify
564 22:44:52.056264 verify result: 266
565 22:44:52.061850 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 22:44:52.062283 LPDDR4 probe
567 22:44:52.062686 ddr clk to 1584MHz
568 22:44:52.069842 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 22:44:52.107537
570 22:44:52.108039 dmc_version 0001
571 22:44:52.114600 Check phy result
572 22:44:52.120571 INFO : End of CA training
573 22:44:52.121001 INFO : End of initialization
574 22:44:52.126174 INFO : Training has run successfully!
575 22:44:52.126597 Check phy result
576 22:44:52.131770 INFO : End of initialization
577 22:44:52.132235 INFO : End of read enable training
578 22:44:52.137392 INFO : End of fine write leveling
579 22:44:52.142975 INFO : End of Write leveling coarse delay
580 22:44:52.143399 INFO : Training has run successfully!
581 22:44:52.143801 Check phy result
582 22:44:52.148574 INFO : End of initialization
583 22:44:52.148999 INFO : End of read dq deskew training
584 22:44:52.154171 INFO : End of MPR read delay center optimization
585 22:44:52.159769 INFO : End of write delay center optimization
586 22:44:52.165414 INFO : End of read delay center optimization
587 22:44:52.165850 INFO : End of max read latency training
588 22:44:52.170954 INFO : Training has run successfully!
589 22:44:52.171383 1D training succeed
590 22:44:52.180194 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 22:44:52.228505 Check phy result
592 22:44:52.228948 INFO : End of initialization
593 22:44:52.255841 INFO : End of 2D read delay Voltage center optimization
594 22:44:52.279878 INFO : End of 2D read delay Voltage center optimization
595 22:44:52.336528 INFO : End of 2D write delay Voltage center optimization
596 22:44:52.390506 INFO : End of 2D write delay Voltage center optimization
597 22:44:52.396085 INFO : Training has run successfully!
598 22:44:52.396564
599 22:44:52.396977 channel==0
600 22:44:52.401665 RxClkDly_Margin_A0==78 ps 8
601 22:44:52.402110 TxDqDly_Margin_A0==98 ps 10
602 22:44:52.407278 RxClkDly_Margin_A1==88 ps 9
603 22:44:52.407716 TxDqDly_Margin_A1==98 ps 10
604 22:44:52.408154 TrainedVREFDQ_A0==74
605 22:44:52.412873 TrainedVREFDQ_A1==75
606 22:44:52.413313 VrefDac_Margin_A0==23
607 22:44:52.413721 DeviceVref_Margin_A0==40
608 22:44:52.418487 VrefDac_Margin_A1==23
609 22:44:52.418930 DeviceVref_Margin_A1==39
610 22:44:52.419332
611 22:44:52.419728
612 22:44:52.424078 channel==1
613 22:44:52.424521 RxClkDly_Margin_A0==88 ps 9
614 22:44:52.424931 TxDqDly_Margin_A0==88 ps 9
615 22:44:52.429661 RxClkDly_Margin_A1==78 ps 8
616 22:44:52.430103 TxDqDly_Margin_A1==88 ps 9
617 22:44:52.435266 TrainedVREFDQ_A0==78
618 22:44:52.435703 TrainedVREFDQ_A1==77
619 22:44:52.436145 VrefDac_Margin_A0==22
620 22:44:52.440882 DeviceVref_Margin_A0==36
621 22:44:52.441313 VrefDac_Margin_A1==22
622 22:44:52.446492 DeviceVref_Margin_A1==37
623 22:44:52.446941
624 22:44:52.447349 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 22:44:52.447746
626 22:44:52.480075 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
627 22:44:52.480589 2D training succeed
628 22:44:52.485673 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 22:44:52.491265 auto size-- 65535DDR cs0 size: 2048MB
630 22:44:52.491712 DDR cs1 size: 2048MB
631 22:44:52.496873 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 22:44:52.497316 cs0 DataBus test pass
633 22:44:52.502500 cs1 DataBus test pass
634 22:44:52.502956 cs0 AddrBus test pass
635 22:44:52.503361 cs1 AddrBus test pass
636 22:44:52.503755
637 22:44:52.508080 100bdlr_step_size ps== 471
638 22:44:52.508540 result report
639 22:44:52.513659 boot times 0Enable ddr reg access
640 22:44:52.518856 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 22:44:52.532701 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 22:44:53.192739 bl2z: ptr: 05129330, size: 00001e40
643 22:44:53.201608 0.0;M3 CHK:0;cm4_sp_mode 0
644 22:44:53.202071 MVN_1=0x00000000
645 22:44:53.202480 MVN_2=0x00000000
646 22:44:53.213186 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 22:44:53.213635 OPS=0x04
648 22:44:53.214045 ring efuse init
649 22:44:53.218799 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 22:44:53.219247 [0.017354 Inits done]
651 22:44:53.219653 secure task start!
652 22:44:53.226928 high task start!
653 22:44:53.227370 low task start!
654 22:44:53.227774 run into bl31
655 22:44:53.235428 NOTICE: BL31: v1.3(release):4fc40b1
656 22:44:53.243271 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 22:44:53.243721 NOTICE: BL31: G12A normal boot!
658 22:44:53.258754 NOTICE: BL31: BL33 decompress pass
659 22:44:53.264558 ERROR: Error initializing runtime service opteed_fast
660 22:44:54.629503 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 22:44:54.630107 bl2_stage_init 0x01
662 22:44:54.630530 bl2_stage_init 0x81
663 22:44:54.635179 hw id: 0x0000 - pwm id 0x01
664 22:44:54.635625 bl2_stage_init 0xc1
665 22:44:54.640668 bl2_stage_init 0x02
666 22:44:54.641115
667 22:44:54.641526 L0:00000000
668 22:44:54.641927 L1:00000703
669 22:44:54.642325 L2:00008067
670 22:44:54.642723 L3:15000000
671 22:44:54.646286 S1:00000000
672 22:44:54.646719 B2:20282000
673 22:44:54.647124 B1:a0f83180
674 22:44:54.647516
675 22:44:54.647912 TE: 70881
676 22:44:54.648347
677 22:44:54.651900 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 22:44:54.652370
679 22:44:54.657464 Board ID = 1
680 22:44:54.657904 Set cpu clk to 24M
681 22:44:54.658309 Set clk81 to 24M
682 22:44:54.663032 Use GP1_pll as DSU clk.
683 22:44:54.663477 DSU clk: 1200 Mhz
684 22:44:54.663884 CPU clk: 1200 MHz
685 22:44:54.668552 Set clk81 to 166.6M
686 22:44:54.674160 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 22:44:54.674595 board id: 1
688 22:44:54.681547 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 22:44:54.692266 fw parse done
690 22:44:54.698267 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 22:44:54.741415 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 22:44:54.752529 PIEI prepare done
693 22:44:54.752983 fastboot data load
694 22:44:54.753397 fastboot data verify
695 22:44:54.758122 verify result: 266
696 22:44:54.763726 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 22:44:54.764212 LPDDR4 probe
698 22:44:54.764629 ddr clk to 1584MHz
699 22:44:54.771717 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 22:44:54.809438
701 22:44:54.809894 dmc_version 0001
702 22:44:54.816472 Check phy result
703 22:44:54.822437 INFO : End of CA training
704 22:44:54.822877 INFO : End of initialization
705 22:44:54.828083 INFO : Training has run successfully!
706 22:44:54.828522 Check phy result
707 22:44:54.833647 INFO : End of initialization
708 22:44:54.834080 INFO : End of read enable training
709 22:44:54.839238 INFO : End of fine write leveling
710 22:44:54.844857 INFO : End of Write leveling coarse delay
711 22:44:54.845287 INFO : Training has run successfully!
712 22:44:54.845694 Check phy result
713 22:44:54.850443 INFO : End of initialization
714 22:44:54.850869 INFO : End of read dq deskew training
715 22:44:54.856063 INFO : End of MPR read delay center optimization
716 22:44:54.861637 INFO : End of write delay center optimization
717 22:44:54.867233 INFO : End of read delay center optimization
718 22:44:54.867660 INFO : End of max read latency training
719 22:44:54.872869 INFO : Training has run successfully!
720 22:44:54.873303 1D training succeed
721 22:44:54.882068 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 22:44:54.930317 Check phy result
723 22:44:54.930807 INFO : End of initialization
724 22:44:54.957863 INFO : End of 2D read delay Voltage center optimization
725 22:44:54.981980 INFO : End of 2D read delay Voltage center optimization
726 22:44:55.038670 INFO : End of 2D write delay Voltage center optimization
727 22:44:55.092679 INFO : End of 2D write delay Voltage center optimization
728 22:44:55.098198 INFO : Training has run successfully!
729 22:44:55.098642
730 22:44:55.099050 channel==0
731 22:44:55.103919 RxClkDly_Margin_A0==78 ps 8
732 22:44:55.104411 TxDqDly_Margin_A0==98 ps 10
733 22:44:55.107173 RxClkDly_Margin_A1==78 ps 8
734 22:44:55.107609 TxDqDly_Margin_A1==98 ps 10
735 22:44:55.112732 TrainedVREFDQ_A0==74
736 22:44:55.113180 TrainedVREFDQ_A1==74
737 22:44:55.118326 VrefDac_Margin_A0==23
738 22:44:55.118768 DeviceVref_Margin_A0==40
739 22:44:55.119177 VrefDac_Margin_A1==23
740 22:44:55.123933 DeviceVref_Margin_A1==40
741 22:44:55.124400
742 22:44:55.124809
743 22:44:55.125210 channel==1
744 22:44:55.125604 RxClkDly_Margin_A0==78 ps 8
745 22:44:55.127377 TxDqDly_Margin_A0==88 ps 9
746 22:44:55.132964 RxClkDly_Margin_A1==88 ps 9
747 22:44:55.133409 TxDqDly_Margin_A1==88 ps 9
748 22:44:55.133821 TrainedVREFDQ_A0==75
749 22:44:55.138454 TrainedVREFDQ_A1==75
750 22:44:55.138904 VrefDac_Margin_A0==22
751 22:44:55.144176 DeviceVref_Margin_A0==39
752 22:44:55.144625 VrefDac_Margin_A1==20
753 22:44:55.145030 DeviceVref_Margin_A1==39
754 22:44:55.145430
755 22:44:55.153115 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 22:44:55.153565
757 22:44:55.178971 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 22:44:55.184484 2D training succeed
759 22:44:55.188019 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 22:44:55.193404 auto size-- 65535DDR cs0 size: 2048MB
761 22:44:55.193848 DDR cs1 size: 2048MB
762 22:44:55.199013 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 22:44:55.199483 cs0 DataBus test pass
764 22:44:55.204621 cs1 DataBus test pass
765 22:44:55.205083 cs0 AddrBus test pass
766 22:44:55.205493 cs1 AddrBus test pass
767 22:44:55.205893
768 22:44:55.210228 100bdlr_step_size ps== 478
769 22:44:55.210679 result report
770 22:44:55.215868 boot times 0Enable ddr reg access
771 22:44:55.220951 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 22:44:55.234784 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 22:44:55.894498 bl2z: ptr: 05129330, size: 00001e40
774 22:44:55.902763 0.0;M3 CHK:0;cm4_sp_mode 0
775 22:44:55.903284 MVN_1=0x00000000
776 22:44:55.903692 MVN_2=0x00000000
777 22:44:55.914295 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 22:44:55.914895 OPS=0x04
779 22:44:55.915350 ring efuse init
780 22:44:55.917218 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 22:44:55.923078 [0.017354 Inits done]
782 22:44:55.923591 secure task start!
783 22:44:55.924068 high task start!
784 22:44:55.924508 low task start!
785 22:44:55.927382 run into bl31
786 22:44:55.936074 NOTICE: BL31: v1.3(release):4fc40b1
787 22:44:55.943833 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 22:44:55.944394 NOTICE: BL31: G12A normal boot!
789 22:44:55.959497 NOTICE: BL31: BL33 decompress pass
790 22:44:55.965150 ERROR: Error initializing runtime service opteed_fast
791 22:44:56.760625
792 22:44:56.761270
793 22:44:56.766154 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 22:44:56.766761
795 22:44:56.769561 Model: Libre Computer AML-S905D3-CC Solitude
796 22:44:56.916504 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 22:44:56.931968 DRAM: 2 GiB (effective 3.8 GiB)
798 22:44:57.032927 Core: 406 devices, 33 uclasses, devicetree: separate
799 22:44:57.038821 WDT: Not starting watchdog@f0d0
800 22:44:57.063864 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 22:44:57.076119 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 22:44:57.081103 ** Bad device specification mmc 0 **
803 22:44:57.091167 Card did not respond to voltage select! : -110
804 22:44:57.098789 ** Bad device specification mmc 0 **
805 22:44:57.099371 Couldn't find partition mmc 0
806 22:44:57.107153 Card did not respond to voltage select! : -110
807 22:44:57.112674 ** Bad device specification mmc 0 **
808 22:44:57.113264 Couldn't find partition mmc 0
809 22:44:57.117718 Error: could not access storage.
810 22:44:57.414065 Net: eth0: ethernet@ff3f0000
811 22:44:57.414704 starting USB...
812 22:44:57.658773 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 22:44:57.659382 Starting the controller
814 22:44:57.665727 USB XHCI 1.10
815 22:44:59.221863 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 22:44:59.230138 scanning usb for storage devices... 0 Storage Device(s) found
818 22:44:59.281778 Hit any key to stop autoboot: 1
819 22:44:59.283124 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 22:44:59.283857 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 22:44:59.284474 Setting prompt string to ['=>']
822 22:44:59.285028 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 22:44:59.296262 0
824 22:44:59.297086 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 22:44:59.398272 => setenv autoload no
827 22:44:59.399104 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 22:44:59.403234 setenv autoload no
830 22:44:59.504378 => setenv initrd_high 0xffffffff
831 22:44:59.505389 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
832 22:44:59.509632 setenv initrd_high 0xffffffff
834 22:44:59.611217 => setenv fdt_high 0xffffffff
835 22:44:59.612199 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 22:44:59.616401 setenv fdt_high 0xffffffff
838 22:44:59.718055 => dhcp
839 22:44:59.719025 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 22:44:59.723027 dhcp
841 22:45:00.428704 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 22:45:00.429350 Speed: 1000, full duplex
843 22:45:00.429827 BOOTP broadcast 1
844 22:45:00.677436 BOOTP broadcast 2
845 22:45:00.690247 DHCP client bound to address 192.168.6.21 (260 ms)
847 22:45:00.791386 => setenv serverip 192.168.6.2
848 22:45:00.792259 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 22:45:00.796618 setenv serverip 192.168.6.2
851 22:45:00.897707 => tftpboot 0x01080000 937053/tftp-deploy-vusn1jqx/kernel/uImage
852 22:45:00.900226 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 22:45:00.906883 tftpboot 0x01080000 937053/tftp-deploy-vusn1jqx/kernel/uImage
854 22:45:00.907359 Speed: 1000, full duplex
855 22:45:00.907759 Using ethernet@ff3f0000 device
856 22:45:00.912388 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 22:45:00.917929 Filename '937053/tftp-deploy-vusn1jqx/kernel/uImage'.
858 22:45:00.921892 Load address: 0x1080000
859 22:45:03.751613 Loading: *################################################## 43.6 MiB
860 22:45:03.752178 15.4 MiB/s
861 22:45:03.752702 done
862 22:45:03.756108 Bytes transferred = 45713984 (2b98a40 hex)
864 22:45:03.857624 => tftpboot 0x08000000 937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
865 22:45:03.858387 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 22:45:03.865399 tftpboot 0x08000000 937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot
867 22:45:03.865929 Speed: 1000, full duplex
868 22:45:03.866335 Using ethernet@ff3f0000 device
869 22:45:03.870880 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 22:45:03.880669 Filename '937053/tftp-deploy-vusn1jqx/ramdisk/ramdisk.cpio.gz.uboot'.
871 22:45:03.881171 Load address: 0x8000000
872 22:45:05.311539 Loading: *################################################# UDP wrong checksum 00000005 0000ff40
873 22:45:10.312593 T UDP wrong checksum 00000005 0000ff40
874 22:45:20.314492 T T UDP wrong checksum 00000005 0000ff40
875 22:45:40.316456 T T T UDP wrong checksum 00000005 0000ff40
876 22:46:00.323240 T T T T
877 22:46:00.323887 Retry count exceeded; starting again
879 22:46:00.325435 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 22:46:00.327323 end: 2.4 uboot-commands (duration 00:01:20) [common]
884 22:46:00.328748 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 22:46:00.329783 end: 2 uboot-action (duration 00:01:20) [common]
888 22:46:00.331289 Cleaning after the job
889 22:46:00.331837 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/ramdisk
890 22:46:00.333234 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/kernel
891 22:46:00.379183 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/dtb
892 22:46:00.379931 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/nfsrootfs
893 22:46:00.541829 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937053/tftp-deploy-vusn1jqx/modules
894 22:46:00.560828 start: 4.1 power-off (timeout 00:00:30) [common]
895 22:46:00.561476 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 22:46:00.594578 >> OK - accepted request
897 22:46:00.596413 Returned 0 in 0 seconds
898 22:46:00.697168 end: 4.1 power-off (duration 00:00:00) [common]
900 22:46:00.698089 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 22:46:00.698738 Listened to connection for namespace 'common' for up to 1s
902 22:46:01.699623 Finalising connection for namespace 'common'
903 22:46:01.700115 Disconnecting from shell: Finalise
904 22:46:01.700413 =>
905 22:46:01.800999 end: 4.2 read-feedback (duration 00:00:01) [common]
906 22:46:01.801335 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/937053
907 22:46:04.637757 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/937053
908 22:46:04.638382 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.