Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:38:07.151306 lava-dispatcher, installed at version: 2024.01
2 21:38:07.152098 start: 0 validate
3 21:38:07.152573 Start time: 2024-11-05 21:38:07.152542+00:00 (UTC)
4 21:38:07.153129 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:38:07.153661 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 21:38:07.189819 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:38:07.190372 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:38:07.222450 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:38:07.223388 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:38:08.277666 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:38:08.278200 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 21:38:08.316373 validate duration: 1.16
14 21:38:08.317215 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 21:38:08.317551 start: 1.1 download-retry (timeout 00:10:00) [common]
16 21:38:08.317858 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 21:38:08.318425 Not decompressing ramdisk as can be used compressed.
18 21:38:08.318861 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 21:38:08.319103 saving as /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/ramdisk/rootfs.cpio.gz
20 21:38:08.319359 total size: 8181887 (7 MB)
21 21:38:08.361098 progress 0 % (0 MB)
22 21:38:08.372145 progress 5 % (0 MB)
23 21:38:08.382932 progress 10 % (0 MB)
24 21:38:08.393345 progress 15 % (1 MB)
25 21:38:08.398902 progress 20 % (1 MB)
26 21:38:08.404652 progress 25 % (1 MB)
27 21:38:08.409949 progress 30 % (2 MB)
28 21:38:08.415586 progress 35 % (2 MB)
29 21:38:08.420927 progress 40 % (3 MB)
30 21:38:08.426632 progress 45 % (3 MB)
31 21:38:08.431881 progress 50 % (3 MB)
32 21:38:08.437529 progress 55 % (4 MB)
33 21:38:08.442756 progress 60 % (4 MB)
34 21:38:08.448410 progress 65 % (5 MB)
35 21:38:08.453613 progress 70 % (5 MB)
36 21:38:08.459155 progress 75 % (5 MB)
37 21:38:08.464404 progress 80 % (6 MB)
38 21:38:08.470015 progress 85 % (6 MB)
39 21:38:08.475328 progress 90 % (7 MB)
40 21:38:08.481093 progress 95 % (7 MB)
41 21:38:08.485985 progress 100 % (7 MB)
42 21:38:08.486627 7 MB downloaded in 0.17 s (46.65 MB/s)
43 21:38:08.487185 end: 1.1.1 http-download (duration 00:00:00) [common]
45 21:38:08.488121 end: 1.1 download-retry (duration 00:00:00) [common]
46 21:38:08.488438 start: 1.2 download-retry (timeout 00:10:00) [common]
47 21:38:08.488723 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 21:38:08.489212 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kernel/Image
49 21:38:08.489483 saving as /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/kernel/Image
50 21:38:08.489706 total size: 45713920 (43 MB)
51 21:38:08.489925 No compression specified
52 21:38:08.522171 progress 0 % (0 MB)
53 21:38:08.553239 progress 5 % (2 MB)
54 21:38:08.585062 progress 10 % (4 MB)
55 21:38:08.616951 progress 15 % (6 MB)
56 21:38:08.654157 progress 20 % (8 MB)
57 21:38:08.684660 progress 25 % (10 MB)
58 21:38:08.713569 progress 30 % (13 MB)
59 21:38:08.742576 progress 35 % (15 MB)
60 21:38:08.771591 progress 40 % (17 MB)
61 21:38:08.799851 progress 45 % (19 MB)
62 21:38:08.829077 progress 50 % (21 MB)
63 21:38:08.858390 progress 55 % (24 MB)
64 21:38:08.886991 progress 60 % (26 MB)
65 21:38:08.915530 progress 65 % (28 MB)
66 21:38:08.944174 progress 70 % (30 MB)
67 21:38:08.978515 progress 75 % (32 MB)
68 21:38:09.007732 progress 80 % (34 MB)
69 21:38:09.036021 progress 85 % (37 MB)
70 21:38:09.065264 progress 90 % (39 MB)
71 21:38:09.093965 progress 95 % (41 MB)
72 21:38:09.122098 progress 100 % (43 MB)
73 21:38:09.122631 43 MB downloaded in 0.63 s (68.88 MB/s)
74 21:38:09.123113 end: 1.2.1 http-download (duration 00:00:01) [common]
76 21:38:09.123931 end: 1.2 download-retry (duration 00:00:01) [common]
77 21:38:09.124243 start: 1.3 download-retry (timeout 00:09:59) [common]
78 21:38:09.124511 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 21:38:09.124974 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 21:38:09.125250 saving as /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/dtb/meson-g12b-a311d-libretech-cc.dtb
81 21:38:09.125461 total size: 54703 (0 MB)
82 21:38:09.125671 No compression specified
83 21:38:09.169729 progress 59 % (0 MB)
84 21:38:09.170765 progress 100 % (0 MB)
85 21:38:09.171486 0 MB downloaded in 0.05 s (1.13 MB/s)
86 21:38:09.172169 end: 1.3.1 http-download (duration 00:00:00) [common]
88 21:38:09.173235 end: 1.3 download-retry (duration 00:00:00) [common]
89 21:38:09.173573 start: 1.4 download-retry (timeout 00:09:59) [common]
90 21:38:09.173975 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 21:38:09.174588 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/modules.tar.xz
92 21:38:09.174901 saving as /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/modules/modules.tar
93 21:38:09.175171 total size: 11607644 (11 MB)
94 21:38:09.175438 Using unxz to decompress xz
95 21:38:09.211576 progress 0 % (0 MB)
96 21:38:09.278119 progress 5 % (0 MB)
97 21:38:09.355030 progress 10 % (1 MB)
98 21:38:09.454509 progress 15 % (1 MB)
99 21:38:09.550434 progress 20 % (2 MB)
100 21:38:09.634300 progress 25 % (2 MB)
101 21:38:09.712494 progress 30 % (3 MB)
102 21:38:09.787883 progress 35 % (3 MB)
103 21:38:09.865827 progress 40 % (4 MB)
104 21:38:09.942866 progress 45 % (5 MB)
105 21:38:10.027896 progress 50 % (5 MB)
106 21:38:10.105596 progress 55 % (6 MB)
107 21:38:10.191118 progress 60 % (6 MB)
108 21:38:10.271931 progress 65 % (7 MB)
109 21:38:10.349039 progress 70 % (7 MB)
110 21:38:10.431689 progress 75 % (8 MB)
111 21:38:10.516221 progress 80 % (8 MB)
112 21:38:10.596755 progress 85 % (9 MB)
113 21:38:10.675955 progress 90 % (9 MB)
114 21:38:10.754352 progress 95 % (10 MB)
115 21:38:10.831794 progress 100 % (11 MB)
116 21:38:10.843751 11 MB downloaded in 1.67 s (6.63 MB/s)
117 21:38:10.844659 end: 1.4.1 http-download (duration 00:00:02) [common]
119 21:38:10.846441 end: 1.4 download-retry (duration 00:00:02) [common]
120 21:38:10.847020 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 21:38:10.847589 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 21:38:10.848168 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 21:38:10.848729 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 21:38:10.849825 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz
125 21:38:10.850739 makedir: /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin
126 21:38:10.851486 makedir: /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/tests
127 21:38:10.852222 makedir: /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/results
128 21:38:10.852917 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-add-keys
129 21:38:10.853942 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-add-sources
130 21:38:10.854955 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-background-process-start
131 21:38:10.855976 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-background-process-stop
132 21:38:10.857107 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-common-functions
133 21:38:10.858119 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-echo-ipv4
134 21:38:10.859137 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-install-packages
135 21:38:10.860200 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-installed-packages
136 21:38:10.861195 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-os-build
137 21:38:10.862176 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-probe-channel
138 21:38:10.863161 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-probe-ip
139 21:38:10.864191 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-target-ip
140 21:38:10.865200 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-target-mac
141 21:38:10.866179 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-target-storage
142 21:38:10.867195 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-case
143 21:38:10.868984 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-event
144 21:38:10.870107 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-feedback
145 21:38:10.871154 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-raise
146 21:38:10.872812 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-reference
147 21:38:10.873899 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-runner
148 21:38:10.874916 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-set
149 21:38:10.876057 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-test-shell
150 21:38:10.877190 Updating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-install-packages (oe)
151 21:38:10.878368 Updating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/bin/lava-installed-packages (oe)
152 21:38:10.879321 Creating /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/environment
153 21:38:10.880152 LAVA metadata
154 21:38:10.880673 - LAVA_JOB_ID=942737
155 21:38:10.881106 - LAVA_DISPATCHER_IP=192.168.6.2
156 21:38:10.881791 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 21:38:10.883613 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 21:38:10.884266 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 21:38:10.884692 skipped lava-vland-overlay
160 21:38:10.885185 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 21:38:10.885691 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 21:38:10.886121 skipped lava-multinode-overlay
163 21:38:10.886605 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 21:38:10.887104 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 21:38:10.887587 Loading test definitions
166 21:38:10.888116 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 21:38:10.888366 Using /lava-942737 at stage 0
168 21:38:10.889640 uuid=942737_1.5.2.4.1 testdef=None
169 21:38:10.889981 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 21:38:10.890256 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 21:38:10.892305 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 21:38:10.893143 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 21:38:10.895628 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 21:38:10.896533 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 21:38:10.898899 runner path: /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/0/tests/0_dmesg test_uuid 942737_1.5.2.4.1
178 21:38:10.899516 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 21:38:10.900349 Creating lava-test-runner.conf files
181 21:38:10.900561 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/942737/lava-overlay-d0f6v4zz/lava-942737/0 for stage 0
182 21:38:10.900920 - 0_dmesg
183 21:38:10.901292 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 21:38:10.901584 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 21:38:10.925620 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 21:38:10.926073 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 21:38:10.926339 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 21:38:10.926609 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 21:38:10.926876 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 21:38:11.842560 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 21:38:11.843011 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 21:38:11.843263 extracting modules file /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk
193 21:38:13.368716 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 21:38:13.369302 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 21:38:13.369675 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942737/compress-overlay-q0vspeen/overlay-1.5.2.5.tar.gz to ramdisk
196 21:38:13.369968 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942737/compress-overlay-q0vspeen/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk
197 21:38:13.407850 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 21:38:13.408386 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 21:38:13.408719 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 21:38:13.409001 Converting downloaded kernel to a uImage
201 21:38:13.409375 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/kernel/Image /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/kernel/uImage
202 21:38:13.896332 output: Image Name:
203 21:38:13.896749 output: Created: Tue Nov 5 21:38:13 2024
204 21:38:13.896965 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 21:38:13.897173 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 21:38:13.897375 output: Load Address: 01080000
207 21:38:13.897575 output: Entry Point: 01080000
208 21:38:13.897773 output:
209 21:38:13.898110 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 21:38:13.898380 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 21:38:13.898649 start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
212 21:38:13.898902 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 21:38:13.899159 start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
214 21:38:13.899428 Building ramdisk /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk
215 21:38:16.284321 >> 181575 blocks
216 21:38:25.331094 Adding RAMdisk u-boot header.
217 21:38:25.331749 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk.cpio.gz.uboot
218 21:38:25.614862 output: Image Name:
219 21:38:25.615278 output: Created: Tue Nov 5 21:38:25 2024
220 21:38:25.615489 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 21:38:25.615694 output: Data Size: 26054537 Bytes = 25443.88 KiB = 24.85 MiB
222 21:38:25.615894 output: Load Address: 00000000
223 21:38:25.616252 output: Entry Point: 00000000
224 21:38:25.616650 output:
225 21:38:25.617740 rename /var/lib/lava/dispatcher/tmp/942737/extract-overlay-ramdisk-xuo1hx2u/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
226 21:38:25.618445 end: 1.5.8 compress-ramdisk (duration 00:00:12) [common]
227 21:38:25.618984 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
228 21:38:25.619500 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 21:38:25.619950 No LXC device requested
230 21:38:25.620485 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 21:38:25.620993 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 21:38:25.621479 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 21:38:25.621897 Checking files for TFTP limit of 4294967296 bytes.
234 21:38:25.624544 end: 1 tftp-deploy (duration 00:00:17) [common]
235 21:38:25.625116 start: 2 uboot-action (timeout 00:05:00) [common]
236 21:38:25.625636 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 21:38:25.626130 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 21:38:25.626627 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 21:38:25.627151 Using kernel file from prepare-kernel: 942737/tftp-deploy-mij1o43f/kernel/uImage
240 21:38:25.627750 substitutions:
241 21:38:25.628189 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 21:38:25.628591 - {DTB_ADDR}: 0x01070000
243 21:38:25.628984 - {DTB}: 942737/tftp-deploy-mij1o43f/dtb/meson-g12b-a311d-libretech-cc.dtb
244 21:38:25.629378 - {INITRD}: 942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
245 21:38:25.629770 - {KERNEL_ADDR}: 0x01080000
246 21:38:25.630159 - {KERNEL}: 942737/tftp-deploy-mij1o43f/kernel/uImage
247 21:38:25.630550 - {LAVA_MAC}: None
248 21:38:25.630975 - {PRESEED_CONFIG}: None
249 21:38:25.631366 - {PRESEED_LOCAL}: None
250 21:38:25.631756 - {RAMDISK_ADDR}: 0x08000000
251 21:38:25.632167 - {RAMDISK}: 942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
252 21:38:25.632561 - {ROOT_PART}: None
253 21:38:25.632948 - {ROOT}: None
254 21:38:25.633333 - {SERVER_IP}: 192.168.6.2
255 21:38:25.633719 - {TEE_ADDR}: 0x83000000
256 21:38:25.634102 - {TEE}: None
257 21:38:25.634485 Parsed boot commands:
258 21:38:25.634857 - setenv autoload no
259 21:38:25.635240 - setenv initrd_high 0xffffffff
260 21:38:25.635624 - setenv fdt_high 0xffffffff
261 21:38:25.636032 - dhcp
262 21:38:25.636422 - setenv serverip 192.168.6.2
263 21:38:25.636809 - tftpboot 0x01080000 942737/tftp-deploy-mij1o43f/kernel/uImage
264 21:38:25.637196 - tftpboot 0x08000000 942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
265 21:38:25.637580 - tftpboot 0x01070000 942737/tftp-deploy-mij1o43f/dtb/meson-g12b-a311d-libretech-cc.dtb
266 21:38:25.637966 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 21:38:25.638357 - bootm 0x01080000 0x08000000 0x01070000
268 21:38:25.638840 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 21:38:25.640327 start: 2.3 connect-device (timeout 00:05:00) [common]
271 21:38:25.640766 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 21:38:25.655375 Setting prompt string to ['lava-test: # ']
273 21:38:25.656879 end: 2.3 connect-device (duration 00:00:00) [common]
274 21:38:25.657470 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 21:38:25.658048 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 21:38:25.658677 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 21:38:25.659714 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 21:38:25.694056 >> OK - accepted request
279 21:38:25.696237 Returned 0 in 0 seconds
280 21:38:25.797322 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 21:38:25.798884 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 21:38:25.799439 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 21:38:25.799935 Setting prompt string to ['Hit any key to stop autoboot']
285 21:38:25.800431 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 21:38:25.801993 Trying 192.168.56.21...
287 21:38:25.802485 Connected to conserv1.
288 21:38:25.802911 Escape character is '^]'.
289 21:38:25.803329
290 21:38:25.803755 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 21:38:25.804225
292 21:38:37.127708 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 21:38:37.128393 bl2_stage_init 0x01
294 21:38:37.128859 bl2_stage_init 0x81
295 21:38:37.133323 hw id: 0x0000 - pwm id 0x01
296 21:38:37.133879 bl2_stage_init 0xc1
297 21:38:37.134298 bl2_stage_init 0x02
298 21:38:37.134688
299 21:38:37.138872 L0:00000000
300 21:38:37.139325 L1:20000703
301 21:38:37.139717 L2:00008067
302 21:38:37.140141 L3:14000000
303 21:38:37.144402 B2:00402000
304 21:38:37.144860 B1:e0f83180
305 21:38:37.145247
306 21:38:37.145636 TE: 58159
307 21:38:37.146022
308 21:38:37.149996 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 21:38:37.150444
310 21:38:37.150838 Board ID = 1
311 21:38:37.155533 Set A53 clk to 24M
312 21:38:37.155975 Set A73 clk to 24M
313 21:38:37.156403 Set clk81 to 24M
314 21:38:37.161167 A53 clk: 1200 MHz
315 21:38:37.161605 A73 clk: 1200 MHz
316 21:38:37.161991 CLK81: 166.6M
317 21:38:37.162374 smccc: 00012ab4
318 21:38:37.166777 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 21:38:37.172355 board id: 1
320 21:38:37.178287 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 21:38:37.188944 fw parse done
322 21:38:37.194898 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 21:38:37.237530 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 21:38:37.248406 PIEI prepare done
325 21:38:37.248849 fastboot data load
326 21:38:37.249240 fastboot data verify
327 21:38:37.254074 verify result: 266
328 21:38:37.259734 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 21:38:37.260272 LPDDR4 probe
330 21:38:37.260683 ddr clk to 1584MHz
331 21:38:37.267628 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 21:38:37.304973
333 21:38:37.305496 dmc_version 0001
334 21:38:37.311636 Check phy result
335 21:38:37.317499 INFO : End of CA training
336 21:38:37.317981 INFO : End of initialization
337 21:38:37.323055 INFO : Training has run successfully!
338 21:38:37.323520 Check phy result
339 21:38:37.328696 INFO : End of initialization
340 21:38:37.329152 INFO : End of read enable training
341 21:38:37.331954 INFO : End of fine write leveling
342 21:38:37.337486 INFO : End of Write leveling coarse delay
343 21:38:37.343101 INFO : Training has run successfully!
344 21:38:37.343560 Check phy result
345 21:38:37.343973 INFO : End of initialization
346 21:38:37.348797 INFO : End of read dq deskew training
347 21:38:37.352104 INFO : End of MPR read delay center optimization
348 21:38:37.357608 INFO : End of write delay center optimization
349 21:38:37.363311 INFO : End of read delay center optimization
350 21:38:37.363777 INFO : End of max read latency training
351 21:38:37.368824 INFO : Training has run successfully!
352 21:38:37.369277 1D training succeed
353 21:38:37.377137 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 21:38:37.424614 Check phy result
355 21:38:37.425083 INFO : End of initialization
356 21:38:37.447209 INFO : End of 2D read delay Voltage center optimization
357 21:38:37.467480 INFO : End of 2D read delay Voltage center optimization
358 21:38:37.519480 INFO : End of 2D write delay Voltage center optimization
359 21:38:37.568786 INFO : End of 2D write delay Voltage center optimization
360 21:38:37.574471 INFO : Training has run successfully!
361 21:38:37.574923
362 21:38:37.575331 channel==0
363 21:38:37.580076 RxClkDly_Margin_A0==88 ps 9
364 21:38:37.580531 TxDqDly_Margin_A0==98 ps 10
365 21:38:37.585637 RxClkDly_Margin_A1==88 ps 9
366 21:38:37.586088 TxDqDly_Margin_A1==98 ps 10
367 21:38:37.586495 TrainedVREFDQ_A0==74
368 21:38:37.591250 TrainedVREFDQ_A1==76
369 21:38:37.591717 VrefDac_Margin_A0==25
370 21:38:37.592158 DeviceVref_Margin_A0==40
371 21:38:37.596794 VrefDac_Margin_A1==24
372 21:38:37.597243 DeviceVref_Margin_A1==38
373 21:38:37.597651
374 21:38:37.598050
375 21:38:37.602396 channel==1
376 21:38:37.602847 RxClkDly_Margin_A0==98 ps 10
377 21:38:37.603255 TxDqDly_Margin_A0==88 ps 9
378 21:38:37.607999 RxClkDly_Margin_A1==98 ps 10
379 21:38:37.608453 TxDqDly_Margin_A1==98 ps 10
380 21:38:37.613652 TrainedVREFDQ_A0==77
381 21:38:37.614108 TrainedVREFDQ_A1==77
382 21:38:37.614515 VrefDac_Margin_A0==22
383 21:38:37.619197 DeviceVref_Margin_A0==37
384 21:38:37.619648 VrefDac_Margin_A1==22
385 21:38:37.624886 DeviceVref_Margin_A1==37
386 21:38:37.625372
387 21:38:37.625807 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 21:38:37.630420
389 21:38:37.658360 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
390 21:38:37.658905 2D training succeed
391 21:38:37.664041 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 21:38:37.669524 auto size-- 65535DDR cs0 size: 2048MB
393 21:38:37.669997 DDR cs1 size: 2048MB
394 21:38:37.675133 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 21:38:37.675599 cs0 DataBus test pass
396 21:38:37.680783 cs1 DataBus test pass
397 21:38:37.681248 cs0 AddrBus test pass
398 21:38:37.681654 cs1 AddrBus test pass
399 21:38:37.682050
400 21:38:37.686388 100bdlr_step_size ps== 420
401 21:38:37.686862 result report
402 21:38:37.691965 boot times 0Enable ddr reg access
403 21:38:37.697401 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 21:38:37.710814 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 21:38:38.284526 0.0;M3 CHK:0;cm4_sp_mode 0
406 21:38:38.285112 MVN_1=0x00000000
407 21:38:38.290188 MVN_2=0x00000000
408 21:38:38.295845 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 21:38:38.296429 OPS=0x10
410 21:38:38.296852 ring efuse init
411 21:38:38.297263 chipver efuse init
412 21:38:38.301425 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 21:38:38.306976 [0.018961 Inits done]
414 21:38:38.307496 secure task start!
415 21:38:38.307918 high task start!
416 21:38:38.311579 low task start!
417 21:38:38.312112 run into bl31
418 21:38:38.318357 NOTICE: BL31: v1.3(release):4fc40b1
419 21:38:38.326094 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 21:38:38.326634 NOTICE: BL31: G12A normal boot!
421 21:38:38.351424 NOTICE: BL31: BL33 decompress pass
422 21:38:38.357098 ERROR: Error initializing runtime service opteed_fast
423 21:38:39.589909
424 21:38:39.590482
425 21:38:39.598337 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 21:38:39.598793
427 21:38:39.599203 Model: Libre Computer AML-A311D-CC Alta
428 21:38:39.806772 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 21:38:39.830133 DRAM: 2 GiB (effective 3.8 GiB)
430 21:38:39.973108 Core: 408 devices, 31 uclasses, devicetree: separate
431 21:38:39.978957 WDT: Not starting watchdog@f0d0
432 21:38:40.011206 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 21:38:40.023650 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 21:38:40.028663 ** Bad device specification mmc 0 **
435 21:38:40.038994 Card did not respond to voltage select! : -110
436 21:38:40.046665 ** Bad device specification mmc 0 **
437 21:38:40.047122 Couldn't find partition mmc 0
438 21:38:40.054987 Card did not respond to voltage select! : -110
439 21:38:40.060560 ** Bad device specification mmc 0 **
440 21:38:40.061015 Couldn't find partition mmc 0
441 21:38:40.065620 Error: could not access storage.
442 21:38:41.328028 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 21:38:41.328449 bl2_stage_init 0x01
444 21:38:41.328664 bl2_stage_init 0x81
445 21:38:41.333683 hw id: 0x0000 - pwm id 0x01
446 21:38:41.334045 bl2_stage_init 0xc1
447 21:38:41.334352 bl2_stage_init 0x02
448 21:38:41.334646
449 21:38:41.339122 L0:00000000
450 21:38:41.339488 L1:20000703
451 21:38:41.339719 L2:00008067
452 21:38:41.339923 L3:14000000
453 21:38:41.344726 B2:00402000
454 21:38:41.344994 B1:e0f83180
455 21:38:41.345197
456 21:38:41.345397 TE: 58124
457 21:38:41.345597
458 21:38:41.350328 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 21:38:41.350686
460 21:38:41.350992 Board ID = 1
461 21:38:41.355934 Set A53 clk to 24M
462 21:38:41.356340 Set A73 clk to 24M
463 21:38:41.356757 Set clk81 to 24M
464 21:38:41.361704 A53 clk: 1200 MHz
465 21:38:41.362157 A73 clk: 1200 MHz
466 21:38:41.362566 CLK81: 166.6M
467 21:38:41.362963 smccc: 00012a92
468 21:38:41.367277 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 21:38:41.372842 board id: 1
470 21:38:41.378877 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 21:38:41.389401 fw parse done
472 21:38:41.395354 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 21:38:41.437964 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 21:38:41.448893 PIEI prepare done
475 21:38:41.449359 fastboot data load
476 21:38:41.449773 fastboot data verify
477 21:38:41.454591 verify result: 266
478 21:38:41.460105 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 21:38:41.460568 LPDDR4 probe
480 21:38:41.460980 ddr clk to 1584MHz
481 21:38:41.468086 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 21:38:41.505327
483 21:38:41.505834 dmc_version 0001
484 21:38:41.512037 Check phy result
485 21:38:41.517860 INFO : End of CA training
486 21:38:41.518319 INFO : End of initialization
487 21:38:41.523448 INFO : Training has run successfully!
488 21:38:41.523906 Check phy result
489 21:38:41.529087 INFO : End of initialization
490 21:38:41.529548 INFO : End of read enable training
491 21:38:41.534692 INFO : End of fine write leveling
492 21:38:41.540300 INFO : End of Write leveling coarse delay
493 21:38:41.540754 INFO : Training has run successfully!
494 21:38:41.541165 Check phy result
495 21:38:41.545903 INFO : End of initialization
496 21:38:41.546357 INFO : End of read dq deskew training
497 21:38:41.551486 INFO : End of MPR read delay center optimization
498 21:38:41.557088 INFO : End of write delay center optimization
499 21:38:41.562672 INFO : End of read delay center optimization
500 21:38:41.563123 INFO : End of max read latency training
501 21:38:41.568321 INFO : Training has run successfully!
502 21:38:41.568786 1D training succeed
503 21:38:41.577422 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 21:38:41.625061 Check phy result
505 21:38:41.625551 INFO : End of initialization
506 21:38:41.646758 INFO : End of 2D read delay Voltage center optimization
507 21:38:41.667011 INFO : End of 2D read delay Voltage center optimization
508 21:38:41.719025 INFO : End of 2D write delay Voltage center optimization
509 21:38:41.768425 INFO : End of 2D write delay Voltage center optimization
510 21:38:41.774003 INFO : Training has run successfully!
511 21:38:41.774461
512 21:38:41.774871 channel==0
513 21:38:41.779628 RxClkDly_Margin_A0==88 ps 9
514 21:38:41.780127 TxDqDly_Margin_A0==98 ps 10
515 21:38:41.782917 RxClkDly_Margin_A1==88 ps 9
516 21:38:41.783366 TxDqDly_Margin_A1==88 ps 9
517 21:38:41.788428 TrainedVREFDQ_A0==74
518 21:38:41.788888 TrainedVREFDQ_A1==74
519 21:38:41.789299 VrefDac_Margin_A0==24
520 21:38:41.794039 DeviceVref_Margin_A0==40
521 21:38:41.794496 VrefDac_Margin_A1==25
522 21:38:41.799625 DeviceVref_Margin_A1==40
523 21:38:41.800115
524 21:38:41.800527
525 21:38:41.800923 channel==1
526 21:38:41.801319 RxClkDly_Margin_A0==98 ps 10
527 21:38:41.805227 TxDqDly_Margin_A0==88 ps 9
528 21:38:41.805680 RxClkDly_Margin_A1==98 ps 10
529 21:38:41.810861 TxDqDly_Margin_A1==88 ps 9
530 21:38:41.811313 TrainedVREFDQ_A0==77
531 21:38:41.811715 TrainedVREFDQ_A1==77
532 21:38:41.816395 VrefDac_Margin_A0==22
533 21:38:41.816847 DeviceVref_Margin_A0==37
534 21:38:41.822009 VrefDac_Margin_A1==22
535 21:38:41.822458 DeviceVref_Margin_A1==37
536 21:38:41.822860
537 21:38:41.827636 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 21:38:41.828115
539 21:38:41.855575 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
540 21:38:41.861487 2D training succeed
541 21:38:41.866886 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 21:38:41.867346 auto size-- 65535DDR cs0 size: 2048MB
543 21:38:41.872403 DDR cs1 size: 2048MB
544 21:38:41.872859 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 21:38:41.878012 cs0 DataBus test pass
546 21:38:41.878469 cs1 DataBus test pass
547 21:38:41.878873 cs0 AddrBus test pass
548 21:38:41.883628 cs1 AddrBus test pass
549 21:38:41.884119
550 21:38:41.884768 100bdlr_step_size ps== 420
551 21:38:41.885192 result report
552 21:38:41.889239 boot times 0Enable ddr reg access
553 21:38:41.896970 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 21:38:41.910308 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 21:38:42.484151 0.0;M3 CHK:0;cm4_sp_mode 0
556 21:38:42.484748 MVN_1=0x00000000
557 21:38:42.489549 MVN_2=0x00000000
558 21:38:42.495342 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 21:38:42.495834 OPS=0x10
560 21:38:42.496368 ring efuse init
561 21:38:42.496811 chipver efuse init
562 21:38:42.500972 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 21:38:42.506464 [0.018961 Inits done]
564 21:38:42.506933 secure task start!
565 21:38:42.507333 high task start!
566 21:38:42.511086 low task start!
567 21:38:42.511530 run into bl31
568 21:38:42.517746 NOTICE: BL31: v1.3(release):4fc40b1
569 21:38:42.525509 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 21:38:42.525964 NOTICE: BL31: G12A normal boot!
571 21:38:42.550977 NOTICE: BL31: BL33 decompress pass
572 21:38:42.556546 ERROR: Error initializing runtime service opteed_fast
573 21:38:43.789470
574 21:38:43.790085
575 21:38:43.797679 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 21:38:43.798177
577 21:38:43.798600 Model: Libre Computer AML-A311D-CC Alta
578 21:38:44.006285 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 21:38:44.029713 DRAM: 2 GiB (effective 3.8 GiB)
580 21:38:44.173195 Core: 408 devices, 31 uclasses, devicetree: separate
581 21:38:44.178451 WDT: Not starting watchdog@f0d0
582 21:38:44.210753 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 21:38:44.223188 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 21:38:44.228301 ** Bad device specification mmc 0 **
585 21:38:44.238528 Card did not respond to voltage select! : -110
586 21:38:44.245941 ** Bad device specification mmc 0 **
587 21:38:44.246372 Couldn't find partition mmc 0
588 21:38:44.254433 Card did not respond to voltage select! : -110
589 21:38:44.260064 ** Bad device specification mmc 0 **
590 21:38:44.260620 Couldn't find partition mmc 0
591 21:38:44.265043 Error: could not access storage.
592 21:38:44.608610 Net: eth0: ethernet@ff3f0000
593 21:38:44.609051 starting USB...
594 21:38:44.860276 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 21:38:44.860869 Starting the controller
596 21:38:44.867259 USB XHCI 1.10
597 21:38:46.578130 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 21:38:46.578539 bl2_stage_init 0x01
599 21:38:46.578759 bl2_stage_init 0x81
600 21:38:46.583640 hw id: 0x0000 - pwm id 0x01
601 21:38:46.584105 bl2_stage_init 0xc1
602 21:38:46.584467 bl2_stage_init 0x02
603 21:38:46.584792
604 21:38:46.589253 L0:00000000
605 21:38:46.589539 L1:20000703
606 21:38:46.589754 L2:00008067
607 21:38:46.589961 L3:14000000
608 21:38:46.592157 B2:00402000
609 21:38:46.592552 B1:e0f83180
610 21:38:46.592894
611 21:38:46.593212 TE: 58124
612 21:38:46.593533
613 21:38:46.603388 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 21:38:46.603799
615 21:38:46.604156 Board ID = 1
616 21:38:46.604402 Set A53 clk to 24M
617 21:38:46.604633 Set A73 clk to 24M
618 21:38:46.608906 Set clk81 to 24M
619 21:38:46.609296 A53 clk: 1200 MHz
620 21:38:46.609619 A73 clk: 1200 MHz
621 21:38:46.614508 CLK81: 166.6M
622 21:38:46.614889 smccc: 00012a92
623 21:38:46.620189 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 21:38:46.620481 board id: 1
625 21:38:46.628714 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 21:38:46.639407 fw parse done
627 21:38:46.645362 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 21:38:46.686999 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 21:38:46.698963 PIEI prepare done
630 21:38:46.699264 fastboot data load
631 21:38:46.699482 fastboot data verify
632 21:38:46.704618 verify result: 266
633 21:38:46.710123 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 21:38:46.710506 LPDDR4 probe
635 21:38:46.710826 ddr clk to 1584MHz
636 21:38:46.718107 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 21:38:46.755887
638 21:38:46.756316 dmc_version 0001
639 21:38:46.762053 Check phy result
640 21:38:46.767900 INFO : End of CA training
641 21:38:46.768302 INFO : End of initialization
642 21:38:46.773507 INFO : Training has run successfully!
643 21:38:46.773788 Check phy result
644 21:38:46.779090 INFO : End of initialization
645 21:38:46.779367 INFO : End of read enable training
646 21:38:46.782498 INFO : End of fine write leveling
647 21:38:46.788044 INFO : End of Write leveling coarse delay
648 21:38:46.793619 INFO : Training has run successfully!
649 21:38:46.793895 Check phy result
650 21:38:46.794108 INFO : End of initialization
651 21:38:46.799264 INFO : End of read dq deskew training
652 21:38:46.804828 INFO : End of MPR read delay center optimization
653 21:38:46.805207 INFO : End of write delay center optimization
654 21:38:46.810478 INFO : End of read delay center optimization
655 21:38:46.816044 INFO : End of max read latency training
656 21:38:46.816421 INFO : Training has run successfully!
657 21:38:46.821626 1D training succeed
658 21:38:46.826546 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 21:38:46.875111 Check phy result
660 21:38:46.875435 INFO : End of initialization
661 21:38:46.896783 INFO : End of 2D read delay Voltage center optimization
662 21:38:46.916180 INFO : End of 2D read delay Voltage center optimization
663 21:38:46.968215 INFO : End of 2D write delay Voltage center optimization
664 21:38:47.017591 INFO : End of 2D write delay Voltage center optimization
665 21:38:47.023146 INFO : Training has run successfully!
666 21:38:47.023429
667 21:38:47.023650 channel==0
668 21:38:47.028782 RxClkDly_Margin_A0==88 ps 9
669 21:38:47.029315 TxDqDly_Margin_A0==98 ps 10
670 21:38:47.034334 RxClkDly_Margin_A1==88 ps 9
671 21:38:47.034820 TxDqDly_Margin_A1==88 ps 9
672 21:38:47.035283 TrainedVREFDQ_A0==74
673 21:38:47.039911 TrainedVREFDQ_A1==74
674 21:38:47.040417 VrefDac_Margin_A0==25
675 21:38:47.040865 DeviceVref_Margin_A0==40
676 21:38:47.045546 VrefDac_Margin_A1==24
677 21:38:47.046024 DeviceVref_Margin_A1==40
678 21:38:47.046472
679 21:38:47.046916
680 21:38:47.047356 channel==1
681 21:38:47.051132 RxClkDly_Margin_A0==88 ps 9
682 21:38:47.051608 TxDqDly_Margin_A0==98 ps 10
683 21:38:47.056716 RxClkDly_Margin_A1==98 ps 10
684 21:38:47.057194 TxDqDly_Margin_A1==88 ps 9
685 21:38:47.062315 TrainedVREFDQ_A0==77
686 21:38:47.062813 TrainedVREFDQ_A1==77
687 21:38:47.063269 VrefDac_Margin_A0==23
688 21:38:47.067896 DeviceVref_Margin_A0==37
689 21:38:47.068408 VrefDac_Margin_A1==23
690 21:38:47.073582 DeviceVref_Margin_A1==37
691 21:38:47.074073
692 21:38:47.074526 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 21:38:47.074976
694 21:38:47.107156 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000017 00000018 00000018 00000017 00000017 00000016 00000017 00000014 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
695 21:38:47.107712 2D training succeed
696 21:38:47.112743 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 21:38:47.118330 auto size-- 65535DDR cs0 size: 2048MB
698 21:38:47.118830 DDR cs1 size: 2048MB
699 21:38:47.123924 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 21:38:47.124460 cs0 DataBus test pass
701 21:38:47.129537 cs1 DataBus test pass
702 21:38:47.130040 cs0 AddrBus test pass
703 21:38:47.130498 cs1 AddrBus test pass
704 21:38:47.130951
705 21:38:47.135137 100bdlr_step_size ps== 420
706 21:38:47.135657 result report
707 21:38:47.140743 boot times 0Enable ddr reg access
708 21:38:47.146001 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 21:38:47.159585 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 21:38:47.733227 0.0;M3 CHK:0;cm4_sp_mode 0
711 21:38:47.733874 MVN_1=0x00000000
712 21:38:47.738771 MVN_2=0x00000000
713 21:38:47.744678 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 21:38:47.745261 OPS=0x10
715 21:38:47.745702 ring efuse init
716 21:38:47.746128 chipver efuse init
717 21:38:47.750106 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 21:38:47.755769 [0.018961 Inits done]
719 21:38:47.756289 secure task start!
720 21:38:47.756726 high task start!
721 21:38:47.760348 low task start!
722 21:38:47.760824 run into bl31
723 21:38:47.766926 NOTICE: BL31: v1.3(release):4fc40b1
724 21:38:47.774726 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 21:38:47.775208 NOTICE: BL31: G12A normal boot!
726 21:38:47.800180 NOTICE: BL31: BL33 decompress pass
727 21:38:47.805834 ERROR: Error initializing runtime service opteed_fast
728 21:38:49.039117
729 21:38:49.039796
730 21:38:49.047224 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 21:38:49.047745
732 21:38:49.048251 Model: Libre Computer AML-A311D-CC Alta
733 21:38:49.255822 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 21:38:49.279142 DRAM: 2 GiB (effective 3.8 GiB)
735 21:38:49.422171 Core: 408 devices, 31 uclasses, devicetree: separate
736 21:38:49.427941 WDT: Not starting watchdog@f0d0
737 21:38:49.460268 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 21:38:49.472741 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 21:38:49.477639 ** Bad device specification mmc 0 **
740 21:38:49.487956 Card did not respond to voltage select! : -110
741 21:38:49.495540 ** Bad device specification mmc 0 **
742 21:38:49.496055 Couldn't find partition mmc 0
743 21:38:49.503935 Card did not respond to voltage select! : -110
744 21:38:49.509481 ** Bad device specification mmc 0 **
745 21:38:49.509972 Couldn't find partition mmc 0
746 21:38:49.514532 Error: could not access storage.
747 21:38:49.858082 Net: eth0: ethernet@ff3f0000
748 21:38:49.858710 starting USB...
749 21:38:50.109924 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 21:38:50.110501 Starting the controller
751 21:38:50.116883 USB XHCI 1.10
752 21:38:52.279717 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
753 21:38:52.280411 bl2_stage_init 0x01
754 21:38:52.280890 bl2_stage_init 0x81
755 21:38:52.285299 hw id: 0x0000 - pwm id 0x01
756 21:38:52.285819 bl2_stage_init 0xc1
757 21:38:52.286283 bl2_stage_init 0x02
758 21:38:52.286729
759 21:38:52.290890 L0:00000000
760 21:38:52.291376 L1:20000703
761 21:38:52.291821 L2:00008067
762 21:38:52.292308 L3:14000000
763 21:38:52.296550 B2:00402000
764 21:38:52.297066 B1:e0f83180
765 21:38:52.297525
766 21:38:52.297975 TE: 58167
767 21:38:52.298422
768 21:38:52.302169 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
769 21:38:52.302666
770 21:38:52.303118 Board ID = 1
771 21:38:52.307637 Set A53 clk to 24M
772 21:38:52.308152 Set A73 clk to 24M
773 21:38:52.308605 Set clk81 to 24M
774 21:38:52.313269 A53 clk: 1200 MHz
775 21:38:52.313750 A73 clk: 1200 MHz
776 21:38:52.314197 CLK81: 166.6M
777 21:38:52.314633 smccc: 00012abe
778 21:38:52.318838 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
779 21:38:52.324448 board id: 1
780 21:38:52.330330 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
781 21:38:52.341003 fw parse done
782 21:38:52.346994 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
783 21:38:52.389650 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
784 21:38:52.400418 PIEI prepare done
785 21:38:52.400903 fastboot data load
786 21:38:52.401360 fastboot data verify
787 21:38:52.406155 verify result: 266
788 21:38:52.411649 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
789 21:38:52.412165 LPDDR4 probe
790 21:38:52.412613 ddr clk to 1584MHz
791 21:38:52.419647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
792 21:38:52.456943
793 21:38:52.457455 dmc_version 0001
794 21:38:52.463639 Check phy result
795 21:38:52.469442 INFO : End of CA training
796 21:38:52.469938 INFO : End of initialization
797 21:38:52.475160 INFO : Training has run successfully!
798 21:38:52.475640 Check phy result
799 21:38:52.480652 INFO : End of initialization
800 21:38:52.481130 INFO : End of read enable training
801 21:38:52.486279 INFO : End of fine write leveling
802 21:38:52.491872 INFO : End of Write leveling coarse delay
803 21:38:52.492378 INFO : Training has run successfully!
804 21:38:52.492829 Check phy result
805 21:38:52.497473 INFO : End of initialization
806 21:38:52.497947 INFO : End of read dq deskew training
807 21:38:52.503138 INFO : End of MPR read delay center optimization
808 21:38:52.508655 INFO : End of write delay center optimization
809 21:38:52.514226 INFO : End of read delay center optimization
810 21:38:52.514702 INFO : End of max read latency training
811 21:38:52.519830 INFO : Training has run successfully!
812 21:38:52.520345 1D training succeed
813 21:38:52.529099 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
814 21:38:52.576656 Check phy result
815 21:38:52.577139 INFO : End of initialization
816 21:38:52.598398 INFO : End of 2D read delay Voltage center optimization
817 21:38:52.617785 INFO : End of 2D read delay Voltage center optimization
818 21:38:52.669779 INFO : End of 2D write delay Voltage center optimization
819 21:38:52.719347 INFO : End of 2D write delay Voltage center optimization
820 21:38:52.724791 INFO : Training has run successfully!
821 21:38:52.725269
822 21:38:52.725722 channel==0
823 21:38:52.730325 RxClkDly_Margin_A0==88 ps 9
824 21:38:52.730798 TxDqDly_Margin_A0==98 ps 10
825 21:38:52.735907 RxClkDly_Margin_A1==88 ps 9
826 21:38:52.736432 TxDqDly_Margin_A1==88 ps 9
827 21:38:52.736905 TrainedVREFDQ_A0==74
828 21:38:52.741628 TrainedVREFDQ_A1==74
829 21:38:52.742165 VrefDac_Margin_A0==25
830 21:38:52.742619 DeviceVref_Margin_A0==40
831 21:38:52.747277 VrefDac_Margin_A1==25
832 21:38:52.747799 DeviceVref_Margin_A1==40
833 21:38:52.748274
834 21:38:52.748705
835 21:38:52.749133 channel==1
836 21:38:52.752704 RxClkDly_Margin_A0==88 ps 9
837 21:38:52.753172 TxDqDly_Margin_A0==88 ps 9
838 21:38:52.758389 RxClkDly_Margin_A1==78 ps 8
839 21:38:52.758850 TxDqDly_Margin_A1==88 ps 9
840 21:38:52.763998 TrainedVREFDQ_A0==77
841 21:38:52.764486 TrainedVREFDQ_A1==77
842 21:38:52.764922 VrefDac_Margin_A0==23
843 21:38:52.769572 DeviceVref_Margin_A0==37
844 21:38:52.770034 VrefDac_Margin_A1==24
845 21:38:52.770463 DeviceVref_Margin_A1==37
846 21:38:52.775107
847 21:38:52.775567 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
848 21:38:52.776023
849 21:38:52.808658 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
850 21:38:52.809156 2D training succeed
851 21:38:52.814252 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
852 21:38:52.819859 auto size-- 65535DDR cs0 size: 2048MB
853 21:38:52.820354 DDR cs1 size: 2048MB
854 21:38:52.825446 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
855 21:38:52.825906 cs0 DataBus test pass
856 21:38:52.831045 cs1 DataBus test pass
857 21:38:52.831503 cs0 AddrBus test pass
858 21:38:52.831933 cs1 AddrBus test pass
859 21:38:52.832386
860 21:38:52.836618 100bdlr_step_size ps== 420
861 21:38:52.837085 result report
862 21:38:52.842204 boot times 0Enable ddr reg access
863 21:38:52.847299 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
864 21:38:52.860785 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
865 21:38:53.434587 0.0;M3 CHK:0;cm4_sp_mode 0
866 21:38:53.435227 MVN_1=0x00000000
867 21:38:53.439997 MVN_2=0x00000000
868 21:38:53.445716 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
869 21:38:53.446208 OPS=0x10
870 21:38:53.446664 ring efuse init
871 21:38:53.447107 chipver efuse init
872 21:38:53.451336 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
873 21:38:53.456947 [0.018961 Inits done]
874 21:38:53.457450 secure task start!
875 21:38:53.457904 high task start!
876 21:38:53.461510 low task start!
877 21:38:53.461992 run into bl31
878 21:38:53.468190 NOTICE: BL31: v1.3(release):4fc40b1
879 21:38:53.476018 NOTICE: BL31: Built : 15:58:17, May 22 2019
880 21:38:53.476508 NOTICE: BL31: G12A normal boot!
881 21:38:53.501456 NOTICE: BL31: BL33 decompress pass
882 21:38:53.507119 ERROR: Error initializing runtime service opteed_fast
883 21:38:54.740106
884 21:38:54.740714
885 21:38:54.748473 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
886 21:38:54.748967
887 21:38:54.749417 Model: Libre Computer AML-A311D-CC Alta
888 21:38:54.956916 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
889 21:38:54.980213 DRAM: 2 GiB (effective 3.8 GiB)
890 21:38:55.123224 Core: 408 devices, 31 uclasses, devicetree: separate
891 21:38:55.129038 WDT: Not starting watchdog@f0d0
892 21:38:55.161363 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
893 21:38:55.173811 Loading Environment from FAT... Card did not respond to voltage select! : -110
894 21:38:55.178755 ** Bad device specification mmc 0 **
895 21:38:55.189127 Card did not respond to voltage select! : -110
896 21:38:55.196787 ** Bad device specification mmc 0 **
897 21:38:55.197267 Couldn't find partition mmc 0
898 21:38:55.205104 Card did not respond to voltage select! : -110
899 21:38:55.210631 ** Bad device specification mmc 0 **
900 21:38:55.211108 Couldn't find partition mmc 0
901 21:38:55.215686 Error: could not access storage.
902 21:38:55.558187 Net: eth0: ethernet@ff3f0000
903 21:38:55.558750 starting USB...
904 21:38:55.809991 Bus usb@ff500000: Register 3000140 NbrPorts 3
905 21:38:55.810506 Starting the controller
906 21:38:55.816920 USB XHCI 1.10
907 21:38:57.370975 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
908 21:38:57.379183 scanning usb for storage devices... 0 Storage Device(s) found
910 21:38:57.430769 Hit any key to stop autoboot: 1
911 21:38:57.431605 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
912 21:38:57.432286 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
913 21:38:57.432813 Setting prompt string to ['=>']
914 21:38:57.433350 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
915 21:38:57.446667 0
916 21:38:57.447578 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
917 21:38:57.448155 Sending with 10 millisecond of delay
919 21:38:58.582877 => setenv autoload no
920 21:38:58.593686 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
921 21:38:58.599060 setenv autoload no
922 21:38:58.599831 Sending with 10 millisecond of delay
924 21:39:00.396735 => setenv initrd_high 0xffffffff
925 21:39:00.407558 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
926 21:39:00.408472 setenv initrd_high 0xffffffff
927 21:39:00.409246 Sending with 10 millisecond of delay
929 21:39:02.025475 => setenv fdt_high 0xffffffff
930 21:39:02.036271 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
931 21:39:02.037134 setenv fdt_high 0xffffffff
932 21:39:02.037897 Sending with 10 millisecond of delay
934 21:39:02.329750 => dhcp
935 21:39:02.340451 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
936 21:39:02.341288 dhcp
937 21:39:02.341767 Speed: 1000, full duplex
938 21:39:02.342222 BOOTP broadcast 1
939 21:39:02.349156 DHCP client bound to address 192.168.6.27 (9 ms)
940 21:39:02.349899 Sending with 10 millisecond of delay
942 21:39:04.026335 => setenv serverip 192.168.6.2
943 21:39:04.037193 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
944 21:39:04.038155 setenv serverip 192.168.6.2
945 21:39:04.038895 Sending with 10 millisecond of delay
947 21:39:07.762045 => tftpboot 0x01080000 942737/tftp-deploy-mij1o43f/kernel/uImage
948 21:39:07.772834 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
949 21:39:07.773616 tftpboot 0x01080000 942737/tftp-deploy-mij1o43f/kernel/uImage
950 21:39:07.774065 Speed: 1000, full duplex
951 21:39:07.774485 Using ethernet@ff3f0000 device
952 21:39:07.775537 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
953 21:39:07.780946 Filename '942737/tftp-deploy-mij1o43f/kernel/uImage'.
954 21:39:07.784783 Load address: 0x1080000
955 21:39:10.642670 Loading: *################################################## 43.6 MiB
956 21:39:10.643096 15.2 MiB/s
957 21:39:10.643317 done
958 21:39:10.646392 Bytes transferred = 45713984 (2b98a40 hex)
959 21:39:10.646933 Sending with 10 millisecond of delay
961 21:39:15.333241 => tftpboot 0x08000000 942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
962 21:39:15.344136 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
963 21:39:15.344656 tftpboot 0x08000000 942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot
964 21:39:15.344894 Speed: 1000, full duplex
965 21:39:15.345105 Using ethernet@ff3f0000 device
966 21:39:15.346747 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
967 21:39:15.355320 Filename '942737/tftp-deploy-mij1o43f/ramdisk/ramdisk.cpio.gz.uboot'.
968 21:39:15.356205 Load address: 0x8000000
969 21:39:21.985387 Loading: *####################T ############################# UDP wrong checksum 00000005 00008508
970 21:39:26.986106 T UDP wrong checksum 00000005 00008508
971 21:39:31.707694 UDP wrong checksum 000000ff 0000ddef
972 21:39:31.746253 UDP wrong checksum 000000ff 00006ee2
973 21:39:34.376335 T UDP wrong checksum 000000ff 00008b6a
974 21:39:34.395096 UDP wrong checksum 000000ff 00001f5d
975 21:39:36.989329 T UDP wrong checksum 00000005 00008508
976 21:39:56.993297 T T T T UDP wrong checksum 00000005 00008508
977 21:40:11.997561 T T
978 21:40:11.997988 Retry count exceeded; starting again
980 21:40:12.000614 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
983 21:40:12.001550 end: 2.4 uboot-commands (duration 00:01:46) [common]
985 21:40:12.002248 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
987 21:40:12.002792 end: 2 uboot-action (duration 00:01:46) [common]
989 21:40:12.003585 Cleaning after the job
990 21:40:12.003898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/ramdisk
991 21:40:12.004756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/kernel
992 21:40:12.031001 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/dtb
993 21:40:12.031851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942737/tftp-deploy-mij1o43f/modules
994 21:40:12.053412 start: 4.1 power-off (timeout 00:00:30) [common]
995 21:40:12.054097 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
996 21:40:12.091090 >> OK - accepted request
997 21:40:12.093114 Returned 0 in 0 seconds
998 21:40:12.193890 end: 4.1 power-off (duration 00:00:00) [common]
1000 21:40:12.194835 start: 4.2 read-feedback (timeout 00:10:00) [common]
1001 21:40:12.195504 Listened to connection for namespace 'common' for up to 1s
1002 21:40:13.196431 Finalising connection for namespace 'common'
1003 21:40:13.196902 Disconnecting from shell: Finalise
1004 21:40:13.197198 =>
1005 21:40:13.297866 end: 4.2 read-feedback (duration 00:00:01) [common]
1006 21:40:13.298488 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/942737
1007 21:40:13.610868 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/942737
1008 21:40:13.611486 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.