Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:39:47.214796 lava-dispatcher, installed at version: 2024.01
2 21:39:47.215602 start: 0 validate
3 21:39:47.216103 Start time: 2024-11-05 21:39:47.216071+00:00 (UTC)
4 21:39:47.216663 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:39:47.217189 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 21:39:47.255962 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:39:47.256557 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:39:47.287066 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:39:47.287675 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:39:47.318278 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:39:47.319035 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 21:39:47.366919 validate duration: 0.15
14 21:39:47.367742 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 21:39:47.368072 start: 1.1 download-retry (timeout 00:10:00) [common]
16 21:39:47.368365 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 21:39:47.369003 Not decompressing ramdisk as can be used compressed.
18 21:39:47.369432 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 21:39:47.369687 saving as /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/ramdisk/rootfs.cpio.gz
20 21:39:47.369943 total size: 47897469 (45 MB)
21 21:39:47.403744 progress 0 % (0 MB)
22 21:39:47.435678 progress 5 % (2 MB)
23 21:39:47.467444 progress 10 % (4 MB)
24 21:39:47.499186 progress 15 % (6 MB)
25 21:39:47.533057 progress 20 % (9 MB)
26 21:39:47.564629 progress 25 % (11 MB)
27 21:39:47.596436 progress 30 % (13 MB)
28 21:39:47.627828 progress 35 % (16 MB)
29 21:39:47.659172 progress 40 % (18 MB)
30 21:39:47.690833 progress 45 % (20 MB)
31 21:39:47.722254 progress 50 % (22 MB)
32 21:39:47.753694 progress 55 % (25 MB)
33 21:39:47.785521 progress 60 % (27 MB)
34 21:39:47.817111 progress 65 % (29 MB)
35 21:39:47.848604 progress 70 % (32 MB)
36 21:39:47.880148 progress 75 % (34 MB)
37 21:39:47.911747 progress 80 % (36 MB)
38 21:39:47.943332 progress 85 % (38 MB)
39 21:39:47.974953 progress 90 % (41 MB)
40 21:39:48.006386 progress 95 % (43 MB)
41 21:39:48.037271 progress 100 % (45 MB)
42 21:39:48.037992 45 MB downloaded in 0.67 s (68.38 MB/s)
43 21:39:48.038541 end: 1.1.1 http-download (duration 00:00:01) [common]
45 21:39:48.039410 end: 1.1 download-retry (duration 00:00:01) [common]
46 21:39:48.039700 start: 1.2 download-retry (timeout 00:09:59) [common]
47 21:39:48.039967 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 21:39:48.040468 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kernel/Image
49 21:39:48.040728 saving as /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/kernel/Image
50 21:39:48.040935 total size: 45713920 (43 MB)
51 21:39:48.041144 No compression specified
52 21:39:48.079605 progress 0 % (0 MB)
53 21:39:48.109395 progress 5 % (2 MB)
54 21:39:48.140148 progress 10 % (4 MB)
55 21:39:48.170420 progress 15 % (6 MB)
56 21:39:48.200968 progress 20 % (8 MB)
57 21:39:48.231050 progress 25 % (10 MB)
58 21:39:48.261420 progress 30 % (13 MB)
59 21:39:48.291659 progress 35 % (15 MB)
60 21:39:48.322060 progress 40 % (17 MB)
61 21:39:48.352025 progress 45 % (19 MB)
62 21:39:48.382546 progress 50 % (21 MB)
63 21:39:48.412850 progress 55 % (24 MB)
64 21:39:48.443394 progress 60 % (26 MB)
65 21:39:48.473316 progress 65 % (28 MB)
66 21:39:48.503558 progress 70 % (30 MB)
67 21:39:48.533776 progress 75 % (32 MB)
68 21:39:48.563954 progress 80 % (34 MB)
69 21:39:48.594010 progress 85 % (37 MB)
70 21:39:48.624147 progress 90 % (39 MB)
71 21:39:48.654242 progress 95 % (41 MB)
72 21:39:48.683932 progress 100 % (43 MB)
73 21:39:48.684488 43 MB downloaded in 0.64 s (67.74 MB/s)
74 21:39:48.684972 end: 1.2.1 http-download (duration 00:00:01) [common]
76 21:39:48.685826 end: 1.2 download-retry (duration 00:00:01) [common]
77 21:39:48.686102 start: 1.3 download-retry (timeout 00:09:59) [common]
78 21:39:48.686368 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 21:39:48.686840 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 21:39:48.687091 saving as /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 21:39:48.687297 total size: 53209 (0 MB)
82 21:39:48.687505 No compression specified
83 21:39:48.727529 progress 61 % (0 MB)
84 21:39:48.728409 progress 100 % (0 MB)
85 21:39:48.728950 0 MB downloaded in 0.04 s (1.22 MB/s)
86 21:39:48.729407 end: 1.3.1 http-download (duration 00:00:00) [common]
88 21:39:48.730210 end: 1.3 download-retry (duration 00:00:00) [common]
89 21:39:48.730468 start: 1.4 download-retry (timeout 00:09:59) [common]
90 21:39:48.730732 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 21:39:48.731195 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/modules.tar.xz
92 21:39:48.731440 saving as /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/modules/modules.tar
93 21:39:48.731643 total size: 11607644 (11 MB)
94 21:39:48.731854 Using unxz to decompress xz
95 21:39:48.775663 progress 0 % (0 MB)
96 21:39:48.841284 progress 5 % (0 MB)
97 21:39:48.915164 progress 10 % (1 MB)
98 21:39:49.011591 progress 15 % (1 MB)
99 21:39:49.102430 progress 20 % (2 MB)
100 21:39:49.182532 progress 25 % (2 MB)
101 21:39:49.257658 progress 30 % (3 MB)
102 21:39:49.331191 progress 35 % (3 MB)
103 21:39:49.409020 progress 40 % (4 MB)
104 21:39:49.485445 progress 45 % (5 MB)
105 21:39:49.569853 progress 50 % (5 MB)
106 21:39:49.646632 progress 55 % (6 MB)
107 21:39:49.731078 progress 60 % (6 MB)
108 21:39:49.811994 progress 65 % (7 MB)
109 21:39:49.888033 progress 70 % (7 MB)
110 21:39:49.971315 progress 75 % (8 MB)
111 21:39:50.056385 progress 80 % (8 MB)
112 21:39:50.136298 progress 85 % (9 MB)
113 21:39:50.214793 progress 90 % (9 MB)
114 21:39:50.292431 progress 95 % (10 MB)
115 21:39:50.369342 progress 100 % (11 MB)
116 21:39:50.380583 11 MB downloaded in 1.65 s (6.71 MB/s)
117 21:39:50.381192 end: 1.4.1 http-download (duration 00:00:02) [common]
119 21:39:50.382032 end: 1.4 download-retry (duration 00:00:02) [common]
120 21:39:50.382304 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 21:39:50.382574 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 21:39:50.382825 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 21:39:50.383080 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 21:39:50.383680 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u
125 21:39:50.384376 makedir: /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin
126 21:39:50.385062 makedir: /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/tests
127 21:39:50.385684 makedir: /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/results
128 21:39:50.386303 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-add-keys
129 21:39:50.387310 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-add-sources
130 21:39:50.388382 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-background-process-start
131 21:39:50.389356 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-background-process-stop
132 21:39:50.390344 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-common-functions
133 21:39:50.391270 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-echo-ipv4
134 21:39:50.392204 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-install-packages
135 21:39:50.393116 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-installed-packages
136 21:39:50.394004 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-os-build
137 21:39:50.394904 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-probe-channel
138 21:39:50.395838 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-probe-ip
139 21:39:50.396793 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-target-ip
140 21:39:50.397687 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-target-mac
141 21:39:50.398572 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-target-storage
142 21:39:50.399482 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-case
143 21:39:50.400418 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-event
144 21:39:50.401342 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-feedback
145 21:39:50.402314 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-raise
146 21:39:50.403211 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-reference
147 21:39:50.404167 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-runner
148 21:39:50.405111 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-set
149 21:39:50.406005 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-test-shell
150 21:39:50.406932 Updating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-install-packages (oe)
151 21:39:50.407895 Updating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/bin/lava-installed-packages (oe)
152 21:39:50.408779 Creating /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/environment
153 21:39:50.409498 LAVA metadata
154 21:39:50.409989 - LAVA_JOB_ID=942721
155 21:39:50.410410 - LAVA_DISPATCHER_IP=192.168.6.2
156 21:39:50.411063 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 21:39:50.412863 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 21:39:50.413480 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 21:39:50.413889 skipped lava-vland-overlay
160 21:39:50.414369 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 21:39:50.414872 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 21:39:50.415295 skipped lava-multinode-overlay
163 21:39:50.415772 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 21:39:50.416311 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 21:39:50.416787 Loading test definitions
166 21:39:50.417328 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 21:39:50.417769 Using /lava-942721 at stage 0
168 21:39:50.419959 uuid=942721_1.5.2.4.1 testdef=None
169 21:39:50.420377 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 21:39:50.420651 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 21:39:50.422507 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 21:39:50.423341 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 21:39:50.425553 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 21:39:50.426443 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 21:39:50.428584 runner path: /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/0/tests/0_igt-gpu-panfrost test_uuid 942721_1.5.2.4.1
178 21:39:50.429186 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 21:39:50.430024 Creating lava-test-runner.conf files
181 21:39:50.430233 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/942721/lava-overlay-eifqaw2u/lava-942721/0 for stage 0
182 21:39:50.430572 - 0_igt-gpu-panfrost
183 21:39:50.430938 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 21:39:50.431229 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 21:39:50.454881 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 21:39:50.455311 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 21:39:50.455581 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 21:39:50.455851 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 21:39:50.456151 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 21:39:57.304232 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 21:39:57.304693 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 21:39:57.304942 extracting modules file /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk
193 21:39:58.701408 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 21:39:58.701888 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 21:39:58.702165 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942721/compress-overlay-0l2lrizf/overlay-1.5.2.5.tar.gz to ramdisk
196 21:39:58.702378 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942721/compress-overlay-0l2lrizf/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk
197 21:39:58.732738 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 21:39:58.733152 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 21:39:58.733426 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 21:39:58.733655 Converting downloaded kernel to a uImage
201 21:39:58.733961 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/kernel/Image /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/kernel/uImage
202 21:39:59.194385 output: Image Name:
203 21:39:59.194800 output: Created: Tue Nov 5 21:39:58 2024
204 21:39:59.195010 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 21:39:59.195214 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 21:39:59.195415 output: Load Address: 01080000
207 21:39:59.195614 output: Entry Point: 01080000
208 21:39:59.195811 output:
209 21:39:59.196183 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 21:39:59.196455 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 21:39:59.196723 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 21:39:59.196976 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 21:39:59.197232 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 21:39:59.197487 Building ramdisk /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk
215 21:40:06.238670 >> 502379 blocks
216 21:40:26.885594 Adding RAMdisk u-boot header.
217 21:40:26.886242 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk.cpio.gz.uboot
218 21:40:27.531050 output: Image Name:
219 21:40:27.531447 output: Created: Tue Nov 5 21:40:26 2024
220 21:40:27.531653 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 21:40:27.531855 output: Data Size: 65710255 Bytes = 64170.17 KiB = 62.67 MiB
222 21:40:27.532180 output: Load Address: 00000000
223 21:40:27.532624 output: Entry Point: 00000000
224 21:40:27.533054 output:
225 21:40:27.534123 rename /var/lib/lava/dispatcher/tmp/942721/extract-overlay-ramdisk-i4i89a3l/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
226 21:40:27.534886 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 21:40:27.535474 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 21:40:27.536076 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 21:40:27.536577 No LXC device requested
230 21:40:27.537124 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 21:40:27.537677 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 21:40:27.538213 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 21:40:27.538666 Checking files for TFTP limit of 4294967296 bytes.
234 21:40:27.541587 end: 1 tftp-deploy (duration 00:00:40) [common]
235 21:40:27.542217 start: 2 uboot-action (timeout 00:05:00) [common]
236 21:40:27.542782 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 21:40:27.543322 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 21:40:27.543864 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 21:40:27.544472 Using kernel file from prepare-kernel: 942721/tftp-deploy-sxmizubz/kernel/uImage
240 21:40:27.545155 substitutions:
241 21:40:27.545604 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 21:40:27.546043 - {DTB_ADDR}: 0x01070000
243 21:40:27.546477 - {DTB}: 942721/tftp-deploy-sxmizubz/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 21:40:27.546913 - {INITRD}: 942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
245 21:40:27.547342 - {KERNEL_ADDR}: 0x01080000
246 21:40:27.547774 - {KERNEL}: 942721/tftp-deploy-sxmizubz/kernel/uImage
247 21:40:27.548244 - {LAVA_MAC}: None
248 21:40:27.548717 - {PRESEED_CONFIG}: None
249 21:40:27.549152 - {PRESEED_LOCAL}: None
250 21:40:27.549579 - {RAMDISK_ADDR}: 0x08000000
251 21:40:27.550004 - {RAMDISK}: 942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
252 21:40:27.550435 - {ROOT_PART}: None
253 21:40:27.550865 - {ROOT}: None
254 21:40:27.551294 - {SERVER_IP}: 192.168.6.2
255 21:40:27.551726 - {TEE_ADDR}: 0x83000000
256 21:40:27.552182 - {TEE}: None
257 21:40:27.552609 Parsed boot commands:
258 21:40:27.553024 - setenv autoload no
259 21:40:27.553448 - setenv initrd_high 0xffffffff
260 21:40:27.553871 - setenv fdt_high 0xffffffff
261 21:40:27.554292 - dhcp
262 21:40:27.554717 - setenv serverip 192.168.6.2
263 21:40:27.555139 - tftpboot 0x01080000 942721/tftp-deploy-sxmizubz/kernel/uImage
264 21:40:27.555561 - tftpboot 0x08000000 942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
265 21:40:27.556032 - tftpboot 0x01070000 942721/tftp-deploy-sxmizubz/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 21:40:27.556469 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 21:40:27.556900 - bootm 0x01080000 0x08000000 0x01070000
268 21:40:27.557450 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 21:40:27.559065 start: 2.3 connect-device (timeout 00:05:00) [common]
271 21:40:27.559544 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 21:40:27.576091 Setting prompt string to ['lava-test: # ']
273 21:40:27.577663 end: 2.3 connect-device (duration 00:00:00) [common]
274 21:40:27.578293 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 21:40:27.578874 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 21:40:27.579431 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 21:40:27.580678 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 21:40:27.619034 >> OK - accepted request
279 21:40:27.621161 Returned 0 in 0 seconds
280 21:40:27.722368 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 21:40:27.724225 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 21:40:27.724842 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 21:40:27.725383 Setting prompt string to ['Hit any key to stop autoboot']
285 21:40:27.725876 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 21:40:27.727593 Trying 192.168.56.21...
287 21:40:27.728153 Connected to conserv1.
288 21:40:27.728624 Escape character is '^]'.
289 21:40:27.729078
290 21:40:27.729543 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 21:40:27.730021
292 21:40:34.922849 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 21:40:34.923523 bl2_stage_init 0x01
294 21:40:34.924029 bl2_stage_init 0x81
295 21:40:34.928335 hw id: 0x0000 - pwm id 0x01
296 21:40:34.928822 bl2_stage_init 0xc1
297 21:40:34.933981 bl2_stage_init 0x02
298 21:40:34.934447
299 21:40:34.934886 L0:00000000
300 21:40:34.935314 L1:00000703
301 21:40:34.935739 L2:00008067
302 21:40:34.936202 L3:15000000
303 21:40:34.939686 S1:00000000
304 21:40:34.940177 B2:20282000
305 21:40:34.940609 B1:a0f83180
306 21:40:34.941033
307 21:40:34.941460 TE: 68615
308 21:40:34.941885
309 21:40:34.945257 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 21:40:34.945717
311 21:40:34.950780 Board ID = 1
312 21:40:34.951232 Set cpu clk to 24M
313 21:40:34.951657 Set clk81 to 24M
314 21:40:34.954378 Use GP1_pll as DSU clk.
315 21:40:34.954831 DSU clk: 1200 Mhz
316 21:40:34.959860 CPU clk: 1200 MHz
317 21:40:34.960343 Set clk81 to 166.6M
318 21:40:34.965753 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 21:40:34.966210 board id: 1
320 21:40:34.974743 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 21:40:34.985423 fw parse done
322 21:40:34.991405 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 21:40:35.033929 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 21:40:35.044801 PIEI prepare done
325 21:40:35.045249 fastboot data load
326 21:40:35.045679 fastboot data verify
327 21:40:35.050511 verify result: 266
328 21:40:35.056085 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 21:40:35.056545 LPDDR4 probe
330 21:40:35.056969 ddr clk to 1584MHz
331 21:40:35.064047 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 21:40:35.101321
333 21:40:35.101795 dmc_version 0001
334 21:40:35.107976 Check phy result
335 21:40:35.113884 INFO : End of CA training
336 21:40:35.114347 INFO : End of initialization
337 21:40:35.119480 INFO : Training has run successfully!
338 21:40:35.119940 Check phy result
339 21:40:35.125081 INFO : End of initialization
340 21:40:35.125537 INFO : End of read enable training
341 21:40:35.130675 INFO : End of fine write leveling
342 21:40:35.136276 INFO : End of Write leveling coarse delay
343 21:40:35.136733 INFO : Training has run successfully!
344 21:40:35.137161 Check phy result
345 21:40:35.141862 INFO : End of initialization
346 21:40:35.142336 INFO : End of read dq deskew training
347 21:40:35.147500 INFO : End of MPR read delay center optimization
348 21:40:35.153072 INFO : End of write delay center optimization
349 21:40:35.158674 INFO : End of read delay center optimization
350 21:40:35.159159 INFO : End of max read latency training
351 21:40:35.164282 INFO : Training has run successfully!
352 21:40:35.164737 1D training succeed
353 21:40:35.173469 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 21:40:35.221066 Check phy result
355 21:40:35.221540 INFO : End of initialization
356 21:40:35.243438 INFO : End of 2D read delay Voltage center optimization
357 21:40:35.262628 INFO : End of 2D read delay Voltage center optimization
358 21:40:35.314491 INFO : End of 2D write delay Voltage center optimization
359 21:40:35.363732 INFO : End of 2D write delay Voltage center optimization
360 21:40:35.369226 INFO : Training has run successfully!
361 21:40:35.369685
362 21:40:35.370119 channel==0
363 21:40:35.374809 RxClkDly_Margin_A0==78 ps 8
364 21:40:35.375261 TxDqDly_Margin_A0==98 ps 10
365 21:40:35.380434 RxClkDly_Margin_A1==88 ps 9
366 21:40:35.380896 TxDqDly_Margin_A1==88 ps 9
367 21:40:35.381331 TrainedVREFDQ_A0==74
368 21:40:35.386040 TrainedVREFDQ_A1==74
369 21:40:35.386495 VrefDac_Margin_A0==24
370 21:40:35.386918 DeviceVref_Margin_A0==40
371 21:40:35.391682 VrefDac_Margin_A1==23
372 21:40:35.392156 DeviceVref_Margin_A1==40
373 21:40:35.392581
374 21:40:35.393006
375 21:40:35.393432 channel==1
376 21:40:35.397201 RxClkDly_Margin_A0==78 ps 8
377 21:40:35.397648 TxDqDly_Margin_A0==98 ps 10
378 21:40:35.402806 RxClkDly_Margin_A1==78 ps 8
379 21:40:35.403253 TxDqDly_Margin_A1==88 ps 9
380 21:40:35.408421 TrainedVREFDQ_A0==78
381 21:40:35.408869 TrainedVREFDQ_A1==75
382 21:40:35.409301 VrefDac_Margin_A0==22
383 21:40:35.413988 DeviceVref_Margin_A0==36
384 21:40:35.414434 VrefDac_Margin_A1==22
385 21:40:35.419653 DeviceVref_Margin_A1==39
386 21:40:35.420135
387 21:40:35.420568 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 21:40:35.420995
389 21:40:35.453232 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 21:40:35.453770 2D training succeed
391 21:40:35.458795 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 21:40:35.464401 auto size-- 65535DDR cs0 size: 2048MB
393 21:40:35.464854 DDR cs1 size: 2048MB
394 21:40:35.469990 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 21:40:35.470439 cs0 DataBus test pass
396 21:40:35.475706 cs1 DataBus test pass
397 21:40:35.476206 cs0 AddrBus test pass
398 21:40:35.476638 cs1 AddrBus test pass
399 21:40:35.477060
400 21:40:35.481205 100bdlr_step_size ps== 478
401 21:40:35.481674 result report
402 21:40:35.486822 boot times 0Enable ddr reg access
403 21:40:35.492024 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 21:40:35.505794 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 21:40:36.161221 bl2z: ptr: 05129330, size: 00001e40
406 21:40:36.167771 0.0;M3 CHK:0;cm4_sp_mode 0
407 21:40:36.168286 MVN_1=0x00000000
408 21:40:36.168763 MVN_2=0x00000000
409 21:40:36.179317 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 21:40:36.179819 OPS=0x04
411 21:40:36.180301 ring efuse init
412 21:40:36.184909 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 21:40:36.185382 [0.017319 Inits done]
414 21:40:36.185824 secure task start!
415 21:40:36.192561 high task start!
416 21:40:36.193027 low task start!
417 21:40:36.193464 run into bl31
418 21:40:36.201215 NOTICE: BL31: v1.3(release):4fc40b1
419 21:40:36.209017 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 21:40:36.209492 NOTICE: BL31: G12A normal boot!
421 21:40:36.224501 NOTICE: BL31: BL33 decompress pass
422 21:40:36.230207 ERROR: Error initializing runtime service opteed_fast
423 21:40:38.974877 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 21:40:38.975524 bl2_stage_init 0x01
425 21:40:38.976039 bl2_stage_init 0x81
426 21:40:38.980445 hw id: 0x0000 - pwm id 0x01
427 21:40:38.980952 bl2_stage_init 0xc1
428 21:40:38.986157 bl2_stage_init 0x02
429 21:40:38.986683
430 21:40:38.987114 L0:00000000
431 21:40:38.987535 L1:00000703
432 21:40:38.987954 L2:00008067
433 21:40:38.988420 L3:15000000
434 21:40:38.991630 S1:00000000
435 21:40:38.992114 B2:20282000
436 21:40:38.992540 B1:a0f83180
437 21:40:38.992957
438 21:40:38.993377 TE: 69514
439 21:40:38.993797
440 21:40:38.997313 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 21:40:38.997766
442 21:40:39.002816 Board ID = 1
443 21:40:39.003265 Set cpu clk to 24M
444 21:40:39.003688 Set clk81 to 24M
445 21:40:39.008423 Use GP1_pll as DSU clk.
446 21:40:39.008871 DSU clk: 1200 Mhz
447 21:40:39.009294 CPU clk: 1200 MHz
448 21:40:39.014116 Set clk81 to 166.6M
449 21:40:39.019625 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 21:40:39.020108 board id: 1
451 21:40:39.026825 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 21:40:39.037505 fw parse done
453 21:40:39.048130 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 21:40:39.086235 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 21:40:39.097169 PIEI prepare done
456 21:40:39.097604 fastboot data load
457 21:40:39.097847 fastboot data verify
458 21:40:39.102703 verify result: 266
459 21:40:39.108366 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 21:40:39.108781 LPDDR4 probe
461 21:40:39.109020 ddr clk to 1584MHz
462 21:40:39.116388 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 21:40:39.153555
464 21:40:39.153978 dmc_version 0001
465 21:40:39.160249 Check phy result
466 21:40:39.166129 INFO : End of CA training
467 21:40:39.166500 INFO : End of initialization
468 21:40:39.171747 INFO : Training has run successfully!
469 21:40:39.172161 Check phy result
470 21:40:39.177357 INFO : End of initialization
471 21:40:39.177890 INFO : End of read enable training
472 21:40:39.183253 INFO : End of fine write leveling
473 21:40:39.188701 INFO : End of Write leveling coarse delay
474 21:40:39.189118 INFO : Training has run successfully!
475 21:40:39.189346 Check phy result
476 21:40:39.194252 INFO : End of initialization
477 21:40:39.194661 INFO : End of read dq deskew training
478 21:40:39.199890 INFO : End of MPR read delay center optimization
479 21:40:39.205363 INFO : End of write delay center optimization
480 21:40:39.210995 INFO : End of read delay center optimization
481 21:40:39.211386 INFO : End of max read latency training
482 21:40:39.216526 INFO : Training has run successfully!
483 21:40:39.216891 1D training succeed
484 21:40:39.225689 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 21:40:39.273442 Check phy result
486 21:40:39.273991 INFO : End of initialization
487 21:40:39.295755 INFO : End of 2D read delay Voltage center optimization
488 21:40:39.314902 INFO : End of 2D read delay Voltage center optimization
489 21:40:39.366866 INFO : End of 2D write delay Voltage center optimization
490 21:40:39.415925 INFO : End of 2D write delay Voltage center optimization
491 21:40:39.421381 INFO : Training has run successfully!
492 21:40:39.421739
493 21:40:39.422011 channel==0
494 21:40:39.427130 RxClkDly_Margin_A0==78 ps 8
495 21:40:39.428154 TxDqDly_Margin_A0==98 ps 10
496 21:40:39.430546 RxClkDly_Margin_A1==78 ps 8
497 21:40:39.431077 TxDqDly_Margin_A1==98 ps 10
498 21:40:39.435966 TrainedVREFDQ_A0==74
499 21:40:39.436503 TrainedVREFDQ_A1==74
500 21:40:39.441562 VrefDac_Margin_A0==24
501 21:40:39.442094 DeviceVref_Margin_A0==40
502 21:40:39.442495 VrefDac_Margin_A1==23
503 21:40:39.447123 DeviceVref_Margin_A1==40
504 21:40:39.447632
505 21:40:39.448069
506 21:40:39.448473 channel==1
507 21:40:39.448862 RxClkDly_Margin_A0==88 ps 9
508 21:40:39.452759 TxDqDly_Margin_A0==98 ps 10
509 21:40:39.453286 RxClkDly_Margin_A1==78 ps 8
510 21:40:39.458517 TxDqDly_Margin_A1==78 ps 8
511 21:40:39.459031 TrainedVREFDQ_A0==75
512 21:40:39.459266 TrainedVREFDQ_A1==77
513 21:40:39.463949 VrefDac_Margin_A0==22
514 21:40:39.464496 DeviceVref_Margin_A0==39
515 21:40:39.469530 VrefDac_Margin_A1==22
516 21:40:39.470037 DeviceVref_Margin_A1==37
517 21:40:39.470430
518 21:40:39.475153 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 21:40:39.475508
520 21:40:39.503042 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 21:40:39.508741 2D training succeed
522 21:40:39.514397 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 21:40:39.514926 auto size-- 65535DDR cs0 size: 2048MB
524 21:40:39.519938 DDR cs1 size: 2048MB
525 21:40:39.520493 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 21:40:39.525566 cs0 DataBus test pass
527 21:40:39.526136 cs1 DataBus test pass
528 21:40:39.526566 cs0 AddrBus test pass
529 21:40:39.531086 cs1 AddrBus test pass
530 21:40:39.531690
531 21:40:39.532158 100bdlr_step_size ps== 478
532 21:40:39.532570 result report
533 21:40:39.536925 boot times 0Enable ddr reg access
534 21:40:39.544533 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 21:40:39.558109 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 21:40:40.213273 bl2z: ptr: 05129330, size: 00001e40
537 21:40:40.220123 0.0;M3 CHK:0;cm4_sp_mode 0
538 21:40:40.220644 MVN_1=0x00000000
539 21:40:40.220896 MVN_2=0x00000000
540 21:40:40.230871 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 21:40:40.231297 OPS=0x04
542 21:40:40.231527 ring efuse init
543 21:40:40.233987 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 21:40:40.239601 [0.017319 Inits done]
545 21:40:40.240020 secure task start!
546 21:40:40.240261 high task start!
547 21:40:40.240487 low task start!
548 21:40:40.243848 run into bl31
549 21:40:40.252445 NOTICE: BL31: v1.3(release):4fc40b1
550 21:40:40.260250 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 21:40:40.260802 NOTICE: BL31: G12A normal boot!
552 21:40:40.275899 NOTICE: BL31: BL33 decompress pass
553 21:40:40.281536 ERROR: Error initializing runtime service opteed_fast
554 21:40:41.676115 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 21:40:41.676730 bl2_stage_init 0x01
556 21:40:41.677163 bl2_stage_init 0x81
557 21:40:41.681881 hw id: 0x0000 - pwm id 0x01
558 21:40:41.682366 bl2_stage_init 0xc1
559 21:40:41.682779 bl2_stage_init 0x02
560 21:40:41.683179
561 21:40:41.687290 L0:00000000
562 21:40:41.687758 L1:00000703
563 21:40:41.688215 L2:00008067
564 21:40:41.688622 L3:15000000
565 21:40:41.689018 S1:00000000
566 21:40:41.689984 B2:20282000
567 21:40:41.695085 B1:a0f83180
568 21:40:41.695577
569 21:40:41.696024 TE: 70812
570 21:40:41.696450
571 21:40:41.700747 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 21:40:41.701222
573 21:40:41.701637 Board ID = 1
574 21:40:41.702038 Set cpu clk to 24M
575 21:40:41.706284 Set clk81 to 24M
576 21:40:41.706746 Use GP1_pll as DSU clk.
577 21:40:41.707155 DSU clk: 1200 Mhz
578 21:40:41.709851 CPU clk: 1200 MHz
579 21:40:41.710324 Set clk81 to 166.6M
580 21:40:41.721087 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 21:40:41.721564 board id: 1
582 21:40:41.727220 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 21:40:41.737919 fw parse done
584 21:40:41.743877 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 21:40:41.786430 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 21:40:41.797360 PIEI prepare done
587 21:40:41.797842 fastboot data load
588 21:40:41.798258 fastboot data verify
589 21:40:41.802936 verify result: 266
590 21:40:41.808547 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 21:40:41.809019 LPDDR4 probe
592 21:40:41.809427 ddr clk to 1584MHz
593 21:40:41.816517 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 21:40:41.853757
595 21:40:41.854240 dmc_version 0001
596 21:40:41.860430 Check phy result
597 21:40:41.866385 INFO : End of CA training
598 21:40:41.866845 INFO : End of initialization
599 21:40:41.871940 INFO : Training has run successfully!
600 21:40:41.872441 Check phy result
601 21:40:41.877674 INFO : End of initialization
602 21:40:41.878144 INFO : End of read enable training
603 21:40:41.883173 INFO : End of fine write leveling
604 21:40:41.888746 INFO : End of Write leveling coarse delay
605 21:40:41.889214 INFO : Training has run successfully!
606 21:40:41.889620 Check phy result
607 21:40:41.894369 INFO : End of initialization
608 21:40:41.894828 INFO : End of read dq deskew training
609 21:40:41.899952 INFO : End of MPR read delay center optimization
610 21:40:41.905680 INFO : End of write delay center optimization
611 21:40:41.911157 INFO : End of read delay center optimization
612 21:40:41.911620 INFO : End of max read latency training
613 21:40:41.916759 INFO : Training has run successfully!
614 21:40:41.917219 1D training succeed
615 21:40:41.925918 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 21:40:41.973624 Check phy result
617 21:40:41.974157 INFO : End of initialization
618 21:40:41.995957 INFO : End of 2D read delay Voltage center optimization
619 21:40:42.015098 INFO : End of 2D read delay Voltage center optimization
620 21:40:42.066959 INFO : End of 2D write delay Voltage center optimization
621 21:40:42.116205 INFO : End of 2D write delay Voltage center optimization
622 21:40:42.121724 INFO : Training has run successfully!
623 21:40:42.122197
624 21:40:42.122625 channel==0
625 21:40:42.127330 RxClkDly_Margin_A0==78 ps 8
626 21:40:42.127809 TxDqDly_Margin_A0==88 ps 9
627 21:40:42.130731 RxClkDly_Margin_A1==78 ps 8
628 21:40:42.131202 TxDqDly_Margin_A1==98 ps 10
629 21:40:42.136323 TrainedVREFDQ_A0==74
630 21:40:42.136813 TrainedVREFDQ_A1==74
631 21:40:42.137222 VrefDac_Margin_A0==24
632 21:40:42.141935 DeviceVref_Margin_A0==40
633 21:40:42.142413 VrefDac_Margin_A1==23
634 21:40:42.147609 DeviceVref_Margin_A1==40
635 21:40:42.148109
636 21:40:42.148520
637 21:40:42.148915 channel==1
638 21:40:42.149305 RxClkDly_Margin_A0==78 ps 8
639 21:40:42.153138 TxDqDly_Margin_A0==98 ps 10
640 21:40:42.153622 RxClkDly_Margin_A1==78 ps 8
641 21:40:42.158736 TxDqDly_Margin_A1==88 ps 9
642 21:40:42.159217 TrainedVREFDQ_A0==78
643 21:40:42.159624 TrainedVREFDQ_A1==75
644 21:40:42.164341 VrefDac_Margin_A0==22
645 21:40:42.164814 DeviceVref_Margin_A0==36
646 21:40:42.165216 VrefDac_Margin_A1==22
647 21:40:42.169920 DeviceVref_Margin_A1==39
648 21:40:42.170401
649 21:40:42.175609 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 21:40:42.176112
651 21:40:42.203468 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
652 21:40:42.209128 2D training succeed
653 21:40:42.214727 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 21:40:42.215207 auto size-- 65535DDR cs0 size: 2048MB
655 21:40:42.220312 DDR cs1 size: 2048MB
656 21:40:42.220783 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 21:40:42.225903 cs0 DataBus test pass
658 21:40:42.226362 cs1 DataBus test pass
659 21:40:42.226762 cs0 AddrBus test pass
660 21:40:42.231512 cs1 AddrBus test pass
661 21:40:42.231977
662 21:40:42.232689 100bdlr_step_size ps== 478
663 21:40:42.233164 result report
664 21:40:42.237107 boot times 0Enable ddr reg access
665 21:40:42.244406 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 21:40:42.258227 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 21:40:42.913556 bl2z: ptr: 05129330, size: 00001e40
668 21:40:42.922273 0.0;M3 CHK:0;cm4_sp_mode 0
669 21:40:42.922811 MVN_1=0x00000000
670 21:40:42.923274 MVN_2=0x00000000
671 21:40:42.933743 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 21:40:42.934266 OPS=0x04
673 21:40:42.934730 ring efuse init
674 21:40:42.939347 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 21:40:42.939856 [0.017320 Inits done]
676 21:40:42.940355 secure task start!
677 21:40:42.947390 high task start!
678 21:40:42.947895 low task start!
679 21:40:42.948388 run into bl31
680 21:40:42.956007 NOTICE: BL31: v1.3(release):4fc40b1
681 21:40:42.963781 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 21:40:42.964324 NOTICE: BL31: G12A normal boot!
683 21:40:42.979263 NOTICE: BL31: BL33 decompress pass
684 21:40:42.984944 ERROR: Error initializing runtime service opteed_fast
685 21:40:43.780394
686 21:40:43.781014
687 21:40:43.785671 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 21:40:43.786178
689 21:40:43.789169 Model: Libre Computer AML-S905D3-CC Solitude
690 21:40:43.936289 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 21:40:43.951703 DRAM: 2 GiB (effective 3.8 GiB)
692 21:40:44.052582 Core: 406 devices, 33 uclasses, devicetree: separate
693 21:40:44.058400 WDT: Not starting watchdog@f0d0
694 21:40:44.083529 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 21:40:44.095825 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 21:40:44.100662 ** Bad device specification mmc 0 **
697 21:40:44.110811 Card did not respond to voltage select! : -110
698 21:40:44.118372 ** Bad device specification mmc 0 **
699 21:40:44.118857 Couldn't find partition mmc 0
700 21:40:44.126810 Card did not respond to voltage select! : -110
701 21:40:44.132239 ** Bad device specification mmc 0 **
702 21:40:44.132718 Couldn't find partition mmc 0
703 21:40:44.137280 Error: could not access storage.
704 21:40:44.433781 Net: eth0: ethernet@ff3f0000
705 21:40:44.434430 starting USB...
706 21:40:44.678540 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 21:40:44.679147 Starting the controller
708 21:40:44.685453 USB XHCI 1.10
709 21:40:46.239931 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 21:40:46.248099 scanning usb for storage devices... 0 Storage Device(s) found
712 21:40:46.299753 Hit any key to stop autoboot: 1
713 21:40:46.300957 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 21:40:46.301676 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 21:40:46.302216 Setting prompt string to ['=>']
716 21:40:46.302772 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 21:40:46.314351 0
718 21:40:46.315537 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 21:40:46.417056 => setenv autoload no
721 21:40:46.418179 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 21:40:46.423608 setenv autoload no
724 21:40:46.525625 => setenv initrd_high 0xffffffff
725 21:40:46.526429 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 21:40:46.530690 setenv initrd_high 0xffffffff
728 21:40:46.632178 => setenv fdt_high 0xffffffff
729 21:40:46.632871 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 21:40:46.637189 setenv fdt_high 0xffffffff
732 21:40:46.738759 => dhcp
733 21:40:46.739497 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 21:40:46.743530 dhcp
735 21:40:47.649691 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 21:40:47.650347 Speed: 1000, full duplex
737 21:40:47.650812 BOOTP broadcast 1
738 21:40:47.662837 DHCP client bound to address 192.168.6.21 (13 ms)
740 21:40:47.764464 => setenv serverip 192.168.6.2
741 21:40:47.765261 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 21:40:47.769913 setenv serverip 192.168.6.2
744 21:40:47.871519 => tftpboot 0x01080000 942721/tftp-deploy-sxmizubz/kernel/uImage
745 21:40:47.872397 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 21:40:47.879382 tftpboot 0x01080000 942721/tftp-deploy-sxmizubz/kernel/uImage
747 21:40:47.879910 Speed: 1000, full duplex
748 21:40:47.880416 Using ethernet@ff3f0000 device
749 21:40:47.884870 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 21:40:47.890330 Filename '942721/tftp-deploy-sxmizubz/kernel/uImage'.
751 21:40:47.894205 Load address: 0x1080000
752 21:40:48.587522 Loading: *########### UDP wrong checksum 00000005 00009f5b
753 21:40:50.776425 ####################################### 43.6 MiB
754 21:40:50.776874 15.1 MiB/s
755 21:40:50.777099 done
756 21:40:50.780526 Bytes transferred = 45713984 (2b98a40 hex)
758 21:40:50.881579 => tftpboot 0x08000000 942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
759 21:40:50.882126 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
760 21:40:50.889216 tftpboot 0x08000000 942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot
761 21:40:50.889516 Speed: 1000, full duplex
762 21:40:50.889718 Using ethernet@ff3f0000 device
763 21:40:50.894521 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
764 21:40:50.904176 Filename '942721/tftp-deploy-sxmizubz/ramdisk/ramdisk.cpio.gz.uboot'.
765 21:40:50.904500 Load address: 0x8000000
766 21:40:55.115562 Loading: *######################### UDP wrong checksum 000000ff 0000b90d
767 21:40:55.162336 UDP wrong checksum 000000ff 00005200
768 21:41:00.215304 T ######################## UDP wrong checksum 0000000f 000095d2
769 21:41:05.216543 T UDP wrong checksum 0000000f 000095d2
770 21:41:12.626634 T UDP wrong checksum 000000ff 00006626
771 21:41:12.664808 UDP wrong checksum 000000ff 0000f918
772 21:41:15.218734 T UDP wrong checksum 0000000f 000095d2
773 21:41:32.349770 T T T UDP wrong checksum 000000ff 00007887
774 21:41:32.366442 UDP wrong checksum 000000ff 00000d7a
775 21:41:35.222750 T UDP wrong checksum 0000000f 000095d2
776 21:41:50.226408 T T
777 21:41:50.227061 Retry count exceeded; starting again
779 21:41:50.228679 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
782 21:41:50.230739 end: 2.4 uboot-commands (duration 00:01:23) [common]
784 21:41:50.232487 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
786 21:41:50.234124 end: 2 uboot-action (duration 00:01:23) [common]
788 21:41:50.235763 Cleaning after the job
789 21:41:50.236417 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/ramdisk
790 21:41:50.237843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/kernel
791 21:41:50.285942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/dtb
792 21:41:50.286745 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942721/tftp-deploy-sxmizubz/modules
793 21:41:50.305950 start: 4.1 power-off (timeout 00:00:30) [common]
794 21:41:50.306606 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
795 21:41:50.360070 >> OK - accepted request
796 21:41:50.362832 Returned 0 in 0 seconds
797 21:41:50.463705 end: 4.1 power-off (duration 00:00:00) [common]
799 21:41:50.465412 start: 4.2 read-feedback (timeout 00:10:00) [common]
800 21:41:50.466534 Listened to connection for namespace 'common' for up to 1s
801 21:41:51.467337 Finalising connection for namespace 'common'
802 21:41:51.468256 Disconnecting from shell: Finalise
803 21:41:51.468834 =>
804 21:41:51.569887 end: 4.2 read-feedback (duration 00:00:01) [common]
805 21:41:51.570629 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/942721
806 21:41:52.227230 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/942721
807 21:41:52.227842 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.