Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:59:47.826684 lava-dispatcher, installed at version: 2024.01
2 21:59:47.827477 start: 0 validate
3 21:59:47.827967 Start time: 2024-11-05 21:59:47.827935+00:00 (UTC)
4 21:59:47.828546 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:59:47.829107 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:59:47.872857 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:59:47.873396 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:59:47.905418 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:59:47.906362 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:59:47.957591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:59:47.958108 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:59:47.989029 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:59:47.989536 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:59:48.031805 validate duration: 0.20
16 21:59:48.033318 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:59:48.033920 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:59:48.034514 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:59:48.035492 Not decompressing ramdisk as can be used compressed.
20 21:59:48.036301 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 21:59:48.036821 saving as /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/ramdisk/initrd.cpio.gz
22 21:59:48.037318 total size: 5628169 (5 MB)
23 21:59:48.077111 progress 0 % (0 MB)
24 21:59:48.085282 progress 5 % (0 MB)
25 21:59:48.093917 progress 10 % (0 MB)
26 21:59:48.101538 progress 15 % (0 MB)
27 21:59:48.109840 progress 20 % (1 MB)
28 21:59:48.114462 progress 25 % (1 MB)
29 21:59:48.118565 progress 30 % (1 MB)
30 21:59:48.122506 progress 35 % (1 MB)
31 21:59:48.126082 progress 40 % (2 MB)
32 21:59:48.129997 progress 45 % (2 MB)
33 21:59:48.133576 progress 50 % (2 MB)
34 21:59:48.137618 progress 55 % (2 MB)
35 21:59:48.141607 progress 60 % (3 MB)
36 21:59:48.145353 progress 65 % (3 MB)
37 21:59:48.149363 progress 70 % (3 MB)
38 21:59:48.152940 progress 75 % (4 MB)
39 21:59:48.156903 progress 80 % (4 MB)
40 21:59:48.160475 progress 85 % (4 MB)
41 21:59:48.164467 progress 90 % (4 MB)
42 21:59:48.168288 progress 95 % (5 MB)
43 21:59:48.171562 progress 100 % (5 MB)
44 21:59:48.172236 5 MB downloaded in 0.13 s (39.79 MB/s)
45 21:59:48.172782 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:59:48.173692 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:59:48.174001 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:59:48.174283 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:59:48.174826 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kernel/Image
51 21:59:48.175107 saving as /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/kernel/Image
52 21:59:48.175327 total size: 45713920 (43 MB)
53 21:59:48.175546 No compression specified
54 21:59:48.211104 progress 0 % (0 MB)
55 21:59:48.240117 progress 5 % (2 MB)
56 21:59:48.269502 progress 10 % (4 MB)
57 21:59:48.298835 progress 15 % (6 MB)
58 21:59:48.327940 progress 20 % (8 MB)
59 21:59:48.357164 progress 25 % (10 MB)
60 21:59:48.386394 progress 30 % (13 MB)
61 21:59:48.415460 progress 35 % (15 MB)
62 21:59:48.444700 progress 40 % (17 MB)
63 21:59:48.473710 progress 45 % (19 MB)
64 21:59:48.505039 progress 50 % (21 MB)
65 21:59:48.534740 progress 55 % (24 MB)
66 21:59:48.564384 progress 60 % (26 MB)
67 21:59:48.593394 progress 65 % (28 MB)
68 21:59:48.623118 progress 70 % (30 MB)
69 21:59:48.652369 progress 75 % (32 MB)
70 21:59:48.681837 progress 80 % (34 MB)
71 21:59:48.710849 progress 85 % (37 MB)
72 21:59:48.740608 progress 90 % (39 MB)
73 21:59:48.769951 progress 95 % (41 MB)
74 21:59:48.798676 progress 100 % (43 MB)
75 21:59:48.799242 43 MB downloaded in 0.62 s (69.88 MB/s)
76 21:59:48.799729 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:59:48.800582 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:59:48.800859 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:59:48.801131 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:59:48.801625 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 21:59:48.801928 saving as /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/dtb/meson-g12b-a311d-libretech-cc.dtb
83 21:59:48.802139 total size: 54703 (0 MB)
84 21:59:48.802348 No compression specified
85 21:59:48.840218 progress 59 % (0 MB)
86 21:59:48.841094 progress 100 % (0 MB)
87 21:59:48.841655 0 MB downloaded in 0.04 s (1.32 MB/s)
88 21:59:48.842121 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:59:48.842938 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:59:48.843201 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:59:48.843467 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:59:48.843926 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 21:59:48.844199 saving as /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/nfsrootfs/full.rootfs.tar
95 21:59:48.844406 total size: 120894716 (115 MB)
96 21:59:48.844615 Using unxz to decompress xz
97 21:59:48.880796 progress 0 % (0 MB)
98 21:59:49.676522 progress 5 % (5 MB)
99 21:59:50.517053 progress 10 % (11 MB)
100 21:59:51.311752 progress 15 % (17 MB)
101 21:59:52.047756 progress 20 % (23 MB)
102 21:59:52.644480 progress 25 % (28 MB)
103 21:59:53.462258 progress 30 % (34 MB)
104 21:59:54.247353 progress 35 % (40 MB)
105 21:59:54.612528 progress 40 % (46 MB)
106 21:59:54.992185 progress 45 % (51 MB)
107 21:59:55.702354 progress 50 % (57 MB)
108 21:59:56.580411 progress 55 % (63 MB)
109 21:59:57.362727 progress 60 % (69 MB)
110 21:59:58.120262 progress 65 % (74 MB)
111 21:59:58.903822 progress 70 % (80 MB)
112 21:59:59.729424 progress 75 % (86 MB)
113 22:00:00.514175 progress 80 % (92 MB)
114 22:00:01.266949 progress 85 % (98 MB)
115 22:00:02.120509 progress 90 % (103 MB)
116 22:00:02.924493 progress 95 % (109 MB)
117 22:00:03.760955 progress 100 % (115 MB)
118 22:00:03.773335 115 MB downloaded in 14.93 s (7.72 MB/s)
119 22:00:03.773886 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:00:03.774707 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:00:03.774971 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:00:03.775229 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:00:03.775857 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/modules.tar.xz
125 22:00:03.776263 saving as /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/modules/modules.tar
126 22:00:03.776667 total size: 11607644 (11 MB)
127 22:00:03.777075 Using unxz to decompress xz
128 22:00:03.816615 progress 0 % (0 MB)
129 22:00:03.882740 progress 5 % (0 MB)
130 22:00:03.956531 progress 10 % (1 MB)
131 22:00:04.051438 progress 15 % (1 MB)
132 22:00:04.141779 progress 20 % (2 MB)
133 22:00:04.221354 progress 25 % (2 MB)
134 22:00:04.296151 progress 30 % (3 MB)
135 22:00:04.369078 progress 35 % (3 MB)
136 22:00:04.445213 progress 40 % (4 MB)
137 22:00:04.520482 progress 45 % (5 MB)
138 22:00:04.605592 progress 50 % (5 MB)
139 22:00:04.681799 progress 55 % (6 MB)
140 22:00:04.766687 progress 60 % (6 MB)
141 22:00:04.846893 progress 65 % (7 MB)
142 22:00:04.922667 progress 70 % (7 MB)
143 22:00:05.004226 progress 75 % (8 MB)
144 22:00:05.086483 progress 80 % (8 MB)
145 22:00:05.165440 progress 85 % (9 MB)
146 22:00:05.242935 progress 90 % (9 MB)
147 22:00:05.319834 progress 95 % (10 MB)
148 22:00:05.395918 progress 100 % (11 MB)
149 22:00:05.406837 11 MB downloaded in 1.63 s (6.79 MB/s)
150 22:00:05.407426 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:00:05.408676 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:00:05.409227 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:00:05.409747 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:00:21.748001 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/942752/extract-nfsrootfs-f59ft6ot
156 22:00:21.748598 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 22:00:21.748884 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:00:21.749679 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d
159 22:00:21.750171 makedir: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin
160 22:00:21.750543 makedir: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/tests
161 22:00:21.750861 makedir: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/results
162 22:00:21.751190 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-add-keys
163 22:00:21.751717 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-add-sources
164 22:00:21.752275 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-background-process-start
165 22:00:21.752787 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-background-process-stop
166 22:00:21.753318 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-common-functions
167 22:00:21.753821 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-echo-ipv4
168 22:00:21.754303 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-install-packages
169 22:00:21.754775 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-installed-packages
170 22:00:21.755240 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-os-build
171 22:00:21.755716 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-probe-channel
172 22:00:21.756235 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-probe-ip
173 22:00:21.756720 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-target-ip
174 22:00:21.757192 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-target-mac
175 22:00:21.757660 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-target-storage
176 22:00:21.758138 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-case
177 22:00:21.758631 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-event
178 22:00:21.759115 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-feedback
179 22:00:21.759604 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-raise
180 22:00:21.760091 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-reference
181 22:00:21.760581 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-runner
182 22:00:21.761056 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-set
183 22:00:21.761522 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-test-shell
184 22:00:21.762082 Updating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-add-keys (debian)
185 22:00:21.762617 Updating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-add-sources (debian)
186 22:00:21.763114 Updating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-install-packages (debian)
187 22:00:21.763603 Updating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-installed-packages (debian)
188 22:00:21.764112 Updating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/bin/lava-os-build (debian)
189 22:00:21.764552 Creating /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/environment
190 22:00:21.764921 LAVA metadata
191 22:00:21.765175 - LAVA_JOB_ID=942752
192 22:00:21.765388 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:00:21.765748 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:00:21.766694 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:00:21.767004 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:00:21.767211 skipped lava-vland-overlay
197 22:00:21.767448 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:00:21.767698 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:00:21.767904 skipped lava-multinode-overlay
200 22:00:21.768173 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:00:21.768423 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:00:21.768666 Loading test definitions
203 22:00:21.768939 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:00:21.769155 Using /lava-942752 at stage 0
205 22:00:21.770225 uuid=942752_1.6.2.4.1 testdef=None
206 22:00:21.770533 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:00:21.770791 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:00:21.772363 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:00:21.773145 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:00:21.775055 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:00:21.775869 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:00:21.777693 runner path: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/0/tests/0_timesync-off test_uuid 942752_1.6.2.4.1
215 22:00:21.778238 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:00:21.779045 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:00:21.779265 Using /lava-942752 at stage 0
219 22:00:21.779610 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:00:21.779890 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/0/tests/1_kselftest-alsa'
221 22:00:25.110628 Running '/usr/bin/git checkout kernelci.org
222 22:00:25.275392 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 22:00:25.277862 uuid=942752_1.6.2.4.5 testdef=None
224 22:00:25.278537 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 22:00:25.280171 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 22:00:25.286230 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:00:25.287954 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 22:00:25.295835 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:00:25.297691 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 22:00:25.305358 runner path: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/0/tests/1_kselftest-alsa test_uuid 942752_1.6.2.4.5
234 22:00:25.305954 BOARD='meson-g12b-a311d-libretech-cc'
235 22:00:25.306402 BRANCH='broonie-sound'
236 22:00:25.306831 SKIPFILE='/dev/null'
237 22:00:25.307262 SKIP_INSTALL='True'
238 22:00:25.307684 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:00:25.308151 TST_CASENAME=''
240 22:00:25.308584 TST_CMDFILES='alsa'
241 22:00:25.309675 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:00:25.311353 Creating lava-test-runner.conf files
244 22:00:25.311791 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/942752/lava-overlay-qe01vn0d/lava-942752/0 for stage 0
245 22:00:25.312547 - 0_timesync-off
246 22:00:25.313047 - 1_kselftest-alsa
247 22:00:25.313734 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:00:25.314321 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 22:00:48.609752 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:00:48.610202 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:00:48.610498 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:00:48.610809 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:00:48.611104 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:00:49.226945 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:00:49.227412 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 22:00:49.227663 extracting modules file /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942752/extract-nfsrootfs-f59ft6ot
257 22:00:50.690263 extracting modules file /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk
258 22:00:52.101821 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:00:52.102324 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 22:00:52.102593 [common] Applying overlay to NFS
261 22:00:52.102806 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942752/compress-overlay-q737lj6r/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/942752/extract-nfsrootfs-f59ft6ot
262 22:00:54.813798 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:00:54.814277 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:00:54.814549 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:00:54.814779 Converting downloaded kernel to a uImage
266 22:00:54.815077 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/kernel/Image /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/kernel/uImage
267 22:00:55.291415 output: Image Name:
268 22:00:55.291831 output: Created: Tue Nov 5 22:00:54 2024
269 22:00:55.292084 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:00:55.292294 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:00:55.292496 output: Load Address: 01080000
272 22:00:55.292695 output: Entry Point: 01080000
273 22:00:55.292892 output:
274 22:00:55.293223 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 22:00:55.293492 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 22:00:55.293762 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 22:00:55.294015 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:00:55.294269 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 22:00:55.294512 Building ramdisk /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk
280 22:00:57.449200 >> 166792 blocks
281 22:01:05.144294 Adding RAMdisk u-boot header.
282 22:01:05.144957 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk.cpio.gz.uboot
283 22:01:05.405097 output: Image Name:
284 22:01:05.405509 output: Created: Tue Nov 5 22:01:05 2024
285 22:01:05.405720 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:01:05.405923 output: Data Size: 23431657 Bytes = 22882.48 KiB = 22.35 MiB
287 22:01:05.406123 output: Load Address: 00000000
288 22:01:05.406320 output: Entry Point: 00000000
289 22:01:05.406518 output:
290 22:01:05.407111 rename /var/lib/lava/dispatcher/tmp/942752/extract-overlay-ramdisk-41tqqkyo/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
291 22:01:05.407522 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:01:05.407806 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 22:01:05.408266 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:43) [common]
294 22:01:05.408743 No LXC device requested
295 22:01:05.409299 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:01:05.409850 start: 1.8 deploy-device-env (timeout 00:08:43) [common]
297 22:01:05.410387 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:01:05.410829 Checking files for TFTP limit of 4294967296 bytes.
299 22:01:05.413740 end: 1 tftp-deploy (duration 00:01:17) [common]
300 22:01:05.414358 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:01:05.414931 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:01:05.415471 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:01:05.416046 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:01:05.416613 Using kernel file from prepare-kernel: 942752/tftp-deploy-e9418_dp/kernel/uImage
305 22:01:05.417294 substitutions:
306 22:01:05.417744 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:01:05.418192 - {DTB_ADDR}: 0x01070000
308 22:01:05.418635 - {DTB}: 942752/tftp-deploy-e9418_dp/dtb/meson-g12b-a311d-libretech-cc.dtb
309 22:01:05.419072 - {INITRD}: 942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
310 22:01:05.419504 - {KERNEL_ADDR}: 0x01080000
311 22:01:05.419930 - {KERNEL}: 942752/tftp-deploy-e9418_dp/kernel/uImage
312 22:01:05.420392 - {LAVA_MAC}: None
313 22:01:05.420854 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/942752/extract-nfsrootfs-f59ft6ot
314 22:01:05.421285 - {NFS_SERVER_IP}: 192.168.6.2
315 22:01:05.421711 - {PRESEED_CONFIG}: None
316 22:01:05.422135 - {PRESEED_LOCAL}: None
317 22:01:05.422558 - {RAMDISK_ADDR}: 0x08000000
318 22:01:05.422979 - {RAMDISK}: 942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
319 22:01:05.423403 - {ROOT_PART}: None
320 22:01:05.423825 - {ROOT}: None
321 22:01:05.424317 - {SERVER_IP}: 192.168.6.2
322 22:01:05.424746 - {TEE_ADDR}: 0x83000000
323 22:01:05.425168 - {TEE}: None
324 22:01:05.425592 Parsed boot commands:
325 22:01:05.426004 - setenv autoload no
326 22:01:05.426426 - setenv initrd_high 0xffffffff
327 22:01:05.426847 - setenv fdt_high 0xffffffff
328 22:01:05.427266 - dhcp
329 22:01:05.427683 - setenv serverip 192.168.6.2
330 22:01:05.428137 - tftpboot 0x01080000 942752/tftp-deploy-e9418_dp/kernel/uImage
331 22:01:05.428566 - tftpboot 0x08000000 942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
332 22:01:05.428994 - tftpboot 0x01070000 942752/tftp-deploy-e9418_dp/dtb/meson-g12b-a311d-libretech-cc.dtb
333 22:01:05.429419 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/942752/extract-nfsrootfs-f59ft6ot,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:01:05.429857 - bootm 0x01080000 0x08000000 0x01070000
335 22:01:05.430394 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:01:05.432026 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:01:05.432485 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 22:01:05.448716 Setting prompt string to ['lava-test: # ']
340 22:01:05.450746 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:01:05.451473 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:01:05.452147 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:01:05.452742 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:01:05.453996 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 22:01:05.493540 >> OK - accepted request
346 22:01:05.495714 Returned 0 in 0 seconds
347 22:01:05.596927 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:01:05.598597 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:01:05.599196 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:01:05.599740 Setting prompt string to ['Hit any key to stop autoboot']
352 22:01:05.600301 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:01:05.602210 Trying 192.168.56.21...
354 22:01:05.602739 Connected to conserv1.
355 22:01:05.603181 Escape character is '^]'.
356 22:01:05.603635
357 22:01:05.604120 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 22:01:05.604615
359 22:01:17.437324 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 22:01:17.437977 bl2_stage_init 0x01
361 22:01:17.438441 bl2_stage_init 0x81
362 22:01:17.442812 hw id: 0x0000 - pwm id 0x01
363 22:01:17.443300 bl2_stage_init 0xc1
364 22:01:17.443781 bl2_stage_init 0x02
365 22:01:17.444293
366 22:01:17.448442 L0:00000000
367 22:01:17.448946 L1:20000703
368 22:01:17.449399 L2:00008067
369 22:01:17.449845 L3:14000000
370 22:01:17.454164 B2:00402000
371 22:01:17.454640 B1:e0f83180
372 22:01:17.455068
373 22:01:17.455496 TE: 58124
374 22:01:17.455923
375 22:01:17.459661 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 22:01:17.460155
377 22:01:17.460588 Board ID = 1
378 22:01:17.465284 Set A53 clk to 24M
379 22:01:17.465742 Set A73 clk to 24M
380 22:01:17.466169 Set clk81 to 24M
381 22:01:17.470920 A53 clk: 1200 MHz
382 22:01:17.471383 A73 clk: 1200 MHz
383 22:01:17.471807 CLK81: 166.6M
384 22:01:17.472266 smccc: 00012a91
385 22:01:17.476492 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 22:01:17.482108 board id: 1
387 22:01:17.488028 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:01:17.498614 fw parse done
389 22:01:17.504519 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:01:17.547051 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:01:17.557972 PIEI prepare done
392 22:01:17.558426 fastboot data load
393 22:01:17.558855 fastboot data verify
394 22:01:17.563719 verify result: 266
395 22:01:17.569174 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 22:01:17.569636 LPDDR4 probe
397 22:01:17.570068 ddr clk to 1584MHz
398 22:01:17.576821 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:01:17.614415
400 22:01:17.614875 dmc_version 0001
401 22:01:17.621130 Check phy result
402 22:01:17.627049 INFO : End of CA training
403 22:01:17.627504 INFO : End of initialization
404 22:01:17.632585 INFO : Training has run successfully!
405 22:01:17.633037 Check phy result
406 22:01:17.638195 INFO : End of initialization
407 22:01:17.638646 INFO : End of read enable training
408 22:01:17.643891 INFO : End of fine write leveling
409 22:01:17.649420 INFO : End of Write leveling coarse delay
410 22:01:17.649880 INFO : Training has run successfully!
411 22:01:17.650310 Check phy result
412 22:01:17.655271 INFO : End of initialization
413 22:01:17.655724 INFO : End of read dq deskew training
414 22:01:17.660563 INFO : End of MPR read delay center optimization
415 22:01:17.666314 INFO : End of write delay center optimization
416 22:01:17.671805 INFO : End of read delay center optimization
417 22:01:17.672308 INFO : End of max read latency training
418 22:01:17.677524 INFO : Training has run successfully!
419 22:01:17.677975 1D training succeed
420 22:01:17.685761 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:01:17.733305 Check phy result
422 22:01:17.733755 INFO : End of initialization
423 22:01:17.754755 INFO : End of 2D read delay Voltage center optimization
424 22:01:17.774967 INFO : End of 2D read delay Voltage center optimization
425 22:01:17.826777 INFO : End of 2D write delay Voltage center optimization
426 22:01:17.877014 INFO : End of 2D write delay Voltage center optimization
427 22:01:17.882588 INFO : Training has run successfully!
428 22:01:17.883044
429 22:01:17.883476 channel==0
430 22:01:17.888216 RxClkDly_Margin_A0==88 ps 9
431 22:01:17.888669 TxDqDly_Margin_A0==98 ps 10
432 22:01:17.893781 RxClkDly_Margin_A1==88 ps 9
433 22:01:17.894228 TxDqDly_Margin_A1==98 ps 10
434 22:01:17.894659 TrainedVREFDQ_A0==74
435 22:01:17.899392 TrainedVREFDQ_A1==75
436 22:01:17.899846 VrefDac_Margin_A0==25
437 22:01:17.900326 DeviceVref_Margin_A0==40
438 22:01:17.905048 VrefDac_Margin_A1==24
439 22:01:17.905503 DeviceVref_Margin_A1==39
440 22:01:17.905933
441 22:01:17.906364
442 22:01:17.910568 channel==1
443 22:01:17.911017 RxClkDly_Margin_A0==98 ps 10
444 22:01:17.911446 TxDqDly_Margin_A0==98 ps 10
445 22:01:17.916203 RxClkDly_Margin_A1==98 ps 10
446 22:01:17.916658 TxDqDly_Margin_A1==88 ps 9
447 22:01:17.921840 TrainedVREFDQ_A0==77
448 22:01:17.922293 TrainedVREFDQ_A1==77
449 22:01:17.922722 VrefDac_Margin_A0==22
450 22:01:17.927402 DeviceVref_Margin_A0==37
451 22:01:17.927856 VrefDac_Margin_A1==22
452 22:01:17.933019 DeviceVref_Margin_A1==37
453 22:01:17.933475
454 22:01:17.933911 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:01:17.938522
456 22:01:17.966572 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 22:01:17.967106 2D training succeed
458 22:01:17.972181 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:01:17.977758 auto size-- 65535DDR cs0 size: 2048MB
460 22:01:17.978216 DDR cs1 size: 2048MB
461 22:01:17.983417 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:01:17.983867 cs0 DataBus test pass
463 22:01:17.989056 cs1 DataBus test pass
464 22:01:17.989504 cs0 AddrBus test pass
465 22:01:17.989933 cs1 AddrBus test pass
466 22:01:17.990359
467 22:01:17.994572 100bdlr_step_size ps== 420
468 22:01:17.995039 result report
469 22:01:18.000185 boot times 0Enable ddr reg access
470 22:01:18.004677 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:01:18.018164 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 22:01:18.590935 0.0;M3 CHK:0;cm4_sp_mode 0
473 22:01:18.591449 MVN_1=0x00000000
474 22:01:18.596511 MVN_2=0x00000000
475 22:01:18.602247 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 22:01:18.602712 OPS=0x10
477 22:01:18.603161 ring efuse init
478 22:01:18.603598 chipver efuse init
479 22:01:18.610569 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 22:01:18.611051 [0.018961 Inits done]
481 22:01:18.617177 secure task start!
482 22:01:18.617643 high task start!
483 22:01:18.618085 low task start!
484 22:01:18.618522 run into bl31
485 22:01:18.624718 NOTICE: BL31: v1.3(release):4fc40b1
486 22:01:18.631565 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 22:01:18.632066 NOTICE: BL31: G12A normal boot!
488 22:01:18.657941 NOTICE: BL31: BL33 decompress pass
489 22:01:18.662837 ERROR: Error initializing runtime service opteed_fast
490 22:01:19.896546
491 22:01:19.897115
492 22:01:19.904933 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 22:01:19.905421
494 22:01:19.905871 Model: Libre Computer AML-A311D-CC Alta
495 22:01:20.112373 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 22:01:20.136740 DRAM: 2 GiB (effective 3.8 GiB)
497 22:01:20.279690 Core: 408 devices, 31 uclasses, devicetree: separate
498 22:01:20.285461 WDT: Not starting watchdog@f0d0
499 22:01:20.317863 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 22:01:20.330349 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 22:01:20.334837 ** Bad device specification mmc 0 **
502 22:01:20.345639 Card did not respond to voltage select! : -110
503 22:01:20.352594 ** Bad device specification mmc 0 **
504 22:01:20.353061 Couldn't find partition mmc 0
505 22:01:20.361613 Card did not respond to voltage select! : -110
506 22:01:20.367155 ** Bad device specification mmc 0 **
507 22:01:20.367622 Couldn't find partition mmc 0
508 22:01:20.372197 Error: could not access storage.
509 22:01:21.637702 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 22:01:21.638271 bl2_stage_init 0x01
511 22:01:21.638730 bl2_stage_init 0x81
512 22:01:21.643241 hw id: 0x0000 - pwm id 0x01
513 22:01:21.643714 bl2_stage_init 0xc1
514 22:01:21.644211 bl2_stage_init 0x02
515 22:01:21.644654
516 22:01:21.648860 L0:00000000
517 22:01:21.649322 L1:20000703
518 22:01:21.649761 L2:00008067
519 22:01:21.650197 L3:14000000
520 22:01:21.654530 B2:00402000
521 22:01:21.654994 B1:e0f83180
522 22:01:21.655433
523 22:01:21.655871 TE: 58159
524 22:01:21.656360
525 22:01:21.660079 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 22:01:21.660556
527 22:01:21.660999 Board ID = 1
528 22:01:21.665660 Set A53 clk to 24M
529 22:01:21.666130 Set A73 clk to 24M
530 22:01:21.666574 Set clk81 to 24M
531 22:01:21.671237 A53 clk: 1200 MHz
532 22:01:21.671696 A73 clk: 1200 MHz
533 22:01:21.672171 CLK81: 166.6M
534 22:01:21.672608 smccc: 00012ab5
535 22:01:21.676839 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 22:01:21.682517 board id: 1
537 22:01:21.688316 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 22:01:21.698967 fw parse done
539 22:01:21.704953 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:01:21.747563 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 22:01:21.758528 PIEI prepare done
542 22:01:21.758998 fastboot data load
543 22:01:21.759445 fastboot data verify
544 22:01:21.764164 verify result: 266
545 22:01:21.769720 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 22:01:21.770186 LPDDR4 probe
547 22:01:21.770625 ddr clk to 1584MHz
548 22:01:21.777713 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 22:01:21.814896
550 22:01:21.815366 dmc_version 0001
551 22:01:21.821652 Check phy result
552 22:01:21.827573 INFO : End of CA training
553 22:01:21.828060 INFO : End of initialization
554 22:01:21.833095 INFO : Training has run successfully!
555 22:01:21.833559 Check phy result
556 22:01:21.838694 INFO : End of initialization
557 22:01:21.839153 INFO : End of read enable training
558 22:01:21.844273 INFO : End of fine write leveling
559 22:01:21.849881 INFO : End of Write leveling coarse delay
560 22:01:21.850360 INFO : Training has run successfully!
561 22:01:21.850805 Check phy result
562 22:01:21.855587 INFO : End of initialization
563 22:01:21.856121 INFO : End of read dq deskew training
564 22:01:21.861163 INFO : End of MPR read delay center optimization
565 22:01:21.866882 INFO : End of write delay center optimization
566 22:01:21.872426 INFO : End of read delay center optimization
567 22:01:21.872975 INFO : End of max read latency training
568 22:01:21.878006 INFO : Training has run successfully!
569 22:01:21.878543 1D training succeed
570 22:01:21.887142 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 22:01:21.934864 Check phy result
572 22:01:21.935498 INFO : End of initialization
573 22:01:21.957449 INFO : End of 2D read delay Voltage center optimization
574 22:01:21.977659 INFO : End of 2D read delay Voltage center optimization
575 22:01:22.029623 INFO : End of 2D write delay Voltage center optimization
576 22:01:22.079019 INFO : End of 2D write delay Voltage center optimization
577 22:01:22.085053 INFO : Training has run successfully!
578 22:01:22.085654
579 22:01:22.086036 channel==0
580 22:01:22.090178 RxClkDly_Margin_A0==88 ps 9
581 22:01:22.090588 TxDqDly_Margin_A0==98 ps 10
582 22:01:22.094250 RxClkDly_Margin_A1==88 ps 9
583 22:01:22.094770 TxDqDly_Margin_A1==98 ps 10
584 22:01:22.099178 TrainedVREFDQ_A0==74
585 22:01:22.099735 TrainedVREFDQ_A1==74
586 22:01:22.100208 VrefDac_Margin_A0==25
587 22:01:22.104721 DeviceVref_Margin_A0==40
588 22:01:22.105323 VrefDac_Margin_A1==24
589 22:01:22.110331 DeviceVref_Margin_A1==40
590 22:01:22.110828
591 22:01:22.111252
592 22:01:22.111658 channel==1
593 22:01:22.112102 RxClkDly_Margin_A0==98 ps 10
594 22:01:22.115930 TxDqDly_Margin_A0==98 ps 10
595 22:01:22.116486 RxClkDly_Margin_A1==88 ps 9
596 22:01:22.121531 TxDqDly_Margin_A1==88 ps 9
597 22:01:22.121913 TrainedVREFDQ_A0==77
598 22:01:22.122171 TrainedVREFDQ_A1==77
599 22:01:22.127286 VrefDac_Margin_A0==22
600 22:01:22.127679 DeviceVref_Margin_A0==37
601 22:01:22.132770 VrefDac_Margin_A1==24
602 22:01:22.133327 DeviceVref_Margin_A1==37
603 22:01:22.133768
604 22:01:22.138406 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 22:01:22.138997
606 22:01:22.166314 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 22:01:22.171814 2D training succeed
608 22:01:22.177466 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 22:01:22.178034 auto size-- 65535DDR cs0 size: 2048MB
610 22:01:22.183056 DDR cs1 size: 2048MB
611 22:01:22.183569 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 22:01:22.188673 cs0 DataBus test pass
613 22:01:22.189207 cs1 DataBus test pass
614 22:01:22.189642 cs0 AddrBus test pass
615 22:01:22.194284 cs1 AddrBus test pass
616 22:01:22.194748
617 22:01:22.195169 100bdlr_step_size ps== 420
618 22:01:22.195596 result report
619 22:01:22.199833 boot times 0Enable ddr reg access
620 22:01:22.207536 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 22:01:22.219965 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 22:01:22.794171 0.0;M3 CHK:0;cm4_sp_mode 0
623 22:01:22.794825 MVN_1=0x00000000
624 22:01:22.799540 MVN_2=0x00000000
625 22:01:22.805336 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 22:01:22.805865 OPS=0x10
627 22:01:22.806313 ring efuse init
628 22:01:22.806743 chipver efuse init
629 22:01:22.813476 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 22:01:22.813931 [0.018961 Inits done]
631 22:01:22.821088 secure task start!
632 22:01:22.821507 high task start!
633 22:01:22.821895 low task start!
634 22:01:22.822278 run into bl31
635 22:01:22.827807 NOTICE: BL31: v1.3(release):4fc40b1
636 22:01:22.835467 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 22:01:22.835891 NOTICE: BL31: G12A normal boot!
638 22:01:22.860988 NOTICE: BL31: BL33 decompress pass
639 22:01:22.866561 ERROR: Error initializing runtime service opteed_fast
640 22:01:24.099546
641 22:01:24.100177
642 22:01:24.107921 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 22:01:24.108397
644 22:01:24.108795 Model: Libre Computer AML-A311D-CC Alta
645 22:01:24.316480 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 22:01:24.341729 DRAM: 2 GiB (effective 3.8 GiB)
647 22:01:24.482838 Core: 408 devices, 31 uclasses, devicetree: separate
648 22:01:24.488658 WDT: Not starting watchdog@f0d0
649 22:01:24.520822 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 22:01:24.533347 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 22:01:24.538289 ** Bad device specification mmc 0 **
652 22:01:24.548723 Card did not respond to voltage select! : -110
653 22:01:24.555407 ** Bad device specification mmc 0 **
654 22:01:24.555854 Couldn't find partition mmc 0
655 22:01:24.564710 Card did not respond to voltage select! : -110
656 22:01:24.570226 ** Bad device specification mmc 0 **
657 22:01:24.570662 Couldn't find partition mmc 0
658 22:01:24.575233 Error: could not access storage.
659 22:01:24.917756 Net: eth0: ethernet@ff3f0000
660 22:01:24.918268 starting USB...
661 22:01:25.169507 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 22:01:25.169990 Starting the controller
663 22:01:25.176405 USB XHCI 1.10
664 22:01:26.889613 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 22:01:26.890254 bl2_stage_init 0x01
666 22:01:26.890683 bl2_stage_init 0x81
667 22:01:26.895305 hw id: 0x0000 - pwm id 0x01
668 22:01:26.895755 bl2_stage_init 0xc1
669 22:01:26.896215 bl2_stage_init 0x02
670 22:01:26.896624
671 22:01:26.900638 L0:00000000
672 22:01:26.901073 L1:20000703
673 22:01:26.901478 L2:00008067
674 22:01:26.901871 L3:14000000
675 22:01:26.903685 B2:00402000
676 22:01:26.904151 B1:e0f83180
677 22:01:26.904563
678 22:01:26.904966 TE: 58124
679 22:01:26.905363
680 22:01:26.914733 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 22:01:26.915185
682 22:01:26.915592 Board ID = 1
683 22:01:26.916024 Set A53 clk to 24M
684 22:01:26.916428 Set A73 clk to 24M
685 22:01:26.920402 Set clk81 to 24M
686 22:01:26.920831 A53 clk: 1200 MHz
687 22:01:26.921231 A73 clk: 1200 MHz
688 22:01:26.923926 CLK81: 166.6M
689 22:01:26.924381 smccc: 00012a92
690 22:01:26.929599 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 22:01:26.935175 board id: 1
692 22:01:26.940381 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 22:01:26.950751 fw parse done
694 22:01:26.956837 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:01:26.999420 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 22:01:27.010350 PIEI prepare done
697 22:01:27.010793 fastboot data load
698 22:01:27.011207 fastboot data verify
699 22:01:27.015924 verify result: 266
700 22:01:27.021501 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 22:01:27.021940 LPDDR4 probe
702 22:01:27.022340 ddr clk to 1584MHz
703 22:01:27.029511 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 22:01:27.066838
705 22:01:27.067291 dmc_version 0001
706 22:01:27.073468 Check phy result
707 22:01:27.079389 INFO : End of CA training
708 22:01:27.079821 INFO : End of initialization
709 22:01:27.084997 INFO : Training has run successfully!
710 22:01:27.085434 Check phy result
711 22:01:27.090524 INFO : End of initialization
712 22:01:27.090957 INFO : End of read enable training
713 22:01:27.096200 INFO : End of fine write leveling
714 22:01:27.101697 INFO : End of Write leveling coarse delay
715 22:01:27.102129 INFO : Training has run successfully!
716 22:01:27.102532 Check phy result
717 22:01:27.107365 INFO : End of initialization
718 22:01:27.107801 INFO : End of read dq deskew training
719 22:01:27.112886 INFO : End of MPR read delay center optimization
720 22:01:27.118524 INFO : End of write delay center optimization
721 22:01:27.124196 INFO : End of read delay center optimization
722 22:01:27.124627 INFO : End of max read latency training
723 22:01:27.129747 INFO : Training has run successfully!
724 22:01:27.130178 1D training succeed
725 22:01:27.138958 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 22:01:27.186493 Check phy result
727 22:01:27.186962 INFO : End of initialization
728 22:01:27.208216 INFO : End of 2D read delay Voltage center optimization
729 22:01:27.228442 INFO : End of 2D read delay Voltage center optimization
730 22:01:27.280499 INFO : End of 2D write delay Voltage center optimization
731 22:01:27.329789 INFO : End of 2D write delay Voltage center optimization
732 22:01:27.335385 INFO : Training has run successfully!
733 22:01:27.335813
734 22:01:27.336274 channel==0
735 22:01:27.340996 RxClkDly_Margin_A0==88 ps 9
736 22:01:27.341431 TxDqDly_Margin_A0==98 ps 10
737 22:01:27.346607 RxClkDly_Margin_A1==88 ps 9
738 22:01:27.347031 TxDqDly_Margin_A1==88 ps 9
739 22:01:27.347436 TrainedVREFDQ_A0==74
740 22:01:27.352318 TrainedVREFDQ_A1==74
741 22:01:27.352748 VrefDac_Margin_A0==25
742 22:01:27.353151 DeviceVref_Margin_A0==40
743 22:01:27.357793 VrefDac_Margin_A1==25
744 22:01:27.358255 DeviceVref_Margin_A1==40
745 22:01:27.358664
746 22:01:27.359065
747 22:01:27.359464 channel==1
748 22:01:27.363357 RxClkDly_Margin_A0==98 ps 10
749 22:01:27.363792 TxDqDly_Margin_A0==98 ps 10
750 22:01:27.369036 RxClkDly_Margin_A1==98 ps 10
751 22:01:27.369488 TxDqDly_Margin_A1==88 ps 9
752 22:01:27.374546 TrainedVREFDQ_A0==77
753 22:01:27.374982 TrainedVREFDQ_A1==77
754 22:01:27.375389 VrefDac_Margin_A0==22
755 22:01:27.380218 DeviceVref_Margin_A0==37
756 22:01:27.380648 VrefDac_Margin_A1==22
757 22:01:27.385825 DeviceVref_Margin_A1==37
758 22:01:27.386255
759 22:01:27.386660 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 22:01:27.387056
761 22:01:27.419398 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 22:01:27.419886 2D training succeed
763 22:01:27.425009 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 22:01:27.430605 auto size-- 65535DDR cs0 size: 2048MB
765 22:01:27.431034 DDR cs1 size: 2048MB
766 22:01:27.436215 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 22:01:27.436646 cs0 DataBus test pass
768 22:01:27.441774 cs1 DataBus test pass
769 22:01:27.442198 cs0 AddrBus test pass
770 22:01:27.442600 cs1 AddrBus test pass
771 22:01:27.442994
772 22:01:27.447390 100bdlr_step_size ps== 420
773 22:01:27.447839 result report
774 22:01:27.452998 boot times 0Enable ddr reg access
775 22:01:27.458405 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 22:01:27.471307 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 22:01:28.045561 0.0;M3 CHK:0;cm4_sp_mode 0
778 22:01:28.046171 MVN_1=0x00000000
779 22:01:28.050921 MVN_2=0x00000000
780 22:01:28.056732 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 22:01:28.057146 OPS=0x10
782 22:01:28.057390 ring efuse init
783 22:01:28.057599 chipver efuse init
784 22:01:28.064960 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 22:01:28.065554 [0.018961 Inits done]
786 22:01:28.072594 secure task start!
787 22:01:28.073139 high task start!
788 22:01:28.073534 low task start!
789 22:01:28.073926 run into bl31
790 22:01:28.079075 NOTICE: BL31: v1.3(release):4fc40b1
791 22:01:28.086869 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 22:01:28.087325 NOTICE: BL31: G12A normal boot!
793 22:01:28.112277 NOTICE: BL31: BL33 decompress pass
794 22:01:28.117946 ERROR: Error initializing runtime service opteed_fast
795 22:01:29.350912
796 22:01:29.351545
797 22:01:29.359265 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 22:01:29.359735
799 22:01:29.360186 Model: Libre Computer AML-A311D-CC Alta
800 22:01:29.567827 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 22:01:29.591113 DRAM: 2 GiB (effective 3.8 GiB)
802 22:01:29.734168 Core: 408 devices, 31 uclasses, devicetree: separate
803 22:01:29.740011 WDT: Not starting watchdog@f0d0
804 22:01:29.772337 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 22:01:29.784718 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 22:01:29.789822 ** Bad device specification mmc 0 **
807 22:01:29.800084 Card did not respond to voltage select! : -110
808 22:01:29.807739 ** Bad device specification mmc 0 **
809 22:01:29.808100 Couldn't find partition mmc 0
810 22:01:29.815923 Card did not respond to voltage select! : -110
811 22:01:29.821442 ** Bad device specification mmc 0 **
812 22:01:29.821879 Couldn't find partition mmc 0
813 22:01:29.825597 Error: could not access storage.
814 22:01:30.169056 Net: eth0: ethernet@ff3f0000
815 22:01:30.169489 starting USB...
816 22:01:30.420835 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 22:01:30.421430 Starting the controller
818 22:01:30.426876 USB XHCI 1.10
819 22:01:32.588378 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 22:01:32.589011 bl2_stage_init 0x01
821 22:01:32.589441 bl2_stage_init 0x81
822 22:01:32.593988 hw id: 0x0000 - pwm id 0x01
823 22:01:32.594483 bl2_stage_init 0xc1
824 22:01:32.594901 bl2_stage_init 0x02
825 22:01:32.595307
826 22:01:32.599419 L0:00000000
827 22:01:32.599903 L1:20000703
828 22:01:32.600354 L2:00008067
829 22:01:32.600762 L3:14000000
830 22:01:32.605183 B2:00402000
831 22:01:32.605701 B1:e0f83180
832 22:01:32.606125
833 22:01:32.606541 TE: 58124
834 22:01:32.606956
835 22:01:32.610689 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 22:01:32.611184
837 22:01:32.611603 Board ID = 1
838 22:01:32.616312 Set A53 clk to 24M
839 22:01:32.616801 Set A73 clk to 24M
840 22:01:32.617207 Set clk81 to 24M
841 22:01:32.621822 A53 clk: 1200 MHz
842 22:01:32.622307 A73 clk: 1200 MHz
843 22:01:32.622721 CLK81: 166.6M
844 22:01:32.623124 smccc: 00012a91
845 22:01:32.627389 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 22:01:32.632982 board id: 1
847 22:01:32.638919 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 22:01:32.649549 fw parse done
849 22:01:32.654618 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:01:32.698145 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 22:01:32.709017 PIEI prepare done
852 22:01:32.709521 fastboot data load
853 22:01:32.709935 fastboot data verify
854 22:01:32.714638 verify result: 266
855 22:01:32.720250 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 22:01:32.720736 LPDDR4 probe
857 22:01:32.721153 ddr clk to 1584MHz
858 22:01:32.728277 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 22:01:32.765513
860 22:01:32.766038 dmc_version 0001
861 22:01:32.772198 Check phy result
862 22:01:32.777998 INFO : End of CA training
863 22:01:32.778487 INFO : End of initialization
864 22:01:32.783581 INFO : Training has run successfully!
865 22:01:32.784100 Check phy result
866 22:01:32.789284 INFO : End of initialization
867 22:01:32.789793 INFO : End of read enable training
868 22:01:32.794901 INFO : End of fine write leveling
869 22:01:32.800428 INFO : End of Write leveling coarse delay
870 22:01:32.800932 INFO : Training has run successfully!
871 22:01:32.801349 Check phy result
872 22:01:32.806033 INFO : End of initialization
873 22:01:32.806517 INFO : End of read dq deskew training
874 22:01:32.811618 INFO : End of MPR read delay center optimization
875 22:01:32.817227 INFO : End of write delay center optimization
876 22:01:32.822857 INFO : End of read delay center optimization
877 22:01:32.823338 INFO : End of max read latency training
878 22:01:32.828384 INFO : Training has run successfully!
879 22:01:32.828869 1D training succeed
880 22:01:32.836590 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 22:01:32.885202 Check phy result
882 22:01:32.885718 INFO : End of initialization
883 22:01:32.906883 INFO : End of 2D read delay Voltage center optimization
884 22:01:32.926959 INFO : End of 2D read delay Voltage center optimization
885 22:01:32.978954 INFO : End of 2D write delay Voltage center optimization
886 22:01:33.028242 INFO : End of 2D write delay Voltage center optimization
887 22:01:33.033701 INFO : Training has run successfully!
888 22:01:33.034203
889 22:01:33.034622 channel==0
890 22:01:33.039395 RxClkDly_Margin_A0==88 ps 9
891 22:01:33.039896 TxDqDly_Margin_A0==98 ps 10
892 22:01:33.042639 RxClkDly_Margin_A1==88 ps 9
893 22:01:33.043120 TxDqDly_Margin_A1==98 ps 10
894 22:01:33.048120 TrainedVREFDQ_A0==74
895 22:01:33.048611 TrainedVREFDQ_A1==74
896 22:01:33.053794 VrefDac_Margin_A0==25
897 22:01:33.054316 DeviceVref_Margin_A0==40
898 22:01:33.054730 VrefDac_Margin_A1==25
899 22:01:33.059350 DeviceVref_Margin_A1==40
900 22:01:33.059852
901 22:01:33.060287
902 22:01:33.060673 channel==1
903 22:01:33.061054 RxClkDly_Margin_A0==98 ps 10
904 22:01:33.062819 TxDqDly_Margin_A0==98 ps 10
905 22:01:33.068398 RxClkDly_Margin_A1==88 ps 9
906 22:01:33.068868 TxDqDly_Margin_A1==88 ps 9
907 22:01:33.069259 TrainedVREFDQ_A0==77
908 22:01:33.074017 TrainedVREFDQ_A1==77
909 22:01:33.074498 VrefDac_Margin_A0==22
910 22:01:33.079603 DeviceVref_Margin_A0==37
911 22:01:33.080132 VrefDac_Margin_A1==24
912 22:01:33.080532 DeviceVref_Margin_A1==37
913 22:01:33.080920
914 22:01:33.085311 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 22:01:33.085788
916 22:01:33.118685 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
917 22:01:33.119252 2D training succeed
918 22:01:33.124387 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 22:01:33.129882 auto size-- 65535DDR cs0 size: 2048MB
920 22:01:33.130352 DDR cs1 size: 2048MB
921 22:01:33.135438 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 22:01:33.135896 cs0 DataBus test pass
923 22:01:33.136323 cs1 DataBus test pass
924 22:01:33.141068 cs0 AddrBus test pass
925 22:01:33.141554 cs1 AddrBus test pass
926 22:01:33.141943
927 22:01:33.146660 100bdlr_step_size ps== 420
928 22:01:33.147135 result report
929 22:01:33.147525 boot times 0Enable ddr reg access
930 22:01:33.156405 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 22:01:33.169937 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 22:01:33.742108 0.0;M3 CHK:0;cm4_sp_mode 0
933 22:01:33.742737 MVN_1=0x00000000
934 22:01:33.747474 MVN_2=0x00000000
935 22:01:33.753281 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 22:01:33.753757 OPS=0x10
937 22:01:33.754172 ring efuse init
938 22:01:33.754569 chipver efuse init
939 22:01:33.761403 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 22:01:33.761880 [0.018961 Inits done]
941 22:01:33.769025 secure task start!
942 22:01:33.769486 high task start!
943 22:01:33.769894 low task start!
944 22:01:33.770291 run into bl31
945 22:01:33.775601 NOTICE: BL31: v1.3(release):4fc40b1
946 22:01:33.783407 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 22:01:33.783880 NOTICE: BL31: G12A normal boot!
948 22:01:33.808812 NOTICE: BL31: BL33 decompress pass
949 22:01:33.814496 ERROR: Error initializing runtime service opteed_fast
950 22:01:35.047328
951 22:01:35.047766
952 22:01:35.055072 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 22:01:35.055405
954 22:01:35.055628 Model: Libre Computer AML-A311D-CC Alta
955 22:01:35.263341 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 22:01:35.286640 DRAM: 2 GiB (effective 3.8 GiB)
957 22:01:35.430633 Core: 408 devices, 31 uclasses, devicetree: separate
958 22:01:35.436488 WDT: Not starting watchdog@f0d0
959 22:01:35.468787 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 22:01:35.481182 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 22:01:35.486253 ** Bad device specification mmc 0 **
962 22:01:35.496548 Card did not respond to voltage select! : -110
963 22:01:35.504246 ** Bad device specification mmc 0 **
964 22:01:35.504747 Couldn't find partition mmc 0
965 22:01:35.512553 Card did not respond to voltage select! : -110
966 22:01:35.518044 ** Bad device specification mmc 0 **
967 22:01:35.518528 Couldn't find partition mmc 0
968 22:01:35.523116 Error: could not access storage.
969 22:01:35.865564 Net: eth0: ethernet@ff3f0000
970 22:01:35.866126 starting USB...
971 22:01:36.117296 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 22:01:36.117792 Starting the controller
973 22:01:36.124335 USB XHCI 1.10
974 22:01:37.987668 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 22:01:37.988120 bl2_stage_init 0x01
976 22:01:37.988368 bl2_stage_init 0x81
977 22:01:37.993225 hw id: 0x0000 - pwm id 0x01
978 22:01:37.993527 bl2_stage_init 0xc1
979 22:01:37.993765 bl2_stage_init 0x02
980 22:01:37.993993
981 22:01:37.998818 L0:00000000
982 22:01:37.999116 L1:20000703
983 22:01:37.999347 L2:00008067
984 22:01:37.999565 L3:14000000
985 22:01:38.001863 B2:00402000
986 22:01:38.002281 B1:e0f83180
987 22:01:38.002655
988 22:01:38.003030 TE: 58167
989 22:01:38.003388
990 22:01:38.012846 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 22:01:38.013287
992 22:01:38.013559 Board ID = 1
993 22:01:38.013791 Set A53 clk to 24M
994 22:01:38.014012 Set A73 clk to 24M
995 22:01:38.018462 Set clk81 to 24M
996 22:01:38.018890 A53 clk: 1200 MHz
997 22:01:38.019260 A73 clk: 1200 MHz
998 22:01:38.024033 CLK81: 166.6M
999 22:01:38.024452 smccc: 00012abd
1000 22:01:38.029611 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 22:01:38.029908 board id: 1
1002 22:01:38.035207 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 22:01:38.049028 fw parse done
1004 22:01:38.054937 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:01:38.097573 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 22:01:38.108444 PIEI prepare done
1007 22:01:38.108921 fastboot data load
1008 22:01:38.109395 fastboot data verify
1009 22:01:38.114162 verify result: 266
1010 22:01:38.119711 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 22:01:38.120201 LPDDR4 probe
1012 22:01:38.120598 ddr clk to 1584MHz
1013 22:01:38.127948 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 22:01:38.165163
1015 22:01:38.165626 dmc_version 0001
1016 22:01:38.171730 Check phy result
1017 22:01:38.177510 INFO : End of CA training
1018 22:01:38.177945 INFO : End of initialization
1019 22:01:38.183299 INFO : Training has run successfully!
1020 22:01:38.183750 Check phy result
1021 22:01:38.188876 INFO : End of initialization
1022 22:01:38.189347 INFO : End of read enable training
1023 22:01:38.194530 INFO : End of fine write leveling
1024 22:01:38.200100 INFO : End of Write leveling coarse delay
1025 22:01:38.200563 INFO : Training has run successfully!
1026 22:01:38.200974 Check phy result
1027 22:01:38.205577 INFO : End of initialization
1028 22:01:38.206029 INFO : End of read dq deskew training
1029 22:01:38.211375 INFO : End of MPR read delay center optimization
1030 22:01:38.217001 INFO : End of write delay center optimization
1031 22:01:38.222431 INFO : End of read delay center optimization
1032 22:01:38.222904 INFO : End of max read latency training
1033 22:01:38.227942 INFO : Training has run successfully!
1034 22:01:38.228463 1D training succeed
1035 22:01:38.237156 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 22:01:38.284731 Check phy result
1037 22:01:38.285234 INFO : End of initialization
1038 22:01:38.307339 INFO : End of 2D read delay Voltage center optimization
1039 22:01:38.327644 INFO : End of 2D read delay Voltage center optimization
1040 22:01:38.379642 INFO : End of 2D write delay Voltage center optimization
1041 22:01:38.428930 INFO : End of 2D write delay Voltage center optimization
1042 22:01:38.434476 INFO : Training has run successfully!
1043 22:01:38.434935
1044 22:01:38.435348 channel==0
1045 22:01:38.440077 RxClkDly_Margin_A0==88 ps 9
1046 22:01:38.440537 TxDqDly_Margin_A0==98 ps 10
1047 22:01:38.445724 RxClkDly_Margin_A1==88 ps 9
1048 22:01:38.446168 TxDqDly_Margin_A1==98 ps 10
1049 22:01:38.446579 TrainedVREFDQ_A0==74
1050 22:01:38.451258 TrainedVREFDQ_A1==74
1051 22:01:38.451712 VrefDac_Margin_A0==24
1052 22:01:38.452154 DeviceVref_Margin_A0==40
1053 22:01:38.456870 VrefDac_Margin_A1==24
1054 22:01:38.457318 DeviceVref_Margin_A1==40
1055 22:01:38.457721
1056 22:01:38.458121
1057 22:01:38.462478 channel==1
1058 22:01:38.462926 RxClkDly_Margin_A0==98 ps 10
1059 22:01:38.463332 TxDqDly_Margin_A0==98 ps 10
1060 22:01:38.468034 RxClkDly_Margin_A1==98 ps 10
1061 22:01:38.468486 TxDqDly_Margin_A1==88 ps 9
1062 22:01:38.473724 TrainedVREFDQ_A0==77
1063 22:01:38.474171 TrainedVREFDQ_A1==77
1064 22:01:38.474574 VrefDac_Margin_A0==22
1065 22:01:38.479224 DeviceVref_Margin_A0==37
1066 22:01:38.479671 VrefDac_Margin_A1==22
1067 22:01:38.484866 DeviceVref_Margin_A1==37
1068 22:01:38.485321
1069 22:01:38.485729 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 22:01:38.490514
1071 22:01:38.518525 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
1072 22:01:38.519146 2D training succeed
1073 22:01:38.524100 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 22:01:38.530748 auto size-- 65535DDR cs0 size: 2048MB
1075 22:01:38.531234 DDR cs1 size: 2048MB
1076 22:01:38.535248 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 22:01:38.535733 cs0 DataBus test pass
1078 22:01:38.540874 cs1 DataBus test pass
1079 22:01:38.541358 cs0 AddrBus test pass
1080 22:01:38.541772 cs1 AddrBus test pass
1081 22:01:38.542181
1082 22:01:38.546517 100bdlr_step_size ps== 420
1083 22:01:38.547010 result report
1084 22:01:38.552081 boot times 0Enable ddr reg access
1085 22:01:38.557491 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 22:01:38.570983 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 22:01:39.144777 0.0;M3 CHK:0;cm4_sp_mode 0
1088 22:01:39.145439 MVN_1=0x00000000
1089 22:01:39.150136 MVN_2=0x00000000
1090 22:01:39.155906 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 22:01:39.156458 OPS=0x10
1092 22:01:39.156882 ring efuse init
1093 22:01:39.157294 chipver efuse init
1094 22:01:39.161571 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 22:01:39.167100 [0.018961 Inits done]
1096 22:01:39.167584 secure task start!
1097 22:01:39.168031 high task start!
1098 22:01:39.171696 low task start!
1099 22:01:39.172211 run into bl31
1100 22:01:39.178356 NOTICE: BL31: v1.3(release):4fc40b1
1101 22:01:39.186140 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 22:01:39.186632 NOTICE: BL31: G12A normal boot!
1103 22:01:39.211599 NOTICE: BL31: BL33 decompress pass
1104 22:01:39.217256 ERROR: Error initializing runtime service opteed_fast
1105 22:01:40.450194
1106 22:01:40.450830
1107 22:01:40.458493 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 22:01:40.459006
1109 22:01:40.459434 Model: Libre Computer AML-A311D-CC Alta
1110 22:01:40.667023 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 22:01:40.690329 DRAM: 2 GiB (effective 3.8 GiB)
1112 22:01:40.833339 Core: 408 devices, 31 uclasses, devicetree: separate
1113 22:01:40.839184 WDT: Not starting watchdog@f0d0
1114 22:01:40.871457 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 22:01:40.884084 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 22:01:40.888903 ** Bad device specification mmc 0 **
1117 22:01:40.899237 Card did not respond to voltage select! : -110
1118 22:01:40.906883 ** Bad device specification mmc 0 **
1119 22:01:40.907375 Couldn't find partition mmc 0
1120 22:01:40.915238 Card did not respond to voltage select! : -110
1121 22:01:40.920753 ** Bad device specification mmc 0 **
1122 22:01:40.921381 Couldn't find partition mmc 0
1123 22:01:40.925877 Error: could not access storage.
1124 22:01:41.268302 Net: eth0: ethernet@ff3f0000
1125 22:01:41.268932 starting USB...
1126 22:01:41.520114 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 22:01:41.520723 Starting the controller
1128 22:01:41.527088 USB XHCI 1.10
1129 22:01:43.081129 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 22:01:43.089371 scanning usb for storage devices... 0 Storage Device(s) found
1132 22:01:43.141116 Hit any key to stop autoboot: 1
1133 22:01:43.142051 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1134 22:01:43.142638 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1135 22:01:43.143113 Setting prompt string to ['=>']
1136 22:01:43.143598 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1137 22:01:43.156780 0
1138 22:01:43.157708 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 22:01:43.158209 Sending with 10 millisecond of delay
1141 22:01:44.293266 => setenv autoload no
1142 22:01:44.304106 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1143 22:01:44.309122 setenv autoload no
1144 22:01:44.309940 Sending with 10 millisecond of delay
1146 22:01:46.106566 => setenv initrd_high 0xffffffff
1147 22:01:46.117353 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1148 22:01:46.118164 setenv initrd_high 0xffffffff
1149 22:01:46.118887 Sending with 10 millisecond of delay
1151 22:01:47.734750 => setenv fdt_high 0xffffffff
1152 22:01:47.745425 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1153 22:01:47.746196 setenv fdt_high 0xffffffff
1154 22:01:47.746891 Sending with 10 millisecond of delay
1156 22:01:48.038613 => dhcp
1157 22:01:48.049211 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1158 22:01:48.049942 dhcp
1159 22:01:48.050372 Speed: 1000, full duplex
1160 22:01:48.050783 BOOTP broadcast 1
1161 22:01:48.251719 DHCP client bound to address 192.168.6.27 (202 ms)
1162 22:01:48.252476 Sending with 10 millisecond of delay
1164 22:01:49.928521 => setenv serverip 192.168.6.2
1165 22:01:49.939227 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1166 22:01:49.940044 setenv serverip 192.168.6.2
1167 22:01:49.940759 Sending with 10 millisecond of delay
1169 22:01:53.663091 => tftpboot 0x01080000 942752/tftp-deploy-e9418_dp/kernel/uImage
1170 22:01:53.673860 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 22:01:53.674702 tftpboot 0x01080000 942752/tftp-deploy-e9418_dp/kernel/uImage
1172 22:01:53.675119 Speed: 1000, full duplex
1173 22:01:53.675510 Using ethernet@ff3f0000 device
1174 22:01:53.676697 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 22:01:53.682270 Filename '942752/tftp-deploy-e9418_dp/kernel/uImage'.
1176 22:01:53.686122 Load address: 0x1080000
1177 22:01:56.452808 Loading: *################################################## 43.6 MiB
1178 22:01:56.453437 15.7 MiB/s
1179 22:01:56.453870 done
1180 22:01:56.457394 Bytes transferred = 45713984 (2b98a40 hex)
1181 22:01:56.458163 Sending with 10 millisecond of delay
1183 22:02:01.143379 => tftpboot 0x08000000 942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
1184 22:02:01.154107 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1185 22:02:01.154942 tftpboot 0x08000000 942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot
1186 22:02:01.155480 Speed: 1000, full duplex
1187 22:02:01.155893 Using ethernet@ff3f0000 device
1188 22:02:01.157095 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 22:02:01.168931 Filename '942752/tftp-deploy-e9418_dp/ramdisk/ramdisk.cpio.gz.uboot'.
1190 22:02:01.169419 Load address: 0x8000000
1191 22:02:07.889550 Loading: *##################T ############################### UDP wrong checksum 00000005 0000fcce
1192 22:02:12.890234 T UDP wrong checksum 00000005 0000fcce
1193 22:02:22.893232 T T UDP wrong checksum 00000005 0000fcce
1194 22:02:42.896997 T T T T UDP wrong checksum 00000005 0000fcce
1195 22:02:57.901303 T T
1196 22:02:57.901718 Retry count exceeded; starting again
1198 22:02:57.905022 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1201 22:02:57.906804 end: 2.4 uboot-commands (duration 00:01:52) [common]
1203 22:02:57.908233 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1205 22:02:57.909264 end: 2 uboot-action (duration 00:01:52) [common]
1207 22:02:57.910791 Cleaning after the job
1208 22:02:57.911400 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/ramdisk
1209 22:02:57.912999 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/kernel
1210 22:02:57.956523 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/dtb
1211 22:02:57.957293 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/nfsrootfs
1212 22:02:58.133312 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942752/tftp-deploy-e9418_dp/modules
1213 22:02:58.155880 start: 4.1 power-off (timeout 00:00:30) [common]
1214 22:02:58.156620 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1215 22:02:58.196291 >> OK - accepted request
1216 22:02:58.198353 Returned 0 in 0 seconds
1217 22:02:58.299140 end: 4.1 power-off (duration 00:00:00) [common]
1219 22:02:58.300128 start: 4.2 read-feedback (timeout 00:10:00) [common]
1220 22:02:58.300835 Listened to connection for namespace 'common' for up to 1s
1221 22:02:59.301739 Finalising connection for namespace 'common'
1222 22:02:59.302177 Disconnecting from shell: Finalise
1223 22:02:59.302476 =>
1224 22:02:59.403111 end: 4.2 read-feedback (duration 00:00:01) [common]
1225 22:02:59.403516 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/942752
1226 22:03:02.552196 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/942752
1227 22:03:02.552869 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.