Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 4
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:07:08.192274 lava-dispatcher, installed at version: 2024.01
2 22:07:08.193059 start: 0 validate
3 22:07:08.193538 Start time: 2024-11-05 22:07:08.193508+00:00 (UTC)
4 22:07:08.194074 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:07:08.194622 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:07:08.237524 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:07:08.238067 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:07:08.269847 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:07:08.270461 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:07:08.306347 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:07:08.306879 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:07:08.342487 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:07:08.343356 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-228-ga18dadd1209ac%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:07:08.387718 validate duration: 0.19
16 22:07:08.389232 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:07:08.389822 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:07:08.390405 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:07:08.391380 Not decompressing ramdisk as can be used compressed.
20 22:07:08.392166 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 22:07:08.392677 saving as /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/ramdisk/initrd.cpio.gz
22 22:07:08.393168 total size: 5628169 (5 MB)
23 22:07:08.437983 progress 0 % (0 MB)
24 22:07:08.445798 progress 5 % (0 MB)
25 22:07:08.454123 progress 10 % (0 MB)
26 22:07:08.461440 progress 15 % (0 MB)
27 22:07:08.469327 progress 20 % (1 MB)
28 22:07:08.474448 progress 25 % (1 MB)
29 22:07:08.478554 progress 30 % (1 MB)
30 22:07:08.482804 progress 35 % (1 MB)
31 22:07:08.486517 progress 40 % (2 MB)
32 22:07:08.490587 progress 45 % (2 MB)
33 22:07:08.494292 progress 50 % (2 MB)
34 22:07:08.498374 progress 55 % (2 MB)
35 22:07:08.502412 progress 60 % (3 MB)
36 22:07:08.506125 progress 65 % (3 MB)
37 22:07:08.510220 progress 70 % (3 MB)
38 22:07:08.514079 progress 75 % (4 MB)
39 22:07:08.518113 progress 80 % (4 MB)
40 22:07:08.521783 progress 85 % (4 MB)
41 22:07:08.525870 progress 90 % (4 MB)
42 22:07:08.529593 progress 95 % (5 MB)
43 22:07:08.532930 progress 100 % (5 MB)
44 22:07:08.533604 5 MB downloaded in 0.14 s (38.22 MB/s)
45 22:07:08.534181 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:07:08.535122 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:07:08.535446 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:07:08.535746 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:07:08.536253 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kernel/Image
51 22:07:08.536549 saving as /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/kernel/Image
52 22:07:08.536779 total size: 45713920 (43 MB)
53 22:07:08.537003 No compression specified
54 22:07:08.571739 progress 0 % (0 MB)
55 22:07:08.600577 progress 5 % (2 MB)
56 22:07:08.629175 progress 10 % (4 MB)
57 22:07:08.658170 progress 15 % (6 MB)
58 22:07:08.687072 progress 20 % (8 MB)
59 22:07:08.715416 progress 25 % (10 MB)
60 22:07:08.744226 progress 30 % (13 MB)
61 22:07:08.773723 progress 35 % (15 MB)
62 22:07:08.806577 progress 40 % (17 MB)
63 22:07:08.834858 progress 45 % (19 MB)
64 22:07:08.863464 progress 50 % (21 MB)
65 22:07:08.892575 progress 55 % (24 MB)
66 22:07:08.921127 progress 60 % (26 MB)
67 22:07:08.949538 progress 65 % (28 MB)
68 22:07:08.978485 progress 70 % (30 MB)
69 22:07:09.009504 progress 75 % (32 MB)
70 22:07:09.038460 progress 80 % (34 MB)
71 22:07:09.066873 progress 85 % (37 MB)
72 22:07:09.095743 progress 90 % (39 MB)
73 22:07:09.124639 progress 95 % (41 MB)
74 22:07:09.152586 progress 100 % (43 MB)
75 22:07:09.153146 43 MB downloaded in 0.62 s (70.73 MB/s)
76 22:07:09.153634 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:07:09.154465 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:07:09.154748 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:07:09.155021 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:07:09.155483 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:07:09.155770 saving as /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:07:09.156005 total size: 54703 (0 MB)
84 22:07:09.156222 No compression specified
85 22:07:09.196769 progress 59 % (0 MB)
86 22:07:09.197637 progress 100 % (0 MB)
87 22:07:09.198199 0 MB downloaded in 0.04 s (1.24 MB/s)
88 22:07:09.198668 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:07:09.199494 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:07:09.199761 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:07:09.200053 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:07:09.200512 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 22:07:09.200764 saving as /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/nfsrootfs/full.rootfs.tar
95 22:07:09.200973 total size: 120894716 (115 MB)
96 22:07:09.201187 Using unxz to decompress xz
97 22:07:09.235885 progress 0 % (0 MB)
98 22:07:10.029268 progress 5 % (5 MB)
99 22:07:10.880512 progress 10 % (11 MB)
100 22:07:11.681117 progress 15 % (17 MB)
101 22:07:12.425605 progress 20 % (23 MB)
102 22:07:13.022383 progress 25 % (28 MB)
103 22:07:13.855625 progress 30 % (34 MB)
104 22:07:14.642536 progress 35 % (40 MB)
105 22:07:14.985318 progress 40 % (46 MB)
106 22:07:15.355455 progress 45 % (51 MB)
107 22:07:16.078018 progress 50 % (57 MB)
108 22:07:16.962731 progress 55 % (63 MB)
109 22:07:17.740603 progress 60 % (69 MB)
110 22:07:18.493494 progress 65 % (74 MB)
111 22:07:19.265313 progress 70 % (80 MB)
112 22:07:20.086372 progress 75 % (86 MB)
113 22:07:20.876494 progress 80 % (92 MB)
114 22:07:21.637539 progress 85 % (98 MB)
115 22:07:22.486956 progress 90 % (103 MB)
116 22:07:23.254225 progress 95 % (109 MB)
117 22:07:24.090963 progress 100 % (115 MB)
118 22:07:24.103341 115 MB downloaded in 14.90 s (7.74 MB/s)
119 22:07:24.104061 end: 1.4.1 http-download (duration 00:00:15) [common]
121 22:07:24.105683 end: 1.4 download-retry (duration 00:00:15) [common]
122 22:07:24.106212 start: 1.5 download-retry (timeout 00:09:44) [common]
123 22:07:24.106733 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 22:07:24.107651 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/modules.tar.xz
125 22:07:24.108161 saving as /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/modules/modules.tar
126 22:07:24.108582 total size: 11607644 (11 MB)
127 22:07:24.109005 Using unxz to decompress xz
128 22:07:24.152602 progress 0 % (0 MB)
129 22:07:24.219928 progress 5 % (0 MB)
130 22:07:24.293640 progress 10 % (1 MB)
131 22:07:24.388548 progress 15 % (1 MB)
132 22:07:24.481783 progress 20 % (2 MB)
133 22:07:24.561157 progress 25 % (2 MB)
134 22:07:24.635709 progress 30 % (3 MB)
135 22:07:24.709220 progress 35 % (3 MB)
136 22:07:24.785074 progress 40 % (4 MB)
137 22:07:24.860317 progress 45 % (5 MB)
138 22:07:24.943182 progress 50 % (5 MB)
139 22:07:25.018984 progress 55 % (6 MB)
140 22:07:25.103587 progress 60 % (6 MB)
141 22:07:25.182948 progress 65 % (7 MB)
142 22:07:25.258389 progress 70 % (7 MB)
143 22:07:25.340455 progress 75 % (8 MB)
144 22:07:25.422893 progress 80 % (8 MB)
145 22:07:25.501893 progress 85 % (9 MB)
146 22:07:25.579547 progress 90 % (9 MB)
147 22:07:25.658496 progress 95 % (10 MB)
148 22:07:25.734218 progress 100 % (11 MB)
149 22:07:25.744999 11 MB downloaded in 1.64 s (6.76 MB/s)
150 22:07:25.745888 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:07:25.747664 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:07:25.748273 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 22:07:25.748865 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 22:07:42.508962 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/942757/extract-nfsrootfs-4xv56ole
156 22:07:42.509571 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 22:07:42.509899 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 22:07:42.510595 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw
159 22:07:42.511090 makedir: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin
160 22:07:42.511511 makedir: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/tests
161 22:07:42.511903 makedir: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/results
162 22:07:42.512338 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-add-keys
163 22:07:42.512953 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-add-sources
164 22:07:42.513502 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-background-process-start
165 22:07:42.514083 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-background-process-stop
166 22:07:42.514614 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-common-functions
167 22:07:42.515107 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-echo-ipv4
168 22:07:42.515588 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-install-packages
169 22:07:42.516102 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-installed-packages
170 22:07:42.516593 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-os-build
171 22:07:42.517066 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-probe-channel
172 22:07:42.517536 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-probe-ip
173 22:07:42.518082 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-target-ip
174 22:07:42.518564 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-target-mac
175 22:07:42.519040 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-target-storage
176 22:07:42.519516 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-case
177 22:07:42.520014 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-event
178 22:07:42.520504 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-feedback
179 22:07:42.520976 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-raise
180 22:07:42.521441 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-reference
181 22:07:42.521906 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-runner
182 22:07:42.522383 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-set
183 22:07:42.522850 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-test-shell
184 22:07:42.523326 Updating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-add-keys (debian)
185 22:07:42.523851 Updating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-add-sources (debian)
186 22:07:42.524400 Updating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-install-packages (debian)
187 22:07:42.524900 Updating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-installed-packages (debian)
188 22:07:42.525386 Updating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/bin/lava-os-build (debian)
189 22:07:42.525813 Creating /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/environment
190 22:07:42.526177 LAVA metadata
191 22:07:42.526435 - LAVA_JOB_ID=942757
192 22:07:42.526649 - LAVA_DISPATCHER_IP=192.168.6.2
193 22:07:42.527005 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 22:07:42.527946 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 22:07:42.528282 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 22:07:42.528489 skipped lava-vland-overlay
197 22:07:42.528727 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 22:07:42.528979 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 22:07:42.529195 skipped lava-multinode-overlay
200 22:07:42.529433 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 22:07:42.529681 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 22:07:42.529927 Loading test definitions
203 22:07:42.530202 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 22:07:42.530418 Using /lava-942757 at stage 0
205 22:07:42.531468 uuid=942757_1.6.2.4.1 testdef=None
206 22:07:42.531765 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 22:07:42.532050 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 22:07:42.533655 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 22:07:42.534435 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 22:07:42.536352 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 22:07:42.537169 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 22:07:42.538965 runner path: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/0/tests/0_timesync-off test_uuid 942757_1.6.2.4.1
215 22:07:42.539499 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 22:07:42.540377 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 22:07:42.540601 Using /lava-942757 at stage 0
219 22:07:42.540947 Fetching tests from https://github.com/kernelci/test-definitions.git
220 22:07:42.541237 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/0/tests/1_kselftest-rtc'
221 22:07:45.964928 Running '/usr/bin/git checkout kernelci.org
222 22:07:46.415152 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 22:07:46.417239 uuid=942757_1.6.2.4.5 testdef=None
224 22:07:46.417846 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 22:07:46.419283 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 22:07:46.424670 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 22:07:46.426229 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 22:07:46.433326 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 22:07:46.434952 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 22:07:46.441840 runner path: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/0/tests/1_kselftest-rtc test_uuid 942757_1.6.2.4.5
234 22:07:46.442352 BOARD='meson-g12b-a311d-libretech-cc'
235 22:07:46.442753 BRANCH='broonie-sound'
236 22:07:46.443144 SKIPFILE='/dev/null'
237 22:07:46.443534 SKIP_INSTALL='True'
238 22:07:46.443918 TESTPROG_URL='http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-228-ga18dadd1209ac/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 22:07:46.444352 TST_CASENAME=''
240 22:07:46.444742 TST_CMDFILES='rtc'
241 22:07:46.445691 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 22:07:46.447201 Creating lava-test-runner.conf files
244 22:07:46.447602 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/942757/lava-overlay-2x6k2mlw/lava-942757/0 for stage 0
245 22:07:46.448266 - 0_timesync-off
246 22:07:46.448726 - 1_kselftest-rtc
247 22:07:46.449342 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 22:07:46.449868 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 22:08:09.554115 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 22:08:09.554569 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 22:08:09.554837 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 22:08:09.555113 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 22:08:09.555378 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 22:08:10.164513 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 22:08:10.164992 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 22:08:10.165249 extracting modules file /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942757/extract-nfsrootfs-4xv56ole
257 22:08:11.511145 extracting modules file /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk
258 22:08:12.893976 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 22:08:12.894460 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 22:08:12.894754 [common] Applying overlay to NFS
261 22:08:12.894975 [common] Applying overlay /var/lib/lava/dispatcher/tmp/942757/compress-overlay-wejs1yax/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/942757/extract-nfsrootfs-4xv56ole
262 22:08:15.647327 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 22:08:15.647808 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 22:08:15.648126 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 22:08:15.648363 Converting downloaded kernel to a uImage
266 22:08:15.648673 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/kernel/Image /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/kernel/uImage
267 22:08:16.121078 output: Image Name:
268 22:08:16.121503 output: Created: Tue Nov 5 22:08:15 2024
269 22:08:16.121715 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 22:08:16.121924 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 22:08:16.122127 output: Load Address: 01080000
272 22:08:16.122329 output: Entry Point: 01080000
273 22:08:16.122528 output:
274 22:08:16.122866 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 22:08:16.123137 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 22:08:16.123406 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 22:08:16.123660 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 22:08:16.123919 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 22:08:16.124222 Building ramdisk /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk
280 22:08:18.238904 >> 166792 blocks
281 22:08:25.915817 Adding RAMdisk u-boot header.
282 22:08:25.916573 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk.cpio.gz.uboot
283 22:08:26.188160 output: Image Name:
284 22:08:26.188528 output: Created: Tue Nov 5 22:08:25 2024
285 22:08:26.188742 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 22:08:26.188948 output: Data Size: 23433613 Bytes = 22884.39 KiB = 22.35 MiB
287 22:08:26.189152 output: Load Address: 00000000
288 22:08:26.189353 output: Entry Point: 00000000
289 22:08:26.189553 output:
290 22:08:26.190217 rename /var/lib/lava/dispatcher/tmp/942757/extract-overlay-ramdisk-mhn9rg25/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
291 22:08:26.190649 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 22:08:26.190935 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 22:08:26.191209 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 22:08:26.191449 No LXC device requested
295 22:08:26.191704 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 22:08:26.191963 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 22:08:26.192557 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 22:08:26.193022 Checking files for TFTP limit of 4294967296 bytes.
299 22:08:26.195971 end: 1 tftp-deploy (duration 00:01:18) [common]
300 22:08:26.196674 start: 2 uboot-action (timeout 00:05:00) [common]
301 22:08:26.197260 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 22:08:26.197811 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 22:08:26.198371 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 22:08:26.198955 Using kernel file from prepare-kernel: 942757/tftp-deploy-9j48z7g_/kernel/uImage
305 22:08:26.199655 substitutions:
306 22:08:26.200146 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 22:08:26.200603 - {DTB_ADDR}: 0x01070000
308 22:08:26.201047 - {DTB}: 942757/tftp-deploy-9j48z7g_/dtb/meson-g12b-a311d-libretech-cc.dtb
309 22:08:26.201496 - {INITRD}: 942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
310 22:08:26.201942 - {KERNEL_ADDR}: 0x01080000
311 22:08:26.202382 - {KERNEL}: 942757/tftp-deploy-9j48z7g_/kernel/uImage
312 22:08:26.202822 - {LAVA_MAC}: None
313 22:08:26.203301 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/942757/extract-nfsrootfs-4xv56ole
314 22:08:26.203746 - {NFS_SERVER_IP}: 192.168.6.2
315 22:08:26.204217 - {PRESEED_CONFIG}: None
316 22:08:26.204658 - {PRESEED_LOCAL}: None
317 22:08:26.205096 - {RAMDISK_ADDR}: 0x08000000
318 22:08:26.205529 - {RAMDISK}: 942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
319 22:08:26.205968 - {ROOT_PART}: None
320 22:08:26.206397 - {ROOT}: None
321 22:08:26.206827 - {SERVER_IP}: 192.168.6.2
322 22:08:26.207254 - {TEE_ADDR}: 0x83000000
323 22:08:26.207682 - {TEE}: None
324 22:08:26.208135 Parsed boot commands:
325 22:08:26.208560 - setenv autoload no
326 22:08:26.208990 - setenv initrd_high 0xffffffff
327 22:08:26.209421 - setenv fdt_high 0xffffffff
328 22:08:26.209846 - dhcp
329 22:08:26.210270 - setenv serverip 192.168.6.2
330 22:08:26.210702 - tftpboot 0x01080000 942757/tftp-deploy-9j48z7g_/kernel/uImage
331 22:08:26.211138 - tftpboot 0x08000000 942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
332 22:08:26.211572 - tftpboot 0x01070000 942757/tftp-deploy-9j48z7g_/dtb/meson-g12b-a311d-libretech-cc.dtb
333 22:08:26.212025 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/942757/extract-nfsrootfs-4xv56ole,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 22:08:26.212520 - bootm 0x01080000 0x08000000 0x01070000
335 22:08:26.213087 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 22:08:26.214745 start: 2.3 connect-device (timeout 00:05:00) [common]
338 22:08:26.215211 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 22:08:26.232067 Setting prompt string to ['lava-test: # ']
340 22:08:26.233696 end: 2.3 connect-device (duration 00:00:00) [common]
341 22:08:26.234372 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 22:08:26.234984 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 22:08:26.235563 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 22:08:26.236856 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 22:08:26.273720 >> OK - accepted request
346 22:08:26.275707 Returned 0 in 0 seconds
347 22:08:26.376894 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 22:08:26.378580 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 22:08:26.379191 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 22:08:26.379738 Setting prompt string to ['Hit any key to stop autoboot']
352 22:08:26.380313 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 22:08:26.381983 Trying 192.168.56.21...
354 22:08:26.382501 Connected to conserv1.
355 22:08:26.382949 Escape character is '^]'.
356 22:08:26.383403
357 22:08:26.383859 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 22:08:26.384360
359 22:08:38.510745 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 22:08:38.511421 bl2_stage_init 0x01
361 22:08:38.511890 bl2_stage_init 0x81
362 22:08:38.516679 hw id: 0x0000 - pwm id 0x01
363 22:08:38.517179 bl2_stage_init 0xc1
364 22:08:38.517643 bl2_stage_init 0x02
365 22:08:38.518096
366 22:08:38.521996 L0:00000000
367 22:08:38.522494 L1:20000703
368 22:08:38.522947 L2:00008067
369 22:08:38.523396 L3:14000000
370 22:08:38.527535 B2:00402000
371 22:08:38.528050 B1:e0f83180
372 22:08:38.528488
373 22:08:38.528920 TE: 58167
374 22:08:38.529351
375 22:08:38.533341 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 22:08:38.533805
377 22:08:38.534239 Board ID = 1
378 22:08:38.538567 Set A53 clk to 24M
379 22:08:38.539025 Set A73 clk to 24M
380 22:08:38.539452 Set clk81 to 24M
381 22:08:38.544466 A53 clk: 1200 MHz
382 22:08:38.544922 A73 clk: 1200 MHz
383 22:08:38.545352 CLK81: 166.6M
384 22:08:38.545776 smccc: 00012abd
385 22:08:38.550172 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 22:08:38.555542 board id: 1
387 22:08:38.561121 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 22:08:38.571860 fw parse done
389 22:08:38.577805 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:08:38.620193 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 22:08:38.631061 PIEI prepare done
392 22:08:38.631518 fastboot data load
393 22:08:38.631953 fastboot data verify
394 22:08:38.636802 verify result: 266
395 22:08:38.642347 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 22:08:38.642807 LPDDR4 probe
397 22:08:38.643241 ddr clk to 1584MHz
398 22:08:38.650334 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 22:08:38.687552
400 22:08:38.688038 dmc_version 0001
401 22:08:38.694251 Check phy result
402 22:08:38.700138 INFO : End of CA training
403 22:08:38.700610 INFO : End of initialization
404 22:08:38.705728 INFO : Training has run successfully!
405 22:08:38.706186 Check phy result
406 22:08:38.711325 INFO : End of initialization
407 22:08:38.711779 INFO : End of read enable training
408 22:08:38.716914 INFO : End of fine write leveling
409 22:08:38.722508 INFO : End of Write leveling coarse delay
410 22:08:38.722968 INFO : Training has run successfully!
411 22:08:38.723408 Check phy result
412 22:08:38.728137 INFO : End of initialization
413 22:08:38.728605 INFO : End of read dq deskew training
414 22:08:38.733707 INFO : End of MPR read delay center optimization
415 22:08:38.739311 INFO : End of write delay center optimization
416 22:08:38.744912 INFO : End of read delay center optimization
417 22:08:38.745386 INFO : End of max read latency training
418 22:08:38.750533 INFO : Training has run successfully!
419 22:08:38.750989 1D training succeed
420 22:08:38.759699 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 22:08:38.807330 Check phy result
422 22:08:38.807788 INFO : End of initialization
423 22:08:38.828919 INFO : End of 2D read delay Voltage center optimization
424 22:08:38.849012 INFO : End of 2D read delay Voltage center optimization
425 22:08:38.900902 INFO : End of 2D write delay Voltage center optimization
426 22:08:38.950108 INFO : End of 2D write delay Voltage center optimization
427 22:08:38.955773 INFO : Training has run successfully!
428 22:08:38.956281
429 22:08:38.956723 channel==0
430 22:08:38.961293 RxClkDly_Margin_A0==88 ps 9
431 22:08:38.961750 TxDqDly_Margin_A0==98 ps 10
432 22:08:38.966889 RxClkDly_Margin_A1==88 ps 9
433 22:08:38.967341 TxDqDly_Margin_A1==88 ps 9
434 22:08:38.967776 TrainedVREFDQ_A0==74
435 22:08:38.972493 TrainedVREFDQ_A1==74
436 22:08:38.972953 VrefDac_Margin_A0==25
437 22:08:38.973388 DeviceVref_Margin_A0==40
438 22:08:38.978110 VrefDac_Margin_A1==25
439 22:08:38.978564 DeviceVref_Margin_A1==40
440 22:08:38.978995
441 22:08:38.979425
442 22:08:38.979856 channel==1
443 22:08:38.983774 RxClkDly_Margin_A0==98 ps 10
444 22:08:38.984258 TxDqDly_Margin_A0==98 ps 10
445 22:08:38.989943 RxClkDly_Margin_A1==98 ps 10
446 22:08:38.990404 TxDqDly_Margin_A1==88 ps 9
447 22:08:38.994885 TrainedVREFDQ_A0==77
448 22:08:38.995342 TrainedVREFDQ_A1==77
449 22:08:38.995778 VrefDac_Margin_A0==22
450 22:08:39.000509 DeviceVref_Margin_A0==37
451 22:08:39.000967 VrefDac_Margin_A1==23
452 22:08:39.006109 DeviceVref_Margin_A1==37
453 22:08:39.006563
454 22:08:39.007000 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 22:08:39.007434
456 22:08:39.039779 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 22:08:39.040342 2D training succeed
458 22:08:39.045298 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 22:08:39.050894 auto size-- 65535DDR cs0 size: 2048MB
460 22:08:39.051357 DDR cs1 size: 2048MB
461 22:08:39.056483 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 22:08:39.056937 cs0 DataBus test pass
463 22:08:39.062091 cs1 DataBus test pass
464 22:08:39.062543 cs0 AddrBus test pass
465 22:08:39.062978 cs1 AddrBus test pass
466 22:08:39.063408
467 22:08:39.067782 100bdlr_step_size ps== 420
468 22:08:39.068298 result report
469 22:08:39.073284 boot times 0Enable ddr reg access
470 22:08:39.078641 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 22:08:39.092247 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 22:08:39.664094 0.0;M3 CHK:0;cm4_sp_mode 0
473 22:08:39.664622 MVN_1=0x00000000
474 22:08:39.669571 MVN_2=0x00000000
475 22:08:39.675333 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 22:08:39.675797 OPS=0x10
477 22:08:39.676272 ring efuse init
478 22:08:39.676704 chipver efuse init
479 22:08:39.680938 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 22:08:39.686521 [0.018960 Inits done]
481 22:08:39.686979 secure task start!
482 22:08:39.687412 high task start!
483 22:08:39.691098 low task start!
484 22:08:39.691560 run into bl31
485 22:08:39.697774 NOTICE: BL31: v1.3(release):4fc40b1
486 22:08:39.705869 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 22:08:39.706334 NOTICE: BL31: G12A normal boot!
488 22:08:39.731445 NOTICE: BL31: BL33 decompress pass
489 22:08:39.737144 ERROR: Error initializing runtime service opteed_fast
490 22:08:40.970139
491 22:08:40.970710
492 22:08:40.978433 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 22:08:40.978927
494 22:08:40.979381 Model: Libre Computer AML-A311D-CC Alta
495 22:08:41.186817 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 22:08:41.210232 DRAM: 2 GiB (effective 3.8 GiB)
497 22:08:41.353211 Core: 408 devices, 31 uclasses, devicetree: separate
498 22:08:41.359105 WDT: Not starting watchdog@f0d0
499 22:08:41.391336 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 22:08:41.403824 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 22:08:41.408803 ** Bad device specification mmc 0 **
502 22:08:41.419137 Card did not respond to voltage select! : -110
503 22:08:41.426785 ** Bad device specification mmc 0 **
504 22:08:41.427249 Couldn't find partition mmc 0
505 22:08:41.435129 Card did not respond to voltage select! : -110
506 22:08:41.440649 ** Bad device specification mmc 0 **
507 22:08:41.441123 Couldn't find partition mmc 0
508 22:08:41.445716 Error: could not access storage.
509 22:08:42.710785 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 22:08:42.711318 bl2_stage_init 0x01
511 22:08:42.711783 bl2_stage_init 0x81
512 22:08:42.716370 hw id: 0x0000 - pwm id 0x01
513 22:08:42.716843 bl2_stage_init 0xc1
514 22:08:42.717291 bl2_stage_init 0x02
515 22:08:42.717734
516 22:08:42.721967 L0:00000000
517 22:08:42.722431 L1:20000703
518 22:08:42.722871 L2:00008067
519 22:08:42.723307 L3:14000000
520 22:08:42.727576 B2:00402000
521 22:08:42.728073 B1:e0f83180
522 22:08:42.728522
523 22:08:42.728965 TE: 58159
524 22:08:42.729406
525 22:08:42.733203 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 22:08:42.733686
527 22:08:42.734131 Board ID = 1
528 22:08:42.738755 Set A53 clk to 24M
529 22:08:42.739224 Set A73 clk to 24M
530 22:08:42.739673 Set clk81 to 24M
531 22:08:42.744360 A53 clk: 1200 MHz
532 22:08:42.744829 A73 clk: 1200 MHz
533 22:08:42.745271 CLK81: 166.6M
534 22:08:42.745710 smccc: 00012ab5
535 22:08:42.749960 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 22:08:42.755568 board id: 1
537 22:08:42.761434 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 22:08:42.772111 fw parse done
539 22:08:42.778081 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:08:42.820722 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 22:08:42.831593 PIEI prepare done
542 22:08:42.832102 fastboot data load
543 22:08:42.832561 fastboot data verify
544 22:08:42.837315 verify result: 266
545 22:08:42.842847 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 22:08:42.843310 LPDDR4 probe
547 22:08:42.843751 ddr clk to 1584MHz
548 22:08:42.850837 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 22:08:42.888077
550 22:08:42.888546 dmc_version 0001
551 22:08:42.894763 Check phy result
552 22:08:42.900645 INFO : End of CA training
553 22:08:42.901104 INFO : End of initialization
554 22:08:42.906317 INFO : Training has run successfully!
555 22:08:42.906784 Check phy result
556 22:08:42.911838 INFO : End of initialization
557 22:08:42.912339 INFO : End of read enable training
558 22:08:42.917444 INFO : End of fine write leveling
559 22:08:42.923041 INFO : End of Write leveling coarse delay
560 22:08:42.923505 INFO : Training has run successfully!
561 22:08:42.923951 Check phy result
562 22:08:42.928632 INFO : End of initialization
563 22:08:42.929100 INFO : End of read dq deskew training
564 22:08:42.934305 INFO : End of MPR read delay center optimization
565 22:08:42.939846 INFO : End of write delay center optimization
566 22:08:42.945438 INFO : End of read delay center optimization
567 22:08:42.945904 INFO : End of max read latency training
568 22:08:42.951048 INFO : Training has run successfully!
569 22:08:42.951510 1D training succeed
570 22:08:42.960255 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 22:08:43.007817 Check phy result
572 22:08:43.008325 INFO : End of initialization
573 22:08:43.030396 INFO : End of 2D read delay Voltage center optimization
574 22:08:43.050635 INFO : End of 2D read delay Voltage center optimization
575 22:08:43.102658 INFO : End of 2D write delay Voltage center optimization
576 22:08:43.152065 INFO : End of 2D write delay Voltage center optimization
577 22:08:43.157603 INFO : Training has run successfully!
578 22:08:43.158069
579 22:08:43.158520 channel==0
580 22:08:43.163204 RxClkDly_Margin_A0==88 ps 9
581 22:08:43.163666 TxDqDly_Margin_A0==98 ps 10
582 22:08:43.168813 RxClkDly_Margin_A1==88 ps 9
583 22:08:43.169278 TxDqDly_Margin_A1==98 ps 10
584 22:08:43.169725 TrainedVREFDQ_A0==74
585 22:08:43.174402 TrainedVREFDQ_A1==74
586 22:08:43.174870 VrefDac_Margin_A0==24
587 22:08:43.175313 DeviceVref_Margin_A0==40
588 22:08:43.180030 VrefDac_Margin_A1==24
589 22:08:43.180499 DeviceVref_Margin_A1==40
590 22:08:43.180944
591 22:08:43.181385
592 22:08:43.185607 channel==1
593 22:08:43.186074 RxClkDly_Margin_A0==98 ps 10
594 22:08:43.186517 TxDqDly_Margin_A0==98 ps 10
595 22:08:43.191196 RxClkDly_Margin_A1==88 ps 9
596 22:08:43.191663 TxDqDly_Margin_A1==88 ps 9
597 22:08:43.196775 TrainedVREFDQ_A0==77
598 22:08:43.197247 TrainedVREFDQ_A1==77
599 22:08:43.197694 VrefDac_Margin_A0==22
600 22:08:43.202395 DeviceVref_Margin_A0==37
601 22:08:43.202853 VrefDac_Margin_A1==24
602 22:08:43.208044 DeviceVref_Margin_A1==37
603 22:08:43.208546
604 22:08:43.208997 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 22:08:43.209442
606 22:08:43.241607 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 22:08:43.242117 2D training succeed
608 22:08:43.247193 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 22:08:43.252811 auto size-- 65535DDR cs0 size: 2048MB
610 22:08:43.253309 DDR cs1 size: 2048MB
611 22:08:43.258407 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 22:08:43.258883 cs0 DataBus test pass
613 22:08:43.264035 cs1 DataBus test pass
614 22:08:43.264518 cs0 AddrBus test pass
615 22:08:43.264962 cs1 AddrBus test pass
616 22:08:43.265402
617 22:08:43.269611 100bdlr_step_size ps== 420
618 22:08:43.270095 result report
619 22:08:43.275212 boot times 0Enable ddr reg access
620 22:08:43.280563 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 22:08:43.294037 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 22:08:43.867901 0.0;M3 CHK:0;cm4_sp_mode 0
623 22:08:43.868444 MVN_1=0x00000000
624 22:08:43.873358 MVN_2=0x00000000
625 22:08:43.879269 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 22:08:43.879784 OPS=0x10
627 22:08:43.880318 ring efuse init
628 22:08:43.880782 chipver efuse init
629 22:08:43.887528 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 22:08:43.888049 [0.018961 Inits done]
631 22:08:43.888482 secure task start!
632 22:08:43.894994 high task start!
633 22:08:43.895458 low task start!
634 22:08:43.895885 run into bl31
635 22:08:43.901541 NOTICE: BL31: v1.3(release):4fc40b1
636 22:08:43.909373 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 22:08:43.909836 NOTICE: BL31: G12A normal boot!
638 22:08:43.934738 NOTICE: BL31: BL33 decompress pass
639 22:08:43.940466 ERROR: Error initializing runtime service opteed_fast
640 22:08:45.173646
641 22:08:45.174330
642 22:08:45.181827 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 22:08:45.182329
644 22:08:45.182789 Model: Libre Computer AML-A311D-CC Alta
645 22:08:45.390149 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 22:08:45.413553 DRAM: 2 GiB (effective 3.8 GiB)
647 22:08:45.556560 Core: 408 devices, 31 uclasses, devicetree: separate
648 22:08:45.562327 WDT: Not starting watchdog@f0d0
649 22:08:45.594600 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 22:08:45.607030 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 22:08:45.612084 ** Bad device specification mmc 0 **
652 22:08:45.622336 Card did not respond to voltage select! : -110
653 22:08:45.630035 ** Bad device specification mmc 0 **
654 22:08:45.630567 Couldn't find partition mmc 0
655 22:08:45.638322 Card did not respond to voltage select! : -110
656 22:08:45.643841 ** Bad device specification mmc 0 **
657 22:08:45.644398 Couldn't find partition mmc 0
658 22:08:45.648926 Error: could not access storage.
659 22:08:45.992495 Net: eth0: ethernet@ff3f0000
660 22:08:45.993048 starting USB...
661 22:08:46.244428 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 22:08:46.244961 Starting the controller
663 22:08:46.251345 USB XHCI 1.10
664 22:08:47.960904 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 22:08:47.961511 bl2_stage_init 0x01
666 22:08:47.961983 bl2_stage_init 0x81
667 22:08:47.966490 hw id: 0x0000 - pwm id 0x01
668 22:08:47.966976 bl2_stage_init 0xc1
669 22:08:47.967427 bl2_stage_init 0x02
670 22:08:47.967873
671 22:08:47.972023 L0:00000000
672 22:08:47.972506 L1:20000703
673 22:08:47.972957 L2:00008067
674 22:08:47.973394 L3:14000000
675 22:08:47.974954 B2:00402000
676 22:08:47.975429 B1:e0f83180
677 22:08:47.975875
678 22:08:47.976353 TE: 58167
679 22:08:47.976799
680 22:08:47.986196 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 22:08:47.986678
682 22:08:47.987130 Board ID = 1
683 22:08:47.987573 Set A53 clk to 24M
684 22:08:47.988039 Set A73 clk to 24M
685 22:08:47.991688 Set clk81 to 24M
686 22:08:47.992188 A53 clk: 1200 MHz
687 22:08:47.992637 A73 clk: 1200 MHz
688 22:08:47.997374 CLK81: 166.6M
689 22:08:47.997846 smccc: 00012abe
690 22:08:48.002930 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 22:08:48.003402 board id: 1
692 22:08:48.011509 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 22:08:48.022223 fw parse done
694 22:08:48.028139 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:08:48.070561 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 22:08:48.081443 PIEI prepare done
697 22:08:48.081920 fastboot data load
698 22:08:48.082373 fastboot data verify
699 22:08:48.087154 verify result: 266
700 22:08:48.092707 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 22:08:48.093180 LPDDR4 probe
702 22:08:48.093625 ddr clk to 1584MHz
703 22:08:48.100683 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 22:08:48.137925
705 22:08:48.138399 dmc_version 0001
706 22:08:48.144611 Check phy result
707 22:08:48.150505 INFO : End of CA training
708 22:08:48.150971 INFO : End of initialization
709 22:08:48.156112 INFO : Training has run successfully!
710 22:08:48.156582 Check phy result
711 22:08:48.161688 INFO : End of initialization
712 22:08:48.162155 INFO : End of read enable training
713 22:08:48.165026 INFO : End of fine write leveling
714 22:08:48.170626 INFO : End of Write leveling coarse delay
715 22:08:48.176210 INFO : Training has run successfully!
716 22:08:48.176675 Check phy result
717 22:08:48.177124 INFO : End of initialization
718 22:08:48.181805 INFO : End of read dq deskew training
719 22:08:48.187395 INFO : End of MPR read delay center optimization
720 22:08:48.187869 INFO : End of write delay center optimization
721 22:08:48.193017 INFO : End of read delay center optimization
722 22:08:48.198596 INFO : End of max read latency training
723 22:08:48.199065 INFO : Training has run successfully!
724 22:08:48.204220 1D training succeed
725 22:08:48.210095 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 22:08:48.257664 Check phy result
727 22:08:48.258170 INFO : End of initialization
728 22:08:48.279436 INFO : End of 2D read delay Voltage center optimization
729 22:08:48.299760 INFO : End of 2D read delay Voltage center optimization
730 22:08:48.351714 INFO : End of 2D write delay Voltage center optimization
731 22:08:48.401084 INFO : End of 2D write delay Voltage center optimization
732 22:08:48.406677 INFO : Training has run successfully!
733 22:08:48.407146
734 22:08:48.407596 channel==0
735 22:08:48.412297 RxClkDly_Margin_A0==88 ps 9
736 22:08:48.412770 TxDqDly_Margin_A0==98 ps 10
737 22:08:48.417881 RxClkDly_Margin_A1==88 ps 9
738 22:08:48.418348 TxDqDly_Margin_A1==98 ps 10
739 22:08:48.418797 TrainedVREFDQ_A0==74
740 22:08:48.423481 TrainedVREFDQ_A1==75
741 22:08:48.423952 VrefDac_Margin_A0==25
742 22:08:48.424429 DeviceVref_Margin_A0==40
743 22:08:48.429089 VrefDac_Margin_A1==25
744 22:08:48.429552 DeviceVref_Margin_A1==39
745 22:08:48.429996
746 22:08:48.430437
747 22:08:48.434688 channel==1
748 22:08:48.435173 RxClkDly_Margin_A0==98 ps 10
749 22:08:48.435618 TxDqDly_Margin_A0==98 ps 10
750 22:08:48.440298 RxClkDly_Margin_A1==98 ps 10
751 22:08:48.440771 TxDqDly_Margin_A1==88 ps 9
752 22:08:48.445883 TrainedVREFDQ_A0==77
753 22:08:48.446356 TrainedVREFDQ_A1==77
754 22:08:48.446802 VrefDac_Margin_A0==22
755 22:08:48.451472 DeviceVref_Margin_A0==37
756 22:08:48.451941 VrefDac_Margin_A1==24
757 22:08:48.457095 DeviceVref_Margin_A1==37
758 22:08:48.457569
759 22:08:48.458017 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 22:08:48.462683
761 22:08:48.490678 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 22:08:48.491176 2D training succeed
763 22:08:48.496286 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 22:08:48.501875 auto size-- 65535DDR cs0 size: 2048MB
765 22:08:48.502343 DDR cs1 size: 2048MB
766 22:08:48.507484 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 22:08:48.507955 cs0 DataBus test pass
768 22:08:48.513106 cs1 DataBus test pass
769 22:08:48.513578 cs0 AddrBus test pass
770 22:08:48.514021 cs1 AddrBus test pass
771 22:08:48.514461
772 22:08:48.518682 100bdlr_step_size ps== 420
773 22:08:48.519168 result report
774 22:08:48.524287 boot times 0Enable ddr reg access
775 22:08:48.529705 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 22:08:48.543213 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 22:08:49.116831 0.0;M3 CHK:0;cm4_sp_mode 0
778 22:08:49.117398 MVN_1=0x00000000
779 22:08:49.122316 MVN_2=0x00000000
780 22:08:49.128140 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 22:08:49.128661 OPS=0x10
782 22:08:49.129102 ring efuse init
783 22:08:49.129528 chipver efuse init
784 22:08:49.133654 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 22:08:49.139247 [0.018960 Inits done]
786 22:08:49.139709 secure task start!
787 22:08:49.140198 high task start!
788 22:08:49.143827 low task start!
789 22:08:49.144315 run into bl31
790 22:08:49.150523 NOTICE: BL31: v1.3(release):4fc40b1
791 22:08:49.158321 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 22:08:49.158785 NOTICE: BL31: G12A normal boot!
793 22:08:49.183699 NOTICE: BL31: BL33 decompress pass
794 22:08:49.189365 ERROR: Error initializing runtime service opteed_fast
795 22:08:50.422348
796 22:08:50.422998
797 22:08:50.430644 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 22:08:50.431127
799 22:08:50.431580 Model: Libre Computer AML-A311D-CC Alta
800 22:08:50.639036 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 22:08:50.662462 DRAM: 2 GiB (effective 3.8 GiB)
802 22:08:50.805454 Core: 408 devices, 31 uclasses, devicetree: separate
803 22:08:50.811390 WDT: Not starting watchdog@f0d0
804 22:08:50.843603 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 22:08:50.856105 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 22:08:50.861064 ** Bad device specification mmc 0 **
807 22:08:50.871407 Card did not respond to voltage select! : -110
808 22:08:50.879053 ** Bad device specification mmc 0 **
809 22:08:50.879525 Couldn't find partition mmc 0
810 22:08:50.887398 Card did not respond to voltage select! : -110
811 22:08:50.892913 ** Bad device specification mmc 0 **
812 22:08:50.893388 Couldn't find partition mmc 0
813 22:08:50.897971 Error: could not access storage.
814 22:08:51.240478 Net: eth0: ethernet@ff3f0000
815 22:08:51.240990 starting USB...
816 22:08:51.492204 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 22:08:51.492705 Starting the controller
818 22:08:51.499201 USB XHCI 1.10
819 22:08:53.661132 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 22:08:53.661713 bl2_stage_init 0x01
821 22:08:53.662175 bl2_stage_init 0x81
822 22:08:53.666747 hw id: 0x0000 - pwm id 0x01
823 22:08:53.667227 bl2_stage_init 0xc1
824 22:08:53.667679 bl2_stage_init 0x02
825 22:08:53.668195
826 22:08:53.672299 L0:00000000
827 22:08:53.672777 L1:20000703
828 22:08:53.673220 L2:00008067
829 22:08:53.673658 L3:14000000
830 22:08:53.677902 B2:00402000
831 22:08:53.678373 B1:e0f83180
832 22:08:53.678815
833 22:08:53.679257 TE: 58159
834 22:08:53.679701
835 22:08:53.683571 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 22:08:53.684077
837 22:08:53.684535 Board ID = 1
838 22:08:53.689143 Set A53 clk to 24M
839 22:08:53.689616 Set A73 clk to 24M
840 22:08:53.690056 Set clk81 to 24M
841 22:08:53.694673 A53 clk: 1200 MHz
842 22:08:53.695139 A73 clk: 1200 MHz
843 22:08:53.695583 CLK81: 166.6M
844 22:08:53.696053 smccc: 00012ab5
845 22:08:53.700288 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 22:08:53.705888 board id: 1
847 22:08:53.711849 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 22:08:53.722256 fw parse done
849 22:08:53.728203 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:08:53.770841 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 22:08:53.781774 PIEI prepare done
852 22:08:53.782244 fastboot data load
853 22:08:53.782689 fastboot data verify
854 22:08:53.787445 verify result: 266
855 22:08:53.793009 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 22:08:53.793477 LPDDR4 probe
857 22:08:53.793922 ddr clk to 1584MHz
858 22:08:53.800999 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 22:08:53.838238
860 22:08:53.838708 dmc_version 0001
861 22:08:53.844916 Check phy result
862 22:08:53.850805 INFO : End of CA training
863 22:08:53.851278 INFO : End of initialization
864 22:08:53.856396 INFO : Training has run successfully!
865 22:08:53.856865 Check phy result
866 22:08:53.861965 INFO : End of initialization
867 22:08:53.862429 INFO : End of read enable training
868 22:08:53.867584 INFO : End of fine write leveling
869 22:08:53.873194 INFO : End of Write leveling coarse delay
870 22:08:53.873665 INFO : Training has run successfully!
871 22:08:53.874111 Check phy result
872 22:08:53.878800 INFO : End of initialization
873 22:08:53.879269 INFO : End of read dq deskew training
874 22:08:53.884377 INFO : End of MPR read delay center optimization
875 22:08:53.889980 INFO : End of write delay center optimization
876 22:08:53.895599 INFO : End of read delay center optimization
877 22:08:53.896087 INFO : End of max read latency training
878 22:08:53.901183 INFO : Training has run successfully!
879 22:08:53.901655 1D training succeed
880 22:08:53.910386 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 22:08:53.957953 Check phy result
882 22:08:53.958428 INFO : End of initialization
883 22:08:53.979554 INFO : End of 2D read delay Voltage center optimization
884 22:08:53.999666 INFO : End of 2D read delay Voltage center optimization
885 22:08:54.051562 INFO : End of 2D write delay Voltage center optimization
886 22:08:54.100881 INFO : End of 2D write delay Voltage center optimization
887 22:08:54.106372 INFO : Training has run successfully!
888 22:08:54.106841
889 22:08:54.107290 channel==0
890 22:08:54.111967 RxClkDly_Margin_A0==88 ps 9
891 22:08:54.112470 TxDqDly_Margin_A0==98 ps 10
892 22:08:54.117590 RxClkDly_Margin_A1==88 ps 9
893 22:08:54.118057 TxDqDly_Margin_A1==88 ps 9
894 22:08:54.118522 TrainedVREFDQ_A0==74
895 22:08:54.123208 TrainedVREFDQ_A1==74
896 22:08:54.123718 VrefDac_Margin_A0==25
897 22:08:54.124210 DeviceVref_Margin_A0==40
898 22:08:54.128873 VrefDac_Margin_A1==23
899 22:08:54.129386 DeviceVref_Margin_A1==40
900 22:08:54.129816
901 22:08:54.130246
902 22:08:54.130673 channel==1
903 22:08:54.134375 RxClkDly_Margin_A0==98 ps 10
904 22:08:54.134837 TxDqDly_Margin_A0==98 ps 10
905 22:08:54.139954 RxClkDly_Margin_A1==88 ps 9
906 22:08:54.140453 TxDqDly_Margin_A1==88 ps 9
907 22:08:54.145600 TrainedVREFDQ_A0==77
908 22:08:54.146062 TrainedVREFDQ_A1==77
909 22:08:54.146489 VrefDac_Margin_A0==22
910 22:08:54.151172 DeviceVref_Margin_A0==37
911 22:08:54.151623 VrefDac_Margin_A1==24
912 22:08:54.156843 DeviceVref_Margin_A1==37
913 22:08:54.157296
914 22:08:54.157724 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 22:08:54.158151
916 22:08:54.190368 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
917 22:08:54.190853 2D training succeed
918 22:08:54.196008 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 22:08:54.201582 auto size-- 65535DDR cs0 size: 2048MB
920 22:08:54.202038 DDR cs1 size: 2048MB
921 22:08:54.207165 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 22:08:54.207621 cs0 DataBus test pass
923 22:08:54.212848 cs1 DataBus test pass
924 22:08:54.213297 cs0 AddrBus test pass
925 22:08:54.213722 cs1 AddrBus test pass
926 22:08:54.214144
927 22:08:54.218362 100bdlr_step_size ps== 420
928 22:08:54.218823 result report
929 22:08:54.224012 boot times 0Enable ddr reg access
930 22:08:54.229236 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 22:08:54.242717 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 22:08:54.814702 0.0;M3 CHK:0;cm4_sp_mode 0
933 22:08:54.815253 MVN_1=0x00000000
934 22:08:54.820191 MVN_2=0x00000000
935 22:08:54.825975 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 22:08:54.826450 OPS=0x10
937 22:08:54.826899 ring efuse init
938 22:08:54.827338 chipver efuse init
939 22:08:54.831533 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 22:08:54.837139 [0.018960 Inits done]
941 22:08:54.837615 secure task start!
942 22:08:54.838058 high task start!
943 22:08:54.841716 low task start!
944 22:08:54.842188 run into bl31
945 22:08:54.848380 NOTICE: BL31: v1.3(release):4fc40b1
946 22:08:54.856198 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 22:08:54.856676 NOTICE: BL31: G12A normal boot!
948 22:08:54.882124 NOTICE: BL31: BL33 decompress pass
949 22:08:54.887828 ERROR: Error initializing runtime service opteed_fast
950 22:08:56.120729
951 22:08:56.121279
952 22:08:56.129146 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 22:08:56.129628
954 22:08:56.130089 Model: Libre Computer AML-A311D-CC Alta
955 22:08:56.337492 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 22:08:56.360902 DRAM: 2 GiB (effective 3.8 GiB)
957 22:08:56.503918 Core: 408 devices, 31 uclasses, devicetree: separate
958 22:08:56.509766 WDT: Not starting watchdog@f0d0
959 22:08:56.542018 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 22:08:56.554493 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 22:08:56.559456 ** Bad device specification mmc 0 **
962 22:08:56.569812 Card did not respond to voltage select! : -110
963 22:08:56.577449 ** Bad device specification mmc 0 **
964 22:08:56.577924 Couldn't find partition mmc 0
965 22:08:56.585786 Card did not respond to voltage select! : -110
966 22:08:56.591314 ** Bad device specification mmc 0 **
967 22:08:56.591795 Couldn't find partition mmc 0
968 22:08:56.596360 Error: could not access storage.
969 22:08:56.938802 Net: eth0: ethernet@ff3f0000
970 22:08:56.939279 starting USB...
971 22:08:57.190641 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 22:08:57.191123 Starting the controller
973 22:08:57.197609 USB XHCI 1.10
974 22:08:59.060896 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
975 22:08:59.061423 bl2_stage_init 0x01
976 22:08:59.061879 bl2_stage_init 0x81
977 22:08:59.066469 hw id: 0x0000 - pwm id 0x01
978 22:08:59.066939 bl2_stage_init 0xc1
979 22:08:59.067381 bl2_stage_init 0x02
980 22:08:59.067818
981 22:08:59.072128 L0:00000000
982 22:08:59.072597 L1:20000703
983 22:08:59.073040 L2:00008067
984 22:08:59.073476 L3:14000000
985 22:08:59.074973 B2:00402000
986 22:08:59.075431 B1:e0f83180
987 22:08:59.075873
988 22:08:59.076354 TE: 58167
989 22:08:59.076798
990 22:08:59.086064 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
991 22:08:59.086543
992 22:08:59.086991 Board ID = 1
993 22:08:59.087427 Set A53 clk to 24M
994 22:08:59.087858 Set A73 clk to 24M
995 22:08:59.091768 Set clk81 to 24M
996 22:08:59.092278 A53 clk: 1200 MHz
997 22:08:59.092723 A73 clk: 1200 MHz
998 22:08:59.095313 CLK81: 166.6M
999 22:08:59.095784 smccc: 00012abe
1000 22:08:59.100940 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1001 22:08:59.106428 board id: 1
1002 22:08:59.111703 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 22:08:59.122038 fw parse done
1004 22:08:59.128052 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:08:59.170653 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1006 22:08:59.181623 PIEI prepare done
1007 22:08:59.182079 fastboot data load
1008 22:08:59.182511 fastboot data verify
1009 22:08:59.187193 verify result: 266
1010 22:08:59.192801 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1011 22:08:59.193261 LPDDR4 probe
1012 22:08:59.193688 ddr clk to 1584MHz
1013 22:08:59.200768 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1014 22:08:59.238019
1015 22:08:59.238504 dmc_version 0001
1016 22:08:59.244708 Check phy result
1017 22:08:59.250590 INFO : End of CA training
1018 22:08:59.251043 INFO : End of initialization
1019 22:08:59.256195 INFO : Training has run successfully!
1020 22:08:59.256673 Check phy result
1021 22:08:59.261789 INFO : End of initialization
1022 22:08:59.262288 INFO : End of read enable training
1023 22:08:59.267381 INFO : End of fine write leveling
1024 22:08:59.272993 INFO : End of Write leveling coarse delay
1025 22:08:59.273486 INFO : Training has run successfully!
1026 22:08:59.273937 Check phy result
1027 22:08:59.278595 INFO : End of initialization
1028 22:08:59.279064 INFO : End of read dq deskew training
1029 22:08:59.284191 INFO : End of MPR read delay center optimization
1030 22:08:59.289793 INFO : End of write delay center optimization
1031 22:08:59.295386 INFO : End of read delay center optimization
1032 22:08:59.295858 INFO : End of max read latency training
1033 22:08:59.300983 INFO : Training has run successfully!
1034 22:08:59.301458 1D training succeed
1035 22:08:59.310170 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1036 22:08:59.357728 Check phy result
1037 22:08:59.358200 INFO : End of initialization
1038 22:08:59.379475 INFO : End of 2D read delay Voltage center optimization
1039 22:08:59.399724 INFO : End of 2D read delay Voltage center optimization
1040 22:08:59.451735 INFO : End of 2D write delay Voltage center optimization
1041 22:08:59.501127 INFO : End of 2D write delay Voltage center optimization
1042 22:08:59.506711 INFO : Training has run successfully!
1043 22:08:59.507176
1044 22:08:59.507625 channel==0
1045 22:08:59.512324 RxClkDly_Margin_A0==88 ps 9
1046 22:08:59.512793 TxDqDly_Margin_A0==98 ps 10
1047 22:08:59.517922 RxClkDly_Margin_A1==88 ps 9
1048 22:08:59.518390 TxDqDly_Margin_A1==88 ps 9
1049 22:08:59.518835 TrainedVREFDQ_A0==74
1050 22:08:59.523579 TrainedVREFDQ_A1==74
1051 22:08:59.524076 VrefDac_Margin_A0==25
1052 22:08:59.524522 DeviceVref_Margin_A0==40
1053 22:08:59.529112 VrefDac_Margin_A1==25
1054 22:08:59.529586 DeviceVref_Margin_A1==40
1055 22:08:59.530023
1056 22:08:59.530463
1057 22:08:59.530897 channel==1
1058 22:08:59.534710 RxClkDly_Margin_A0==98 ps 10
1059 22:08:59.535182 TxDqDly_Margin_A0==98 ps 10
1060 22:08:59.540321 RxClkDly_Margin_A1==98 ps 10
1061 22:08:59.540788 TxDqDly_Margin_A1==88 ps 9
1062 22:08:59.545885 TrainedVREFDQ_A0==77
1063 22:08:59.546352 TrainedVREFDQ_A1==77
1064 22:08:59.546791 VrefDac_Margin_A0==22
1065 22:08:59.551493 DeviceVref_Margin_A0==37
1066 22:08:59.551959 VrefDac_Margin_A1==22
1067 22:08:59.557124 DeviceVref_Margin_A1==37
1068 22:08:59.557587
1069 22:08:59.558030 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1070 22:08:59.558466
1071 22:08:59.590728 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1072 22:08:59.591231 2D training succeed
1073 22:08:59.596313 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1074 22:08:59.601914 auto size-- 65535DDR cs0 size: 2048MB
1075 22:08:59.602382 DDR cs1 size: 2048MB
1076 22:08:59.607594 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1077 22:08:59.608097 cs0 DataBus test pass
1078 22:08:59.613109 cs1 DataBus test pass
1079 22:08:59.613576 cs0 AddrBus test pass
1080 22:08:59.614017 cs1 AddrBus test pass
1081 22:08:59.614455
1082 22:08:59.618716 100bdlr_step_size ps== 420
1083 22:08:59.619195 result report
1084 22:08:59.624308 boot times 0Enable ddr reg access
1085 22:08:59.629668 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1086 22:08:59.643171 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1087 22:09:00.216723 0.0;M3 CHK:0;cm4_sp_mode 0
1088 22:09:00.217225 MVN_1=0x00000000
1089 22:09:00.222239 MVN_2=0x00000000
1090 22:09:00.228046 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1091 22:09:00.228549 OPS=0x10
1092 22:09:00.228999 ring efuse init
1093 22:09:00.229439 chipver efuse init
1094 22:09:00.233664 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1095 22:09:00.239215 [0.018961 Inits done]
1096 22:09:00.239690 secure task start!
1097 22:09:00.240165 high task start!
1098 22:09:00.243780 low task start!
1099 22:09:00.244280 run into bl31
1100 22:09:00.250439 NOTICE: BL31: v1.3(release):4fc40b1
1101 22:09:00.258239 NOTICE: BL31: Built : 15:58:17, May 22 2019
1102 22:09:00.258718 NOTICE: BL31: G12A normal boot!
1103 22:09:00.283642 NOTICE: BL31: BL33 decompress pass
1104 22:09:00.289284 ERROR: Error initializing runtime service opteed_fast
1105 22:09:01.522223
1106 22:09:01.522779
1107 22:09:01.530597 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1108 22:09:01.531077
1109 22:09:01.531527 Model: Libre Computer AML-A311D-CC Alta
1110 22:09:01.738987 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1111 22:09:01.762513 DRAM: 2 GiB (effective 3.8 GiB)
1112 22:09:01.905382 Core: 408 devices, 31 uclasses, devicetree: separate
1113 22:09:01.911265 WDT: Not starting watchdog@f0d0
1114 22:09:01.943495 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1115 22:09:01.955977 Loading Environment from FAT... Card did not respond to voltage select! : -110
1116 22:09:01.960977 ** Bad device specification mmc 0 **
1117 22:09:01.971303 Card did not respond to voltage select! : -110
1118 22:09:01.978948 ** Bad device specification mmc 0 **
1119 22:09:01.979421 Couldn't find partition mmc 0
1120 22:09:01.987294 Card did not respond to voltage select! : -110
1121 22:09:01.992862 ** Bad device specification mmc 0 **
1122 22:09:01.993334 Couldn't find partition mmc 0
1123 22:09:01.997937 Error: could not access storage.
1124 22:09:02.340305 Net: eth0: ethernet@ff3f0000
1125 22:09:02.340818 starting USB...
1126 22:09:02.592077 Bus usb@ff500000: Register 3000140 NbrPorts 3
1127 22:09:02.592577 Starting the controller
1128 22:09:02.599102 USB XHCI 1.10
1129 22:09:04.153314 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1130 22:09:04.161639 scanning usb for storage devices... 0 Storage Device(s) found
1132 22:09:04.213258 Hit any key to stop autoboot: 1
1133 22:09:04.214040 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1134 22:09:04.214646 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1135 22:09:04.215141 Setting prompt string to ['=>']
1136 22:09:04.215658 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1137 22:09:04.229021 0
1138 22:09:04.229916 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1139 22:09:04.230437 Sending with 10 millisecond of delay
1141 22:09:05.365103 => setenv autoload no
1142 22:09:05.375828 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1143 22:09:05.381160 setenv autoload no
1144 22:09:05.381938 Sending with 10 millisecond of delay
1146 22:09:07.178671 => setenv initrd_high 0xffffffff
1147 22:09:07.189364 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1148 22:09:07.190203 setenv initrd_high 0xffffffff
1149 22:09:07.190951 Sending with 10 millisecond of delay
1151 22:09:08.807498 => setenv fdt_high 0xffffffff
1152 22:09:08.818236 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1153 22:09:08.819127 setenv fdt_high 0xffffffff
1154 22:09:08.819829 Sending with 10 millisecond of delay
1156 22:09:09.111741 => dhcp
1157 22:09:09.122530 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1158 22:09:09.123395 dhcp
1159 22:09:09.123832 Speed: 1000, full duplex
1160 22:09:09.124279 BOOTP broadcast 1
1161 22:09:09.132991 DHCP client bound to address 192.168.6.27 (11 ms)
1162 22:09:09.133741 Sending with 10 millisecond of delay
1164 22:09:10.809833 => setenv serverip 192.168.6.2
1165 22:09:10.820637 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1166 22:09:10.821557 setenv serverip 192.168.6.2
1167 22:09:10.822255 Sending with 10 millisecond of delay
1169 22:09:14.544827 => tftpboot 0x01080000 942757/tftp-deploy-9j48z7g_/kernel/uImage
1170 22:09:14.555624 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 22:09:14.556495 tftpboot 0x01080000 942757/tftp-deploy-9j48z7g_/kernel/uImage
1172 22:09:14.556955 Speed: 1000, full duplex
1173 22:09:14.557374 Using ethernet@ff3f0000 device
1174 22:09:14.558305 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1175 22:09:14.563826 Filename '942757/tftp-deploy-9j48z7g_/kernel/uImage'.
1176 22:09:14.567745 Load address: 0x1080000
1177 22:09:17.465029 Loading: *################################################## 43.6 MiB
1178 22:09:17.465694 15 MiB/s
1179 22:09:17.466186 done
1180 22:09:17.469314 Bytes transferred = 45713984 (2b98a40 hex)
1181 22:09:17.470186 Sending with 10 millisecond of delay
1183 22:09:22.156793 => tftpboot 0x08000000 942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
1184 22:09:22.167641 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1185 22:09:22.168577 tftpboot 0x08000000 942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot
1186 22:09:22.169078 Speed: 1000, full duplex
1187 22:09:22.169541 Using ethernet@ff3f0000 device
1188 22:09:22.170585 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1189 22:09:22.182231 Filename '942757/tftp-deploy-9j48z7g_/ramdisk/ramdisk.cpio.gz.uboot'.
1190 22:09:22.182694 Load address: 0x8000000
1191 22:09:29.109857 Loading: *########################T ######################### UDP wrong checksum 00000005 00007eb4
1192 22:09:34.110197 T UDP wrong checksum 00000005 00007eb4
1193 22:09:44.113284 T T UDP wrong checksum 00000005 00007eb4
1194 22:10:04.116769 T T T T UDP wrong checksum 00000005 00007eb4
1195 22:10:15.762941 T T Connection closed by foreign host.
1197 22:10:15.765316 end: 2.4.3 bootloader-commands (duration 00:01:12) [common]
1200 22:10:15.767440 end: 2.4 uboot-commands (duration 00:01:50) [common]
1202 22:10:15.769007 uboot-action failed: 1 of 1 attempts. 'Connection closed'
1204 22:10:15.770164 end: 2 uboot-action (duration 00:01:50) [common]
1206 22:10:15.771814 Cleaning after the job
1207 22:10:15.772454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/ramdisk
1208 22:10:15.773958 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/kernel
1209 22:10:15.820708 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/dtb
1210 22:10:15.821632 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/nfsrootfs
1211 22:10:15.986117 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/942757/tftp-deploy-9j48z7g_/modules
1212 22:10:16.005100 start: 4.1 power-off (timeout 00:00:30) [common]
1213 22:10:16.005750 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1214 22:10:16.034612 >> curl: (7) Failed to connect to conserv1.mayfield.sirena.org.uk port 16421 after 2 ms: Couldn't connect to server
1215 22:10:16.036335 Returned 7 in 0 seconds
1216 22:10:16.036606 Unable to run '['curl', 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01']'
1218 22:10:16.037228 end: 4.1 power-off (duration 00:00:00) [common]
1220 22:10:16.038018 Failed to run 'finalize': Unable to power-off: 'curl http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix\&port=alta-01' failed
1222 22:10:16.150799 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/942757
1223 22:10:19.436765 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/942757
1224 22:10:19.437409 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.