Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:41:19.546085 lava-dispatcher, installed at version: 2024.01
2 23:41:19.546898 start: 0 validate
3 23:41:19.547372 Start time: 2024-11-06 23:41:19.547343+00:00 (UTC)
4 23:41:19.547919 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:41:19.548477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:41:19.589856 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:41:19.590416 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:41:19.622547 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:41:19.623185 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:41:19.650544 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:41:19.651051 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:41:19.685264 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:41:19.685788 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fbroonie-sound%2Ffor-next%2Fasoc-fix-v6.12-rc5-230-g1aed5b247ee28%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:41:19.722561 validate duration: 0.18
16 23:41:19.723487 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:41:19.723844 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:41:19.724218 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:41:19.724818 Not decompressing ramdisk as can be used compressed.
20 23:41:19.725270 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 23:41:19.725562 saving as /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/ramdisk/initrd.cpio.gz
22 23:41:19.725842 total size: 5628182 (5 MB)
23 23:41:19.765537 progress 0 % (0 MB)
24 23:41:19.770086 progress 5 % (0 MB)
25 23:41:19.774764 progress 10 % (0 MB)
26 23:41:19.778768 progress 15 % (0 MB)
27 23:41:19.783434 progress 20 % (1 MB)
28 23:41:19.787352 progress 25 % (1 MB)
29 23:41:19.791993 progress 30 % (1 MB)
30 23:41:19.796630 progress 35 % (1 MB)
31 23:41:19.800579 progress 40 % (2 MB)
32 23:41:19.805196 progress 45 % (2 MB)
33 23:41:19.809183 progress 50 % (2 MB)
34 23:41:19.813730 progress 55 % (2 MB)
35 23:41:19.818226 progress 60 % (3 MB)
36 23:41:19.824231 progress 65 % (3 MB)
37 23:41:19.828631 progress 70 % (3 MB)
38 23:41:19.832390 progress 75 % (4 MB)
39 23:41:19.836666 progress 80 % (4 MB)
40 23:41:19.841067 progress 85 % (4 MB)
41 23:41:19.846678 progress 90 % (4 MB)
42 23:41:19.850784 progress 95 % (5 MB)
43 23:41:19.854146 progress 100 % (5 MB)
44 23:41:19.854832 5 MB downloaded in 0.13 s (41.62 MB/s)
45 23:41:19.855392 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:41:19.856328 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:41:19.856629 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:41:19.856907 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:41:19.857395 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/kernel/Image
51 23:41:19.857679 saving as /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/kernel/Image
52 23:41:19.857892 total size: 45713920 (43 MB)
53 23:41:19.858103 No compression specified
54 23:41:19.897543 progress 0 % (0 MB)
55 23:41:19.927109 progress 5 % (2 MB)
56 23:41:19.957279 progress 10 % (4 MB)
57 23:41:19.986975 progress 15 % (6 MB)
58 23:41:20.017021 progress 20 % (8 MB)
59 23:41:20.046700 progress 25 % (10 MB)
60 23:41:20.076887 progress 30 % (13 MB)
61 23:41:20.106814 progress 35 % (15 MB)
62 23:41:20.137418 progress 40 % (17 MB)
63 23:41:20.169524 progress 45 % (19 MB)
64 23:41:20.199215 progress 50 % (21 MB)
65 23:41:20.228852 progress 55 % (24 MB)
66 23:41:20.258773 progress 60 % (26 MB)
67 23:41:20.287744 progress 65 % (28 MB)
68 23:41:20.317953 progress 70 % (30 MB)
69 23:41:20.347620 progress 75 % (32 MB)
70 23:41:20.377400 progress 80 % (34 MB)
71 23:41:20.406960 progress 85 % (37 MB)
72 23:41:20.436919 progress 90 % (39 MB)
73 23:41:20.467072 progress 95 % (41 MB)
74 23:41:20.496290 progress 100 % (43 MB)
75 23:41:20.496851 43 MB downloaded in 0.64 s (68.23 MB/s)
76 23:41:20.497339 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:41:20.498166 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:41:20.498447 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:41:20.498718 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:41:20.499189 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:41:20.499447 saving as /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:41:20.499657 total size: 54703 (0 MB)
84 23:41:20.499866 No compression specified
85 23:41:20.544112 progress 59 % (0 MB)
86 23:41:20.544967 progress 100 % (0 MB)
87 23:41:20.545519 0 MB downloaded in 0.05 s (1.14 MB/s)
88 23:41:20.545995 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:41:20.546819 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:41:20.547087 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:41:20.547356 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:41:20.547821 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 23:41:20.548108 saving as /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/nfsrootfs/full.rootfs.tar
95 23:41:20.548319 total size: 107552908 (102 MB)
96 23:41:20.548653 Using unxz to decompress xz
97 23:41:20.585793 progress 0 % (0 MB)
98 23:41:21.236154 progress 5 % (5 MB)
99 23:41:21.964412 progress 10 % (10 MB)
100 23:41:22.694817 progress 15 % (15 MB)
101 23:41:23.449870 progress 20 % (20 MB)
102 23:41:24.019502 progress 25 % (25 MB)
103 23:41:24.636817 progress 30 % (30 MB)
104 23:41:25.372379 progress 35 % (35 MB)
105 23:41:25.733971 progress 40 % (41 MB)
106 23:41:26.164324 progress 45 % (46 MB)
107 23:41:26.870117 progress 50 % (51 MB)
108 23:41:27.559159 progress 55 % (56 MB)
109 23:41:28.357884 progress 60 % (61 MB)
110 23:41:29.129013 progress 65 % (66 MB)
111 23:41:29.868431 progress 70 % (71 MB)
112 23:41:30.639947 progress 75 % (76 MB)
113 23:41:31.333475 progress 80 % (82 MB)
114 23:41:32.098916 progress 85 % (87 MB)
115 23:41:32.834523 progress 90 % (92 MB)
116 23:41:33.553749 progress 95 % (97 MB)
117 23:41:34.302087 progress 100 % (102 MB)
118 23:41:34.314017 102 MB downloaded in 13.77 s (7.45 MB/s)
119 23:41:34.314872 end: 1.4.1 http-download (duration 00:00:14) [common]
121 23:41:34.315953 end: 1.4 download-retry (duration 00:00:14) [common]
122 23:41:34.317127 start: 1.5 download-retry (timeout 00:09:45) [common]
123 23:41:34.318180 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 23:41:34.319757 downloading http://storage.kernelci.org/broonie-sound/for-next/asoc-fix-v6.12-rc5-230-g1aed5b247ee28/arm64/defconfig/gcc-12/modules.tar.xz
125 23:41:34.320619 saving as /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/modules/modules.tar
126 23:41:34.321258 total size: 11613904 (11 MB)
127 23:41:34.322145 Using unxz to decompress xz
128 23:41:34.368665 progress 0 % (0 MB)
129 23:41:34.436039 progress 5 % (0 MB)
130 23:41:34.510931 progress 10 % (1 MB)
131 23:41:34.609326 progress 15 % (1 MB)
132 23:41:34.702355 progress 20 % (2 MB)
133 23:41:34.786778 progress 25 % (2 MB)
134 23:41:34.863351 progress 30 % (3 MB)
135 23:41:34.943586 progress 35 % (3 MB)
136 23:41:35.018086 progress 40 % (4 MB)
137 23:41:35.095965 progress 45 % (5 MB)
138 23:41:35.182906 progress 50 % (5 MB)
139 23:41:35.262754 progress 55 % (6 MB)
140 23:41:35.349010 progress 60 % (6 MB)
141 23:41:35.430567 progress 65 % (7 MB)
142 23:41:35.511470 progress 70 % (7 MB)
143 23:41:35.595267 progress 75 % (8 MB)
144 23:41:35.686707 progress 80 % (8 MB)
145 23:41:35.775232 progress 85 % (9 MB)
146 23:41:35.866558 progress 90 % (9 MB)
147 23:41:35.959230 progress 95 % (10 MB)
148 23:41:36.050344 progress 100 % (11 MB)
149 23:41:36.065137 11 MB downloaded in 1.74 s (6.35 MB/s)
150 23:41:36.066202 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:41:36.068141 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:41:36.068745 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 23:41:36.069324 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 23:41:45.940502 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950086/extract-nfsrootfs-tm_5hmmu
156 23:41:45.941110 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 23:41:45.941404 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 23:41:45.942101 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq
159 23:41:45.942588 makedir: /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin
160 23:41:45.942937 makedir: /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/tests
161 23:41:45.943265 makedir: /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/results
162 23:41:45.943605 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-add-keys
163 23:41:45.944171 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-add-sources
164 23:41:45.944704 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-background-process-start
165 23:41:45.945233 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-background-process-stop
166 23:41:45.945799 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-common-functions
167 23:41:45.946322 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-echo-ipv4
168 23:41:45.946857 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-install-packages
169 23:41:45.947394 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-installed-packages
170 23:41:45.947930 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-os-build
171 23:41:45.948505 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-probe-channel
172 23:41:45.949076 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-probe-ip
173 23:41:45.949597 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-target-ip
174 23:41:45.950103 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-target-mac
175 23:41:45.950615 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-target-storage
176 23:41:45.951134 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-case
177 23:41:45.951663 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-event
178 23:41:45.952215 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-feedback
179 23:41:45.952731 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-raise
180 23:41:45.953254 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-reference
181 23:41:45.953773 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-runner
182 23:41:45.954295 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-set
183 23:41:45.954822 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-test-shell
184 23:41:45.955332 Updating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-install-packages (oe)
185 23:41:45.955888 Updating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/bin/lava-installed-packages (oe)
186 23:41:45.956410 Creating /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/environment
187 23:41:45.956807 LAVA metadata
188 23:41:45.957078 - LAVA_JOB_ID=950086
189 23:41:45.957298 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:41:45.957683 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 23:41:45.958731 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:41:45.959069 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 23:41:45.959282 skipped lava-vland-overlay
194 23:41:45.959527 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:41:45.959785 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 23:41:45.960037 skipped lava-multinode-overlay
197 23:41:45.960296 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:41:45.960555 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 23:41:45.960812 Loading test definitions
200 23:41:45.961094 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 23:41:45.961322 Using /lava-950086 at stage 0
202 23:41:45.962573 uuid=950086_1.6.2.4.1 testdef=None
203 23:41:45.962899 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:41:45.963171 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 23:41:45.965080 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:41:45.965896 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 23:41:45.968417 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:41:45.969289 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 23:41:45.971545 runner path: /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/0/tests/0_dmesg test_uuid 950086_1.6.2.4.1
212 23:41:45.972227 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:41:45.973014 Creating lava-test-runner.conf files
215 23:41:45.973222 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950086/lava-overlay-caua41eq/lava-950086/0 for stage 0
216 23:41:45.973589 - 0_dmesg
217 23:41:45.973948 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:41:45.974231 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 23:41:45.996246 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:41:45.996693 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 23:41:45.996961 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:41:45.997236 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:41:45.997506 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 23:41:46.646889 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:41:46.647367 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 23:41:46.647644 extracting modules file /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950086/extract-nfsrootfs-tm_5hmmu
227 23:41:48.090882 extracting modules file /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk
228 23:41:49.602751 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:41:49.603247 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 23:41:49.603529 [common] Applying overlay to NFS
231 23:41:49.603746 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950086/compress-overlay-wtz39qi9/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950086/extract-nfsrootfs-tm_5hmmu
232 23:41:49.635414 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:41:49.635874 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 23:41:49.636207 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 23:41:49.636459 Converting downloaded kernel to a uImage
236 23:41:49.636810 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/kernel/Image /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/kernel/uImage
237 23:41:50.110765 output: Image Name:
238 23:41:50.111201 output: Created: Wed Nov 6 23:41:49 2024
239 23:41:50.111413 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:41:50.111614 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:41:50.111817 output: Load Address: 01080000
242 23:41:50.112049 output: Entry Point: 01080000
243 23:41:50.112254 output:
244 23:41:50.112598 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:41:50.112873 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:41:50.113147 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 23:41:50.113403 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:41:50.113660 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 23:41:50.113932 Building ramdisk /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk
250 23:41:52.672289 >> 166792 blocks
251 23:42:00.510729 Adding RAMdisk u-boot header.
252 23:42:00.511360 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk.cpio.gz.uboot
253 23:42:00.759331 output: Image Name:
254 23:42:00.759741 output: Created: Wed Nov 6 23:42:00 2024
255 23:42:00.759958 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:42:00.760420 output: Data Size: 23432263 Bytes = 22883.07 KiB = 22.35 MiB
257 23:42:00.760868 output: Load Address: 00000000
258 23:42:00.761306 output: Entry Point: 00000000
259 23:42:00.761738 output:
260 23:42:00.762841 rename /var/lib/lava/dispatcher/tmp/950086/extract-overlay-ramdisk-0o8zlfzw/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
261 23:42:00.763715 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 23:42:00.764382 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 23:42:00.765027 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 23:42:00.765536 No LXC device requested
265 23:42:00.766092 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:42:00.766653 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 23:42:00.767198 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:42:00.767649 Checking files for TFTP limit of 4294967296 bytes.
269 23:42:00.770597 end: 1 tftp-deploy (duration 00:00:41) [common]
270 23:42:00.771226 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:42:00.771804 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:42:00.772394 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:42:00.772952 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:42:00.773529 Using kernel file from prepare-kernel: 950086/tftp-deploy-ub3cw6pw/kernel/uImage
275 23:42:00.774227 substitutions:
276 23:42:00.774676 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:42:00.775119 - {DTB_ADDR}: 0x01070000
278 23:42:00.775556 - {DTB}: 950086/tftp-deploy-ub3cw6pw/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:42:00.776018 - {INITRD}: 950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
280 23:42:00.776462 - {KERNEL_ADDR}: 0x01080000
281 23:42:00.776925 - {KERNEL}: 950086/tftp-deploy-ub3cw6pw/kernel/uImage
282 23:42:00.777368 - {LAVA_MAC}: None
283 23:42:00.777851 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950086/extract-nfsrootfs-tm_5hmmu
284 23:42:00.778293 - {NFS_SERVER_IP}: 192.168.6.2
285 23:42:00.778726 - {PRESEED_CONFIG}: None
286 23:42:00.779160 - {PRESEED_LOCAL}: None
287 23:42:00.779590 - {RAMDISK_ADDR}: 0x08000000
288 23:42:00.780052 - {RAMDISK}: 950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
289 23:42:00.780489 - {ROOT_PART}: None
290 23:42:00.780922 - {ROOT}: None
291 23:42:00.781352 - {SERVER_IP}: 192.168.6.2
292 23:42:00.781780 - {TEE_ADDR}: 0x83000000
293 23:42:00.782208 - {TEE}: None
294 23:42:00.782638 Parsed boot commands:
295 23:42:00.783054 - setenv autoload no
296 23:42:00.783478 - setenv initrd_high 0xffffffff
297 23:42:00.783902 - setenv fdt_high 0xffffffff
298 23:42:00.784359 - dhcp
299 23:42:00.784787 - setenv serverip 192.168.6.2
300 23:42:00.785208 - tftpboot 0x01080000 950086/tftp-deploy-ub3cw6pw/kernel/uImage
301 23:42:00.785631 - tftpboot 0x08000000 950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
302 23:42:00.786059 - tftpboot 0x01070000 950086/tftp-deploy-ub3cw6pw/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:42:00.786485 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950086/extract-nfsrootfs-tm_5hmmu,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:42:00.786927 - bootm 0x01080000 0x08000000 0x01070000
305 23:42:00.787478 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:42:00.789141 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:42:00.789604 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:42:00.804831 Setting prompt string to ['lava-test: # ']
310 23:42:00.806447 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:42:00.807100 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:42:00.807706 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:42:00.808393 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:42:00.809638 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:42:00.846549 >> OK - accepted request
316 23:42:00.849213 Returned 0 in 0 seconds
317 23:42:00.950395 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:42:00.952211 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:42:00.952838 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:42:00.953408 Setting prompt string to ['Hit any key to stop autoboot']
322 23:42:00.953922 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:42:00.955641 Trying 192.168.56.21...
324 23:42:00.956196 Connected to conserv1.
325 23:42:00.956655 Escape character is '^]'.
326 23:42:00.957119
327 23:42:00.957586 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 23:42:00.958046
329 23:42:11.963095 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:42:11.963763 bl2_stage_init 0x01
331 23:42:11.964295 bl2_stage_init 0x81
332 23:42:11.968601 hw id: 0x0000 - pwm id 0x01
333 23:42:11.969116 bl2_stage_init 0xc1
334 23:42:11.969557 bl2_stage_init 0x02
335 23:42:11.969990
336 23:42:11.974325 L0:00000000
337 23:42:11.974840 L1:20000703
338 23:42:11.975277 L2:00008067
339 23:42:11.975724 L3:14000000
340 23:42:11.979784 B2:00402000
341 23:42:11.980309 B1:e0f83180
342 23:42:11.980770
343 23:42:11.981208 TE: 58124
344 23:42:11.981643
345 23:42:11.985359 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:42:11.985851
347 23:42:11.986290 Board ID = 1
348 23:42:11.990958 Set A53 clk to 24M
349 23:42:11.991440 Set A73 clk to 24M
350 23:42:11.991877 Set clk81 to 24M
351 23:42:11.996585 A53 clk: 1200 MHz
352 23:42:11.997092 A73 clk: 1200 MHz
353 23:42:11.997527 CLK81: 166.6M
354 23:42:11.997952 smccc: 00012a92
355 23:42:12.002162 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:42:12.007765 board id: 1
357 23:42:12.013058 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:42:12.024385 fw parse done
359 23:42:12.030358 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:42:12.072817 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:42:12.083658 PIEI prepare done
362 23:42:12.084200 fastboot data load
363 23:42:12.084648 fastboot data verify
364 23:42:12.089424 verify result: 266
365 23:42:12.094991 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:42:12.095504 LPDDR4 probe
367 23:42:12.095943 ddr clk to 1584MHz
368 23:42:12.102898 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:42:12.140326
370 23:42:12.140870 dmc_version 0001
371 23:42:12.146883 Check phy result
372 23:42:12.152770 INFO : End of CA training
373 23:42:12.153305 INFO : End of initialization
374 23:42:12.158336 INFO : Training has run successfully!
375 23:42:12.158852 Check phy result
376 23:42:12.164012 INFO : End of initialization
377 23:42:12.164522 INFO : End of read enable training
378 23:42:12.167419 INFO : End of fine write leveling
379 23:42:12.172888 INFO : End of Write leveling coarse delay
380 23:42:12.178454 INFO : Training has run successfully!
381 23:42:12.178972 Check phy result
382 23:42:12.179411 INFO : End of initialization
383 23:42:12.184167 INFO : End of read dq deskew training
384 23:42:12.189701 INFO : End of MPR read delay center optimization
385 23:42:12.190250 INFO : End of write delay center optimization
386 23:42:12.195344 INFO : End of read delay center optimization
387 23:42:12.200903 INFO : End of max read latency training
388 23:42:12.201415 INFO : Training has run successfully!
389 23:42:12.206482 1D training succeed
390 23:42:12.212503 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:42:12.260021 Check phy result
392 23:42:12.260626 INFO : End of initialization
393 23:42:12.281750 INFO : End of 2D read delay Voltage center optimization
394 23:42:12.301955 INFO : End of 2D read delay Voltage center optimization
395 23:42:12.354024 INFO : End of 2D write delay Voltage center optimization
396 23:42:12.403505 INFO : End of 2D write delay Voltage center optimization
397 23:42:12.408934 INFO : Training has run successfully!
398 23:42:12.409495
399 23:42:12.409949 channel==0
400 23:42:12.414551 RxClkDly_Margin_A0==88 ps 9
401 23:42:12.415084 TxDqDly_Margin_A0==98 ps 10
402 23:42:12.420173 RxClkDly_Margin_A1==88 ps 9
403 23:42:12.420698 TxDqDly_Margin_A1==88 ps 9
404 23:42:12.421154 TrainedVREFDQ_A0==74
405 23:42:12.425666 TrainedVREFDQ_A1==74
406 23:42:12.426196 VrefDac_Margin_A0==25
407 23:42:12.426641 DeviceVref_Margin_A0==40
408 23:42:12.431409 VrefDac_Margin_A1==25
409 23:42:12.431914 DeviceVref_Margin_A1==40
410 23:42:12.432392
411 23:42:12.432836
412 23:42:12.433278 channel==1
413 23:42:12.436887 RxClkDly_Margin_A0==98 ps 10
414 23:42:12.437404 TxDqDly_Margin_A0==98 ps 10
415 23:42:12.442528 RxClkDly_Margin_A1==98 ps 10
416 23:42:12.443051 TxDqDly_Margin_A1==88 ps 9
417 23:42:12.448110 TrainedVREFDQ_A0==77
418 23:42:12.448669 TrainedVREFDQ_A1==77
419 23:42:12.449117 VrefDac_Margin_A0==22
420 23:42:12.453702 DeviceVref_Margin_A0==37
421 23:42:12.454213 VrefDac_Margin_A1==22
422 23:42:12.459431 DeviceVref_Margin_A1==37
423 23:42:12.459961
424 23:42:12.460459 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:42:12.460909
426 23:42:12.492877 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 23:42:12.493558 2D training succeed
428 23:42:12.498559 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:42:12.504158 auto size-- 65535DDR cs0 size: 2048MB
430 23:42:12.504746 DDR cs1 size: 2048MB
431 23:42:12.509844 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:42:12.510429 cs0 DataBus test pass
433 23:42:12.515480 cs1 DataBus test pass
434 23:42:12.516098 cs0 AddrBus test pass
435 23:42:12.516555 cs1 AddrBus test pass
436 23:42:12.517008
437 23:42:12.521010 100bdlr_step_size ps== 420
438 23:42:12.521596 result report
439 23:42:12.526614 boot times 0Enable ddr reg access
440 23:42:12.531953 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:42:12.545366 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:42:13.118912 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:42:13.119331 MVN_1=0x00000000
444 23:42:13.124491 MVN_2=0x00000000
445 23:42:13.130280 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:42:13.130625 OPS=0x10
447 23:42:13.130858 ring efuse init
448 23:42:13.131093 chipver efuse init
449 23:42:13.135773 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:42:13.141437 [0.018961 Inits done]
451 23:42:13.141800 secure task start!
452 23:42:13.142025 high task start!
453 23:42:13.146004 low task start!
454 23:42:13.146326 run into bl31
455 23:42:13.152688 NOTICE: BL31: v1.3(release):4fc40b1
456 23:42:13.160505 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:42:13.160868 NOTICE: BL31: G12A normal boot!
458 23:42:13.185810 NOTICE: BL31: BL33 decompress pass
459 23:42:13.191467 ERROR: Error initializing runtime service opteed_fast
460 23:42:14.424321
461 23:42:14.424733
462 23:42:14.432706 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:42:14.433002
464 23:42:14.433221 Model: Libre Computer AML-A311D-CC Alta
465 23:42:14.640975 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:42:14.664610 DRAM: 2 GiB (effective 3.8 GiB)
467 23:42:14.807620 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:42:14.813516 WDT: Not starting watchdog@f0d0
469 23:42:14.845776 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:42:14.858194 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:42:14.863203 ** Bad device specification mmc 0 **
472 23:42:14.873594 Card did not respond to voltage select! : -110
473 23:42:14.881198 ** Bad device specification mmc 0 **
474 23:42:14.881748 Couldn't find partition mmc 0
475 23:42:14.889480 Card did not respond to voltage select! : -110
476 23:42:14.894901 ** Bad device specification mmc 0 **
477 23:42:14.895407 Couldn't find partition mmc 0
478 23:42:14.900158 Error: could not access storage.
479 23:42:16.163385 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:42:16.164104 bl2_stage_init 0x01
481 23:42:16.164568 bl2_stage_init 0x81
482 23:42:16.168912 hw id: 0x0000 - pwm id 0x01
483 23:42:16.169422 bl2_stage_init 0xc1
484 23:42:16.169867 bl2_stage_init 0x02
485 23:42:16.170306
486 23:42:16.174477 L0:00000000
487 23:42:16.174955 L1:20000703
488 23:42:16.175400 L2:00008067
489 23:42:16.175835 L3:14000000
490 23:42:16.180086 B2:00402000
491 23:42:16.180553 B1:e0f83180
492 23:42:16.180990
493 23:42:16.181430 TE: 58124
494 23:42:16.181864
495 23:42:16.185774 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:42:16.186250
497 23:42:16.186689 Board ID = 1
498 23:42:16.191278 Set A53 clk to 24M
499 23:42:16.191747 Set A73 clk to 24M
500 23:42:16.192222 Set clk81 to 24M
501 23:42:16.196885 A53 clk: 1200 MHz
502 23:42:16.197357 A73 clk: 1200 MHz
503 23:42:16.197796 CLK81: 166.6M
504 23:42:16.198233 smccc: 00012a92
505 23:42:16.202486 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:42:16.208080 board id: 1
507 23:42:16.213939 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:42:16.224642 fw parse done
509 23:42:16.230605 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:42:16.273227 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:42:16.284132 PIEI prepare done
512 23:42:16.284612 fastboot data load
513 23:42:16.285057 fastboot data verify
514 23:42:16.289866 verify result: 266
515 23:42:16.295379 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:42:16.295852 LPDDR4 probe
517 23:42:16.296345 ddr clk to 1584MHz
518 23:42:16.303377 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:42:16.340620
520 23:42:16.341105 dmc_version 0001
521 23:42:16.347300 Check phy result
522 23:42:16.353220 INFO : End of CA training
523 23:42:16.353693 INFO : End of initialization
524 23:42:16.359028 INFO : Training has run successfully!
525 23:42:16.359497 Check phy result
526 23:42:16.364429 INFO : End of initialization
527 23:42:16.364894 INFO : End of read enable training
528 23:42:16.367760 INFO : End of fine write leveling
529 23:42:16.373295 INFO : End of Write leveling coarse delay
530 23:42:16.378914 INFO : Training has run successfully!
531 23:42:16.379409 Check phy result
532 23:42:16.379849 INFO : End of initialization
533 23:42:16.384506 INFO : End of read dq deskew training
534 23:42:16.387842 INFO : End of MPR read delay center optimization
535 23:42:16.393477 INFO : End of write delay center optimization
536 23:42:16.399024 INFO : End of read delay center optimization
537 23:42:16.399509 INFO : End of max read latency training
538 23:42:16.404655 INFO : Training has run successfully!
539 23:42:16.405134 1D training succeed
540 23:42:16.412827 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:42:16.460409 Check phy result
542 23:42:16.460980 INFO : End of initialization
543 23:42:16.482829 INFO : End of 2D read delay Voltage center optimization
544 23:42:16.503076 INFO : End of 2D read delay Voltage center optimization
545 23:42:16.554757 INFO : End of 2D write delay Voltage center optimization
546 23:42:16.604017 INFO : End of 2D write delay Voltage center optimization
547 23:42:16.609607 INFO : Training has run successfully!
548 23:42:16.610079
549 23:42:16.610521 channel==0
550 23:42:16.615180 RxClkDly_Margin_A0==88 ps 9
551 23:42:16.615663 TxDqDly_Margin_A0==98 ps 10
552 23:42:16.620771 RxClkDly_Margin_A1==88 ps 9
553 23:42:16.621240 TxDqDly_Margin_A1==88 ps 9
554 23:42:16.621680 TrainedVREFDQ_A0==74
555 23:42:16.626389 TrainedVREFDQ_A1==74
556 23:42:16.626872 VrefDac_Margin_A0==24
557 23:42:16.627306 DeviceVref_Margin_A0==40
558 23:42:16.631996 VrefDac_Margin_A1==25
559 23:42:16.632486 DeviceVref_Margin_A1==40
560 23:42:16.632923
561 23:42:16.633356
562 23:42:16.633787 channel==1
563 23:42:16.637584 RxClkDly_Margin_A0==98 ps 10
564 23:42:16.638068 TxDqDly_Margin_A0==98 ps 10
565 23:42:16.643149 RxClkDly_Margin_A1==88 ps 9
566 23:42:16.643623 TxDqDly_Margin_A1==98 ps 10
567 23:42:16.648762 TrainedVREFDQ_A0==77
568 23:42:16.649231 TrainedVREFDQ_A1==77
569 23:42:16.649668 VrefDac_Margin_A0==22
570 23:42:16.654376 DeviceVref_Margin_A0==37
571 23:42:16.654842 VrefDac_Margin_A1==24
572 23:42:16.660035 DeviceVref_Margin_A1==37
573 23:42:16.660501
574 23:42:16.660942 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:42:16.661379
576 23:42:16.693606 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 23:42:16.694128 2D training succeed
578 23:42:16.699170 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:42:16.704784 auto size-- 65535DDR cs0 size: 2048MB
580 23:42:16.705262 DDR cs1 size: 2048MB
581 23:42:16.710442 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:42:16.710906 cs0 DataBus test pass
583 23:42:16.716119 cs1 DataBus test pass
584 23:42:16.716587 cs0 AddrBus test pass
585 23:42:16.717019 cs1 AddrBus test pass
586 23:42:16.717448
587 23:42:16.721582 100bdlr_step_size ps== 420
588 23:42:16.722063 result report
589 23:42:16.727192 boot times 0Enable ddr reg access
590 23:42:16.732543 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:42:16.746037 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:42:17.318271 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:42:17.318888 MVN_1=0x00000000
594 23:42:17.323668 MVN_2=0x00000000
595 23:42:17.329422 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:42:17.329956 OPS=0x10
597 23:42:17.330414 ring efuse init
598 23:42:17.330898 chipver efuse init
599 23:42:17.335132 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:42:17.340592 [0.018960 Inits done]
601 23:42:17.341086 secure task start!
602 23:42:17.341520 high task start!
603 23:42:17.345203 low task start!
604 23:42:17.345667 run into bl31
605 23:42:17.351800 NOTICE: BL31: v1.3(release):4fc40b1
606 23:42:17.359603 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:42:17.360113 NOTICE: BL31: G12A normal boot!
608 23:42:17.385046 NOTICE: BL31: BL33 decompress pass
609 23:42:17.390630 ERROR: Error initializing runtime service opteed_fast
610 23:42:18.623610
611 23:42:18.624333
612 23:42:18.632140 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:42:18.632676
614 23:42:18.633151 Model: Libre Computer AML-A311D-CC Alta
615 23:42:18.840570 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:42:18.863853 DRAM: 2 GiB (effective 3.8 GiB)
617 23:42:19.006870 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:42:19.012728 WDT: Not starting watchdog@f0d0
619 23:42:19.044841 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:42:19.057360 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:42:19.062417 ** Bad device specification mmc 0 **
622 23:42:19.072744 Card did not respond to voltage select! : -110
623 23:42:19.080560 ** Bad device specification mmc 0 **
624 23:42:19.081112 Couldn't find partition mmc 0
625 23:42:19.088754 Card did not respond to voltage select! : -110
626 23:42:19.094418 ** Bad device specification mmc 0 **
627 23:42:19.094981 Couldn't find partition mmc 0
628 23:42:19.099420 Error: could not access storage.
629 23:42:19.442844 Net: eth0: ethernet@ff3f0000
630 23:42:19.443498 starting USB...
631 23:42:19.694741 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:42:19.695405 Starting the controller
633 23:42:19.701716 USB XHCI 1.10
634 23:42:21.412258 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:42:21.412912 bl2_stage_init 0x01
636 23:42:21.413383 bl2_stage_init 0x81
637 23:42:21.417813 hw id: 0x0000 - pwm id 0x01
638 23:42:21.418326 bl2_stage_init 0xc1
639 23:42:21.418783 bl2_stage_init 0x02
640 23:42:21.419233
641 23:42:21.423495 L0:00000000
642 23:42:21.424032 L1:20000703
643 23:42:21.424496 L2:00008067
644 23:42:21.424947 L3:14000000
645 23:42:21.426463 B2:00402000
646 23:42:21.426966 B1:e0f83180
647 23:42:21.427416
648 23:42:21.427865 TE: 58159
649 23:42:21.428356
650 23:42:21.437632 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:42:21.438147
652 23:42:21.438607 Board ID = 1
653 23:42:21.439049 Set A53 clk to 24M
654 23:42:21.439484 Set A73 clk to 24M
655 23:42:21.443171 Set clk81 to 24M
656 23:42:21.443676 A53 clk: 1200 MHz
657 23:42:21.444159 A73 clk: 1200 MHz
658 23:42:21.448783 CLK81: 166.6M
659 23:42:21.449283 smccc: 00012ab5
660 23:42:21.454296 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:42:21.454803 board id: 1
662 23:42:21.463010 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:42:21.473457 fw parse done
664 23:42:21.478453 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:42:21.522037 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:42:21.532954 PIEI prepare done
667 23:42:21.533480 fastboot data load
668 23:42:21.533943 fastboot data verify
669 23:42:21.538703 verify result: 266
670 23:42:21.544277 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:42:21.544789 LPDDR4 probe
672 23:42:21.545245 ddr clk to 1584MHz
673 23:42:21.552242 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:42:21.589448
675 23:42:21.590028 dmc_version 0001
676 23:42:21.596185 Check phy result
677 23:42:21.602051 INFO : End of CA training
678 23:42:21.602560 INFO : End of initialization
679 23:42:21.607703 INFO : Training has run successfully!
680 23:42:21.608262 Check phy result
681 23:42:21.613240 INFO : End of initialization
682 23:42:21.613751 INFO : End of read enable training
683 23:42:21.618811 INFO : End of fine write leveling
684 23:42:21.624434 INFO : End of Write leveling coarse delay
685 23:42:21.624952 INFO : Training has run successfully!
686 23:42:21.625408 Check phy result
687 23:42:21.630064 INFO : End of initialization
688 23:42:21.630575 INFO : End of read dq deskew training
689 23:42:21.635685 INFO : End of MPR read delay center optimization
690 23:42:21.641228 INFO : End of write delay center optimization
691 23:42:21.646828 INFO : End of read delay center optimization
692 23:42:21.647331 INFO : End of max read latency training
693 23:42:21.652400 INFO : Training has run successfully!
694 23:42:21.652909 1D training succeed
695 23:42:21.661605 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:42:21.709232 Check phy result
697 23:42:21.709777 INFO : End of initialization
698 23:42:21.731665 INFO : End of 2D read delay Voltage center optimization
699 23:42:21.751786 INFO : End of 2D read delay Voltage center optimization
700 23:42:21.803673 INFO : End of 2D write delay Voltage center optimization
701 23:42:21.852991 INFO : End of 2D write delay Voltage center optimization
702 23:42:21.858548 INFO : Training has run successfully!
703 23:42:21.859084
704 23:42:21.859548 channel==0
705 23:42:21.864131 RxClkDly_Margin_A0==88 ps 9
706 23:42:21.864666 TxDqDly_Margin_A0==98 ps 10
707 23:42:21.869774 RxClkDly_Margin_A1==88 ps 9
708 23:42:21.870309 TxDqDly_Margin_A1==98 ps 10
709 23:42:21.870774 TrainedVREFDQ_A0==74
710 23:42:21.875299 TrainedVREFDQ_A1==74
711 23:42:21.875823 VrefDac_Margin_A0==25
712 23:42:21.876316 DeviceVref_Margin_A0==40
713 23:42:21.880898 VrefDac_Margin_A1==25
714 23:42:21.881412 DeviceVref_Margin_A1==40
715 23:42:21.881862
716 23:42:21.882308
717 23:42:21.886526 channel==1
718 23:42:21.887052 RxClkDly_Margin_A0==98 ps 10
719 23:42:21.887507 TxDqDly_Margin_A0==98 ps 10
720 23:42:21.892071 RxClkDly_Margin_A1==98 ps 10
721 23:42:21.892600 TxDqDly_Margin_A1==88 ps 9
722 23:42:21.897786 TrainedVREFDQ_A0==77
723 23:42:21.898306 TrainedVREFDQ_A1==77
724 23:42:21.898763 VrefDac_Margin_A0==22
725 23:42:21.903285 DeviceVref_Margin_A0==37
726 23:42:21.903798 VrefDac_Margin_A1==22
727 23:42:21.908891 DeviceVref_Margin_A1==37
728 23:42:21.909416
729 23:42:21.909872 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:42:21.914520
731 23:42:21.942453 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 23:42:21.943078 2D training succeed
733 23:42:21.948105 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:42:21.953753 auto size-- 65535DDR cs0 size: 2048MB
735 23:42:21.954272 DDR cs1 size: 2048MB
736 23:42:21.959289 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:42:21.959810 cs0 DataBus test pass
738 23:42:21.964897 cs1 DataBus test pass
739 23:42:21.965432 cs0 AddrBus test pass
740 23:42:21.965893 cs1 AddrBus test pass
741 23:42:21.966339
742 23:42:21.970502 100bdlr_step_size ps== 420
743 23:42:21.971046 result report
744 23:42:21.976103 boot times 0Enable ddr reg access
745 23:42:21.981530 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:42:21.994885 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:42:22.566911 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:42:22.567572 MVN_1=0x00000000
749 23:42:22.572430 MVN_2=0x00000000
750 23:42:22.578219 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:42:22.578765 OPS=0x10
752 23:42:22.579182 ring efuse init
753 23:42:22.579584 chipver efuse init
754 23:42:22.583702 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:42:22.589288 [0.018961 Inits done]
756 23:42:22.589744 secure task start!
757 23:42:22.590146 high task start!
758 23:42:22.593840 low task start!
759 23:42:22.594292 run into bl31
760 23:42:22.600512 NOTICE: BL31: v1.3(release):4fc40b1
761 23:42:22.608338 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:42:22.608803 NOTICE: BL31: G12A normal boot!
763 23:42:22.634208 NOTICE: BL31: BL33 decompress pass
764 23:42:22.639887 ERROR: Error initializing runtime service opteed_fast
765 23:42:23.872859
766 23:42:23.873488
767 23:42:23.881161 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:42:23.881667
769 23:42:23.882133 Model: Libre Computer AML-A311D-CC Alta
770 23:42:24.089550 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:42:24.112998 DRAM: 2 GiB (effective 3.8 GiB)
772 23:42:24.256069 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:42:24.262217 WDT: Not starting watchdog@f0d0
774 23:42:24.294137 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:42:24.306579 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:42:24.311578 ** Bad device specification mmc 0 **
777 23:42:24.321917 Card did not respond to voltage select! : -110
778 23:42:24.329574 ** Bad device specification mmc 0 **
779 23:42:24.330080 Couldn't find partition mmc 0
780 23:42:24.337917 Card did not respond to voltage select! : -110
781 23:42:24.343431 ** Bad device specification mmc 0 **
782 23:42:24.343931 Couldn't find partition mmc 0
783 23:42:24.348468 Error: could not access storage.
784 23:42:24.690965 Net: eth0: ethernet@ff3f0000
785 23:42:24.691578 starting USB...
786 23:42:24.942749 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:42:24.943354 Starting the controller
788 23:42:24.949727 USB XHCI 1.10
789 23:42:27.113042 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:42:27.113629 bl2_stage_init 0x01
791 23:42:27.114064 bl2_stage_init 0x81
792 23:42:27.118612 hw id: 0x0000 - pwm id 0x01
793 23:42:27.119087 bl2_stage_init 0xc1
794 23:42:27.119511 bl2_stage_init 0x02
795 23:42:27.119926
796 23:42:27.124237 L0:00000000
797 23:42:27.124701 L1:20000703
798 23:42:27.125127 L2:00008067
799 23:42:27.125536 L3:14000000
800 23:42:27.127167 B2:00402000
801 23:42:27.127621 B1:e0f83180
802 23:42:27.128069
803 23:42:27.128501 TE: 58167
804 23:42:27.128922
805 23:42:27.138324 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:42:27.138806
807 23:42:27.139231 Board ID = 1
808 23:42:27.139644 Set A53 clk to 24M
809 23:42:27.140089 Set A73 clk to 24M
810 23:42:27.143892 Set clk81 to 24M
811 23:42:27.144386 A53 clk: 1200 MHz
812 23:42:27.144804 A73 clk: 1200 MHz
813 23:42:27.147467 CLK81: 166.6M
814 23:42:27.147922 smccc: 00012abd
815 23:42:27.152809 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:42:27.158412 board id: 1
817 23:42:27.163861 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:42:27.174180 fw parse done
819 23:42:27.180127 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:42:27.222789 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:42:27.233750 PIEI prepare done
822 23:42:27.234222 fastboot data load
823 23:42:27.234647 fastboot data verify
824 23:42:27.239375 verify result: 266
825 23:42:27.244916 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:42:27.245382 LPDDR4 probe
827 23:42:27.245799 ddr clk to 1584MHz
828 23:42:27.252911 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:42:27.289229
830 23:42:27.289728 dmc_version 0001
831 23:42:27.296860 Check phy result
832 23:42:27.302689 INFO : End of CA training
833 23:42:27.303153 INFO : End of initialization
834 23:42:27.308386 INFO : Training has run successfully!
835 23:42:27.308850 Check phy result
836 23:42:27.313954 INFO : End of initialization
837 23:42:27.314430 INFO : End of read enable training
838 23:42:27.317270 INFO : End of fine write leveling
839 23:42:27.322851 INFO : End of Write leveling coarse delay
840 23:42:27.328450 INFO : Training has run successfully!
841 23:42:27.328984 Check phy result
842 23:42:27.329422 INFO : End of initialization
843 23:42:27.334056 INFO : End of read dq deskew training
844 23:42:27.337414 INFO : End of MPR read delay center optimization
845 23:42:27.342972 INFO : End of write delay center optimization
846 23:42:27.348637 INFO : End of read delay center optimization
847 23:42:27.349283 INFO : End of max read latency training
848 23:42:27.354202 INFO : Training has run successfully!
849 23:42:27.354880 1D training succeed
850 23:42:27.362335 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:42:27.408993 Check phy result
852 23:42:27.409509 INFO : End of initialization
853 23:42:27.432484 INFO : End of 2D read delay Voltage center optimization
854 23:42:27.452737 INFO : End of 2D read delay Voltage center optimization
855 23:42:27.504741 INFO : End of 2D write delay Voltage center optimization
856 23:42:27.554138 INFO : End of 2D write delay Voltage center optimization
857 23:42:27.559631 INFO : Training has run successfully!
858 23:42:27.560210
859 23:42:27.560712 channel==0
860 23:42:27.565360 RxClkDly_Margin_A0==88 ps 9
861 23:42:27.565871 TxDqDly_Margin_A0==98 ps 10
862 23:42:27.570825 RxClkDly_Margin_A1==88 ps 9
863 23:42:27.571341 TxDqDly_Margin_A1==88 ps 9
864 23:42:27.571854 TrainedVREFDQ_A0==74
865 23:42:27.576471 TrainedVREFDQ_A1==74
866 23:42:27.577032 VrefDac_Margin_A0==25
867 23:42:27.577552 DeviceVref_Margin_A0==40
868 23:42:27.582050 VrefDac_Margin_A1==24
869 23:42:27.582586 DeviceVref_Margin_A1==40
870 23:42:27.583053
871 23:42:27.583501
872 23:42:27.583951 channel==1
873 23:42:27.587639 RxClkDly_Margin_A0==98 ps 10
874 23:42:27.588155 TxDqDly_Margin_A0==98 ps 10
875 23:42:27.593356 RxClkDly_Margin_A1==98 ps 10
876 23:42:27.593855 TxDqDly_Margin_A1==108 ps 11
877 23:42:27.598866 TrainedVREFDQ_A0==77
878 23:42:27.599327 TrainedVREFDQ_A1==78
879 23:42:27.599796 VrefDac_Margin_A0==22
880 23:42:27.604513 DeviceVref_Margin_A0==37
881 23:42:27.605011 VrefDac_Margin_A1==22
882 23:42:27.610032 DeviceVref_Margin_A1==36
883 23:42:27.610529
884 23:42:27.611002 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:42:27.615677
886 23:42:27.643685 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
887 23:42:27.644333 2D training succeed
888 23:42:27.649361 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:42:27.654861 auto size-- 65535DDR cs0 size: 2048MB
890 23:42:27.655402 DDR cs1 size: 2048MB
891 23:42:27.660469 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:42:27.660974 cs0 DataBus test pass
893 23:42:27.666080 cs1 DataBus test pass
894 23:42:27.666529 cs0 AddrBus test pass
895 23:42:27.666921 cs1 AddrBus test pass
896 23:42:27.667310
897 23:42:27.671660 100bdlr_step_size ps== 420
898 23:42:27.672196 result report
899 23:42:27.677364 boot times 0Enable ddr reg access
900 23:42:27.681846 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:42:27.696288 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:42:28.269465 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:42:28.270122 MVN_1=0x00000000
904 23:42:28.274989 MVN_2=0x00000000
905 23:42:28.280698 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:42:28.281240 OPS=0x10
907 23:42:28.281748 ring efuse init
908 23:42:28.282235 chipver efuse init
909 23:42:28.288965 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:42:28.289488 [0.018961 Inits done]
911 23:42:28.296588 secure task start!
912 23:42:28.297153 high task start!
913 23:42:28.297628 low task start!
914 23:42:28.298050 run into bl31
915 23:42:28.303142 NOTICE: BL31: v1.3(release):4fc40b1
916 23:42:28.310959 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:42:28.311516 NOTICE: BL31: G12A normal boot!
918 23:42:28.336449 NOTICE: BL31: BL33 decompress pass
919 23:42:28.342010 ERROR: Error initializing runtime service opteed_fast
920 23:42:29.574898
921 23:42:29.575498
922 23:42:29.583276 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:42:29.583743
924 23:42:29.584222 Model: Libre Computer AML-A311D-CC Alta
925 23:42:29.791869 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:42:29.815102 DRAM: 2 GiB (effective 3.8 GiB)
927 23:42:29.958122 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:42:29.963936 WDT: Not starting watchdog@f0d0
929 23:42:29.996217 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:42:30.008782 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:42:30.013764 ** Bad device specification mmc 0 **
932 23:42:30.024084 Card did not respond to voltage select! : -110
933 23:42:30.031773 ** Bad device specification mmc 0 **
934 23:42:30.032685 Couldn't find partition mmc 0
935 23:42:30.040073 Card did not respond to voltage select! : -110
936 23:42:30.045522 ** Bad device specification mmc 0 **
937 23:42:30.046365 Couldn't find partition mmc 0
938 23:42:30.050638 Error: could not access storage.
939 23:42:30.394144 Net: eth0: ethernet@ff3f0000
940 23:42:30.395038 starting USB...
941 23:42:30.646042 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:42:30.647041 Starting the controller
943 23:42:30.652942 USB XHCI 1.10
944 23:42:32.207018 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 23:42:32.215395 scanning usb for storage devices... 0 Storage Device(s) found
947 23:42:32.267032 Hit any key to stop autoboot: 1
948 23:42:32.268570 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 23:42:32.269580 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 23:42:32.270478 Setting prompt string to ['=>']
951 23:42:32.271325 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 23:42:32.282889 0
953 23:42:32.284509 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 23:42:32.285387 Sending with 10 millisecond of delay
956 23:42:33.421551 => setenv autoload no
957 23:42:33.432380 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 23:42:33.437704 setenv autoload no
959 23:42:33.438504 Sending with 10 millisecond of delay
961 23:42:35.235505 => setenv initrd_high 0xffffffff
962 23:42:35.246528 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 23:42:35.247561 setenv initrd_high 0xffffffff
964 23:42:35.248431 Sending with 10 millisecond of delay
966 23:42:36.866411 => setenv fdt_high 0xffffffff
967 23:42:36.877709 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 23:42:36.878666 setenv fdt_high 0xffffffff
969 23:42:36.879597 Sending with 10 millisecond of delay
971 23:42:37.172111 => dhcp
972 23:42:37.183103 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 23:42:37.184113 dhcp
974 23:42:37.184620 Speed: 1000, full duplex
975 23:42:37.185097 BOOTP broadcast 1
976 23:42:37.192343 DHCP client bound to address 192.168.6.27 (9 ms)
977 23:42:37.193177 Sending with 10 millisecond of delay
979 23:42:38.873030 => setenv serverip 192.168.6.2
980 23:42:38.883674 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 23:42:38.884581 setenv serverip 192.168.6.2
982 23:42:38.885372 Sending with 10 millisecond of delay
984 23:42:42.610761 => tftpboot 0x01080000 950086/tftp-deploy-ub3cw6pw/kernel/uImage
985 23:42:42.621627 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 23:42:42.622518 tftpboot 0x01080000 950086/tftp-deploy-ub3cw6pw/kernel/uImage
987 23:42:42.623006 Speed: 1000, full duplex
988 23:42:42.623465 Using ethernet@ff3f0000 device
989 23:42:42.624326 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 23:42:42.629782 Filename '950086/tftp-deploy-ub3cw6pw/kernel/uImage'.
991 23:42:42.633804 Load address: 0x1080000
992 23:42:45.492760 Loading: *################################################## 43.6 MiB
993 23:42:45.493431 15.2 MiB/s
994 23:42:45.493915 done
995 23:42:45.497251 Bytes transferred = 45713984 (2b98a40 hex)
996 23:42:45.498092 Sending with 10 millisecond of delay
998 23:42:50.189661 => tftpboot 0x08000000 950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
999 23:42:50.200522 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 23:42:50.201441 tftpboot 0x08000000 950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot
1001 23:42:50.201934 Speed: 1000, full duplex
1002 23:42:50.202399 Using ethernet@ff3f0000 device
1003 23:42:50.203528 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 23:42:50.211977 Filename '950086/tftp-deploy-ub3cw6pw/ramdisk/ramdisk.cpio.gz.uboot'.
1005 23:42:50.212557 Load address: 0x8000000
1006 23:42:57.012943 Loading: *####################T ############################# UDP wrong checksum 00000005 00006ffb
1007 23:43:02.014087 T UDP wrong checksum 00000005 00006ffb
1008 23:43:12.017166 T T UDP wrong checksum 00000005 00006ffb
1009 23:43:24.213567 T T UDP wrong checksum 000000ff 0000ee7c
1010 23:43:24.225326 UDP wrong checksum 000000ff 0000846f
1011 23:43:31.913356 T UDP wrong checksum 000000ff 0000abf6
1012 23:43:31.964433 UDP wrong checksum 000000ff 00003be9
1013 23:43:32.020817 T UDP wrong checksum 00000005 00006ffb
1014 23:43:40.093381 T UDP wrong checksum 000000ff 0000ffee
1015 23:43:40.134569 UDP wrong checksum 000000ff 00009be1
1016 23:43:43.883952 T UDP wrong checksum 000000ff 0000f90c
1017 23:43:44.063409 UDP wrong checksum 000000ff 000082ff
1018 23:43:47.023950
1019 23:43:47.024391 Retry count exceeded; starting again
1021 23:43:47.025264 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1024 23:43:47.026228 end: 2.4 uboot-commands (duration 00:01:46) [common]
1026 23:43:47.026976 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1028 23:43:47.027545 end: 2 uboot-action (duration 00:01:46) [common]
1030 23:43:47.028403 Cleaning after the job
1031 23:43:47.028740 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/ramdisk
1032 23:43:47.029532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/kernel
1033 23:43:47.056997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/dtb
1034 23:43:47.059529 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/nfsrootfs
1035 23:43:47.225962 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950086/tftp-deploy-ub3cw6pw/modules
1036 23:43:47.250656 start: 4.1 power-off (timeout 00:00:30) [common]
1037 23:43:47.251343 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1038 23:43:47.284399 >> OK - accepted request
1039 23:43:47.286049 Returned 0 in 0 seconds
1040 23:43:47.387026 end: 4.1 power-off (duration 00:00:00) [common]
1042 23:43:47.388224 start: 4.2 read-feedback (timeout 00:10:00) [common]
1043 23:43:47.389235 Listened to connection for namespace 'common' for up to 1s
1044 23:43:48.389909 Finalising connection for namespace 'common'
1045 23:43:48.390412 Disconnecting from shell: Finalise
1046 23:43:48.390722 =>
1047 23:43:48.491407 end: 4.2 read-feedback (duration 00:00:01) [common]
1048 23:43:48.491922 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950086
1049 23:43:50.315004 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950086
1050 23:43:50.315675 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.